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Dual PMSM motor drive using STM32F303CB/CC peripherals in

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2. C77 DT0012 y life augmented Design tip Dual PMSM motor drive using STM32F303CB CC peripherals in time sharina By Gianluigi Forte Dino Costanzo Main components STMS2F303CB CC Analog and DSP with FPU ARM Cortex M4 MCU up to 256KB Flash 48KB SRAM 4 ADOs 2 DAC ch 7 comp 4 PGA timers 2 0 3 6 V operation Introduction The aim of this paper is to describe the intended use of STM32F303CB CC microcontroller to implement a simultaneous dual PMSM motor drive exploiting the internal peripherals the embedded PGAs and the analog to digital converters in time sharing for three shunts current reading topology This means that during the control of the two motors the peripherals are reserved for each driver in two not overlapping time intervals Two different approaches for the motor current sensing amplification network will be analyzed using the embedded PGAs and using external operational amplifiers A hardware solution will be proposed for both cases to use the STM32303C EVAL board implementing these methods to share the required resources And finally it will be described how to setup the STM32 FOC SDK to implement the explained methods 1 Time sharing principle and resources usage Even when the three shunts topology is used to measure the motor phase currents just two simultaneous sampling of voltage drop into the shunts resistor is required Applying the Kirchhoffs current law the
3. PA13O Opre PC15Q OP 14 PA15Q Ocio Gnd O prci PP O Orci Po Opoi PD4 Q OPD3 Po6 O O os Po O Deno PB4 Q Ors3 Pee O OPsBs PB8 Q re7 PEO Oras end O Det PE3 Q Orto PES O Opes Pr OQ Ores PF100 O3v3 osv Bond PB11O Orsiz2 5152 Figure 6 Daughter board silkscreen CN7 1 2 ono EJ Orois PD140 QPbi3 P0110 ObPbie P09 O OPodio Pc13Q Bono Ia je Ia Ia m m RST Q Opos 0000505050 m PB15 OPBi14 ze got PB130 Opsio PE15Q Orei4 osy O DPE PE12Q OPE11 PFO Ovo PE100 OPr1 PE9 Q Opes e PE Bond R17 P82 Orsi RoHS Wapo Q Orcs prr PC4 Q OPa Rio PA PB11 Wao Pas za Bp DD D A HH lal laS D D gt gt gt N oo oo o D 7 gt NA o e I o o o e ho R5m mpc1 Bono sacco O R18 51 52 3 Howto configure the firmware For project based on STM32F303 the STM32 FOC SDK v3 4 supports the dual PMSM motor drive using three shunts topology with shared resource Both methods are supported e embedded PGA e external OPAMPs To enable these functionalities is necessary to create a new PMSM Dual FOC project using the ST MC Workbench Make sure that Current reading topology of both power stages are selected in Three Shunt Resistors Select the required Current sensing topology in the Control Stage Analog input and protection section The two setting must be the same for both motors Check the Shared resource check
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5. statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2014 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium Brazil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Philippines Singapore Spain Sweden Switzerland United Kingdom United States of America www st com April 2014 DT0012Rev 1 10 10 Ky www st com
6. 012Rev 1 April 2014 www st com Some PCB reworks of the STM32303C EVAL evaluation board are needed for motor control applications to disconnect peripherals which share l Os with motor control See UM1567 paragraph 2 21 In the Table 2 are reported the configurations of STM32303C EVAL board switches and solder bridges to implement the two techniques of current sensing using shared resources Table 2 Switches and solder bridges to be configured in STM32303C EVAL PGM Resistors and solder bridges Settings PGM1 Ww R113 R116 R132 R134 Mounted with 00 PGM2 L SB2 SB5 Open SB11 Closed To connect the DB PB11 pin51 of CN6 extension connector to the pin PB11 of the STM32F303VCT6 microcontroller present in the STM32303C EVAL is required to solder SB11 remove R137 and mount R36 with OQ Note For both current sensing methods using shared resources it is necessary to use the two 34 pins connector CN2 and CN4 MC connector present in the daughter board instead of the two CN2 and CN4 of the STM32303C EVAL board In Figure 4 Figure 5 and Figure 6 are shown respectively the top layout the bottom layout and the silkscreen of the daughter board April 2014 DT0012Rev 1 5 10 Ky www st com Figure 4 Daughter board top layer April 2014 DT0012Rev 1 6 10 Ky www st com 1 2 CN6 ond D Orcs PC O Orcs Pc9 Opas PA100 OpPag PA11Q Dono PCLAD OPAi2
7. In Figure 2 is shown the block diagram of one solution to share the two embedded OPAMs OPAMP1 and OPAMP3 and two analog to digital converters ADC1 and ADC3 to exploit the dual three shunt sampling using shared resources April 2014 DT0012Rev 1 2 10 Ky www st com Figure 2 Shared resources using embedded PGAs ie To COMP PD14 PA7 MC1_CurrB OPAMP1 PA3 MC2_CurrB PAS MC1 CurA 4 34 ADC1 PAI MC2_CurrA OPAMP3 PB13 14 MC1 CurrC ADC3 PBO 7 MC2 Curr C 4 Note With reference of Figure 2 two inputs of the OPAMP1 PA5 and PAS have to be connected respectively to pins PB11 and PD14 to be as internal comparators input for over current protection The remaining OPAMPs inputs are already comparators inputs 2 Hardware solution To allow the STM32303C EVAL board to implement one of the two described techniques is possible to use a specific daughter board to be plugged on top of the two extension connectors CN6 and CN7 In Figure 3 are shown the schematics of the daughter board April 2014 DT0012Rev 1 3 10 Ky www st com Figure 3 Schematic of daughter board J0j2euuo2 OW 0j2euuo2 IN
8. box in the Control Stage Analog input and protection section like shown in Figure 7 April 2014 DT0012Rev 1 7 10 Ky www st com Figure 7 ST MC Workbench Control Stage Analog Input Control Stage Analog Input and Protection Motor 1 Phase current feedback Motor 2 Phase current feedback Bus voltage feedback Temperature feedback PFC stage feedback CurSens Topo Both OCP Topo Both motors Configuration Embedded PGA Embedded HW OCP gt Exemal OPAMP Extemal Protections No protection V Shared resources for both motors Sensing Setting Pin map Sampling Time 15 ADC ek Ch phase U ADC1_IN3 A2 Sarena Time Mn A Ch phase V ADC3 INI 81 Maximum modulation 96 YA ADC12 ING C0 Peripheral Selection ADC1 ADC3 Sensing OPAMP Setting Pin map Peripheral selection OPAMP1 OPAMP3 Not inverting Output OPAMP Gain Intemal ChU A5 PAMP1 A3 OPAMP1 A2 Gain Factor 2 CV A7 PAMP3 B2 OPAMP3 B1 Overall Network Gain Chw B3 Vout polarization 1 833 v T4ise 2550 Feedback net filtering Protection Setting Pin map Digital filter duration clock Inverting input none Inverting input Not inverting Current threshold 1783 A ChU COMPS Voltage Threshold 12 m V CV A7 COMP2 El Output enable ChW B3 COMPS 4 Support material Related design support material STM32303C EVAL product evaluation board for STM32F303xx microcontrollers Documentatio
9. i 6 os Sp oF e zwo 8r Hene Ovd ae tad aad d ie Too Eid Lyd 63d a ae ad al vid or tva 0 Vyru Fiaa S3d e v3d 6t td tad br Tad eo Ze 9 6 OF vd Be ae Sve TE ae Tad 391 dA Vi 9 ins EE ec t se 9 do1s cow W ve ze ce vt ood 0 Hr zgd a tad m 58d s Sad 13d a vad amp o ead li x ja Gad Sc 9 Sad d Z gz 710d Otad z Lid 80 po sc 9c sad E Odd SQ liz z vad z z S d Act as 1d ae Tad Zad ie rad i3d 0da Zi2d dois ioW A o8 6 oz 7 Si3d B rw EEI names bod L8d enu orgs Siwa s 9 01239 5 stad iy pad siod ed aua vivo 1353H HE sas i Yd Sdd 6 o p L u z 3ex a20 hod 1 todan 6 Ziwa li AA 60d c orad Livd E bd 0 Wa c ttad M zad aq Obvd s 9 6vd vlad t zo makao 63d 8Yd yor c siad aa 19d JE 32d bod gt JE 90d 775 AE SNS sors moi20g uo Dadeta The proposed daughter board can be configured for both methods using the R7 R8 R9 R10 R11 R12 R13 R14 R15 R17 R18 R19 resistors as described in Table 1 Table 1 Daughter board allowed configurations e 2 d ia oO oO e 2 s 2 s o z sc Cl 253523 3 9lo 9o olg ELEL o 2 5 S s5 Szlaze 2 N o 2 e jojo WIL ez acl mm Ei lex alr IS e a Bl e re ro ri gf g 9 Ce Eo N Slo tr tr ee Configuration Shared resources using embedded PGAs Shared resources using external operational amplifiers 4 10 DT0
10. n Datasheet STM32F303x Datasheet STM32F302x User manual UM1567 STM32303C EVAL evaluation board User manual UM1080 Quick start guide for STM32FOx F100xx F103xx F2xx F30x FAxx PMSM single dual FOC SDK V3 4 User manual UM1052 STM32F0x F100xx F 103xx F2xx F30x F4xx PMSM single dual FOC SDK v3 4 April 2014 DT0012Rev 1 8 10 Ky www st com 5 Revision history Date Version Changes 24 Apr 2014 Initial release April 2014 DT0012Rev 1 9 10 Ly www st com Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and Services described herein at anytime without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third
11. third current can be computed from the other two So basically two analog to digital converters ADCs properly synchronized is the minimum requirement to implement a three shunts current reading for one motor Moreover if the amplification of the current measurement signals is performed using the embedded PGA peripheral two of them able to switch properly the inputs among a set of three are required for each motor To drive two PMSM motors with the same microcontroller this requirements shall be duplicated April 2014 DT0012Rev 1 1 10 Ky www st com 1 1 Using external operational amplifiers for the motor current sensing amplification network In Figure 1 is shown the block diagram of one solution to share the two analog to digital converters ADC1 and ADC2 to exploit the dual three shunt sampling using shared resources In Figure 1 is shown the block diagram of one solution to share the two analog to digital converters ADC1 and ADC2 to exploit the dual three shunt sampling using shared resources Figure 1 Shared resources using external operational amplifiers PA2 ADC1 MC1 CurB 4 PAS3 ADC1 MC2 CurB PC2 ADC12 ADC1 MC1 CurrA PC3 ADC12 MC2 CurrA PAG ADC2 1 ADC2 MC1 CurC 19 _ PCO ADC2 MC2 CurrC 1 4 1 2 Using the embedded PGAs for the motor current sensing amplification network

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