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Keithley 2000 Multimeter

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6. Z 2 LTR ECA NO REVISION ENG DATE SN A 250 FROM RE
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8. LTR ECA NO REVISION ENG DATE ca0 000c F 24919 REDRAWN ST 9 12 00 F 26432 Update Chassis View ST 2 13 02 F2 27216 Add T 7801 Detail A ST 5 16 02 2001 320A PUSH ROD SEE DETAIL A 2000 051 CHASSIS TRANSF ASS Y PROPERLY INSTALLED OP VIEW FRONT PANEL ASSEMBLY SWITCH TO INSTALL PUSH ROD PUSH OF SWITCH SHAFT DOWN INTO PUSHROD UNTIL BOTTOMS f OUT PUSH ROD PRESS UPWARD ON PUSHROD WHILE PUSHING SWITCH SHAFT DOWN POWER MODULE USE T 7801 AA PART NO QTY DESCRIPTION 2000 051 CHASSIS TRANSF ASSEMBLY 2000 040 FRONT PANEL ASSEMBLY 2000 2000 053 TECH CHASSIS ASSY 2000 TECH TECH MODEL NEXT ASSEMBLY NEXT PROCESS STEP QTY USED ON DIMENSIONAL TOLERANCES TITLE DO NOT SCALE THIS DRAWING DATE 8 1 94 SCALE X UNLESS OTHERWISE SPECIFIED a FRONT PANEL CHASSIS ASSEMBLY XX 015 ANG 1 RN Mat LS KEITHLEY e Ma aur use XXX 005 FRAC 1764 OL p qus SURFACE a X 2001 3204 POWER PUSH ROD U 4 Replaceable Parts 4 2 Replaceable Parts Introduction This se
9. 050 0004 DETAIL A GRN YEL WIRE DRESS TOWARDS CHASSIS BOTTOM KEEP AWAY FROM PUSHROD TO BE INSTALLED DETAIL B TRANSFORMER WIRING 2000 004 SC 13 GRN YEL 2000 3114 CHASSIS STUDS LOCK 6 32KEPNUT 0 IN GRN YEL FROM MODULE CARD GUIDE SHIELD PLACE LARGE SLOT ON STUDS SLIDE GUIDE UNTIL INTO SMALL SLOT IN LBS LTR ECA NO REVISION ENG DATE J 26432 2010 060 Was 2 000 060 6 32 1 4 PPHSEM 6 IN LBS h 2001 366 RFI CLIP INSTALL ON TAB BETWEEN EARS SNAPS IN PLACE SEE DETAIL A qan CABLE CLAMP 2 USE T 7725 C Qo EN POWER MODULE CC 37 CABLE CLAMP SEE DETAIL B FOR WIRING FOR TRANSFORMER BOTTOM WIRES POWER MODULE PLACE EDGE OF CLAMP NEXT TO BEND IN CHASSIS BOTTOM INSTALL 3 1 2 FU 96 4 FUSE FROM FRONT EDGE OF CHASSIS 2010 060 CHASSIS BJ ASSEMBLY PART NO QTY DESCRIPTION 2010 060 CHASSIS BJ ASSEMBLY 2 5001 388 TA S I 428 3194 FOOT 2 REQ lt 428 3194 2 FOOT 5 2 TO0T 2 820908 IN LBS IF VOLTAGE IS N
10. D D ak Mu o 1152 8245 I 2 R ON ius S ES _ m CADE 7 Cico 313 C 20 PAX 3 C x A S R165 E R244 w 2 A d 55 a Ky m En ay PEN Es gt C 4 9312 R332 V i 2 L D Cr Ya 213 Ls 272 e 142 6152 R272 55 126 IN RS O O KU C1 N Iu V g gt PX N y E _ R19 a 233150 gt dt 20 ps 6 d E Q E 2 T gt 2 obs MC 6 LABEL gt G G 5 15 p m e C 22 pa gt o Pr m m E r i e m jd 20 Nae N 20 Es 2 x p LI m C CN 3 4 Ael 2 ff x Cy r gt RS lan GA N D ES gt _ rans rx oN LN LY NV rie Z H AN e 2 p 2 w s Nue _ E D m c E NU o P S A
11. AT SE dpi 2 L105 COS 00000010 es ces I Y102 J P1014 m A 5 C C OO 5202 O T X ino 5101 W103 1104 Dey j Dog t a D GRY WHT GRY R28 j R114 m MODEL NEXT ASSEMBLY 2000 190 BABY BD USED ON NOTE FOR FURTHER COMPONENT INFORMATION DATE SCALE REFER TO THE 2000 PRODUCT STRUCTURE K I TNT DIM ARE IN IN UNLESS OTHERWISE NOTED 3 17 94 Seu WIE C P DIM TOL UNLESS OTHERWISE sPECIFIED DRN way APPR wok ONENT LAYOUT PANEL ARRAY CY KEITHLEY INSTRUMENTS NO 0 Bais 23 E EMO NV NN e ees CLEVELAND OHIO 44139 XX 05 FRAC 1 64 DO NOT SCALE THIS DRAWING 2000 230 NO REVISION ENG DATE CHG D 2000 250 FROM REV F TO G CHG D 2000 102 FROM A C REV H TO J ADDED DO NOT POPULATE CAL_ENABLE SECONDARY SIDE sag
12. 2000 Multimeter Repair Manual A MEASUR ENMSILES ONFIDENCE WARRANTY Keithley Instruments Inc warrants this product to be free from defects in material and workmanship for a period of 3 years from date of shipment Keithley Instruments Inc warrants the following items for 90 days from the date of shipment probes cables rechargeable batteries diskettes and documentation During the warranty period we will at our option either repair or replace any product that proves to be defective To exercise this warranty write or call your local Keithley representative or contact Keithley headquarters in Cleveland Ohio You will be given prompt assistance and return instructions Send the product transportation prepaid to the indicated service facility Repairs will be made and the product returned transportation prepaid Repaired or replaced products are warranted for the balance of the original warranty period or at least 90 days LIMITATION OF WARRANTY This warranty does not apply to defects resulting from product modification without Keithley s express written consent or misuse of any product or part This warranty also does not apply to fuses software non rechargeable batteries damage from battery leakage or problems arising from normal wear or failure to follow instructions THIS WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES EXPRESSED OR IMPLIED INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY OR
13. C EN LI c o gt i e lt P m gt c 2 3 c I 2 22 w N te LOI A a no ZU Z J E C ww 26 m R135 A A BOR Es Z S sapa N 0 Lo USA A 213 213 S N J N mS i C gt NE gt D LI ae 3 PEN 2000 112 REV E PR C C S p Lj C Cy 3 lt y H b ai 22 gt 0 3 me Ns 4 3 2 16 3 nme 58 8186 NOS x D 2 z C158 w 186 s fe Lo P D E a 30 P i gt R191 R183 lan D 20 20 cs gt 29 a Fe H m I 2 k gt E __ s E _ m CN a oy f L U 1 E J EE R182 C124 eu tum Peta iN pa 5 L 17 j gt 2 2 w w pa 20 C ny 2 E gt 2 7 i 5 Hs
14. 8 16 pin 1 IA OFF ON ON OFF OFF 3A OFF ON ON ON OFF Range K103 Tables 2 12 through 2 16 can be used to trace the analog signal through the A D multiplexer U163 to the final amplifier stage These tables show the MUX lines S3 S4 S6 S7 that are selected for measurement during the SIGNAL phase of the multiplexing cycle Also included are switching states of analog switches U129 that set up the gain for the final amplifier stage U166 2 16 Troubleshooting Table 2 12 DCV signal multiplexing and gain Range Signal 0129 0129 0129 Gain 9 l U163 pin1 9 U166 100mV 54 OFF OFF ON 100 1V 54 OFF ON OFF x10 10V S4 ON OFF OFF 1 100 54 OFF ON OFF x10 1000V S4 ON OFF OFF Table 2 13 ACA signal multiplexing and gain Rande Signal 0129 U 129 0129 Gain 9 l U163 pin1 9 U166 All S3 ON OFF OFF x1 Table 2 14 signal multiplexing and gain Range Signal 0129 U129 0129 Gain 9 l U163 pin1 pin8 9 U166 10mA 56 OFF OFF ON 100 100mA 56 OFF OFF ON 100 56 OFF OFF ON 100 56 OFF ON OFF x10 Table 2 15 Q2 signal multiplexing and gain Signal 1 29 U 129 U 129 Gain Range 0163 1 8 9 0166 1000 54 OFF OFF ON 100 1 54 OFF ON OFF x10 10
15. NETUS uir c ES ues La 2000 102 REN M 00000000 D000 s ec Rel TT i 270 J1006 1 dl 15 EE R A _ 2000 112 REV E l Sl sans poy 16 10000000 00000000 0000 2 pi 04 7 5 is 0139 ATE zm qe 1125 1 O OZ E Fer s U142 C187 E 2 E Ll SOIT nnnmnnnne HHWH 110 e E 000 us CR105 0163 E par 2 O 2m Dr o OO 254 D 0133 pr z 5 nnnnnn nnnnn i EE 2 f p EGS oo Du cw U E s dba 155 4 0000005 F 0005 0000 100000 AV Ee ers K e S R102 03 VRI06 C2 9 iL HL 2 oy E 255 O O 5 um eacus E U11 D000 0000 nnnnnn H 0166 UUUUUUU 8117 ay de ALA Te 274 C253 NU a R25 5 5 5 RI a EI San 8 O 3 C134 Ew 00007 00000000 MEN _ gt i 3 R EA Pepe Da Vi PRIUS 2000 802402 X 2 RAMS 00000000 5 r DO 16 gt G gt G HOO 5 R125 C140 X Lose DO POPULATE d T S i E 2000 102 E 442 m a 7 s s illo mun m C PANEL ARRAY r 00000005 0000000 i RED WH mE EL 2 ae ca m W107 10 E102 y ez j DO
16. Troubleshooting 2 31 Test 201 2 A D MUXLO Bank REF MUX Inputs Open Expected Value 0 volts Limits 0 0001 volts Fault Message MUX LO Description This test is similar to test 201 1 except signal LO is routed through R274 to S8 of U163 Signal LO is then routed through Q117 to U166 which is con figured for 1 gain Measure OV at AD_IN Bit patterns Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 0134 0121 ACDC_STB 110 1111 00101111 1v10000v 01110010 U130 MUX STB 11111101 IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 2 32 Troubleshooting TEST BANK DC OHM Test 300 1 FRONT END LO Bank DC OHM Inputs Open Expected Value 0 volts Limits 0 01 volts Fault Message FRONT END LO Description This test is for the DC volts front end LO path Control line DIVLO is high making the 0120 comparator output pin 2 open collector 0114 is on due to the gate being pulled low by R164 Signal LO is connected to SIG 100 through Q114 and divider R117 The DIVTAP control line at U115 pin 11 is pulled high to turn on Q108 This routes SIG 100 LO through Q108 to the unity gain buffer U113 The signal at the output of U113 is now called BUFCOM and goes through R314 to 54 of 0163 It then goes to the A D MUX which is configured for x1 gain Measure OV at AD_IN Bit patterns Bit pattern Register Q Q Q Q
17. S4 OFF ON OFF x10 100kQ S4 OFF ON OFF x10 IMQ 54 ON OFF OFF 54 1 100 S4 ON OFF OFF x1 Troubleshooting 2 17 Table 2 16 O4 signal multiplexing and gain Range Signal 0129 0129 0129 Gain U 163 pin 1 pin 8 pin 9 U 166 1000 54 then 57 OFF ON 100 1 54 then 57 OFF 10 10KQ 54 then 57 OFF 10 100KQ 54 then S7 OFF 10 IMQ 54 then S7 OFF 54 then 57 OFF 100 54 then 57 ON OFF Figure 2 3 provides a block diagram of the analog circuitry Table 2 17 is provided to show where the various switching devices are located in the block diagram Table 2 17 Circuit section locations for switching devices ai Analog circuit section Switching devices see Figure 2 3 0101 0102 SSP Solid State Protection Q114 Q136 Q109 DCV Divider K101 Q113 Q105 Q104 Q108 DCV amp Ohms Switching 0121 K102 0103 0105 0111 AC Switching amp Gain U133 Q123 Q125 Q124 Q126 Q120 Ohms I Source K103 Current Shunts U163 0129 A D Mux amp Gain 2 18 Troubleshooting Built In Test overview Built In Test is used to test and exercise various circuits and components The Built In Tests are listed in Table 2 18 Many of the tests are actual pass fail type tests while others
18. AC SYSTEM SPEEDS 5 FUNCTION RANGE CHANGE 4 5 AUTORANGE TIME 3 s ASCII READINGS TO RS 232 19 2k BAUD 50 s MAX INTERNAL TRIGGER RATE 300 5 MAX EXTERNAL TRIGGER 300 5 AC GENERAL INPUT IMPEDANCE 1 2 paralleled by lt 100 ACV INPUT PROTECTION 1000Vp MAXIMUM DCV 400V on any ACV range ACI INPUT PROTECTION 250V fuse BURDEN VOLTAGE 1A Range 0 3V rms 3A Range 1V rms SHUNT RESISTOR 0 10 on all ACI ranges AC CMRR gt 704 with 1kQ in LO lead MAXIMUM CREST FACTOR 5 at full scale VOLT HERTZ PRODUCT lt 8 x 107 V Hz OVERRANGE 120 of range except on 750V and ranges AC Notes Specifications are for SLOW rate and sinewave inputs gt 5 of range Speeds are for 60 Hz operation using factory default operating conditions RST Auto zero off Auto range off Display off includes measurement and binary data transfer out the GPIB 0 0196 of step settling error Trigger delay 400ms Trigger delay 0 DETector BANDwidth 300 NPLC 0 01 5 Maximum useful limit with trigger delay 175ms 7 Applies to non sinewaves gt 5 2 Applies to 0 18 C and 28 50 C For signal levels gt 2 2A add additional 0 4 to of reading uncertainty Rev E HW 8 8 01 2000 6 1 2 Digit Multimeter FREQUENCY AND PERIOD CHARACTERISTICS 2 RESOLUTION ACCURACY ACV FREQUENCY PERIOD GATE ppm of 90 DAY 1 YEAR RANGE RANGE RANGE TIME reading of rea
19. Description Bit patterns SENSE 4 wire short 0 volts 0 0001 volts SENSE LO This test requires a 4 wire short at the input The SLO node is the Sense LO jack on the front or rear panel The 4 wire short connects SLO to LO The OV signal at SLO is routed through R132 R139 R148 R163 and 0121 to U126 which is configured as a unity gain buffer The output of U126 is routed to S7 of U163 where it is switched to the A D MUX x1 gain Mea sure OV at AD_IN Bit pattern Register Q Q 87654321 87654321 87654321 87654321 0106 0109 0134 0121 ACDC_STB 110 1111 00101111 1v10000v 01110010 U130 MUX STB 01011101 IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 Q3 6 02 5 01 4 Troubleshooting 2 53 Test 500 2 4W SENSE Bank SENSE Inputs 4 wire short Expected Value 0 volts Limits 0 0001 volts Fault Message SENSE HI Description This test requires a 4 wire short at the input The SHI node is the Sense HI jack on the front or rear panel The 4 wire short connects SHI to LO The 0V signal at SHI is routed through R120 R124 R121 R125 and 0113 4W con trol line high to U113 BUFCOM As in previous tests this signal goes to the A D MUX which is configured for x1 gain Measure at AD_IN Bit patterns Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 0134 0121 ACDC_STB 110 1111 00101111 1v1000
20. Description Bit patterns VAC Open lt none specified gt lt none specified gt lt none gt This test places the ACV front end in the inverting configuration Logic levels for this configuration are as follows K102 SETKI high low U103 Pins 8 and 9 high 0105 Pin 9 low The signal path is from ACIN through C105 R104 and R105 which make up a 1 1MQ input resistance to the minus input of op amp U102 The plus input of U102 is connected to AC common through R146 Feedback for U102 is provided by R106 11kQ The output gain for 0102 seen at ACFE is 0 001 R106 R117 R104 R105 The output of 0102 ACFE is routed through U103 1 low to 0112 which is configured for x10 gain The signal then goes through U105 pin 1 low and is coupled across C115 to U118 which is configured for x2 gain The output of U118 goes to the TRMS converter U110 through the par allel combination of R129 C113 and C114 The output of the TRMS con verter OUT is fed back through its own internal buffer The buffer output signal BUFF OUT is then labeled AC MED The AC MED signal is se lected at U163 and fed to the A D buffer U166 through Q117 The A D buffer is set up for 1 gain through 0129 x1 low This test is a setup phase for the next test Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 101 1101 01101111 1v01000v 01110000 U
21. Window Fuse Holder Assembly Table 1 1 Fuse rating Line voltage Fuse rating K eithley part no 100 120V 0 25A slow blow 5x20mm FU 96 4 220 240V 0 125A slow blow 5x20mm FU 91 1 4 Routine M aintenance AMPS fuse replacement WARNING Make sure the instrument is disconnected from the power line and other equipment before replacing the AMPS fuse 1 Turn off the power and disconnect the power line and test leads From the front panel gently push in the AMPS jack with your thumb and rotate the fuse carrier one quarter turn counter clockwise Release pressure on the jack and its internal spring will push the fuse carrier out of the socket 3 Remove the fuse and replace it with the same type 3A 250V fast blow Keithley part number FU 99 1 CAUTION not use a fuse with a higher current rating than specified or instrument damage may occur If the instrument repeatedly blows fuses locate and cor rect the cause of the trouble before replacing the fuse 4 Install the new fuse by reversing the procedure 2 Troubleshooting 2 2 Troubleshooting Introduction WARNING information in this section is intended for qualified service personnel Some of these procedures may expose you to hazardous voltages Do not per form these hazardous procedures unless you are qualified to do so This section of the manual will assist you in troubleshooting the Model 2000 Included are self tests test
22. Bit patterns Bit pattern R egister Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 0106 0109 0134 0121 ACDC_STB 110 1111 00101111 1v10011v 10110001 U130 MUX STB 10111011 IC pins Q8 11 07 12 Q6 13 05 14 04 7 03 6 02 5 01 4 2 40 Troubleshooting TEST BANK VAC Test 400 1 NON INV PATH VAC Open lt none specified gt lt none specified gt lt none gt Bank Inputs Expected Value Limits Fault Message Description This test places the ACV front end in the non inverting configuration Logic levels for this configuration are as follows K102 SETK1 low RESETKI high U103 Pins 8 and 9 low U105 Pin 9 high The signal path is from ACIN through K102 to the plus input of U102 Re sistors R117 9 9MQ and R146 1 1MQ to form a 10 at the input The feedback path for U102 is from the minus input through U103 pins 6 and 7 to node ACFE Node ACFE is connected to U112 through U103 pin low Op amp U112 is configured for x10 gain The output of U112 is routed through 0105 pin 1 low The signal is then coupled across C115 to U118 Analog switch U111 pin 16 low is closed to set up U118 for unity gain The output of 0118 goes to U110 TRMS converter through the parallel combination of R129 C113 and C114 The output of the TRMS converter OUT is fed back through its own internal buffer The buffer output signal BUFF OUT is then labeled AC_MED The AC_MED signal is sele
23. 10 8 1 1 000000 1 Q 10 pA 20 6 80 10 100 10 8 1 10 00000 16 10 Q 700 nA 10MQ 15046 200 10 400 10 7041 100 0000 116 100 Q 700 nA 10MQ 800 30 1500 30 1500 30 385 1 Current 10 00000 mA 0 nA lt 0 15V 60 30 300 80 500 80 50 5 100 0000 mA 100 nA lt 0 03 V 100 300 300 800 500 800 50 50 1 000000 A 1 pA 03 V 200 30 500 80 800 80 50 5 3 00000 0 pA 1000 15 1200 40 1200 40 50 5 Continuity 2W 1kQ 100 1 40 100 100 100 120 100 8 1 Diode Test 3 00000 V 0 1 20 6 30 7 40 7 8 1 10 00000 0 100 pA 20 6 30 7 40 7 8 1 10 00000 0 10 pA 20 6 30 7 40 7 8 1 DC OPERATING CHARACTERISTICS SPEED AND NOISE REJECTION FUNCTION DIGITS READINGS s PLCs RMS NOISE DCV all ranges 6153 4 5 10 RATE READINGS S DIGITS 10V RANGE NMRR CMRR DCI all ranges and 61597 30 10 5 6 15gV 60 dB 140 dB Ohms 10M range 6153 5 50 1 1 PLC 50 6 AyV 60 dB 140 dB 5 3 5 270 01 0 1 PLC 500 5 lt 22 80 dB 5155 500 0 1 0 01 PLC 2000 4 lt 150 pV 80 dB 5123 1000 0 04 4155 2000 0 01 DC Notes DC SYSTEM SPEEDS 1 Add the following to ppm of range uncertainty 1V and 100V 2 100mV 15ppm 1000 15ppm lt 1MQ RANGE CHANGE 50 5 FUNCTION CHANGE 45 s AUTORANGE 19 lt 30 ms ASCII READINGS TO RS 232 19 2K BAUD 55 s MAX INTERNAL TRIGGER RATE 2000 s EXTERNAL TRIGGER RATE 500 s DC GENERAL LINE
24. DUAL D TYPE F F 74HC74 SOIC IC 773 U148 153 IC QUAD 2 IN NOR 74HCTO02 SOIC IC 809 0149 NCHAN LAT DMOS QUADFET SD5400CY SOIC IC 893 0150 IC OPTOCOUPLER 2611 IC 690 U151 152 IC 32KX8 STAT CMOS RAM D43256C SOMETRIC LSI 93 100 0154 QUAD D FLIP FLOP W CLK RESET 74HC175 923 155 IC OPTOCOUPLER 2601 IC 239 U156 PROGRAM 2000 804 0157 PROGRAM 2000 803 158 GPIB ADAPTER 9914A PLCC LSI 123 10159 5 85 232 TRANSCEIVER MAX202 SOIC 952 0160 IC OCTAL INTER BUS TRANS 75161 SOLIC IC 647 0161 IC OCTAL INTERFACE BUS 75160 SOLIC IC 646 U162 PROGRAM 2000 802 U163 IC 8 CHAN ANA MULTIPLEXER DG408DY SOIC 1 844 4 10 Replaceable Parts Table 4 3 cont Model 2000 motherboard parts list Circuit desig Description Keithley part no 101 114 VAR 576 METAL OXIDE VR 5 102 DIODE ZENER 6 2 BZX84B6V2 SOT 23 DZ 87 VR103 104 DIODE ZENER 6 8 575235 SOD 23 DZ 100 VR105 106 115 116 DIODE ZENER 11V MMSZIITI SOD 123 DZ 103 VR107 108 DIODE ZENER 3 3V MMBZ5226BL SOT 23 DZ 94 VR109 DIODE ZENER 17V MMBZ5247BL SOT 23 DZ 104 110 DIODE ZENER 5 1 7 84 5 1 SOT 23 DZ 88 112 113 DIODE ZENER 6 2V MMS26V2 SOD 123 DZ 97 Y101 CRYSTAL 14 7456MHZ CR 39 Y102 OSCILLATOR HIGH SPEED CMOS 12MHZ CR 37 Order present firmware revision Table 4 4 Model 2000 mechanical parts list Description K eithley part no 2 56X5 8 PHILLIPS
25. Measure 108mV DC at A D IN Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 101v1101 01101111 1v01000v 01110000 U130 MUX STB 10011101 IC pins Q8 11 7 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 Test 401 3 INVERT PATH Bank VAC Inputs Open Expected Value lt none specified gt Limits lt none specified gt Fault Message lt none gt Description This phase resets the circuit to a known state and turns the waveform sig nal off Subsequent tests require that the A D be in the normal operating mode Bit patterns Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 101v1101 01101111 1v01000v 01110000 U130 MUX STB 10011101 Troubleshooting IC pins Q8 11 07 12 Q6 13 05 14 04 7 Q3 6 02 5 01 4 2 45 2 46 Troubleshooting Test 402 1 NON INV 10 Bank VAC Inputs Open Expected Value none specified Limits none specified Fault Message none Description This test places the ACV front end in the non inverting configuration Logic levels for this configuration are as follows K102 5 low RESETKI high U103 Pins 8 and 9 low U105 Pin 9 high The signal path is from ACIN through K102 to the plus input of U102 Re sistors R117 9 9M and R146 1 1MQ to form a 10 at the input The feed back
26. Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 110v1111 00101111 1v10000v 01110001 U130 MUX_STB 10111101 IC pins Q8 11 07 12 Q6 13 Q5 14 Q4 7 Q3 6 02 5 01 4 Test 301 1 OHMS Inputs Expected Value Limits Fault Message Description NOTE DC OHM Open 7 volts 0 7 volts 7V REFBOOT Troubleshooting 2 33 7V is generated by buffering REFHI with op amp U139 This 7V which is used by the ohms circuit as a voltage reference is switched by U133 7V control line low to amp U123 which is a unity gain buffer The 7V reference now labeled REFBOOT is routed through R272 Q109 HIOHM control line low the 9 9MQ half of R117 Q101 Q102 K101 RESETK2 control line high R304 Q104 LOV control line high to U113 The unity gain output of U113 BUFCOM then goes to the A D MUX as in test 300 1 with a gain of x1 Measure 7V at AD_IN K101 and K102 are latching relays Any reference to their control line settings implies that this setting normally high 5V may be present for less than 100 milliseconds Remember this if attempting to troubleshoot these parts especially when running the BIT test in the MANUAL STEP mode Bit patterns Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 110 1111 00101111 1v10001v 10000100 U130 MUX STB 1
27. 12 Q6 13 05 14 04 7 03 6 02 5 01 4 Troubleshooting 2 55 Test 600 2 Inputs Expected Value Limits Fault Message Description Bit patterns AMP OHM INPUT HI to AMPS short 0 025 volts 0 015 volts 1 OHM SHUNT This test requires a jumper wire from the INPUT HI jack to the AMPS jack on the front panel The 7V reference is switched to the ohms circuit through 0133 0123 and 0125 are turned on to generate current that is routed to the INPUT HI jack The signal path for this current is from the 14V node through R194 0125 0119 0120 K101 pins 3 to 4 0102 Q101 through the parallel combination of R115 L109 and R324 then to the INPUT HI jack The jumper wire then routes the 1mA into the AMP jack and through K103 SETK3 control line low so that pins 2 to 3 and 8 to 9 are closed This bypasses R205 and routes the 1mA through the 0 10 ohm resistor R158 ImA current through 0 10 generates around 100uV which is sensed through S101 and R142 to the AMPSHUNT node The AMPSHUNT signal is routed to 56 of U163 where it is switched to the A D MUX The A D MUX is configured for x100 gain Since this is a very small voltage trace resistance and circuit offsets greatly affect the ex pected voltage of 10mV This test is useful to detect the presence of the prop er component operation and not so much their precision Measure approximately 25mV at AD
28. 1600 Sint Pieters Leeuw 02 363 00 40 Fax 02 363 00 64 Yuan Chen Xin Building Room 705 12 Yumin Road Dewai Madian Beijing 100029 8610 6202 2886 Fax 8610 6202 2892 Tiet j ntie 2 02130 Espoo Phone 09 54 75 08 10 Fax 09 25 10 51 00 3 all e des Garays 91127 Palaiseau C dex 01 64 53 20 20 Fax 01 60 11 77 26 Landsberger Strasse 65 82110 Germering 089 84 93 07 40 Fax 089 84 93 07 34 Unit 2 Commerce Park Brunel Road Theale Berkshire RG7 4AB 0118 929 7500 Fax 0118 929 7519 Flat 2B Willocrissa 14 Rest House Crescent Bangalore 560 001 91 80 509 1320 21 Fax 91 80 509 1322 Viale San Gimignano 38 20146 Milano 02 48 39 16 01 Fax 02 48 30 22 74 New Pier Takeshiba North Tower 13F 11 1 Kaigan 1 Minato ku Tokyo 105 0022 81 3 5733 7555 Fax 81 3 5733 7556 2FL URI Building 2 14 Yangjae Dong Seocho Gu Seoul 137 888 82 2 574 7778 Fax 82 2 574 7838 Postbus 559 4200 AN Gorinchem 0183 635333 Fax 0183 630821 c o Regus Business Centre Frosundaviks All 15 4tr 169 70 Solna 08 509 04 679 Fax 08 655 26 10 Kriesbachstrasse 4 8600 D bendorf 01 821 94 44 Fax 01 820 30 81 1FL 85 Po Ai Street Hsinchu Taiwan R O C 886 3 572 9077 Fax 886 3 572 9031 Copyright 2001 Keithley Instruments Inc Printed in the U S A 4 02
29. 6 U401 pin 32 Pulse train every Imsec Control from main processor 7 U401 pin 33 Brief pulse train when front Key down data sent to main panel key pressed processor Power supply checks Power supply problems can be checked out using Table 2 3 See Principles of Operation for circuit theory on the power supply Table 2 3 Power supply checks Step Item component Required condition Remarks 1 Line fuse Check continuity Remove to check 2 Line voltage 120V 240V as required Check power module position 3 Line power Plugged into live receptacle Check for correct power up power on sequence 4 U144 pin2 5V 5 5VD referenced to Common D 5 0101 pin 7 37 5 37V referenced to Common D 6 U125 pin 3 15V 5 15V referenced to Common A 7 U119 pin 3 15V 5 15 referenced to Common 8 U124 pin 3 5V 5 5VRL referenced to Common A 2 12 Troubleshooting Digital circuitry checks Digital circuit problems can be checked out using Table 2 4 See Principles of Operation for digital circuit Table 2 4 Digital circuitry checks Step Required condition Remarks 1 Power on test RAM OK ROM OK Verify that RAM and ROM are functional 2 0152 pin 16 Digital common All signals referenced to digital common 3 0152 pin 32 45V Digital logic supply 4 U135 pin 48 Low on power up then goes MPU RESET line high 5 0
30. 7V control line low The reference is buffered by U123 is labeled REFBOOT The REFBOOT signal is switched into the front end through Q109 via U120 by toggling the HIOHM line This switching routine is done in firm ware Q114 and Q136 are turned ON conducting to ground by U120 DIV LO control line low The 100k leg of R117 acts as a pull up and pull down to clean up the switched signal REFBOOT The signal path continues through Q101 Q102 and K101 to ACIN The switched ACIN signal coupled across C105 is applied to the circuit de scribed in test 402 1 and the measurement is made The input signal switching stops while the A D takes the reading Signal switching continues after the reading is done There are delays before the reading is taken to ensure that the ACV section and filters have enough time to reach a charged full scale reading In this phase the switched signal can be traced through the circuit described in test 402 1 Measure 108mV DC at A D_IN Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 110v0011 11011111 1v01000v 01110000 U130 MUX_STB 10011101 IC pins Q8 11 Q7 12 Q6 13 Q5 14 Q4 7 Q3 6 Q2 5 Q1 4 2 48 Troubleshooting Test 402 3 NON INV 10 Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open lt none specified gt lt none specified gt l
31. 9M METAL FILM TF 224 R122 134 272 181 RES 1 125mW METAL FILM 1206 R 391 1K R123 RES 73 2K 1 1OOMW THICK FILM 0805 R 418 73 2K R127 RES 33 2K 1 100MW THICK FILM 0805 R 418 33 2K R129 RES 215 1 1OOMW THICK FILM 0805 R 418 215 R135 RES 33 2K 1 100MW THICK FILM 0805 R 418 33 2K R139 148 163 RES 24K 5 1W 200V THICK FILM 2512 R 437 24K R142 RES 10 5 125MW METAL FILM 1206 R 375 10 R145 156 321 322 RES 100 1 1000MW THICK FILM 0805 R 418 100 R146 RES 1 1M 5 125MW METAL FILM 1206 R 375 1 1M R147 RES 732K 1 1000MW THICK FILM 0805 R 418 732K R149 151 RES 150 1 100MW THICK FILM 0805 R 418 150 R150 RES 25 5K 1 100MW THICK FILM 0805 R 418 25 5K R152 143 137 RES 49 9K 1 125MW METAL FILM 1206 R 391 49 9K R153 RES NET 3 6K MICRO DIVIDER TF 246 1 R154 230 RES 49 9K 1 1OOMW THICK FILM 0805 R 418 49 9K R155 RES 4 99K 1 1OOMW THICK FILM 0805 R 418 4 99K R157 RES 511 1 1OOMW THICK FILM 0805 R 418 511 R158 RES 1 1 2W 4A TERMINAL MOLDED R 342 1 R159 166 185 275 307 314 RES 475 1 125mW METAL FILM 1206 R 391 475 R164 112 RES 100 1 125mW METAL FILM 1206 R 391 100K R168 RES 270 596 250mW METAL FILM 1210 R 376 270 R169 214 218 RES 4 99K 1 1000MW THICK FILM 0805 R 418 4 99K R172 167 160 RES 1 100MW FILM 0805 R 418 1M R176 179 183 186 193 130 177 RES 100K 1 100MW THICK FILM 0805 R 418 100K R178 184 187 161 213 257 248
32. ALUMINUM C 313 6800 C157 179 CAP 100PF 596 100V CERAMIC 0805 C 465 100P C171 177 CAP 2200P 10 100V CERAMIC C 430 2200P C175 10UF 20 25V TANTALUM D7243 C 440 10 C178 167 172 169 161 103 128 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C194 182 199 200 136 233 232 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C204 206 190 173 139 138 162 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C209 CAP 22UF 20 25V TANTALUM D7243 C 440 22 C213 212 133 124 159 154 230 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C221 168 185 CAP 1UF 1096 25V CERAMIC 0805 C 495 1 C222 47 5 100V CERAMIC 0805 C 465 47P C224 141 158 150 176 219 220 CAP 47 5 100V CERAMIC 0805 C 465 47P 4 6 Replaceable Parts Table 4 3 cont Model 2000 motherboard parts list Circuit desig Description Keithley part no C241 CAP 01UF 10 50V CERAMIC 0805 C 491 01 C242 243 CAP 01UF 10 50V CERAMIC 0805 C 491 01 C244 CAP 1000 20 50V CERAMIC 1206 C 418 1000P CR102 103 DIODE BRIDGE 18 52 104 DIODE SILICON W04M CASE WM RF 46 105 108 114 DIODE SWITCHING MMBD914 SOT 23 RF 83 106 DIODE BRIDGE 05 CASE RF 48 CR110 CR118 DIODE DUAL HSM 2822T31 SOT 23 RF 95 CR111 112 115 117 DIODE DUAL SWITCHING BAV99L SOT 23 RF 82 E101 102 SURGE ARRESTOR CG3 1 5L SA 4 J1006 CONN MICRODIN W GND FINGERS CS 792 J1007 CONN RT ANGLE MALE 9 PIN CS 7
33. FITNESS FOR A PARTICULAR USE THE REMEDIES PROVIDED HEREIN ARE BUYER S SOLE AND EXCLUSIVE REMEDIES NEITHER KEITHLEY INSTRUMENTS INC NOR ANY OF ITS EMPLOYEES SHALL BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF ITS INSTRUMENTS AND SOFTWARE EVEN IF KEITHLEY INSTRUMENTS INC HAS BEEN ADVISED IN ADVANCE OF THE POSSIBILITY OF SUCH DAMAGES SUCH EXCLUDED DAM AGES SHALL INCLUDE BUT ARE NOT LIMITED TO COSTS OF REMOVAL AND INSTALLATION LOSSES SUSTAINED AS THE RESULT OF INJURY TO ANY PERSON OR DAMAGE TO PROPERTY KEITHLEY Keithley Instruments Inc 28775 Aurora Road Cleveland Ohio 44139 440 248 0400 Fax 440 248 6168 1 888 KEITHLEY 534 8453 www keithley com Sales Offices BELGIUM Bergensesteenweg 709 B 1600 Sint Pieters Leeuw 02 363 00 40 Fax 02 363 00 64 CHINA Yuan Chen Xin Building Room 705 12 Yumin Road Dewai Madian Beijing 100029 8610 6202 2886 Fax 8610 6202 2892 FINLAND Tiet j ntie 2 02130 Espoo Phone 09 54 75 08 10 Fax 09 25 10 51 00 FRANCE 3 all e des Garays 91127 Palaiseau C dex 01 64 53 20 20 Fax 01 60 11 77 26 GERMANY Landsberger Strasse 65 82110 Germering 089 84 93 07 40 Fax 089 84 93 07 34 GREAT BRITAIN Unit 2 Commerce Park Brunel Road Theale Berkshire RG7 4AB 0118 929 7500 Fax 0118 929 7519 INDIA Flat 2B Willocrissa 14 Rest House Crescent Bangalor
34. IN Bit pattern Register Q 010 010 010 0 87654321 87654321 87654321 87654321 17106 17109 0134 0121 ACDC_STB 110 1111 00101111 1v10011v 10110010 U130 MUX STB 11101011 IC pins Q8 11 7 12 Q6z13 5 14 04 7 Q3 6 02 5 01 4 2 56 Troubleshooting Test 601 1 AMP SHUNT Bank Inputs Expected Value Limits Fault Message Description AMP OHM INPUT HI to AMPS short lt none specified gt lt none specified gt lt none gt This test requires an external jumper wire be installed from the INPUT HI jack to the AMPS jack on the front panel There is a routine in software that generates a test signal current for the ACV AMP test This signal generation is described in test 601 2 The test signal is routed through the front end circuit to the front panel IN PUT HI jack The jumper connects the test signal to the front panel AMPS jack The test signal is routed through K103 pins 3 and 8 to pins 4 and 7 The signal current then flows through the series combination of R205 10Q and R158 0 1Q to ground This generates an AC voltage that is connected to AMPSHNT through S101 and R142 The ACV front end is set up for the non inverting configuration as follows K102 SETK1 low RESETKI high U103 Pins 8 and 9 low U105 Pin 9 high The AMPSHNT signal is routed through U105 pin 16 low to the plus in put of U112 which is configured for x10 gain The output signal of the o
35. LU 130 LUG LU 88 MOTHERBOARD SHIELD 2000 306B MOUNTING EAR LEFT 428 338B MOUNTING EAR RIGHT 428 328E PC BOARD STOP 2001 371A PLASTIC PLUG FOR SCANNER COVER PLATE FA 240 POWER ROD 2001 320A SCREWLOCK FEMALE FOR RS 232 CS 725 SWITCHPAD 2000 310A TRANSFORMER TR 299B 4 12 Replaceable Parts Table 4 5 Model 2000 miscellaneous parts list Description K eithley part no CALIBRATION MANUAL PACKAGE COVER PANEL SCANNER DISK PROGRAMMING HANDLE LINE CORD QUICK REFERENCE GUIDE PACKAGE TEST LEADS USER S MANUAL PACKAGE 2000 905 00 2001 372A 2000 DSK 8 1 428 329F CO 7 2000 903 00 CA 22 2000 900 00
36. Parts Table 4 1 Model 2000 connector board parts list Circuit desig Description Keithley part no C101 CAP 1UF 10 25V CERAMIC 0805 C 495 1 J1034 CONN MALE RT ANGLE 32 PIN CS 456 P1017 CABLE ASSEMBLY CA 123 14A R196 RES 2 21 1 100MW THICK FILM 0805 R 418 2 21K Table 4 2 Model 2000 display board parts list Circuit desig Description Keithley part no RFI CLIP CHASSIS 2001 366 1A TAPE 3 4 WIDE X 1 32 THICK TP 12 1 C401 402 411 CAP 1UF 20 50V CERAMIC 1206 C 418 1 C403 404 405 407 409 410 412 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C406 408 33PF 10 100V CERAMIC 1206 C 451 33P C413 CAP 22UF 20 6 3 TANTALUM C6032 C 417 22 CR401 402 DIODE MBR0520LT1 SOD 123 RF 103 DS401 DISPLAY DD 52 P1014 CABLE ASSEMBLY CA 123 16A R401 402 403 404 406 409 411 RES 15k 1 100MW THICK FILM 0805 R 418 15K R405 408 410 412 RES 12 1 1 125MW METAL FILM 1206 R 391 12 1 R413 RES 13K 1 100MW THICK FILM 0805 R 418 13K R417 418 RES 15k 1 100 THICK FILM 0805 R 418 15K R419 RES 10M 5 125MW METAL FILM 1206 R 375 10M R420 421 RES 10K 1 100MW THICK FILM 0805 R 418 10K 0401 PROGRAM 2000 800 U402 403 IC LATCHED DRIVERS UCN 5812EPF 1 PLCC IC 732 401 CRYSTAL 4MHZ SMT CR 36 4M Order present firmware revision Replaceable Parts 4 5 Table 4 3 Model 2000 motherboard parts list Circuit desig Description Keith
37. Pin 7 Pin 3 switched to Pin 4 Table 2 6 ACV and FREQ signal switching 0103 U 103 U 105 U 105 0103 0103 U 105 U 111 pin 8 pin 9 pin 9 pin 8 16 pin 1 pin 1 pin 16 100mV ON RESET RESET ON ON OFF OFF OFF ON ON OFF ON RESET RESET ON ON OFF OFF ON OFF OFF OFF 10V ON ON RESET SET OFF OFF ON OFF OFF ON ON OFF 100V ON RESET SET OFF OFF ON OFF ON OFF OFF OFF 750V ON ON RESET SET OFF OFF ON ON OFF OFF OFF OFF K101 K102 reset states Pin 8 switched to Pin 9 Pin 3 switched to Pin 2 K101 and K102 set states Pin 8 switched to Pin 7 Pin 3 switched to Pin 4 Range 0101 0102 K101 K102 2 14 Troubleshooting Table 2 7 Q2 signal switching Range 0101 0102 0114 Q136 Q109 K 101 K102 Q113 0105 0104 0108 0121 1000 ON OFF OFF OFF SET RESET OFF OFF ON 1 RESET OFF OFF ON 10kQ ON ON OFF OFF OFF SET RESET OFF OFF ON 100kQ ON ON OFF OFF OFF SET RESET OFF OFF ON ON RESET OFF OFF ON ON OFF OFF ON SET RESET OFF OFF OFF ON 100MQ ON ON OFF OFF O
38. RES 100 1 100MW THICK FILM 0805 R 418 100 R188 RES 49 9 1 125mW METAL FILM 1206 R 391 49 9 R189 RES 3 01K 1 125MW METAL FILM 1206 R 391 3 01K R192 RES 6 98K 1 125MW METAL FILM 1206 R 391 6 98K R194 RESISTOR METAL FILM R 443 7 06K R195 RESISTOR METAL FILM R 443 70 6K R196 RES 2 21K 1 100MW THICK FILM 0805 R 418 2 21K R200 190 165 182 111 284 296 RES 1 1OOMW THICK FILM 0805 R 418 1K R201 204 223 229 231 233 206 RES 4 75K 1 1000MW THICK FILM 0805 R 418 4 75K R202 263 249 224 319 RES 10K 1 100MW THICK FILM 0805 R 418 10K R205 RES 10 5 1 8W METAL FILM R 246 10 R215 RES 4 42K 1 125MW METAL FILM 1206 R 391 4 42K R216 RES 2 21K 1 125mW METAL FILM 1206 R 391 2 21K 4 8 Replaceable Parts Table 4 3 cont Model 2000 motherboard parts list Circuit desig Description Keithley part no R220 221 264 212 217 RES 2 21K 1 100MW THICK FILM 0805 R 418 2 21K R225 RES 470 596 125MW METAL FILM 1206 R 375 470 R226 228 235 237 250 252 255 RES 475 1 100MW THICK FILM 0805 R 418 475 R234 RES 5 11K 1 100MW THICK FILM 0805 R 418 5 11K R238 244 254 293 RES 4 75K 1 100MW THICK FILM 0805 R 418 4 75K R241 RES 34K 1 100MW THICK FILM 0805 R 418 34K R243 259 RES 10 10 100MW THICK FILM 0805 R 418 10 R245 RES 475 1 1OOMW THICK FILM 0805 R 418 475 R246 RES 82 5 1 100MW THICK FILM 0805 R 418 82 5 R261 RES 200 1 1OOMW
39. RST Auto Zero off Auto Range off Display off sample count 1024 2 NPLC 0 01 DETector BANDwidth 300 4 10 channel card specification See individual card specifications for options other than 10 channel card TRIGGERING AND MEMORY READING HOLD SENSITIVITY 0 01 0 1 1 or 10 of reading TRIGGER DELAY 0 to 99 hrs 1ms step size EXTERNAL TRIGGER LATENCY 20015 lt 300us jitter with autozero off trigger delay 0 MEMORY 1024 readings MATH FUNCTIONS Rel Min Max Average StdDev of stored reading dB dBm Limit Test and mX b with user defined units displayed dBm REFERENCE RESISTANCES 1 to 9999Q in 1Q increments STANDARD PROGRAMMING LANGUAGES SCPI Standard Commands for Programmable Instruments Keithley 196 199 Fluke 8840A Fluke 8842A REMOTE INTERFACE GPIB IEEE 488 1 IEEE 488 2 and RS 232C GENERAL POWER SUPPLY 100V 120V 220V 240V 10 LINE FREQUENCY 45Hz to 66Hz and 360Hz to 440Hz automatically sensed at power up POWER CONSUMPTION 22 VA OPERATING ENVIRONMENT Specified for 0 C to 50 C Specified to 80 R H at 35 C STORAGE ENVIRONMENT 40 C to 70 C WARRANTY 3 years EMC Complies with European Union Directive 89 336 EEC EN61326 1 SAFETY Conforms to European Union Directive 73 23 EEC EN61010 1 CAT II VIBRATION MIL PRF 28800F Class 3 Random WARMUP 1 hour to rated accuracy DIMENSIONS Rack Mounting 89mm high x 213mm
40. avoid damaging them CAUTION Many CMOS devices are installed in the Model 2000 Handle all semicon ductor devices as static sensitive Only transport and handle ICs in containers specially designed to prevent static build up Typically you receive these parts in anti static containers made of plastic or foam Keep these devices in their original containers until ready for installation Remove the devices from their protective containers only at a properly grounded work station Also ground yourself with a suitable wrist strap Handle the devices only by the body do not touch the pins Also ground any printed circuit board into which a semiconductor device is to be insert ed to the bench or table Only use anti static type solder sucker Only use grounded tip solder irons Once the device is installed in the PC board it is normally adequately protected and you can handle the boards normally Assembly drawings Use the following assembly drawings to assist you as you disassemble and re assemble the Model 2000 Also refer to these drawings for information about the Keithley part numbers of most mechanical parts in the unit The drawings are located at the end of this section of the man ual Front Panel Assembly 2000 040 Chassis Transformer Power Module Assembly 2000 050 Front Panel Chassis Assembly 2000 051 Chassis Assembly 2000 052 Disassembly 3 5 Case cover removal If yo
41. grasp the AMP wire near fuse housing Push the wire for ward and down to snap the spring out of the fuse housing Carefully pull the spring and contact tip out of housing During re assembly use the following table to identify input terminals Front wire color Rear wire color INPUT HI Red White Red INPUT LO Black White Black SENSE HI Yellow White Yellow SENSE LO Gray White Gray AMPS White 4 Unplug cables C Unplug the display board ribbon cable from connector J1014 D Unplug the transformer cables from connectors J1016 and J1015 E Unplug the scanner board ribbon cable from connector J1017 5 Remove fastening screw that secures the main PC board to the chassis This screw is located along the left side of the unit towards the rear It also holds down U144 During re assembly replace the board and start the IEEE 488 and RS 232 connector nuts and the mounting screw Tighten all the fasteners once they are all in place and the board is correctly aligned 6 Remove the motherboard which is held in place by edge guides on each side by sliding it forward until the board edges clear the guides Carefully pull the mother board from the chassis 3 8 Disassembly Front panel disassembly Use the following procedures to remove the display board and or the pushbutton switch pad NOTE You must first remove the case cover the front rear input switch and the front input terminal wires as described in earlier in this sec
42. is applied to R195 and since Q124 is on 13 3V appears on the other end of R195 The voltage across R195 70 6KQ is 0 7V 10 therefore flows through R195 0126 0119 114 0120 LOWOHM control line low The current labeled OHM then flows through R304 U107 VR106 and VR105 to LO This is again the clamping circuit described in test 301 2 12 4V reference is routed through Q104 to BUFCOM and on to the A D MUX with a gain of 1 Measure 12 4V at AD_IN Bit patterns Bit pattern Q Q Q Q Q Q Q Q Register 87654321 U106 87654321 0109 87654321 0134 87654321 0121 110 1111 00101111 0v01001v U130 10111101 01100100 ACDC STB MUX STB IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 Q3 6 02 5 1 4 Test 304 1 INPUT 100 Troubleshooting 2 39 Bank DC OHM Inputs Open Expected Value 7 volts Limits 0 7 volts Fault Message INP SIG 100 Description The ohms circuit current is set up the same as test 303 1 current flows into the OHM node but instead of flowing into the clamping circuit it flows through K101 RESETK2 control line high through 0102 0101 R117 and Q114 to LO Resistor R117 is a 100 to 1 divider Therefore 0 07V 7V 100 is seen at the SIG 100 node 0108 is turned on to switch the 0 07V through 0113 BUFCOM to the A D MUX which is configured for x100 gain Measure 7V at AD IN
43. out of the metal case NOTE Ifyou need to gain access to the components under the motherboard shield to trou bleshoot them remove the shield It is secured to the motherboard by a single screw 3 6 Routine M aintenance Changing trigger link lines The Model 2000 uses two lines of the Trigger Link rear panel connector as External Trigger EXT TRIG input and Voltmeter Complete VMC output At the factory line 1 is configured WARNING Figure 3 1 Trigger link line connections as VMC and line 2 as EXT TRIG NOTE Line 1 or 5 of the Trigger Link can be configured as VMC while line 2 4 or 6 can be configured as EXT TRIG Trigger link line configurations are changed by moving the position of resistors inside the unit Perform the following steps to change trigger link lines Make sure the instrument is disconnected from the power line and other equipment before performing the following procedure 1 Remove the cover from the instrument as explained in Case Cover Removal The resistors used to select the trigger link lines are located next to the Trigger Link con nector as shown in Figure 3 1 The resistors are actually solder beads that bridge pc board pads If the factory default lines are selected the solder beads will be located at R270 line 2 EXT TRIG and R267 line 1 VMC 2 change a trigger link line A Usea soldering iron and solder sucker to remove the appropriate solder bead B U
44. path for U102 is from the minus input through U103 pins 6 and 7 to node ACFE The signal at ACFE is divided by 10 through R110 to make ACFE 10 The ACFE 10 signal bypasses U112 through U105 pin 8 set LO The signal is then coupled across C115 to U118 which is configured for x2 gain The output of U118 goes to U110 TRMS converter through the parallel combination of R129 C113 and C114 The output of the TRMS converter OUT is fed back through its own internal buffer The buffer output signal BUFF OUT is then labeled AC MED The AC MED signal is selected at U163 and fed to the A D buffer U166 through Q117 The A D buffer is set up for 1 gain through U129 x1 low This test is a setup phase for the next test Bit patterns Bit pattern Q Q Q Q Q Q Q Q R egister 87654321 87654321 87654321 87654321 U106 110v0011 U109 11011111 0134 1v01000v U130 10011101 U121 01110000 ACDC STB MUX STB IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 Troubleshooting 2 47 Test 402 2 NON INV 10 Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open 0 108 volts 0 02 volts NON INV 10 The previous test sets up the circuit for this test There is a routine in soft ware that generates a waveform for the ACV tests This is done by selecting the 13 3V reference by closing analog switch U133
45. procedures troubleshooting tables and circuit descriptions It is left to the discre tion of the repair technician to select the appropriate tests and documentation needed to trouble shoot the instrument This section is arranged as follows Repair considerations Covers some considerations that should be noted before mak ing any repairs to the Model 2000 Power on test Describes the tests that are performed on memory elements each time the instrument is turned on Front panel tests Provides the procedures to test the functionality of the front panel keys and the display Principles of operation Provides support documentation for the various troubleshoot ing tests and procedures Included is some basic circuit theory for the display board power supply digital circuitry and analog circuitry Display board checks Provides display board checks that can be made if front panel tests fail Power supply checks Provides power supply checks that can be made if the integrity of the power supply is questionable Digital circuitry checks Provides some basic checks for the digital circuitry Analog signal switching states Provides tables to check switching states of various relays FETs analog switches and the A D multiplexer for the basic measurement func tions and ranges Built in test overview Summarizes the built in tests which can be used to test and ex ercise the various digital and analog circuits Bui
46. 0111101 IC pins Q8 11 7 12 Q6 13 Q5 14 04 7 Q3 6 02 5 01 4 2 34 Troubleshooting Test 301 2 HI OHMS Bank Inputs Expected Value Limits DC OHM Open 12 4 volts 0 5 volts Fault Message 13 3 REFBOOT Description This test is the same as 301 1 except that the 13 3V ohms reference is tested The 13 3V reference is generated by the same circuit as the 7V ref erence 14V is routed through Q130 and then applied to a 1K 10K divider which is part of R271 The 13 3 divider output is routed through analog switch U133 7V control line low to op amp U123 The remainder of the path is the same as test 300 1 The expected voltage at AD IN would be 13 3V except that at the source lead of Q104 labeled SOURCE there is a clamping circuit Back to back 11V zener diodes VR105 and VR106 and photo coupler U107 clamp the voltage at the SOURCE node to about 12 4 Measure 12 4 at AD IN Bit patterns Bit pattern Q Q Q Q Q Q Q Q Register 87654321 U106 87654321 0109 87654321 0134 87654321 110 1111 00101111 0v01001v U130 10111101 U121 10000100 ACDC STB MUX STB IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 Q3 6 02 5 1 4 Test 302 1 2W SENSE Troubleshooting 2 35 Bank DC OHM Inputs Open Expected Value 7 volts Limits 0 7 volts Fault Message 2W SENSE 7V Description The 7V refere
47. 0v 01101000 U130 MUX STB 10111101 IC pins Q8 11 07 12 Q6 13 Q5 14 Q4 7 03 6 02 5 01 4 2 54 Troubleshooting TEST BANK AMP OHM Test 600 1 OHM AMP Bank AMP OHM Inputs INPUT HI to AMPS Short Expected Value 0 0095 volts Limits 0 001 volts Fault Message ImA SOURCE Description This test requires a jumper wire from the INPUT HI jack to the AMPS jack on the front panel The 7V reference is switched to the ohms circuit through 0133 0123 and 0125 are turned on to generate current that is routed to the INPUT HI jack The signal path for this current is from the 14V node through R194 0125 0119 0120 K101 pins 3 to 4 0102 Q101 through the parallel combination of R115 L109 and R324 then to the INPUT HI jack The jumper wire then routes the into the AMPS jack through K103 SETK3 control line high so that pins 3 to 4 and 7 to 8 are closed This puts R205 in series with R158 for a total of 10 10 current through 10 10 generates around 10mV which is sensed through S101 and R142 to the AMPSHUNT node The AMPSHUNT signal is routed to S6 of U163 where it is switched to the A D MUX The A D MUX is configured for x1 gain Measure 10mV at AD IN Bit patterns Bit pattern Register Q 010 010 010 0 87654321 87654321 87654321 87654321 0106 0109 0134 0121 ACDC_STB 110 1111 00101111 1v10111v 10110010 U130 MUX STB 11101101 IC pins Q8 11 07
48. 130 MUX STB 10011101 IC pins Q8 11 7 12 Q6z13 5 14 04 7 Q3 6 02 5 01 4 2 44 Troubleshooting Test 401 2 INVERT PATH Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open 0 108 volts 0 02 volts INVERT PATH The previous test sets up the circuit for this test There is a routine in soft ware that generates a waveform for the ACV tests This is done by selecting the 13 3V reference by closing analog switch U133 7V control line low The reference is buffered by U123 is labeled REFBOOT The REFBOOT signal is switched into the front end through Q109 via U120 by toggling the HIOHM line This switching routine is done in firm ware Q114 and Q136 are turned ON conducting to ground by U120 DIV LO control line low The 100 leg of R117 acts as a pull up and pull down to clean up the switched signal REFBOOT The signal path continues through Q101 Q102 and K101 to ACIN The switched ACIN signal coupled across C105 is applied to the circuit de scribed in test 401 1 and the measurement is made The input signal switching stops while the A D takes the reading Signal switching continues after the reading is done There are delays before the reading is taken to ensure that the ACV section and filters have enough time to reach a charged full scale reading In this phase the switched signal can be traced through the circuit described in test 401 1
49. 135 lines Al thru 23 Check for stuck bits MPU address bus 6 U135 lines D1 thru D15 Check for stuck bits MPU data bus 7 U135 pin 44 14 7456MHz MPU clock 8 U159 pin 13 Pulse train during RS 232 I O RS 232 RX line 9 U159 pin 14 Pulse train during RS 232 I O RS 232 line 10 U158 pins 34 42 Pulse train during IEEE 488 I O IEEE 488 data bus 11 U158 pins 26 31 Pulses during IEEE 488 I O IEEE 488 command lines 12 U158 pin 24 Low with remote enabled IEEE 488 REN line 13 U158 pin 25 Low during interface clear IEEE 488 IFC line 14 U135 pin 84 Pulse train ADRXB 15 U135 pin 91 Pulse train ADTX 16 U135 pin 90 Pulse train ADCLK 17 U135 pin 89 Pulse train ADTS Troubleshooting 2 13 Analog signal switching states Tables 2 5 through 2 11 provide switching states of the various relays FETs and analog switches for the basic measurement functions and ranges These tables can be used to assist in tracing an analog signal from the input to the A D multiplexer Table 2 5 DCV signal switching Range 0101 0102 0114 0136 0109 K101 0113 0105 0104 0108 0121 100mV ON OFF OFF SET OFF OFF ON IV ON OFF OFF OFF SET OFF OFF ON OFF ION 10 ON OFF OFF SET OFF OFF ON OFF 100V OFF OFF ON OFF SET OFF OFF OFF ON 1000V OFF OFF OFF OFF OFF OFF ON ION K101 set states Pin 8 switched to
50. 200 2 REF MUX Inputs Open Expected Value 10 volts Limits 1 volt Fault Message AD X100 Description Same as test 200 1 except the A D MUX is configured for x100 gain x100 control line is low The gain path is through U129 pin 10 to 11 Resis tor network R271 is used to configure the x100 gain Measure 10V at AD IN Bit patterns Bit pattern R egister Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 110 1111 00101111 1v10000v 01110010 U130 MUX STB 10001011 pins Q8 11 07 12 Q6 13 05 14 Q4 7 03 6 02 5 01 4 2 30 Troubleshooting Test 201 1 A D MUX LO Bank REF MUX Inputs Open Expected Value 0 volts Limits 0 0001 volts Fault Message SENSE LO 0 Description Signal LO is routed through R181 and 0122 LOMUXA control line high into unity gain amp 0126 Signal LO is then routed to 57 of U163 The A1 and A2 bit pattern on 0163 connects S7 to the D output which then routes signal LO through Q117 to U166 The A D MUX 0166 is configured for x1 gain x1 control line low by closing U129 pin 2 to 3 Measure at AD IN Bit patterns Bit pattern R egister Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 0134 0121 ACDC_STB 110 1111 00101111 1v10000v 01110010 0130 MUX_STB 11011101 IC pins Q8 11 07 12 Q6 13 Q5 14 Q4 7 Q3 6 Q2 5 01 4
51. 61 9 J1008 CONN RIGHT ANGLE 24 PIN CS 501 J1014 CONN HEADER STRAIGHT SOLDER PIN CS 368 16 J1015 CONNECTOR HEADER CS 784 4 J1016 CONN MALE 5 PIN MOLEX 42491 CS 784 5 J1017 CONNECTOR HEADER STRAIGHT SOLDER CS 368 14 K102 101 RELAY MINATURE DPDT TQ2E L2 5V RL 155 K103 RELAY MINI SIGNAL REL RL 163 L101 103 102 104 FERRITE CHIP 600 OHM BLM32A07 1206 CH 62 L105 L106 FERRITE CHIP 600 OHM BLM32A07 1206 CH 62 L107 108 CHOKE CH 61 L109 CHOKE CH 63 22 LS101 BEEPER 5V 30MA BRT1209P 06 C EM 5 Q101 102 TRANS C CHAN MOSFET 2SK1412 TO 220ML TG 276 Q103 110 112 115 118 128 130 TRANS NPN MMBT3904 SOT 23 TG 238 Q104 109 113 114 117 120 126 TRANS CHANNEL JFET SNJ132199 SOT 23 TG 294 0119 TRANS P CHANNEL 7270 92 166 0116 111 129 TRANS PNP MMBT3906L SOT 23 TG 244 Q127 131 132 133 TRANS N MOSFET VN0605T SOT 23 TG 243 R101 102 RES 5 125MW METAL FILM 1206 R 375 1M R103 107 108 113 120 121 124 RES 24K 5 1W 200V THICK FILM 251 R 437 24K R104 105 RES 549K 1 1 4W METAL FILM R 315 549K R106 RES 11K 196 1 10W METAL FILM R 263 11K Replaceable Parts 4 7 Table 4 3 cont Model 2000 motherboard parts list Circuit desig Description Keithley part no R109 RES 1 1 125mW METAL FILM 1206 R 391 1K R110 133 RES NET 9K 1K MICRO DIVIDER TF 246 2 R114 RES 604 1 1000MW THICK FILM 0805 R 418 604 R115 RES 5K 1 WIREWOUND R 249 5K R117 RES 100K 9
52. 7 N KU 105 aa Ed J 1 E ind ES MODEL NEXT ASSEMBLY USED ON NOTE FOR FURTHER COMPONENT INFORMATION REFER TO THE 2000 PRODUCT STRUCTURE FETISTEN DIM ARE IN IN UNLESS OTHERWISE NOTED PALE 3 2 TITLE COMPONENT LAYOUT APPR WJK 2000 PANEL ARRAY DIM TOL IS Cree KEITHLEY INSTRUMENTS INC CLEVELAND OHIO 44139 Specifications 2000 6 1 2 Digit Multimeter DC CHARACTERISTICS CONDITIONS MED 1 PLC or SLOW 10 PLC or MED 1 PLC with filter of 10 ACCURACY ppm of reading ppm of range ppm parts per million e g 10 0 001 TEMPERATURE TEST CURRENT COEFFICIENT RESO OR BURDEN INPUT 24 HOUR 90 DAY 1 YEAR 0 18 C amp FUNCTION RANGE LUTION VOLTAGE 5 RESISTANCE 23 C 19 23 5 23 5 28 50 C Voltage 100 0000 mV 0 1 pV gt 10 60 30 30 40 35 50 35 2 6 1 000000 1 0 pV gt 10GQ 15 6 25 7 30 7 2 1 10 00000 10 pV gt 10GQ 15 4 20 5 30 5 2 1 100 0000 V 100 pV 10 1 15 6 30 6 45 6 5 1 1000 000 V 1mV 10 1 20 6 35 6 45 6 5 1 Resistance 5 100 0000 100 uQ 1 30 30 80 40 100 40 8 6 1 000000 1 1 20 6 80 10 100 10 8 1 10 00000 100 pA 20 6 80 10 100 10 8 1 100 0000 100 10 pA 20 6 80 10 100
53. ARITY OF 10VDC RANGE 2ppm of reading 1ppm of range DCV TEMPERATURE CONTINUITY DIODE TEST INPUT PROTECTION 1000V all ranges MAXIMUM 4W Q LEAD RESISTANCE 10 of range per lead for 1000 and 1kQ ranges 1kQ per lead for all other ranges DC CURRENT INPUT PROTECTION 3A 250V fuse SHUNT RESISTOR 0 10 for 1A and 100mA ranges 100 for 10mA range CONTINUITY THRESHOLD Adjustable 10 to 10000 AUTOZERO OFF ERROR Add 2ppm of range error 5uV for 10 min utes and 1 change OVERRANGE 120 of range except on 1000V and Diode 2ppm 10mA and 1A 10ppm 100mA 40ppm Speeds are for 60 Hz operation using factory default operating conditions RST Autorange off Display off Trigger delay 0 Speeds include measurement and binary data transfer out the GPIB Auto zero off 5 Sample count 1024 auto zero off 5 Auto zero off NPLC 0 01 7 Ohms 24 readings second 8 1 PLC 16 67ms 60Hz 20ms 50Hz 400Hz The frequency is automatically determined at power up For signal levels gt 500V add 0 02ppm V uncertainty for the portion exceeding 500V 10 Add 120ms for ohms Must have 1096 matching of lead resistance in Input HI and LO 12 For line frequency 0 1 13 For 1kQ unbalance in LO lead 14 Relative to calibration accuracy 15 Specifications are for 4 wire ohms For 2 wire ohms add 1Q additional uncertainty 16 For rear inputs add the following to Temperature Coefficient
54. C 967 U103 105 111 129 IC CMOS ANALOG SWITCH DG211DY SOIC IC 768 U104 IC MOSFET DRIVER TLP591B OC 877 Replaceable Parts 4 9 Table 4 3 cont Model 2000 motherboard parts list Circuit desig Description Keithley part no U106 109 121 130 134 IC 8 STAGE SHIFT STORE MC14094BD SOIC IC 772 U107 108 IC PHOTO DARLINGTON TRANS PS2506L 1 IC 911 U110 IC TRMS TO DC CONVERTER 637JR SOLIC IC 796 0112 J FET LF357M SOIC 1 966 0113 IC LTC1050CS8 SOIC IC 791 0114 ICM DUAL J FET OP AMP 28205 5010 IC 968 0116 DARLINGTON ARRAY ULN2003L SOIC IC 969 U117 145 IC VOLT COMPARATOR LM311M SOIC IC 776 10119 VOLTAGE REG 15V 500MA 79M15 IC 195 U120 131 115 IC QUAD COMPARATOR LM339D SOIC 1 774 0123 DUAL PICOAMP AD706JR SOIC IC 910 U124 5 REGULATOR 500mA 7805 IC 93 U125 IC POS VOLTAGE REG 15V 500MA 7815 IC 194 U126 IC OP AMP AD705JR SOIC IC 814 U133 IC CMOS ANAL SWITCH DG444DY SOIC IC 866 U135 IC 16BIT MICROPROCESSOR MC68306FC16 LSI 154 U136 IC SERIAL EPROM 24LC16B SOIC LSI 153 U137 166 IC HI SPEED BIFET OP AMP AD711JR SOIC IC 894 U138 132 INTEGRATED CIRCUIT OPA177GS SOIC IC 960 U139 IC DUAL BIPOLAR OP AMP LT1124C58 955 10141 PRECISION REFERENCE LM399 196 600A U142 IC OP AMP NE5534D SOIC IC 802 U144 IC LOW DROPOUT REGULATOR LM295T IC 962 U146 IC POS NAND GATES INVERT 74HCT14 SOIC IC 656 U147 164 IC
55. D IN Primary tests are on the resistor divider R189 R185 and R188 the MUX U163 and the signal path from the resistor divider Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 110 1111 00101111 1 10000 01110010 U130 MUX STB 11111100 IC pins Q8 11 7 12 Q6z13 Q5 14 04 7 Q3 6 02 5 01 4 2 28 Troubleshooting TEST BANK REF MUX Test 200 1 REFERENCE Bank REF MUX Inputs Open Expected Value 1 volt Limits 0 1 volts Fault Message IVREF AD X10 Description The 7V REFHI signal is routed through R189 and R185 which forms a 0 014 1 voltage divider with R188 The 0 1V result 0 014 x 7V 0 1 is then applied to 51 of 0163 The AO 1 and A2 bit pattern on U163 is set to connect the S1 signal 0 1V to the D output The signal is then routed through R159 Q117 and R166 to the non inverting input of op amp U166 A D 0166 is configured for x10 gain X10 control line is low turning on U129 analog switch pins 6 to 7 Feedback resistors R309 and R310 con figure the X10 gain Measure 1V at AD IN Bit patterns Bit pattern R egister Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 0134 0121 ACDC_STB 110 1111 00101111 1v10000v 01110010 U130 MUX STB 10000111 pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 Troubleshooting 2 29
56. ECTOR BOARD ASSEMBLY DRESS RIBBON CABLE UNDER BOTTOM TS 2 REQ D 4 TR WIRES IN LBS LTR ECA NO REVISION ENG DATE Add CA 219 3A 4 40x3 8PPH 1 2643 j ST 2010 1608 Was 2000 2506 F 21216 Update Note For Ribbon Cable ST 5 16 02 A 4 40x3 8PPH 4 CA 219 3A CABLE ASSEMBLY IN LBS 8LKWA 8 32SMNUT 2 REQ D CI2 USE T 7682 TR 299B IN LBS TO TIGHTEN NUT 2 REQ D TRANSFORMER SEE DETAIL A AND B FOR WIRING 2010 307A SUPPORT BRACKET 2000 050 CHASSIS POWER MODULE ASSY PART NO QTY DESCRIPTION 2000 050 CHASSIS POWER MODULE ASSY 2010 1608 CONNECTOR BOARD ASSEMBLY CA 219 3A CABLE ASSEMBLY CC 38 2 CABLE CLAMP 4 40x3 8PPH PHIL HEAD SCREW 2000 2000 052 Front Panel Chassis Ass y MODEL NEXT ASSEMBLY NEXT PROCESS STEP QTY TR 299B TRANSFORMER USED ON 00 NN L L SUPPORT BRACKET DO NOT SCALE THIS DRAWING UNLESS OTHERWISE 5 Chassis Transformer 5 FOCKWASHER ANG 31 DRN Mat ane LS Card Guide Assembly 8 32SMNUT 2 5 ALL NUT ei le Instruments Inc KEITHLEY ee ery areas XXX 005 FRAC 51 64 MATERIAL Se B 19 2000 051 63 FINISH D SURFACE 02 PC
57. M U156 and U157 and test its RAM U151 and U152 If one of these tests fails the instrument will lock up 2 4 Troubleshooting Front panel tests There are two front panel tests one to test the functionality of the front panel keys and one to test the display In the event of a test failure refer to Display Board Checks for details on trou bleshooting the display board KEY test The KEY test allows you to check the functionality of each front panel key Perform the fol lowing steps to run the KEY test 1 Press SHIFT and then TEST to access the self test options 2 Use the A or Y key to display TEST KEY 3 Press ENTER to start the test When a key is pressed the label name for that key is dis played to indicate that it is functioning properly When the key is released the message NO KEY PRESS is displayed 4 Pressing EXIT tests the EXIT key However the second consecutive press of EXIT aborts the test and returns the instrument to normal operation DISP test The display test allows you to verify that each pixel and annunciator in the vacuum fluores cent display is working properly Perform the following steps to run the display test 1 Press SHIFT and then TEST to access the self test options 2 Use the A or V key to display TEST DISP 3 Press ENTER to start the test There are four parts to the display test Each time ENTER 18 pressed the next part of the test sequence is selected The fou
58. N SET RESET OFF OFF ON K101 set states Pin 8 switched to Pin 7 Pin 3 switched to Pin 4 K102 reset states Pin 8 switched to Pin 9 Pin 3 switched to Pin 2 Table 2 8 04 signal switching Range 0101 0102 0114 0136 0109 K 101 0113 0105 0104 0108 Q121 1000 ON OFF OFF OFF SET ON OFF OFF OFF ON 1kQ ON ON OFF OFF OFF SET ON OFF OFF OFF ON 10kQ ON ON OFF OFF OFF SET ON OFF OFF OFF ON 100kQ ON ON OFF OFF OFF SET ON OFF OFF OFF ON ON ON OFF OFF OFF SET ON OFF OFF OFF ON 10M2 ON OFF OFF ON SET OFF ON OFF OFF ON 100MQ ON ON OFF OFF ON SET OFF ON OFF OFF ON K101 set states Pin 8 switched to Pin 7 Pin 3 switched to Pin 4 Troubleshooting 2 15 Table 2 9 02 04 reference switching U 133 U 133 Range IN IN Q123 0125 Q124 0126 Q120 1000 OFF ON ON ON OFF OFF 1 ON ON ON OFF ON 10kQ OFF OFF OFF ON ON 100kQ ON OFF OFF OFF ON ION OFF OFF 10 OFF 100 Table 2 10 DCA signal switching Range 103 10mA ON 100mA OFF OFF 3A OFF Table 2 11 ACA signal switching 0105 0105 0111 U105 0103 U103 pin 16 1 16
59. OT SET TO 120 FH 397 FUSE HOLDER 2000 2000 051 Front Panel Ch Me FU 38 4 FUSE Td AMP PULL FUSE HOLDER SECTION OUT _ ront Panel Chassis Ass y PM Ll POWER MODULE AND ROTATE HOLDER UNTIL PROPER D MODEL NEXT ASSEMBLY NEXT PROCESS STEP QTY VOLTAGE 15 SHOWN IN WINDOW ON BACK USED ON DIMENSIONAL TOLERANCES 6 3 x1 4PFH 2 PHIL FLAT HEAD SCREW DO NOT SCALE THIS DRAWING UNLESS OTHERWISE sPECIFIED DATE 1 21 94 SCALE PE TITLE Chassis Transformer 6 KEPNUT XX 015 ANG 51 DRN Mat FNC LS Power Module Assembly ei le Instruments Inc 2 CABLE CLAMP IKEITHLEY nro 44139 005 FRAC 51 64 MATERIAL 9 2000 050 2000 004 CRIMP ASSEMBLY 63 FINISH 6 32x1 4PPHSEM PHIL PAN HEAD SEMS SCREW SURFACE MAX Ps 4059026 in N DETAIL A IN SFORMER WIRES s IU GRN YEL WIRE DRESS TOWARDS CHASSIS BOTTOM KEEP AWAY FROM PUSHROD TO BE INSTALLED DETAIL B POWER MODULE TRANSFORMER WIRING CC 38 2 CABLE TIE DRESS WIRES NEXT KEPNUT Ser 2 Qo PIN 1 AA 2010 160B CONN
60. PAN HEAD SCREW SCANNER BOARD ASSEMBLY 4 40X1 4 PHIL FLAT HD UNDERCUT SR WRAP TO CHASSIS 4 40X5 16 PHILLIPS PAN HD SEMS MOTHER BOARD TO CHASSIS 6 32 KEP NUT SAFETY GROUND 6 32X1 PH PAN HD SEMS SCR FOR MOTHER BOARD SHIELD 6 32X1 4 PHIL PAN HD SEMS CARD GUIDE TO CHASSIS 6 32X1 4 PHILLIPS FLAT HD FOR REAR FOOT 8 32 SMALL NUT FOR TRANSFORMER MOUNTING 8 INTERNAL TOOTH LOCKWASHER FOR TRANSFORMER MOUNTING 2 56X5 8PPH 4 40 1 4 4 40X5 16PPHSEM 6 32KEPNUT 6 32 6 32X1 4PPHSEM 6 32X1 4PFH 8 32SMNUT SLKWA Table 4 4 cont Model 2000 mechanical parts list Replaceable Parts 4 11 Description K eithley part no BANANA JACK PUSH IN BLACK BJ 13 0 BANANA JACK PUSH IN RED BJ 13 2 BEZEL REAR 428 303D BRACKET REAR PANEL SCANNER COVER PLATE 2001 328C CABLE CLAMP FOR DISPLAY CABLE amp TR 299 WIRE CC 37 CABLE CLAMP TIE WRAP NYLON 4 LONG FOR FRONT REAR WIRES _ CC 38 2 CAPTIVE PANEL SCREW FOR BEZEL FA 232 1C CARD GUIDE SHIELD 2000 311A CHASSIS ASSEMBLY 2000 309D CONNECTOR HARDWARE KIT FOR IEEE CS 713 COVER 2000 307C DISPLAY LENS 2000 304A FASTENER FOR EARS FA 230 2B FOOT 428 319A FOOT EXTRUDED FE 22A FOOT RUBBER FE 6 FRONT PANEL OVERLAY 2000 303A FRONT PANEL PRINTED 2000 318B FRONT REAR SWITCH ROD 2001 322A FUSE HOLDER FOR PM 1 1 FH 35 1 FUSE 3A 250 FOR CURRENT INPUT JACK FU 99 1 FUSE 0 25A FOR FH 35 1 FU 96 4 JACK CURRENT INPUT 2001 312D LINE MODULE PM 1 1B LUG
61. THICK FILM 0805 R 418 200 R267 270 RES 0499 1 100MW THICK FILM 0805 R 418 0499 R271 RES NET SOIC TF 245 R273 274 RES 475 1 125mW METAL FILM 1206 R 391 475 R277 RES 66 5K 1 1OOMW THICK FILM 0805 R 418 66 5K R279 140 256 299 RES 1 100MW THICK FILM 0805 R 418 1K R280 294 RES 49 9 1 1OOMW THICK FILM 0805 R 418 49 9 R283 RES 470 5 125MW METAL FILM 1206 R 375 470 R287 RES 1 28M 1 1 8W METAL FILM R 176 1 28M R288 289 290 RES 1 100MW THICK FILM 0805 R 418 1K R291 292 RES 47 5K 1 1OOMW THICK FILM 0805 R 418 47 5K R295 118 175 276 282 316 RES 10K 1 100MW THICK FILM 0805 R 418 10K R297 278 281 RES 357 1 1OOMW THICK FILM 0805 R 418 357 R300 RES 2 15K 1 125MW THIN FILM 1206 R 423 2 15K R302 303 RES 499 1 1OOMW THICK FILM 0805 R 418 499 R304 RES 20K 1 1OOMW THICK FILM 0805 R 418 20K R309 RES 1K 1 1 1OW METAL FILM R 263 1K R310 RES 9 09K 1 1 10W METAL FILM R 263 9 09K R311 RES 392 1 100MW THICK FILM 0805 R 418 392 R312 313 RES 332K 1 100MW THICK FILM 0805 R 418 332K R315 RES 100K 1 1OOMW THICK FILM 0805 R 418 100K R317 320 RES 10 10 1OOMW THICK FILM 0805 R 418 10 R318 RES 73 2K 1 1OOMW THICK FILM 0805 R 418 73 2K R324 RES 2K 1 125mW METAL FILM 1206 R 391 2K S101 SWITCH PUSHBUTTON 8 POLE SW 468 TP102 103 104 105 106 CONN TEST POINT CS 553 10101 INTEGRATED CIRCUIT IC 846 U102 118 IC OP AMP TLE2081CD SOIC I
62. V F TO G CHG D 7 3NET TUE 2 FROM REV H TO J ADDED VRII2 ONE PRIMARY SIDE COMPONENTS SIDE 02 2 D D DEEG Qo gt 21011 C104 QOM M102 2 sa L PE U158 25 a 00000000004 o 4 P I ol ru N is 0103 1 wa E Se Du bd ol gt CR117 RE I c c 2000 162 REV 6 5 J1015 ES S Fe 2 d mii 2 Hii 5 0161 i m cw as 282 6060 e rs 2000 803412 D D s EN C C148 1000 Enea DE n c EN DEN C 237 234 C232 E CR102 8 pr mna Qa 8 E z caos CUDUUQUU00005 0106 R133 0112 dis t rJ 15 M107 a emn 0 0125 lo C O 00000000000000 Sd ed 7101 om 5 i x DES ES x n L 2l 00000000000 d 00000000000000 T M 108 Hjusiz4 0124 0135 50156 o gt 2 E O 5 d c 20000000000000 Borse 3 C228 V J a 5 00000007 ied use 66 P eee 5 lo 5 5 pu a 8 E Doe 0000000 R294 DOUUs esi d 68209 CR N lt 00000007 00000000 315 C183
63. al is routed through the DCV Divider Q114 and Q136 on to the DCV switch ing circuit AMPS input The ACA or DCA input signal is applied to the Current Shunt circuit which is made up of K103 R158 and R205 For 1OmADC range 10 10 R158 R205 is shunted across the in put Relay K103 is energized on to select the shunts For all other DCA ranges and all ACA ranges 0 1Q R158 is shunted across the input K103 off The ACA signal is then sent to the AC Switching amp Gain circuit while the DCA signal is rout ed directly to the A D MUX amp Gain circuit 2 10 Troubleshooting Signal switching Signal switching for DCV and OHMS is done by the DCV amp Ohms Switching circuit FETs 0113 0105 0104 0108 connect the DCV or ohms signal to the x1 buffer 0113 Tables 2 5 through 2 8 show the switching states of these FETs for the various DCV and OHMS ranges Note that the reference current for OHMS is generated by the Ohms I Source circuit For 4 wire ohms measurements SENSE LO is connected to the circuit by turning on Q121 Signal switching and gain for ACV FREQ and ACA is done by the AC Switching amp Gain circuit which is primarily made up of K102 U102 0103 0105 0112 0118 U111 and 0110 Tables 2 6 and 2 11 show the switching states for these AC signals Note that U111 is used for frequency adjustment The states of these analog switches vary from unit to unit Multiplexer and A D converter in
64. are circuit exercises that are used for subsequent tests Each Built In Test can be run manually After a test is manually run operation is frozen to allow the technician to troubleshoot the circuit Using Built In Test There are several ways to run the Built In Test including the following recommended se quence 1 Run the AUTO bit test see AUTO Testing and note the first lowest numbered test that has failed Always address the lowest numbered test failure first because that failure could cause subsequent tests to fail Familiarize yourself with the failed circuit See Built In Test Documentation for trou bleshooting information Be sure to read the documentation for the complete series For example if test 202 4 fails read the documentation for all 202 series tests Manually run the test that failed see MANUAL Testing Keep in mind that many of the pass fail type tests require that one or more circuit exercise tests be run first Using the manual step looping mode will freeze instrument operation after a test is run After manually running the test use the test documentation and your troubleshooting ex pertise to locate the problem After repairing the instrument start again at step 1 to check the integrity of the repair and to see if there are any other failures Troubleshooting Table 2 18 Built In Test summary Test Circuit tested Bank 100 A D 100 1 A D 100 2 A D 101 1 TestCal 101 2 TestCa
65. assis LTR ECA NO REVISION ENG DATE 070 0006 ON D 26432 2010 1106 Wes 2000 2506 ST 2 13 02 DI 21421 2010 1108 Was 2010 1106 ST 1 8 02 2000 319 STAKING FRONT PANEL REF 2000 318C F PANEL 72 2000 3038 OVERLAY E 42 STEP 2 3 O 2010 110H DISPLAY BOARD ASS Y Gler SNAP OF BOARD INTO FRONT PANEL 7 PME T O PLACE ON FRONT PANEL TABS Q se AND SLIDE TOWARDS OUTSIDE 2 EDGE OF PANEL p REF FRONT PANEL 2000 3104 CONDUCTIVE RUBBER SWITCH 5 2000 3048 DISPLAY LENS DO NOT REMOVE GREEN MASK FROM THE LENS USE T 7788 2000 2000 051 FP CHASSIS ASS Y M NEXT ASSEMBLY NEXT PR QTY PART NO TY DESCRIPTION 1 NEXT Asst E x STEP 0 2000 313 STAKING FRONT PANEL REF 2000 3180 2010 0H N DISPLAY BOARD ASSEMBLY DO NOT SCALE THIS DRAWING iu EOE CHEE n r DATE 0 94 5 2000 3038 OVERLAY FRONT PANEL ASSEMBLY OP6 2000 3048 DISPLAY LENS XX 015 ANG 51 DRN Mat L S 2000 3104 CONDUCTIVE RUBBER SWITCH ENTE JATERA X5 2001 37 2__ BOARD STOP KEITHLEY C ur XXX z 005 FRAC 1764 Ze P 2000 040 SURFACE MAX FINISH
66. ault Message Description Bit patterns A D Open lt none specified gt 100 counts SIGNAL NOISY This test has the identical setup as the 100 1 test Signal LO is connected to the A D circuit for ten readings and a min max comparison is done to en sure that all readings are within 100 counts of each other The test is to check for noise The failures are the same as in test 100 1 Primary checks should be the references and power supplies Secondary tests are the op amps of the integrator 0138 and 0137 gain op amp U142 and the zero cross comparator U145 Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 110v1111 00101111 1v10000v 01110010 U130 MUX_STB 11111101 pins Q8 11 Q7 12 Q6 13 Q5 14 Q4 7 Q3 6 02 5 Q1 4 Test 101 1 TESTCAL Expected Value Limits Inputs Description Bit patterns A D lt none specified gt lt none specified gt Open Troubleshooting 2 25 TESTCAL is a way to calibrate the unit with internal references so that the remaining tests can be displayed in the form of voltages Given that there are errors in the internal references and in the A D circuitry the voltages on the display of the unit may vary from the value that is measured at A D IN with a calibrated test meter The values on the display of the unit under test are values that are relati
67. before each use When installing equipment where access to the main power cord is restricted such as rack mounting a separate main input pow er disconnect device must be provided in close proximity to the equipment and within easy reach of the operator For maximum safety do not touch the product test cables or any other instruments while power is applied to the circuit under test ALWAYS remove power from the entire test system and discharge any capacitors before connecting or disconnecting ca 5 02 bles or jumpers installing removing switching cards or making internal changes such as installing or removing jumpers Do not touch any object that could provide a current path to the common side of the circuit under test or power line earth ground ways make measurements with dry hands while standing on a dry insulated surface capable of withstanding the voltage being measured The instrument and accessories must be used in accordance with its specifications and operating instructions or the safety of the equipment may be impaired Do not exceed the maximum signal levels of the instruments and accessories as defined in the specifications and operating in formation and as shown on the instrument or test fixture panels or switching card When fuses are used in a product replace with same type and rating for continued protection against fire hazard Chassis connections must only be used as shield connections for measuring c
68. beled AC MED The AC MED signal is selected at U163 and fed to the A D buffer U166 through Q117 The A D buffer is set up for 1 gain through U129 x1 low This test is a setup phase for the next test Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 011v0011 11011111 1v01000v 01110000 U130 MUX_STB 10011101 IC pins Q8 11 Q7 12 Q6 13 Q5 14 Q4 7 Q3 6 Q2 5 Q1 4 2 50 Troubleshooting Test 403 2 NON INV BEX2 Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open 1 08 volts 0 2 volts NON INV BEX2 The previous test sets up the circuit for this test There is a routine in soft ware that generates a waveform for the ACV tests This is done by selecting the 13 3V reference by closing analog switch U133 7V control line low The reference is buffered by U123 is labeled REFBOOT The REFBOOT signal is switched into the front end through Q109 via U120 by toggling the HIOHM line This switching routine is done in firm ware Q114 and Q136 are turned ON conducting to ground by U120 DIV LO control line low The 100k leg of R117 acts as a pull up and pull down to clean up the switched signal REFBOOT The signal path continues through Q101 Q102 and K101 to ACIN The switched ACIN signal coupled across C105 is applied to the circuit de scribed in test 403 1 and the m
69. ber displayed press ENTER Use the 4 p gt A or V key to display one of the following looping modes and press ENTER SINGLE Performs all the tests in the specified series The instrument displays the number of the test being run If a failure occurs the FAULT message appears and stays on for the remainder of the tests in the series This testing process automatically stops after the last test in the series is completed This test process can also be stopped by pressing EXIT When EXIT is pressed any test in process will be allowed to finish before aborting the testing process CONTINUOUS This looping mode continuously repeats all the tests in the specified series until the testing process is manually stopped If a failure occurs the FAULT message appears and stays on for the remainder of the tests in the series This test process can be stopped by pressing EXIT When EXIT is pressed any test in process will be allowed to finish before aborting the testing process STEP Used to perform one test at a time Each press of the ENTER key performs the displayed test If a failure occurs the FAULT message appears for that test The instrument automatically aborts the testing process after the last test in the series is run If you do not wish to run all the tests in the series simply press EXIT after the desired test is run After the tests are finished any failures are displayed With the FAILS message dis playe
70. bles 1 Routine Maintenance 1 3 2 Troubleshooting Power supply circuits neret Display bo rd checks ee eerte Power supply checks essere enne Digital circuitry checks eese ennt DCV signal switching entere tentant tnmen and FREQ signal switching Q2 signal switching eere enne signal switching esses eere nennen nennen 02704 reference switching esee DCA signal ACA signal SWITCHING iori eg nocti eee DCV signal multiplexing and gain esee ACV and ACA signal multiplexing and gain DCA signal multiplexing and gain eee Q2 signal multiplexing and gain sss signal multiplexing and Circuit section location for switching devices Built In Test summary sn nn nn enne Routine M aintenance 1 2 Routine M aintenance Introduction The information in this section deals with routine type maintenance that can be performed by the operator This information is arranged as follows Setting line voltage and replacing fuse Explains how to select the alternate power line voltage setting and how to replace a blown power line fuse Amps fuse replacement Explains how to replace blown curr
71. cations and operating limits and for ensuring that operators are adequately trained Operators use the product for its intended function They must be trained in electrical safety procedures and proper use of the instrument They must be protected from electric shock and contact with hazardous live circuits Maintenance personnel perform routine procedures on the product to keep it operating properly for example setting the line voltage or replacing consumable materials Maintenance procedures are described in the manual The procedures explicitly state if the operator may perform them Otherwise they should be performed only by service personnel Service personnel are trained to work on live circuits and perform safe installations and repairs of products Only properly trained service personnel may perform installation and service procedures Keithley products are designed for use with electrical signals that are rated Installation Category I and Installation Category as described in the International Electrotechnical Commission IEC Standard IEC 60664 Most measurement control and data T O signals are Installation Category I and must not be directly connected to mains voltage or to voltage sources with high tran sient over voltages Installation Category II connections require protection for high transient over voltages often associated with local AC mains connections Assume all measurement control and data I O connections are for connect
72. cted at U163 and fed to the A D buffer U166 through Q117 The A D buffer is set up for 1 gain through U129 x1 low This test is a setup phase for the next test Bit patterns Bit pattern Q Q Q Q Q Q Q Q Register 87654321 U106 87654321 0109 87654321 0134 87654321 0121 110 1111 10011111 1v01000v U130 10011101 01110000 ACDC STB MUX STB IC pins 08 11 07 12 6 13 5 14 04 7 Q3 6 02 5 1 4 Troubleshooting 2 41 Test 400 2 NON INV PATH Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open 5 6 volts 0 6 volts NON INV PATH The previous test sets up the circuit for this test There is a routine in soft ware that generates a waveform for the ACV tests This is done by selecting the 13 3V reference by closing analog switch U133 7V control line low The reference is buffered by U123 is labeled REFBOOT The REFBOOT signal is switched into the front end through Q109 via U120 by toggling the HIOHM line This switching routine is done in firm ware 0114 and 0136 are turned ON conducting to ground by 0120 DIV LO control line low The 100k leg of R117 acts as a pull up and pull down to clean up the switched signal REFBOOT The signal path continues through Q101 Q102 and K101 to ACIN The switched ACIN signal coupled across C105 is applied to the circuit de scribed in t
73. ction contains replacement parts information and component layout drawings for the Model 2000 Parts list The electrical parts lists for the Model 2000 are shown in Tables 4 1 to 4 3 For part numbers to the various mechanical parts and assemblies use the Miscellaneous parts list and the assem bly drawings provided at the end of Section 3 Ordering information To place an order or to obtain information concerning replacement parts contact your Kei thley representative or the factory see inside front cover for addresses When ordering parts be sure to include the following information Instrument model number Model 2000 Instrument serial number Part description Component designation if applicable Keithley part number Replaceable Parts 4 3 Factory service If the instrument is to be returned to Keithley Instruments for repair perform the following 1 Call the Repair Department at 1 800 552 1115 for a Return Material Authorization RMA number 2 Complete the service form at the back of this manual and include it with the instrument Carefully pack the instrument in the original packing carton 4 Write ATTENTION REPAIR DEPARTMENT and the RMA number on the shipping la bel Components layouts The component layouts are provided in the following pages Motherboard 2000 250 pages 1 and 2 Connector board 2000 250 pages 1 and 2 Display board 2000 250 pages 3 and 4 4 4 Replaceable
74. d use the 4 p gt or V key to scroll through the test numbers of the failures When finished use the EXIT key to back out of the test menu structure 2 22 Troubleshooting Built In Test documentation The following paragraphs provide a detailed description of each Built In Test Refer to Built In Test overview for basic information on how to use Built In Tests The following doc umentation is provided for each test Test Identification Includes test bank number and name Input Requirements Indicates the required state of the input terminals for the test Note that input requirements are displayed by the Model 2000 when Built In Test is run Expected Value and Limits Provides the measurement or reading value and limits that is expected for the test as explained in the Description Fault Message For pass fail type tests a message is provided to summarize the cause of the failure Description Provides a description of circuit being tested In general all components in the tested circuit could be the cause of a failure Bit Patterns Provides the logic states of key shift registers After a test is manually run you can check the registers for the correct logic levels NOTE The letter v in a bit pattern indicates a don t care condition Troubleshooting 2 23 TEST BANK A D Test 100 1 A D Bank Inputs A D Open 153661550 counts 1200000 counts NO A D COMM Expec
75. ding 100 mV 3Hz 333 ms 18 to to to SLOW 0 3 0 01 750V 500 kHz 2 us Frequency Notes 1 Specifications for squarewave inputs gt 10 of ACV range except 100mV range On 100mV range frequency must be gt 10Hz if voltage is 20mV 2 20 overrange on all ranges except 750V range TEMPERATURE CHARACTERISTICS 234 90 DAY 1 YEAR 23 C 5 ACCURACY Relative to Using5 TYPE RANGE RESOLUTION Reference Junction 2001 5 J 200to 760 C 0 001 C 0 5 0 65 K 200 to 1372 0 001 C 0 5 C 0 70 C T 200 to 400 C 0 001 C 0 5 C 0 68 C Temperature Notes 1 For temperatures 100 C add 0 1 C and gt 900 C add 0 3 C 2 Temperature can be displayed in C K or E 3 Accuracy based on ITS 90 4 Exclusive of thermocouple error 5 Specifications apply to channels 2 6 Add 0 06 C channel from channel 6 INTERNAL SCANNER SPEED MAXIMUM INTERNAL SCANNER RATES RANGE Channels s TRIGGER DELAY 0 2 WIRE 4 WIRE DCV 2 OHMS OHMS TEMPERATURE All 110 All 100 105 lt 10 0 33 All 60 TRIGGER DELAY AUTO 2 WIRE 4 WIRE DCV 2 OHMS OHMS TEMPERATURE 01V 105 18 1009 85 1000 29 AIL 60 1V 105 1 85 1kQ 29 10V 105 10KQ 42 10 0 22 1007 70 100 0 28 100 0 18 1000 V 70 1 0 8 1 0 7 10 0 5 10 0 5 100 0 3 100 0 3 Internal Scanner Speed Notes 1 Speeds are for 60Hz operation using factory default operating conditions
76. e 560 001 91 80 509 1320 21 Fax 91 80 509 1322 ITALY Viale San Gimignano 38 20146 Milano 02 48 39 16 01 Fax 02 48 30 22 74 JAPAN New Pier Takeshiba North Tower 13F 11 1 Kaigan 1 chome Minato ku Tokyo 105 0022 81 3 5733 7555 Fax 81 3 5733 7556 KOREA 2FL URI Building 2 14 Yangjae Dong Seocho Gu Seoul 137 888 82 2 574 7778 Fax 82 2 574 7838 NETHERLANDS Postbus 559 4200 AN Gorinchem 0183 635333 Fax 0183 630821 SWEDEN c o Regus Business Centre Frosundaviks All 15 4tr 169 70 Solna 08 509 04 679 Fax 08 655 26 10 SWITZERLAND Kriesbachstrasse 4 8600 Diibendorf 01 821 94 44 Fax 01 820 30 81 TAIWAN 1FL 85 Po Ai Street Hsinchu Taiwan R O C 886 3 572 9077 Fax 886 3 572 9031 4 02 Model 2000 Multimeter Repair M anual 1995 Keithley Instruments Inc All rights reserved Cleveland Ohio U S A Second Printing March 1997 Document Number 2000 902 01 Rev B Manual Print History The print history shown below lists the printing dates of all Revisions and Addenda created for this manual The Revision Level letter increases alphabetically as the manual undergoes sub sequent updates Addenda which are released between Revisions contain important change in formation that the user should incorporate immediately into the manual Addenda are numbered sequentially When a new Revision is created all Addenda associated with the previou
77. easurement is made The input signal switching stops while the A D takes the reading Signal switching continues after the reading is done There are delays before the reading is taken to ensure that the ACV section and filters have enough time to reach a charged full scale reading In this phase the switched signal can be traced through the circuit described in test 403 1 Measure 1 08V DC at A D_IN Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 011v0011 11011111 1v01000v 01110000 U130 MUX STB 10011101 IC pins Q8 11 7 12 Q6z13 5 14 04 7 Q3 6 02 5 01 4 Test 403 3 NON INV 2 Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open lt none specified gt lt none specified gt lt none gt Troubleshooting 2 51 This phase resets the circuit to a known state and turns the waveform sig nal off Subsequent tests require that the A D be in the normal operating mode Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 011v0011 11011111 1v01000v 01110000 U130 MUX STB 10011101 IC pins Q8 11 7 12 Q6 13 05 14 04 7 Q3 6 02 5 01 4 2 52 Troubleshooting TEST BANK SEN SE Test 500 1 4W SENSE Bank Inputs Expected Value Limits Fault Message
78. ent fuse Setting line voltage and replacing fuse A rear panel fuse located next to the AC receptacle in the power module protects the power line input of the instrument If the line voltage setting needs to be changed or the line fuse needs to be replaced perform the following steps WARNING Disconnect the line cord at the rear panel and remove all test leads connected to the instru ment front and rear before replacing the line fuse or changing the line voltage setting 1 Place the tip of a flat blade screwdriver into the power module by the fuse holder assem bly see Figure 1 1 Gently push in and to the left Release pressure on the assembly and its internal spring will push it out of the power module 2 Remove the fuse and replace it with the type listed in Table 1 1 CAUTION For continued protection against fire or instrument damage only replace fuse with the type and rating listed If the instrument repeatedly blows fuses locate and correct the cause of the trouble before replacing the fuse 3 Ifconfiguring the instrument for a different line voltage remove the line voltage selector from the assembly and rotate it to the proper position When the selector is installed into the fuse holder assembly the correct line voltage appears inverted in the window 4 Install the fuse holder assembly into the power module by pushing it in until it locks in place Routine Maintenance Figure 1 2 Model 2000 Power module
79. es an 18 bit address bus It also has parallel and serial ports for controlling various circuits For example the TXDA RXDB and TXDB lines are used for the RS 232 interface The MPU clock frequency of 14 7456MHz is controlled by crystal Y101 MPU RESET is performed momentarily through C241 on power up by the 5VD power supply Memory circuits ROMs 0156 and 0157 store the firmware code for instrument operation U157 stores the DO D7 bits of each data word and U156 stores the D8 D15 bits RAMS 0151 and 0152 provide temporary operating storage U152 stores the DO D7 bits of each data word and U151 stores the D8 D15 bits Semi permanent storage facilities include NVRAM 0136 This IC stores such information as instrument setup and calibration constants Data transmission from this device is done in a serial fashion RS 232 interface Serial data transmission and reception is performed by the TXDB and RXDB lines of the MPU U159 provides the necessary voltage level conversion for the RS 232 interface port IEEE 488 interface U158 U160 and U161 make up the IEEE 488 interface U158 a 9914A GPIA takes care of routine bus overhead such as handshaking while U160 and 0161 provide the necessary buffer ing and drive capabilities Trigger circuits Buffering for Trigger Link input and output is performed by U146 Trigger input and output is controlled by the IRQ4 and PB3 lines of the MPU U164 provides additional logic for the
80. est 400 1 and the measurement is made The input signal switching stops while the A D takes the reading Signal switching continues after the reading is done There are delays before the reading is taken to ensure that the ACV section and filters have enough time to reach a charged full scale reading In this phase the switched signal can be traced through the circuit described in test 400 1 Measure 5 6 volts DC at A D_IN Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 110 1111 10011111 1v01000v 01110000 U130 MUX STB 10011101 IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 2 42 Troubleshooting Test 400 3 NON INV PATH Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open lt none specified gt lt none specified gt lt none gt This phase resets the circuit to a known state and turns the waveform sig nal off Subsequent tests require that the A D be in the normal operating mode Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 101 0001 10011111 1v01000v 01110000 U130 MUX_STB 10011101 IC pins Q8 11 Q7 12 Q6 13 Q5 14 Q4 7 Q3 6 02 5 01 4 Troubleshooting 2 43 Test 401 1 INVERT PATH Bank Inputs Expected Value Limits Fault Message
81. ing PC board traces with body oil or other foreign matter avoid touching the PC board traces while you are repairing the instrument Motherboard areas covered by the shield have high impedance devices or sensitive circuitry where contamination could cause de graded performance Handling PC boards Observe the following precautions when handling PC boards Wear cotton gloves Only handle PC boards by the edges and shields Do not touch any board traces or components not associated with repair Do not touch areas adjacent to electrical contacts Use dry nitrogen gas to clean dust off PC boards Solder repairs Observe the following precautions when you must solder a circuit board Use an OA based organic activated flux and take care not to spread the flux to other areas of the circuit board Remove the flux from the work area when you have finished the repair by using pure wa ter with clean foam tipped swabs or a clean soft brush Once you have removed the flux only swab the repair area with methanol then blow dry the board with dry nitrogen gas After cleaning allow the board to dry in a 50 C low humidity environment for several hours 3 4 Disassembly Static sensitive devices CMOS devices operate at very high impedance levels for low power levels Therefore any static that builds up on you or your clothing may be sufficient to destroy these devices if they are not handled properly Use the following precautions to
82. ion to Category I sourc es unless otherwise marked or described in the Manual Exercise extreme caution when a shock hazard is present Lethal voltage may be present on cable connector jacks or test fixtures The American National Standards Institute ANSI states that a shock hazard exists when voltage levels greater than 30V RMS 42 4V peak or 60VDC are present A good safety practice is to expect that hazardous voltage is present in any unknown circuit before measuring Operators of this product must be protected from electric shock at all times The responsible body must ensure that operators are prevented access and or insulated from every connection point In some cases connections must be exposed to potential human contact Product operators in these circumstances must be trained to protect themselves from the risk of electric shock If the circuit is capable of operating at or above 1000 volts no conductive part of the circuit may be exposed Do not connect switching cards directly to unlimited power circuits They are intended to be used with impedance limited sourc es NEVER connect switching cards directly to AC mains When connecting sources to switching cards install protective de vices to limit fault current and voltage to the card Before operating an instrument make sure the line cord is connected to a properly grounded power receptacle Inspect the con necting cables test leads and jumpers for possible wear cracks or breaks
83. ions explained in the paragraph entitled Static sensitive devices p Using an appropriate chip extractor remove U156 and U157 from its chip carrier 4 Position the new U156 EPROM on the appropriate chip carrier Make sure the notched corner of the chip is aligned with the notch in the chip carrier 5 With the EPROM properly positioned push down on the chip until it completely seats into the chip carrier 6 Repeat steps 4 and 5 for EPROM U157 3 10 Disassembly Removing power components The following procedures to remove the power transformer and or power module require that the case cover and motherboard be removed as previously explained Power transformer removal Perform the following steps to remove the power transformer 1 Remove motherboard 2 Unplug the transformer wires that attach to the power module at the rear panel During re assembly use drawing 2000 050 as a reference and replace the wires as fol lows Top wire Gray Right top Violet Right bottom White Left top Red Left bottom Blue 3 Remove the two nuts that secure the transformer to the bottom of the chassis 4 Pull the black ground wire off the threaded stud and remove the power transformer from the chassis WARNING To avoid electrical shock which could result in injury or death the black ground wire of the transformer must be connected to chassis ground When installing the power transformer be sure to re connect the black ground w
84. ircuits NOT as safety earth ground connections If you are using a test fixture keep the lid closed while power is applied to the device under test Safe operation requires the use of a lid interlock If or J 15 present connect it to safety earth ground using the wire recommended in the user documentation The PAS symbol on an instrument indicates that the user should refer to the operating instructions located in the manual The A symbol on an instrument shows that it can source or measure 1000 volts or more including the combined effect of normal and common mode voltages Use standard safety precautions to avoid personal contact with these voltages The WARNING heading in a manual explains dangers that might result in personal injury or death Always read the associated information very carefully before performing the indicated procedure The CAUTION heading in a manual explains hazards that could damage the instrument Such damage may invalidate the war ranty Instrumentation and accessories shall not be connected to humans Before performing any maintenance disconnect the line cord and all test cables To maintain protection from electric shock and fire replacement components in mains circuits including the power transformer test leads and input jacks must be purchased from Keithley Instruments Standard fuses with applicable national safety ap provals may be used if the rating and type are the same Other components that are
85. ire to the mounting stud on bottom of the chassis Disassembly 3 11 Power module removal Perform the following steps to remove the power module 1 Remove motherboard 2 Unplug the transformer wires that attach to the power module at the rear panel During re assembly use drawing 2000 050 as a reference and replace the wires as fol lows Top wire Gray Right top Violet Right bottom White Left top Red Left bottom Blue 3 Disconnect the power module s ground wire This green and yellow wire connects to a threaded stud on the chassis with a kep nut 4 Squeeze the latches on either side of the power module while pushing the module from the access hole WARNING To avoid electrical shock which could result in injury or death the ground wire of the power module must be connected to chassis ground When installing the power module be sure to re connect the green and yellow ground wire to the threaded stud on the chassis 3 12 Disassembly Instrument re assembly WARNING Re assemble the instrument by reversing the previous disassembly procedures Make sure that all parts are properly seated and secured and that all connections are properly made To en sure proper operation replace and securely fasten the shield To ensure continued protection against electrical shock verify that power line ground green and yellow wire attached to the power module and the power transformer ground black wire are connected to the ch
86. l 101 3 TestCal Bank 200 REF MUX 200 1 Reference 200 2 Reference 201 1 A D Mux Lo 201 2 A D Mux Lo Bank 300 DC OHM 300 1 Front End Lo 301 1 Hi Ohms 301 2 Hi Ohms 302 1 2W Sense 302 2 2W Sense 303 1 Lo Ohm Path 303 2 Lo Ohm Path 304 1 Input 100 Bank 400 VAC 400 1 Non Inv Path 400 2 Non Inv Path 400 3 Non Inv Path 401 1 Invert Path 401 2 Invert Path 401 3 Invert Path 402 1 Non Inv 10 402 2 Non Inv 10 402 3 Non Inv 10 403 1 Non Inv Bex2 403 2 Non Inv Bex2 403 3 Non Inv Bex2 Bank 500 SENSE 500 1 4W Sense 500 2 4W Sense Bank 600 AMP OHM 600 1 Ohm Amp 600 2 Ohm Amp 601 1 Amp Shunt 601 2 Amp Shunt 601 3 Amp Shunt 2 19 2 20 Troubleshooting AUTO testing 9 Press SHIFT and then TEST to access the self test options Use the or Y key to display TEST BUILT IN and press ENTER Use the or Y key to display BIT AUTO and press ENTER Use the lt p gt or Y key to display the bank of tests that you wish to run and press ENTER Test BANK selections include FULL Perform all tests A D Perform tests on A D converter REF MUX Perform tests on reference and multiplexer circuitry DC OHM Perform tests on DC and ohm circuitry VAC Perform tests on AC volts circuitry SENSE Perform tests on sense circuitry AMP OHM Perform tests amp and ohm circuitry Use the 4 p gt A or V key to display one of the following FAULT options PAUSE The tests will stop pa
87. ley part no CONTACT FUSE 2001 314B CRIMP CONTACT ROUND CS 760 HEAT SINK FOR U124 HS 41 SOCKET PLCC 032 T A FOR U156 157 SO 143 32 SPRING COMPRESSION SP 5 4 40X5 16 PHILLIPS PAN HD FOR IEEE CS TO BD 4 40 5 16 101 IC DUAL HIGH CMR SPEED OPTO HCPL 2631 IC 588 C101 160 163 174 180 186 207 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C102 CAP 01UF 10 1000V CERAMIC C 64 01 C104 CAP 100UF 20 63V ALUM ELEC C 403 100 C105 CAP 22UF 20 400V FILM C 513 22 C106 CAP 15P 1 100V CERAMIC 0805 C 512 15P C107 CAP 1UF 20 50V CERAMIC 1206 C 418 1 C109 CAP 2 2UF 20 63V POLYCARB C 480 2 2 112 248 01 5 50 1812 514 01 113 114 119 126 246 247 1000 10 100V CERAMIC 1206 C 451 1000P C115 CAP 33UF 20 63V POLYCARBONATE C 482 33 117 147 151 191 234 237 20 50V CERAMIC 1206 418 1 120 270 5 100V CERAMIC 0805 465 270 C121 132 134 140 CAP 220PF 1096 100V CERAMIC 1206 C 451 220P C123 245 1000 10 100V CERAMIC 1206 C 451 1000P C131 148 1000UF 20 50V ALUM ELEC C 469 1000 C135 203 198 183 187 197 249 CAP 1UF 1096 25V CERAMIC 0805 C 495 1 C137 33PF 5 100V CERAMIC 0805 C 465 33P C145 CAP 1000pF 2096 50V CERAMIC 1206 C 418 1000P C146 CAP 2200UF 20 16V ALUM ELEC C 473 2200 C153 111 225 122 118 155 116 CAP 1UF 10 25V CERAMIC 0805 C 495 1 C156 6800UF 20 100 16
88. lt in test documentation Provides a detailed analysis of each built in test Troubleshooting 2 3 Repair considerations Before making any repairs to the Model 2000 be sure to read the following considerations CAUTION The PC boards are built using surface mount techniques and require special ized equipment and skills for repair If you are not equipped and or qualified it is strongly recommended that you send the unit back to the factory for re pairs or limit repairs to the PC board replacement level Without proper equipment and training you could damage a PC board beyond repair 1 Repairs will require various degrees of disassembly However it is recommended that the Front Panel Tests and Built In Test be performed prior to any disassembly The dis assembly instructions for the Model 2000 are contained in Section 3 of this manual 2 Donot make repairs to surface mount PC boards unless equipped and qualified to do so see previous CAUTION 3 When working inside the unit and replacing parts be sure to adhere to the handling pre cautions and cleaning procedures explained in Section 3 4 Many CMOS devices are installed in the Model 2000 These static sensitive devices re quire special handling as explained in Section 3 5 Anytime a circuit board is removed or a component is replaced the Model 2000 must be recalibrated Power on test During the power on sequence the Model 2000 will perform a checksum test on its EPRO
89. ltiplexing scheme with each character refreshed in sequence U402 and U403 are the drivers for the display characters and annunciators Note that data for the drivers are serially transmitted from the microcontroller MOSI and PC1 Filament voltage for the display is derived from the power supply transformer F1 and F2 The display drivers require 37VDC and 5VDC which are supplied by 0144 5VD and 0101 237V 2 6 Troubleshooting Key matrix The front panel keys S401 S430 are organized into a row column matrix to minimize the number of microcontroller peripheral lines required to read the keyboard A key is read by strob ing the columns and reading all rows for each strobed column Key down data is interpreted by the display microcontroller and sent back to the main microprocessor using proprietary encod ing schemes Power supply The following information provides some basic circuit theory that can be used as an aid to troubleshoot the power supply A block diagram of the power supply is shown in Figure 2 1 Figure 2 1 8 CR104 5VD Power supply C128 C156 block diagram U144 O D Common 37V CR116 CR117 C104 C108 U101 OD Common Line Power Power p mge Transformer O 15V CR102 C131 C148 O A Common 0119 0125 15V 5V 5VRL O A Common AC power is applied to the AC power module receptacle J1009 Power is routed through the line fuse and line voltage selection s
90. nce is again switched to REFBOOT and routed through R272 0109 the 9 9MQ half of divider R117 the parallel combination of R115 R324 and L109 and then through R113 R107 R103 R108 and K101 At this point the reference is labeled 2WSEN I Reference 2WSEN I is then routed through K102 control line SETK1 high to the 2WSEN_O node This node then goes through Q105 2W control line high to 0113 BUFCOM and to the A D MUX with x1 gain Measure 7V at AD IN Bit patterns Bit pattern R egister Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 0134 0121 ACDC_STB 110 1111 00011111 0v10000v 10000010 U130 MUX STB 10111101 IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 2 36 Troubleshooting Test 302 2 2W SENSE Bank DC OHM Inputs Open Expected Value 12 4 volts Limits 0 5 volts Fault Message 2W SENSE 13V Description Same as test 302 1 except the 13 3V reference is used This voltage does not go through the ohms zener clamp path but is clipped by the A D circuit itself at about 12 4V due to the fact that 13 3V approaches the power supply limits of the op amps Measure 12 4V at AD_IN Bit patterns Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 0106 0109 0134 0121 ACDC_STB 110 1111 00011111 0v01000v 10000010 U130 MUX STB 10111101 IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 Te
91. not safety related may be purchased from other suppliers as long as they are equivalent to the original component Note that selected parts should be purchased only through Keithley Instruments to maintain accuracy and functionality of the product If you are unsure about the applicability of a replacement component call a Keithley Instruments office for information To clean an instrument use a damp cloth or mild water based cleaner Clean the exterior of the instrument only Do not apply cleaner directly to the instrument or allow liquids to enter or spill on the instrument Products that consist of a circuit board with no case or chassis e g data acquisition board for installation into a computer should never require cleaning if handled accord ing to instructions If the board becomes contaminated and operation is affected the board should be returned to the factory for proper cleaning servicing Table of Contents 1 Routine Maintenance Introd ctionma Setting line voltage and replacing fuse 2 terere perpe inge ssaeveuereanecses 2 Troubleshooting P Repair considerations eese eee enne loa E Front panel tests sect ete a Principles of operation nennen Display board checks nnaspan rient Power su
92. p amp is routed through U105 pin 1 low and coupled across C115 to U118 which is configured for x2 gain The output of U118 goes to U110 the TRMS converter through R129 and the parallel C113 and C114 U110 OUT pin 11 is feed through its own inter nal buffer pin 1 to 16 and the signal out is AC MED MED signal is se lected at U163 pin 6 to 8 and fed to A D buffer U166 through Q117 The A D buffer is set up for 1 gain through 0129 pin 3 to 2 with x1 low This test is the setup phase for the next test phase Troubleshooting 2 57 Bit patterns Bit pattern Register Q 0 87654321 87654321 87654321 87654321 17106 17109 0134 0121 ACDC_STB 110v0010 11011111 1 10110 10110000 U130 MUX STB 10011101 IC pins Q8 11 7 12 Q6z13 5 14 04 7 Q3 6 02 5 01 4 2 58 Troubleshooting Test 601 2 AMP SHUNT Bank Inputs Expected Value Limits Fault Message Description Bit patterns AMP OHM INPUT HI to AMPS Short 0 084 volts 0 02 volts AC AMP SHUNT The previous test sets up the circuit for this test There is a routine in soft ware that generates a waveform for the ACV tests This is done by selecting the 7V reference by closing analog switch U133 7V controlline low The reference is buffered by U123 Control line OHMA line is high turning Q123 and Q125 on which gener ates a ImA current source with R195 amp 0123 0119 and as
93. pply checks enne Digital circuitry checks essere enne Analog signal switching Built In Test overview 2 Built In Test documentation esee 3 Disassembly IDUO0G IBL u u Handling and cl aning teret tree rennen Static sensitive devices niente tepido tke ip Assembly Ura wit gs Case cover removal feo Changing trigger link Motherboard removal esses Front panel disassembly sese Main CPU firmware replacement esee Removing power components Instrument re assembly esee enne 4 Replaceable Parts Introduction xai i aste tre t ED UE E EUER CES Parts Ordering information Component layouts isa anan ng na A specifications List of Illustrations 1 Routine Maintenance 1 3 2 Troubleshooting Power supply block diagram eere Digital circuitry block diagram Analog circuitry block diagram 3 Disassembly Trigger link line connections en 3 6 List of Ta
94. ppm of reading uncertainty 10MQ 70ppm 100MQ 385ppm Operating environment specified for 0 to 50 C and 50 RH at 35 C Rev E HW 8 8 01 2000 6 1 2 Digit Multimeter TRUE RMS AC VOLTAGE AND CURRENT CHARACTERISTICS ACCURACY of reading of range 23 C 5 C VOLTAGE CALIBRATION 3 Hz RANGE RESOLUTION CYCLE 10 Hz 100 0000 mV 01 pV 1 000000 V 1 0 90 Days 0 35 0 03 10 00000 V 10 100 0000 V 100 1 Year 0 35 0 03 750 000 V 1mV TEMPERATURE COEFFICIENT c 0 085 0 008 0 005 0 003 CURRENT CALIBRATION 3Hz RANGE RESOLUTION CYCLE 10Hz 1 000000 A I pA 90 Day 1 Year 0 30 0 04 3 00000 10 pA 90 Day 1 Year 0 35 0 06 TEMPERATURE COEEEICIENT Cs 0085 0 006 0 015 0 006 HIGH CREST FACTOR ADDITIONAL ERROR of reading 7 CREST FACTOR 1 2 2 3 3 4 4 5 ADDITIONAL ERROR 0 05 0 15 0 30 0 40 AC OPERATING CHARACTERISTICS FUNCTION DIGITS READINGS s RATE BANDWIDTH ACV all ranges and 6153 2s reading SLOW 3 Hz 300 kHz ACI all ranges 6153 14 30 Hz 300 kHz 6 4 48 MED 30 Hz 300 kHz 6153 2 2 FAST 300 Hz 300 kHz 64 35 FAST 300 Hz 300 kHz ADDITIONAL LOW FREQUENCY ERRORS of reading SLOW MED FAST 20Hz 30Hz 0 0 3 30Hz 50Hz 0 0 50Hz 100Hz 0 0 1 0 100Hz 200Hz 0 0 0 18 200Hz 300Hz 0 0 0 10 gt 3002 0 0 0 20 kHz 50 kHz 100 kHz 50 kHz 100 kHz 300 kHz 0 11 0 05 0 60 0 08 440 5 0 12 0 05 0 60 0 08 440 5 0 006 0 005 0 01 0 006 0 03 0 01
95. put signals except FREQ are routed to the A D amp Gain circuit The multiplexer U163 switches the various signals for measurement In addition to the input signal the multi plexer also switches among reference and zero signals at various phases of the measurement cycle When the input signal is selected by the MUX it is amplified by 0132 and U166 Tables 2 12 through 2 16 identify the input signal lines S3 S4 S6 or S7 of the multiplexer for the var ious functions and ranges These tables also provide the switch states of U129 which determine the gain for U132 and U166 The multiplexed signals of the measurement cycle are routed to the A D Converter U165 where it converts the analog signals to digital form The digital signals are then routed through an opto isolator to the MPU to calculate a reading Troubleshooting 2 11 Display board checks If the front panel DISP test indicates that there is a problem on the display board use Table 2 2 See Principles of Operation for display circuit theory Table 2 2 Display board checks Step Required condition Remarks 1 Front panel DISP test Verify that all pixels operate Use front panel display test 2 P1005 pin 5 5 5 Digital 5V supply D P1005 pin 9 37 5 Display 37V supply 4 U401 pin 1 Goes low briefly on power up Microcontroller RESET then goes low 5 U401 pin 43 4MHz square wave Controller 4MHz clock
96. r parts of the test se quence are as follows A Allannunciators are displayed B The pixels of each digit are sequentially displayed C The 12 digits and annunciators are sequentially displayed D The annunciators located at either end of the display are sequentially displayed 4 When finished abort the display test by pressing EXIT The instrument returns to normal operation Troubleshooting 2 5 Principles of operation The following information is provided to support the troubleshooting tests and procedures covered in this section of the manual Refer to the following block diagrams Block Diagrams Figure 2 1 Power supply block diagram Figure 2 2 Digital circuitry block diagram Figure 2 3 Analog circuitry block diagram Display board Microcontroller 0401 is the display board microcontroller that controls the display and interprets key data The microcontroller uses three internal peripheral I O ports for the various control and read functions Display data is serially transmitted to the microcontroller from the digital section via the TXB line to the microcontroller RDI terminal In a similar manner key data is serially sent back to the digital section through the RXB line via The 4MHz clock for the microcontroller is generated by crystal Y401 Display DS401 is the display module which can display up to 12 alpha numeric characters and the various annunciators The display uses a common mu
97. s Revision of the manual are incorporated into the new Revision of the manual Each new Revision includes a revised copy of this print history page Revision A Document Number 2000 902 01 222 42 2 2 1 0 0 00000000000000000 May 1995 Revision B Document Number 2000 902 01 enne March 1997 Keithley product names are trademarks or registered trademarks of Keithley Instruments Inc Other brand names are trademarks or registered trademarks of their respective holders KERESI Safety Precautions The following safety precautions should be observed before using this product and any associated instrumentation Although some instruments and accessories would normally be used with non hazardous voltages there are situations where hazardous conditions may be present This product is intended for use by qualified personnel who recognize shock hazards and are familiar with the safety precautions required to avoid possible injury Read and follow all installation operation and maintenance information carefully before us ing the product Refer to the manual for complete product specifications If the product is used in a manner not specified the protection provided by the product may be impaired The types of product users are Responsible body is the individual or group responsible for the use and maintenance of equipment for ensuring that the equip ment is operated within its specifi
98. sig nal off Subsequent tests require that the A D be in the normal operating mode Bit patterns Bit pattern Register Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 0106 0109 0134 0121 ACDC23 101v0010 11011111 1v10110v 10110000 _STB U130 10011101 MUX STB IC pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 Disassembly 3 2 Disassembly Introduction This section explains how to handle clean and disassemble the Model 2000 Multimeter This section is organized as follows Handling and cleaning Describes how to properly handle clean and solder PC boards Static sensitive devices Explains how to handle ICs and CMOS devices Assembly drawings Provides mechanical drawings to assist in the disassembly and re assembly of the Model 2000 Case cover removal Provides the procedure for removing the case to gain access to the internal components Motherboard removal Provides the procedure for removing the motherboard Front panel disassembly Provides the procedure for removing the display board and front panel switch pad Firmware replacement Provides the procedure for removing and replacing the Model 2000 firmware Removing power components Explains how to remove the power transformer and power module Instrument re assembly Provides general guidelines for re assembling the Model 2000 Disassembly 3 3 Handling and cleaning To avoid contaminat
99. singa solder with OA based flux apply a solder bead to the appropriate resistor location 3 Replace the cover on the instrument Trigger Link Lines Line 1 R267 Line 2 EXT TRIG R270 Line 3 VMC R266 Line 4 EXT TRIG R268 Line 5 VMC R265 Line 6 EXT TRIG R269 Mother Board View from top R270 R269 R268 R267 R265 R266 Factory Solder Bead Trigger Link Connector H Default Configured Rear Panel Disassembly 3 7 Motherboard removal Perform the following steps to remove the motherboard This procedure assumes that the case cover is already removed 1 Remove the IEEE 488 and RS 232 fasteners The IEEE 488 and the RS 232 connectors each have two nuts that secure the connectors to the rear panel Remove these nuts 2 Remove the front rear switch rod At the switch place the edge of a flat blade screw driver in the notch on the pushrod Gently twist the screw driver while pulling the rod from the shaft 3 Disconnect the front and rear input terminals You must disconnect these input terminal connections for both the front and rear inputs INPUT HI and LO SENSE HI and LO AMPS Remove all the connections except the front AMPS connection by pulling the wires off the pin connectors To remove the front panel AMPS input wire white first remove the AMPS fuse holder then use needle nose pliers to
100. sociated circuitry The LOWOHM control line of U133 is switched to toggle Q120 on and off to generate AC current to the OHM node This test current is then switched through K101 pin 4 to 3 Control line SETK2 is high and RESETK2 is low The test current goes through Q102 0101 the parallel combination of R115 L109 and R324 then to the INPUT HI jack The switched current signal is applied to the circuit described in the pre vious test and a measurement is made The input signal switching stops while the A D is taking the reading then continues when the measurement is com plete There are delays before the reading is taken to ensure that the ACV sec tion and filters have enough time to reach a charged stable reading For this test the switched signal can be traced through the circuit described in the pre vious test Measure 84mV DC at A D IN Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 ACDC_STB 101v0010 11011111 1v10110v 10110000 U130 MUX STB 10011101 IC pins Q8 11 7 12 Q6z13 5 14 04 7 Q3 6 02 5 01 4 Troubleshooting 2 59 Test 601 3 AMP SHUNT Bank AMP OHM Inputs INPUT HI to AMPS Short Expected Value lt none specified gt Limits lt none specified gt Fault Message lt none gt Description This phase resets the circuit to a known state and turns the waveform
101. st 303 1 LO OHM PATH Bank Inputs Expected Value Limits Fault Message Description Bit patterns DC OHM Open 7 volts 0 7 volts 7V SOURCE Troubleshooting 2 37 This test uses the ohms circuit The 7V reference is switched to REF BOOT by closing U133 7V line low Q123 and Q125 are turned on by set ting the OHMA control line high 14V is applied directly to R194 Since Q123 is on 7V appears on the other side of R194 As a result the voltage drop across R194 7 06kQ is 7V A current of ImA therefore flows through R194 0125 0119 CR114 Q120 JLOWOHM control line low The current labeled OHM then flows through R304 U107 VR106 and VR105 to LO The 7V reference is routed through 0104 to BUFCOM on to the A D with a gain of x1 Measure 7 at AD IN Bit pattern Q Q Q Q Q Q Q Q 87654321 87654321 87654321 87654321 U106 U109 U134 U121 110v1111 00101111 0v10011v 01100100 U130 10111101 R egister ACDC_STB MUX_STB IC pins Q8 11 Q7 12 Q6 13 Q5 14 Q4 7 Q3 6 Q2 5 01 4 2 38 Troubleshooting Test 303 2 LO OHM PATH Bank DC OHM Inputs Open Expected Value 12 4 volts Limits 0 5 volts Fault Message 13 3V SOURCE Description This test is similar to test 303 1 The 13 3V reference is switched to REF BOOT again by closing U133 pins 6 to 7 Q124 and Q126 are turned on by setting the OHMA control line low 14V
102. t none gt This phase resets the circuit to a known state and turns the waveform sig nal off Subsequent tests require that the A D be in the normal operating mode Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 110v0011 11011111 1v01000v 01110000 U130 MUX_STB 10011101 IC pins Q8 11 07 12 Q6 13 Q5 14 Q4 7 03 6 Q2 5 01 4 Troubleshooting 2 49 Test 403 1 NON INV BEX2 Bank Inputs Expected Value Limits Fault Message Description Bit patterns VAC Open lt none specified gt lt none specified gt lt none gt This test places the ACV front end in the non inverting configuration Logic levels for this configuration are as follows K102 SETK1 low RESETKI high U103 Pins 8 and 9 low U105 Pin 9 high The signal path is from ACIN through K102 to the plus input of U102 Re sistors R117 9 9MQ and R146 11 to form a 10 at the input The feedback path for U102 is from the minus input through U103 pins 6 and 7 to node ACFE The ACFE signal bypasses U112 through U103 pin 16 low The signal is then coupled across C115 to U118 which is configured for x2 gain The output of U118 goes to U110 TRMS converter through the parallel combination of R129 C113 and C114 The output of the TRMS converter OUT is fed back through its own internal buffer The buffer output signal BUFF OUT is then la
103. ted Value Limits Fault Message Description This A D test uses the default conditions of the ADC word and the ACDC word This sets up the front end of the instrument to a stable configuration The MUX word is applied to register U130 which sets lines AO Al and A2 of U163 high This bit pattern selects the S8 input which connects signal LO to the D output Signal LO is then connected to op amp U166 which is configured for x1 gain with feedback through mux switch U129 pin 2 to 3 Signal LO is then connected to the A D at A D_IN In the first tests the value is in the form of counts Signal LO is converted to counts in the A D and then compared to a zero by design value This test checks the functionality of the A D converter If the 100 series tests fail all other tests will be invalid Measure at A D IN Failures could be the A D MUX 0163 the A D buffer U132 and associated circuitry or almost any component in the A D section Primary checks should be the references and power supplies then the control circuit U165 Bit patterns Bit pattern Q Q Q Q Q Q Q Q Register 87654321 U106 87654321 U109 87654321 U134 87654321 0121 110 1111 00101111 1v10000v 0130 11111101 01110010 ACDC_STB MUX_STB IC pins Q8 11 07 12 Q6 13 Q5 14 Q4 7 Q3 6 02 5 01 4 2 24 Troubleshooting Test 100 2 A D Bank Inputs Expected Value Limits F
104. test 101 1 yields a value that is compared to a value by design for REFHI If this value is within the limits the REFHI reference which is 7 volts is considered acceptable Measure 7V at A D IN Failures could be the MUX U163 or the reference circuit U141 and the associated circuitry Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 110 1111 00101111 1 10000 01110010 U130 MUX STB 11001101 IC pins Q8 11 07 12 Q6 13 05 14 04 7 Q3 6 02 5 1 4 Test 101 3 TESTCAL Inputs Expected Value Limits Fault Message Description Bit patterns A D Open 1 03 volts 0 06 volts NO 1V AT A D Troubleshooting 2 27 This test uses the default conditions of the ADC word and the ACDC word This sets up the front end of the instrument to a stable configuration The MUX word sets shift register U130 to disable U163 by setting line EN low The EN line is also connected to pin 16 of U129 which closes the mux switch for pins 14 and 15 This connects the voltage between R189 and R185 around 1 03 volts to op amp U166 which is configured for x1 gain with feedback through U129 pin 2 to 3 The buffered value of the signal is then connected to the A D at A D IN A conversion is taken and compared to the calibration values in tests 101 1 and 101 2 and displayed as a voltage Measure 1 03V at A
105. tion Unplug the display board ribbon cable from connector J1014 Remove the front panel assembly Dm This assembly has four retaining clips that snap onto the chassis over four pem nut studs Two retaining clips are located on each side of the front panel Pull the retaining clips outward and at the same time pull the front panel assembly forward until it separates from the chassis 3 Using a thin bladed screw driver pry the plastic PC board stop located at the bottom of the display board until the bar separates from the casing Pull the display board from the front panel 4 Remove the switch pad by pulling it from the front panel Disassembly 3 9 Main CPU firmware replacement WARNING Changing the firmware may be necessary as upgrades become available The firmware revi sion level for the main CPU is displayed during the power on sequence The firmware for the main CPU is located in the EPROMs U156 EVEN and U157 ODD leadless ICs that resides in chip carriers on the PC board To replace the CPU firmware do the following Disconnect the instrument from the power lines and remove the test leads before changing the firmware 1 Remove the case cover as described earlier in this section 2 Locate 156 EVEN and 0157 ODD EPROMs on the main PC board They are the only devices installed in chip carriers sockets CAUTION 0156 and U157 are static sensitive devices Be sure to follow the handling precaut
106. trig ger input to minimize MPU control overhead At the factory trigger output is connected to line 1 of the Trigger Link connector resistor R267 installed Trigger input is connected to line 2 of the Trigger Link connector resistor R270 installed Troubleshooting 2 9 Analog circuitry Refer to Figure 2 3 for the following discussion on analog circuitry Figure 2 3 AMPS Analog circuitry block diagram Current Shunts K103 R158 R205 Gain K102 U102 U103 U105 U112 U118 U111 U110 AC Switching amp phere ieee atm 1 DCV amp Ohms AD z i INPUT 55 Switching X1 MUX amp Digital 1 0101 0102 101 0104 0105 Buffer Gain Circuitry 1 0108 0113 0115 9113 U 163 U 166 9 See Figure 2 2 1 U129 U132 Ohms 5 0133 0123 0125 0124 0126 0119 0120 0123 DCV Divider R117 Q109 Q114 Q136 DCV 100 SENSE HI SENSE X1 Buffer 0121 0126 Scanner O utput Scanner Scanner Scanner Control Inputs Solid State Protection INPUT HI INPUT HI protection is provided by the SSP solid state protection circuit The SSP is pri marily made up of Q101 and 0102 An overload condition opens 0101 and 0102 This discon nects the analog input signal from the rest of the analog circuit Note that for the 100VDC and 1000VDC ranges 0101 and 0102 of the SSP are open The DC voltage sign
107. u need to troubleshoot the instrument or replace a component you must gain access to the components by removing the case WARNING Before removing the case cover disconnect the line cord and any test leads from the instru ment 1 Remove Handle The handle serves as an adjustable tilt bail Adjust its position by gently pulling it away from the sides of the instrument case and swinging it up or down To remove the handle swing the handle below the bottom surface of the case and back until the orientation arrows on the handles line up with the orientation arrows on the mounting ears With the arrows lined up pull the ends of the handle from the case 2 Remove Mounting Ears Remove the screw that secures each mounting ear Pull down and out on each mounting ear NOTE When re installing the mounting ears make sure to mount the right ear to the right side of the chassis and the left ear to the left side of the chassis Each ear is marked RIGHT or LEFT on its inside surface 3 Remove Rear Bezel To remove the rear bezel loosen the two captive screws that se cure the rear bezel to the chassis Pull the bezel away from the case 4 Removing Grounding Screws Remove the two grounding screws that secure the case to the chassis They are located on the bottom of the case at the back 5 Remove Chassis To remove the case grasp the front bezel of the instrument and carefully slide the chassis forward Slide the chassis
108. up Batteries and fuses are Front panel operational ranges or functions are bad Checked all cables Display or output check one Drifts Unable to zero Unstable Overload Will not read applied input Calibration only Certificate of calibration required Data required attach any additional sheets as necessary Show a block diagram of your measurement including all instruments connected whether power is turned on or not Also describe signal source Where is the measurement being performed factory controlled laboratory out of doors etc What power line voltage is used Ambient temperature F Relative humidity Other Any additional information If special modifications have been made by the user please describe Be sure to include your name and phone number on this service form Specifications subject to change without notice All Keithley trademarks and trade names are the property of Keithley Instruments Inc All other trademarks and trade names are the property of their respective companies KEITHLEY Keithley Instruments Inc Sales Offices BELGIUM CHINA FINLAND FRANCE GERMANY GREAT BRITAIN INDIA ITALY JAPAN KOREA NETHERLANDS SWEDEN SWITZERLAND TAIWAN 28775 Aurora Road Cleveland Ohio 44139 440 248 0400 Fax 440 248 6168 1 888 KEITHLEY 534 8453 www keithley com Bergensesteenweg 709 B
109. use when a failure FAULT occurs CONT The tests will not stop continue when a failure occurs Press ENTER and go to step A or B A If the PAUSE fault option was selected the tests will start immediately The tests stop at a failure FAULT and displays the test number of the failure Press ENTER to continue the tests or press EXIT to abort the tests B Ifthe CONT fault option was selected use the A or Y key to display one of the following REPEAT options and press ENTER to start the tests NO Perform the specified tests and stop YES Continuously repeat the specified tests When a failure occurs the FAULT message will be displayed If the YES repeat option was selected use the EXIT key when ready to stop the tests After the tests are finished any failures are displayed With the FAILS message dis played use the lt p gt Aor Y key to scroll through the test numbers of the failures When finished use the EXIT key to back out of the test menu structure Troubleshooting 2 21 MANUAL testing eS Press SHIFT and then TEST to access the self test options Use the A or Y key to display TEST BUILT IN and press ENTER Use the A or Y key to display BIT MANUAL and press ENTER Use the lt and gt keys or the A and Y keys to display the desired test series number For example if you wish to run test 302 2 display the series 302 test number as shown MANUAL 302 With the desired test series num
110. ve to the internal references This test has the same set up as the 100 1 and 100 2 tests The A D makes a conversion of the signal zero and stores the value in the form of A D counts to be used in the next phase of the test There is no fault message for this test Measure OV at A D IN Bit pattern Register Q 010 010 010 Q 87654321 87654321 87654321 87654321 U106 0109 0134 0121 ACDC_STB 110 1111 00101111 1 10000 01110010 U130 MUX STB 11111101 pins Q8 11 07 12 Q6 13 Q5 14 04 7 03 6 02 5 01 4 2 26 Troubleshooting Test 101 2 TESTCAL Bank Inputs Expected Value Limits Fault Message Description Bit patterns A D Open 101 2 101 1 76275970 counts 1800000 NO 7V AT A D This A D test uses the default conditions of the ADC word and the ACDC word This sets up the front end of the instrument to a stable configuration The MUX word is applied to register U130 which sets the lines of U163 as follows AO and 1 low A2 high This bit pattern selects the 55 input which connects REFHI to the D output is then connected to op amp U166 which is configured for x1 gain with feedback through mux switch U129 pin 2 to 3 The buffered value of REFHI is then connected to the A D at A D IN A conversion is taken in the form of A D counts and compared to the value taken in test 101 1 The value in counts of test 101 2 minus the value in counts of
111. wide x 370mm deep 3 in x 8 in x 14 in Bench Configuration with handle and feet 104mm high x 238mm wide x 370mm deep 4 in x 9 in x 1416 in NET WEIGHT 2 9kg 6 3 Ibs SHIPPING WEIGHT 5kg 11 Ibs VOLT HERTZ PRODUCT lt 8 x 107V Hz Specifications are subject to change without notice Rev E HW 8 8 01 Index AMPS fuse replacement 1 4 Analog signal switching states 2 13 Assembly drawing 3 4 Built in Test documentation 2 22 Built in Test overvie Case cover removal 3 5 Changing trigger link lined 3 6 Components layouts 4 3 Digital circuitry 2 12 Disassembly 3 1 Display board check Factory servicd 4 3 Front panel disassembly 3 8 Front panel tests 2 4 Handling and cleaning 3 3 Instrument re assembl Main CPU firmware replacement 3 9 Motherboard removal 3 7 Ordering informatio Parts list 4 2 Power supply checkd 2 11 Power on 5 2 3 Principles of operation 2 5 Removing power components 3 10 Repair considerations Replaceable part Routine maintenance Setting line voltage and replacing fus Specification A 1 Static sensitive devices 3 4 Troubleshooting 2 1 Service Form Model No SeriaNo Dde List all control settings describe problem and check boxes that apply to problem Intermittent Analog output follows display Particular range or function bad specify IEEE failure Obvious problem on power
112. witch of the power module to the power transformer The power transformer has a total of four secondary windings for the various supplies AC voltage for the display filaments is taken from a power transformer secondary at F1 and F2 and then routed to the display board Each DC supply uses a bridge rectifier a capacitive filter arrangement and a regulator Table 2 1 summarizes rectifier filter and regulator circuits for the various supplies Troubleshooting Table 2 1 Power supply circuits Supply Rectifier Filter Regulator 5VD 104 128 156 0144 37V CR116 CR117 C104 C108 0101 15V CR102 C148 U125 15 102 U119 5V 5VRL CR103 C146 U124 Digital circuitry Refer to Figure 2 2 for the following discussion on digital circuitry ROM RAM ens 0156 0157 U151 U152 Figure 2 2 Digital circuitry block diagram JOE 1 XADTX ADTX Analog i Circuitry XADCLK ADCLK 68306 I XADTS ADTS uP 1 U135 See Figure 2 3 1 XADRX ADRXB EE 1 Scan Control TRIG IN Trigger U146 U164 Trigger Link 2 7 Display Board Displa CN Controller FES 2150 Sy 05401 0401 XTAL 101 IN RS 232 75232 0159 Port Data IN GPIB IEEE 488 Data OUT 4 158 U 160 0161 2 8 Troubleshooting Microprocessor 0135 is a 68306 microprocessor that oversees all operating aspects of the instrument The MPU has a 16 bit data bus and provid

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