DATASHEET Integrated Transceiver Modules for
Contents
1. 39 Moisture Sensitivity Level MSL eesseeeseeeeeeeeeeeeseseeene nennen nnne a nena nnne nnn tn insana sata anneanne nnn 39 LC c E E eee Eee 39 Repeating Reflow Soldering e eeeeeeeeieee eise eene eeeenn seen h nennt nnn than sna sa nnns sn tn na sana sa sna KEEN usan 40 c2 mie i ewi E 41 The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 5 of 53 27 LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET ABENUT STATEMENT O EEN 41 Federal Communication Commission Interference Statement eeeeeeee 41 Industry Canada Statements sneennennnenennnnnenennenenennnneennenennnnes 42 OEM RESPONSIBILITIES TO COMPLY WITH FCC AND INDUSTRY CANADA REGULATIONS m 43 OEM LABELING REQUIREMENTS FOR END PRODUCT nes 44 OEM END PRODUCT USER MANUAL STATEMENT S eese 45 EUROPE M A A Y Y O i 9 A 7 CEO 46 CE NOTICE m 46 Declaration of Conformity DOC ss isnnnnnnnnnnennnennnenennsneennnnennnnense 46 MECHANICAL DAL go T 47 TAPE AND HEEL SPECIFICATION tenggerkteekren2. VBAT BT FUNC5 WL UART DBG WLAN IRQ BT EN FM EN WL RS232 RX WL RS232 TX FM IDG FSYNC 1 WL EN DO 4mA 1 8 VDC HOST WU DIO 4mA 1 8 VDC WL UART DBG NW 1 8 VOC 1 8 VDC DO 4 mA WLAN Interrupt Request Di Bluetooth Enable 1 8 VOC 1 8 VDC 1 8 VDC EE 1 8 VDC NOT SUPPORTED CONNECT TO GND EN 1 8 VDC WLAN TEST UART RX DO 4mA 1 8 VDC WLAN TEST UART TX 4 mA 1 8 VDC NOT SUPPORTED NO CONNECT Bic 1 8 VDC WLAN Enable POWER SUPPLY FOR 1 8 VDC DIGITAL DOMAIN SDIO D3 DIO 1 8 VDC SDIO INTERFACE HOST PULL UP SDIO D2 DIO 1 8 VDC SDIO INTERFACE HOST PULL UP SDIO D1 DIO 1 8 VDC SDIO INTERFACE HOST PULL UP SDIO DO DIO 1 8 VDC SDIO INTERFACE HOST PULL UP SDIO CMD DIO 1 8 VDC HOST PULL UP SDIO CLK Di 1 8 VDC HOST PULL UP SLOW CLK EN 1 8 VDC SLEEP CLOCK 32 kHz FM IRQ DO 1 8 VDC NOT SUPPORTED NO CONNECT FM_SDA DO 1 8 VDC NOT SUPPORTED NO CONNECT FM SCL DO 1 8 VDC NOT SUPPORTED NO CONNECT 11 VIO 12 13 14 15 16 17 18 19 8 mA 8 mA 8 mA 8 mA 8 mA 4 mA 4 mA 4 mA Coup our o FM_l2S_CLK FM I2S DI FM DG DO FM AUD RIN FM AUD LIN FMRFOUT FMRFIN 4 mA 4 mA 4 mA 1 1 1 8 VDC 8 VDC 8 VDC NOT SUPPORTED NO CONNECT NOT SUPPORTED CONNECT TO NOT SUPPORTED NO CONNECT NOT SUPPORTED CONNECT TO NOT SUPPORTED CONNECT TO NOT SUPPORTED NO CONNECT NOT SUPPORTED CONNECT T
3. Contient IC 5969A TIWI101 L OEM du module TiWi BLE ne doit utiliser l antenne approuv e s ci dessus qui ont t certifi s avec ce module The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 44 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect OEM END PRODUCT USER MANUAL STATEMENTS The OEM integrator should not provide information to the end user regarding how to install or remove this RF module or change RF related parameters in the user manual of the end product The user manual for the end product must include the following information in a prominent location This device is granted for use in Mobile only configurations in which the antennas used for this transmitter must be installed to provide a separation distance of at least 20cm from all person and not be co located with any other transmitters except in accordance with FCC and Industry Canada multi transmitter product procedures Other user manual statements may apply L int grateur OEM ne devrait pas fournir des informations l utilisateur final en ce qui concerne la facon d installer ou de retirer ce module RF ou modifier les param tres RF connexes dans le manuel utilisateur du produit final Le manuel d utilisation pour le produit final doit comporter les informations suivantes dans unendroit bien en vue Ce dispositif est accord pour une uti
4. The information in this document is subject to change without notice Copyright 2011 2015 LSR 330 0087 R3 3 Page 49 of 53 27 LSR TiWi BLE TRANSCEIVER MODULE Design Create Certiy Cannan DATASHEET DEVICE MARKINGS Rev 1 Devices WL1271L WL1271BYFVR PG3 32 Front End TQM679002A y LS Research 44 TiWi BLE Code 01 XXXXXX Where 01 revision XXXXXX incremental serial number 2D Barcode Format is Data Matrix Standard Rev 2 Devices WL1271L WL1271BYFVR PG3 32 Front End TQM679002A e Changed PCB supplier y LS Research fA 4 TiWi BLE Code 02 XXXXXX Where 02 revision XXXXXX incremental serial number 2D Barcode Format is Data Matrix Standard The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 50 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Rev 3 Devices WL1271L WL1271BYFVR PG3 32 Front End TQM679002A e LSR logo changed from red to black e Improvements to prevent solder from wicking to bottom pad on module pin 48 e Switched the locations of the serial number and model name on the label LS RESEARCH N 4 3 XXXXXX 2D Bar Code Model TiWi BLE Where 3 Revision XXXXXX incremental serial number 2D Barcode Format is Data Matrix Standard Rev 4 Devices WL1271L WL1271BYFVR PG3 32 Front End TQM679002A e Improvements in the manufact
5. pour l int gration dans des produits uniquement par des int grateurs OEM dans les conditions suivantes Ce dispositif est accord pour une utilisation dans des configurations mobiles seul dans lequel les antennes utilis es pour cet metteur doit tre install pour fournir une distance de s paration d au moins 20cm de toute personne et ne pas tre colocalis s avec les autres metteurs sauf en conformit avec la FCC et de l Industrie Canada multi metteur proc dures produit Tant que les deux conditions pr cit es sont r unies les tests de transmetteurs suppl mentaires ne seront pas tenus Toutefois l int grateur OEM est toujours responsable de tester leur produit final pour toutes les exigences de conformit suppl mentaires requis avec ce module install par exemple les missions appareil num rique les exigences de p riph riques PC etc NOTE IMPORTANTE Dans le cas o ces conditions ne peuvent tre satisfaites pour certaines configurations ou de co implantation avec un autre metteur puis la FCC et Industrie autorisations Canada ne sont plus consid r s comme valides et l ID de la FCC et IC num ro de certification ne peut pas tre utilis sur la produit final Dans ces circonstances l int grateur OEM sera charg de r valuer le produit final y compris l metteur et l obtention d un distincte de la FCC et Industrie Canada l autorisation The information in this document is subject to ch
6. BLE Module Pin Descriptions All digital UO signals use 1 8V logic If the host microcontroller does not support 1 8V logic then level shifters MUST be used The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 9 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect BT FUNC 2 and BT FUNCS5 Pins When BT is awake and active BT WU BT FUNC2 is high from host to module This is an active high signal The host puts the BT section to sleep by de asserting logic low level the BT WU signal input to the module The module then drives HOST WU BT FUNCS low to acknowledge to the host that it is has been put into sleep mode Using these pins is optional BT FUNCA Pin The BT FUNCA BT UARTD pin is a debug pin It is a 1 8V logic UART TX line This pin should never need to be used in normal operation It may be useful to terminate this pin to a test point or header in case it is needed WL UART DBG Pin The WL UART DBG pin is a debug pin It is a 1 8V logic UART TX line This pin should never need to be used in normal operation It may be useful to terminate this pin to a test point or header in case it is needed WL RS232 RX and WL RS232 TX Pins These pins are used for a WLAN test mode interface Both pins are 1 8V logic level UART pins These pins should be brought out to a header on the host PCB The WLAN test interface can be
7. Example In the following figure a 2 channel PCM bus is shown where the two channels have different word sizes and arbitrary positions in the bus frame FT stands for Frame Timer s JU UT CAEN EL E CHE data CH dala Fayne period 128 CH1 data lengih 11 CHI dala start FT 0 leng stan ET 43 lengh 8 Fayne lengh 1 Figure 11 2 Channels PCM Bus Timing The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 29 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Audio Encoding The WL1271L CODEC interface can use one of four audio coding patterns e A Law 8 bit e y Law 8 bit e Linear 8 or 16 bit e Transparent Improved Algorithm for Lost Packets The WL1271L features an improved algorithm for improving voice quality when received voice data packets go missing There are two options e Repeat the last sample possible only for sample sizes up to 24 bits For sample sizes gt 24 bits the last byte is repeated e Repeat a configurable sample of 8 24 bits depends on the real sample size in order to simulate silence or anything else in the PCM bus The configured sample is written in a specific register for each channel The choice between those two options is configurable separately for each channel The information in this document is subject to change without notice 330 0087 R3
8. TA 25 C VBAT 3 6 V 1 Parameter Test Conditions Min Typ Max Unit RX E m Ka 8 PER 97 dBm UR SEH A 8 PER 89 dBm il aie 802 119 10 PER 90 dBm Ge Wee S0219 10 PER 76 dBm Es Ge Geh 10 PER 91 dBm Gg Son 30211 10 PER 73 S dBm LEO EE 1 ax PER Te er geg Lem le S Mops OFDM 602110 qos ren Ta Sommes er Je 1 Up to 2 dB degradation at Channel 13 for 11g n modes and up to 2 dB degradation at Channel 14 for 11b g n modes Table 11 WLAN Receiver RF Characteristics The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 16 of 53 A LSR Design Create Certify Connect TiWi BLE TRANSCEIVER MODULE DATASHEET Bluetooth RF Characteristics Bluetooth Transmitter GFSK Characteristics Class 1 5 TA 25 C VBAT 3 6 V Parameter Oboe Min Typ Max Bluetooth Spec Unit GFSK RF Output Power 9 5 dBm EDR RF Output Power dBm Power Control Step Size 2 8 2 8 dB EDR Relative Power 2 1 4 1 dB Table 12 Bluetooth Transmitter RF Characteristics Bluetooth Receiver Characteristics TA 25 C VBAT 3 6 V Parameter Jee Min Typ Max Bluetooth Spec Unit Conditions GFSK Sensitivity BER 0 1 92 70 dBm EDR 2 Mbps Sensitivity BER 0 01 E 91 70 dBm EDR 3 Mbps Sensitivity BER 0 01 82 70 dBm GFSK Maxi
9. TX Current OFDM 802 11n TX Current CCK 802 11b RX Current 100 me OFDM 802 119 I RX Current ZER HS OFDM 802 11n RX Current 100 mA Dynamic Mode 1 S 1 2 mA 1 Total Current from Vear for reception of Beacons with DTIM 1 TBTT 100 mS Beacon duration 1 6ms 1 Mbps beacon reception in Listen Mode Table 7 WLAN Power Consumption The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 13 of 53 A LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET Power Consumption Bluetooth Parameter Test Conditions Min Typ Max Unit GFSK TX Current Constant Transmit DH5 PRBS9 45 mA Constant Transmit 2DH5 3DH5 EDR TX Current PRBS9 43 mA GFSK RX Current Constant Receive DH1 35 mA EDR RX Current Constant Receive 2DH5 3DH5 41 mA Deep Sleep Current Deep Sleep Mode 70 uA Table 8 Bluetooth Power Consumption DC Characteristics General Purpose UO Parameter Test Conditions Min Typ Max Unit VIO Current 16 mA Logic input low Vi 0 0 35 x VIO V Logic input high Vi 0 65 x VIO VIO V Logic output low Vo lout 8 mA 0 0 45 V Full Drive lout 4 mA 0 0 45 V Logic output low Vo lout 1 mA 0 0 112 V Reduced Drive lout 0 09 mA 0 0 01 V Logic output high Vo lout 8 mA VIO 0 45
10. and U FL connector L op ration est soumise aux deux conditions suivantes 1 cet appareil ne peut pas provoquer d interf rences et 2 cet appareil doit accepter toute interf rence y compris les interf rences qui peuvent causer un mauvais fonctionnement de l appareil Pour r duire le risque d interf rence aux autres utilisateurs le type d antenne et son gain doivent tre choisis de mani re que la puissance isotrope rayonn e quivalente PIRE ne d passe pascelle permise pour une communication r ussie Cet appareil a t concu pour fonctionner avec l antenne s ci dessous et ayant un gain maximum de 4 3 dBi LSR Dip le 0 6dBi Ethertronics Prestta et 3 0dBi Taoglas Flexibles Dip le Antennes pas inclus dans cette liste ou ayant un gain sup rieur 4 3 dBi 0 6dBi et 3 0dBi sont strictement interdits pour une utilisation avec cet appareil L imp dance d antenne requise est de 50 ohms Liste de toutes les antennes acceptables pour une utilisation avec l metteur 1 LSR 001 0001 aliment par le centre antenne dip le et LSR 080 0001 U FL d inversion de polarit du c ble connecteur SMA 2 Ethertronics Prestta 1000423 et Johnson Emerson U FL d un c ble coaxial U FL 415 0088 150 3 Taoglas FXP831 07 0100C antenne dip le flexible avec c ble int gr et un connecteur U FL The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 42 of 53 Le TiWi B
11. on BT_FUNC2 Module Pin 41 3 DC_REQ CLK_REQ and Frer are internal signals shown for reference only Figure 5 Bluetooth Power up Sequence Power up requirements 1 No signals are allowed on the IO pins if no IO power supplied because the IOs are not failsafe Exceptions are CLK REQ OUT SLOWCLK XTALP and AUD xxx which are failsafe and can tolerate external voltages with no VDDS and DC2DC 2 VDDS and SLOWCLK must be stable before releasing BT EN 3 Fast clock must be stable maximum 55 ms after BT EN goes HIGH The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 21 of 53 27 L SR TiWi BLE TRANSCEIVER MODULE ra im Certify Connect DATASH EET BLUETOOTH POWER DOWN SEQUENCE Vear 2 3 5 5 V uu VIO 1 8 V SS SLOWCLK DC REQ AFLIFLFLFLFIEFL BT EN ry exea KOO OOOO OOO mm KA Notes 1 The DC2DC 1 8V signal can be monitored on BT FUNC2 Module Pin 41 2 DC_REQ and CLK_REQ are internal signals shown for reference only Figure 6 Bluetooth Power down Sequence The TiWi BLE module indicates completion of Bluetooth power up sequence by asserting HCI RTS low This occurs up to 100 ms after BT EN goes high The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 22 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect
12. to support a wider variety of Codecs PCM bus sharing PCM Hardware Interface The PCM interface is one implementation of the codec interface It contains the following four lines e Clock configurable direction input or output e Frame Sync configurable direction input or output e Data In Input e Data Out Output Hi Z The WL1271L device can be either the master of the interface where it generates the clock and the framesync signals or slave where it receives these two signals The PCM interface is fully configured by means of a VS command For slave mode clock input frequencies of up to 16MHz are supported At clock rates above 12MHz the maximum data burst size is 32 bits For master mode the WL1271L can generate any clock frequency between 64kHz and 4 096MHz Data Format The data format is fully configurable e The data length can be from 8 to 320 bits in 1 bit increments when working with two channels or up to 640 bits when using 1 channel The data length can be set independently for each channel e The data position within a frame is also configurable with 1 clock bit resolution and can be set independently relative to the edge of the Frame Sync signal for each channel e The Data In and Data Out bit order can be configured independently For example Data In can start with MSB while Data Out starts with LSB Each channel is separately configurable The inverse bit order i e LSB first is supported only for sample s
13. used to place the module into constant packet transmit and constant packet receive modes These modes can be useful for antenna and sensitivity testing The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 10 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect INI FILE RADIO PARAMETERS There is an ini file that contains WLAN radio parameters which are critical to both the RF performance and EMC compliance of the module The ini file available on the LSR website is only intended to be used with the LSR WLAN Eval Tool Note that this ini file will not work when using the TiWi BLE module in normal operation which typically involves an operating system To use the TiWi BLE module in normal operation refer to specifics contained in the TiWi Family INI File Radio Parameter User Guide which is also available for download on the LSR website The settings specified in the appropriate ini file must be used to operate the module in compliance with the modular certification for FCC or ETSI There is a unique ini file for operating the module in compliance with FCC regulations and a different ini file for operating the module in compliance with the ETSI regulations The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 11 of 53 A LSR Design Create Certify Connect TiW
14. 3 Copyright O 2011 2015 LSR Page 30 of 53 27 L SR TiWi BLE TRANSCEIVER MODULE m Certify Connect DATASH EET BLUETOOTH PCM CLOCK MISMATCH HANDLING In BT RX the WL1271L receives RF voice packets and writes these to the CODEC I F If the WL1271L receives data faster than the CODEC I F output allows an overflow occurs In this case the WL1271L BT function has 2 possible behavior modes allow overflow and don t allow overflow e H overflow is allowed the WL1271L BT function continues receiving data and overwrites any data not yet sent to the CODEC If overflow is not allowed RF voice packets received when buffer is full are discarded The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 31 of 53 Le TiWi BLE TRANSCEIVER MODULE M LSR DATASHEET Design Create Certify Connect BLUETOOTH INTER IC SOUND I2S The WL1271L can be configured as an Inter IC Sound I2S serial interface to an I28 CODEC device In this mode the WL1271L audio CODEC interface is configured as a bi directional full duplex interface with two time slots per frame Time slot 0 is used for the left channel audio data and time slot 1 for the right channel audio data Each time slot is configurable up to 40 serial clock cycles in length and the frame is configurable up to 80 serial clock cycles in length The information in this document is subject to change without notice 330 00
15. 87 R3 3 Copyright O 2011 2015 LSR Page 32 of 53 Le TiWi BLE TRANSCEIVER MODULE M LSR DATASHEET Design Create Certify Connect UDI SUPPORT The UDI profile defines the protocols and procedures that are used by devices implementing UDI for the 3G mobile phone systems such as devices with Bluetooth connections to a 3G Handset communicating via video phone over a 3G network Up to 2 channels of UDI data can be supported The data is transferred via the CODEC interface using transparent mode and is sent out using eSCO EVA Bluetooth packets EV5 is also selectable The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 33 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect ADVANCED AUDIO FEATURES The WL1271L supports an embedded SBC encoder decoder codec and sample rate converter to achieve enhanced audio voice options BLE and ANT are not supported when advanced audio features are active Wideband WB Speech Normal e SCO voice links are 8ksamples s Proposed enhancements to Bluetooth profiles HFP HSP CTP and ICP profiles and the TCS Binary protocol require the capability of 16ksamples s voice and SBC encoding decoding necessary for WB speech The WL1271L Audio Processor can perform as an SBC codec to support wide band speech with no additional Bluetooth voice processing requirements from the Host Voice inte
16. A LSR Design Create Certify Connect TiWi BLE TRANSCEIVER MODULE DATASHEET Integrated Transceiver Modules for WLAN 802 11 b g n Bluetooth Bluetooth Low Energy BLE and ANT FEATURES e EEE 802 11b g n d e i compliant Typical WLAN Transmit Power o 20 0dBm 11 Mbps CCK b o 14 5dBm 54 Mbps OFDM g9 o 12 5dBm 65 Mbps OFDM n e Typical WLAN Sensitivity o 89dBm 8 PER 11 Mbps o 76dBm 10 PER 54 Mbps o 73dBm 10 PER 65 Mbps e Bluetooth 2 1 EDR Power Class 1 5 e Full support for BLE 4 0 and ANT e Miniature footprint 18 mm x 13 mm e Low height profile 1 9 mm e UEL connector for external antenna e Terminal for PCB Chip antenna feeds e Integrated band pass filter e Worldwide acceptance FCC USA IC Canada ETSI Europe Giteki Japan e Modular certification allows reuse of LSR FCC ID and ETSI certification without repeating the expensive testing on your end product e Compact design based on Texas Instruments WL1271L Transceiver e Seamless integration with TI OMAP application processors e SDIO Host data path interfaces e Bluetooth Advanced Audio Interfaces e Low power operation mode e RoHS compliant APPLICATIONS e Security e HVAC Control Smart Energy e Sensor Networks e Medical DESCRIPTION The TiWi BLE module is a high performance 2 4 GHz IEEE 802 11 b g n Bluetooth 2 1 EDR and Bluetooth Low Energy BLE 4 0 radio in a cost effective pre certified footprint Th
17. ATA Figure 18 Module Mechanical Dimensions Maximum Module Height 1 9 mm The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 47 of 53 Le TiWi BLE TRANSCEIVER MODULE LY LSR DATASHEET Design Create Certify Connect lt 1 5mm e GAN d A f A LUUT DETAIL A 2X SCALE 1503 0mm DO 4mm VIAS TYPICAL TYPICAL C EXPOSED COPPER PAD 7 NO SOLDERMASK ECCO 1 8mm 0 3mm7 5 18 0mm FC sEE DETAIL A oj bi lo THERMAL RELIEF AREA 4 4mm Le 4 PLACES NO COPPER ZS o 1 3mm 4 PLACES KH 0 3mm een 7 C 0 8mm TYPICA J0000000 2 0mm TYPICAL LAYOUT NOTES 1 MINIMUM 4 LAYER PCB WITH SECOND LAYER GROUND PLANE 2 FOUR GROUND PADS BENEATH MODULE TO BE THERMALLY TIED TO TOP LAYER GROUND POUR SEE DETAIL A CONNECT TOP SIDE POUR TO LAYER 2 GROUND PLANE USING AMPLE VIAS 3 AVOID LONG ROUTES ON TOP LAYER BENEATH MODULE VIA FANOUT BENEATH MODULE IS ACCEPTABLE Figure 19 TiWi BLE Recommended PCB Footprint Top View The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 48 of 53 v LSR Design Create Certify Connect TiWi BLE TRANSCEIVER MODULE DATASHEET TAPE AND REEL SPECIFICATION Figure 20 TiWi BLE Tape and Reel Specification
18. D d Input Output Read Command Card Response Command SD3 SD0 Input Output ead i l uc Figure 14 SDIO Single Block Read PARAMETER MN MAX UNIT tat Delay time CMD card response invalid to SD3 SDO write data valid Clock cycles luo Delay time SD3 SDO write data invalid end to CRC status valid Clock cycles Table 20 SDIO Interface Write see Figure 15 CMD Card Input Output Response l Write CRC Status BUSY Input Output Inpu pul r1 I I l I Il ul o b des 1 CRC status and busy waveforms are only for data line 0 Data lines 1 3 are N A The busy waveform is optional and may not be present Figure 15 SDIO Single Block Write The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 36 of 53 Le TiWi BLE TRANSCEIVER MODULE a LSR DATASHEET Design Create Certify Connect SDIO CLOCK TIMING Over Recommended Operating Conditions Note all timing parameters are indicated for the maximum Host interface clock frequency ES ZE 40 tia Hold time input valid after CLK T C 30 pF topLv Delay time CLK to output valid C 30 pF Table 21 SDIO Clock Timing tnn LEE l M ls ls Ma Input Ve toow gt Figure 16 SDIO Clock Timing The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 37 of 53 a LSR TiWi BLE TRAN
19. ENABLE SCHEME The module has 3 enable pins one for each core WL EN and BT EN and FM EN Presently there are 2 modes of active operation now supported WLAN and Bluetooth It is recommended that the FM EN pin be grounded to disable the FM section It is also recommended that the FM section be disabled by Bluetooth HCI commands 1 Each core is operated independently by asserting each EN signal to Logic 1 In this mode it is possible to control each core asynchronously and independently 2 Bluetooth mode operation WLAN will be operated through WL EN asynchronously and independently of Bluetooth IRQ OPERATION 1 The default state of the WLAN IRQ prior to firmware initialization is O 2 During firmware initialization the WLAN IRQ is configured by the SDIO module a WLAN IRQ changes its state to 1 3 AWLAN firmware interrupt is handled as follows a The WLAN firmware creates an Interrupt to Host indicated by a 1 to 0 transition on the WLAN_IRQ line host must be configured as active low or falling edge detect b Afterthe host is available depending on the interrupt priority and other host tasks it masks the firmware interrupt The WLAN IRQ line returns to 1 0 to 1 transition on the WLAN IRQ line c The host reads the internal register status to determine the interrupt sources the register is cleared after the read d The host processes in sequence all the interrupts read from this register e The host unmasks the
20. LE TRANSCEIVER MODULE M LSR DATASHEET Design Create Certify Connect OEM RESPONSIBILITIES TO COMPLY WITH FCC AND INDUSTRY CANADA REGULATIONS The TiWi BLE Module has been certified for integration into products only by OEM integrators under the following conditions This device is granted for use in Mobile only configurations in which the antennas used for this transmitter must be installed to provide a separation distance of at least 20cm from all person and not be co located with any other transmitters except in accordance with FCC and Industry Canada multi transmitter product procedures As long as the two conditions above are met further transmitter testing will not be required However the OEM integrator is still responsible for testing their end product for any additional compliance requirements required with this module installed for example digital device emissions PC peripheral requirements etc IMPORTANT NOTE In the event that these conditions cannot be met for certain configurations or co location with another transmitter then the FCC and Industry Canada authorizations are no longer considered valid and the FCC ID and IC Certification Number cannot be used on the final product In these circumstances the OEM integrator will be responsible for re evaluating the end product including the transmitter and obtaining a separate FCC and Industry Canada authorization Le module de TiWi BLE a t certifi
21. O Ground NOT SUPPORTED NO CONNECT The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR GND GND GND GND Page 8 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect VO Buffer Logic SE EM AUD LOUT Fao NOT SUPPORTED NO CONNECT AUD FSYNC DIO 4mA 1 8 VDC PCM I F HCl RX DI 8mA 1 8 VDC Bluetooth HCI UART RX HCI RTS DO 4mA 1 8 VDC Bluetooth HCI UART RTS HCI TX DIO 8mA 1 8 VDC Bluetooth HCI UART TX AUD CLK DO 4ma 1 8 VDC PCM IF AUD OUT DO 4mA 1 8 VDC PCM IF HCI CTS DI 4mA 1 8 VDC Bluetooth HCI UART CTS AUD IN DI 4ma 1 8 VDC PCM IF BT FUNC2 DI 4mA 1 8 VDC Bluetooth Wakeup DI DC2DC mode DOJ BT_FUNC4 DO 4mA 1 8 VDC BT UARTD DEBUG VDD LDO CLASS 1P5 ING VBAT VOLTAGE PRESENT NO CONNECT GND GND Fo Ground GND GND Ground Antenna terminal for WLAN and Bluetooth Note 1 Ground Ground Ground GND E E Ground PI Power Input PO Power Output DI Digital Input 1 8 VDC Logic Level DO Digital Output 1 8 VDC Logic Level Al Analog Input AO Analog Output AIO Analog Input Output RF RF Port GND Ground Note 1 Antenna terminal presents d c short circuit to ground indicates that pin is capable of bidirectional operation but is used as the type shown Table 3 TiWi
22. P SEQUENCE The following sequence describes device power up from shutdown Only the WLAN Core is enabled the Bluetooth and FM cores are disabled Vear 2 3 5 5 f VIO 1 8 V SC slow clock WL_EN 100us PP DC_REQ DC2DC 1 8 V CLK_REQ SDIO SPICLK WLAN IRQ F REF T wake up Figure 3 TiWi BLE Power up Sequence Requirements 1 No signals are allowed on the IO pins if no IO power is supplied because the IOs are not failsafe Exceptions are CLK REQ OUT SLOWCLK XTALP and AUD xxx which are failsafe and can tolerate external voltages with no VDDS and DC2DC 2 VBAT VIO and SLOWCLK must be available before WL EN 3 Twakeup T1 T2 The duration of T1 is defined as the time from WL_ENshigh until Fref is valid for the SoC T1 55ms The duration of T2 depends on Operating system Host enumeration for the SDIO WSPI PLL configuration Firmware download Releasing the core from reset Firmware initialization The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 19 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect WLAN POWER DOWN SEQUENCE Vgar 2 3 5 5 V N VIO 1 8 V N DC2DC 1 8 V CLK REQ soo e LILI WLAN IRQ Notes 1 The DC2DC 1 8V signal can be monitored on BT FUNC2 Mod
23. PT AS SET FORTH IN LSR S TERMS AND CONDITIONS OF SALE LOCATED ON LSR S WEB SITE LSR ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTY OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE OR NON INFRINGEMENT IN NO EVENT SHALL LSR BE LIABLE FOR ANY DIRECT INDIRECT CONSEQUENTIAL PUNITIVE SPECIAL OR INCIDENTAL DAMAGES INCLUDING WITHOUT LIMITATION DAMAGES FOR LOSS OF PROFITS BUSINESS INTERRUPTION OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT EVEN IF LSR HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES LSR makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice LSR does not make any commitment to update the information contained herein Unless specifically provided otherwise LSR products are not suitable for and shall not be used in automotive applications LSR s products are not intended authorized or warranted for use as components in applications intended to support or sustain life The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 53 of 53
24. SCEIVER MODULE lm Certify Connect DATASH EET SOLDERING RECOMMENDATIONS Recommended Reflow Profile for Lead Free Solder 260 Time above 220 C 30 60 sec Max temp 230 C 250 C 240 220 200 180 160 140 120 4 Temperature C 100 Note The quality of solder joints on the castellations half vias where they contact the host board should meet the appropriate IPC Specification See IPC A 610 D Acceptability of Electronic Assemblies section 8 2 4 Castellated Terminations Figure 17 Reflow Profile The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 38 of 53 A LSR Design Create Certify Connect TiWi BLE TRANSCEIVER MODULE DATASHEET CLEANING In general cleaning the populated modules is strongly discouraged Residuals under the module cannot be easily removed with any cleaning process e Cleaning with water can lead to capillary effects where water is absorbed into the gap between the host board and the module The combination of soldering flux residuals and encapsulated water could lead to short circuits between neighboring pads Water could also damage any stickers or labels e Cleaning with alcohol or a similar organic solvent will likely flood soldering flux residuals into the RF shield which is not accessible for post washing inspection The solvent could also damage any stickers
25. VIO V Full Drive lout 4 mA VIO 0 45 VIO V Logic output high Vou lout 1 mA VIO 0 112 VIO V Reduced Drive lout 0 3 mA VIO 0 033 VIO V Table 9 DC Characteristics General Purpose UO The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 14 of 53 A LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET WLAN RF Characteristics WLAN Transmitter Characteristics TA 25 C VBAT 3 6 V Parameter Test Conditions Min Typ Max Unit 11 Mbps CCK 802 11 b Mask e ae ea 19 Compliance 3596 EVM 20 dBm H RMS power over TX packet 9 Mbps OFDM 802 11 g Mask CUT en 19 Compliance 8 dB EVM 19 dBm H RMS power over TX packet 54 Mbps OFDM 802 11 g Mask Ge n e 19 Compliance 25 dB EVM 14 5 dBm H RMS power over TX packet 6 5 Mbps OFDM 802 11 n Mask SS Dee SC In Compliance 5 dB EVM 19 dBm puk MOWO RMS power over TX packet 65 Mbps OFDM 802 11 n Mask gt Lum T Compliance 28 dB EVM 12 5 dBm P RMS power over TX packet Table 10 WLAN Transmitter RF Characteristics The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 15 of 53 A LSR TiWi BLE TRANSCEIVER MODULE rra am e a DATASHEET WLAN Receiver Characteristics
26. ange without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 43 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect OEM LABELING REQUIREMENTS FOR END PRODUCT The TiWi BLE module is labeled with its own FCC ID and IC Certification Number The FCC ID and IC certification numbers are not visible when the module is installed inside another device as such the end device into which the module is installed must display a label referring to the enclosed module The final end product must be labeled in a visible area with the following Contains Transmitter Module FCC ID TFB TIWI1 01 Contains Transmitter Module IC 5969A TIWI101 or Contains FCC ID TFB TIWI1 01 Contains IC 5969A TIWI101 The OEM of the TiWi BLE Module must only use the approved antenna s listed above which have been certified with this module Le module de TiWi BLE est tiquet avec son propre ID de la FCC et IC num ro de certification L ID de la FCC et IC num ros de certification ne sont pas visibles lorsque le module est install l int rieur d un autre appareil comme par exemple le terminal dans lequel le module est install doit afficher une etiquette faisant r f rence au module ci joint Le produit final doit tre tiquet dans un endroit visible par le suivant Contient Module metteur FCC ID TFB TIWI1 01 Contient Module metteur IC 5969A TIWI101 OU Contient FCC ID TFB TIWI1 01
27. commended Operating Conditions 4 eese eeeeeeeeee esee ns nennen nennt nnn nn sata REENEN 12 General Characteristics reir een Eege conn sn ue entre tm donc he eA T autant na cadre tien 13 WLAN RF Characteristics 222 2800 dune ice acces xa cue dungen ud dime nan ede eaae moment suud ea De an aeaiia eadeni aaa 15 Bluetooth RF Characteristics ccccccccsccssssssceseseeuceensnseeeseeueeeeansasecesueuauanausaseseeeeuauagaaseeseeuaeauanansesesnans 17 Bluetooth Low Energy RF Characteristics siennes 18 WLAN POWER UP SEQUENCE uuu ccc cceccseecceeeceecceeseeseeeeeeeuseeeeueceeeceeeeeeseneeeeeeseeeeeceeseees 19 WLAN POWER DOWN SEQUENCE ccccccsccsesccesccssecsesscescensecnesscessnsennesscessensennesscnsecnse 20 BLUETOOTH POWER UP SEQUENCE CG 21 BLUETOOTH POWER DOWN SEQUENCE ccccceeecceeccneeeceseceeeeneeeeuseenseeneeeeeseeeeeeneees 22 ENABLE os aa gap ape Cg aii C 23 S OPERA ere nettle ptr rrr nr pga eT 23 SLOW 32 KHZ CLOCK SOURCE REQUIREMENTS iii 24 The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 4 of 53 Le TiWi BLE TRANSCEIVER MODULE Y LSR DATASHEET Design Create Certify Connect BLUETOOTH HC UE NW 25 BLUETOOTH AUDIO CODEC INTERFACE eeeeeeee eene eene eene enne nennen nnn 27 e a o nn nn ne 27 PCM Hardware Interface nenennnnnnnnnenenennnennnnnenennnnnne
28. e module realizes the necessary PHY MAC layers to support WLAN applications in conjunction with a host processor over a SDIO interface The module also provides a Bluetooth platform through the HCI transport layer Both WLAN and Bluetooth share the same antenna port Need to get to market quickly Not an expert in 802 11 or Bluetooth Need a custom antenna Would you like to own the design Would you like a custom design Not quite sure what you need Do you need help with your host board LSR Design Services will be happy to develop custom hardware or software integrate the design or license the design so you can manufacture yourself Contact us at sales lsr com or call us at 262 375 4400 The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 1 of 53 a LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET ORDERING INFORMATION Order Number Description TiWi BLE Module with UEL connector for external antenna Re Tray SPQ 100 TiWi BLE Module with U FL connector for external antenna Tone Tape and Reel SPQ 1000 Table 1 Orderable TiWi BLE Part Numbers MODULE ACCESSORIES Order Number Description 2 4GHz Dipole Antenna with Reverse 001 0001 Polarity SMA Connector U FL to Reverse Polarity SMA Bulkhead 080 0001 Cable 105mm Table 2 Module Accessories The information in this d
29. e user s authority to operate this equipment The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 41 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Industry Canada Statements Operation is subject to the following two conditions 1 this device may not cause interference and 2 this device must accept any interference including interference that may cause undesired operation of the device To reduce potential radio interference to other users the antenna type and its gain should be so chosen that the equivalent isotropically radiated power e i r p is not more than that permitted for successful communication This device has been designed to operate with the antenna s listed below and having a maximum gain of 4 3 dBi LSR Dipole 0 6dBi Ethertronics Prestta and 3 0dBi Taoglas Flexible Dipole Antennas not included in this list or having a gain greater than 4 3 dBi 0 6dBi and 3 0dBi are strictly prohibited for use with this device The required antenna impedance is 50 ohms List of all Antennas Acceptable for use with the Transmitter 1 LSR 001 0001 center fed dipole antenna and LSR 080 0001 U FL to Reverse Polarity SMA connector cable 2 Ethertronics Prestta 1000423 and Johnson Emerson U FL to U FL coaxial cable 415 0088 150 3 Taoglas FXP831 07 0100C flexible dipole antenna with integrated cable
30. ennnnenennene 27 D ta FOrMAT 2 588 ns 27 Frame l0l Period eeh 28 Clock Edge Operation Re Sn EEN 29 Two Channel PCM Bus Example eeeieeseieeeeeieneeee tenni nnne tnn nn tn nns nn REENEN antri nn sn nn as snas asas nn nn nis 29 UOS enm 30 Improved Algorithm for Lost Packets esee eese enne enne nnn annnm an nennt nnmnnn nn 30 BLUETOOTH PCM CLOCK MISMATCH HANDLING eeeeeee eene 31 BLUETOOTH INTER I SOUND OS E 32 UDI SUPPORT RE 33 ADVANCED AUDIO FEATURES sms 34 Wideband WB SpeeCLi 2 ruiciiaccccs sn ina pac a EEEREN Vade SEEN vr Ur ee 34 IE o A D c 35 Geif WO U ian teee 36 SDIO GLOCK QI CH 37 SOLDERING RECOMMENDATIONS eeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 38 Recommended Reflow Profile for Lead Free Solder nee 38 CRAN aah esb X YMoco 39 DPUCALINSPECTIODL dieti do EVER C MR ER C aada 39 REWORK 39 SHIPPING HANDLING AND STORAGE 2 rro reno ron r oon p ppp rana pu pano raus tan Prax orar E paE ca sKs 39 hne 39 lain meE
31. firmware interrupts 4 The host is ready to receive another interrupt from the WLAN device The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 23 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect SLOW 32 KHZ CLOCK SOURCE REQUIREMENTS The slow clock is always supplied from an external source It is input on the SLOW CLK pin and can be a digital signal in the range of VIO only For slow clock frequency and accuracy refer to Table 16 The external slow clock must be stable before the system exits from shut down mode Parameter 1 Condition Symbol Min Typ Max Unit Input slow clock frequency 32768 Hz Input slow clock accuracy WLAN BT 250 ppm Input transition time T T 10 to 90 T T 100 ns Frequency input duty cycle 30 50 70 96 Input voltage limits EE SP 0 65 x VDDS VDDS Vpeak VIL 0 0 35 x VDDS Input impedance 1 MW Input capacitance 5 pF Rise and fall time 100 ns Phase noise 1 kHz 125 dBc Hz 1 Slow clock is a fail safe input Table 16 Slow Clock Source Requirements The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 24 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect BLUETOOTH HCI UART Figure 7 Bluetooth UART Timing mwe s
32. i BLE TRANSCEIVER MODULE DATASHEET ELECTRICAL SPECIFICATIONS The majority of these characteristics are based on controlling and conditioning the tests using the TiWi BLE control software application Other control conditions may require these values to be re characterized by the customer Absolute Maximum Ratings Parameter Min Max Unit Power supply voltage VBAT 0 5 45 5 V Digital supply voltage VIO 0 5 2 1 V Voltage on any GPIO 0 5 VIO 0 5 V Voltage on any Analog Pins 0 5 2 1 V RF input power antenna port 10 dBm Operating temperature 40 85 C Storage temperature 55 125 C oun Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device and are not covered by the warranty These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied Exposure to absolute maximum rated conditions for extended periods may affect device reliability All parameters are measured as follows unless stated otherwise VDD_IN 1 8V VDDIO_1 8V 1 8V VDD_LDO_CLASS1P5 3 6V Analog pins XTALP XTALM RFIOBT DRPWRXBM DRPWRXBP DRPWTXB and also FMRFINP FMRFINM FMRFINM FMAUDLIN FMAUDRIN FMAUDLOUT FMAUDROUT The following signals are from the VBAT group PMS VBAT and VDD_LDO_CLASS1P5 if BT class 1 5 direct VBAT is used Maxi
33. izes up to 24 bits e The data in and data out size do not necessarily have to be the same length e The Data Out line is configured as a high Z output between data words Data Out can also be set for permanent high Z irrespective of data out This allows the WL1271L to be a bus slave in a multi slave PCM environment At power up Data Out is configured as high Z The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 27 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Frame Idle Period The CODEC interface has the capability for frame idle periods where the PCM clock can take a break and become 0 at the end of the PCM frame after all data has been transferred The WL1271L supports frame idle periods both as master and slave of the PCM bus When WL1271L is the master of the interface the frame idle period is configurable There are 2 configurable parameters e CIk Idle Start Indicates the number of PCM clock cycles from the beginning of the frame till the beginning of the idle period After CIk Idle Start clock cycles the clock becomes 0 e CIk Idle End Indicates the time from the beginning of the frame till the end of the idle period This time is given in multiples of PCM clock periods The delta between CIk Idle Start and CIk Idle End is the clock idle period e g For PCM clock rate 1MHz frame sync peri
34. ktestpenbterbterkteek egb eebCerkterkter Eeg eebteebdekktee pe 49 DEVICE MARKINGS 50 GCGONTAC TING LS e e 53 The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 6 of 53 Dy L SR TiWi BLE TRANSCEIVER MODULE eram Certify Connect DATASH EET TIWI BLE MODULE FOOTPRINT AND PIN DEFINITIONS To apply the TiWi BLE module it is important to use the module pins in your application as they are designated in below and in the corresponding pin definition table found on pages 8 and 9 Not all the pins on the TiWi BLE module may be used as some are reserved for future functionality 2 0mm FROM ANT TERMINAL BAT VDD_LDO_CLASS_1P5 T_FUNCS BT FUNCA ART T CO BT FUNC2 AN IRQ AUD _IN BT EN HCI CTS FM EN D AUD QUT WL_RS232_RX gt AUD CLK 8 0mm WL RS232 TX D HCI_TX Am EM 12S_FSYNC HCI RIS Wl EN HCI RX VIO AUD FSYNC GND FM AUD LOUT SDIO_D3 FM AUD ROUT SDIO D2 GND SD D1 FMRFIN SDIO DO FMRFOUT Imm PITCH THROUGHOUT Figure 2 TiWi BLE Pinout Top View The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 7 of 53 TiWi BLE TRANSCEIVER MODULE DATASHEET A LSR Design Create Certify Connect PIN DESCRIPTIONS 2 VO Buffer Logic GES Battery Voltage 3 6 VDC Nominal 3 0 4 8 VDC
35. lisation dans des configurations mobiles seule dans laquelle les antennes utilis es pour cet metteur doit tre install pour fournir une distance de s paration d au moins 20cm de toute personne et ne pas tre co localis s avec les autres metteurs sauf en conformit avec FCC et Industrie Canada multi metteur proc dures produit Autres d clarations manuel de l utilisateur peuvent s appliquer The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 45 of 53 Le TiWi BLE TRANSCEIVER MODULE LY LSR DATASHEET Design Create Certify Connect EUROPE CE Notice This device has been tested and certified for use in the European Union See the Declaration of Conformity DOC for specifics If this device is used in a product the OEM has responsibility to verify compliance of the final product to the EU standards A Declaration of Conformity must be issued and kept on file as described in the Radio and Telecommunications Terminal Equipment R amp TTE Directive The CE mark must be placed on the OEM product per the labeling requirements of the Directive Declaration of Conformity DOC This DOC can be downloaded from the LSR Wiki The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 46 of 53 Le TiWi BLE TRANSCEIVER MODULE ex LSR DATASHEET Design Create Certify Connect MECHANICAL D
36. mum Input Level BER 0 1 5 20 dBm EDR 2 Maximum Input Level BER 0 1 10 dBm EDR 3 Maximum Input Level BER 0 1 10 S Table 13 Bluetooth Receiver RF Characteristics The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 17 of 53 A LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET Bluetooth Low Energy RF Characteristics Bluetooth BLE Transmitter GMSK and EDR Characteristics Class 1 5 TA 25 C VBAT 3 6 V Test Parameter Conditions Min Typ Max BT Spec Unit GMSK RF Output Power 10 dBm Power Control Step Size 2 4 8 2 8 dB 1 BLE spec 10dBm max can be achieved using normal system losses due to filters etc or by reducing value through VS command Table 14 Bluetooth Low Energy Transmitter RF Characteristics Bluetooth BLE Receiver Characteristics TA 25 C VBAT 3 6 V Test i Parameter Conditions Min Typ Max BT Spec Unit GMSK Sensitivity PER 30 8 92 70 dBm GMSK Maximum Input Level PER 30 8 5 20 dBm Table 15 Bluetooth Low Energy Receiver RF Characteristics The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 18 of 53 a LSR TiWi BLE TRANSCEIVER MODULE mgl Certify Connect DATASH EET WLAN POWER U
37. mum allowed depends on accumulated time at that voltage 4 8V for 7 years lifetime 5 5V for 6 hours cumulative The device can be reliably operated for 5 000 active WLAN cumulative hours at TA of 85 C Table 4 Absolute Maximum Ratings Recommended Operating Conditions Parameter Min Typ Max Unit VaAT 3 0 3 6 4 8 V VIO 1 62 1 8 1 92 V Vu 0 65 x VIO VIO V Vu 0 0 35 x VIO V Vou 4 8 mA VIO 0 45 VIO V Vo Q 4 8 mA 0 0 45 V Ambient temperature range 40 25 85 C Table 5 Recommended Operating Conditions The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 12 of 53 27 L SR TiWi BLE TRANSCEIVER MODULE mpm Certify Connect DATASH EET General Characteristics Parameter Min Typ Max Unit WLAN RF frequency range 2412 2472 MHz 802 11 b g n WLAN RF data rate 1 rates 65 Mbps supported BT RF frequency Range 2402 2480 MHz Table 6 General Characteristics Power Consumption WLAN Parameter Test Conditions Min Typ Max Unit 2437 MHz VaAT 3 6V Tamb 25 C Po 20dBm 11 Mbps CCK 280 mA L 1200 bytes Las idle 24 uS 2437 MHz Veat 3 6V Tamb 25 C Po 14 5 dBm 54 Mbps OFDM 185 mA L 1200 bytes tae idle 4uS 2437 MHz VaaT 3 6V Tamb 25 C Po 12 5dBm 65 Mbps OFDM 165 mA L 1200 bytes tae idle 4uS CCK 802 11b TX Current OFDM 802 119
38. ocument is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 2 of 53 Dy LSR TiWi BLE TRANSCEIVER MODULE org i Certify Connect DATASH EET BLOCK DIAGRAM TPS73028 TPS62611 VBAT VIO p Q SLOW CLK P a E m EIN LI E D O BT_TX_RX HOST_INTERFACE D Q HOST_DEBUG ear i Figure 1 TiWi BLE Module Block Diagram Top Level The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 3 of 53 27 LSR TiWi BLE TRANSCEIVER MODULE Design Create Certify Connect DATASH EET TABLE OF CONTENTS a QE 2 1 20 PT ae raare rAr EnEn 1 APPLICATIONS ENEE aad 1 DESCRIPTION Er E 1 ORDERING INFORMATION 1 5 2 eroi aan aua auk ark rd n in ku ntan kai kc E Ri c iare 2 MODULE ACCESSO RE S EE 2 Beie nt ed TEEN 3 TIWI BLE MODULE FOOTPRINT AND PIN DEFINITIONS eere 7 PIN eI EIDIWRIS m Uu 8 BT FUNC2 and BIT FUNGS Pins 08h ree Eee NEE AERCH EE CN RR nement 10 EE a0 074 Eccc 10 WL UART DBGPiM E EE 10 WL RS232 RX and WL LEKT 10 INL FILE RADIO PARAMETENHSL EEN 11 ELECTRICAL SPECIFICATIONS suisesasivcicntsencievisivadeneisvciesaseecdividinvsanisestdavedintianisenddevedennves 12 Absolute Maximum Ratings esee eee eene e nennen nnne nn nnne tn inse nitri ase sn nnmnnn nnmnnn nnmnnn nana nn 12 Re
39. od 10kHz CIk Idle Start 60 CIk Idle End 90 Between each two frame sync there are 70 clock cycles instead of 100 The clock idle period starts 60 clock cycles after the beginning of the frame and lasts 90 60 30 clock cycles This means that the idle period ends 100 90 10 clock cycles before the end of the frame The data transmission must end prior to the beginning of the idle period d Frame H OR a D period Frame do 7 i ne Sync ME Data In E DE LE l Frame o AUDE Jubt i Clk Idle Start CIk Idle End Figure 9 Frame Idle Period The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 28 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect Clock Edge Operation The CODEC interface of the WL1271L can work on the rising or the falling edge of the clock It also has the ability to sample the frame sync and the data at inversed polarity The following diagram shows the operation of a falling edge clock type of codec The codec is the master of the PCM bus The frame sync signal is updated by the codec on the falling clock edge and therefore is sampled by the WL1271L on the next rising clock The data from the codec is sampled by the WL1271L on the clock falling edge PCM FSYNC i PCM CLK PCM DATA IN WL1271L e SAMPLE TIME Figure 10 Negative Clock Edge PCM Operation Two Channel PCM Bus
40. or labels e Ultrasonic cleaning could damage the module permanently OPTICAL INSPECTION After soldering the Module to the host board consider optical inspection to check the following e Proper alignment and centering of the module over the pads e Proper solder joints on all pads e Excessive solder or contacts to neighboring pads or vias REWORK The module can be unsoldered from the host board if the Moisture Sensitivity Level MSL requirements are met as described in this datasheet Never attempt a rework on the module itself e g replacing individual components Such actions will terminate warranty coverage SHIPPING HANDLING AND STORAGE Shipping Bulk orders of the TiWi BLE modules are delivered in trays of 100 or reels of 1 000 Handling The TiWi BLE modules contain a highly sensitive electronic circuitry Handling without proper ESD protection may destroy or damage the module permanently Moisture Sensitivity Level MSL Per J STD 020 devices rated as MSL 4 and not stored in a sealed bag with desiccant pack should be baked prior to use Devices are packaged in a Moisture Barrier Bag with a desiccant pack and Humidity Indicator Card HIC Devices that will be subjected to reflow should reference the HIC and J STD 033 to determine if baking is required If baking is required refer to J STD 033 for bake procedure Storage Per J STD 033 the shelf life of devices in a Moi
41. rface linear 16ksps PCM interface Figure 12 WL1271L WB Speech Support The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 34 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect Assisted A2DP A2DP profile requires the following e SBC encoding e 44 1kHz or 48kHz audio sampling rate e L2CAP encapsulation for up to 512kbps ACL link If done in the host this will put a significant load on host processing power The WL1271L can accept a standard 12S audio stream at any of the standard rates and perform all above requirements internally to achieve full A2DP thus offloading host Figure 13 WL1271L Assisted A2DP The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 35 of 53 Le TiWi BLE TRANSCEIVER MODULE M LSR DATASHEET Design Create Certify Connect SDIO INTERFACE TIMING PARAMETER MIN MAX UNIT ter Delay time assign relative address or data transfer Read command CMD valid to card response 2 64 Clock cycles mode CMD valid icc Delay time CMD command valid to CMD command valid 58 Clock cycles tre Delay time CMD response valid to CMD command valid 8 Clock cycles tac Access time CMD command valid to SD3 SDO read data valid Clock cycles Table 19 SDIO Interface Read see Figure 14 e X MEM ko l D l I CM
42. sture Barrier Bag is 12 months at 40 C and lt 90 room humidity RH Do not store in salty air or in an environment with a high concentration of corrosive gas such as Cl2 H2S NH3 SO2 or NOX Do not store in direct sunlight The product should not be subject to excessive mechanical shock The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 39 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Repeating Reflow Soldering Only a single reflow soldering process is encouraged for host boards The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 40 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect AGENCY CERTIFICATIONS FCC ID TFB TIWI1 01 15 247 IC ID 5969A TIWI101 RSS 210 CE Compliant to standards EN 60950 1 EN 300 328 and EN 301 489 Giteki 209 J00157 SAR This wireless mobile and or portable device has been shown to be compliant for localized specific absorption rate SAR for uncontrolled environment general exposure limits specified in ANSI IEEE Std C95 1 1999 and had been tested in accordance with the measurement procedures specified in IEEE 1528 2003 OET Bulletin 65 Supp C RSS 102 and Safety Code 6 AGENCY STATEMENTS Federal Communication Commission Interference S
43. tatement This equipment has been tested and found to comply with the limits for a Class B digital device pursuant to Part 15 of the FCC Rules These limits are designed to provide reasonable protection against harmful interference in a residential installation This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instructions may cause harmful interference to radio communications However there is no guarantee that interference will not occur in a particular installation If this equipment does cause harmful interference to radio or television reception which can be determined by turning the equipment off and on the user is encouraged to try to correct the interference by one of the following measures e Reorient or relocate the receiving antenna e Increase the separation between the equipment and receiver e Connect the equipment into an outlet on a circuit different from that to which the receiver is connected e Consult the dealer or an experienced radio TV technician for help This device complies with Part 15 of the FCC Rules Operation is subject to the following two conditions 1 This device may not cause harmful interference and 2 this device must accept any interference received including interference that may cause undesired operation FCC CAUTION Any changes or modifications not expressly approved by the party responsible for compliance could void th
44. trates 75 400 wwe CTS low to TX_DATA on 2 RTS high to RX_DATA off Interrupt set to 1 4 FIFO Bit width Jitter See application note relative to ideal bit width 1 Some exceptions e g for 19 2 MHz max baud rate 3 84 kbps i o 0 2 CTS high to TX DATAof Hardware flow omg o 2 DE Table 17 Bluetooth UART Timing The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 25 of 53 Le TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect tb gt TX Asmj 0 DY D U On Y PAR V STP Description Start bit Data bits LSB first Parity bit optional Table 18 Bluetooth UART Data Frame The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 26 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect BLUETOOTH AUDIO CODEC INTERFACE Overview The CODEC interface is a fully dedicated programmable serial port that provides the logic to interface to several kinds of PCM or l2S codecs The interface supports e Two voice channels Master slave modes Coding schemes y Law A Law Linear Transparent Long amp short frames Different data sizes order and positions UDI profile High rate PCM interface for EDR Enlarged interface options
45. ule Pin 41 2 DC_REQ and CLK_REQ are internal signals shown for reference only Figure 4 TiWi BLE Module Power down Sequence Requirements 1 DC REQ will go low only if WLAN is the only core working Otherwise if another core is working e g BT it will stay high 2 CLK REQ will go low only if WLAN is the only core working Otherwise if another core is working and using the Frer e g BT it will stay high 3 If WLAN is the only core that is operating WL_EN must remain de asserted for at least 64sec before it is re asserted The information in this document is subject to change without notice 330 0087 R3 3 Copyright O 2011 2015 LSR Page 20 of 53 A TiWi BLE TRANSCEIVER MODULE ex Lab DATASHEET Design Create Certify Connect BLUETOOTH POWER UP SEQUENCE The following sequence describes device power up from shutdown Only the Bluetooth core is enabled the WLAN core is disabled N Vear 2 3 5 5 V 10ms min VIO 1 8 V ry 64us min ltl le est get e Nav i dE E ee e ee d e WLIBT FM EMT ne SLOWCLK TLE Li ll LI Lh LJ LT Li BT EN DC_REQ DC2DC 1 8 V l CLK_REQ Fner BT ready HCI RTS DEM DI M94 12 keng Twake uP Notes 1 A After this sequence is completed the device is in the low VIO leakage state while in shutdown 2 The DC2DC 1 8V signal can be monitored
46. uring process of the PCB y LS RESEARCH N A 4XXXXXX 2D Bar Code Model TiWi BLE Where 4 Revision XXXXXX incremental serial number 2D Barcode Format is Data Matrix Standard The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 51 of 53 Le TiWi BLE TRANSCEIVER MODULE lai LSR DATASHEET Design Create Certify Connect Rev 5 Devices WL1271L WL1271BYFVR PG3 32 Front End TQM679002A e Updated the label to include FCC IC and Giteki EMC marking information e Updated the label to include a date code R 209 J00157 Where RX Revision X SSYYWWD Date Code YY Year WW Week XXXXX Incremental Serial Number 2D Barcode Format is Data Matrix Standard The information in this document is subject to change without notice 330 0087 R3 3 Copyright 2011 2015 LSR Page 52 of 53 Le TiWi BLE TRANSCEIVER MODULE LY LSR DATASHEET Design Create Certify Connect CONTACTING LSR Headquarters LSR W66 N220 Commerce Court Cedarburg WI 53012 2636 USA Tel 1 262 375 4400 Fax 1 262 375 4248 Website www lsr com Sales Contact sales lsr com The information in this document is provided in connection with LS Research hereafter referred to as LSR products No license express or implied by estoppel or otherwise to any intellectual property right is granted by this document or in connection with the sale of LSR products EXCE
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