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1. Figure 13 SARA U2 series dimensions bottom and sides views Parameter Description Typical Tolerance A Module Height mm 26 0 1023 6 mil 0 20 0 20 7 9 7 9 mil B Module Width mm 16 0 629 9 mil 0 20 0 20 7 9 7 9 mil Module Thickness mm 3 0 118 4 mil 0 25 0 15 9 8 5 9 mil D Horizontal Edge to Lateral Pin Pitch mm 2 0 78 7 mil 0 20 0 20 7 9 7 9 mil E Vertical Edge to Lateral Pin Pitch mm 2 5 98 4 mil 0 20 0 20 7 9 7 9 mil F Edge to Lateral Pin Pitch mm 1 05 41 3 mil 0 20 0 20 7 9 7 9 mil G Lateral Pin to Pin Pitch mm 1 1 43 3 mil 0 02 0 02 0 8 0 8 mil H1 Lateral Pin Height mm 0 8 31 5 mil 0 02 0 02 0 8 0 8 mil H2 Lateral Pin close to ANT Height mm 0 9 35 4 mil 0 02 0 02 0 8 0 8 mil Lateral Pin Width mm 1 5 59 1 mil 0 02 0 02 0 8 0 8 mil J1 Lateral Pin to Pin Distance mm 0 3 11 8 mil 0 02 0 02 0 8 0 8 mil J2 Lateral Pin to Pin close to ANT Distance mm 0 2 7 9 mil 0
2. Parameter Description Min Typ Max Unit Remarks PS word alignment period 125 0 us lt I2S_sample_rate gt 0 90 70 us lt I2S_sample_rate gt 1 83 33 us lt I2S_sample_rate gt 2 62 50 us lt I2S_sample_rate gt 3 45 35 us lt I2S_sample_rate gt 4 41 67 us lt I2S_sample_rate gt 5 31 25 us lt I2S_sample_rate gt 6 22 68 us lt I2S_sample_rate gt 7 20 83 us lt I2S_sample_rate gt 8 PS word alignment frequency 8 000 kHz lt I2S_sample_rate gt 0 11 03 kHz lt I2S_sample_rate gt 1 12 00 kHz lt I2S_sample_rate gt 2 16 00 kHz lt I2S_sample_rate gt 3 22 05 kHz lt I2S_sample_rate gt 4 24 00 kHz lt I2S_sample_rate gt 5 32 00 kHz lt I2S_sample_rate gt 6 44 10 kHz lt I2S_sample_rate gt 7 48 00 kHz lt I2S_sample_rate gt 8 T4 PS TXD invalid before Va CLK falling edge 24 ns lt l2S_mode gt 2 4 6 8 10 12 before shifting edge of S CLK PS TXD invalid before Va CLK rising edge 24 ns lt I2S_mode gt 3 5 7 9 11 13 before shifting edge of Va CLK T5 PS TXD valid after IS CLK falling edge 32 ns lt l2S_mode gt 2 4 6 8 10 12 after shifting edge of Va CLK PS TXD valid after IS CLK rising edge 32 ns lt l2S_mode gt 3 5 7 9 11 13 after shifting edge of I S CLK T6 PS RXD setup time before I S CLK rising edge 60 ns lt I2S_mode gt 2 4 6 8 10 12 before latching edge of I S CLK PS RXD setup time before TS CLK falling edge 60 ns lt l2S_mode gt 3 5 7 9 11 13 before latching edge of VS CLK T7 PS RXD hold time aft
3. EEN Ne y esis 5 eee ate geo Y g gt gt L 0 ole GG D Z BQ SU amp o S Ss D e ee Ss SEN o A gt gt gt vu vu e 3 5 i Vi GT GC GF z g ZS Il Lx 2 4 6 O Za A ae 090233505 em D YR lt I lt t DIS E E o ee 2 HS GH ao oO 8 8 E 2 D zb E OO gu D DH Se 2 8 Ze SERGE EIEEEKCKEKEKEe 2 f m a EECHER EENS EA SARA U260 5 76 7 2 850 1900 850 1900 1 O F ije e ee e e o SARA U270 5 76 7 2 900 2100 900 1800 1 1 1 9 F 1 o o o o o o o e o D SARA U280 5 76 7 2 850 1900 1 WP F 1 ee ee o o o e e o D SARA U290 5 76 7 2 900 2100 1 1 1 9 F 1 ee o o o o o o o o o D F not supported by initial FW release Table 1 SARA U2 series main features summary SARA U290 modules include 00 and 60 FW versions SARA U290 60S is approved and locked for SoftBank Japanese network operator UBX 13005287 RO4 Early Production Information Functional description Page 5 of 50 Qb Ox SARA U2 series Data Sheet 1 3 Block diagram NN E E Power On ANT Reset Switch RF i i E gt i i Transceiver E E SIM SIM card detection Duplexer Filter UART Cellular BaseBand E USB Processor Memory gt DDC 1C VCC Supply Digital audio 125 V_BCKP RTC Power GPIO lt lt gt Management V_INT VO 9 Antenna detection Figure 1 SARA U260 and SARA U270 block diagram 26 MHz 32 kHz LNA d d Power On S Duplexer Switch a RF 2 ZS Ez Filter 3G PA
4. 3GPP Release 7 Enhanced Data rate GSM Evolution EDGE GSM EGPRS Radio Access GERA Time Division Multiple Access TDMA Dual band support SARA U260 GSM 850 MHz PCS 1900 MHz SARA U270 E GSM 900 MHz DCS 1800 MHz GSM GPRS EDGE Power Class Power Class 4 33 dBm for GSM E GSM bands Power Class 1 30 dBm for DCS PCS bands PS Packet Switched data rate GPRS multi slot class 12 CS1 CS4 up to 85 6 kb s DL UL EDGE multi slot class 12 MCS1 MCS9 up to 236 8 kb s DL MCS1 MCS4 up to 70 4 kb s UL CS Circuit Switched data rate GSM CS data up to 9 6 kb s DL UL supported in transparent non transparent mode Operation modes to Ill are supported on GSM GPRS networks with user defined preferred service selectable from GSM to GPRS Paging messages for GSM calls can be optionally monitored during GPRS data transfer in not coordinating NOM II Ill Direct Link mode is supported for TCP and UDP sockets Supported only by SARA U260 and SARA U270 modules Device can work simultaneously in Packet Switch and Circuit Switch mode voice calls are possible while the data connection is active without any interruption in service Device can be attached to both GPRS and GSM services i e Packet Switch and Circuit Switch mode using one service at a time If for example during data transmission an incoming call occurs the data connection is suspended to allow the voice communication Once the voice call has terminated the data servi
5. Pin disabled Description GSM transmit slot indication Enable disable the supply of the u blox GNSS receiver connected to the cellular module Sense when the u blox GNSS receiver connected to the cellular module is ready for sending data over the DDC CH interface RTC synchronization signal to the u blox GNSS receiver connected to the cellular module SIM card physical presence detection SIM card hot insertion removal Network status registered 2G 3G home network registered 2G 3G roaming 2G 3G data transmission no service odule status power off mode i e module switched off versus idle active or connected mode i e module switched on odule operating mode idle mode versus active or connected mode e digital audio interface I2S_RXD 12S_TXD 125_CLK DS WA respectively nput to sense high or low digital level Output to set the high or the low digital level Tri state with an internal active pull down enabled Table 5 GPIO custom functions configuration UBX 13005287 RO4 Module SARA U260 SARA U270 A Early Production Information Default GPIO SIM_DET 125_RXD 125_TXD 125_CLK DS WA Configurable GPIOs GPIO1 PIO1 GPIO2 PIO3 GPIO4 IM_DET PIO3 aA YAD GPIO4 SIM_DET SIM_DET GPIO1 GPIO2 GPIO3 GPIO4 SIM_DET GPIO1 SIM_DET 125_RXD 125_TXD 125_CLK DS WA All All All Interfaces Page 16 of 50 QMbiox 3 Pin definiti
6. Generic Digital Interfaces Dis viii 28 AO USB DiS radar dietetica 38 EE A O on ce ete 39 5 Mechanical specifications cardinal dinamicas andina daa 40 6 Reliability tests and approvals Seen 41 6 1 STEE 41 elei 41 7 Product handling amp soldering ooccccconnnccconnnanccccnnnnnanencnnnnnnnnnonnnnnnnn nn nnnnnnnr rca 42 7 1 PACK eG IG EE 42 7 1 1 PROCS a E E 42 7 1 2 ET 43 7 2 Mo oist re Sensitivity Level Socios iii EAE E 43 7 3 e Ee lee D A4 7 4 ESD precaugons ttit ttit ttrt tt tett ES tEEAEEEESEEASEEESEEEAEEESEEEAEEEESEEESEEEEEEESEEEE EEEE EEEN EEEE EEEE EErEE EErEE 44 8 Default settings mena 45 9 Labeling and ordering Information een 46 9 1 PrOGUCH la DOIN dui alain 46 9 2 Explanation of code 46 a o ddanulah baste gaderanacbi AREAN EE 47 APPEAR 48 EN 48 Related docu MB Sinai ii 49 Revisi n Mito aa 49 CO o 50 UBX 13005287 RO4 Early Production Information Contents Page 4 of 50 Qb Ox SARA U2 series Data Sheet 1 Functional description 1 1 Overview The SARA U2 series modules are a 3 75G UMTS HSPA solution in the miniature 26 0 x 16 0 mm SARA LGA form factor that allows seamless drop in migration from u blox SARA G3 series GSM GPRS modules and easy migration to u blox LISA U series UMTS HSPA modules u blox LISA C2 series CDMA modules and to u blox TOBY L series LTE modules SARA U2 modules feature HSPA data rates of 7 2 Mb s downlink and 5 76 Mb s uplink The modules offer data and voice communication
7. VUSB_DET USB detection pin nput DC voltage at VUSB_DET pin 0 30 5 35 V USB USB D D pins nput DC voltage at USB_D and USB_D pins 1 00 5 35 V V_BCKP RTC supply voltage nput DC voltage at V_BCKP pin 0 15 2 00 V GDI Generic digital interfaces nput DC voltage at Generic digital interfaces pins 0 30 3 60 V DDC DDC interface nput DC voltage at DDC interface pins 0 30 3 60 V SIM SIM interface nput DC voltage at SIM interface pin 0 30 3 60 V ERS External reset signal nput DC voltage at RESET_N external reset pin 0 15 2 10 V POS Power on signal nput DC voltage at PWR_ON power on pin 0 30 5 50 V ADC Antenna detection pin nput DC voltage at ANT_DET pin 0 15 3 00 V P_ANT Antenna power nput RF power at ANT pin 10 dBm Rho_ANT Antenna ruggedness Output RF load mismatch ruggedness at ANT pin 15 1 VSWR Tstg Storage Temperature 40 90 C Table 7 Absolute maximum ratings A The product is not protected against overvoltage or reversed voltages If necessary voltage spikes exceeding the power supply voltage specification given in table above must be limited to values within the specified boundaries by using appropriate protection devices 4 1 1 Maximum ESD Parameter Module Min Typ Max Unit Remarks ESD sensitivity for all pins except 1000 V Human Body Model according to JESD22 A114F ANT pin ESD sensitivity for ANT pin 1000 V Human Body Model according to JESD22 A114F ESD immunity for ANT pin 2000 V Contact Discharge according to IEC 61000 4 2 4000
8. and the application processor Data Terminal Equipment allowing simultaneous sessions over the UART physical link the user can concurrently use AT command interface on one MUX channel and Data communication on another MUX channel Each session consists of a stream of bytes transferring various kinds of data such as SMS CBS PSD GNSS AT commands in general SARA U2 modules provide the following virtual channels Channel 0 control channel Channel 1 5 AT commands data connection Channel 6 GNSS tunneling Channel 7 SAP SIM Access Profile For more details see the Mux Implementation Application Note 9 2 5 2 Universal Serial Bus USB SARA U2 modules include a high speed USB 2 0 compliant interface with maximum throughput of 480 Mb s The module itself acts as a USB device and can be connected to any USB host The USB is the suitable interface for transferring high speed data between SARA U2 series and a host processor available for AT commands data communication FW upgrade by means of the FOAT feature FW upgrade by means of the u blox EasyFlash tool and for diagnostic purpose Signals USB_D USB_D carry the USB serial data and signaling The USB interface is automatically enabled by an external valid USB VBUS supply voltage 5 0 V typical applied on the VUSB_DET pin SARA U2 modules provide by default 7 USB CDCs Communications Device Class USB1 AT and Data USB2 AT and Data USB3 AT and Data USB4 GNSS tunneling USB5
9. 3 752 0 867 0 818 7 Early Production Information Unit kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz kHz us us us us us us us us us us us us us us us us us us us us us us us us us us us us us us us us us us SARA U2 series Data Sheet Remarks lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt lt SS lt lt lt lt lt lt SS lt lt lt lt lt lt lt lt lt lt 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 l
10. Directive 2002 95 EC of the European Parliament and the Council on the Restriction of Use of certain Hazardous Substances in Electrical and Electronic Equipment RoHS SARA U2 modules are ROHS compliant No natural rubbers hygroscopic materials or materials containing asbestos are employed Table 29 lists the SARA U2 series main approvals Regulatory Standard Operator SARA U260 00S SARA U270 00S SARA U280 00S SARA U290 00S SARA U290 60S GCF Global Certification Forum PTCRB Personal communications service Type Certification Review Board R amp TTE Radio amp Telecommunications Terminal Equipment EU Directive CE Conformit Europ enne European Conformity FCC United States Federal Communications Commission IC Industry Canada e e SoftBank Japanese network operator Table 29 SARA U2 series main certification approvals L For all the certificates of compliancy and for the complete list of approvals including countries and network operators approvals of SARA U2 series modules see our website http Avww u blox com UBX 13005287 RO4 Early Production Information Reliability tests and approvals Page 41 of 50 Qb Ox SARA U2 series Data Sheet 7 Product handling amp soldering 7 1 Packaging SARA U2 modules are delivered as hermetically sealed reeled tapes to enable efficient production production lot set up and tear down For more information about packaging see u blox Package In
11. EGSM 900 580 mA DCS 1800 360 mA PCS 1900 340 mA A 0 9 mA A 1 3 mA A 1 7 mA A 14 1 mA A 33 6 mA Band 2100 145 mA Band II 1900 150 mA Band V 850 140 mA Band VIII 900 140 mA Band 2100 610 mA Band II 1900 640 mA Band V 850 560 mA Band VIII 900 590 mA Band 2100 690 mA Band II 1900 720 mA Band V 850 640 mA Band VIII 900 670 mA Band 2100 585 mA Band II 1900 615 mA Band V 850 535 mA Band VIII 900 565 mA Table 12 VCC current consumption Typical values with a matched antenna Maximum values with a mismatched antenna 1 Module is registered with the network with a paging period of 2 12 s 2G network DRX setting 9 with none neighbour cell 1 Module is registered with the network with a paging period of 1 18 s 2G network DRX setting 5 with 16 neighbour cells Y It is recommended to use this figure to dimension maximum current capability of power supply Condition for GPRS multi slot output power Multi Slot Power Reduction profile 2 UDCONF 40 AT command default value Module is registered with the network with a paging period of 5 12 s 3G network DRX setting 9 2 Module is registered with the network with a paging period of 1 28 s 3G network DRX setting 7 UBX 13005287 RO4 Early Production Information Electrical specifications Page 24 of 50 Qb Ox SARA U2 series Data Sheet 4 2 4 RF characteristics Parameter Min Max Unit Remar
12. Input voltage at VCC must be above the normal operating range minimum limit to switch on the module Occasional deviations from the 3GPP specifications may occur Ensure that input voltage at VCC never drops below the extended operating range minimum limit during module operation the module may switch off when the VCC voltage value drops below the extended operating range minimum limit UBX 13005287 RO4 Early Production Information Electrical specifications Page 23 of 50 biox 4 2 3 Current consumption Mode Power Off Mode 2G Cyclic Idle Active Mode Power Saving enabled by AT UPSV Module registered with network 2G Active Mode Power Saving disabled by AT UPSV Module registered with network GSM Connected Mode Tx Rx call enabled GPRS Connected Mode Tx Rx call enabled 3G Cyclic Idle Active Mode Power Saving enabled by AT UPSV Module registered with network 3G Active Mode Power Saving disabled by AT UPSV Module registered with network UMTS Connected Mode Tx Rx call enabled HSDPA Connected Mode Tx Rx call enabled HSUPA or HSPA Connected Mode Tx Rx call enabled Condition Averaged current module switched off Averaged current DRX 9 AT UPSV 2 or 3 USB interface disconnected Averaged current DRX 5 AT UPSV 1 USB interface disconnected Averaged current DRX DT AT UPSV 1 USB interface connected and suspended Averaged current DRX DT AT UPSV 0 USB interface
13. Transceiver l SIM SIM card detection Reset ANT UART Cellular BaseBand USB Processor Memory gt DDC 12C Digital audio 12S VCC Supply V_BCKP RTC Power GPIO A Management Antenna detection V_INT 1 0 Figure 2 SARA U280 and SARA U290 block diagram UBX 13005287 RO4 Early Production Information Functional description Page 6 of 50 QMbiox 1 4 Product description SARA U2 series Data Sheet SARA U2 series modules provide variants to support different band combinations for specific regions SARA U260 and SARA U280 are mainly designed for operation in America SARA U270 and SARA U290 are mainly designed for operation in Europe Asia and other countries 3G UMTS HSDPA HSUPA characteristics Class A User Equipment 3GPP Release 7 High Speed Packet Access HSPA UMTS Terrestrial Radio Access UTRA Frequency Division Duplex FDD Dual band support SARA U260 and SARA U280 Band V 850 MHz Band II 1900 MHz SARA U270 and SARA U290 Band VIII 900 MHz Band 2100 MHz WCDMA HSDPA HSUPA Power Class Power Class 3 24 dBm for WCDMA HSDPA HSUPA mode PS Packet Switched data rate HSUPA category 6 up to 5 76 Mb s UL HSDPA category 8 up to 7 2 Mb s DL WCDMA PS data up to 384 kb s DL UL CS Circuit Switched data rate WCDMA CS data up to 64 kb s DL UL Table 2 SARA U2 series 3G and 2G characteristics 2G GSM GPRS EDGE characteristics Class B Mobile Station
14. V Air Discharge according to IEC 61000 4 2 Table 8 Maximum ESD ratings A SARA U2 modules are Electrostatic Sensitive Devices ESD and require special precautions when handling See section 7 4 for ESD handling instructions UBX 13005287 R04 Early Production Information Electrical specifications Page 21 of 50 Qb Ox SARA U2 series Data Sheet 4 2 Operating conditions L Unless otherwise indicated all operating condition specifications are at an ambient temperature of 25 C A Operation beyond the operating conditions is not recommended and extended exposure beyond them may affect device reliability 4 2 1 Operating temperature range Symbol Parameter Min Typ Max Units Remarks Topr Operating temperature range 40 85 C 20 55 C Normal operating temperature range See section 4 2 1 1 40 20 KS Extended operating temperature range 1 See section 4 2 1 2 65 85 KS Extended operating temperature range 2 See section 4 2 1 3 Table 9 Environmental conditions 4 2 1 1 Normal operating temperature range The cellular module is fully functional and meets the 3GPP specification across the specified temperature range 4 2 1 2 Extended operating temperature range 1 The cellular module is fully functional across the specified temperature range Occasional deviations from the 3GPP specification may occur 4 2 1 3 Extended operating temperature range 2 The cellular module is functional across the specified
15. disconnected Averaged current DRX DT AT UPSV 0 USB interface connected and not suspended Peak current during a 1 slot Tx burst Maximum Tx power 32 5 dBm typ Averaged current 1 Tx 1 Rx slot Maximum Tx power 32 5 dBm typ Averaged current 1 Tx 1 Rx slot Maximum Tx power 29 5 dBm typ Averaged current 4 Tx 1 Rx slots Maximum Tx power 30 5 dBm typ Averaged current 4 Tx 1 Rx slots Maximum Tx power 27 5 dBm typ Averaged current DRX 9 AT UPSV 2 or 3 USB interface disconnected Averaged current DRX 7 AT UPSV 1 USB interface disconnected Averaged current DRX 7 AT UPSV 1 USB interface connected and suspended Averaged current DRX 7 AT UPSV 0 USB interface disconnected Averaged current DRX 7 AT UPSV 0 USB interface connected and not suspended Averaged current 12 2 kb s UL 12 2 kb s DL Tx power 0 dBm Averaged current 12 2 kb s UL 12 2 kb s DL Maximum Tx power 22 5 dBm typ Averaged current Max DL data rate HSDPA Maximum Tx power 22 5 dBm typ Averaged current Max UL data rate HSUPA or Maximum both UL and DL data rates HSPA Maximum Tx power 21 0 dBm typ SARA U2 series Data Sheet Band Min Typ Max Unit 65 yA A 0 9 mA A 1 2 mA A 1 6 mA A 14 7 mA A 34 3 mA GSM 850 1 50 1 90 A EGSM 900 1 55 1 90 A GSM 850 200 mA EGSM 900 215 mA DCS 1800 140 mA PCS 1900 130 mA GSM 850 540 mA
16. lower predefined threshold Shutdown notified and forced when the temperature value is outside the specified range shutdown suspended in case of an emergency call in progress The feature can be enabled or disabled through the USTS AT command Le The sensor measures board temperature inside the shield which can differ from ambient temperature In Band modem solution for eCall and ERA GLONASS emergency call applications over cellular networks implemented according to the 3GPP TS 26 267 specification 7 When activated the in vehicle eCall ERA GLONASS system IVS creates an emergency call carrying both voice and data including vehicle position data directly to the nearest Public Safety Answering Point PSAP to determine whether rescue services should be dispatched to the known position During a voice call the Dual Tone Multi Frequency detector analyses the RX speech coming from the remote party The detected DTMF symbols can be output via the related URC For more details see the UDTMFD AT command Audio over USB capabilities can be enabled by specific AT command see the u blox AT Commands Manual 4 the Audio Device Class provides a streaming interface which transfers audio data on isochronous pipes The power saving configuration is by default disabled but it can be configured using an AT command When power saving is enabled the module automatically enters the low power idle mode whenever possible reducing current consum
17. over an extended operating temperature range of 40 to 85 C with low power consumption and a rich feature set including dual stack IPv4 IPv6 The SARA U2 series include variants supporting band combination for North America and band combination for Europe Asia and other countries For each combination a complete UMTS GSM variant and a cost saving UMTS only variant are available SARA U2 modules are complete fully qualified and certified solutions which reduce costs and enable short time to market They are ideally suited to M2M and automotive applications such as mobile Internet terminals car infotainment and telematics Automatic Meter Reading AMR Remote Monitoring Automation and Control RMAC surveillance and security road pricing asset tracking fleet management anti theft systems and Point of Sales PoS terminals SARA U2 modules support full access to u blox GNSS receivers via serial port Thus any host processor connected to the cellular module through a single serial port can control both the cellular module and the positioning chip module The compact SARA 26 0 x 16 0 mm form factor with LGA pads functionally referred to as pins allows fully automated assembly with standard pick amp place and reflow soldering equipment for cost efficient high volume production 1 2 Product features Module Data rate Bands Interfaces Audio Functions A o o n 222 5 8E4 v Be e ooo n FE 2 5 Z N N S S 5 5 a 5 2 2
18. power for RMC at maximum power Condition for GPRS multi slot output power Multi Slot Power Reduction profile 2 UDCONF 40 AT command default value Table 15 Transmitter maximum output power 4 2 5 ANT_DET pin Pin Name Parameter ANT_DET Output DC current pulse value Output DC current pulse time length Table 16 ANT_DET pin characteristics UBX 13005287 RO4 Min Typ 10 128 Max Unit Remarks yA us Early Production Information Electrical specifications Page 26 of 50 VP biox 4 2 6 PWR_ON pin Pin Name Parameter PWR_ON Internal supply for Power On Input Signal L level input H level input L level input current PWR_ON low time to switch on the module PWR_ON low time to switch off the module Min Typ 1 71 1 80 0 30 1 50 6 50 1000 Table 17 PWR_ON pin characteristics POS domain 4 2 7 RESET_N pin Pin Name Parameter RESET_N Internal supply for External Reset Input Signal L level input H level input L level input current Pull up resistance RESET_N low time to perform a proper reset Min Typ 1 71 1 80 0 30 1 32 180 10 50 Table 18 RESET_N pin characteristics ERS domain 4 2 8 U SIM pins Max 1 89 0 65 4 40 80 Max 1 89 0 51 2 01 Unit yA us ms Unit SARA U2 series Data Sheet Remarks RTC supply V_BCKP High input impedance no internal pull up High input impedance no internal pull up Remarks RTC supp
19. to this document and the information contained herein Products names logos and designs described herein may in whole or in part be subject to intellectual property rights Reproduction use modification or disclosure to third parties of this document or any part thereof without the express permission of u blox is strictly prohibited The information contained herein is provided as is and u blox assumes no liability for the use of the information No warranty either express or implied is given including but not limited with respect to the accuracy correctness reliability and fitness for a particular purpose of the information This document may be revised by u blox at any time For most recent documents please visit www u blox com Copyright O 2014 u blox AG Trademark Notice Microsoft and Windows are either registered trademarks or trademarks of Microsoft Corporation in the United States and or other countries All other registered trademarks or trademarks mentioned in this document are property of their respective owners UBX 13005287 RO4 Page 2 of 50 Qb Ox SARA U2 series Data Sheet Contents Contents cean a 3 1 Functional desc 5 Ne E 5 1 2 Product features ooo eee ccccccccecccseeccececsseeecsseccseeecsseeecsseessseeeseeecsseeecsseeseescseeecsssescsaeectsesestescseeseeeenas 5 LS Block diagramon a a T EE ge 6 1 4 Prod ct descripto Mics errada atra 7 1 5 2ATCOMMANA RT ele 8 L Supported Tetu ees at iii eege ees 9
20. 02 0 02 0 8 0 8 mil K Horizontal Edge to Central Pin Pitch mm 2 75 108 3 mil 0 20 0 20 7 9 7 9 mil L Vertical Edge to Central Pin Pitch mm 2 75 108 3 mil 0 20 0 20 7 9 7 9 mil M1 Central Pin to Pin Horizontal Pitch mm 1 8 70 9 mil 0 02 0 02 0 8 0 8 mil M2 Central Pin to Pin Horizontal Pitch mm 3 6 141 7 mil 0 02 0 02 0 8 0 8 mil N Central Pin to Pin Vertical Pitch mm 2 1 82 7 mil 0 02 0 02 0 8 0 8 mil O Central Pin Height and Width mm Tal 43 3 mil 0 02 0 02 0 8 0 8 mil P Horizontal Edge to Pin 1 Indicator Pitch mm 0 9 35 4 mil 0 20 0 20 7 9 7 9 mil Q Vertical Edge to Pin 1 Indicator Pitch mm 1 0 39 4 mil 0 20 0 20 7 9 7 9 mil R Pin 1 Indicator Height and Width mm 0 6 23 6 mil 0 02 0 02 0 8 0 8 mil Weight Module Weight g lt 3 Table 28 SARA U2 series dimensions L For information regarding Footprint and Paste Mask see the SARA G3 and SARA U2 series System Integration Manual 5 UBX 13005287 RO4 Early Production Information Mechanical specifications Page 40 of 50 Qb Ox SARA U2 series Data Sheet 6 Reliability tests and approvals 6 1 Reliability tests Tests for product family qualifications are according to ISO 16750 Road vehicles Environmental conditions and testing for electrical and electronic equipment and appropriate standards 6 2 Approvals Products marked with this lead free symbol on the product label comply with the
21. 8 us lt l2S_mode gt 1 lt I2S_sample_rate gt 4 2 311 2 315 us lt l2S_mode gt 0 lt I2S_sample_rate gt 5 2 447 2451 us lt l2S_mode gt 1 lt I2S_sample_rate gt 5 1 732 1 736 us lt l2S_mode gt 0 lt I2S_sample_rate gt 6 1 834 1 838 us lt l2S_mode gt 1 lt I2S_sample_rate gt 6 1 256 1 260 us lt l2S_mode gt 0 lt I2S_sample_rate gt 7 1 330 1 334 us lt l2S_mode gt 1 lt l2S_sample_rate gt 7 1 153 1 157 us lt l2S_mode gt 0 lt I2S_sample_rate gt 8 1 221 1 225 us lt l2S_mode gt 1 lt I2S_sample_rate gt 8 UBX 13005287 R04 Early Production Information Electrical specifications Page 33 of 50 biox Parameter Description 1 11 PS clock frequency T2 PS clock low time T3 PS clock high time UBX 13005287 R04 Min 3 452 3 656 2 500 2 648 2 295 2 431 1 716 1 818 1 240 1 314 1 137 1 205 0 848 0 899 0 610 0 647 0 559 0 593 3 452 3 656 2 500 2 648 2 295 2 431 1 716 1 818 1 240 1 314 1 137 1 205 0 848 0 899 0 610 0 647 Typ 144 0 136 0 198 5 187 4 216 0 204 0 288 0 272 0 396 9 374 9 432 0 408 0 576 0 544 0 793 8 749 7 864 0 816 0 3 472 3 676 2 520 2 668 2 315 2 451 1 736 1 838 1 260 1 334 1 157 1 225 0 868 0 919 0 630 0 667 0 579 0 613 3 472 3 676 2 520 2 668 2 315 2 451 1 736 1 838 1 260 1 334 1 157 1 225 0 868 0 919 0 630 0 667 Max 144 1 136 1 198 6 187 6 216 2 204 2 288 3 272 3 397 5 375 4 432 7 408 7 577 3 545 2 796
22. 90 70 us lt I2S_sample_rate gt 1 83 33 us lt I25_sample_rate gt 2 62 50 us lt I2S_sample_rate gt 3 45 35 us lt I2S_sample_rate gt 4 41 67 us lt I2S_sample_rate gt 5 31 25 us lt I2S_sample_rate gt 6 22 68 us lt I2S_sample_rate gt 7 20 83 us lt I2S_sample_rate gt 8 PS word alignment frequency 8 000 kHz lt I2S_sample_rate gt 0 11 03 kHz lt I2S_sample_rate gt 1 12 00 kHz lt I2S_sample_rate gt 2 16 00 kHz lt I2S_sample_rate gt 3 22 05 kHz lt I2S_sample_rate gt 4 24 00 kHz lt I2S_sample_rate gt 5 32 00 kHz lt I2S_sample_rate gt 6 44 10 kHz lt I2S_sample_rate gt 7 48 00 kHz lt I2S_sample_rate gt 8 T4 S WA high begin before Va CLK low begin 36 ns lt I25_mode gt 0 latching edge of Ve CLK T5 S WA low begin before I S CLK low begin 36 ns lt I2S_mode gt 0 latching edge of Va CLK T6 e TXD invalid before IS CLK rising edge 12 ns lt I2S_mode gt 0 shifting edge of Ve CLK T7 S TXD valid after I S CLK rising edge 79 ns lt I2S_mode gt 0 shifting edge of S CLK T8 e RXD setup time before I S CLK falling edge 22 ns lt I2S_mode gt 0 latching edge of S CLK T9 e RXD hold time after Va CLK falling edge 24 ns lt I25_mode gt 0 latching edge of S CLK Table 24 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 0 1 and Slave mode enabled UBX 13005287 RO4 Early Production Information Electrical specifications Page 37 of 50 Qb Ox SARA U2 series Data S
23. MSD in accordance to the IPC JEDEC specification The Moisture Sensitivity Level MSL relates to the packaging and handling precautions required SARA U2 modules are rated at MSL level 4 For more information regarding moisture sensitivity levels labeling storage and drying see the u blox Package Information Guide 12 LS For MSL standard see IPC JEDEC J STD 020 can be downloaded from http Awww jedec org UBX 13005287 RO4 Early Production Information Product handling amp soldering Page 43 of 50 Qb Ox SARA U2 series Data Sheet 7 3 Reflow soldering Reflow profiles are to be selected according to u blox recommendations see SARA G3 and SARA U2 series System Integration Manual 5 A Failure to observe these recommendations can result in severe damage to the device 7 4 ESD precautions A SARA U2 modules contain highly sensitive electronic circuitry and are Electrostatic Sensitive Devices ESD Handling SARA U2 modules without proper ESD protection may destroy or damage them permanently SARA U2 modules are Electrostatic Sensitive Devices ESD and require special ESD precautions typically applied to ESD sensitive components Table 8 reports the maximum ESD ratings of the SARA U2 module Proper ESD handling and packaging procedures must be applied throughout the processing handling and operation of any application that incorporates SARA U2 module ESD precautions should be implemented on the application board whe
24. ND GPIO2 GPIO3 GPIO4 SDA SCL USB_D USB_D GND RSVD GND RSVD 125_WA 125_TXD 125_CLK Power domain GDI GDI GDI GDI DDC DDC USB USB GDI GDI GDI UO N A N A N A 1 0 1 0 1 0 1 0 1 0 1 0 N A N A N A N A 1 0 1 0 O 1 0 1 0 1 0 Description Clock output Ground Ground Ground GPIO GPIO GPIO FC bus data line FC bus clock line USB Data Line D USB Data Line D Ground RESERVED pin Ground RESERVED pin PS word alignment GPIO PS transmit data GPIO PS clock GPIO Early Production Information SARA U2 series Data Sheet Remarks Output driver class B PU PD class b Value at internal reset T PD See section 4 2 9 for detailed electrical specs All the GND pins must be connected to ground All the GND pins must be connected to ground All the GND pins must be connected to ground GPIO configurable as described in Table 5 Output driver class A PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs GPIO configurable as described in Table 5 Output driver class A PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs GPIO configurable as described in Table 5 Output driver class A PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Fixed open drain No internal pull
25. Primary Log diagnostic purpose USB6 Secondary Log diagnostic purpose USB7 SAP SIM Access Profile UBX 13005287 RO4 Early Production Information Interfaces Page 14 of 50 Qb Ox SARA U2 series Data Sheet The user can concurrently use the AT command interface on one CDC and Packet Switched Circuit Switched Data communication on another CDC Audio over USB capabilities can be enabled by specific AT command see u blox AT Commands Manual 4 the Audio Device Class provides a streaming interface which transfers audio data on isochronous pipes L The USB Audio Device Class is not supported by initial firmware release USB CDC ACM drivers are available for the following operating system platforms Windows 2000 Windows XP Windows Vista Windows 7 Windows 8 Windows CE 5 0 Windows Embedded CE 6 0 Windows Embedded Compact 7 Windows Embedded Automotive 7 Windows Mobile 5 Windows Mobile 6 Windows Mobile 6 1 Windows Mobile 6 5 SARA U2 modules are compatible with standard Linux Android USB kernel drivers 2 5 3 DDC I C bus interface SARA U2 modules include an UC compatible DDC interface SDA SCL available to communicate with a u blox GNSS receiver and with external UC devices as an audio codec SARA U2 module acts as an FC master which can communicate with I C slaves in accordance to the I C bus specifications 10 2 6 Audio SARA U2 modules have one 4 wire I S digital audio interface I2S_CLK 12S_RXD 12S_TXD
26. RA U2 series Data Sheet Parameter Description Min Typ Max Unit Remarks 0 559 0 579 us lt l2S_mode gt 0 lt I2S_sample_rate gt 8 0 593 0 613 us lt I2S_mode gt 1 lt I2S_sample_rate gt 8 PS word alignment period 125 0 us lt I2S_sample_rate gt 0 90 70 us lt I2S_sample_rate gt 1 83 33 us lt I2S_sample_rate gt 2 62 50 us lt I2S_sample_rate gt 3 45 35 us lt I2S_sample_rate gt 4 41 67 us lt I2S_sample_rate gt 5 31 25 us lt I2S_sample_rate gt 6 22 68 us lt I2S_sample_rate gt 7 20 83 us lt I2S_sample_rate gt 8 PS word alignment frequency 8 000 kHz lt I2S_sample_rate gt 0 11 03 kHz lt I2S_sample_rate gt 1 12 00 kHz lt I2S_sample_rate gt 2 16 00 kHz lt I2S_sample_rate gt 3 22 05 kHz lt I2S_sample_rate gt 4 24 00 kHz lt I2S_sample_rate gt 5 32 00 kHz lt I2S_sample_rate gt 6 44 10 kHz lt I2S_sample_rate gt 7 48 00 kHz lt I2S_sample_rate gt 8 T4 CS CLK high begin to Ta WA high begin 24 32 ns lt I2S_mode gt 0 T5 CS CLK low end to TS WA high end 24 32 ns lt I2S_mode gt 0 T6 Ve TXD invalid before S CLK low end 24 ns lt I2S_mode gt 0 TZ S TXD valid after IS CLK high begin 22 ns lt 2S_mode gt 0 T8 PS RXD setup time before S CLK highend 60 ns lt I2S_mode gt 0 T9 PS RXD hold time after IS CLK low begin 12 ns lt I2S_mode gt 0 Table 23 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 0 1 and Master mode enabled UBX 13005287 RO4 Early Production Inf
27. RTC 2 1 3 Generic digital interfaces supply V_INT SARA U2 modules provide a 1 8 V supply rail output on the V_INT pin which is internally generated when the module is switched on The same voltage domain is used internally to supply the generic digital interfaces of the modules The V_INT supply output can be used in place of an external discrete regulator optimizing the bill of material for various applications e g with u blox GNSS receivers operating at 1 8 V 2 2 Antenna 2 2 1 Antenna RF interface ANT The ANT pin has an impedance of 50 Q and provides the RF antenna interface of SARA U2 modules 2 2 2 Antenna detection ANT_DET The ANT_DET pin is an Analog to Digital Converter ADC input to sense the antenna presence as optional feature evaluating the resistance from the ANT pin to GND by means of an external antenna detection circuit implemented on the application board for more details see the SARA G3 and SARA U2 series System Integration Manual 5 and the u blox AT Commands Manual 4 UANTR 2 3 System functions 2 3 1 Module power on SARA U2 modules can be switched on in one of the following ways Rising edge on VCC pins to a valid voltage for module supply i e applying module supply Low pulse on PWR_ON pin i e forcing the pin normally high with external pull up to a low level for a valid time period see section 4 2 6 PWR_ON pin requires an external pull up resistor to set its value to logic high and may
28. al ready UART ready to send UART clear to send UART data input UART data output Ground Power on input GPIO USB detect input External reset input Early Production Information SARA U2 series Data Sheet Remarks All the GND pins must be connected to ground V_BCKP 1 8 V typical generated by the module to supply the Real Time Clock when VCC supply voltage is within valid operating range See section 4 2 2 for detailed electrical specs All the GND pins must be connected to ground V_INT 1 8 V typical generated by the module when it is switched on and the RESET_N external reset input pin is not forced to the low level See section 4 2 2 for detailed electrical specs All the GND pins must be connected to ground Circuit 107 DSR in ITU T V 24 Output driver class D PU PD class a Value at internal reset T PU See section 4 2 9 for detailed electrical specs Circuit 125 RI in ITU T V 24 Output driver class C_0 PU PD class c Value at internal reset T PD See section 4 2 9 for detailed electrical specs Circuit 109 DCD in ITU T V 24 Output driver class C_0 PU PD class c Value at internal reset T PD See section 4 2 9 for detailed electrical specs Circuit 108 2 DTR in ITU T V 24 Internal active pull up to V_INT enabled PU PD class c Value at internal reset T PD See section 4 2 9 for detailed electrical specs Circuit 105 RTS in ITU T V 24 Internal active pull up to V_INT enabl
29. ample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra e gt 0 e gt 1 e gt 1 e gt 2 125_sample_rate gt 2 e gt 3 e gt 3 e gt 4 e gt 4 e gt 5 e gt 5 e gt 6 e gt 6 e gt 7 e gt 7 e gt 8 e gt 8 Electrical specifications Page 36 of 50 QMbiox SARA U2 series Data Sheet Parameter Description Min Typ Max Unit Remarks 1 71 PS clock frequency 144 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 0 136 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 0 198 5 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 1 187 4 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 1 216 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 2 204 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 2 288 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 3 272 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 3 396 9 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 4 374 9 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 4 432 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 5 408 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 5 576 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 6 544 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 6 793 8 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 7 749 7 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 7 864 0 kHz lt I2S_mode gt 0 lt I2S_sample_rate gt 8 816 0 kHz lt I2S_mode gt 1 lt I2S_sample_rate gt 8 PS word alignment period 125 0 us lt I2S_sample_rate gt 0
30. and I2S_WA that can be configured by AT commands in PCM or in normal I S mode For more details see the u blox AT Commands Manual 4 and the SARA G3 and SARA U2 series System Integration Manual 5 SARA U2 modules provide a digital clock output CODEC_CLK for an external audio codec Audio over USB capabilities can be enabled by specific AT command see u blox AT Commands Manual 4 the Audio Device Class provides a streaming interface which transfers audio data on isochronous pipes L The USB Audio Device Class is not supported by initial firmware release UBX 13005287 RO4 Early Production Information Interfaces Page 15 of 50 QMbiox 2 7 GPIO SARA U2 series Data Sheet SARA U2 modules provide nine pins GPIO1 GPIO2 GPIO3 GPIO4 De RXD 12S_TXD I2S_CLK DS WA SIM_DET which can be configured as general purpose input output or to provide the custom functions listed in Table 5 via u blox AT commands For further details see the SARA G3 and SARA U2 series System Integration UGPIOC UGPIOR UGPIOW UGPS UGPRF Manual 5 and the u blox AT Commands Manual 4 USPM UDCONF 50 commands Function GSM Tx burst indication GNSS supply enable GNSS data ready GNSS RTC sharing S S card detection card hot insertion Network status indication odule status indication odule operating mode indication e digital audio interface General purpose input General purpose output
31. ary Log diagnostic purpose USB7 SAP SIM Access Profile Audio over USB capabilities can be enabled by specific AT command see the u blox AT Commands Manual 4 the Audio Device Class provides a streaming interface which transfers audio data on isochronous pipes not supported by initial firmware release AT amp K3 HW flow control enabled AT8 amp S1 DSR line set ON in data mode and set OFF in command mode AT amp D1 Upon an ON to OFF transition of DTR the module enters online command state and issues an OK result code AT amp C1 Circuit 109 changes in accordance with the Carrier detect status ON if the Carrier is detected OFF otherwise Power saving AT UPSV 0 Disabled Network registration AT COPS 0 Self network registration Table 32 SARA U2 series default settings See the u blox AT Commands Manual 4 and the SARA G3 and SARA U2 series System Integration Manual 5 for information about further settings UBX 13005287 RO4 Early Production Information Default settings Page 45 of 50 Qb l OX SARA U2 series Data Sheet 9 Labeling and ordering information 9 1 Product labeling The labels of SARA U2 series modules include important product information as described in this section Figure 16 illustrates the label of all the SARA U2 series modules and includes u blox logo production lot Pb free marking product Type Number IMEI number FCC and IC certification numbers if applicable CE marking with the Notified Body n
32. aster mode or as GPIO see Table 5 Output driver class C PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Pin definition Page 19 of 50 Qb Ox SARA U2 series Data Sheet Power domain 37 All 125_RXD GDI 1 PS receive data Configurable as Va receive data input with internal 1 0 GPIO active pull down enabled or as GPIO see Table 5 Output driver class C PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs 38 A SIM_CLK SIM O SIM clock Value at internal reset L See section 4 2 8 for detailed electrical specs 39 A SIM_IO SIM VO SIM data Internal 4 7 kQ pull up resistor to VSIM Value at internal reset L PD See section 4 2 8 for detailed electrical specs 40 A SIM_RST SIM O SIM reset Value at internal reset L See section 4 2 8 for detailed electrical specs 41 A VSIM O SIM supply output VSIM 1 80 V typical or 2 90 V typical generated by the module according to the SIM card type See section 4 2 2 for detailed electrical specs 42 A SIM_DET GDI l SIM detection Configurable for the SIM card presence detection function or as GPIO see Table 5 PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs No Module Name 1 0 Description Remarks 43 A GND N A Ground All the GND pins must be connected to ground 44 A RSVD N A RESERVED pin Leave uncon
33. atible interface available for the communication with u blox GNSS positioning chips modules and with external VC devices as an audio codec 2 5 1 Asynchronous serial interface UART The UART interface is a 9 wire 1 8 V unbalanced asynchronous serial interface provided for AT commands data communication FW upgrade by means of the FOAT feature FW upgrade by means of the u blox EasyFlash tool The UART features are Complete serial port with RS 232 functionality conforming to the ITU T V 24 Recommendation 8 with CMOS compatible signal levels 0 V for low data bit or ON state and 1 8 V for high data bit or OFF state Data lines RxD as output TxD as input hardware flow control lines CTS as output RTS as input modem status and control lines DTR as input DSR as output DCD as output RI as output are provided Hardware flow control default value software flow control or none flow control are supported Power saving indication available on the hardware flow control output CTS line the line is driven to the OFF state when the module is not prepared to accept data by the UART interface 1200 2400 4800 9600 19200 38400 57600 115200 230400 460800 and 921600 b s baud rates are supported for the AT interface Autobauding is by default enabled Frame format can be 8N2 8 data bits no parity 2 stop bits 8N1 8 data bits no parity 1 stop bit 8E1 8 data bits even parity 1 stop bit 801 8 data bits odd parity 1 stop
34. bit 7E1 7 data bits even parity 1 stop bit 701 7 data bits odd parity 1 stop bit Default frame configuration is 8N1 The UART serial interface can be conveniently configured through AT commands For more details see the u blox AT Commands Manual 4 IPR ICF IFC amp K AQ UPSV AT command and SARA G3 and SARA U2 series System Integration Manual 5 Z oO Oo 0 0 0 O Ka 1 If enabled UBX 13005287 RO4 Early Production Information Interfaces Page 13 of 50 Qb Ox SARA U2 series Data Sheet 2 5 1 1 Autobauding feature Only one shot autobauding is supported the baud rate detection is performed only once at module start up After detection the module works at the fixed baud rate the detected one and the baud rate can only be changed via the appropriate AT command IPR for more details see the u blox AT Commands Manual Tal The module detects the followings baud rates b s 1200 2400 4800 9600 19200 38400 57600 115200 230400 The only detectable frame configurations are 7E1 701 8N1 8E1 801 2 5 1 2 Multiplexer protocol SARA U2 module has a software layer with MUX functionality 3GPP TS 27 010 Multiplexer Protocol 3 available on the UART interface L The multiplexer protocol is supported over the UART physical interface only This is a data link protocol layer 2 of OSI model which uses HDLC like framing and operates between the cellular module Data Circuit terminating Equipment
35. ce is resumed 5 GPRS EDGE multi slot class determines the number of timeslots available for upload and download and thus the speed at which data can be transmitted and received with higher classes typically allowing faster data transfer rates GPRS multi slot class 12 implies a maximum of 4 slots in DL reception and 4 slots in UL transmission with 5 slots in total EDGE multi slot class 12 implies a maximum of 4 slots in DL reception and 4 slots in UL transmission with 5 slots in total UBX 13005287 RO4 Early Production Information Functional description Page 7 of 50 VP biox Basic features Display of Called Number ndication of Call Progress Signals Country PLMN Indication Country PLMN Selection nternational Access Function Service Indicator Emergency Calls Capabilities Dual Tone Multi Frequency DTMF Subscription Identity Management Service Provider Indication Abbreviated Dialing Fixed Number Dialing Barring of Dialed Numbers SIM Application Toolkit ME SIM lock SIM Access Profile Supplementary services Call Hold Resume HOLD Call Waiting CW Multi Party MTPY Call Forwarding CFU CFB CFNRy CFNRc Call Deflection CD Explicit Call Transfer ECT Call Barring BAOC BOIC BOIC exHC BAIC BIC_Roam Advice of Charge Charging AoCC AoC Calling Line Identification Presentation CLIP Calling Line Identification Restriction CLIR Connected Line Identificati
36. ding to the values proposed by the SIM card chip 2 4 2 SIM card detection SIM_DET The SIM_DET pin of SARA U2 modules is a 1 8 V digital input which is by default configured as an external interrupt to detect the SIM card presence as a feature which can be optionally used when it is properly connected to the mechanical switch of the SIM card holder for more details see SARA G3 and SARA U2 series System Integration Manual 5 The SIM_DET pin of SARA U2 modules can additionally be configured via AT command to provide the SIM card hot insertion removal function for more details see u blox AT Commands Manual 4 UDCONF 50 The SIM_DET pin of SARA U2 modules can additionally be configured via AT command as GPIO for more details see section 2 7 and the u blox AT Commands Manual 4 UGPIOC UGPIOR UGPIOW UBX 13005287 RO4 Early Production Information Interfaces Page 12 of 50 Qb Ox SARA U2 series Data Sheet 2 5 Serial interfaces SARA U2 modules provide the following serial communication interfaces UART interface asynchronous serial interface available for AT commands data communication FW upgrade by means of the FOAT feature FW upgrade by means of the u blox EasyFlash tool USB interface High Speed USB 2 0 compliant interface available for AT commands data communication FW upgrade by means of the FOAT feature FW upgrade by means of the u blox EasyFlash tool and for diagnostic purpose DDC interface IC comp
37. e Information document status Added VCC current consumption characteristics R04 18 Jul 2014 sses Early Production Information document status Added VCC current consumption characteristics for 3G Tx Rx connected modes UBX 13005287 RO4 Early Production Information Related documents Page 49 of 50 QMbiox Contact For complete contact information visit us at http www u blox com u blox Offices North Central and South America u blox America Inc Phone 1 703 483 3180 E mail info_usQu blox com Regional Office West Coast Phone 1 408 573 3640 E mail info_usQu blox com Technical Support Phone 1 703 483 3185 E mail support_us u blox com UBX 13005287 RO4 Headquarters Europe Middle East Africa u blox AG Phone 41 44 722 74 44 E mail info u blox com Support support u blox com Early Production Information SARA U2 series Data Sheet Asia Australia Pacific u blox Singapore Pte Ltd Phone 65 6734 3811 E mail info_ap u blox com Support support_ap u blox com Regional Office Australia Phone 61 2 8448 2016 E mail info_anz u blox com Support support_apQu blox com Regional Office China Beijing Phone 86 10 68 133 545 E mail info_cn u blox com Support support_cnOu blox com Regional Office China Shenzhen Phone 86 755 8627 1083 E mail info_cn u blox com Support support_cn u blox com Regional Office India Phone 91 959 1302 450 E mail info_in u bl
38. ed PU PD class a Value at internal reset T PU See section 4 2 9 for detailed electrical specs Circuit 106 CTS in ITU T V 24 Output driver class A PU PD class a Value at internal reset T PU See section 4 2 9 for detailed electrical specs Circuit 103 TxD in ITU T V 24 Internal active pull up to V_INT enabled PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Circuit 104 RxD in ITU T V 24 Output driver class A PU PD class a Value at internal reset T PU See section 4 2 9 for detailed electrical specs All the GND pins must be connected to ground The PWR_ON pin has high input impedance don t leave it floating in noisy environment an external pull up resistor is required See section 4 2 6 for detailed electrical specs GPIO configurable as described in Table 5 Output driver class A PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Input for VBUS 5 V typical USB supply sense See section 4 2 10 for detailed electrical specs Internal 10 kQ pull up resistor to V_BCKP See section 4 2 7 for detailed electrical specs Pin definition Page 18 of 50 QMbiox No 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 UBX 13005287 RO4 Module A ZS EE E All All All All All All All All All All Name CODEC_CLK GND GND G
39. er MAA 11 2 1 e gan e EE EE 11 2 1 1 Module supply DC 11 DAD RWS Se OC PY tc it 11 2 1 3 Generic digital interfaces supply ONT 11 22 o A and weil atone iene 11 2 2 1 Antenna RF interface ANT no nono ncnononn nono nono nn nono nono nn nn nn nn no nana nn EREEREER EEEE Eee 11 2 2 2 Antenna detection ANT DEI 11 23 SYSTEMITUMCLIONS ia aida 11 2 3 1 Module POWER sra lr td 11 2 3 2 Module power off ig cles pants ies 12 2 3 3 MAA A o E na deathnamntnde esp deantedelinmecsitis 12 A ON 12 2 4 1 UNSIM interface co circa sd c croacia died a dada UE acia dite cannes 12 2 4 2 SIM card detection GM D I 12 25 AAA A suc tenattcantertaia E 13 2 5 1 Asynchronous serial interface ART 13 2 5 2 Universal Serial BUSAUSB EE 14 2 5 3 DDC PC bus Interface 15 DAG PCO EE 15 Dede MGR EE 16 3 Pin definition scouts ica 17 3 1 SE ol E 17 4 Electrical specifications aiii 21 41 Absolute MAXIMUM PALIN iva arab 21 4 1 1 nn e E E A 21 4 2 ele Eelef leie EE ER 4 2 1 Operating temperature range tett rt ttrt strett Ee tEESEEESEEESEEESEEESSEESEEEn SESSE Ennen neeaae 22 A 2 2 Supply Power pims 23 UBX 13005287 RO4 Early Production Information Contents Page 3 of 50 Qb Ox SARA U2 series Data Sheet 423 Current CONSUMO Sst ecient eed we dees ic 24 ADA RE CMAraGteriSties iia es 25 4 2 5 ANT IDET Discipline 26 4 2 6 PWR ON DIN estaa caunbeadaneh bean tachonesdnabinnitaan eesahelanninn 27 4 2 7 EC CR DIN EEN 27 4 2 8 TN 27 42 9
40. er S CLK rising edge 10 ns lt I2S_mode gt 2 4 6 8 10 12 after latching edge of VS CLK PS RXD hold time after VS CLK falling edge 10 ns lt l2S_mode gt 3 5 7 9 11 13 after latching edge of VS CLK Table 22 AC characteristics of digital audio interface in Normal CS mode and Slave mode enabled UBX 13005287 RO4 Early Production Information Electrical specifications Page 32 of 50 Qb Ox SARA U2 series Data Sheet PCM mode Master mode WA Output CLK Output TXD Output RXD Input Figure 8 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 0 and Master mode enabled WA Output CLK Output TXD Output RXD Input Figure 9 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 1 and Master mode enabled Parameter Description Min Typ Max Unit Remarks T1 PS clock period 6 940 6 944 us lt I25_mode gt 0 lt I2S_sample_rate gt 0 7 349 7 353 us lt l2S_mode gt 1 lt I2S_sample_rate gt 0 5 035 5 039 us lt l2S_mode gt 0 lt I2S_sample_rate gt 1 5 331 5 335 us lt l2S_mode gt 1 lt I2S_sample_rate gt 1 4 626 4 630 us lt l2S_mode gt 0 lt I2S_sample_rate gt 2 4 898 4 902 us lt l2S_mode gt 1 lt I2S_sample_rate gt 2 3 468 3 472 us lt l2S_mode gt 0 lt I2S_sample_rate gt 3 3 672 3 676 us lt l2S_mode gt 1 lt I2S_sample_rate gt 3 2 516 2 520 us lt l2S_mode gt 0 lt I2S_sample_rate gt 4 2 664 2 66
41. formation Guide 12 Figure 14 Reeled SARA U2 modules 7 1 1 Reels SARA U2 modules are deliverable in quantities of 250 pieces on a reel SARA U2 modules are delivered using reel Type B as described in the u blox Package Information Guide 12 Parameter Specification Reel Type B Delivery Quantity 250 Table 30 Reel information for SARA U2 modules L Quantities of less than 250 pieces are also available Contact u blox for more information UBX 13005287 RO4 Early Production Information Product handling amp soldering Page 42 of 50 999 A Qb Ox SARA U2 series Data Sheet 7 1 2 Tapes Figure 15 specifies the dimensions and orientations of the tapes for SARA U2 series module 01 5 40 1 0 0 gen H 24 00 2 00 15 SEE NOTE 2 Pp T 0 2 00 HIN 4 00 SEE NOTE 1 75 4 10 0 0 05 _T j sE 0 30 MAX SEE NOTE 2 E fo 40 40 4 10 4 013 F gt gt i Ko a Ki Pub TP e TT R 0 75 0 20 05 UMA E Ko 32 Figure 15 SARA U2 series tape dimensions mm Parameter Value A 16 8 B 26 8 K 3 2 Table 31 SARA U2 series tape dimensions mm Note 1 10 sprocket hole pitch cumulative tolerance 0 2 Note 2 pocket position relative to sprocket hole is measured as true position of pocket not pocket hole Note 3 A and B are calculated on a plane at a distance R above the bottom of the pocket 7 2 Moisture Sensitivity Levels SARA U2 modules are Moisture Sensitive Devices
42. heet 4 2 9 2 AC characteristics of Digital Clock Output pin T1 _ gt CODEC_CLK Output T2 gt T3 Figure 12 AC characteristics of CODEC_CLK digital clock output Parameter Description Min Typ Max Unit Remarks T1 CODEC_CLK clock period 38 ns CODEC_CLK output set to 26 MHz 77 ns CODEC_CLK output set to 13 MHz M1 CODEC_CLK clock frequency 26 MHz CODEC_CLK output set to 26 MHz 13 MHz CODEC_CLK output set to 13 MHz T2 CODEC_CLK clock low time 10 ns CODEC_CLK output set to 26 MHz 26 ns CODEC_CLK output set to 13 MHz T3 CODEC_CLK clock high time 10 ns CODEC_CLK output set to 26 MHz 26 ns CODEC_CLK output set to 13 MHz Table 25 AC characteristics of CODEC_CLK digital clock output 4 2 10 USB pins USB data lines USB_D and USB_D are compliant to the USB 2 0 high speed specification See the Universal Serial Bus Revision 2 0 specification 11 for detailed electrical characteristics The values in Table 26 related to USB 2 0 high speed physical layer specifications are for information only Parameter Min Typ Max Unit Remarks USB detection voltage on pin VUSB_DET 4 40 5 00 5 25 V Current sink at VUSB_DET 30 yA High speed squelch detection threshold input differential 100 150 mV signal amplitude High speed disconnect detection threshold input differential 525 625 mV signal amplitude High speed data signaling input common mode voltage range 50 500 mV High speed idle output leve
43. ins The 4 wire Ta digital audio interface can be configured in 4 different modes Normal Va mode Master mode Normal Us mode Slave mode PCM mode Master mode PCM mode Slave mode AC characteristics of the 4 different modes of the PS digital audio interface are reported as follows UBX 13005287 RO4 Early Production Information Electrical specifications Page 28 of 50 biox Normal Ces mode Master mode CLK Output TXD WA Output RXD Input SARA U2 series Data Sheet Figure 4 AC characteristics of digital audio interface in Normal I S mode lt I2S_mode gt 2 4 6 8 10 12 and Master mode enabled CLK Output TXD WA Output RXD Input Figure 5 AC characteristics of digital audio interface in Normal I S mode lt I2S_mode gt 3 5 7 9 11 13 and Master mode enabled Parameter Description T1 PS clock period 1 71 PS clock frequency UBX 13005287 RO4 Min 3 902 2 830 2 600 1 949 1 413 1 298 0 973 0 705 0 647 Early Production Information Typ 3 906 2 834 2 604 1 953 1 417 1 302 0 977 0 709 0 651 256 0 352 8 384 0 512 0 705 6 768 0 1024 1411 1536 Max 256 3 353 3 384 6 513 1 707 6 770 4 1028 1419 1545 Unit us us us us us us us us us kHz kHz kHz kHz kHz kHz kHz kHz kHz Remarks AJAJIAJIAIAIAIAIAIAIAIAIAIAIAIAIAIAILA 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_
44. inuous Reception Enhanced Data rates for GSM Evolution External Reset Input Signal Generic Digital Interfaces V_INT supply power domain Ground obal Navigation Satellite System eneral Purpose Input Output eneral Packet Radio Service igh logic digital level igh Speed Downlink Packet Access G G G Global System for Mobile communications H H H igh Speed Uplink Packet Access nter Integrated Circuit Interface nter IC Sound Interface Low logic digital level Land Grid Array Not Applicable Product Change Notification Information Note Pull Down Power On Input Signal power domain Pull Up Pull Up Pull Down Class see Table 20 for definition Reference Measurement Channel SIM Interface power domain Serial Peripheral Interface Tristate Output of the pin set to tri state i e high impedance state Tristate with internal active Pull Down enabled Tristate with internal active Pull Up enabled To Be Defined Universal Asynchronous Receiver Transmitter serial interface Up link Transmission Universal Mobile Telecommunications System Universal Serial Bus power domain Table 36 Explanation of abbreviations and terms used UBX 13005287 RO4 Early Production Information Appendix Page 48 of 50 Qb Ox SARA U2 series Data Sheet Related documents 1 2 3 3GPP TS 27 007 AT command set for User Equipment UE 3GPP TS 27 005 Use of Data Terminal Equipment Data Circuit ter
45. iods The feature can be enabled and configured through the UCD AT command Embedded TCP IP and UDPAP stack including direct link mode for TCP and UDP sockets Sockets can be set in Direct Link mode to establish a transparent end to end communication with an already connected TCP or UDP socket via serial interface File Transfer Protocol as well as Secure File Transfer Protocol SSL encryption of FTP control channel functionalities are supported via AT commands Hyper Text Transfer Protocol as well as Secure Hyper Text Transfer Protocol SSL encryption functionalities are supported via AT commands HEAD GET POST DELETE and PUT operations are available Up to four client contexts can be simultaneously used Capability to move between IPv4 and dual stack network infrastructures IPv4 and IPv6 addresses can be used Full access to u blox positioning chips and modules is available through a dedicated DDC CC interface This means that from any host processor a single serial port can control the cellular module and the positioning chip or module For more details see the GNSS Implementation Application Note 6 Embedded AssistNow Online and AssistNow Offline clients to provide better GNSS performance and faster Time to First Fix An AT command can enable disable the clients Enables the estimation of device position based on the parameters of the mobile network cells visible to the specific device based on the CellLocate database Nor
46. ks Frequency range Uplink 824 849 Hz Module transmit GSM 850 Downlink 869 894 Hz Module receive Frequency range Uplink 880 915 Hz Module transmit E GSM 900 Downlink 925 960 Hz Module receive Frequency range Uplink 1710 1785 Hz Module transmit DCS 1800 Downlink 1805 1880 Hz Module receive Frequency range Uplink 1850 1910 Hz Module transmit PCS 1900 Downlink 1930 1990 Hz Module receive Frequency range Uplink 824 849 Hz Module transmit UMTS 850 band V Downlink 869 894 Hz Module receive Frequency range Uplink 880 915 Hz Module transmit UMTS 900 band VIII Downlink 925 960 Hz Module receive Frequency range Uplink 1850 1910 Hz Module transmit UMTS 1900 band II Downlink 1930 1990 Hz Module receive Frequency range Uplink 1920 1980 Hz Module transmit UMTS 2100 band I Downlink 2110 2170 Hz Module receive Table 13 Operating RF frequency bands Parameter Min Typ Max Unit Remarks Receiver input sensitivity 109 0 dBm Downlink RF level BER Class Il lt 2 4 GSM 850 E GSM 900 Receiver input sensitivity 109 0 dBm Downlink RF level BER Class Il lt 2 4 DCS 1800 PCS 1900 Receiver input sensitivity 111 0 dBm Downlink RF level for RMC BER lt 0 1 UMTS 850 band V Receiver input sensitivity 110 0 dBm Downlink RF level for RMC BER lt 0 1 UMTS 900 band VIII Receiver input sensitivity 110 0 dBm Downlink RF level for RMC BER lt 0 1 UMTS 1900 band II Receiver input se
47. l 10 10 mV High speed data signaling output high level 360 440 mV High speed data signaling output low level 10 10 mV Chirp J level output differential voltage 700 1100 mV Chirp K level output differential voltage 900 500 mV Table 26 USB pins characteristics UBX 13005287 RO4 Early Production Information Electrical specifications Page 38 of 50 QMbiox 4 2 11 DDC IC pins SARA U2 series Data Sheet DDC IC lines SCL and SDA are compliant to the I C bus standard mode specification See the I C bus Specifications 10 for detailed electrical characteristics The values in Table 27 related to I C bus standard mode specifications are for information only Parameter Min Typ Max Unit Internal supply for DDC domain 1 73 1 80 1 87 V L level input 0 20 0 35 V H level input 1 31 1 93 V L level output 0 00 0 35 V Input Output leakage current 0 7 UA Clock frequency on SCL 100 kHz Table 27 DDC I C pins characteristics DDC domain UBX 13005287 RO4 Early Production Information Remarks Generic Digital Interfaces supply V_INT Max value at 1 0 mA 0 2 V lt Vp lt 1 93 V Electrical specifications Page 39 of 50 Qb Ox SARA U2 series Data Sheet 5 Mechanical specifications Pin 1 K M1 M a M2 K Indicator aT NI I I ME
48. ly V_BCKP Internal pull up to RTC supply V_BCKP The SIM pins are a dedicated interface to the external SIM card chip The electrical characteristics fulfill regulatory specification requirements The values in Table 19 are for information only Parameter Min Low level input 0 00 0 00 High level input 1 29 2 07 Low level output High level output 1 26 2 03 Input Output leakage current Internal pull up resistor on SIM_IO to VSIM Clock frequency on SIM_CLK Typ Max 0 35 0 57 3 30 3 30 0 00 0 35 0 00 0 35 1 80 2 90 0 7 4 7 3 25 Table 19 U SIM pins characteristics SIM domain UBX 13005287 RO4 Early Production Information Unit lt lt lt lt lt lt lt lt Remarks VSIM 1 80 V VSIM 2 90 V VSIM 1 80 V VSIM 2 90 V VSIM 1 80 V Max value at I 1 0 mA VSIM 2 90 V Max value at I 1 0 mA VSIM 1 80 V Min value at 1 0 mA VSIM 2 90 V Min value at 1 0 mA 0 2V lt Vp lt 3 3V Electrical specifications Page 27 of 50 Qb Ox SARA U2 series Data Sheet 4 2 9 Generic Digital Interfaces pins Parameter Min Typ Max Unit Remarks Internal supply for GDI domain 1 73 1 80 1 87 V Generic Digital Interfaces supply V_INT Input characteristic 0 20 0 35 V L level input Input characteristic 1 31 1 93 V H level input Output characteristics 0 00 0 20 V Max value at 0 1 mA for driver class A L level out
49. mal scan only the parameters of the visible home network cells are sent Deep scan the parameters of all surrounding cells of all mobile operators are sent CellLocate is implemented using a set of AT commands for CellLocate service configuration and position request The module current position is provided using a u blox positioning chip or module or the estimated position from CellLocate depending by which positioning method provides the best and fastest solution according to the user configuration Hybrid positioning is implemented through a set of AT commands that allow the configuration and the position request Firmware module upgrade over UART and USB interface using AT command Allows access and use of a remote U SIM card instead of the local SIM card directly connected to the module U SIM interface The module acts as an SAP Client establishing a connection and performing data exchange to a SAP Server directly connected to the remote SIM The modules provide a dedicated USB SAP channel and a dedicated multiplexer SAP channel over UART for communication with the remote U SIM card Early Production Information Functional description Page 9 of 50 VP biox Feature Smart Temperature Supervisor In Band Modem DTMF decoder Audio Over USB Power saving SARA U2 series Data Sheet Description Constant monitoring of the module board temperature Warning notification when the temperature approaches an upper or
50. mation Functional description Page 8 of 50 QMbiox SARA U2 series Data Sheet 1 6 Supported features Table 4 lists the main features supported by SARA U2 modules For more details see the SARA G3 and SARA U2 series System Integration Manual 5 and u blox AT commands manual 4 Feature Network indication Antenna detection Jamming detection Embedded TCP and UDP stack FTP FTPS HTTP HTTPS IPv4 IPv6 dual stack GNSS via modem Embedded AssistNow Software CellLocate Hybrid Positioning Firmware update Over AT commands FOAT SIM Access Profile SAP UBX 13005287 RO4 Description GPIO configured to indicate the network status registered home network registered roaming voice or data call enabled no service The feature can be enabled through the UGPIOC AT command The ANT_DET pin provides antenna presence detection capability evaluating the resistance from the ANT pin to GND by means of an external antenna detection circuit implemented on the application board The antenna detection feature can be enabled through the UANTR AT command Detects some artificial interference that obscures the operator s carriers entitled to give access to the GSM UMTS service and reports the start and stop of such conditions to the application processor AP The AP can react appropriately by e g switching off the radio transceiver to reduce power consumption and monitoring the environment at constant per
51. minating Equipment DTE DCE interface for Short Message Service SMS and Cell Broadcast Service CBS 3GPP TS 27 010 Terminal Equipment to User Equipment TE UE multiplexer protocol 4 u blox AT Commands Manual Docu No UBX 13002752 5 u blox SARA G3 and SARA U2 series System Integration Manual Docu No UBX 13000995 6 u blox GNSS Implementation Application Note Docu No UBX 13001849 7 3GPP TS 26 267 eCall Data Transfer In band modem solution General description 8 ITU T Recommendation V24 02 2000 List of definitions for interchange circuits between Data Terminal Equipment DTE and Data Connection Equipment DCE 9 u blox Mux Implementation Application Note for wireless modules Docu No UBX 13001887 10 l C bus specification and user manual Rev 5 9 October 2012 NXP Semiconductors http www nxp com documents user_manual UM10204 pat 11 Universal Serial Bus Revision 2 0 specification http www usb org developers docs usb20_docs 12 u blox Package Information Guide Docu No UBX 14001652 L For regular updates to u blox documentation and to receive product change notifications register on our homepage Revision history Revision Date Name Status Comments RO1 22 Jan 2014 sfal sses Initial release RO2 29 Apr 2014 sses Updated receiver sensitivity performance normal operating temperature range maximum ESD ratings USB audio device class support GPIO configuration table RO3 20 Jun 2014 sses Advanc
52. nected 45 A RSVD N A RESERVED pin Leave unconnected 46 A RSVD N A RESERVED pin Leave unconnected 47 A RSVD N A RESERVED pin Leave unconnected 48 A RSVD N A RESERVED pin Leave unconnected 49 A RSVD N A RESERVED pin Leave unconnected 50 A GND N A Ground All the GND pins must be connected to ground 51 A VCC l Module supply input All VCC pins must be connected to external supply See sections 4 2 2 and 4 2 3 for detailed specs 52 A VCC l Module supply input All VCC pins must be connected to external supply See sections 4 2 2 and 4 2 3 for detailed specs 53 A VCC l Module supply input All VCC pins must be connected to external supply See sections 4 2 2 and 4 2 3 for detailed specs 54 A GND N A Ground All the GND pins must be connected to ground 55 A GND N A Ground All the GND pins must be connected to ground 56 A ANT 1 0 RF input output 50 Q nominal impedance See section 4 2 4 for detailed electrical specs 57 A GND N A Ground All the GND pins must be connected to ground 58 A GND N A Ground All the GND pins must be connected to ground 59 A GND N A Ground All the GND pins must be connected to ground 60 A GND N A Ground All the GND pins must be connected to ground 61 A GND N A Ground All the GND pins must be connected to ground 62 A ANT_DET ADC Antenna detection Antenna presence detection function See section 4 2 5 for detailed electrical specs 63 A GND N A Ground All the GND pins must be c
53. not be left floating Rising edge on RESET_N pin i e releasing the pin from the low level normally high with internal pull up RTC alarm i e pre programmed scheduled time by AT CALA command UBX 13005287 RO4 Early Production Information Interfaces Page 11 of 50 Qb Ox SARA U2 series Data Sheet 2 3 2 Module power off SARA U2 modules can be properly switched off with storage of current parameter settings and network detach in one of these ways AT CPWROFF command Low pulse on the PWR_ON pin for at least 1 s An abrupt under voltage shutdown occurs on SARA U2 modules when the VCC supply drops below the extended operating range minimum limit but in this case it is not possible to perform the storing of the current parameter settings in the module s non volatile memory as well as the proper network detach An over temperature or an under temperature shutdown occurs on SARA U2 modules when the temperature measured within the cellular module reaches the dangerous area if the optional Smart Temperature Supervisor feature is enabled and configured by the dedicated AT command For more details see the SARA G3 and SARA U2 series System Integration Manual 5 and u blox AT commands manual 4 USTS AT command 2 3 3 Module reset SARA U2 modules can be properly reset rebooted with storage of current parameter settings and network detach in this way By the AT CFUN command see the u blox AT Commands Manual 4 This causes an inte
54. nsitivity 110 0 dBm Downlink RF level for RMC BER lt 0 1 UMTS 2100 band D Condition 50 Q source Table 14 Receiver sensitivity performance UBX 13005287 RO4 Early Production Information Electrical specifications Page 25 of 50 QMbiox Parameter Maximum output power GSM 850 E GSM 900 Maximum output power DCS 1800 PCS 1900 aximum output power TS 850 Band V aximum output power TS 900 Band VIII aximum output power TS 1900 Band II aximum output power UMTS 2100 Band D Condition for all parameters 50 Q output load Min Typ 32 5 32 5 31 7 30 5 29 5 29 5 28 7 27 5 22 5 22 5 22 5 22 5 Max Unit dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm dBm Remarks Creel ee ere were ink burs ink burs ink burs ink burs ink burs ink burs ink burs ink burs RF power RF power RF power RF power RF power RF power RF power RF power SARA U2 series Data Sheet or GSM or GPRS 1 slot TCH at PCL 5 or Gamma 3 or GPRS 2 slot TCH at Gamma 3 or GPRS 3 slot TCH at Gamma 3 or GPRS 4 slot TCH at Gamma 3 or GSM or GPRS 1 slot TCH at PCL O or Gamma 3 or GPRS 2 slot TCH at Gamma 3 or GPRS 3 slot TCH at Gamma 3 or GPRS 4 slot TCH at Gamma 3 ink continuous RF power for RMC at maximum power ink continuous RF power for RMC at maximum power ink continuous RF power for RMC at maximum power ink continuous RF
55. oc lt X uy Y SARA U2 series 3 75G HSPA Cellular Modules Data Sheet Abstract Technical data sheet describing SARA U2 series HSPA cellular modules These modules are a complete and cost efficient 3 75G solution offering 2 band high speed HSPA and up to 2 band GSM EGPRS voice and or data transmission technology in a compact form factor 26 0 x 16 0 x 3 0 mm www u blox com UBX 13005287 RO4 QMbiox Qb Ox SARA U2 series Data Sheet Document Information Title SARA U2 series PRESS EE SCH Document type Data Sheet Document number UBX 13005287 Revision date RO4 21 Jul 2014 Document status Early Production Information Document status explanation Objective Specification Document contains target values Revised and supplementary data will be published later Advance Information Document contains data based on early testing Revised and supplementary data will be published later Early Production Information Document contains data from product verification Revised and supplementary data may be published later Production Information Document contains the final product specification This document applies to the following products Product name Type number Firmware version PCN IN SARA U260 SARA U260 00S 00 23 20 UBX 14015739 SARA U270 SARA U270 00S 00 23 20 UBX 14015739 SARA U280 SARA U280 005 00 TBD TBD SARA U290 SARA U290 005 00 TBD TBD SARA U290 605 00 TBD TBD u blox reserves all rights
56. on 3 1 Pin assignment T_DET D GND ANT EEG eo E BE lt gt GND V_BCKP GND V_INT GND DSR RI DCD DTR RTS CTS TXD RXD GND PWR_ON GPIO1 VUSB_DET RESET_N CODEC_CLK GND GND N D gE E o N ZC LE EN ao El HE lt gt N wo El 00 N v Vu N O Bu SARA U2 Top View Pin 65 96 GND E eno O El El fa e A w N N STT sc E ET co I E GPIO2 ae H D GPIO3 ES D crios HEN Figure 3 SARA U2 series pin assignment UBX 13005287 RO4 oun E El El USB_D rsvD ER GND a El D DH DH Early Production Information vcc vcc vcc GND RSVD RSVD RSVD RSVD RSVD RSVD GND SIM_DET VSIM SIM_RST SIM_IO SIM_CLK 125_RXD 125_CLK 125_TXD HS WA RSVD SARA U2 series Data Sheet Pin definition Page 17 of 50 QMbiox No Module Name 1 All GND 2 All V_BCKP 3 All GND All V_INT 5 All GND All DSR 7 All RI 8 All DCD 9 All DTR 10 All RTS 11 All CTS L All TXD 13 All RXD 14 All GND 15 All PWR_ON 16 All GPIO1 17 All VUSB_DET 18 All RESET_N UBX 13005287 R04 Power domain GDI GDI GDI GDI GDI GDI GDI GDI POS GDI USB ERS 1 0 N A 1 0 N A N A N A 1 0 Description Ground Real Time Clock supply input output Ground Generic Digital Interfaces supply output Ground UART data set ready UART ring indicator UART data carrier detect UART data termin
57. on Presentation CoLP Connected Line Identification Restriction CoLR Unstruc ured Supplementary Services Data USSD Network Identify and Time Zone NITZ Calling ame Presentation CNAP SARA U2 series Data Sheet Short Message Service SMS Text and PDU mode supported Mobile Originating SMS MO SMS Mobile Terminating SMS MT SMS S indication and acknowledgement S Cell Broadcast CBS S during circuit switched calls S over CSD S over PSD S storage on SIM L Loi toi t nnn S storage on module memory Concatenated SMS Table 3 SARA U2 series mobile stations basic features supplementary services and SMS service summary 1 5 AT command support SARA U2 series modules support AT commands according to the 3GPP Technical Specifications 27 007 1 27 005 2 27 010 3 and the u blox AT command extension Ce Manual 4 For the complete list of the supported AT commands and their syntax see the u blox AT Commands RIL Radio Interface Layer is provided with SARA U2 modules and is compatible with following deliveries Android 2 3 Gingerbread Android 4 0 Ice Cream Sandwich Android 4 1 Jelly Bean Android 4 2 Jelly Bean Android 4 3 Jelly Bean Windows Embedded CE 6 0 Window Mobile 6 5 Windows Embedded Compact 7 All these functionalities are supported via AT commands for more details see u blox AT Commands Manual Lal UBX 13005287 RO4 Early Production Infor
58. onnected to ground 64 A GND N A Ground All the GND pins must be connected to ground 65 96 A GND N A Ground All the GND pins must be connected to ground Table 6 SARA U2 series module pin out L For more information about pin out see the SARA G3 and SARA U2 series System Integration Manual 5 L For an explanation of abbreviations and terms used see Appendix A UBX 13005287 RO4 Early Production Information Pin definition Page 20 of 50 biox 4 Electrical specifications SARA U2 series Data Sheet A Stressing the device above one or more of the ratings listed in the Absolute Maximum Rating section may cause permanent damage These are stress ratings only Operating the module at these or at any conditions other than those specified in the Operating Conditions sections section 4 2 of the specification should be avoided Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability L Operating conditions ranges define those limits within which the functionality of the device is guaranteed L Where application information is given it is advisory only and does not form part of the specification 4 1 Absolute maximum rating L Limiting values given below are in accordance with the Absolute Maximum Rating System IEC 134 Symbol Description Condition Min Max Unit VCC Module supply voltage nput DC voltage at VCC pins 0 30 5 50 V
59. ormation Electrical specifications Page 35 of 50 biox PCM mode Slave mode WA Input CLK Input TXD Output RXD Input SARA U2 series Data Sheet Figure 10 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 0 and Slave mode enabled WA Input CLK Input TXD Output RXD Input Figure 11 AC characteristics of digital audio interface in PCM mode lt I2S_mode gt 1 and Slave mode enabled Parameter Description Min Typ 6 944 7 353 5 039 5 335 4 630 4 902 3 472 3 676 2 520 2 668 2 315 2 451 1 736 1 838 1 260 1 334 1 157 1 225 T1 PS clock period UBX 13005287 RO4 Early Production Information Max Unit us us us us us us us us us us us us us us us us us us 2S_mode gt 0 lt I2S_sample_rate gt 0 Remarks lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt lt I2S_mode gt 0 lt lt I2S_mode gt 1 lt 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_sample_ra 2S_s
60. ox com Support support_in u blox com Regional Office Japan Phone 81 3 5775 3850 E mail info_jp u blox com Support support_jpOu blox com Regional Office Korea Phone 82 2 542 0861 E mail info_kr u blox com Support support_kr u blox com Regional Office Taiwan Phone 886 2 2657 1090 E mail info_tw u blox com Support support_twOu blox com Contact Page 50 of 50
61. ption During idle mode the module processor core runs with the RTC 32 kHz reference clock which is generated by the internal 32 kHz oscillator The feature can be enabled through the UPSV AT command Table 4 SARA U2 series main supported features L u blox is extremely mindful of user privacy When a position is sent to the CellLocate server u blox is unable to track the SIM used or the specific device Supported only by SARA U270 and SARA U290 modules UBX 13005287 RO4 Early Production Information Functional description Page 10 of 50 Qb Ox SARA U2 series Data Sheet 2 Interfaces 2 1 Power management 2 1 1 Module supply VCC SARA U2 modules must be supplied through the VCC pins by a DC power supply Voltages must be stable during operation the current drawn from VCC can vary by some order of magnitude especially due to the surging consumption profile of the GSM system described in SARA G3 and SARA U2 series System Integration Manual 5 It is important that the system power supply circuit is able to support peak power 2 1 2 RTC supply V_BCKP V_BCKP is the Real Time Clock RTC supply of SARA U2 modules When VCC voltage is within the valid operating range the internal Power Management Unit PMU supplies the RTC and the same supply voltage is available on V_BCKP pin If the VCC voltage is under the minimum operating limit e g during not powered mode the V_BCKP pin can externally supply the
62. put 0 00 0 35 V Max value at 6 0 mA for driver class A 0 00 0 20 V Max value at 0 1 mA for driver class B 0 00 0 35 V Max value at 4 0 mA for driver class B 0 00 0 20 V Max value at 0 1 mA for driver class C 0 00 0 35 V Max value at 2 0 mA for driver class C 0 00 0 45 V Max value at 2 0 mA for driver class C_O 0 00 0 20 V Max value at 0 1mA for driver class D 0 00 0 35 V Max value at 1 0 mA for driver class D 0 00 0 20 V Max value at 0 1 mA for driver class E Output characteristics 45 80 V Min value at 6 0 mA for driver class A H level output GO 80 V Min value at 0 1 mA for driver class A 45 80 V Min value at 4 0 mA for driver class B GO 80 V Min value at 0 1 mA for driver class B 45 80 V Min value at 2 0 mA for driver class C 60 80 V Min value at 0 1 mA for driver class C 35 80 V Min value at 2 0 mA for driver class C_O 45 80 V Min value at 1 0 mA for driver class D 60 80 V Min value at 0 1 mA for driver class D 60 80 V Min value at 0 1 mA for driver class E Input Output leakage current 0 7 UA 0 2V lt V lt 1 93 V Pull up input current 240 UA PU Class a 150 UA PU Class b 125 UA PU Class c Pull down input current 200 UA PD Class a 150 UA PD Class b 45 UA PD Class c Table 20 Generic Digital Interfaces pins characteristics GDI domain 4 2 9 1 AC characteristics of digital audio interfaces p
63. rate gt 4 41 67 us lt I2S_sample_rate gt 5 31 25 us lt I2S_sample_rate gt 6 22 68 us lt I2S_sample_rate gt 7 20 83 us lt I2S_sample_rate gt 8 PS word alignment frequency 8 000 kHz lt I2S_sample_rate gt 0 11 03 kHz lt I2S_sample_rate gt 1 12 00 kHz lt I2S_sample_rate gt 2 16 00 kHz lt I2S_sample_rate gt 3 22 05 kHz lt I2S_sample_rate gt 4 24 00 kHz lt I2S_sample_rate gt 5 32 00 kHz lt I2S_sample_rate gt 6 44 10 kHz lt I2S_sample_rate gt 7 48 00 kHz lt I2S_sample_rate gt 8 T4 PS TXD invalid before Va CLK high end 24 ns lt I2S_mode gt 2 4 6 8 10 12 before shifting edge of VS CLK PS TXD invalid before IS CLK low end 24 ns lt I2S_mode gt 3 5 7 9 11 13 before shifting edge of Va CLK T5 PS TXD valid after I S CLK low begin 32 ns lt I2S_mode gt 2 4 6 8 10 12 after shifting edge of S CLK PS TXD valid after I S CLK high begin 32 ns lt I2S_mode gt 3 5 7 9 11 13 after shifting edge of S CLK T6 PS RXD setup time before TS CLK low end 60 ns lt I2S_mode gt 2 4 6 8 10 12 before latching edge of S CLK PS RXD setup time before I S CLK high end 60 ns lt I2S_mode gt 3 5 7 9 11 13 before latching edge of S CLK T7 PS RXD hold time after IS CLK high begin 10 ns lt I2S_mode gt 2 4 6 8 10 12 after latching edge of Va CLK PS RXD hold time after IS CLK low begin 10 ns lt I2S_mode gt 3 5 7 9 11 13 after latching edge of VS CLK Table 21 AC characteristics of digital audio interface in No
64. re the module is mounted as described in SARA G3 and SARA U2 series System Integration Manual 5 A Failure to observe these precautions can result in severe damage to the device UBX 13005287 RO4 Early Production Information Product handling 8 soldering Page 44 of 50 Qb Ox SARA U2 series Data Sheet 8 Default settings Interface AT settings Comments UART interface Enabled Multiplexing mode can be enabled by AT CMUX command providing following channels Channel 0 control channel Channel 1 5 AT commands data connection Channel 6 GNSS tunneling Channel 7 SAP SIM Access Profile AT IPR 0 One shot automatic baud rate detection enabled AT ICF 3 1 Frame format 8 bits no parity 1 stop bit Ce Where AT IPR 0 is the default value the AT ICF value in the profile is not applied AT IPR 0 overrules the AT ICF setting and the one shot automatic frame detection is active AT amp K3 HW flow control enabled AT8 amp S1 DSR line set ON in data mode and set OFF in command mode AT amp D1 Upon an ON to OFF transition of DTR the module enters online command state and issues an OK result code AT amp C1 Circuit 109 changes in accordance with the Carrier detect status ON if the Carrier is detected OFF otherwise USB interface Enabled 7 USB CDCs Communications Device Class by default available USB1 AT and data USB2 AT and data USB3 AT and data USB4 GNSS tunneling USB5 Primary Log diagnostic purpose USB6 Second
65. rmal IS mode and Master mode enabled UBX 13005287 RO4 Early Production Information Electrical specifications Page 30 of 50 Qb Ox SARA U2 series Data Sheet Normal Ce mode Slave mode CLK Input TXD Output RXD WA Input Figure 6 AC characteristics of digital audio interface in Normal I S mode lt I2S_mode gt 2 4 6 8 10 12 and Slave mode enabled CLK Input TXD Output RXD WA Input Figure 7 AC characteristics of digital audio interface in Normal I S mode lt I2S_mode gt 3 5 7 9 11 13 and Slave mode enabled Parameter Description Min Typ Max Unit Remarks T1 PS clock period 3 906 us lt I2S_sample_rate gt 0 2 834 us lt I2S_sample_rate gt 1 2 604 us lt I2S_sample_rate gt 2 1 953 us lt I2S_sample_rate gt 3 1 417 us lt I2S_sample_rate gt 4 1 302 us lt I2S_sample_rate gt 5 0 977 us lt I2S_sample_rate gt 6 0 709 us lt I2S_sample_rate gt 7 0 651 us lt I2S_sample_rate gt 8 1 71 PS clock frequency 256 0 kHz lt I2S_sample_rate gt 0 352 8 kHz lt I2S_sample_rate gt 1 384 0 kHz lt I2S_sample_rate gt 2 512 0 kHz lt I2S_sample_rate gt 3 705 6 kHz lt I2S_sample_rate gt 4 768 0 kHz lt I2S_sample_rate gt 5 1024 kHz lt I2S_sample_rate gt 6 1411 kHz lt I2S_sample_rate gt 7 1536 kHz lt I2S_sample_rate gt 8 UBX 13005287 RO4 Early Production Information Electrical specifications Page 31 of 50 Qb Ox SARA U2 series Data Sheet
66. rnal or software reset of the baseband processor excluding the integrated power management unit and the RTC internal block the V_INT generic digital interfaces supply is enabled and each digital pin is set to its internal reset state reported in Table 6 the V_BCKP supply and the RTC block are enabled An abrupt external or hardware reset occurs when a low level is applied to the RESET_N pin which is normally set high by an internal pull up for a valid time period see section 4 2 7 This causes a reset of the entire module including the integrated power management unit except for the RTC internal block the V_INT generic digital interfaces supply is switched off and all the digital pins are tri stated but the V_BCKP supply and the RTC block are enabled The current parameter settings are not saved in the module s non volatile memory and a proper network detach is not performed 2 4 SIM 2 4 1 U SIM interface SARA U2 modules provide a U SIM interface on the VSIM SIM_IO SIM_CLK SIM_RST pins the high speed SIM ME interface is implemented as well as automatic detection of the required SIM supporting voltage Both 1 8 V and 3 V SIM card chip types are supported 1 8 V and 3 V ME Activation and deactivation with automatic voltage switch from 1 8 V to 3 V is implemented according to ISO IEC 7816 3 specifications The SIM driver supports the PPS Protocol and Parameter Selection procedure for baud rate selection accor
67. samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp 2S_samp e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e gt 0 e gt 1 e gt 2 e gt 3 e gt 4 e gt 5 e gt 6 e gt 7 e gt 8 e gt 0 e gt 1 e gt 2 e gt 3 e gt 4 e gt 5 e gt 6 e gt 7 e gt 8 Electrical specifications Page 29 of 50 Qb Ox SARA U2 series Data Sheet Parameter Description Min Typ Max Unit Remarks T2 PS clock high time 1 933 1 953 us lt I2S_sample_rate gt 0 1 397 1 417 us lt I2S_sample_rate gt 1 1 282 1 302 us lt I2S_sample_rate gt 2 0 957 0 977 us lt I2S_sample_rate gt 3 0 689 0 709 us lt I2S_sample_rate gt 4 0 631 0 651 us lt I2S_sample_rate gt 5 0 468 0 488 us lt I2S_sample_rate gt 6 0 334 0 354 us lt I2S_sample_rate gt 7 0 306 0 326 us lt I25_sample_rate gt 8 T3 PS clock low time 1 933 1 953 us lt I2S_sample_rate gt 0 1 397 1 417 us lt I2S_sample_rate gt 1 1 282 1 302 us lt I2S_sample_rate gt 2 0 957 0 977 us lt I2S_sample_rate gt 3 0 689 0 709 us lt I2S_sample_rate gt 4 0 631 0 651 us lt I2S_sample_rate gt 5 0 468 0 488 us lt I2S_sample_rate gt 6 0 334 0 354 us lt l2S_sample_rate gt 7 0 306 0 326 us lt l2S_sample_rate gt 8 PS word alignment period 125 0 us lt I2S_sample_rate gt 0 90 70 us lt I2S_sample_rate gt 1 83 33 us lt I25_sample_rate gt 2 62 50 us lt I2S_sample_rate gt 3 45 35 us lt I2S_sample_
68. t I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp 2S_mode gt 0 lt I2S_samp 2S_mode gt 1 lt I2S_samp e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra e_ra Electrical spec Page 34 of 50 e gt 0 e gt 0 e gt 1 e gt 1 e gt 2 e gt 2 e gt 3 e gt 3 e gt 4 e gt 4 e gt 5 e gt 5 e gt 6 e gt 6 e gt 7 e gt 7 e gt 8 e gt 8 e gt 0 e gt 0 e gt 1 e gt 1 e gt 2 e gt 2 e gt 3 e gt 3 e gt 4 e gt 4 e gt 5 e gt 5 e gt 6 e gt 6 e gt 7 e gt 7 e gt 8 e gt 8 e gt 0 e gt 0 e gt 1 e gt 1 e gt 2 e gt 2 e gt 3 e gt 3 e gt 4 e gt 4 e gt 5 e gt 5 e gt 6 e gt 6 e gt 7 e gt 7 ications Qb Ox SA
69. t for certification Table 34 Part identification code 9 3 Ordering information Ordering No SARA SARA SARA SARA SARA U260 00S U270 00S U280 00S U290 00S U290 60S SARA U2 series Data Sheet Example SARA U2 00 00 Default value is 00 Product UMTS HSPA 850 1900 MHz and GSM EGPRS 850 1900 MHz bands for America 26 0 x 16 0 x 3 0 mm 250 pcs ree UMTS H 26 0 x 16 0 x 3 0 mm 250 pcs ree UMTS HSPA 850 1900 MHz bands for America 26 0 x 16 0 x 3 0 mm 250 pcs ree 26 0 x 16 0 x 3 0 mm 250 pcs ree Table 35 Product ordering codes UBX 13005287 RO4 Early Production Information SPA 900 2100 MHz and GSM EGPRS 900 1800 MHz bands for Europe Asia and other countries UMTS HSPA 900 2100 MHz bands for Europe Asia and other countries 26 0 x 16 0 x 3 0 mm 250 pcs ree UMTS H SPA 900 2100 MHz bands FW version approved and locked for SoftBank Japanese network operator Labeling and ordering information Page 47 of 50 QMbiox Appendix A Glossary Name ADC BER DDC DL Driver Class DRX EDGE ERS GDI GND GNSS GPIO GPRS GSM LGA N A PCN IN PD POS PU PU PD Class RMC SIM SPI T T PD T PU TBD UART UL UMTS USB SARA U2 series Data Sheet Definition Analog to Digital Converter Bit Error Rate Display Data Channel I C compatible Interface Down link Reception Output Driver Class see Table 20 for definition Discont
70. temperature range Occasional deviations from the 3GPP specification may occur Thermal protection including automatic shutdown is implemented for protection against overheating Thermal protection is disabled for emergency calls For more details see the u blox AT Commands Manual 4 USTS AT command UBX 13005287 RO4 Early Production Information Electrical specifications Page 22 of 50 Qb Ox SARA U2 series Data Sheet 4 2 2 Supply Power pins Symbol Parameter Min Typ Max Unit VCC Module supply normal operating input voltage 3 30 3 80 4 40 V Module supply extended operating input voltage 3 10 4 50 V V_BCKP RTC supply input voltage 1 00 1 80 1 90 V _BCKP RTC supply average current consumption 2 00 uA at V_BCKP 1 8 V Table 10 Input characteristics of Supply Power pins Symbol Parameter Min Typ Max Unit VSIM SIM supply output voltage 1 76 1 80 1 83 V 2 84 2 90 2 94 V V_BCKP RTC supply output voltage 1 71 1 80 1 89 V _BCKP RTC supply output current capability 3 mA V_INT Digital I O Interfaces supply output voltage 1 73 1 80 1 87 V V_INT_RIPPLE Digital I O Interfaces supply output peak to peak 15 mV voltage ripple during active or connected mode Digital I O Interfaces supply output peak to peak 70 mV voltage ripple during low power idle mode with power saving enabled by AT UPSV command INT Digital I O Interfaces supply output current capability 70 mA Table 11 Output characteristics of Supply Power pins
71. umber and production country Mbiox 23 ez Model SARA U2xx 8XXXXX XXXX 000 IMEI XXXXXXXXXXXXKXK FCC ID XXXXXXXXXX C 1 588 el XXXXX XXXKXXKKK Made in Austria Figure 16 SARA U2 series modules label L For information about the approval codes and for all the certificates of compliancy of SARA U2 series modules see our website http Awww u blox com 9 2 Explanation of codes Three different product code formats are used The Product Name is used in documentation such as this data sheet and identifies all the u blox products independent of packaging and quality grade The Ordering Code includes options and quality while the Type Number includes the hardware and firmware versions Table 33 details these 3 different formats Format Structure Product Name SARA TGVV Ordering Code SARA TGVV TTQ Type Number SARA TGVV TTQ XX Table 33 Product code formats Table 34 explains the parts of the product code UBX 13005287 RO4 Early Production Information Labeling and ordering information Page 46 of 50 QMbiox Code PPP P TG TT XX Meaning Form factor 3 or 4 digit typically 4 for cellular products Platform Technology and Generation Technology G GSM U HSUPA L LTE C CDMA 1xRTT D EV DO Generation 1 9 Variant function set based on the same platform 00 99 Major product version 00 99 Quality grade production site S standard A automotive Minor product version not relevan
72. up Value at internal reset T See section 4 2 11 for detailed electrical specs Fixed open drain No internal pull up Value at internal reset T See section 4 2 11 for detailed electrical specs 90 Q nominal differential impedance Pull up pull down and series resistors as required by USB 2 0 specifications 11 are part of the USB pin driver and need not be provided externally Value at internal reset T See section 4 2 10 for detailed electrical specs 90 Q nominal differential impedance Pull up pull down and series resistors as required by USB 2 0 specifications 11 are part of the USB pin driver and need not be provided externally Value at internal reset T See section 4 2 10 for detailed electrical specs All the GND pins must be connected to ground Leave unconnected All the GND pins must be connected to ground This pin must be connected to GND Configurable as CS word alignment Input with internal active pull down enabled in slave mode Output in master mode or as GPIO see Table 5 Output driver class C PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Configurable as I S transmit data output or as GPIO see Table 5 Output driver class C PU PD class a Value at internal reset T PD See section 4 2 9 for detailed electrical specs Configurable as Va clock Input with internal active pull down to GND enabled in slave mode Output in m

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