ISL54225IRTZEVAL1Z User Guide
Contents
1. intersil Application Note AN1576 Author Allan Robinson ISL54225IRTZEVAL1Z Evaluation Board User Manual Description The ISL54225IRTZEVAL1Z evaluation board is designed to provide a quick and easy method for evaluating the ISL54225 USB Switch IC The ISL54225 device is a unique IC To use this evaluation board properly requires a thorough knowledge of the operation of the IC See the ISL54225 datasheet for an understanding of the functions and features of the device Studying the device s truth table along with its pin out diagram on page 2 of the data sheet is the best way to get a quick understanding of how the part works The ISL54225IRTZEVAL1Z evaluation board is shown in Figure 1 The ISL54225 TDEN IC is soldered onto the center of the evaluation board and is designated as U1 The evaluation board contains USB connectors banana jacks and toggle switches to allow the user to easily interface with the IC to evaluate its functions features and performance For example with the board properly powered and configured as shown in Figure 2 the user can control the logic pins with the toggle switches S1 SEL and S2 OE These switches allow the user to switch between the two high speed USB devices while connected to a single USB host computer In a typical application the ISL54225 dual SPDT device is used to select between two different USB transceiver sections of a media player Logic control from a microprocesso2. Board Architecture Layout The basic layout of the evaluation board is as follows see Figure 1 and ISL54225IRTZEVAL1Z Board Schematic on page 6 e Power and Ground connections are at the banana jacks J1 and J2 at the top of the board Logic connections SEL and OE are at the top of the board at banana jacks J4 and J3 They can also be accessed by using the toggle switches S1 and S2 located in the upper center of the board To use the toggle switches jumpers JP1 and JP2 must be installed To control the logic through the J4 and J3 banana jacks the JP1 and JP2 jumpers must not be populated The USB connector J5 USB TO HOST located at the bottom of the board provides a USB connection to an upstream host controller Computer USB connectors J6 USB TO DEVICE 1 and J7 USB TO DEVICE 2 located on the right and left sides of the board provide USB connections to downstream USB devices Banana jacks J8 VBUSCH2 and J9 VBUSCH1 provide Vays voltage for the USB devices Optionally Vgys for a USB device can be connected to the host controller Vays through jumpers JP4 Device 1 and JP3 Device 2 The ISL54225 IC U1 is located in the center of the board The evaluation board has a Pin 1 indicator dot to show how the IC should be oriented on the evaluation board The IC Pin 1 indicator dot should be aligned with the evaluation board Pin 1 indicator dot IC Power Supply A DC power supply connected at banana jacks J1 V
3. DD and J2 GND provides power to the ISL54225 IC The IC requires a 2 7VDC to 5 25VDC power supply for proper operation The power supply should be capable of delivering LOOWA of current Veus Power Supply A DC power supply connected at banana jacks J9 VBUSCH1 and J8 VBUSCH2 provides the Vgus voltage required by the USB devices The devices require a DC power supply in the range of 4 4V to 5 25V for proper operation The power supply should be capable of delivering 100mA of current The J8 banana jack is connected to the VBUS pin of the J7 A type USB receptacle The J9 banana jack is connected to the VBUS pin of the J6 A type receptacle Vgus Voltage can be provided from the USB host controller computer by installing a jumper at either JP3 or JP4 With a jumper at JP4 the Vpys voltage from J5 USB TO HOST USB connector gets routed to the J6 connector With this jumper installed no DC supply should be connected at the J9 VBUSCH1 banana jack With a jumper at JP3 the Vays voltage from J5 USB TO HOST USB connector gets routed to the J7 connector With this jumper installed no DC supply should be connected at the J8 VBUSCH2 banana jack Logic Control The state of the ISL54225 device is determined by the voltage at the SEL pin and the OE pin Access to the SEL pin is through the banana jack J4 SEL or the toggle switch S1 SEL Access to the OE pin is through the banana jack J3 OE or the toggle switch S2 O
4. DT switches to prevent damage to the USB down stream transceivers connected at the signal pins HS1D HS1D HS2D HS2D The OVP and power off protection circuitry allows the COM pins D D to be driven up to 5 25V while the Vpp supply voltage is in the range of OV to 5 25V In this condition the part draws lt 100A of Icomx and Ipp current and causes no stress to the IC In addition the SPDT switches are OFF and the fault voltage is isolated from the other side of the switch See the ISL54225 datasheet for more information on the power off and OVP functionality Board Component Definitions Evaluation board components and their functions are shown in Table 1 TABLE 1 BOARD COMPONENT DESCRIPTIONS DESIGNATOR DESCRIPTION U1 ISL54225IRTZ IC J5 B Type USB Receptacle J6 J7 A Type USB Receptacle Ja VDD Positive Connection J2 VDD Negative Connection J4 SEL Logic Control J3 OE Logic Control J8 Vpgus Voltage for High speed Device 2 J9 Vpgus Voltage for High speed Device 1 S1 SEL Toggle Switch S2 OE Toggle Switch JP5 JP6 JP7 D D Differential Probe Connection JP3 JP4 Host Controller Computer Vays Jumper JP1 Toggle Switch S1 SEL Jumper JP2 Toggle Switch S2 OE Jumper 3 intersil AN1576 0 March 16 2012 Application Note AN1576 DC POWER DC POWER SUPPLY SUPPLY SEL O J4 JP1 ISL54225IRTZEVAL1Z f O O JP3 me SEL OE
5. E To use the toggle switches to control the logic jumpers should be installed at JP1 and JP2 Remove jumpers to control the logic through the banana jacks If SEL is driven Low to ground OE Low and the signal voltage is in the range of OV to 3 6V the high speed HS channel 1 switches will be ON In this state the USB host controller computer connected at J5 will be connected through to the USB device connected at J6 and data will be able to be transmitted between the computer and the device If SEL is driven High OE Low and the signal voltage is in the range of OV to 3 6V the high speed HS channel 2 switches will be ON In this state the USB host controller computer connected at J5 will be connected through to the USB device connected at J7 and data will be able to be transmitted between the computer and the device If OE High all switches are OFF Neither device is connected through to the host controller In a typical application the ISL54225 dual SPDT device is used to select between two different USB transceiver sections of a media player Logic control from a microprocessor determines which section to connect to the computer To change channels the following sequence could be followed 1 Asignal from the microprocessor is sent to take the OE pin High which opens all switches The off isolation of the ISL54225 device allows the present active channel to properly disconnect from the computer 2 The micro
6. TO DEVICE 1 VBUSCH2 VBUSCH1 USB PORT COMPUTER a USB HIGH SPEED DEVICE 1 NOTE For Device 1 to get VBUS from the computer through the J5 connector disconnect the 5V supply from J9 and populate jumper JP4 For Device 2 to get VBUS from the computer through the J5 connector disconnect the 5V supply from J8 and populate jumper JP3 FIGURE 2 BASIC EVALUATION TEST SETUP BLOCK DIAGRAM 4 intersil AN1576 0 March 16 2012 Application Note AN1576 Using the ISL54225IRTZEVAL1Z Evaluation Board see Figure 2 Lab Equipment The equipment external supplies and signal sources needed to operate the board are listed below 1 2 7V to 5V DC Power Supply 2 5V DC Power Supply 3 Two High Speed USB devices e g USB memory stick and MP3 player 4 Computer with 2 0 High Speed USB port 5 Standard USB cable Initial Board Setup Procedure 1 Install jumpers at JP1 and JP2 Remove jumpers from JP3 and JP4 2 Attach the main evaluation board to a DC power supply at J1 VDD and J2 GND Positive terminal at J1 and negative terminal at J2 The supply should be capable of delivering 2 7V to 5V and 100pA of current Set the supply voltage to 3 3V 3 Connect a DC power supply at J8 VBUSHCH2 and J9 VBUSCH1 Positive terminal at J8 and J9 and negative terminal at J2 GND The supply should be capable of delivering 5V and 100mA of current Set the supply voltage to 5V This supply provides 5V at the Vgus pi
7. TOR DESCRIPTION TP1 Vpp test point TP2 Ground test point TP3 SEL test point TP4 OE test point TP6 VBUS from Pin 1 of Connector J5 test point JP5 D D differential probe connection COM side of switch JP7 D D differential probe connection Device 1 side of switch JP6 D D differential probe connection Device 2 side of switch You can observe the D and D USB signal of Channel 1 on an oscilloscope or other test equipment by connecting a differential probe at JP7 You can observe the D and D USB signal of Channel 2 on an oscilloscope or other test equipment by connecting a differential probe at JP6 You can observe the D and D USB signal at the COM side of the switch on an oscilloscope or other test equipment by connecting a differential probe at JP5 5 intersil AN1576 0 March 16 2012 Application Note AN1576 ISL54225IRTZEVAL1Z Board Schematic SEL OE J4 oE A TP3 C SEL OE d O TP4 Jma Si 2 vez Li gt y dA TP1 A O R2 0 R130 c3 rie 5 1 0 01UF USB 1 ae in a oe EE wes DEVICE2 3 _DFN108 peas j DIFF PROBE JP6 1118p 2 DIFF PROBE JP7 VA A O EP i VA DIFF PROBE j3 JP5 JP4 i ph e o o hg P e VBUSCH2 J8 le J9 f VA te O TP6 6
8. USB USB TO HOST 3 al us oon VA VBUSCH1 USB TO DEVICE1 Intersil Corporation reserves the right to make changes in circuit design software and or specifications at any time without notice Accordingly the reader is cautioned to verify that the Application Note or Technical Brief is current before proceeding For information regarding Intersil Corporation and its products see www intersil com 6 intersil AN1576 0 March 16 2012
9. n of the USB A type connectors J6 and J7 4 Connect one high speed USB device at USB connector J6 and the other high speed USB device at USB connector J7 These connectors are located on the left and right sides of the evaluation board 5 Drive the OE control pin HIGH to open all switches of the ISL54225 IC by putting toggle switch S2 OE in the up position 6 Connect the USB cable from host computer to the USB B type receptacle J5 USB TO HOST High Speed Channel 1 Operation 1 Apply a logic LOW to the SEL pin by putting toggle switch S1 SEL in the down position 2 Apply a logic LOW to the OE pin by putting toggle switch S2 OE in the down position 3 You should now be able to send and receive data between the computer and the USB Device 1 connected at J6 4 To disconnect the USB Device 1 from the computer take the OE pin HIGH by putting toggle switch S2 OE in the up position High Speed Channel 2 Operation 1 Apply a logic HIGH to the SEL pin by putting toggle switch S1 SEL in the up position 2 Apply a logic LOW to the OE pin putting toggle switch S2 OE in the down position 3 You should now be able to send and receive data between the computer and USB Device 2 connected at J7 Test Points The board has various test points to allow the user to connect probes to make measurements The test points are described in Table 2 TABLE 2 TEST POINTS DESIGNA
10. ply these switches have a nominal roy of 6 5 over the signal range of OV to 400mV with a ron flatness of 0 30 The roy matching between the HSDx and HSDx switches over this signal range is only 0 060 ensuring minimal impact by the switches to USB high speed signal transitions As the signal level increases the roy switch resistance increases At a signal level of 3 3V the switch resistance is nominally 12Q The HSx switches are specifically designed to pass USB 2 0 high speed 480Mbps differential signals typically in the range of OV to 400mV They have low capacitance and high bandwidth to pass the USB high speed signals with minimum edge and phase distortion and thus meet USB 2 0 high speed signal quality specifications The HSx switches can also pass USB full speed signals 12Mbps with minimal distortion and meet all the USB requirements for USB 2 0 full speed signaling The maximum normal operating signal range for the HSx switches is from OV to 3 6V For normal operation the signal voltage should not be allowed to exceed this voltage range or go below ground by more than 0 3V If a positive voltage gt 3 8V typ to 5 25V such as the USB 5V Vpus Voltage gets shorted to one or both of the COM and COM pins or a negative voltage lt 0 5V typ to 5V gets shorted to one or both of the COM pins the ISL54225 overprotection circuitry OVP is activated OVP allows the device to detect the overvoltage condition and open the SP
11. processor drives the SEL pin to select the other USB channel 3 The microprocessor drives the OE pin Low which closes the switches and makes the connection between the computer and the other USB section of the player USB Connections A B type USB receptacle labeled USB TO HOST J5 is located on the bottom of the board This receptacle should be connected using a standard USB cable to the upstream USB host controller which is usually a PC computer or hub When this connection is made the ISL54225 device will connect the computer through to the USB device determined by the voltage at the SEL logic control pin An A type USB receptacle labeled USB TO DEVICE 1 J6 is located on the right side of the board A USB device can be plugged directly into this receptacle or through a standard USB cable An A type USB receptacle labeled USB TO DEVICE 2 J7 is located on the left side of the board A USB device can be plugged directly into this receptacle or through a standard USB cable The USB switches are bi directional which allows the host computer and downstream USB device to both send and receive data 2 intersil AN1576 0 March 16 2012 Application Note AN1576 High Speed Switches The four HSx switches HSD1 HSD1 HSD2 HSD2 are bi directional switches that can pass signals up to 3 6V with a VDD supply voltage in the range of 2 7V to 5 25V When powered with a 2 7V sup
12. r determines which section to connect to the computer The following sequence could be used to change channels 1 Asignal is sent to take the OE pin High which opens all switches The off isolation of the ISL54225 device allows the present active channel to properly disconnect from the computer 2 The SEL pin is set to select the other USB channel 3 The OE pin is taken Low to close the switches which makes the connection between the computer and the other USB section of the player This application note guides the user through configuring and using the ISL54225IRTZEVAL1Z evaluation board to evaluate the ISL54225 device Features e Standard USB Connectors e Banana Jacks for Power Ground Vgys and Logic Connections e Toggle Switches for Easy Control of Logic Pins e Jumpers to Allow a USB Device to Get Its Vays Voltage from the Host Controller e Convenient Test Points and Connections for Test Equipment ISL54225IRTZEVAL1Z Evaluation Board FIGURE 1 ISL54225IRTZEVAL1Z EVALUATION BOARD March 16 2012 1 AN1576 0 CAUTION These devices are sensitive to electrostatic discharge follow proper IC Handling Procedures Copyright Intersil Americas Inc 2012 All Rights Reserved 1 888 INTERSIL or 1 888 468 3774 Intersil and design is a trademark owned by Intersil Corporation or one of its subsidiaries All other trademarks mentioned are the property of their respective owners Application Note AN1576
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