LT-125 User Manual - Lattice Semiconductor
Contents
1. 2 2 2 12 21 2 28 H 264 dual channel 1080p30 encoder with full pel motion estimation e ssuaa aaa aaennaaei 32 H 264 single channel 1080p60 encoder with full pel motion estimation ss ssssaaaasnnaaei 33 H 264 single channel 1080p30 encoder with no motion estimation Intra Only 2 2 12 212 33 H 264 single channel Standard definition video encoder with no motion estimation 34 VG 1 encoder all variantS 1 46 4 02 nde sei sd a dA dai AE a dE PE Ada ABY A 34 H 264 and VC 1 four channel decoders e eeeeee eee aaa aaa aaa aaa aaa aaa aaa aaa 34 Further information asza ao AE AA OPAR BEA PASA AA ada aS oSA 35 Copyright 2012 Enciris Technologies SAS Other companies product names that may be used in this document are for identification purposes only and may be trademarks of their respective companies Page 2 SPECIAL HANDLING INSTRUCTIONS The circuit board contains CMOS circuitry that is sensitive to Electrostatic Discharge ESD Special care should be taken in handling transporting and installing LT 125 circuit board to prevent ESD damage to the board In particular e Do not remove the circuit board from its protective anti static bag until you are ready to use it e Handle the circuit board only at grounded ESD protected stations e Avoid touching the boards circuitry especially the DDR memories2. _ DDR Controller 3 DDR Controller 4 pe Current memory Reference memory 4 2 2 to gt Acquisition gt in caor t p Peinterlacing Spatial 4 2 0 Motion Unit ZOE Unit Noise Filter Color gt Estimation lt DCT IDCT nit Compensation gt Subsampling iA l y 4 t 1 I I lt a APE H Temporal WY video E gt Temporal gt Quantisation ata in I Entropy I lt Parameter and Status gt Bitrate gt Coder Registers Controller M VLC Enc J Compressed Data Output FIFO Bus Interface gt Muxer2 lt Uncompressed Data Dual channel encoding FPGA bitstream configuration Page 32 Bus Interface Muxer 1 and 2 This unit premultiplexes compressed and uncompressed video for each of the two channels prior to actual transmission via USB bus interface H 264 single channel 1080p60 encoder with full pel motion estimation From the data flow point of view this bitstream does not vary much from its 30fps counterpart Only some FPGA resources are duplicated as shown in the picture bellow E These Blocks a Controlle DDR it mer refe gt gt x2 x2 AAA A Y y gt Adjustment pm P gt lt P l Uso es nation gt pcrioct eee r A A i A A A A A i i I Single channel p60 60fps encoding FPGA bitstream configuration H 264 single channel 1080p30 encoder with no motion estimation Intra Only This configuration is very similar to the single channel variant exc
3. Page 3 INTRODUCTION The LT 125 is a Lattice Semiconductor ECP3 FPGA based board for the evaluation of Enciris Technologies HD and SD video compression and decompression IP The LT 125 is designed to demonstrate high performance h 264 AVC and VC 1 encoding in FPGA applications USB2 0 Device Power Connector Supply Status LED FAN Power Lattice XP2 FPGA USB2 0 Bus Interface STAG Z gt 4 Wat NP Lattice ECP3 150 FPGA Core Processing Unit GPIO aja ii RU HD SDI Input EGKiksgae 777 DVI D Input Figure 1 Top view of the LT 125 Board This board is equipped with an HDMI input a DVI input with both single and dual link capabilities and an SMPTE 3G HD SD SDI input These inputs can be used for one or multiple channel video capture and acquisition An HDMI output is also provided for display in pass through or decoding applications As the LT 125 uses FPGA technology for video processing it is inherently very flexible and can be configured for a multitude of operations Enciris Technologies supplies tools to change the LT 125 operating modes by using a choice of different FPGA configurations The supplied LT 125 configurations are full featured and have additional functionality that is not included in our standard h 264 and VC 1 IP deliverables Please contact us for more information Page 4 Multiple configuration are available including single channel H 264 compression dual
4. Enciris Technologies Model LT 125 USER MANUAL A Lattice ECP3 based HD video compression and decompression evaluation platform AUGUST 2012 Page 1 TABLE OF CONTENTS Table of Comte int asierea O A ERA aa aaa aa Eaa ba aaa anaE dA 2 Special handling instructions eee esse e aaa aaa aaa aaa aaa aaa aaa aaa aaa anawa 3 NYC JUCUOMZ ae O o W GEE A A T deka lea da bok 4 Notabi FGatUreS ee deoc Joa dee aa ada clay hearer deed Wyb 6 HARDWARE Description esa eee ea eau aaa anawa wawa aaa aaa aaa aaa E aira ET 7 Hardware SetUp esse dad ad Ado aaa a e PW add ady a Ada angdoeesaces sey ada Ada a aaa fad 9 Supported Video Resolutions eeeeeeee eee eee aaa aaa aaa aaa aaa aaa aaa aaa aaa aaa aaenaae 11 SOFTWARE Installation siirrot raakana A Ew a aaa aia aa aa aaia 13 Downloading the demo and driver application ee e se ee eee aaa aaa aaa aaa aaa aaa 13 Installation Procedure aa zaa i a A AE AA AA A RA Ad a dA AEC Ad YA 13 Software Uninstallation e eeeee esse ane aaa aaa aaa anawa aaa aaa aaa aaa aaa nnen nasa 21 Using the denio sasz Od Pd aaa bz w Ob aa da oe kd da Pk ORA 23 Appendix A Available FPGA Configuration BitstreamsS seeee sea aaa aaa aaa aaa anna aeca 26 Appendix B FPGA Configuration Bitstreams description e eeeaa eos aanieca 28 H 264 single channel 1080p30 encoder with quarter pel motion estimation
5. For Windows XP users you must make sure the following prerequisite software is installed if not already on your system e Windows Media Player version 11 or later For VC 1 encoder configuration Download link http www microsoft com windows windowsmedia player download download asp x e DirectX 9 0 or later Download link http www microsoft com downloads details aspx Familyld 2DA43D38 DB71 4C1B BC6A 9B6652CD92A3 amp displaylang en All Windows users must have an H 264 decoder on their system The link below downloads just but one of many available e Any H 264 DirectShow Decoder Filter For H 264 encoder configuration Example Download link http hax264 sourceforge net Downloading the demo and driver application See appendix A for a list of available LT 125 configurations Download the appropriate executable and follow the procedure below The download link is as follows http www enciris com lk dataf lt125_h264_driver_v2 14 msi Installation Procedure Please follow these steps in order to run the software installation for your LT 125 device gt STEP 1 Make sure all prerequisites are installed before starting product installation Page 13 The prerequisites are o Windows Media Player version 11 or later o DirectX 9 0 or later gt STEP 2 In order to install the LT 125 board please double click on LT125Setup_driverXXX exe gt STEPS If all prerequisites are already installed on your sy
6. channel H 264 compression see figure 2 dual channel VC 1 compression etc Some modes of operation are still under development and more will be added Easy to use demo applications are included demonstrating the mode of operation Using the resources of a Lattice ECP3 150 and four 32 bit Mobile DDRs the LT 125 can be configured to compress up to either two channels of 1080p HDTV at 30 frames per second video simultaneously or one channel of 1080p at 60 frames per second Up to four channels of HDTV can be decompressed with the LT 125 Shown below in figure 2 is a typical two channel compression configuration Compressed Uncompressed Audio Video Stream HD SD SDI SDI a and Audio Encoding Video Channel 1 Capture Digital ideo Audio Capture Compressed Uncompressed Audio Video Digital ideo Audio Stream Capture Figure 2 A 2 channel compression configuration Page 5 NOTABLE FEATURES A platform for evaluating Enciris Technologies H 264 and VC 1 video compression and decompression IP Uses a powerful Lattice ECP3 FPGA with 150 KLUTs for video processing Equipped with a DVI single and dual link video input Equipped with an SMPTE 3G HD SD SDI video input Equipped with an HDMI video input Equipped with an HDMI video output Connects to a host PC via a USB2 0 cable type B Can be completely reconfigured for different modes of operation in seconds FPGA Configuration bit
7. parameters to and from the USB device controller The LT 125 to host USB transfer rate is limited by the USB bandwidth In theory the bandwidth is 400 MBits s but in practice it is often considerably lower This rarely has any impact on the transfer of compressed video usually below the 10s of MBits s but can severely reduce the transfer rate of uncompressed video The LT 125 requires 5 VDC The power requirements depend on how the LT 125 is used A dual channel system compressing both channels at 1080p30 while acquiring 1080p60 video frame rate decimation being used requires about 10 Watts A 5 VDC 15 Watt wall mount power supply is provided The LT 125 has a number of efficient switching power supplies on board to meet the FPGA core IO peripheral device etc requirements In order to operate the LT 125 software must be installed on the host PC This includes drivers and demo applications The installation procedure is described later in this document For each LT 125 mode of operation a specific demo application is provided with a corresponding FPGA configuration bitstream Windows XP Vista 7 32 64 operating systems are supported The LT 125 uses no host CPU resources for compression or decompression and as such host requirements are minimal Page 8 HARDWARE SETUP The simplest usage configuration of the LT 125 evaluation board is shown in the following picture 5V AC Adapter Record broadcast R H 264 Video W HD V
8. plug in your device gt STEP7 Awindow popup will ask you to preinstall the driver The actual driver installation is done once the device gets plugged in Click Next Enciris Technologies LT 125 device driver Installer Welcome to the LT125 driver Installer Please Shutdown any other new hardware wizard if prompted before installing driver otherwise driver will not be found To continue click Next gt STEP8 The driver is now preinstalled Click Finish Page 16 Enciris Technologies LT 125 device driver Installer You are finished installing your LT125 device driver The drivers were successfully installed on this computer You can now connect your device to this computer If your device came with instructions please read them first Driver Name Status VY Enciris Technologies en Ready to use gt STEP9 You have successfully installed your LT 125 software package Click on Finish to continue and reboot your PC fe LT125 driver Setup EH Completing the LT125 driver Setup Wizard Click the Finish button to exit the Setup Wizard lt Back Cancel Page 17 iz Installer Information You must restart your system for the configuration changes made to LT125 driver to take effect Click Yes to restart now or No if you plan to manually restart later MN elias af jaj N gt STEP11 You will now be prompted with the plug and play wizard of
9. windows asking for device driver installation On the button box asking to connect to windows update click on No not this time and click on Next Page 18 Found New Hardware Wizard Welcome to the Found New Hardware Wizard Windows will search for current and updated software by looking on your computer on the hardware installation CD or on the Windows Update Web site with your permission Read our privacy policy Can windows connect to Windows Update to search for software O Yes this time only Yes now and every time connect a device No not this time Click Next to continue gt STEP12 Select automatic installation and click Next Found New Hardware Wizard This wizard helps you install software for enciris LT125 USB Board C If your hardware came with an installation CD lt 6 or floppy disk insert it now What do you want the wizard to do Install the software automatically Recommended Install from a list or specific location Advanced Click Next to continue gt STEP13 You have successfully installed your device Click Finish to terminate the installation and restart your computer Page 19 Found New Hardware Wizard Completing the Found New Hardware Wizard The wizard has finished installing the software for enciris LT125 USB Board Z Click Finish to close the wizard Back Cancel Congratulations Your LT 12
10. 5 device is now ready to be used Page 20 Software Uninstallation To remove the LT 125 software from your computer please follow these steps gt STEP execute the application called Uninstall LT 125 Driver in the installation directory You can alternatively chose the uninstall executable from start menu m enciris r Internet Internet Explorer E mail Outlook Express x3 MSN Windows Media Plays 33 Windows Messenger Tour Windows XP i Files and Settings Tr Wizard W Paint All Programs gt STEP2 TA Activate Windows 17125 Config Set Program Access and Defaults w Windows Catalog 4 windows Update mn Accessories fai Enciris Technologies fa LT125 driver zn Games GB Irfanview a Startup Internet Explorer w msn Outlook Express s gt Remote Assistance windows Media Player 33 windows Messenger S windows Movie Maker FA Log Off fo Turn OFF Computer gt C Program Files Enci uninstall the software package Windows Installer Are you sure you want to uninstall this product LT125 Config Uninstall LT125 Driver A On the next window click Yes to confirm that you want to Page 21 Uninstall Driver Package 2 All devices using this driver will be removed Do you wish to continue No gt STEP3 Directshow filters and demo applications will now be removed from your computer gt STEP4 Y
11. 55x255 motion estimation search range Bitrates from 64Kbit s to 80Mbit s h 264 baseline profile up to level 4 1 Note that blocks in blue are included in the FPGA bitstream but not in the IP The building blocks are as follows DDR Controller 1 and 2 These multiport DDR memory controllers simplify the task of handling multiple data streams in and out of a mobile DDR SDRAM using 2 D transfers Page 28 DDR Controller 1 handles current picture data whereas DDR Controller 2 takes care of past already encoded pictures NOTE This module also exists as a standalone IP Motion Estimation Compensation This is the Motion Estimation ME and compensation engine for H 264 video encoder This block consumes 540 clocks cycles per macroblock Quarter pel subpixel block matching is used in order to get the best possible match The ME covers a search range of 256 horizontal and 256 vertical pixels NOTE This module also exists as a standalone IP Crossbar Switch This unit selects one video source and passes it downstream for compression and preview and another video source for the HDMI bypass Video Front End This unit does a priori processing on the input video such as Cropping RGB to YUV4 2 2 colour space conversion and framerate decimation Video Sync Gen This block does adjustment for certain video modes that are not compatible to HDMI standard Acquisition Unit This unit stores the YUV4 2 2 video into memory via DDR Con
12. D Power OK LED USB Device a m oo QU The LT 125 board is connected to a USB bus using a standard USB 2 0 cable An external 5V is required included SUPPORTED VIDEO RESOLUTIONS Here is the list of supported video resolutions We are continuously updating this list Input Video Pixel Clock DVID H DVI HDMI HDMI Mode DMI D HDMI Output Output Input Input YUV RGB YUV RGB 480i59 94 27 MHz ok 576i50 27 MHz ok 480p59 94 27 MHz ok 576p50 27 MHz ok 720p25 74 25 MHz ok 720p59 94 74 25 MHz ok 720p60 74 25 MHz ok 1080i59 94 74 25 MHz ok 1080i60 74 25 MHz ok 640x480 60Hz 25 MHz 800x600 60 Hz 40 MHz 800x600 75Hz 50 MHz ok ok ok ok 800x600 85Hz 56 MHz ok ok 1024x768 60Hz 65 MHz ok ok ok ok Page 11 1280x768 60Hz 80 MHz ok ok ok ok 1280x960 60Hz 108 MHz ok ok ok ok 1280x960 85Hz 148 5 MHz ok ok 1280x1024 60Hz 108 MHz ok ok ok ok 1280x1024 75Hz 135 MHz ok ok ok ok 1280x1024 85Hz 157 MHz ok ok 1440x900 60Hz 106 MHz ok ok ok ok 1600x1200 60Hz 162 MHz ok ok 1920x1200 60Hz 154 MHz ok ok 5 Page 12 SOFTWARE INSTALLATION In order to demonstrate the capabilities of the LT 125 and the Enciris Technologies IP some driver software needs to be installed on a PC running Windows XP Vista 7 32 64bit operating system
13. d Quantization This unit reduces the dynamic range of the DCT coefficient introducing a non reversible degradation of the image The result will be fewer coefficients to transmit Entropy Coder VLC A Variable Length Coding VLC scheme is applied according to the H 264 specification in order to code DCT coefficients of a 4x4 block efficiently This step actually reduces the amount of video data Page 31 H 264 dual channel 1080p30 encoder with full pel motion estimation This core IP implements the h 264 video coding standard using the baseline main high profile up to level 4 1 It is basically a duplication of previous IP block except that Full pel motion estimation is applied instead of quarter pel motion search BS these blocks are not included in the 1P oes DDR Controller 1 DDR Controller 2 s_clk nternal gt Current memory Reference memory gt Clock Generator y vy Acquisition za Deinterlacing Spatial panne Motion gt Unit d BmB ME gt gt Estimation lt DCT IDCT Unit Noise Filter Color CORREO a Subsampling AA I 1 i me YUV Videc I Temporal Da a ln o paw gt noise Filter Quantisation I Entropy I Parameter and Status Bitrate Registers gt controller gt ne y RGB Videc Enc 3G SDI Compressed Data Output FIFO HD SDI SD SDI Yy PEA gt HDMI Bypass gt HDMI t ey e Bus Uncompressed Data p Interface lt gt ae REF data out Bus Interface gt
14. e 8x16 characters are used User defined characters can also be used instead of the default ASCII character set NOTE The preprocessing unit colour adjustment deintrelacing spatial noise filter and color subsampling also exists as a standalone IP Enciris Preprocessing IP Temporal Noise Filter This module applies adaptive filtering to compensate for noise that is detected using motion statistic Bitrate Controller BRC This unit ensures that the user given target bitrate is met according to the chosen BRC policy CBR VBR etc The quantization level is dynamically adjusted between a minimum and maximum level in order to reduce the dynamic range of the compressed coefficients This will for example reduce the bitrate while increasing the amount of coding artifacts and vice versa Parameter and Status Registers This is a configuration unit which ensures that the right programing is applied to the configuration registers It also reads status registers back to the user via USB bus interface unit Enc Output FIFO This unit fills an output buffer with compressed data before it get stores to the external DDR memory Page 30 Raw Output FIFO This unit fills an output buffer with uncompressed data before it get stored to the external DDR memory DCT IDCT An integer 4x4 Discrete Cosine Transform is applied to the residual image data after motion estimation This DCT transform conforms to the H 264 encoding standar
15. ept that motion estimation logic as well as one DDR block is removed Page 33 Single channel p30 30fps encoding FPGA bitstream configuration without motion estimation H 264 single channel Standard definition video encoder with no motion estimation This configuration is very similar to the previous one FPGA resources are further narrowed down to allow for less than 66MHz operation VC 1 encoder all variants These configurations are very similar to their H 264 counterparts The main difference is in the core processing units DCT Quantization and VLC They are modified according to the VC 1 encoder specification H 264 and VC 1 four channel decoders These configurations are under development We expect to use 4DDR blocks as well as 140KLUTs for the four decoders Page 34 FURTHER INFORMATION To contact us for further information on this or any other Enciris Product Enciris Technologies 42 Avenue de l Europe 81600 Gaillac France Tel 83 0 5 81 1801 12 Email tech enciris com Web http www enciris com Page 35
16. ideo Source LT 125 Encoder Board Figure 4 In this configuration a camera connects to one of the 3 LT 125 video inputs up to two cameras can be connected at the same time when dual channel configuration is chosen The LT125 is also connected to a 5V power supply and to a host computer via USB device cable To accommodate for the numerous video sources various low cost off the shelf passive cable adapters e g HDMI to DVI might be required However the video signaling remains compliant with the inputs The HDMI output normalizes video resolution and loops video from any of the inputs through The physical video input output connectors are shown below 3G HD SDI DI Status LED VI Status LED HDMI IN HDMI Status LED HDMI OUT Te Opp Page 9 The following table summarizes some of the various video input output types that are supported by the LT 125 The supported input features are FPGA configuration dependent Connector Audio Video Input Features SMPTE HDMI HDMI DVI 3G HD SD OUT SDI Signal types Digital SDTV Digital HDTV Physical Connections SDI 75 ohm BNC DVI D Audio Signals Digital Audio embedded with video W e e e SMPTE in is under development HDMI to DVI adapter required HDCP not supported Under development HDMI SDI audio embedded in video stream Multichannel audio only L R extracted eO SS Page 10 5V Power Supply User Defined LE
17. ing IP is considerably smaller See appendix B for more detailed description of the bitstreams capabilities Bitstream Name Special FPGA Logic Description Features utilization in LUT H 264 single It125 h264 sc _p30 bit 2 DDR memory 56K LUTs channel blocks needed 133MHz 1080p30 encoder with quarter pel motion estimation H 264 dual It125 h264_ dc_p30 bit 4 DDR memory 110K LUTs channel blocks needed 133MHz 1080p30 encoder with full pel motion estimation H 264 single It125 h264 sc _p60 bit 4 DDR memory Not yet available channel blocks needed 1080p60 encoder with full pel motion estimation H 264 single It125 h264 sc _p30_ionly Only 1 DDR Not yet available channel memory blocks 1080p30 bit needed encoder with no motion estimation Intra Only H 264 single It125 h264 sc sd _ionly Only 1 DDR Not yet available channel memory blocks Standard bit needed definition video encoder with no Page 26 motion estimation Intra Only VC 1 dual It125 ve1_dc_p30 bit 4 DDR memory 110K LUTs channel blocks needed 133MHz 1080p30 encoder VC 1 single It125 vc1_sc_p60 bit 4 DDR memory 90K LUTs channel blocks needed 133MHz 1080p60 encoder VC 1 single It125_vc1_sc_p30 bit 2 DDR memory 56K LUTs channel blocks needed 133MHz 1080p30 encoder VC 1 single It125_vc1_sc_p30_ionly bit Only 1 DDR 56K LUTs channel memory blocks 133MHz 1080p30 needed encoder wi
18. ou have successfully uninstalled your LT 125 software You can now restart the computer in order to complete the uninstall procedure LT125 driver You must restart your system for the configuration changes made to LT 125 driver to take effect Click Yes to restart now or No if you plan to manually restart later Page 22 USING THE DEMO You may want to run the LT 125 H 264 SC P30 demo application that is on your taskbar or start menu as shown below in order to test the device with the single channel 1080p30 FPGA configuration MSN Accessories Windows Media Playe gt fam Enciris Technologies MABEZENZANA 6 gt LT 125 H 264 SC P30 demo D 33 Windows Messenger E Games 7 Startup Tour Windows XP Internet Explorer u msn Files and Settings Tr T Wizard 3 Outlook Express 4 Windows Update p Remote Assistance Windows Media Player 8 Windows Messenger CCT CUM Sk windows Movie Maker Log Off o Turn OFF Computer Start menu and taskbar entry The application will launch a so called directshow graph with a video Source Filter a video Decoder Filter and a video Renderer Filter as shown below Note that video decoding usually involves lots of CPU resources Make sure you configured your video decoder properly LT 125 Source H 264 Decoder Video Renderer Direc
19. ovide the necessary signal level shifting required by the FPGA A Gennum 3G SDI input equalizer is used to assure SMPTE signal integrity The HDMI video output uses a ST Microelectronics TMDS level shifter as the FPGA output does not provide the required HDMI levels directly All the video signals in and out of the FPGA use the ECP3s built in SERDES SERializer DESerializer The FPGA has access to four Micron Low Power Mobile DDRs These are 32 bit DDRs with a capacity of 256Mbits each that operate at up to 133MHz using Enciris Technologies proprietary DDR controller IP The DDR controller IP is optimized for video applications and can perform both standard burst and 2 D block random accesses very efficiently When the LT 125 is initially powered the FPGA is empty and un configured As there is no ECP3 configuration device i e Flash memory on the LT 125 the configuration bitstream is uploaded from the host PC via USB each time the board is used Using this method programming the ECP3 takes only a second or two and allows for quick changes of configuration without requiring the use of the JTAG port A Cypress USB Page 7 device controller receives the configuration bitstream and then sends it to the XP2 which in turn serializes via SPI and programs the ECP3 The XP2 is configured at the factory via JTAG The Lattice XP2 FPGA is also responsible for efficiently transferring packets of data e g Compressed uncompressed video and
20. stem you will be prompted with the welcome window of the installation package Click Next to continue ie LT125 driver Setup EH Welcome to the LT125 driver Setup Wizard The Setup Wizard will install LT125 driver on your computer Click Next to continue or Cancel to exit the Setup Wizard gt STEP4 On the next window you can select an installation directory or stick to the default directory Page 14 fe LT125 driver Setup Select Installation Folder This is the Folder where LT125 driver will be installed SH To install in this Folder click Next To install to a different folder enter it below or click Browse Eolder Ic Program Files Enciris Technologies LT125 driver Advanced Installer Choose your installation directory and click Next gt STEP5 You are now ready to install the software package To progress click on Install i LT125 driver Setup Ready to Install The Setup Wizard is ready to begin the LT125 driver installation SP Click Install to begin the installation If you want to review or change any of your installation settings click Back Click Cancel to exit the wizard Advanced Installer Page 15 gt STEP6 The DirectShow lt framegrabberH264 ax and lt_framegrabber1H264 ax filter will now be registered Click OK to confirm The device driver will now be preinstalled That allows easy plug and play when you first
21. streams are uploaded directly via USB JTAG is not required Very simple setup Includes a PC based application for quick evaluation and configuration Includes Windows XP Vista 7 32 64 bit support A simple SDK that includes DirectShow is available for developing custom applications around the LT 125 Page 6 HARDWARE DESCRIPTION SDI JH SMPTE Equ IN lt DDR DDR r gt Power m TMDS Management FON s Equ j 5 Video Inputs DVI a IN q Configuration Equ gt e Lattice EEEE EFH ECP3 150 i EN Lattice USB HOM TMDS ra q_Pata__ Device 4 0 USB j Eau XP2 8 Ctrl E wa a srl Video Output HDMI TMDS J OUT Level L 4 Shifter DDR DDR Figure 3 LT 125 Block Diagram The LT 125 evaluation module includes video input and output connectors a series of video input equalizers and a level shifter a Lattice ECP3 150 FPGA DDR memories a Lattice XP2 8 a USB device controller power management electronics and a USB device controller These functions are depicted in the figure 3 When high speed video signal passes through a cable signal degradation occurs The LT 125 is equipped with input equalizers to restore video signal quality ST Microelectronics TMDS equalizers ICs are used for DVI and HDMI inputs These devices are designed to handle video at rates exceeding 1080p60 and also pr
22. th no motion estimation Intra Only VC 1 single It125 vc1_sc_sd_ionly bit Only 1 DDR Not yet available channel memory blocks Standard needed definition video encoder with no motion estimation Intra Only H 264 1080p30 It125 h264 4c_p30_dec bit Under Under four channel decoder development development Not yet available VC 1 1080p30 four channel decoder It125 vce1_4c_p30_dec bit Under development Under development Not yet available Page 27 APPENDIX B FPGA CONFIGURATION BITSTREAMS DESCRIPTION H 264 single channel 1080p30 encoder with quarter pel motion estimation This bitstream implements the h 264 video coding standard using the baseline main high profile up to level 4 1 DDR Controller 1 DDR Controller 2 gt Current memory Reference memory EF al a pe 0 Motion gt EF eFiter gt f Estimation j DCTADCT sarna Compensation p YUV Video Data ir 3G SDI Compressed Data HD SDI a SD SDI y y a F a HDMI Uncompressed Data data out Bus gt Interface ail Del jl em ng gt Aci ste nt gt Noise Fi iter gt Quantisation Single channel p30 30fps encoding FPGA bitstream configuration This bitstream has following features implemented 133MHz required for 1080p at 30fps compression low compression latency less than a picture All resolutions and frame rates supported Large 2
23. troller 1 It also dispatches the video for preprocessing Color Adjustment Unit The video now enters a preprocessing phase prior to actual compression The Color Adjustment Unit applies user defined HSBC Hue Saturation Brightness and Contrast adjustment to the video data Deinterlacing Unit This is a content motion adaptive deinterlacing filter for interlaced video content Downscaling Unit This unit scales down video to any multiple of 16 pixels The aspect ratio does not need to be preserved during downscaling Separate downscaling can be performed for the compressed and uncompressed stream Page 29 Spatial Noise Filter This unit applies non linear edge preserving noise filtering in the spatial domain in order to remove high frequency salt and pepper noise 4 2 2 to 4 2 0 Color Subsampling This unit does the chroma subsampling The result of the subsampling is smaller resolution for chroma than for luma taking advantage of the human visual system s lower acuity for color differences than for luminance On Screen Display This module implements user defined on screen text overlay User can set up to 4 words of 16 characters each Each word can be placed at user defined position on the frame It is important to note that the overlay is performed prior to compression and is thus encoded into the encoded stream If the input video width is greater than 720 large characters 16x32 will be used for OSD otherwis
24. tshow Graph showing H 264 decoding chain If you did not plug any video source yet you can still test the board by checking color bar test mode on the prompted DirectShow property page See picture below Page 23 enciris framegrabber Properties Enciris LT 125 Encoder 0 Enciris Technologies m video Settings Perec mara Video input type Video input resolutions DVI D BITRATE ADJUSTMENT HDMI Colorspace VIDEO RESIZE HD SDI 5 VIDEO NOT AVAILABLE pD 1280x720p30 COLORBAR TEST MODE Video target bitrate 10000 Kbits s m Audio Settings Audio format pem 16BIT STEREO 48KHZ v Target WMA bitrate channel 254000 bitsfs a fauto gt framerate Audio input a OK Cancel Apply LT 125 Directshow property page You should now see the decoded video preview in an ActiveMovie Window as shown below Page 24 EM ActiveMovie Window COLORBAR 0 00 Mbit s 0 Drop 2 Buf LT 125 H 264 SC P30 MB ActiveMovie Window Decoded video preview in an ActiveMovie Window Ch EER s 7 22PM Page 25 APPENDIX A AVAILABLE FPGA CONFIGURATION BITSTREAMS Here configurations will be added continuously is our current available FPGA configuration bitstream table Newer Note that the FPGA logic utilization indicated in LUTs in the table below refers to the entire LT 125 bitstream The logic utilization of the correspond
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