WEBENCH Altium Connector User`s Manual
Contents
1. System Design Compiler Instruments Shortcuts gt gt Note If the close browser page by right clicking doesnot work use File gt Close e WEBENCH Simulation Engine Menus e Netlist for the project IDXP File Edit View Project Place Netlist for the document 4j Browse Library W Add Remove Library Make Schematic Library Make Integrated Library Design Tools WEBENCH Simulator Reports Window Help Project Templates General Templates Configuration Templates gt Set Template from Vault Update Current Template Remove Current Template Netlist For Project Netlist For Document gt Simulate Create Sheet From Sheet Symbol Create HDL File From Sheet Symbol Create Sheet Symbol From Sheet or HDL gt Create Component From Sheet Rename Child Sheet Synchronize Sheet Entries and Ports PCAD Verilog File VHDL File XSpice Document Options FIDXP File Edit View Project Place Design Tools WEBENCH Simulator Reports Window Help amp Browse Library Add Remove Library Netlist For Document Make Schematic Library Make Integrated Library Project Templates General Templates Configuration Templates gt Set Template from Vault Update Current Template Remove Current Template Netlist For Project Simulate Create Sheet From Sheet Symbol PCAD Verilog File VHDL File W2. Advanced Charting Solutions Charis K Aris YAxis Bubble Size Solutions 7 found O View PnasefRad chat C View Gan yN Chart Group Del v Attenuatic v Filter Orde Filter Response Color Order MaxQ Att dB Passband Group Group Setting Step Ripple Delay Delay Time Response Gain ae Phase deg d dB usec Hatness usec Overshoot m usec en m a P e EI Umerteeba Bue a p de car xum nm exe 4e po 1 WES i P Butterworth Bick 4 ast 59 0002 MBAGA 32676 2717626 1082 am T 22 i WamcebaPe o ee moare O osaa aza sim z m LS EEE M zT Sener eee ee ERE Ee ia india Transitional Gaussianto 4248 Agus 8 482 S255 8802 40M4 1200 1591612 040 Group Doiay usec Stop Rosponso V i 12 200 B T hd os 200 i fos iu System Design Compiler Instruments Shortcuts 16 It may ask to login if you are not already signed in WEBENCH ie E amp v A Back New Visualizer Sim Export Prat Share Design FILTER DESIGNER DESIGN SUMMARY WEBENCH Optimizer Schematic Stage 4 Stage 2 Lowest 7 a ge eeel Second Order Topology SallenKey v San 4 Second Order Topology SalenKey v ain 1 CubfFrequency 1 KHz a 054 Cute Freauencr 1KHr c an smallest Footprint 1 p SEM Min OpAmpGBWe 54 KHZ _ MinOpampGBWE 131 KHZ E 4
3. WEBENCH Design ID uad Date of WERENCHY Export 47 2014 Time of WEBENCH Export T4841 PM Altium Simulation Export Enabled Power Designer Parts Enabling simulation export requires a lot of validation and therefore currently it is enabled only for selected set of power designer parts We have been validating more parts on weekly basis and enabling them for Simulation export therefore revisit WEBENCH if you don t find a part which is enabled for Simulation export Exporting a Filter Designer Part From WEBENCH menu in Altium Click on WEBENCH Filter Designer to launch Filter Designer WEBENCH Window Help 8 WEBENCH Power Designer P WEBENCH Power Architect WEBENCH FPGA Power Architect X WEBENCH Microprocessor Power Architect WEBENCH Clock Architect WEBENCH LED Architect WEBENCH Sensor Designer TI E2E Help Central Open WEBENCH Design WEBENCH Altium Connector User Guide 4466 Ve 15 New FILTER DESIGNER REQUIREMENTS Power LED LEDArchitect Power Architect FPGA uP HotSwap Simple Switcher Filters Clocks Filter Type s Lowpass Click to design with default specifications Hance Attenuation Cutoff Frequency fc Gain Ao 1 e Search Filter Response Stopband Stopband Attenuation Asb Pick Filter Response 45 dB Stopband Frequency fs 5000 Hz Supply Voltage s Dual Supply Single Suppl
4. Ca spen Dg Bate Mor Ca Schematic Ca resa E Pce Ear a Tot Editors Ca Serpting sytem 3 cam titor a Ca Simihtion General EB Moed Sim siveticntertce WEBENCH Simulation Engin Cave Enter e Connected Devices amp Extensions and Updates Ea Sign in Altium Vault Publishing Destinations Thosar reporton en e Design Releases e Altium Forums Qm wki Sulaton WEBENCH Simulation Engine WEBENCH Location To run the WEBENCH simulation engine diecty trom Altium Designer enter the diretor you installed WESE WESE instalation location 1D wwVatuvuun Designer 0503F 454 A 0D 405F SCOA 457S124FZADENEensionsWESENCHIVESE BIN Auto Detect Options E Atways toad error files i smownnts Ei snowing EF snow locations of models touna WEBENCH Activation To activate the WEBENCH simulation engine enter acvation code activation de code here o gt kram mansour t com IENCH Activation Code H Simulation Engine Contact Us TI Worldwide United States my TI Login saquones saueign pueoqdy NCH Simulation Engine Tig FB tator Ea Tes Editors E Soipting system E CAM Editor 4 Simulation General Torun the WEBENCH simulation engine direct from Aitium Designer enter the directory you installed WESE WESE instalation ication Data tium ltum Designer PBO 3F464AG0D 405F BCOA 4573124FZADBPEen sion AWEBENCHIWVESEIn Auto Detect
5. Options E moea sin E SMart Interface E WEBENCH Simulation Engin gt Bae Enter activation code here n FAtwas toad error fies RE showhints Hi smowwamings Ii snow locations of models founa WEBENCH Activation To etate the WEBENCH simulation engine enter adtiation code WEBENCH Acimation Code 1 Next Click on Simulation System Design Compiler Instruments Shortcuts gt gt A Altium Designer 14 3 Workgroup Workspacel DsnWrk http webench ti corn appinfo webench scripts node webench design 933952 261 adl4 sim PrjPcb Makram Man OE EE DXP File View Project WEBENCH Window Help E jin http webench4 ti com appinfo 9 Cloud Preferences my TI Acc WEBENCH Simul Please copy the stri textbox under DXP Activation Code E Good referees Cg sytem 4 Bate Managen Bg Schematic EL Cg CO Editor Tot Eators Ca Seipting Syte Cg CAM Editor a Ca Simihtion E3 Genera EB Moed sim ES merce E Westnet ca ae Enter activatio code her 4 By System A Genera A View Kj Account Management Transparency Aj Navigation EF Design insight i Projects Panel Sj Default Locations Gi Fite types New Document Defauts E Desktop Layouts E Printer settings Gj station i Atium vaut Data Management Simulation Cloud Preferences DX Settings
6. Setup Webench Simulation Engine View Log File Generate WEBENCH Netlist Using WEBENCH Simulation Engine Installing License for WEBENCH Simulation Engine by Activating WEBENCH Altium Connector e Click on WEBENCH gt Activate WEBENCH Altium Connector A Altium Designer 14 3 webench design 933952 261 adl4 sim PrjPcb Makram Mansour erem E DXP File View Project WEBENCH Window Help du mi WEBENCH Design Center Open WEBENCH Design WEBENCH Simulation Engine WEBENCH Altium Connector User Guide Activate WEBENCH Altium Connector e It will take you to the user login page User you my TI login If you don t have you can create one by registering my TI Account Log in to use WEBENCH Design Tools Existing my TI user New user Register for free Required Your email address It s quick and gives you access to free samples TI s E2E Community training product reviews and personalized recommendations Your my TI password Select a Country Region Forgot your password Benefits of my TI Cookies and privacy To access your account your browser must be set to accept temporary cookies Howev Order free samples need to accept cookies to view the rest of Tl com Join TI E2E Community Sign up for product updates Manage newsletter subscriptions What s your privacy policy Bde epu LEN Ti respects your privacy Your personal information will be used to tailor communicatio you w
7. WBSE performs iterations to propagate the dc values of all independent sources in the circuit to all other nodes and devices in the circuit Iterations continue until a steady state is achieved In the steady state voltage on nodes charge on capacitors flux in inductors and currents through resistors become constants DC domain analyses include OP operating point analysis DC dc transfer curve analysis Time domain In time domain WBSE first computes the time 0 steady state solution Then time is increased and the value of time varying independent sources change As a result node voltages change capacitors charge or discharge and currents through devices change WBSE takes appropriately small time steps and re computes the stable state This process is repeated until the end of the time domain simulation Time domain analysis includes TRAN transient analysis Small Signal Frequency domain These analyses work on a stable operating point of the circuit At the operating point WBSE generates the linearized small signal model of the circuit In small signal frequency domain the circuit s behavior is analyzed at different real or complex frequencies Frequency domain analyses include AC ac analysis The operating point for small signal analyses can either be a stable dc solution where all independent sources are set to their dc values or it can be a converged time point solution during a transient analysis wh
8. u I 4 BEI J 2 c2 LNICEST2BIM J HOT e 0 010 Ohm Dual Suppy i5V 50V siter Topology Specification Ted Romi m 7 35 KOhm 3 83 KOhm Tweak Design Response E js Butterworth Nee ven C Te Update Billof Materials Bill of Materials Part a Manufacturer Part Number Price Value Footprint Top Vie Edit Parta r Part Number Price Value Footprint Top viel Edit Current Design 1123 prt Toe l l monum Muccew cam MP gx j Sess WA WA AL 055 WA NA Name Lowpass Sallen Key Butterworth Wetumems LMCSS72BIM Duald e Channeksoze LMCOS72BIM Dualde e Channetso 2s Notes Ci MuRata GRI2105C4H912JA0 0 06 400nt 675mm m C1 Murata GRI2195C18912JA0 005 9400nF 67 5 mm m C2 Murata GRII2195C4H123JAD s m m C2 MuReta GRM3C5C1H82340 T ELA Eu GERE ru c JE E a FILTER DESIGNER DESIGN SUMMARY WEBENCH Export x Simulation Export In WEBENCH Export Dialog box select the Altium Designer radio button and click on export to download the design in Altium Open the downloaded design in the Altium as explained above for Power Designer and simulate it in Altium Designer Support For reporting bugs or any other help regarding WEBENCH Altium Connector please post your queries to WEBENCH Design Center in TI
9. can be saved to the dioud for access any where any time In the cloud preferences banner above enable your cloud preferences to use this feature Set To Defaults 7 Saven EHE or pueoqdp saone Shortcuts gt gt Now select the WEBENCH Simulation Engine E DXP Eie View WEBENCH Simul Please copy the str textbox under DXP Activation Code C cond Preferences Lg sytem Tag Dato Managem D Schematic PL Tg CO eater Tes Eators Ta Seiptng syste a Cm editor 4 a Simuintion Gener E3 Mied sim ES setri E3 wesencH Ea Ware Enter activatio code her A Aum Designer 14 3 Workgroup Workspacel DsnWrk http webench4 ti com appinfo webench scripts node webench design 833952 261 ad14 sim PrPcb Makram Mar GE Es E http webench4 ticom appinfo m 9 O 4f Project WEBENCH Window Help Sin E s Goud Preferences gt Eg System gt DH Data Management gt Eg Schematic gt Ea FPGA b Eg PCE Editor E3 Text Editors Cj Scripting System b Ga CAM Editor 4 Bg Simulation ES General E Mixed sim ES siMetrixintertace mulation WEBENCH Simulation Engine WEBENCH Location To run the WEBENCH simulation engine directly from Altium Designer enter the directory you installed WBSE WESE installation location Altium Altium Designer AFBA2S9E D4EF 4DC7 AF76 401473426453 Extensions
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11. simulation xml Y 2 ie Le 9 ESSI e IL 8 ule EL e L5 Le Back New Solutions Visualizer BOM Charts Schematic Optimize OpVals Sim Edit Export Print Share Design Assistant WEBENCH Export x Schematic Board Layout BETA Optimization Tuning Lowest BOM Cost e Footprint 4 Efficiency Ds w Footprint BOMCost Efficiency so 141 1 Advanced Options Soft Start Time ms 0 135ms lt 0 135 ms lt 100ms Frequency Current Design 744 Ic 30 H VinMin VinMax 6 V source DC Vout 23V Y Name TPS62130RGTR 3 3V 6 0V to Altium Designer Cadence OrCAD Capture CIS Mentor Graphics Xpedition xDX Designer CadSoft Eagle Schematic Capture v6 4 or newer P CAD DesignSpark Altium Designer Cadence Allegro 16 0 16 5 Cadsoft Eagle PCB v6 4 or newer Designspark Mentor Graphics PADS PCB Simulation Export Altium Designer Tina TI CAD export completed successfully Click Download to proceed T 3 B Share this design Export Board CAD File DEBUG Open the design in Altium using Open WEBENCH Design from WEBENCH menu bar You can simulate design using WEBENCH Simulation Engine 14 WEBENCH TPS62130 Transient Simulation Mile 162130 Startup Transient Simulation Design Center ad e Exported from WEBENCH Designer WEBENCH
12. the component is supported e The above example is provided with your installation of this extension and can be found in lt WEBENCH Extension Installation Dir gt WBSE Examples directory of your system The example uses WBSE encrypted model Exporting Design from WEBENCHO Designer In order to export a design first open a design in WEBENCH e g TPS62130 e e e Ean js Jala Ee Ae Back New Solutions Visualizer BOM Charts Schematic Optimize Op Vals Sim Edit Export Print 4 15 E Lm VinMin 7 3 3 V VinMax 6 V SCHEMATIC Share Design Assistant Rload Click on CAD export button and choose Altium Designer in Simulation Export panel 13 Lowest BOU Cost e A y pont trece D BOMCost Efficiency 80 141 91 TP 62130RGTR 3 3V 6 0V tc Schematic Altium Designer Cadence OrCAD Capture CIS Mentor Graphics Xpedition xDX Designer CadSoft Eagle Schematic Capture v6 4 or newer P CAD Design Spark Altium Designer ree WEBENCH Export Board Layout BETA Altium Designer Cadence Allegro 16 0 16 5 Cad Soft Eagle PCB v6 4 or newer DesignSpark Mentor Graphics PADS PCB Simulation Export O Tina TI cans e 9 Amm CAD Export Click on Export to download simulation export file On successful completion of export process click on download file and save the
13. E2E forum from WEBENCH Menu 17 WEBENCH Simulation Engine Reference Guide Introduction to WBSE WEBENCH Simulation Engine WBSE is a general purpose circuit simulation program that analyzes electronic circuits using direct method circuit simulation techniques These techniques provide precise waveforms for voltages currents and charges in the circuit WBSE simulates circuits containing a range of devices including Resistors Capacitors Inductors and mutual inductance A variety of independent and dependent voltage and current sources Lossy and lossless transmission lines Range of non linear devices include Bipolar junction transistors Junction field effect transistors MOS field effect transistors WBSE uses built in models for these non linear semiconductor devices and you need to specify only the pertinent model parameters WBSE requires at least one file as input The input file should contain the circuit description in the form of a netlist of primitive circuit components the models used for all non linear devices in the circuit the analyses that need to be performed on the circuit the options to be used for the analyses and finally the outputs that need to be saved 18 Overview Overview Analyses performed by WEBENCH Simulation Engine WBSE can be grouped into 3 domains DC domain These analyses compute the stable dc state of the circuit All device parameters are computed first Next
14. EBENCH Simulation Engine Create HDL File From Sheet Symbol gt XSpice Create Sheet Symbol From Sheet or HDL Create Component From Sheet Rename Child Sheet Synchronize Sheet Entries and Ports Document Options Simulate WI DXP File Edit View Project Place Design Tools WEBENCH Simulator Reports Window Help amp Browse Library W Add Remove Library Make Schematic Library Make Integrated Library Project Templates gt General Templates Configuration Templates gt Set Template from Vault Update Current Template Remove Current Template Netlist For Project gt Netlist For Document Mixed Sim Create Sheet From Sheet Symbol Create HDL File From Sheet Symbol gt Create Sheet Symbol From Sheet or HDL Create Component From Sheet Rename Child Sheet Synchronize Sheet Entries and Ports Document Options e WBSE Analyses Setup EUR Seat a Ae ete Collect Data For Active Signals M 7 General Setup DC Sweep Analysis SimView Setup Show active signals AC Small Signal Analysis 7 Global Parameters 4 Advanced Options Available Signals Active Signals RR Load i VA3 branch i j j e WEBENCHG Simulation Engine Toolbar 9 yana e Mapping of toolbar icons to the function is shown in below figure WEBENCH Simulation Engine Toolbar V vi gt y 508a Run WEBENCH Simulation Engine 2 d NI View Log File
15. I TEXAS INSTRUMENTS WEBENCH Altium Connector User s Manual SZZU007 Version 1 4 Sept 16 2014 WEBENCH Design Center Copyright 2013 2014 Texas Instruments Incorporated Contents nti fors ULEI SI AEE EAE TEE NA IHE DID IUD MU HDI EUR 3 Menus and Toolbar sine a pO DD em pecu 4 WEBENCHO Altium Connector Menus and Toolbar ssssssssse 4 Using WEBENCH Simulation Engine cesses Installing License for WEBENCH Simulation Engine 7 Running WEBENCH Simulation Engine eese 12 WBSE MOOSIEnDnoryption on de ret eer RE Lam Peu 13 loce S Mam 13 WEBENCHO Simulation Engine Reference Guide sssssss 18 Introduction WEBENCH Design Environments from Texas Instruments are unique and powerful software tools that deliver customized power lighting filtering clocking and sensing designs in seconds These easy to use tools help you generate optimize and simulate designs that conform to your unique specifications They allow you to make value based tradeoffs at a design system and supply chain level before your design is committed to production WEBENCH Altium Connector is an interface to online WEBENCH Design Center as well as offline WEBENCH Simulation Engine WBSE You can access WEBENCH from Altium Designer using this extension and optimize your design
16. PM 124 2014 2 Ei i E o Outp Name WEBENCH Simulation Engine Ty ow 1 24 2014 3 5 TLV70715 TRANSIENT SIMULATION L Hi PAGELSch WBSE KU1 Model found in C ProgramData 1 24 2014 4 E E Hi PAGELSch WBSE Model found in CAProgramDataMAltium m 1 24 2014 5 E LJ Hi PAGELSch WBSE Model TLV70715 not found in file C Pro 1 24 2014 6 g Gie Outp TLV70725 nti 1 24 2014 7 5 Eis Outp Finished Output Generation At 6 09 11 P 1 24 2014 8 l E fn TLV70715 tis WBSE Connecting to WBSE 1 24 2014 9 2 E fn TLV70715 tis WBSE Parsing netlists m 1 24 2014 10 Bin TLV70715 tis WBSE Walking AST 1 24 2014 11 v at T oV fn TLV70715 tis WBSE Checking Analyses 1 24 2014 12 Z p R Rie E pn TLV70715 tis WBSE Expanding circuit 1 24 2014 13 mos 1 j j gn TLV70715 tis WBSE Setting up simulation ws 1 24 2014 14 MN pn TLV70715 tis WBSE Running simulation m 1 24 2014 15 Jrz fn TLV70715 tis WBSE Simulation Completed Successfully 6 09 15 1 24 2014 16 Editor PAGEL 2 rv Mask Level Clear m I V vin i g ME I f rrr I I i I 0 200m 0 400m 0 600m 0 800m 1 000m time 21 3988 I V vout E 1500 i a 1250 i 1000 i 0750 E E 9398 i 0000 RU rit 1 1 1 T 0 000m 0 200m 0 400m 0 600m 0 800m 1 000m Projects Messages WBSE Transient Analysis Mask Level Clear X 5 in Y 5 2in Grid 0 1in De mpil CH Instruments Shortcut 12 WBSE Model Encryption e WBSE Encrypted Library for
17. WEBENCH WBSE bin Auto Detect Options E Atways load error files Show hints Show warnings Show locations of models found WEBENCH Activation To activate the WEBENCH simulation engine enter activation code WEBENCH Activation Code sere etauts Seren saves pueoqdp sauone4 Shortcuts gt gt Next press Ctrl V to paste the activation code and press activate 10 A Altium Designer 14 3 Workgroup Workspacel DsnWrk http webench ti corn appinfo webench scripts node webench design 933952 261 sdl4 sim PrjPcb Makram Man OB i Jin 5 EE DXP File View Project WEBENCH Window Help http webench4 ti com appinfo w 9 my TI Acc WEBENCHe Simuld gt Gil CAM Editor a By Simulation I gt iy Data Management gt Eg Schematic gt Eg FPGA Eg PCB Editor Eg Ted Editors Cg Scripting system Simulation WEBENCH Simulation Engine WEBENCH Location To run the WEBENCH simulation engine directly from Altium Designer enter the directory you installed WESE WESE installation location C ProgramData Altium Aitium Designer AFBA289E D4EF 4DC7 AF76 401473426483 Extensions WEBENCH Auto Detect Please copy the stri Hil General Options textbox under DXP Activation Code Da Date Managen Ca Schematic FPGA Cg PCB Eaitor Tot Editors Cg Serpt
18. You can export that design from WEBENCH to Altium and then simulate offline in Altium You can simulate any circuit using fast WEBENCH Simulation Engine integrated in Altium This manual will take you through the steps on how to use WEBENCH Altium Connector Menus and Toolbar WEBENCH Altium Connector Menus and Toolbar e Anew WEBENCH menu in menubar will appear Altium Designs HI DXP File View Project WEBENCH Window Help Pea E Open WEBENCH Design v WEBENCH Simulation Engine gt WEBENCH Altium Connector User Guide y Activate WEBENCH Altium Connector e You can click on any of the WEBENCH Design Tools to launch it from Altium e g WEBENCH Power Designer You can choose whether you want to use the Altium inbuilt browser or external browser You can go to DXP gt Preferences gt Simulation gt WEBENCH Simulation Engine and select Open WEBENCH links in external browser Altium Designer 14 3 Workgroup Worksp EIDXP Eile View Project WEBENCH Wi age WEBENCHS Designer Release Date Fri Apr 11 165522 2014 1223576 bytes 4 Texas INSTRUMENTS WEBENCH Designer ETGITTDHITUNXEDETITmMM a ee Mew Solutions Visualizer Assistant ENTER REQUIREMENTS F Power LED LEDArchitect Power Architect FPGAWP HotSwap Simpie Switcher Filters Clocks H OpAmbientTemp 30 C Choose Additional Features Optional _ Show Aiternate Topologies
19. anagement or outside legal authorities as appropriate Misuse of this system may result in revocation or limitation of an individual s to this system in addition to any other appropriate remedies Misuse of this system by TI employees may result in disciplinary action including termination Forgot your password Folowus Eg T Wordwide ContactUs Website Feedback my TiLogn SneMap Corporate Citizenship m ticom mobie Version Tiis a global semiconductor design and manufacturing company Innovate with 100 000 analog ICs and embedded processors along with software tools and the industry s largest sales support staff Copyright 1995 2014 Texas Instruments Incorporated All rights reserved Trademarks PrivacyPolicy TermsofUse Terms of Sale System Design Compiler Instruments Shortcuts gt gt e Upon login you will see a webpage with Activation Code Select and copy the activation code EE DXP File View Project WEBENCH Window Help age 4 WEBENCHS Simulation Engine License Distribution ti Texas INSTRUMENTS my TI Account Design Support Sample WEBENCH Simulation Engine Activation Code for makram mansour ti com Please copy the string below and paste it into the WEBENCH Activation Code textbox under DXP Preferences Simulation gt WEBENCH Simulation Engine Activation Code d States my TI Login ssuexy pueoqdp sauoneg O oud Preferences
20. e relative error component RELTOL Default 1e 3 Relative error tolerance VABSTOL Default 1e 6 Absolute voltage error tolerance IABSTOL Default 1e 9 Absolute current error tolerance GMIN Default 1e 12 mhos This option sets the minimum conductance value allowed for any of the elements in your circuit A gmin conductance between a pair of nodes in the circuit is nearly an open circuit The current through this conductance should be several orders of magnitude smaller than other currents through those nodes Generally a gmin conductance should not change your simulation results If there are real conductances in your circuit that are close to gmin you can reduce the value of this option 27 Model Convergence Options CHECK DCMAX Default true If set to false this option turns off the checking of currents and voltages at a dc operating point against the values of CURMAX Default 1 amp and VOLTMAX Default 1 amp options TRAN LIMITING Default false Enable device limiting during the transient critical for behavior model or control source with abrupt transitions OPTSTEP Default off Enable TI proprietary optimal time stepping algorithm still in beta 28 Supported Devices List of devices that are supported by WEBENCH Simulation Engine Bipolar Junction transistor Capacitor Voltage controlled voltage source Voltage controlled current source Current controlled current source Current controlled volta
21. ere all time varying independent sources are set to their time values 19 Overview Transient Analysis TRAN Transient analysis A transient analysis performs a time domain analysis of your circuit over a specified time interval Before starting the transient analysis WBSE computes the operating point of the circuit using the time 0 values of all independent sources that have a time function Other independent sources get their dc values at time 0 This is an operating point analysis that results in an initial transient solution of the circuit After the time 0 solution is obtained WBSE starts to increment time in steps The voltages of all time dependent sources are updated Capacitive components in the circuit are allowed to charge and discharge and flux through inductors is allowed to change Currents through devices can change WBSE recomputes the solution of the circuit at the new time point It does so by starting from the previous timepoint solution The process repeats until time reaches the specified stop time for the transient analysis Time stepping WBSE can take a fixed time step for the entire transient analysis More commonly WBSE computes a new time step size at every time point The step size is based on circuit characteristics and the rate of change of voltages and currents in the circuit Accuracy Accuracy parameter settings also determine the time step size Loser error tolerance settings will make WBSE take bi
22. ession types of controlled sources can exhibit such behavior Truncation error becomes large when this happens and it can make WBSE take very small time steps Reducing time step to TMIN to locate the exact corner and recovering to larger time steps can be inefficient TRES allows you to set a higher threshold than TMIN to resolve such transitions Usually TRES is significantly larger than TMIN Accuracy amp Convergence Parameters LTERATIO Local truncation error LTE is the error in integration over time This represents the difference between the computed solution and the predicted solution derived from an extrapolation of the solutions at the previous few time points LTE needs to be controlled in a transient analysis to avoid inaccuracies in results due to very large time steps Tolerance for LTE or Tolerancette is defined as a constant multiple of Tolerance NR 21 LTERATIO Tolerance LTE Tolerance NR RELTOL and ABSTOL parameters control the accuracy of the solution to within the specified tolerance at any given time This tolerance is called the Newton Raphson tolerance or Tolerancenr It is defined by the equation ToleranceNR ABSTOL RELTOL x REF In other words LTERATIO is defined as To reduce LTE while keeping error tolerance for voltages and currents the same you can make LTERATIO smaller To reduce them both you can make RELTOL and or ABSTOL smaller If you make RELTOL and or ABSTOL larger and want to maintai
23. ge source Diode Independent current source Independent voltage source Inductor Mutual Inductor Junction FET MOSFET Resistor Subcircuit instantiation Transmission line Voltage controlled switch 29 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections enhancements improvements and other changes to its semiconductor products and services per JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor products also referred to herein as components are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its components to the specifications applicable at the time of sale in accordance with the warranty in Tl s terms and conditions of sale of semiconductor products Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed Tl assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using Tl components To minimize the risks associated with Buyers products and applica
24. gger time steps This will finish the transient simulation sooner at the cost of inaccuracies in the results Tighter error tolerances will keep the time steps smaller The results will then be more accurate at the cost of longer run times 20 Transient Analysis Parameters Simulation Time amp Interval Parameters TSTEP Defines the time step size for fixed time step controlling methods It may also be used as default values of some parameters on some independent sources An example is the rise time of a pulse source TSTART If the waveform output of a transient analysis is not interesting from time 0 to a certain time value the size of the waveform files written by WBSE can be reduced by setting TSTART to the time value from which you want to see the waveforms This does not save simulation time because the transient analysis always starts from time 0 TSTOP Stop time value at which transient analysis stops TMAX For variable time step methods step size can become large if there is no activity in the circuit Specifying TMAX will not allow WBSE to take a step size larger than that value The default 1 20 of TSTOP can be too large for oscillator circuits For accurate results on such circuits be sure to set TMAX to no more than 1 20 of the period of oscillation TRES Certain devices can cause discontinuous events at their output during a transient analysis Discontinuous events include instantaneous switching PWL and math expr
25. ing syste a CAM Editor C3 Simuhtion ES Generat E Mied Sim ES siMetiien E3 wesencH Da Wae Enter activatio code her ESI Mixed Sim EI simetrix ntertace ESI WEBENCH Simulation Engine Eg Wave E Always load error files F Show hints F Show warnings EF Show locations of models found WEBENCH Activation To activate the WEBENCH simulstion engine enter activation code WEBENCH Activation Code 4607285DA765E3E91 C2056 AS67017 766EES CB2472 BESOBAGD CBFZ7E4 EEL AA DOLAGFS7SCDADDAZEFAAE etn Set To Defaults 7 saven ssuexy pueoqdp sauoneg Upon successful activation you will see that activation code is accepted EjDXP File View A Altium Designer 14 3 Workgroup Workspacel DeriWik htp webench ticom appinfa webench scipts node webench design 9 my TI Acc WEBENCH Simul Please copy the stri textbox under DXP Activation Code Ca system Data managen Ca Schematic b aee Pcp eater a Tet ltrs C3 Sorting syster Cg cant tator a D Simulation E Genera ie sm E3 setri Ea WEBENCH Wee Enter activatio code her 252 261 adi4 sim PrjPcb Makram Mar Jin e amp sz Project WEBENCH Window Help hit
26. ith personalized service How do I set my browser to accept cookies Tag your favorite products E marinas TI does not plan to share your information with other 3rd party companies unless deen Create designs and run simulations with any WEBENCH Design Tool outlined in cur privacy policy You may opt out of receiving emails anytime Review open update or delete your WEBENCH designs Opt in or out of direct or third party communications related to your WEBENCH designs my TI frequently asked questions FAQs pees System Design Compiler Instruments Shortcuts e Login using your my TI account httpsi myportal ti com portal dt gt CO fe IE DXP File View Project WEBENCH Window Help age Wicart English HPX SQUEIG pueoqdp ssjuoe4 my TI Account Log in to use WEBENCH Design Tools Existing my TI user Your email address Joe email com system is for the use of authorized users only Individuals using this system are subject to having all of their activities on this system monitored and recorded in order to verify Your my TI passwor that they have appropriate authority and do not use this system for any inappropriate or unlawful purpose Anyone using this system expressly consents to such monitoring If monitoring reveals unauthorized inappropriate or possible unlawful activity system Remember me personne will provide information derived from such monitoring to Tl m
27. n the same LTE tolerance you will also need to decrease LTERATIO MAXITERS WBSE usually takes less than 3 iterations to converge at any time point gt 0 If MAXITERS iterations are reached without convergence at any time point the time step size will be reduced and convergence attempted again at an earlier time point In other words the transient analysis backs up Backups due to reaching this iteration limit usually indicates other problems in the circuit or models MAX LIMITING ITERS Maximum iteration allowed during transient with devices enter limiting mode default value is 200 UIC This parameter tells WBSE to bypass the traditional initial transient convergence flow and just use the provided Initial Conditions as the time 0 solution The IT values if specified are ignored If not used carefully UIC can cause serious non convergence problems at the first time point of the transient analysis This is especially true if at the very first time point voltages in the circuit have sharp changes from zero or the initial conditions provided 22 Overview AC Analysis AC AC analysis An ac analysis determines the response of a linearized small signal model of your circuit to the frequency of ac sources in your circuit Typically in an ac analysis you sweep the frequency of the ac sources while your circuit is biased at the same operating point WBSE allows you to sweep other variables as well in an ac analysis Prerequi
28. oop variable switches back to its starting value while the outer loop variable takes the next step The second case is when the circuit switches states very abruptly due to high gains of some circuit components Default iteration count limits and step sizes can be adjusted to solve non convergence problems that such situations can cause 25 DC Analysis Parameters POINTS Number of points through the DC sweep Definition depends on TYPE of SWEEP SWEEP TYPE Types of Sweep LINEAR Linear Size will be stop start points 1 DECADE Logarithmic by octaves Points specified are per decade OCTAVE Logarithmic by decades points specified are per octave SWEEP VARIABLE Name of the variable to be swept START VALUE Start value of sweep variable STOP VALUE Stop value of sweep variable 26 Tolerance Parameters Tolerance parameters control the accuracy of a computed value while iterating to a converged solution In other words they limit the error to within the desired tolerance for accuracy These parameters are optional and can be specified on all of the analyses described above Accuracy parameters are described in the table below The equation that uses these parameters to compare two values Val and Val of a variable is Val Vale lt ABSTOL RELTOL x min Val Vale Here ABSTOL VABSTOL for voltages or IABSTOL for currents is the absolute error component of the error RELTOL is th
29. orated 30
30. p webench4 ti com appinfo u 9 dfe Preferences mj Gs amp Cloud Preferences a H gt Eg System a Eg Data Management Simulation WEBENCH Simulation Engine F Bg Schematic a WEBENCH Location Hi Cg PCB Editor LI To run the WEBENCH simulation engine directly from Altium Designer enter the directory you installed WESE Cg Tex Editors WESE installation location C ProgramData Atium Altium Designer AFBAZA9E D4EF 4DC7 AF76 401473425453 Extensions WEBENCH Auto Deted a B Simulation General pase g Mixed Sim E Aways load error files 1 ES siMetrix Interface Show hints ES WEBENCH Simulation Engine show warnings p Ba Ware Show locations of models found WEBENCH Activation To activate the WEBENCH simulation engine enter activation code WEBENCH Activation Code 4607288 AT6SESESI C2056 4867017765EES CE2E79 ESOS ABD CBFZTB4 EELAADSIASFOTECDADDAZEFAE Activate Activation code accepted A8O7JFIF2C451879353F646CB82A1831 C293E2FG9278364607288DA765E3E91 C2056A86701 776GEES CB2470BES0S ASD CBF2TS4EEL AADSLAGFOTECDADDAZEFLME TT a satoon Soe o gt onium a Gee Shortcuts You are ready to use the WEBENCH Simulation Engine 11 Running WEBENCHO Simulation Engine 1 To simulate a design in WEBENCH Simulation Engine go to Design gt Simulate gt WEBENCH Simulation Engine or you click on Run toolbar button If you have not activated the WEBENCH Altium Connector it will ask you activa
31. sible for compliance with all legal regulatory and safety related requirements concerning its products and any use of TI components in its applications notwithstanding any applications related information or support that may be provided by TI Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures monitor failures and their consequences lessen the likelihood of failures that might cause harm and take appropriate remedial actions Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety critical applications In some cases Tl components may be promoted specifically to facilitate safety related applications With such components TI s goal is to help enable customers to design and create their own end product solutions that meet applicable functional safety standards and requirements Nonetheless such components are subject to these terms No TI components are authorized for use in FDA Class III or similar life critical medical equipment unless authorized officers of the parties have executed a special agreement specifically governing such use Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in military aerospace applications or environments Buyer acknowledges and agrees that any military
32. sites for AC analysis To perform an ac analysis there should be at least one independent ac source in the circuit If there are multiple ac sources WBSE will write a warning but continue the simulation The effect will be a superposition of all the ac sources in the circuit 23 AC Analysis Parameters POINTS Number of points through the AC sweep Definition depends on TYPE of SWEEP SWEEP TYPE Types of Sweep LINEAR Linear Size will be stop start points 1 DECADE Logarithmic by octaves Points specified are per decade OCTAVE Logarithmic by decades points specified are per octave START FREQ Start value of frequency sweep STOP FREQ Stop value of frequency sweep 24 Overview DC Analysis DC DC analysis A dc analysis determines a series of dc solutions of the circuit while one or more circuit variables are swept Originally as the name implies this analysis was designed to sweep the dc value of an independent voltage or current source and watch the circuit response WBSE computes the dc solution at the first point of the sweep variable s starting from zero or the specified initial conditions All subsequent points of the sweeps are solved by taking the previous solution as the initial guess The assumption here is that the step size of the sweep is small and so the solution will change very slightly Two situations invalidate this assumption First is the case of nested sweeps when the inner l
33. te It will open simulation settings UI Analysis setup window contains mainly of three parts 1 Enable Analysis Options These options allow to enable disable the required analysis Currently AC DC and Transient simulations are available Global parameters and advanced options can also be edited here data saving and Sim View setup options Active signals are plotted when the simulation is running pane and edit the options options plot window will be opened Data Collection Viewing and Netlisting These options enable user to control netlisting Signal Selection The active signals can be selected from a list of available signals If you want to make changes to the settings click on respective analysis name on the left If you want to specify some simulation parameter it can be defined in the Global Parameter The project is ready for simulation Click on OK to run simulation It will start simulation and a A kaj IF oXP File Edit View Project Place Design Tools WEBENCH Simulator Reports Window Help C ProgramData Altiumn Altium De 4m iP yx Iv z a j 0 7 7 BEER IER ILA FILERE S a d xf 7 Girt he Kw LS Dw Gi ux x No Variations 89 Messages Bx A PAGELSchDoc g Class Document Source Message Date N aj E fn TLV70715 Comp Compile successful no errors found m 1 24 2014 1 Bst Outp Start Output Generation At 6 09 11
34. tions Buyers should provide adequate design and operating safeguards TI does not warrant or represent that any license either express or implied is granted under any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding third party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices TI is not responsible or liable for such altered documentation Information of third parties may be subject to additional restrictions Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice TI is not responsible or liable for any such statements Buyer acknowledges and agrees that it is solely respon
35. y Supply Voltage L Enter Passband Ripple AAmax Specs _ Enter Group Delay Flatness Specs Enter Step Response Specs Next choose the Filter type and click on Start Filter Design d4 T You will see following in Altium Choose the Filter type Say Butterworth HDX Eile View Project WEBENCH Window Help 959042 1033 _adi4 simSchDoc New Visualizer WESENCH Designer Release Date Thu Jul 24 15 5230 2014 1018665 bytes L C ees esee pe ere cesa eset HAS MH SAPR T0 5 Best Stopband Attenuation FILTER DESIGNER VISUALIZER WERENCH Optimizer Change inputs Refine Results Lenta NA EORI Filter Type Lowpass ig Filter Order 4 5 aia a T l Cutoff Frequency fc 1000 Hz os Ead LEONE CEN DIEI Ze AREE eek 1 betel an ES Attenuation 50 1508 49 4108 Stopband M Stepband Attenuation Ast aso dB Passband Ripple 04B O Buc penes il Group Delay Fiter Order Attenuation stopband Frequency 500 Hz o aT ETE Gersrd erse ee aD ie EE Supp vorago SettingTime 1169 675uSec 4A215482u Soc 2 Lowest Settling Time e Dual Supply Single Supph 2 HAY STIS UNT MEA Dalene sete Comsat euet Supply Voltage 5 gt Step Response 0 1825 4 Lowest passband ripple Seosede CUENTE Start Filter Design http webench ti com web G
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