(EMMA Mobile1) SD Memory Card Interface
Contents
1. lt SDIO l Te e nm 42 User s Manual S19361EJ4VOUM 7 LIST OF FIGURES Figure No Title Page 4 1 SDIO Interrupt Timing When SDIA Is Used in 1 Bit Mode nennen 43 4 2 SDIO Interrupt Timing When SDIA Is Used in 4 Bit Mode When Single Block Transfer Command Is Used 43 4 3 SDIO Interrupt Timing When SDIA Is Used in 4 Bit Mode When Multiple Block Transfer Command Is Used 44 LIST OF TABLES Table No Title Page 4 1 SD Memory Card Transfer Clock Signals That Can Be Selected in Asynchronous Mode 42 8 User s Manual S19361EJ4VOUM CHAPTER 1 OVERVIEW This manual describes the functional specifications of the modules related to the SDIO card and non secure SD memory card interfaces SDIA SDIB and SDIC which are represented as SDIx below provided in EM1 1 1 Features The main features of SDIx are as follows O Supports a line width of 1 bit or 4 bits for transferring data to and from SD memory cards or SDIO cards O Supports data transfers in frame units O Supports CRC7 error checks on the command line and CRC16 checks hardware on each data bit line O Provides three SD memory card and SDIO card ports O The data transfer buffer tor SD memory cards is configured of two blocks of 16 bits x 256 words O Supports data transfers from 1 to 512 bytes O The SD memory card transfer clock signal can be derived from the source clock signal in the SDIx module by selecting to divide the2. 10 9 8 7 6 5 4 3 2 1 0 Reserved 22 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 16 SD memory card information register 2 This register SDIA INFO2 5005 003Ch SDIB INFO2 5006 003Ch SDIC INFO2 5009 003Ch indicates the error and buffer status interrupt sources of SDlx 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 1 2 EE 15 Illegal access errorNote 1 0 Normal access 1 Illegal access error CBSY 14 Command register busy 0 Transfer is complete 1 Transfer is in progress SCLKDIVEN SD_CLK_DIV enable bit 0 The SD bus is being used to transmit commands and data 1 The SD bus is not being used to transmit commands and data Write enable 0 Writing to the SD memory card is disabled 1 Writing to the SD memory card is enabled The data buffer in SDIx is empty BRE R W Read enable 0 Reading from the SD memory card is disabled 1 Reading from the SD memory card is enabled The data buffer in SDIx is full DATO 7 Undefined SD data line O bit 0 SDDATAO 0 1 SDDATAO 1 ERR6 R W Response timeout 0 No response timeout error occurred 1 A response timeout error occurred because no command response or SD_STOP response was issued for 64 SD transfer clock cycles or more ERR5 R W 5 Invalid data buffer read error bit 0 No invalid data buffer read error occurred 1 An invalid data buffer read error occurred because an attempt was made to read data from the data buffer even thou
3. 12 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 Register Functions 3 2 1 SD memory card command register This register SDIA CMD 5005 0000h SDIB CMD 5006 000h SDIC CMD 5009 000h controls the SD memory card commands and responses 1 5 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Co CF45 CF44 CF43 CF42 CF41 CF40 MD 7 6 15 14 0 Specifies the CMD12 mode R W 13 Selects between single or multiple block transfers 0 Single block transfer 1 Multiple block transfer R W 12 Specifies the write or read mode 0 Write 1 Read R W 11 Specifies the data mode 0 No data 1 Data is present MD 2 0 rw 108 o Specifies an expansion command and the response type C 1 0 Raw zs o Specifies the command mode CF 45 40 ew so o Specifies the command index Caution For details about setup commands and responses see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 MD 7 6 CMD12 mode specification Function Automatic CMD12 transfer Non automatic transfer of CMD12 SDIO command transfer between host and SD card Reserved Reserved Remark Automatic CMD12 transfer means that CMD12 is automatically transferred according to the sector count after which data transfer stops User s Manual 19361EJ4VOUM 13 14 CHAPTER 3 REGISTERS MD 2 0 Expansion command and response type specification Command Mode Response Type Normal mode Decoding com
4. 5006 0010h SDIC STOP 5009 0010h specifies stopping SD transfers 15 14 13 12 11 10 9 8 pos poro o o fo o sec 7 6 5 4 3 2 1 0 Do Lolo 1 9 1 9 18 9 Tow SEC Reserved STP R W Transfer stop bit 0 Do not stop transfer Set this bit to O before CMD17 CMD18 CMD24 CMD27 CMD30 CMD42 CMD56 CMD43 to CMD48 ACMD18 or ACMD25 is set 1 Stop transfer 3 2 6 SD memory card transfer sector count register This register SDIA SECCNT 5005 0014h SDIB SECCNT 5006 0014h SDIC SECCNT 5009 0014h counts the number of transfer sectors 15 14 13 12 11 10 9 8 CNT15 CNT14 CNT13 CNT12 CNT11 CNT10 CNT9 CNT8 7 6 5 4 3 2 1 0 CNT7 CNT6 CNT5 CNT4 CNT3 CNT2 CNTT CNTO CNT 15 0 0x0000 16 bit counter that counts the number of transfer sectors Remark If SDIx_SECCNT is 0x0001 the number of transfer sectors is 1 If SDIx_SECCNT is OxFFFF the number of transfer sectors is 65 535 if SDIx_SECCNT is 0x0000 the number of transfer sectors is 65 536 User s Manual S19361EJ4VOUM 17 CHAPTER 3 REGISTERS 3 2 7 SD memory card response register 0 This register SDIA RSPO 5005 0018h SDIB RSPO 5006 0018h SDIC RSPO 5009 0018h stores the responses returned from the SD memory card 1 5 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 23 8 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 23 to 8 of the response format Remark For details abo
5. AB1 synchronous or asynchronous mode 0 AB1 synchronous mode 1 AB1 asynchronous mode DMASDIx 14 Indicates whether there are DMA requests for reading the SD read buffer 0 No request was issued 1 A request was issued DMASDOx 13 Indicates whether there are DMA requests for reading the SD write buffer 0 No request was issued 1 A request was issued em E ow fo SCS SDCLKSTP R W Selects the SDCLK loop path 0 External loop SD CKO gt SD_CKI 1 not setting CLKSTP R W 7 Oscillates or stops the SDIx main module clock signal IMCLK 0 Oscillates IMCLK 1 Stops IMCLK IT 0 4 2 0x01 Selects the DMA request signal trigger 100 SDIx_RXDMARQ Not assigned SDIx_TXDMARQ Writing SD data 011 SDIx_RXDMARQ Reading SD data SDIx_TXDMARQ Not assigned 010 SDIx RXDMARQ Not assigned SDIx TXDMARQ Not assigned 001 SDIx RXDMARQ Reading SD data SDix TXDMARQ Writing SD data 000 SDIx RXDMARQ Reading SD data SDIx TXDMARQ Writing SD data Reserved Resets the SDIx bus wrapper and DMA interrupt control blocks by using software 0 Cancels the reset state 1 Resets the blocks Caution SDIx SOFT RST has inverted logic User s Manual 19361EJ4VOUM 39 CHAPTER 3 REGISTERS 3 2 31 SDix use register 2 This register SDIA USER2 5005 0204h SDIB USER2 5006 0204h SDIC USER2 5009 0204h specifies the internal SD clock group delay and the synchronization mode 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 oo o o j o o
6. a clock frequency SDIx CLK CTRL 7 0 These bits specify the ratio for dividing the SD memory card transfer clock frequency Specify the division ratio of the signal derived from SDIx_CLK Division by 2 Division by 4 Division by 8 Division by 16 Division by 32 6 Division by 64 32 Division by 128 64 Division by 256 128 Division by 512 a O A DBO O Remark The SD memory card transfer clock signal stops if a value other the above is specified User s Manual S19361EJ4VOUM 27 CHAPTER 3 REGISTERS 3 2 20 SD memory card transfer data size register This register SDIA SIZE 5005 004Ch SDIB SIZE 5006 004Ch SDIC SIZE 5009 004Ch specifies the transfer data size 15 14 13 12 11 10 9 8 Loo o o j o o o tv ms 7 6 5 4 3 2 1 0 LEN7 LEN6 LENS LENA LENZ LENZ LEN1 LENO Peres 0 0200H Specifies the size of the SD data to be transferred 1 to 512 bytes can be specified in byte units Do not set this field to 0 Do not specify 513 or more bytes 28 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 21 SD memory card option setting register This register SDIA OPTION 5005 0050h SDIB OPTION 5006 0050h SDIC OPTION 5009 0050h specifies various options 15 14 13 12 11 10 9 8 word o o o o j o o o 7 6 5 4 3 2 1 0 TOP27 TOP26 TOP25 TOP24 CTOP24 CTOP23 CTOP22 CTOP21 n KR Specifies the SD data transfer bit width 0 4 bits 1 1 bit Reseved 8 0 0 TOP 2
7. five cases e If SDDATO is O busy for a longer period of time than the number of cycles specified by bits 7 to 4 of the SDIx OPTION register after an R1b response is received e If SDDATO is O busy for a longer period of time than the number of cycles specified by bits 7 to 4 of the SDIx OPTION register after the CRC status is written e If the CRC status is not written for a longer period of time than the number of cycles specified by bits 7 to 4 of the SDIx OPTION register after a write access e If SDDATO is O busy for a longer period of time than the number of cycles specified by bits 7 to 4 of the SDIx OPTION register after a read command is issued e If SDDATO is O busy for a longer period of time than the number of cycles specified by bits 7 to 4 of the SDIx OPTION register after an SD STOP response is issued End error refers to an END bit error in a command response response length in the data read data length when the CRC status is written CRC status length or in an SD STOP response CRC error refers to a CRC status write error a CRC16 error in the data read a CRC7 error in a stop response or a CRC7 error in a response 6 Command error refers to a command index error in a command response or in an SD STOP response User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 17 SD memory card information mask register 1 This register SDIA INFO1 MASK 5005 0040h SDIB INFO1 MASK 5006 0040h SDIC INFO1 MASK 5009 004
8. is received A reset operation must be executed immediately after power on for devices with reset functions POWER ON OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface as a rule switch on the external power supply after switching on the internal power supply When switching the power supply off as a rule switch off the external power supply and then the internal power supply Use of the reverse power on off sequences may result in the application of an overvoltage to the internal elements of the device causing malfunction and degradation of internal elements due to the passage of an abnormal current The correct power on off sequence must be judged separately for each device and according to related specifications governing the device INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that results from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device User s Manual S19361EJ4VOUM The names of other companies and products are the registered trademarks or trademarks of the respective company These comm
9. o o Iso Reserved 15 11 ome o c i OR IntParam 2 0 10 8 Internal adjustment bit EXE not ps a value other than 000b Reserved SYNCMODE O the synchronization mode 0 Asynchronous mode 1 Synchronous mode The signal that results from logically combining ORing bit 15 of the SDIx use register SDIx USER and bit O of SDIx use register 2 SDlx USER2 is the synchronization signal to be used to control the circuits Bit 15 of Bit 0 of Mode Control Signal Mode SDIx USER SDIx USER2 Level 40 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 32 SDIx DMA mode SD buffer register This register SDIA DMASD 5005 0300h SDIB DMASD 5006 0300h SDIC DMASD 5009 0300h is the SD read write buffer register used when SDIx operates in DMA mode Remark If the DMAC accesses the SDIx SD read write buffer SDlx DMASD If the ACPU accesses the SDIx SD read write buffer SDIx BUFO 15 14 13 12 11 10 9 8 SDIx_DMASD SDIx_DMASD SDIx_DMASD SDIx DMASD SDIx_DMASD SDIx_DMASD SDIx DMASD SDIx_DMASD 7 6 5 4 3 2 1 0 SDIx_DMASD SDIx DMASD SDIx DMASD SDIx DMASD SDIx DMASD SDIx_DMASD SDIx DMASD SDIx DMASD SDK MASON ww 150 o SD buffer used auring DMA User s Manual S19361EJ4VOUM 41 CHAPTER 4 DESCRIPTION OF FUNCTIONS 4 1 Selecting SD Memory Card Transfer Clock Signal in Synchronous Mode The clock signal for SD memory card transfers is generated in the SDIA module Table 4 1 shows examples o
10. returned No error has occurred An error has occurred because no SD STOP response was returned for 640 SD transfer clock cycles or more No error has occurred An error has occurred because no command response was returned for 640 SD transfer clock cycles or more User s Manual 19361EJ4VOUM 33 CHAPTER 3 REGISTERS 3 2 24 SD memory card data buffer 0 register This buffer register SDIA BUFO 5005 0060h SDIB BUFO 5006 0060h SDIC BUFO 5009 0060h stores the data read from and written to the SD memory card in SDIx 15 14 13 12 11 10 9 8 BUF15 BUF14 BUF13 BUF12 BUF11 BUF10 BUF9 BUF8 7 6 5 4 3 2 1 0 BUF7 BUF6 BUF5 BUF4 BUF3 BUF2 BUF1 BUFO RBUF 15 0 R W 15 0 Undefined Register for inputting and outputting data to and from the 512 byte x 2 bank data buffer 3 2 25 SDIO mode setting register This register SDIA SDIO MODE 5005 0068h SDIB SDIO MODE 5006 0068h SDIC SDIO MODE 5009 0068h controls selection of the SDIO mode 15 14 13 12 11 10 9 8 Loo Jo o o o o w omr 7 6 5 4 3 2 1 0 LM SD IO abort Data being transferred is guaranteed 1 CMD52 is sent and the SD host holds IP transmission pending The value before setting this bit is used as the CMD52 parameter This bit is cleared after a CMD52 response is issued 0 Default IOABT SD IO abort Data being transferred is lost This bit must be specified only during multiple IO transactions 1 CMD52 is sent and the SD host stop
11. specified for bits P1 and PO User s Manual 19361EJ4VOUM 15 CHAPTER 3 REGISTERS 3 2 3 SD memory card command parameter register 0 This register SDIA ARGO 5005 0008h SDIB ARGO 5006 0008h SDIC ARGO 5009 0008h stores the SD card command parameters 15 14 13 12 11 10 9 8 CF23 CF22 CF21 CF20 CF19 CF18 CF17 CF16 7 6 5 4 3 2 1 0 ons oa ces o cn cr CF 23 8 R W 15 0 0x0000 Specifies the parameters for the command to be transferred to the SD memory card The settings of these bits correspond to bits 23 to 8 of the command format Remark For details about the command parameters see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 3 2 4 SD memory card command parameter register 1 This register SDIA ARG1 5005 000Ch SDIB ARG1 5006 000Ch SDIC ARG1 5009 000Ch stores the SD card command parameters 15 14 13 12 11 10 9 8 CF39 CF38 CF37 CF36 CF35 CF34 CF33 CF32 7 6 5 4 3 2 1 0 CF31 CF30 CF29 CF28 CF27 CF26 CF25 CF24 CF 39 24 R W 15 0 0x0000 Specifies the parameters for the command to be transferred to the SD memory card The settings of these bits correspond to bits 39 to 24 of the command format Remark For details about the command parameters see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 User s Manual S19361EJ4VOUM 16 CHAPTER 3 REGISTERS 3 2 5 SD memory card stop register This register SDIA STOP 5005 0010h SDIB STOP
12. you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics RENESAS User s Manual Multimedia Processor for Mobile Applications SD Memory Card Interface EMMA Mobile Wi Document No S19361EJ4VOUMOO 4th edition Date Published September 2009 O NEC Electronics Corporation 2009 Printed in Japan MEMO 2 Users Manual 19361EJ4VOUM NOTES FOR CMOS DEVICES VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between Vu MAX and ViH MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between Vu MAX and Vin MIN HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal input level may be generated due to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Each unused
13. 0h masks the SDIx interrupts specified in the SDIx INFO1 register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 LM Masks the interrupt that detects whether all read write accesses have finished 0 The interrupt is not masked 1 The interrupt is masked EM Masks the interrupt that detects whether the response has ended 0 The interrupt is not masked 1 The interrupt is masked User s Manual 19361EJ4VOUM 25 CHAPTER 3 REGISTERS 3 2 18 SD memory card information mask register 2 This register SDIA INFO2 MASK 5005 0044h SDIB INFO2 MASK 5006 0044h SDIC INFO2 MASK 5009 0044h masks the SDIx interrupts specified in the SDIx INFO register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 o EMASK6 EMASK5 EMASK4 EMASK3 EMASK2 EMASK1 EMASKO IMASK 15 Masks the illegal access interrupt 0 The interrupt is not masked 1 The interrupt is masked Reserved deeg NENMI 14 10 SS BMASK1 Masks the write enable interrupt 0 The interrupt is not masked 1 The interrupt is masked BMASKO Masks the read enable interrupt 0 The interrupt is not masked TED The interrupt is masked the response timeout interrupt Reserved EMASK6 0 The interrupt is not masked 1 The interrupt is masked EMASK5 Masks the illegal data buffer read access interrupt 0 The interrupt is not masked 1 The interrupt is masked EMASK4 Masks the illegal data buffer write access interrupt 0 The interrupt is not masked 1 The inter
14. 4 3 2 1 0 R 71 56 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 71 to 56 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 User s Manual 19361EJ4VOUM 19 CHAPTER 3 REGISTERS 3 2 11 SD memory card response register 4 This register SDIA RSP4 5005 0028h SDIB RSP4 5006 0028h SDIC RSP4 5009 0028h stores the responses returned from the SD memory card 1 5 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 87 72 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 87 to 72 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 3 2 12 SD memory card response register 5 This register SDIA RSP5 5005 002Ch SDIB RSP5 5006 002Ch SDIC RSP5 5009 002Ch stores the responses returned from the SD memory card 15 14 13 12 11 10 9 8 mos mo sn Roo no Re nr me 7 6 5 4 3 2 1 0 R 103 88 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 103 to 88 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 20 User s Manual S193
15. 58h SDIB ERR STS1 5006 0058h SDIC ERR STS1 5009 0058h displays the status of the interrupts that are generated by an SDlx error 15 14 13 12 11 10 9 8 To Tom om ew om wo 7 6 5 4 3 2 1 0 E E 1 2 mema DS CS CS e S aa A oem eer SO rem Indicates whether there is a CRC write error 0 No error has occurred 1 The error has occurred Indicates whether there is a CRC error in read data 0 No error has occurred 1 The error has occurred Indicates whether there is a CRC error in an SD STOP response 0 No error has occurred 1 The error has occurred Indicates whether there is a CRC error in a command response 0 No error has occurred 1 The error has occurred Indicates whether there is an end bit error during CRC status writing 0 No error has occurred 1 The error has occurred Indicates whether there is an end bit error in read data 0 No error has occurred 1 The error has occurred Indicates whether there is an end bit error in an SD STOP response 0 No error has occurred 1 The error has occurred Indicates whether there is an end bit error in a command response 0 No error has occurred 1 The error has occurred User s Manual 19361EJ4VOUM 31 CHAPTER 3 REGISTERS 2 2 E1 Indicates whether there is a command index error in an SD STOP response 0 No error has occurred 1 The error has occurred EO Indicates whether there is a command index
16. 61EJ4VOUM CHAPTER 3 REGISTERS 3 2 18 SD memory card response register 6 This register SDIA RSP6 5005 0030h SDIB RSP6 5006 0030h SDIC RSP6 5009 0030h stores the responses returned from the SD memory card 15 14 13 12 11 10 9 8 R119 R118 R117 R116 R115 R114 R113 R112 7 6 5 4 3 2 1 0 R111 R110 R109 R108 R107 R106 R105 R104 R 119 104 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 119 to 104 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 3 2 14 SD memory card response register 7 This register SDIA RSP7 5005 0034h SDIB RSP7 5006 0034h SDIC RSP7 5009 0034h stores the responses returned from the SD memory card 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R127 R126 R125 R124 R123 R122 R121 R120 mee se 0 R 127 120 7 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 127 to 120 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 User s Manual S19361EJ4VOUM 21 CHAPTER 3 REGISTERS 3 2 15 SD memory card information register 1 This register SDIA INFO1 5005 0038h SDIB INFO1 5006 0038h SDIC INFO1 5009 0038h indicates two of the interrupt sources of SDIx 15 14 13 12 11
17. 7 24 RW 74 EH Response timeout counter CTOP 24 21 Card detection stabilization time counter TOP 27 24 Response timeout counter Function Timeout testing mode SD transfer clock x 2 SD transfer clock x 27 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 22 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 27 SD transfer clock x 2 9 SD transfer clock x 275 SD transfer clock x 217 o jo 0 0 0 0 0 0 SD transfer clock x 2 Users Manual S19361EJ4VOUM 29 100 CHAPTERS REGISTERS Z gt o 30 CTOP 24 21 Card detection stabilization time counter CTOP24 CTOP23 CTOP22 CTOP21 Function Timeout testing mode SD transfer clock x 2 SD transfer clock x 228 SD transfer clock x 22 SD transfer clock x 27 SD transfer clock x 2 SD transfer clock x 22 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 2 SD transfer clock x 275 SD transfer clock x 2 SD transfer clock x 29 SD transfer clock x 2 SD transfer clock x 2 o jo o 0 0 0 0 0 SD transfer clock x 2 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 22 SD memory card error interrupt status register 1 This register SDIA ERR STS1 5005 00
18. IO INFO1 MASK 5009 0070h specifies masking the interrupt sources assigned to the corresponding bits in SDIO mode 15 14 13 12 11 10 9 8 EXWT MASK EXPUB52 Eee ess 7 6 5 4 3 2 1 0 RWRDY C52RDY IOIRQ MASK ENN el ee EXWT MASK R W 15 1 Masks the software read write request 0 The interrupt is not masked 1 The interrupt is masked EXPUB52_MASK Masks the software read write request 0 The interrupt is not masked 1 The interrupt is masked Reserved LM NN RWRDY MASK Masks the read wait mode ready source 0 The interrupt is not masked 1 The interrupt is masked C52RDY MASK R W 1 1 Masks the CMD52 ready source 0 The interrupt is not masked 1 The interrupt is masked IOIRQ MASK R W 1 Masks the SDIO interrupt status source 0 The interrupt is not masked 1 The interrupt is masked 36 User s Manual 19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 28 Expansion mode control register This register SDIA CC EXT MODE 5005 01BOh SDIB CC EXT MODE 5006 01BOh SDIC CC EXT MODE 5009 01B0h controls the CC buffer expansion mode 15 14 13 12 11 10 9 8 oo o o om o j o j om rose 7 6 5 4 3 2 1 0 CCOREN CCIWEN SDRWEN IWEN ko aM te s DMASDRW FISEL OREN 12 0 Indicates that data remains in the output buffer in FIFO mode E DID mem 1 Indicates that the output buffer is empty in FIFO mode OBEN n Little endian output buffer m m 1 Big endian output buffer FOSEL 0 RAM output buffer mode peces 1 FIFO ou
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21. ed if the SD data line is in 4 bit mode The following figures show the interrupt periods when SDIA is used with the SD data line in 1 bit mode and in 4 bit mode for single block transfers and multiple block transfers 42 Users Manual 19361EJ4VOUM CHAPTER 4 DESCRIPTION OF FUNCTIONS Figure 4 1 SDIO Interrupt Timing When SDIA Is Used in 1 Bit Mode command without data command single block command with data SD CMD SD DATA3 SD DATA2 SD DATAT o RC SD DATAO HN T asynchronous interrupt period MME delay for synchronized A lt lt interrupt clear by cpu SDM SD INT d i negate by SDIO device SDV CCINT e Remark When SDIA is used in 1 bit mode asynchronous interrupts are generated in all periods Figure 4 2 SDIO Interrupt Timing When SDIA Is Used in 4 Bit Mode When Single Block Transfer Command Is Used command without data command single block command with data HSD CMD pA M LLL SD DATA3 iN SD DATAZ LLL SD DATA MM SD DATAO l a cerco arno rae interrupt period asynchronous interrupt period AA LLL L AAA sou SO NT TA e interrupt clear by cpu interrupt clear by cpu interrupt clear by SDIO device interrupt clear by SDIO device SDM CC INT Remark Interrupts are disabled when data is being transferred User s Manual 19361EJ4VOUM 43 CHAPTER 4 DESCRIPTION OF FUNCTIONS Figure 4 3 SDIO Interrupt Timing When SDIA Is Used in 4 Bit Mode When Multiple Block Transfer Com
22. er 3 19 3 2 11 SD memory card response register 4 nennen nennen nene 20 3 2 12 SD memory card response register P 20 3 2 13 SD memory card response register G eee eee eee eee 21 3 2 14 SD memory card response register A 21 3 2 15 SD memory card information register 1 nennen 22 3 2 16 SD memory card information register 3 23 3 2 17 SD memory card information mask register 1 25 3 2 18 SD memory card information mask register 2 26 3 2 19 SD memory card transfer clock control register seen 27 3 2 20 SD memory card transfer data size register 28 3 2 24 SD memory card option setting register eee ee eee 29 3 2 22 SD memory card error interrupt status register T eee eee eee eee 31 3 2 28 SD memory card error interrupt status register 2 33 3 2 24 SD memory card data buffer O register sese 34 3 2 25 SDIO mode settingiregister a eie cenae exei eee cae 34 3 2 26 SDIO information register AAA 35 3 2 27 SDIO information mask register AA 36 3 2 28 Expansion mode control regieter AA 37 3 2 29 SDIx software reset control register eee 38 KIEREN e EE 39 Ke N SDlx se register 2 eee ace e dite RD ra ce d dee ERR 40 3 2 32 SDIx DMA mode SD buffer register AAA 41 CHAPTER 4 DESCRIPTION OF FUNCTIONS essere ennenen neee DR RD DR DR AD DR DR neee nnes 42 4 1 Selecting SD Memory Card Transfer Clock Signal in Synchronous Mode 42 k
23. error in a command response 0 No error has occurred 1 The error has occurred 32 User s Manual 19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 23 SD memory card error interrupt status register 2 This register SDIA ERR STS2 5005 005Ch SDIB ERR STS2 5006 005Ch SDIC ERR STS2 5009 005Ch displays the status of the interrupts that are generated by an SDlx error 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 S I e a No error has occurred An error has occurred because the busy status continued for a period of time longer than the number of cycles specified by SDIx_OPTION 7 4 after the CRC status was written No error has occurred An error has occurred because the CRC write status was not returned for a period of time longer than the number of cycles specified by SDIx_OPTION 7 4 after a write access No error has occurred An error has occurred because the read data was not returned for a period of time longer than the number of cycles specified by SDIx_OPTION 7 4 after the read command was issued No error has occurred An error has occurred because the status continued for a period of time longer than the number of cycles specified by SDIx OPTION 7 4 after a SD STOP response was returned No error has occurred An error has occurred because the busy status continued for a period of time longer than the number of cycles specified by SDIx OPTION 7 4 after an R1b response was
24. f the clock signals that can be selected Table 4 1 SD Memory Card Transfer Clock Signals That Can Be Selected in Asynchronous Mode AHB Clock SDIA Clock SD Memory Card SDIA CLKCTRL AB1_SDIAWAIT AB1 SDIAREA Frequency Frequency Transfer Clock Register Setting CTRL Register DCTRL Register Frequency Setting Setting 83 00 MHz 83 MHz 41 50 MHz Division by 2 0x0300 0x0000 83 00 MHz 83 MHz 20 75 MHz Division by 4 0x0300 0x0000 83 00 MHz 83 MHz 10 38 MHz Division by 8 0x0300 0x0000 83 00 MHz 83 MHz 5 19 MHz Division by 16 0x0300 0x0000 Remark The frequency of the SD serial transfer clock signal is specified using the SDIA CLK CTRL register When selecting the clock signal for SD memory card transfers note that the frequency of the SDIA module clock signal from ASMU and the values of the SDIA CLKCTRL SDIA and AB1 SDIAWAITCTRL ASMU registers are restricted 4 2 SDIO Interrupts SDIA supports SDIO interrupts that conform to SDIO Card Specification Ver 2 0 According to this specification interrupts from an SDIO card are generated using bit 1 of the SD data line but an SDIO card can only be detected in either of the following periods 1 In an asynchronous interrupt period The SD data line is used as an interrupt line when data transfer that uses bit 1 of the SD data line is not taking place 2 n a synchronous interrupt period Interrupts are output only at a certain timing when multiple blocks are transferr
25. gh the data buffer was empty User s Manual 19361EJ4VOUM 23 2 2 ERR4 RW Invalid data buffer write error bit 0 No invalid data buffer write error occurred 1 An invalid data buffer write error occurred e CHAPTER 3 REGISTERS ERRS3 Timeout other than a response error 0 No timeout error occurred 1 A timeout error occurred ERR2 End error status bit 0 No end error occurred 1 An end error occurred 4 ERR1 CRC error status bit 0 No CRC error occurred 1 A CRC error occurred 5 ERRO Command error status bit 0 No command error occurred 1 A command error occurred 24 Remark Notes 1 For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 This error occurs in any of the following cases e f the command register is rewritten during a transfer e f No response MD 2 0 011 and Data is present MD3 1 is specified in the SDIx CMD register e If CMD12 for which data is present is specified in the SDIx CMD register This error occurs in any of the following cases e f data is written to data buffer SDIx BUFO when the data read or data write command status is not asserted e If data is written before SDIx BUFO becomes empty during a single block write e f data is written to bank 1 of the data buffer before the bank becomes empty during a multiple block write This error occurs in any of the following
26. k the quality grade of each NEC Electronics product before using it in a particular application Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster Systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems and medical equipment for life support etc The quality grade of NEC Electronics products is Standard unless otherwise expressly specified in NEC Electronics data sheets or data books etc If customers wish to use NEC Electronics products in applications not intended by NEC Electronics they must contact an NEC Electronics sales representative in advance to determine NEC Electronics willingness to support a given application Note 1 NEC Electronics as used in this statement means NEC Electronics Corporation and also includes its majority owned subsidiaries 2 NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above M8E0904E 4 Users Manual 19361EJ4VOUM Readers Purpose Organization How to Read This Man
27. mand Is Used Remark From the interrupts that are generated from SDIO in synchronous interrupt periods only the interrupt signal SDM SD INT is asserted 44 User s Manual 19361EJ4VOUM Revision History Date Revision Comments April 27 2009 3 0 September 30 2009 4 0 Incremental update from comments to the 3 0 User s Manual S19361EJ4VOUM 45 For further information please contact NEC Electronics Corporation 1753 Shimonumabe Nakahara ku Kawasaki Kanagawa 211 8668 Japan Tel 044 435 5111 http www necel com America NEC Electronics America Inc 2880 Scott Blvd Santa Clara CA 95050 2554 U S A Tel 408 588 6000 800 366 9782 http www am necel com Europe NEC Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 0211 65030 http www eu necel com Hanover Office Podbielskistrasse 166 B 30177 Hannover Tel 0 511 33 40 2 0 Munich Office Werner Eckert Strasse 9 81829 M nchen Tel 0 89 92 10 03 0 Stuttgart Office Industriestrasse 3 70565 Stuttgart Tel 0 711 99 01 0 0 United Kingdom Branch Cygnus House Sunrise Parkway Linford Wood Milton Keynes MK14 6NP U K Tel 01908 691 133 Succursale Francaise 9 rue Paul Dautier B P 52 78142 Velizy Villacoublay C dex France Tel 01 3067 5800 Sucursal en Espa a Juan Esplandiu 15 28007 Madrid Spain Tel 091 504 2787 Tyskland Filial Taby Centrum Entrance S 7th flo
28. mand for SD memory cards and multimedia cards Expansion command Reserved Expansion command Reserved Expansion command No response Expansion command R1 R6 R5 Expansion command Rib R5b Expansion command R2 Expansion command R3 R4 Function SD memory card or multimedia card command ACMD following CMD55 of an SD memory card Mutual recognition command Reserved CF 45 40 Command index specification Specifies the command index set to bits 45 to 40 in the SD memory card command format Kee ee Ce User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 20 SD memory card port select register This register SDIA PORT 5005 0004h SDIB PORT 5006 0004h SDIC PORT 5009 0004h specifies the port used when multiple SD memory card ports are mounted 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 CERS ESCH NP 2 0 Bl lt 2 ee Specifies the number of supported SD memory cards mme 7 LLL P 1 0 rw 359 o Selects the port number of the selected SD memory card NP 2 0 Number of supported SD memory cards NP2 NP1 NPO Function 0 0 Not defined 0 1 1 port default 2 ports 3 ports 4 ports P 1 0 Port number of the selected SD memory card P1 PO Function 0 0 Port 0 Setting prohibited Setting prohibited Note Setting prohibite Note Operation is not guaranteed if a value other than 0 is
29. munications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems medical equipment or systems for life support e g artificial life support devices or systems surgical implantations or healthcare intervention e g excision etc and any other applications or purposes that pose a direct threat to human life You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under certain use condition
30. odities technology or software must be exported in accordance with the export administration regulations of the exporting country Diversion contrary to the law of that country is prohibited The information in this document is current as of September 2009 The information is subject to change without notice For actual design in refer to the latest publications of NEC Electronics data sheets etc for the most up to date specifications of NEC Electronics products Not all products and or types are available in every country Please check with an NEC Electronics sales representative for availability and additional information e No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC Electronics or others Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and applicati
31. on examples The incorporation of these circuits software and information in the design of a customer s equipment shall be done under the full responsibility of the customer NEC Electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information e While NEC Electronics endeavors to enhance the quality and safety of NEC Electronics products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely In addition NEC Electronics products are not taken measures to prevent radioactive rays in the product design When customers use NEC Electronics products with their products customers shall on their own responsibility incorporate sufficient safety measures such as redundancy fire containment and anti failure features to their products in order to avoid risks of the damages to property including public or social property or injury including death to persons as the result of defects of NEC Electronics products NEC Electronics products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to NEC Electronics products developed based on a customer designated quality assurance program for a specific application The recommended applications of an NEC Electronics product depend on its quality grade as indicated below Customers must chec
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33. pin should be connected to Voo or GND via a resistor if there is a possibility that it will be an output pin All handling related to unused pins must be judged separately for each device and according to related specifications governing the device PRECAUTION AGAINST ESD A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediately after the power source is turned ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the reset signal
34. ranted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable care in preparing the information included in this document
35. rupt is masked EMASK3 Masks the timeout other than response interrupt 0 The interrupt is not masked 1 The interrupt is masked EMASK2 Masks the end error interrupt 0 The interrupt is not masked 1 The interrupt is masked EMASK1 Masks the CRC error interrupt 0 The interrupt is not masked 1 The interrupt is masked EMASKO Masks the command error interrupt 0 The interrupt is not masked 1 The interrupt is masked 26 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 19 SD memory card transfer clock control register This register SDIA CLK CTRL 5005 0048h SDIB CLK CTRL 5006 0048h SDIC CLK CTRL 5009 0048h specifies the ratio for dividing the SD memory card transfer clock frequency 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIVO Bem 10 Selects the type of SD memory card according to the transfer clock speed 0 SD normal card 1 SD high speed card SDCLKOFFEN Enables or disables turning on and off the SD memory card transfer clock signal SDCLK 0 Disables turning on and off SDCLK 1 Enables turning on and off SDCLK The clock signal can be turned off when no transfers are being executed SCLKEN R W Enables or disables the SD memory card transfer clock signal 0 Disables the SD memory card transfer clock signal low output 1 Enables the SD memory card transfer clock signal DIV 7 0 R W 7 0 20H Specifies the ratio for dividing the SD memory card transfer
36. s Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of cach Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electronics products or if
37. s IP transmission The value before setting this bit is used as the CMD52 parameter 0 Default Reseved 78 oo o RWREQ few 2 0 Read wait request signal used during a multiple block read Reed few 3 o TI IOMOD R W SDIO mode specification bit 0 Disables acknowledgment of interrupts from SDIO 1 Enables acknowledgment of interrupts from SDIO 34 User s Manual 19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 26 SDIO information register This register SDIA SDIO INFO1 5005 006Ch SDIB SDIO INFO1 5006 006Ch SDIC SDIO INFO1 5009 006Ch indicates the interrupt sources when SDlx is used in SDIO mode 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 EXWT R W 15 Software read write request 0 No request was issued 1 A request was issued EXPUB52 Software read write request 0 Data was written 1 C52PUB was set to 1 other than when a read or write transfer was performed LEM Indicates the read wait mode ready status 0 The read wait mode is not ready 1 The read wait mode is ready C52RDY R W 1 Indicates the CMD52 ready status 0 CMD52 is not ready to be issued 1 CMD52 is ready to be issued R W Indicates the SDIO interrupt status 0 No interrupt was issued from the SDIO card 1 An interrupts was issued from the SDIO card User s Manual 19361EJ4VOUM 35 CHAPTER 3 REGISTERS 3 2 27 SDIO information mask register This register SDIA SDIO INFO1 MASK 5005 0070h SDIB SDIO INFO1 MASK 5006 0070h SDIC SD
38. source clock frequency by 2 4 8 16 or 512 O Supports SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 SDIO Physical Specifications 2 0 and specifications equivalent to MMC 4 2 User s Manual 19361EJ4VOUM 9 CHAPTER 2 PIN FUNCTIONS 2 4 SD Card Interface Pins moo os o mom oo wow fio o loms 1 sobr fio o om o sobra fio om E T woe Je m COU anre fio om CO soca ma om COU 1 socio CU O omma oS em o 0 ewe Jens some fio om leie ewm fio oa ewxw s ome e owe ew fsoroaras fio om ETS oro ma EE ERREECHEN COCA em In o omes Janmanen ome fio om COCO wow Je baa COCA ome Je baa COCO ome fio owe serwrwwor rcx npr owe COTE 10 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 1 Registers The registers that control SDIx consist of 16 bits The registers are accessed from the ACPU ADSP and DMAC in word 32 bit units of which the higher 16 bits are invalid data Invalid data means that the data written is ignored and the data read is O Do not access reserved registers Do not write any value other than O to reserved bits in each register Base addresses SDO SDIA 5005 0000H SD1 SDIB 5006 0000H SD2 SDIC 5009 0000H 500x 0000h SD memor
39. tput buffer mode CCOREN 0 Disables reading from the CC output buffer in PIO mode 1 Enables writing to the CC output buffer in PIO mode p o Disables the writing to the CC input buffer in PIO mode o Enables the writing to the CC input buffer in PIO mode d 0 Disables writing to and reading from the SD buffer in PIO mode 1 Enables writing to and reading from the SD buffer in PIO mode IWEN EN Disables writing to the output buffer in FIFO mode EN Enables writing to the input buffer in FIFO mode LEM 0 Disables DMA for writing to and reading from the SD buffer 1 Enables DMA for writing to and reading from the SD buffer FISEL RW 0 RAM input buffer 1 FIFO input buffer User s Manual 19361EJ4VOUM 37 CHAPTER 3 REGISTERS 3 2 29 SDIx software reset control register This register SDIA SOFT RST 5005 01COh SDIB SOFT RST 5006 01COh SDIC SOFT RST 5009 01COh is the software reset register of the SDIx blocks 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 mee a o Be spun JE SDRST R W 1 Controls reset of the SD card interface block 0 Resets the SDIx module 1 Cancels the reset state Caution Be sure to set bits 2 and 1 to 1 38 User s Manual 19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 30 SDIx use register This register SDIA USER 5005 0200h SDIB USER 5006 0200h SDIC USER 5009 0200h controls the SDIx wrapper block 12 11 10 9 8 15 14 13 7 6 5 4 3 2 1 0 SYNC R W 15 Specifies the
40. ts The related documents indicated in this publication may include preliminary versions However preliminary versions are not marked as such Caution The related documents listed above are subject to change without notice Be sure to use the latest version of each document when designing 6 User s Manual S19361EJ4VOUM CONTENTS CHAPTER 1 OVERVIEW Cerpi esn a t sopra voco ck ataca Cung uo Cc eege eege 9 i5 MEN Lp E MUERE 9 CHAPTER 2 PIN F NCTIONS ene eric re sce ec cami ccena ace dE cena acc ce x acorde sa ana Ce aaO D da 10 2 1 SD Card Interface Pins errore auia rie Dole Le casa eeepc cd kane et natu epus Dea umma aine edid 10 CHAPTER 3 REGISTERS eseu EEN Va arbre i o doe pei EE nose e Rare pias 11 3 1 Registers eeu te texte t Potrai tn taie EES EEN 11 3 2 Register Functions eseu Eege EEN irna anna Arran Erinin aan nininini 13 3 2 1 SD memory card command register AAA 13 3 2 2 SD memory card port select regleier essere nnne nennen nene 15 3 2 3 SD memory card command parameter register D 16 3 2 4 SD memory card command parameter register 1 16 3 2 5 SD memory card stop register ote aee ee a ia TR t pede Bea 17 3 2 6 SD memory card transfer sector count reglsier errar caeaenerra caraca 17 3 2 7 SD memory card response register 0 18 3 2 8 SD memory card response register 1 sees eee eee eee 18 3 2 9 SD memory card response register 32 19 3 2 10 SD memory card response regist
41. ual Conventions PREFACE This manual is intended for hardware software application system designers who wish to understand and use the SD card interface functions of EMMA Mobile1 EM1 a multimedia processor for mobile applications This manual is intended to explain to users the hardware and software functions of the SD card interface of EM1 and be used as a reference material for developing hardware and software for systems that use EM1 This manual consists of the following chapters e Chapter 1 Overview e Chapter 2 Pin functions e Chapter 3 Registers e Chapter 4 Description of functions It is assumed that the readers of this manual have general knowledge of electricity logic circuits and microcontrollers To understand the functions of the SD card interface of EM1 in detail Read this manual according to the CONTENTS To understand the other functions of EM1 Refer to the user s manual of the respective module To understand the electrical specifications of EM1 Refer to the Data Sheet Data significance Higher digits on the left and lower digits on the right Note Footnote for item marked with Note in the text Caution Information requiring particular attention Remark Supplementary information Numeric representation Binary xxxx or xxxxB Decimal xxxx Hexadecimal xxxxh Data type Word 92 bits Halfword 16 bits Byte 8 bits User s Manual 19361EJ4VOUM 5 Related Documen
42. ut the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 3 2 8 SD memory card response register 1 This register SDIA RSP1 5005 001Ch SDIB RSP1 5006 001Ch SDIC RSP1 5009 001Ch stores the responses returned from the SD memory card 1 5 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 39 24 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 39 to 24 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 18 User s Manual S19361EJ4VOUM CHAPTER 3 REGISTERS 3 2 9 SD memory card response register 2 This register SDIA RSP2 5005 0020h SDIB RSP2 5006 0020h SDIC RSP2 5009 0020h stores the responses returned from the SD memory card 1 5 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R 55 40 15 0 0x0000 Stores the responses returned from the SD memory card The settings of these bits correspond to bits 55 to 40 of the response format Remark For details about the response formats see SD Specifications Part 1 Physical Layer Simplified Specification Ver 2 0 3 2 10 SD memory card response register 3 This register SDIA RSP3 5005 0024h SDIB RSP3 5006 0024h SDIC RSP3 5009 0024h stores the responses returned from the SD memory card 1 5 14 13 12 11 10 9 8 an wo roo row Io Io Joss ros 7 6 5
43. y card command register SDIx CMD 500x 0004h SD memory card port select register SDIx PORT 1 2 R After Reset R W 0000 0000h 0000 0100h ETE E ES a EN SS EN Ee ES ES 0000 0000h 0000 0000h W W W W W 0000 0000h W HI HI HI HI HI 500x 0038h SD memory card information register 1 SDIx INFO1 R W R Undefined 0000 068D 500x 003Ch SD memory card information register 2 SDIx INFO2 R W R Undefined 0000 2080h 500x 0040h SD memory card information mask register 1 SDIx INFO1 MASK 0000 031Dh 500x 0044h SD memory card information mask register 2 SDIx INFO2 MASK 0000 8B7Fh 500x 0048h SD memory card transfer clock control register SDIx CLK CTRL 0000 0020h i JW 0000 0000h 0000 0000h 0000 0000h 0000 0000h 0000 0000h User s Manual S19361EJ4VOUM 11 CHAPTER 3 REGISTERS 2 2 Undefined Register Name Register Symbol R 500x 0060h SD memory card data buffer O register SDIx BUFO R 500 0064n 500x 0068h SDIO mode setting register SDIx SDIO MODE R 0000 0000h 500x 006Ch SDIO information register SDIx SDIO INFO1 R 0000 0000h R R R SECH 500x 0070h SDIO information mask register SDIx SDIO INFO1 0000 C007h MASK 500x 0074h to Reserved SD CG EXT MODE 500x 01B4h Reserved SDi SOFT RST 500x 01C4h to Reserved 500x_01E0h SD USER Soi USER W W W W W W W 0000 0000h 500x 0210h to Reserved 500x 02FCh 500x 0300h SDIx DMA mode SD buffer register SDIx DMASD
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