Migration guide - FTP Directory Listing
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1. 00001111b Not supported should be replaced by 0x0f 00001111B 00001111B Binary 1010b b 1010 00001111b 607020 Octal 1234q q 1234 01234 607020 9423 Decimal 1234 1 d 1234 1234d OASFH Hexadecimal OFFFFh OxFFFF h FFFF OASFh G Q 2S 22 5 z ADDR DS24 ALIGN ALIGN ASSERT BLKA DS24 BLKB DS DS8 BLKD DS64 BLKF DS32 BLKL DS32 BLKW DS16 BTEQU M BTGLB BYTE DS DS8 CALL DEFINE define DEFINE DOUBLE DS64 EINSF END ELIF elif ELSE else END END ENDIF endif ENDM ENDM Part number Page 9 of 15 MRenesasM16C R8C_To_IARRL78 3 Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 ENDR ENDR EQU EQU EXITM EXITM FB FBSYM FILE m sFLOAT DS32 FORM LIST PAGE LSTCND LSTCOD LSTEXP LSTMAC LSTOUT LSTREP LSTXRF GLB PUBLIC PUBWEAK ID IF if INCLUDE include INITSCT RSEG INSF NAME PROGRAM INSTR LEN LOCAL LOCAL LWORD DS32 MACPARA _args MACREP REPTC REPTI MACRO MACRO MREPEAT OFSREG OPTI ORG PROTECT p RESERVED_AREA V 6 00 only DB DC DS RVECTOR DC16 see example in asm guide SB SB_AUTO _XXxX SBBIT SBSYM SECTION STK SUBSTR SVECTOR VE2. Ax 24 bit values in A HL 32 bit values in BC AX Floating point values in BC AX BC and DE The registers AX HL CS and ES Registers that are used as register parameters and for returning values by a function The system startup code is located in the ready made cstartup s file In addition you specify additional settings for example for the stack and heap size It is likely that you need to customize the code for system initialization For example your application need to initialize memory mapped special function registers or omit the default initialization of data segments performed by cstartup You can do this by providing a customized version of the routine low_level_init which is called from cstartup before the data segments are initialized Modifying cstartup directly should be avoided Static and global variables are initialized zero initialized variables are cleared and the values of other initialized variables are copied from ROM to RAM memory This initialization can be overrided by returning 0 from the __low_level_init function Variables declared _ no_init which are not initialized at all no _ init int i Not all library functions are reentrant Refer to Appendix E of The compiler is always reentrant when using the DLIB NC30 User s Manual for details library IAR IAR Systems IAR Embedded Workbench C SPY visualState The Code to Success IAR KickStart Kit IAR and the logotype of IAR Sys
3. 16C R8C to IAR Embedded Workbench for Renesas RL78 SHow V 6 00 only SPace V 6 00 only STACk V 6 00 only STARt V 6 00 only STRip V 6 00 only Subcommand V 6 00 only SYmbol_forbid V 6 00 only T V 5 45 only Total_size V 6 00 only u V 5 45 only UTL V 6 00 only v V 5 45 only Variable forbid V 6 00 only VECT V 5 45 only map filename directory IAR ELF TOOL fill v pattern range range IAR ELF TOOL entry lt symbol gt strip config lt filename gt Always except in silent mode Run the executable without options Do not use silent By default the vector table is populated with a default interrupt handler which calls the abort function For each interrupt source that has no explicit interrupt service routine the default interrupt handler will be called If you write your own service routine for a specific vector that routine will override the default interrupt handler vECT V 6 00 only See above VECTN V 5 45 only See above VECTN V 6 00 only See above w V 5 45 only diag_error diag_remark diag_suppress diag_warning diagnostics_ tables error list no_warnings remarks warnings _are_errors warnings affect_exit code bss bss noinit bssf noinit CSINIT V 6 00 only The section name is not relevant ILINK looks at the segment type to recognize these CSVTBL V 6 00 only The section name is not relevant ILINK l
4. Migration guide SYSTEMS Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 Use this guide as a guideline when converting source code written for the Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 Locate a feature in the left hand column then the IAR specific counterpart can be found to the right For detailed information about this feature specific to IAR Embedded Workbench see the relevant documentation For a complete list of guides see IAR Information Center in the IDE Migrating from Renesas C C Compiler Package for M16C Series and R8C Family M3T NC30WA _ 5 x and 6 x Migrating to IAR Embedded Workbench for Renesas RL78 2 x Compiler specific details Assembler C C EC V 6 00 only Supported programming languages assembler C Embedded C Extended Embedded C and C C89 For C the C99 standard is default but C89 can optionally be used C99 is supported by the library R8C Generate code for R8C lt 48KB core sl s2 s3 R8CE Generate code for R8C gt 48KB s1 Generates code for S1 the RL78 core with only one None Generate code for M16C register bank and a multiplexed 8 bit bus s2 Generates code for S2 the core without instructions to support a hardware multiplier divider s3 default Generates code for S3 the core with instructions to support a hardware multiplier divider Default near RAM and far ROM Supported code models
5. R WORD DS16 silent finfo goptimize V 6 00 only H I JOPT V 5 45 only L M m60 V 5 45 only CoOre m61 V 5 45 only COrnS N le O P Part number MRenesasM16C R8C_To_IARRL78 3 Page 10 of 15 Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 PATCH 6N TA PATCH 6N Tan R8C R8CE R8Cxx s V 5 45 only s M V 6 00 only subcommand lt filename gt V 6 00 only Linker and library details core core core l preprocess l1 preprocess Sf diagnostics_tables Run the executable without options Do not use silent All SFR are defined in sfrxx h and sfrxx inc header files All SFRs are defined in ioxxx h files V 5 45 only V 5 45 only Absolute_forbid V 6 00 only Binary V 6 00 only BYte_count V 6 00 only CAchesize V 6 00 only CHange_message V 6 00 only Compress NOCOmpress V 6 00 only CONTIGUOUS_SECTION V 6 00 only CPu V 6 00 only CRe V 6 00 only DAta_stuff V 6 00 only DEBug Sdebug NODEBug V 6 00 only DEFine V 6 00 only DELete V 6 00 only E V 5 45 only END V 6 00 only ENTry V 6 00 only EXIT V 6 00 only EXTract V 6 00 only silent config lt file gt image_input diag_error diag_remark diag_suppress diag_warning d
6. R V 5 45 only Output V 6 00 only PADDING V 6 00 only PROfile V 6 00 only PS_check V 6 00 only R8C V 5 45 only R8CE V 5 45 only REcord V 6 00 only REName V 6 00 only REP lace V 6 00 only ROm V 6 00 only RTs_file V 6 00 only s9 V 6 00 only SAMECode_ forbid V 6 00 only SAMESize V 6 00 only SBr V 6 00 only V 6 00 only SEction_forbid V 6 00 only Automatic if information is present in the input files no_locals Can only be specified in the linker configuration file No separate option Enter library names separated with blanks search directory No separate option Enter library names separated with blanks map filename directory Can only be specified in the linker configuration file Always output except in silent silent mode map filename directory M16C specific M16C specific map filename directory map filename directory force_ output output o filename directory vfe forced merge duplicate_sections inline Can only be specified in the linker configuration file Only one output file Extra formats can be generated via IAR ELF TOOL using the default output file as source IAR ELF TOOL bin ihex srec simple Related to diag_supress redirect lt from_sybol gt lt to_symbol gt IARCHIVE TOOL replace r Can only be specified in the linker configuration file Migrating from Renesas toolchain for M
7. d_macro WUM Wuninitialize variable wuv Wunknown_pragma WUP Assembler specific details The assembler supports Same several modules per source file relocatable placement Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 All interrupt vectors for peripheral interrupts should be placed in section vector fixed interrupt vectors should be placed in section fvector Sections are only defined using the assembler directive SECTION There is no distinction between absolute relocatable sections Section types can be CODE ROMDATA or DATA Interrupt functions should be declared as RooT so that they cannot be discarded by the linker even if no symbols in the segment are referred to To insert an entry in the interrupt vector table define the destination with the pw directive for example like this COMMON INTVEC CODE ROOT 1 ORG 0x08 INTPO branchToInter0 DW inter0 Use the section control directive SECTION alias RSEG to place your code and data in sections A section is relocatable SECTION name CODE ALIGN RSEG section type flag align Bit segments cannot be defined explicitly but can easily be defined using bit operators in code or data segments As a byte is the smallest allocatable memory segment no memory is lost or gained using either tool
8. har_enumerator fCE e any integer type can be used fconst_not_ROM f CNR fdouble_ 32 f D32 default fenable_ register fER fextend_to_int fETI z ffar_pointer fFP __far keyword ffar_RAM fFRAM finfo 7 fjsrw V 5 45 only fnear_ROM f NR data_model fno_align f NA fno_carry e fno_even fNE fno_lib V 6 00 only fno_switch_table fNST fnot_address_volatile fNAV fnot_reserve_asm fNRA fnot_reserve far _and_near fNRFAN fnot_reserve inline fNRI fptrdifft_16 f P16 SB_auto fSBA fsizet_16 fS16 fsmall_array fSA fswitch_other_ section f S0S 7 fuse_ DIV fUD disable div_mod_instructions fuse_MUL fUM F g debug genter z gbool_to_char V 5 45 only gno_reg 2 Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 gold V 5 45 only goptimize V 6 00 only Idirectory llibraryfilename lang clcpp ecpp V 6 00 only 1n30 lt Option gt V 5 45 only 1nkcemd lt filename gt V 6 00 only noexception V 6 00 only ofile_ name PO led 050A Ocompare_byte_to_word OCBTW Oconst 0C Oforward_function_to_inline OFFTI Oglb_jmp 0GJ V 5 45 only Oloop_unroll unroll_count OLU Ono_asmopt ONA Ono_bit ONB Ono_break_ source debug ONBSD Ono_float_const_fold ONFCF Ono_logical_or_combine ONLOC Ono_std
9. iagnostics_ tables error list no_warnings remarks warnings_are_errors warnings affect_exit code Can only be specified in the linker configuration file IAR ELF TOOL checksum symbol offset address size algorithm 1 2 m LIW r ilp start range range Can be reserved with place holder symbol size section alignment Can only be specified in the linker configuration file Debug information is included by default and removed by strip Debug information with terminal debug_lib define_ symbol value IARCHIVE TOOL delete d libraryfile objectfilel objectfileNn entry lt symbol gt IARCHIVE TOOL extract libraryfile objectfilel objectfileN x libraryfile objectfilel objectfileN Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 Form V 6 00 only FSymbol V 6 00 only FUnction_forbid V 6 00 only G V 5 45 only Hide V 6 00 only JOPT V 5 45 only JUMP_ENTRIES_FOR_PIC V 6 00 only L V 5 45 only LD V 5 45 only LIBrary V 6 00 only List V 6 00 only Loc V 5 45 only LOgo NOLOgo V 6 00 only M V 5 45 only M60 V 5 45 only M61 V 5 45 only MAp V 6 00 only MEMory V 6 00 only Message NOMessage V 6 00 only MS V 5 45 only MSL V 5 45 only MSg_unused V 6 00 only NOPRELink V 6 00 only NOSTOP V 5 45 only 0 V 5 45 only Optimize V 6 00 only ORDE
10. ion program program __no_init char a 0x80 or pragma location 0x80 __no_init const int a void f void MyFunctions or void f void or pragma location MyFunctions MyFunctions void f void Place my_section at desired address using linker options or sect30 inc V 5 45 only Place my_section at desired address using linker options V 6 00 only const unsigned short constants 0x1234 0x5678 pragma interrupt MyInterruptRoutine vect 23 void MyInterruptRoutine void The section MyFunctions must be placed by customizing the linker configuration file See the compiler guide section Customizing the linker configuration file const unsigned short constants 0x1234 0x5678 pragma vector 0x17 __interrupt void MyInterruptRoutine void Do something here or pragma vector UART1 R_RXNE vector Symbol from I O header file __interrupt void MyInterruptRoutine void Do something here Note that an interrupt function must have the return type void and it cannot specify any parameters asm mov b 11h r0 asm MOV W RO FB f asm MOV W RO s asm MOV W RO f asm movw ax sp asm mov a Oxff 8 bits char 8 bits 16 bits int 16 bits 16 bits short 16 bits 32 bits float 32 bits 32 bits long 32 bits 64 bits long long 32 bits 64 bits do
11. lib ONS OR OR_MAX ORM OS OS_MAX OSM Osp_adjust OSA Ostack_frame_align OSFA Ostatic_to_ inline OSTI P preinclude filename V 6 00 only R8C R8CE rtti off V 6 00 only rtti on V 6 00 only S silent Upredefined_macro v V Wall Wcecom_max_warnings WarningCount WCMW Werror_ file lt filename gt WEF V 5 45 only Wlarge_to_small WLTS Wmake_tagfile wmT V 5 45 only Wnesting_comment WNC Wno_stop WNS Wno_used_argument WNUA Wno_used_function WNUF Wno_used_static_function WNUSF Wno_warning_stdlib WNWS I path No option needed Just add library name as input to the linker e ec eect c89 c99 is default available as a linker option output filename directory o filename directory Oh pragma unroll n Ohz Ohz Ohs Ohs preprocess c n 1l filename directory preinclude includefile core sl s2 s3 rtti is not supported rtti is not supported lb filename directory silent default behavior Run the executable without options Do not use silent no_warnings error limit n diagnostics tables filename directory Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 Wnon_prototype WNP Wstdout V 5 45 only Wstop_at_link WSAL ILINK option force_ output Wstop_at_warning WSAW Wundefine
12. nfiguration file pragma STRUCT abs_b abs _w pragma pack dadc_b dadc_w dadd_b dadd_w div_b div_w divu_b divu_w divx_b divx_w dsbb_b dsbb_w dsub_b dsub_w mod _b mod w modu _b modu w movll movlh movhl movhh neg _b neg w not_b not_w rmpa_b rmpa_w rolc_b rolc_w rorc_b rorc_w rot_b rot_w sha_b sha_w shl_b shl_w smovb_b smovb_w smovf_b smovf_w sstr_b sstr_w __cplusplus V 6 00 only __embedded_cplusplus _ DATE _ _ DATE _ __ FILE _ _ FILE Part number Page 5 of 15 MRenesasM16C R8C_To_IARRL78 3 Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 LINE LINE _ M16C __ICCRL78__ NC30 IAR_SYSTEMS_ICC _R8C__ __CORE__ __RENESAS___ V 6 00 only IAR_SYSTEMS_ICC __RENESAS VERSION __ V 6 00 only VER __stpc__ V 6 00 only _ STDC __ __STDC_VERSION__ TIME _ TIME as30 lt Option gt z e r Didentifier D symbol value dirdir name output filename directory o filename directory dsource ds l alA b B c C D N H filename directory dsource_in_list dSL lfalAlbIBlcICID N H filename directory E preprocess c n 1 filename directory exception V 6 00 only fansi strict fauto_128 fA1 fauto_over 255 fA02 fbit B fchange_bank_always fCBA fc
13. ooks at the segment type to recognize these data data dataf hdata sdata fyector intvec heap V 5 45 only NEAR_HEAP FAR_HEAP HUGE_HEAP heap_NE V 6 00 only NEAR_HEAP interrupt istack V 6 00 only CSTACK program text textf program_S Not fixed Can be forced to a user defined segment with pragma constseg or pragma dataseg rom const constf Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 consth stack CSTACK switch_table switch switchf vector intvec Runtime environment Parameters passed on the stack all except char short near pointer Parameters passed in registers 8 bit values in R1L 16 bit values in R1 R2 24 bit values in 32 bit values in stack Floating point values in stack Return values 8 bit values in ROL 16 bit values in RO 24 bit values in 32 bit values in R2RO 64 bit values in R3R1 R2RO0 Floating point values in R2RO Preserved registers None Scratch registers The system startup code can either be delivered in assembler files ncrt0 a30 sect30 inc or in C source files Static and global variables are initialized not initialized variables are cleared and the values of other initialized variables are copied from ROM to RAM memory 8 bit values in A B C X D E 16 bit values in AX BC DE 24 bit values in Stack 32 bit values in BC AX Floating point values in BC AX 8 bit values in A 16 bit values in
14. option code_model Options for near ROM and far RAM near default Function calls reach the first 64 Kbytes of memory far Function calls reach the entire 1 Mbyte memory Default near RAM and far ROM Supported data models option data_model1 Options for near ROM and far RAM near default Data is by default placed in the highest 64 Kbytes of memory far Data is by default placed in the entire 1 Mbyte of memory One library for M16C and one for R8C The linker automatically selects appropriate libraries _ Overriding default placement of given code datamodel near far To override default placement of the selected code model use any of these memory attributes tale __near_func default __far_func near far To override default placement of the selected data model use any of these memory attributes __near default The highest 64 Kbytes __ far The entire 1 Mbyte of memory Maximum object size 65535 bytes An object cannot cross a 64 Kbyte boundary __huge The entire 1 Mbyte of memory Maximum object size 1 Mbyte No data model For example Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 _ near int i 3 __ far unsigned u Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 pragma address variable name address value For example pragma address pm0 0004h pragma section program my section void foo void pragma sect
15. tems are trademarks or registered trademarks owned by IAR Systems J Link and J Trace are trademarks licensed to IAR Systems All information is subject to change without notice AR Systems assumes no responsibility for errors and shall not be liable for any damage or expenses Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 2015 IAR Systems AB Part number MRenesasM16C R8C_To_IARRL78 3 November 2015
16. uble 32 bits treated as float Extended keywords asm _asm asm _ asm _Bool bool language extensions must be enabled _ext4mptr far far far inline _inline pragma inline forced never Part number MRenesasM16C R8C_To_IARRL78 3 Page 3 of 15 Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 near _near __near restrict Migrating from Renesas toolchain for M16C R8C to IAR Embedded Workbench for Renesas RL78 pragma ADDRESS pragma location pragma ASM asm _ asm pragma _ASMMACRO asm _ asm pragma BIT pragma BITADDRESS pragma CREG V 6 00 only M16C specific pragma ENDASM pragma entry V 6 00 only __noreturn __no_save pragma EXT4MPTR pragma INTCALL pragma INTERRUPT pragma vector 0x17 __interrupt void foo void pragma interrupt V V 6 00 only pragma vector 0x17 __interrupt void foo void pragma ISTACKSIZE V 6 00 only done via linker configuration file pragma JSRA V 5 45 only pragma JSRW V 5 45 only pragma PAGE pragma PARAMETER you must conform to the calling convention pragma ROM V 5 45 only pragma constseg pragma SBDATA pragma sectaddress V 6 00 only pragma segment section pragma SECTION pragma location pragma SPECIAL pragma STACKSIZE V 6 00 only done via linker co
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