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NAD-2073 User`s Manual

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1. The system has an internal drive bay for one Compact Flash card drive If the CF is not pre installed you can install it by yourself Follow the steps below to install the CF 3 Fasten the five screws to lock bracket together Fig 2 11a 2 11b Fig 2 11a Hemove L type base under button case 4 Completion CF to the System Chassis Fig 2 12 Fig 2 11b Push CF into the bracket NAD 2075 User s Manual 6 Fig 2 12 completion CF in system Fix all screws back Fig 2 13 NAD 2075 User s Manual 7 28 Product Specifications Model Main Processor BIOS Main Memory L2 Cache Memory Chipset SATA Interface PCI IDE Interface Serial Ports USB Interface Auxiliary I O Interfaces Power Input On board Ethernet Hardware Monitor Environmental Requirements Dimension NAD 2075 VIA C7 processors FSB 400 533Mhz Award system BIOS with 512KB flash ROM to support DMI PnP APM function Up to 1024MB 1 8V DDR2 128KB 32 way built in C7 CPU module VIA 8237R Two SATA DMA133 Storage One 40 Pin for DMA 33 66 100 IDE Storage Support two high speed 16550 compatible UARTs with 16 byte T R FIFOs Support two USB2 0 ports for high speed I O peripheral devices System reset switch power okay LED Ethernet activity LED Ethernet speed LED general purpose LED alert LED and HDD LED interface Support one AC Adaptor with Adaptor input power requirem
2. Normal POST Boot Up NumLock Status Select power on state for NumLock The choice Enabled Disabled R J Gate A20 Option This entry allows user to select how the gate A20 is handled The gate A20 is a device used to address memory over 1 Mbytes Originally the gate A20 was handled via a pin on the keyboard But now though keyboards still provide this support it is more common and much faster for the system chipset to provide support for gate A20 R J Typematic Rate Setting Keystrokes repeat at a rate determined by the keyboard controller When enabled the typematic rate and typematic delay can be selected The choice Enabled Disabled R J Typematic Rate Chars Sec Set the how many number of times a second to repeat a keystroke when a key is holding down The choice 6 8 10 12 15 20 24 and 30 NAD 2075 User s Manual 21 Yh Typematic Delay Msec Set the delay time after the key is held down before it begins to repeat the keystroke The choice 250 500 750 and 1000 Z Security Option Select whether the password is required every time the system boots or only when you enter setup The system will not boot and access to Setup will be denied if the correct password is not entered at the prompt The system will boot and access to Setup will be denied if the correct password is not entered at the prompt Note To disable security select PASSWORD SETTING at Main Menu and then user wil
3. Screen Shot Phoenix Award BIOS CMOS Setup Utility Phoenix AwardBIOS CMOS Setup Utility Standard CMOS Features i an aa ee ee ee ee ee a G ai Ge EOS aG si A Ea S ae as AMICI B Time mm Hs GH amp ow Il Il Il lI il il Il Il Il Il H Il Il Il Il Il Il Il Il Il ll Il H il Item Help Menu Level IDE Channel Master None IDE Channel Slave None IDE Channel 1 Master None IDE Channel 1 Slave None Video EGA UGA Base Memory B4AK Change the day month year and century Total Memory 14 39360K II II H Il H I H Il H I ll II H I II II H Il I II II H I LL I Extended Memory 103833BK F F5 Previous Values F6 Fail Safe Defaults 7 Optimized Defaults NAD 2075 User s Manual 19 Menu Selections Set the system date Note that the Day automatically changes when you set the date Set the system time hh mm ss EGA VGA CGA 40 Select the default video device CGA 80 MONO Display the amount of conventional memory Base Memory detected during boot up Display the amount of extended memory Extended Memory detected during boot up N A Total Memory WA Display the total memory available in the system Advance BIOS Features This section allows user to configure your system for basic operation Users will be able
4. VIA C 1 5 6GHz 180x15 0 Memory Testing 252864K OK DH shared memory DOR DIMM Speed 288 DOR DIMM Data Hidth B4 Bit Single Channel IDE Channel 8 Master None IDE Channel H Slave None IDE Channel Master None IDE Channel Slave None When message Hit DEL if you want to run Setup appear during POST after turning on or rebooting the computer press Tab key immediately to enter BIOS setup program 7 This is the end of this section If the terminal did not port correctly please check the previous steps 2 11 BIOS Setup Information NAD 2075 is equipped with the Award BIOS within Flash ROM The BIOS has a built in setup program that allows users to modify the basic system configuration easily This type of information is stored in CMOS RAM so that it still retains during power off periods When system is turned on NAD 2075 communicates with peripheral devices and checks its hardware resources against the configuration information stored in the CMOS memory Whenever an error is detected or the CMOS parameters need to be initially defined the diagnostic program will prompt the user to enter the Setup program Some errors are significant enough to abort the start up NAD 2075 User s Manual 16 Yh Entering Setup When you see the message Hit lt DEL gt if you want to run Setup after turning on or rebooting the computer press lt Del gt key immediately to enter BIOS setup program If you want
5. outportb 0x2e 0x30 outportb Ox2f 0x1 Step5 Config W83697 WDT using second to be unit write Oxf3 to port 2e to point W83977ATF CR D write 0x00 to port 2f to select time out unit is second t outportb 0x2e Oxf3 outportb Ox2f 0x00 Step6 Set WDT time out time write Oxf4 to port 2e to point W83697 CR f4 write time out to port 2f to set time out time outportb 0x2e Oxf4 outportb Ox2f time out Step7 Exit W83697 extended function mode write Oxaa to port 2e outportb 0x2e 0xaa asm sti void retriggle WDT void asm cli Step1 Enter W83697 extended function mode write 0x87 to port 2e twice NAD 2075 User s Manual 37 outportb 0x2e 0x87 outportb 0x2e 0x87 Step2 Select W83697 logic device 8 write 0x07 to port 2e to point W83697 CR_07 write 0x08 to port 2f to select logic device 8 outportb 0x2e 0x07 outportb Ox2f 0x08 Step3 Retriggle WDT time out time write Oxf4 to port 2e to point W83697 CR f4 write time out to port 2f to set time out time in W83697 outportb 0x2e Oxf4 outportb Ox2f time out Step4 Exit W83697 extended function mode write Oxaa to port 2e outportb 0x2e 0xaa asm sti printf n n Trigle delay 1000 void disable_WDT void asm cli Step1 Enter W83697 extended function mode write 0x87 to port 2e twice outportb 0x2e 0x87 outportb 0x2e 0x87 Step2 Sel
6. B0 D17 FO0 Offset 88h out dx eax mov dx 0CFCh in eax dx and al Ofeh bitO cleared to O mov PM IO BAGE ax NAD 2075 User s Manual 25 PG_Step3 Get GPI24 status from bim of IOPORT PM IO BASE 4Bh Output GPO31 to bit7 of IOPORT PM IO BASE 4Fh Testing way t1 Read GPI24 first GPI24 1 if yes pass if no failed Do RST2DF button pressed and released read GPI24 GPI24 0 if yes pass if no failed n Set RST2DF status to 1 read GPI24 GPI24 1 if yes pass if no failed c a a a Ee t_start t1 start GP124 read its status initialization will be 1 How to read GPI24 Get GPI24 status from Di of PM IO BASE 4Bh 0 low REset to DF 1 high level Normal mov dx PM IO BASE add dx 4Bh in al dx BT ax 0 jc okay test Carry gt GPI24 1 no error message display lea dx promp err1 mov ah 09h int 21h lea dx promp erri 1 mov ah 09h int 21h or ERROR CODE 01 Error code bitO P1 call KB Wait t1 end okay test t2 start lea dx promp rst2df mov ah 09h int 21h lea dx promp anykey mov ah 09h int 21h xor al al halt for ready Any key pressed to go on WAIT KB 0 mov ah 1 int 21h cmp al 0 je WAIT KB 0 NAD 2075 User s Manual 26 lea dx PROMP 2 CR LF mov ah 09h int 21h test RST2DF button pressed mov dx PM IO BASE add dx 4Bh in al dx BT ax 0 jnc okay test2 No Carry gt GPI24 20 RSTDF pressed test okay go o
7. Handle the board by its edges only do not touch its components peripheral chips memory modules or gold contacts When handling memory modules avoid touching their pins or golden edge fingers Put the value communications appliance system board and peripherals back into the antistatic bag when they are not in use or not installed in the chassis Some circuitry on the system board can continue operating even though the power is switched off Under no circumstances should the Lithium coin cell be used to power the real time clock be allowed to be shorted The coin cell can heat under these conditions and present a burn hazard WARNING 1 CAUTION Danger of explosion if battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Discard used batteries according to the manufacturer s instructions 2 This guide is for technically qualified personnel who have experience installing and configuring system boards Disconnect the system board power supply from its power source before you connect disconnect cables or install remove any system board components Failure to do this can result in personnel injury or equipment damage SS Avoid short circuiting the lithium battery this can cause it to superheat and cause burns if touched A Do not operate the processor without a thermal solution Damage to the processor can occur in seconds 5 Do not block air vents Minimum 1 2 inch for c
8. are also included to help you get a safe installation Reading this chapter will teach you how to set up NAD 2040 Chapter 3 Operation Information This section gives you illustrations and more information on the system architecture and how its performance can be maximized Any updates to this manual technical clarification and answers to frequently asked questions would be posted on the web site http isc portwell com tw 1 8 Technical Support Information Users may find helpful tips or related information on Portwell s web site http www portwell com tw A direct contact to Portwell s technical person is also available For further support users may also contact Portwell s headquarter in Taipei or your local distributors Taipei Office Phone Number 886 2 27992020 NAD 2075 User s Manual 2 Chapter 2 Get Started This section describes how the hardware installation and system settings should be done 2 1 Included Hardware The following hardware is included in your kit e PPAP 2020 Communication Appliance System Board One null serial port cable 22 Before You Begin To prevent damage to any system board it is important to handle it with care The following measures are generally sufficient to protect your equipment from static electricity discharge When handling the board use a grounded wrist strap designed for static discharge elimination and touch a grounded metal object before removing the board from the antistatic bag
9. values from CMOS Load the fail safe defaults from BIOS default table 7 Load the optimized defaults mn Save all the CMOS changes and exit Yh Main Menu Once you enter NAD 2075 Award BIOS CMOS Setup utility you should start with the Main Menu The Main Menu allows you to select from eleven setup functions and two exit choices Use arrow keys to switch among items and press lt Enter gt to accept or bring up the sub menu NAD 2075 User s Manual 17 Phoenix Award BIOS CMOS Setup Utility Phoenix AwardBIOS CMOS Setup Utility Standard CMOS Features Load Fail Safe Defaults Advanced BIOS Features x Load Optimized Defaults Advanced Chipset Features Set Supervisor Password Set User Password Integrated Peripherals PnP PCI Configurations Save amp Exit Setup PC Health Status Exit Without Saving Frequency Vol tage Control db ee FIA Save amp Exit Setup NOTE It is strongly recommended to reload the optimized default setting if CMOS is lost or BIOS is updated NAD 2075 User s Manual 18 Standard CMOS Setup Menu This setup page includes all the items within standard compatible BIOS Use the arrow keys to highlight the item and then use the lt PgUp gt lt PgDn gt or lt gt lt gt keys to select the value or number you want in each item and press lt Enter gt to certify it Follow command keys in CMOS Setup table to change Date Time Drive type and Boot Sector Virus Protection Status
10. 7 533 or 400MHz system bus for cost effective and high performance application The VIA CN700 provides a completely integrated solution for the system controller and data path components in a VIA processor system It provides optimized 64 bit DDR2 interface The VIA VT8237R provides a highly integrated multifunction for the best industry applications It supports up to for Ultra ATA 33 66 100 IDE master interface Universal Serial Bus USB2 0 controllers Full duplex high performance 150MB s Dual Channel SATA interface NAD 2075 User s Manual 35 All detailed operating relations are shown in Fig 3 2 PPAP 2020 System Block Diagram VIA EDEN V4CPU 500Mhz PPAP 2020 0530 ON BOARD 256MB DDRII MINI DDRII DIMM X 1 VIA CN700 IDE Primary ONE 42 PIN PRcA Sounth Bridge BU VT8237R Plus Realtek 8100C 8110 S32 Realtek Realtek 8100C 8110 S32 8100C 8110 S32 BY PASS function BY PASS functice COM HIW PCIMG Wor Monitor a Figure 3 2 PPAP 2020 Block Diagram NAD 2075 User s Manual 36
11. NAD 2075 Series Communications Appliance User s Manual Revision 1 00 Portwell Inc 3F No 92 Sec 1 Nei Hu Rd Taipei 114 Taiwan R O C LE Headquarter 886 2 2799 2020 FAX 886 2 2799 1010 Cosme http www portwell com tw EMAIL ISO 9001 INFO MAIL PORTWELL COM TW Table of Contents Chapter 1 die e te Vu m 2 1 1 About Tus MANUAL eelere EE 2 1 2 Manual Organization E 2 1 3 Technical Support geen 2 Chapter 2 Get Started KE 3 2 1 l cl d d lee ANC eM D C 3 2 2 Before You Begin Mem MADE 3 2 3 The a E EE 4 2 4 Open the EE 4 2 5 Install or Remove a ET 4 2 6 Remove and Install Battery EE 6 2 7 Install Compact Flash rerne e e e eee a elle aes das 6 2 8 Product SPCC CANONS ege eene 8 2 9 Hardware Configuration E 9 2 10 Use a Client COMIPULER so o reo ite seppur p Ne padece EE 15 2 11 BIOS Sip Informati n EE t ous sous a 16 2 12 Reset to Default Sample Code information eene 23 2 13 GPO Code informatiom mr EE 30 2 14 WDT Sample Code IDIOHTIMTION s s 16516 Do ero ein trie Ro ak aph 30 Chapter 3 le ipcupECcHU 34 3 1 Brief Guide of PPAP ZO02D eege laeso te bee 34 3 2 System ALCANOCIUIC eR 35 NAD 2075 User s Manual 1 Chapter 1 Introduction 1 1 About This Manual This manual describes all required information for setting up and using the NAD 2075 All men
12. PROMP1 mov ah 09h int 21h lea dx PROMP 2 CR LF mov ah 09h int 21h lea dx PROMP1 1 mov ah 09h int 21h lea dx PROMP 2 CR LF mov ah 09h int 21h lea dx PROMP Str1 mov ah 09h int 21h lea dx PROMP Str2 mov ah 09h int 21h lea dx PROMP Str3 mov ah 09h int 21h NAD 2075 User s Manual 24 lea dx PROMP Str4 mov ah 09h int 21h lea dx PROMP Str5 mov ah 09h int 21h lea dx PROMP Str6 mov ah 09h int 21h lea dx PROMP Str7 mov ah 09h int 21h lea dx PROMP Str8 mov ah 09h int 21h lea dx PROMP Str9 mov ah 09h int 21h lea dx PROMP StrA mov ah 09h int 21h mov ERROR CODE 00h Init Error code to 00 PG_Step1 Set VT8235 Pin AER to GPI24 B0 D17 FO0 Offset E6h BitOPO Set VT8235 Pin AC6 to GPO31 B0O D17 FO Offset E6h Bit7P1 Let GPI24 non invert gt BO D17 FO Offset EOh Bit4PO0 Let GPI31 TTL output gt BO D17 FO_Offset_E7h_Bit7P1 mov dx 0CF8h PCI Config Read mov eax 800088E4h B0 D31 F0 Offset E4h out dx eax mov dx 0OCFCh in eax dx ror eax 10h swap E5 E4 with E7 E6 or ax 8080h E7 Bit7P1 EG Bit7P1 and ax OFFFEh EG BitOPO rol eax 10h swap back out dx eax Update these 3 bits mov dx 0CF8h PCI Config Read mov eax 800088E0h BO D31 F0 Offset EOh out dx eax mov dx 0OCFCh in eax dx and al 0EFh EO Bit4PO out dx eax Update this bit PG Step2 Get PM IO BASE from B0 D17 FO Offset 89h 88h mov dx 0CF8h Get PM IO BASE mov eax 80008888h
13. Q pressed je test fail cmp al 71h q pressed jne call return jmp test fail call return lea dx PROMP 2 CR LF mov ah 09h int 21h pop dx pop cx pop bx pop ax ret KB wait ENDP Input CX count of 15 microseconds to wait 4 STACK PRESENT Output NONE CX 2 15us x 2 30 us This routine is called to wait for 15 microseconds count in CX then return Gives a programmed software delay FIXDELAY PROC near push cx push dx push ax pushf mov cx 02h mov dx 61h in al dx S jmp 2 jmp 2 and al 00010000b i mov ah al fixed_delay_1 in al dx jmp 2 jmp 2 and al 00010000b cmp al ah jz shortfixed delay 1 mov ah al NAD 2075 User s Manual 29 loop short fixed delay 1 popf pop ax i pop dx pop cx ret FIXDELAY ENDP END programstart 2 13 GPO Code information This Program is to test PPAP 2020 GPOO Port0 7 Programer John Ma Ki include lt stdio h gt include lt conio h gt include lt dos h gt define GPIO_Base 0x404d define d_time 2000 int main union REGS regsi unsigned char i printf n n PPAP 2011 GPO TEST PROGRAM R1 00 Test each GPIO outportb GPIO_Base 0x55 make sure read data from GPIO pin delay d_time outportb GPIO_Base Oxaa make sure read data from GPIO pin delay d_time outportb GPIO_Base OxOf make sure read data from GPIO pin delay d_time out
14. ect W83697 logic device 8 write 0x07 to port 2e to point W83697 CR 07 write 0x08 to port 2f to select logic device 8 2 outportb 0x2e 0x07 outportb Ox2f 0x08 Step3 Disable WDT write Oxf4 to port 2e to point W83697 CR f4 write 0x00 to port 2f to set time out time in W83697 2 outportb 0x2e Oxf4 outportb Ox2f 0x00 Step4 Exit W83697 extended function mode write Oxaa to port 2e Re outportb 0x2e Oxaa asm sti int main void int key show_title while 1 key getch switch key case 1 enable WDT break case 2 retriggle WDT NAD 2075 User s Manual 32 break case 3 disable_WDT return 0 default break show_title NAD 2075 User s Manual 33 Chapter 3 Operation Guide 3 1 Brief Guide of DAD 2020 PPAP 2020 is a Communication Appliance computing board based on VIA VT8237R chipset technology PPAP 2020 has four five on board LAN ports to serve communication appliances such as Firewall which needs four Ethernet ports to connect external network internet demilitarized zone and internal network Different I O management policies can be applied respectively to individual network to achieve the highest security level The target market segment is communication appliance including Virtual Private Network Load Balancing Quality of Service Intrusion Detection Virus Detection Firewall and Voice Over IP This PPAP 2020 system board i
15. ent Input 100 240V Output 15V 4A Five RealTek 8100C 10BASE T 100BASE TX Fast Ethernet controller with RJ 45 interface Five RealTek 8110SC 32 bit Gb Ethernet controller with RJ 45 interface Support on board hardware monitor for CPU fan System fan System voltages Operating Temperature 5 C 40 C Storage Temperature 0 C 70 C Relative Humidity 5 95 non condensing 214mm L x 225mm W x 52mm H NAD 2075 User s Manual 8 29 Hardware Configuration Setting This section gives the definitions and shows the positions of jumpers headers and connectors All of the configuration jumpers on PPAP 2011 are in the proper position The default settings set by factory are marked with a star x Jumpers In general jumpers on PPAP 2020 system board are used to select options for certain features Some of the jumpers are configurable for system enhancement The others are for testing purpose only and should not be altered To select any option cover the jumper cap over Short or remove NC it from the jumper pins according to the following instructions Here NC stands for Not Connected NAD 2075 User s Manual 9 PPAP 2020 Jumper Table PPAP 2020 ZR4 jumper setting default setting JP1 By pass and normal mode NAD 2075 User s Manual 10 JP1 amp J17 pin Header a a 6 5 4 3 2 1 JP Funtin pres on default at Normal mode m
16. h PROMP Str5 db and can be cleared by an VT8235 GPO31 High1 Low High2 pulse Odh 0ah PROMP Str6 db Odh Oah PROMP Str7 db Hight 30us High level Odh 0ah PROMP_Str8 db Low 30us Low level Odh Oah PROMP Str9 db High2 High level again and no level change from now on Odh 0ah PROMP StrA db Odh Oah PROMP rst2df db Odh Oah Press the Reset to Default button and then release it for the test NOW PROMP anykey db Odh 0ah Ready If yes then Press any key to start test PROMP err1 db Odh 0ah Reset to Default F F Initialization Failed Ogh Oah PROMP erri 1 db This may be a H W error or Reset to Default button has ever been pressed Odh 0ah PROMP err2 db Odh Oah Reset to Default event latched by F F Failed Odh Oah PROMP err3 db Odh 0ah Clear Reset to Default F F status Failed Ogh Oah PROMP TEST OK db PPAP 2011 RESET TO DEFAULT test OK gt gt Odh Oah PROMP TEST fail db PPAP 2011 RESET TO DEFAULT test FAIL gt gt Odh Oah PROMP Qkey db Odh 0ah Press Q key to stop test and return to DOS or other key to go on next test debugtesting db Odh Oah This is for debugging only gt gt gt gt gt Odh Oah ERROR CODE db PM IO BASE dw code programstart mov ax data mov ds ax lea dx PROMP 2 CR LF mov ah 09h int 21h lea dx
17. l be asked to enter password Do not type anything and simply press Enter it will disable security Once the security is disabled the system will boot up and user can enter Setup freely Zp OS Select for DRAM gt 64MB Select the operating system that is running with more than 64MB of RAM on the system The choice Non OS2 OS2 Console Redirection Set the UNIX Console redirect to the terminal from COM1 The choice Enabled Disabled amp Baud Rate Set the RS 232 baud rate speed The choice 9600 19200 38400 57600 and 115200 Advanced Chipset Features This section allows user to configure your system for AT clock DRAM timings NAD 2075 User s Manual 22 Integrated Peripherals Onboard LAN BootROM Phoenix RuardBIOS vu DP An Energy Star Ally Copyright C 1984 2083 Phoenix Technologies LTO Prouentia BIOS GX3082 Version Al 8 W TB 11212006 Main Processor VIA C7 88GHz 180x18 8 Memory Testing S835648K OK BM shared memory DDA DIMM Speed 533 DDR DIMM Data Width B4 Bit Single Channel IDE Channel Master None IDE Channel A Slave None IDE Channel Master None IDE Channel Slave None Press TAB to enter SETUP by Terminal Press L to Boot From LAN ar press any other key to boot normally User can press L for boot from LAN 2 12 Reset to Default Sample Code information For PPAP 2020 RESET to Default testing By Frank Hsu 12 22 2004 Re
18. learance required NAD 2075 User s Manual 3 A3 The Chassis The system is integrated in a customized chassis Fig 2 1 Fig 2 2 On the front panel you will find the Power LED Hard Disk LED and LAN LED The back panel has Five LAN ports and a COM port Fig 2 2 Back view of the Chassis Fig 2 1 Front view of the Chassis 2 4 Open the Chassis 1 Take off the four screws three at the rear side and two at the right left side and remove the top lead Fig 2 3 Fig 2 3 Take off two screws 2 The top lead Fig 2 4 can be removed from the base stand Fig 2 5 Fig 2 4 The top lead 2 5 Install or Remove a SODIMM NAD 2075 User s Manual 4 Follow these steps to upgrade or remove RAM module 1 Install the system memory by pulling the socket s arm and pressing it into the slot gently Fig 2 6 2 7 8 Fig 2 6 The memory slot Fig 2 7 Install SODIMM 2 Press down sodimm into slot Fig 2 8 Fig 2 8 completes installs the memory Eject a SODIMM module NAD 2075 User s Manual 5 2 6 Remove and Install Batte 1 Press the metal clip back to eject the button battery Fig 2 9 2 Replace it with a new one by pressing the battery with fingertip to restore the battery Fig 2 10 Ss d SR E Mee CN CN Fig 2 9 Eject the battery Fig 2 10 Restore the battery 2 7 Install Compact Flash
19. n next test Carry gt test failure gt error message display lea dx promp_err2 mov ah 09h int 21h or ERROR CODE 02h ERROR CODE Du P1 call KB Wait t2 end okay test t3 start Clear RST2DF F F GPO31 write 1 0 1 Write GPO31 1 0 1 start call IODELAY io delay mov dx PM IO BASE add dx 4Fh in al dx Read the byte data first or al 80h GPO31 P1 first out dx al call FIXDELAY 30 us delay and al 7Fh output GPOS1 PO then out dx al call FIXDELAY 30 us delay or al 80h GPO31 P1 Finally out dx al A o Write GPO31 1 0 1 end mov dx PM_IO_BASE add dx 4Bh in al dx BT ax 0 jc okay test3 Carry gt GPI24 1 NAD 2075 User s Manual 27 no error message display lea dx promp_err3 mov ah 09h int 21h or ERROR CODE 04h t3 end okay test3 cmp ERROR CODE 00h je test ok test fail lea dx PROMP 2 CR LF mov ah 09h int 21h lea dx promp TEST fail mov ah 09h int 21h jmp return to dos test ok lea dx promp TEST OK mov ah 09h int 21h return to dos mov ah 4ch Return to DOS int 21h IODELAY PROC near push ax push dx mov dx 0edh in al dx jmp 42 mov dx 0edh in al dx pop dx pop ax ret IODELAY ENDP KB wait PROC near push ax push bx push cx push dx lea dx PROMP_Qkey mov ah 9 Display Q key prompt NAD 2075 User s Manual 28 int 21h xor al al WAIT_KB mov ah 1 int 21h cmp al 0 je WAIT_KB cmp al 51h
20. nnection Description New Connection Enter a name and choose an icon for the connection Connection Using Hyper Terminal If users use a headless NAD 2075 which has no mouse keyboard and VGA output connected to it the console may be used to communicate with NAD 2075 To access NAD 2075 via the console Hyper Terminal is one of the choices Follow the steps below for the setup Execute HyperTerminal under C Program Files Accessories HyperTerminal 2 Enter a name to create new dial AE S port Enter details for the phone number that you want to dial Country code Area code United States of America 1 E Phone number Connect using Direct to Com z COM1 Properties Port Settings 3 For the connection settings make it Direct to COM1 Connect To 21 x Bits per second Data bits x Parity Stop bits ho gm Elow control Hardware Advanced Restore Defaults et NAD 2075 User s Manual 5 Turn on the power of NAD 2075 after following screen was shown e port HyperTerminal nf x File Edi View Call Transfer Help L Connected 0 00 15 Auto detect Auto detect SCROLL CAPS MUN Jon 6 You can then see the boot up information of NAD 2075 Phoenix AwardBIOS v6 8PG An Energy Star Ally Copyright C 1984 2883 Phoenix Technologies LTD Portuell Inc PPAP 2 2 UL BIOS Rev PI DRUI TB B1B22007 Main Processor
21. ode selection is S W programmable Power on default at Bypass mode mode selection is S W programmable Always at normal mode 7 1 3 2 4 short K 4 6 short kee a 3 5 2 4 short JP2 CMOS Clear 1 2 Short Normal Operation x 2 3Short Clear CMOS Contents J10 Reset to default function J10 Function 4 2Short RESET TO DEFAULT Normal mode Connector Function J1 J5 LAN LED J7 CPU FAN connector J8 IDE connector J9 5V amp 12V power connector only output J10 RESET TO DEFAULT J13 SYS FAN connector J14 8 bit GPO LED connector J15 HDD LED Power LED NAD 2075 User s Manual 71 J17 By pass LED J18 VGA connector J19 COM 2 connector J21 J24 RJ45 connector J26 J27 USB connector J30 COM 1 connector J31 PICMG 1 0 connector Pin Assignments of Connectors SW1 System reset I RST SW Ground J7 J13 Fan power connector 12V RPM signal J14 8 bit GPIO connector define Signal Name Signal Description Signal Description Signal Name GPIO GPIO GPIO GPIO Ground Signal Name Signal Name J18 VGA connector define Signal Name Signal Name RED DDCCLK GREEN Ground BLUE DDCDATA HSYNC Ground VSYNC N C NAD 2075 User s Manual 12 J21 J22 J23 J24 J25 Ethernet5 RJ 45 J19 Se
22. portb GPIO_Base Oxf0 make sure read data from GPIO pin delay d_time outportb GPIO_Base 0x00 make sure read data from GPIO pin printf nTEST Finish return 0 2 14 WDT Sample Code information K W83697 WDT DEMO PROGRAM File Name 697 WDT C Write by John Ma include lt stdio h gt include lt conio h gt NAD 2075 User s Manual 30 include lt dos h gt unsigned char time_out recode WDT time out value void show_title void clrscr printf n nPortwell Inc W83697HF WDT DEMO PROGRAM V1 00 n n printf 1 Set WDT Time out value and Enable WDT n printf 2 Retriggle WDT n printf 3 Disable WDT and Exit n printf n nPress 1 3 void enable WDT void printf n nPress number 1 255 to select time out time second scanf d amp time_out asm cli Step1 Enter W83697 extended function mode write 0x87 to port 2e twice outportb 0x2e 0x87 outportb 0x2e 0x87 Step2 Select W83697 Pin119 to be WDTO write 0x29 to port 2e to point W83697 CR_29 write Ox20 bit6 5 to port 2f to select WOTO outportb 0x2e 0x29 outportb Ox2f 0x20 Step3 Select W83697 logic device 8 write 0x07 to port 2e to point W83697 CR 07 write 0x08 to port 2f to select logic device 8 outportb 0x2e 0x07 outportb Ox2f 0x08 Step4 Enable Logic device 8 write 0x30 to port 2e to point W83697 CR_30 write Ox1 to port 2f to enable 2
23. rial port 2x5 shrouded interface connector connector COM2 Signal Description PINNo Signal Description N Ss dai DCD Data carrier detect EE EAE DSR Data set ready C a RXD Receive data N N TC N a RTS Request to send LAN MDO LAN MDO ft Y nop t C C E s O Transmit data 6 CISOeatsed 8 RiRmgmdewo s GND Ground 10 Ke Not connected LAN MD1 LAN MD1 Pp NC p xi ope i 7 E LAN MD1 LAN MDi NO ACTIVER UNK UNI LN QGround QGround J8 IDE1 2x20 shrouded connector Signal Description PINNo Signal Description Host data 8 24 Ground Ground 3 AMy O N NAD 2075 User s Manual 13 J30 Serial port D SUB9 connector COM1 PINNo Signal Description mE EI Data Carrier Detect DCD 2 Receive Data RXD 3 Transmit Data TXD 4 Data Terminal Ready DTR ou n Ground GND 6 Data Set Ready DSR Request to Send RTS 8 Clear to Send CTS HEC eR Ring Indicator RI J26 J27 Dual USB port connector PIN No Signal Description PIN No Signal Description 4 Gem USBDO USBD1 m amp J33 power off bypass function JP33 1 5 2 6 3 7 4 8 Enable power off bypass function Short 1 5 2 6 3 7 4 8 Disable power off bypass function Open NAD 2075 User s Manual 14 2 10 Use a Client Computer es Co
24. s eligible with VIA Eden processor EBGA package Eden Esp8000 and On board 256Mb or higher DDRAM The enhanced on board PCI IDE interface supports 1 drive up to PIO mode 4 timing and Ultra DMA 100 synchronous mode feature The on board super I O chipset integrates two serial ports driven by two high performance 16550C compatible UARTs to provide 16 byte send receive FIFOs Besides the two Universal Serial Bus ports provide high speed data communication between peripherals and PC The on board flash ROM is used to make the BIOS update easier The high precision Real Time Clock Calendar is built to support Y2K for accurate scheduling and storing configuration information All of these features make PPAP 2020 excellent in stand alone applications If any of these items is damaged or missing please contact your vendor and save all packing materials for future replacement and maintenance e e e e E NAD 2075 User s Manual 34 3 2 System Architecture The following illustration of block diagram will show you how PPAP 2011 gives you a highly integrated system solution The most up to date system architecture of PPAP 2011 includes two main chips It contains VIA CN700 and VIA VT823R to support VIA C7 processor DDR2 SODIMM USB 2 0 port communication Ultra DMA 100 IDE Master and SATA storage The on board super VIA VT8237R supports two UARTs and hardware monitoring PPAP 2020 has built in onboard VIA C7 processor EBGA package Eden C
25. set to default status can be read from Via VT8235 GPI24 After Power On reset GPI24 high 1 normal state If Reset to Default RST2DF Button J14 pressed Triggered then GPI24 will be latch to low O RST2DF register can be set to high by VT8235 GPO31 Write a pulse timing High1 low high2 to set RST2DF to 1 High1 output GPO31 high and keep 30 us Low output GPO31 low and keep 30 us High2 output GPO31 high again and keep high always Programming Guide PG Step1 Set VT8235 Pin AER to GPI24 B0 D17 F0 Offset E6h BitOPO Set VT8235 Pin AC6 to GPO31 B0 D17 FO Offset E6h Bit7P1 Let GPI24 non invert gt BO D17 FO Offset EOh Bit4PO Let GPI31 TTL output gt BO D17 FO Offset E7h Bit7P1 PG Step2 Get PM IO BASE from B0O D17 FO Offset 89h 88h PG Step3 Get GPI24 status from bitO of IOPORT PM IO BASE 4Bh Output GPO31 to bit7 of IOPORT PM IO BASE 4Fh MODEL small 386 STACK 200h NAD 2075 User s Manual 23 data PROMP1 DB PORTWELL PPAP 2011 2011RSTD exe V1 00 12 22 2004 All rights reserved PROMP1_1DB For PPAP 2011 Reset to Default test 13 10 PROMP 2 CR LE db ODh 0Ah 0Dh OAh PROMP Str1 db Reset To Default status latched by a F F Odh 0ah PROMP Str2db This status bit 1 gt Normal _ Odh Oah PROMP Str3db This status bit 0 gt RST2DF button J14 has been pressed Odh 0ah PROMP Str4db This status bit can be read by VT8235 GPI24 Odh 0a
26. tioned below applies to the whole system unless specially stated NAD 2075 provides the essential components for delivering optimal performance and functionality in the value communications appliance market segment This manual should familiarize you with NAD 2075 operations and functions NAD 2075 family has one two or five on board Ethernet ports to serve communication appliances such as Firewall which needs more Ethernet ports to connect external network internet demilitarized zone and internal network NAD 2075 features e Versatile networking and I O capabilities 1 4 or 5 Ethernet ports One COM ports e One miniPCI slot Onboard 256MB RAM Up to 512 Mbytes or 1Gbytes of DDR2 memory 1 2 Manual Organization The manual describes how to configure your NAD 2075 system to meet various operating requirements It is divided into three chapters with each chapter addressing a basic concept and operation of this whole system Chapter 1 Introduction This section briefly talks about how this document is organized It includes some guidelines for users who do not want to read through everything but still helps you find what you need Chapter 2 Hardware Configuration Setting and Installation This chapter shows how the hardware is put together including detailed information It shows the definitions and locations of Jumpers and Connectors that you can easily configure your system Descriptions on how to properly mount the main memory
27. to enter Setup but fail to respond before the message disappears please restart the system either by first turning it off and followed by turning it on COLD START or simply press the RESET button WARM START press lt Ctrl gt lt Alt gt and lt Delete gt keys simultaneously will do too Unless you press the keys at the right time the system will not boot an error message will display and you will be asked to do it again When no setting is stored in BIOS or the setting is missing a message Press lt F1 gt to run Setup will appear Then press F1 to run Setup or resume HIFLEX BIOS Setup You can use the keyboard to choose among options or modify the system parameters to match the options with your system The table shown on next page will show you all of keystroke functions in BIOS Setup Keys to navigate within Setup menu Key Function Up 1 Move to the previous item Down i Move to the next item Left gt Move to the item on the left menu bar Right Move to the item on the right menu bar Enter the item you desired Increase the numeric value or make changes Decrease the numeric value or make changes Increase the numeric value or make changes Decrease the numeric value or make changes Main Menu Quit and not save changes into CMOS Status Page Setup Menu and Option Page Setup Menu Exit current page and return to Main Menu General help on SETUP navigation keys Load previous
28. to select the system s default speed boot up sequence keyboard operation shadowing and security Screen Shot Phoenix Award BIOS CMOS Setup Utility Phoenix AwardBIOS CMOS Setup Utility Advanced BIOS Features SSS SSS St Se SS eS Sere SSS SS SS SS SSS SI Se SS eS SS CPU Feature x Hard Disk Boot Priority Virus Warning CPU Li amp L2 Cache a Press Enter Disabled Enabled Menu Level Enabled Enabled USB FDD USB COROM d I i i CPU L2 Cache ECC Checking i Quick Power On Self Test i First Boot Device i Second Boot Device i Third Boot Device Hard Disk i Boot Other Device Disabled i Boot Up NumLock Status On i Typematic Rate Setting Disabled i i i i i i F Typematic Rate Chars Sec Typematic Delay Msec eb Security Option Setup MPS Version Control For D5 1 4 0S Select For DRAM gt 64MB Console Redirection Baud Rate Zeeche ee ee ee SS ee Sti F5 Previous Values F6 Fail Safe Defaults Non 052 Enabled 7 Optimized Defaults Internal Cache External Cache These two categories speed up memory access However it depends on CPU chipset NAD 2075 User s Manual 20 design Enabled Enable cache Disabled Disable cache R J Quick Power On Self Test This category speeds up Power On Self Test POST after you power up the computer If itis set to Enable BIOS will shorten or skip some check items during POST Enabled Enable quick POST Disabled

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