FS4438 DPv1.2 State Analysis Probe User Manual
Contents
1. O O O O O O O O O O O lA O O O O O O O O O O O O oO Vertical Audio Copy Mgmt Pkt _ Horizontal ISRC Packet Vertical ISRC Packet Horizontal VSC Packet Vertical VSC Packet Horizontal Ext Packet Vertical Ext Packet Horizontal Info Frame Vertical Info Frame Horizontal Reserved Vertical Reserved O O O S O O O O OI O O O O O O Event Code symbol definitions in MST Event Code Symbol Bit 7 Bit 6 Bit Bit Bit Bit Bit 1 Bit 0 5 4 3 2 FO Pixel 1 0 0 0 1 0 0 0 F1 Pixel 1 1 0 0 1 0 0 0 BS 0 X 0 0 1 0 1 0 SR 0 X 0 0 1 0 1 1 Horizontal SR 0 0 0 0 1 0 1 1 Vertical SR 0 1 0 0 1 0 1 1 Horizontal BE 0 0 0 1 0 1 0 1 Unknown 0 0 0 0 0 x 0 0 Training TP1 0 0 0 0 0 x 0 1 Training TP2 0 0 0 0 0 X 1 0 Training TP3 0 0 0 0 0 X 1 1 Horizontal VBID 0 0 0 0 1 0 0 1 Vertical VBID 0 1 0 0 1 0 0 1 Horizontal MVID 0 0 0 0 1 1 0 02. n Period ar Frequency en Positive rm Negative Tu Duty Cycle FL Duty Cycle Positive ir Negative 5 Pulse Width Pulse Width Channel to Enable All Disable All Delete All Recalc Measurements Trigger For Help press 1 Tektronix Viewing MST in listing window In order to provide an uncluttered display of each virtual channel it is best to enable a filter in the listing window to show only the virtual channel the user is interested in Each of the support packages for MST has pre defined filters that can easily be enabled EJ ILA 192 108 1207 File Edit View Data System Tools Window Help m Wi Explorer gt Il Setup iB Trigger v Waveform 2 Listing 1 Idle S H Analysis iVerify 191 Define Compare j mu 9 UE 2 amp amp Activity F Threshold 17 View Compare A 6 At Cursor 2 Os i 5isplayport 1 2 5 Add Column Add LA Data Measurement Expand Channels Collapse Channels Cut Column Ctrl X Copy Column Ctrl C Paste Ctrl V Delete Column Rename Search Forward Search Backward Ctri B Define Search Search Definitions Apply Filter 4 DisplayPort 1 2 MST 54 VC 1 Remove Filter 5 DisplayPort 1 2 MST 54 VC 2 Define Filter DisplayPort 1 2 MST 54 VC
3. USBXpresslnstaller exe file on the CD provided in the Documentation package Insert the CD into the computer that will be used to control the FS4438 probe This computer must have a USB connection Using Windows File Manager Run the USBXpressInstaller exe by double clicking it and following the subsequent directions that follow Similarly the DisplayPort12 probe manager 7 exe if you are running Windows XP then select the DisplayPort12 probe manager XP exe file can be installed by double clicking the appropriate program on the CD which initiates the installation software on the computer and places an icon on the desktop Follow the directions that follow including agreeing to the license terms once the software installation is complete click on finish To start the program manager simply double click its desktop icon The Probe Manager application detects all FS4438 probes that are connected to the USB bus and allows the user to select which preprocessor will be controlled by the current instance of the Probe Manager application from the initial screen as seen below BE Display Port 1 1 File Edit Run Stop Help r gt Run Stop Probe Config Non Uniform Pixel Filters Log pita Select Probe The user configures and controls the preprocessor from the main form which is composed of a menu bar a tool bar and a status message bar The menu bar provides options that allow the user to configure and run the prob
4. Data 0 Add Measurement Drag and Drop Eu Period Eu Frequency en Positive rm Hegative Duty Cycle Duty Cycle 1 Positive Negative Pulse Width Pulse Width Statistics Channel to Measurements Trigger For Help press F1 The FS4438 Disassemblers will perform the following functions Decode all DP or AUX protocol data Color code the transaction type The colors used by the software are as follows o Main Stream Attributes Green o Secondary Data Packets Blue o Allother states White o AuxPort Source initiated Green In order for the FS4438 Main Link DP Disassembler to decode the pixel data they must be set to the proper Pixel Width which is found in the Properties tab of it s column heading Properties of the Dis assembler In order for the dis assembler to properly decode the captured data the properties need to be set correctly If you are capturing MST traffic you must set the mode of the dis assembler for MST mode and select the stream that you want to decode If running in SST mode select SST mode In addition to setting the mode you must set correct pixel format as well as Bits per pixel setting To access the properties for the dis assembler from the listing window right click on the Mnemonics column and select Properties a window should pop up like the one below then select the Disassembly tab Once all selections have been made click OK to apply the set
5. ojojojojo O OS O O O O O O S S O OoOO Vertical Blanking Extension 0 0 1 1 0 1 1 0 0 Extension 0 0 X 1 0 1 1 0 0 Vertical Blanking Info Frame 0 0 1 1 1 0 0 0 0 Info Frame 0 0 X 1 1 0 0 0 0 Training 1 X X X X X X X X v1 2 SST mode Logic analyzer signals per pod Field Bits Definition Pod Bits Storage 1 17 store A4 16 Error bits 2 0 3 Error bits 15 13 Probe Mode 1 1 Probe is in DP1 2 mode 12 VC Tag 2 0 3 Virtual Channel tag bits 11 9 000 Probe is in SST Mode Pixel Not Recognizer 1 1 Pixel is detected with wrong color 8 Event Code 8 Describes current state or packet type 7 0 not applicable 6 not applicable bits are driven low A3 16 11 LOS 3 2 1 0 4 1 lane loss of signal 10 7 Lane 0 Invalid 1 1 8b10b error 6 Lane 0 Command 1 1 Control symbol 0 Data symbol 5 Lane 0 Data 7 3 5 8b decoded value 4 0 Lane 0 Data 2 0 3 8b decoded value A2 16 14 Lane 1 Invalid 1 1 8b10b error 13 Lane 1 Command 1 1 Control symbol 0 Data symbol 12 Lane 1 Data 7 0 8 8b decoded value 11 4 Lane 2 Invalid 1 1 8b10b error 3 Lane 2 Command 1 1 Control symbol 0 Data symbol 2 Lane 2 Data 7 6 2 8b decoded value 1 0 Lane 2 Data 5 0 6 8b decoded value 1 15 10 Lane 3 Invalid 1 1 8b10b error 9 Lane 3 C
6. We have seen significant sensitivity on HBR2 links to Source settings and the cable used between the Source and Sink We recommend the following steps if Lane LEDs are Orange 1 Use the 2m DP DP cable provided by FuturePlus with the FS4438 2 Increase the HS lane signal swing from the DP source 3 Adjust the Serdes settings in the Probe Configuration form of the Probe Manager The FS4438 should show a green Signal LED of any Link being probed Configure the analyzer trigger menu to acquire data Select RUN and as soon as there is activity on the bus the logic analyzer will begin to acquire data The analyzer will continue to acquire data and will display the data when the analyzer memory is full the trigger specification is TRUE or when you select STOP The following shows the Logic Analyzer Overview screen for MST operation with 4 Virtual Streams defined 4 Stream is the maximum of streams that can defined There are 5 State Listings defined 1 MST Listing This shows an integrated view of all streams on the HS links Each state is labeled by it s Stream and has it s own Event and Error codes This view is not completely time correlated with the sequence of events on the probed link because of the processing skews associated with the of Time Slots defined for each stream 2 Probe Stream Listings 1 4 These listings display only the information associated with a particular Virtual Stream Each listing has its own filter ap
7. You can do offline analysis on a PC if you have the TLA7xxx operating system installed on the PC if you need this software please contact Tektronix Offline analysis allows a user to be able to analyze a trace offline at a PC so it frees up the analyzer for another person to use the analyzer to capture data In order to view decoded data offline after installing the TLA7xxx environment on a PC you must install the FuturePlus software Please follow the installation instructions for Setting up TLA7xxx analyzer Once the FuturePlus software has been installed follow these steps to import the data and view it From the desktop double click on the Tektronix TLA icon When the application comes up there will be a series of questions answer the first question asking which startup option to use select Continue Offline On the analyzer type question select Cancel When the application comes all the way up you should have a blank screen with a menu bar and tool bar at the top Open the tla file using the File Load System menu selection and browse to the desired tla file uso BRS m Probe Manager Application The USBXpress drivers must be installed before the probe manager GUI program can be installed The drivers can be installed by running the USBXpresslnstaller exe program that is located on the CD provided in the Documentation packet The USBXpress drivers installation software can be found as
8. 3 Filter Definitions DisplayPort 1 2 MST 54 VC 4 Radix TimeStamp Resolution 4 Properties To enable a filter right click on any column of the listing window on the pop up window select Apply Filter then select any of the 4 filters that appear to the right When VC_1 is chosen the only data that will be shown in the listing window will be data from virtual channel 1 The user can add 3 more listings and apply the appropriate filter to each listing to view all 4 virtual channels in their own listing window The following is an example listing screen showing the protocol decode provided by the Disassembler for AuxPort isting Fie Edit view Data System Tools Window Help 1 xl 1 342 00103 343 00000 00000 Aux ACK A 345 58 fux MK 00100 1 Pluggd b SERES EEES 01111 359 00102 Symbol files mterlane align done 0 1111 Downstream port status changed 1 01111 cc Link status updated 1 TRATNING LANE 3 SET Training Patt 1 Volt swing level 0 Max Swing Reached 1 Training Patt 2 with Pre emphasis level 3 Max Pre emphasis Reached 1 Data bytes written TIT z 00001 1 PTuggd 00 375 7 00200 1 Bugged 49 150 Lane c Doria n Channel EQ Done LaneO Symbol locked Lanel CR Done 0 Lanel Channel EQ Done Lanel Symbol locked LANE 2 AND 3 STATUS Lane2 C
9. 3 Once all the above files have been installed connect the FS4438 to the analyzer computer via the USB port Power on the FS4438 probe Once all the previous steps have completed all necessary software as well as USB drivers will be installed This procedure only needs to be done on initial install You may now go to the desktop and click on the DisplayPort 1 2 icon to start the probe manager If you are installing on a PC to only control the FS4438 then you can omit the installation of the FS1194 and AUX exe but you must follow the rest of the steps For instructions on loading system files please refer to the section on loading system files later in this manual Connecting the Tektronix logic analyzer to the FS4438 The FuturePlus Systems FS4438 connectors are designed to use FS1055 cables to connect to the module connectors on the appropriate Tektronix logic analyzer cards as shown below DP 1 2 Main Link DP 1 2 Main Link DP 1 2 Aux X1 X2 X4 X1 X2 X4 Channel lt 2 7 GB s 5 4 GB s FS4438 FS4438 FS4438 Max Enn put 270 MHz 540 MHz 67 KHz Frequency Channels 68 68 68 Required TLA7AAx 1 TLA7AA4 Not Supported 1 ea 7 or TLA7ACx 1 ea TLA7AAM 235 MHz 1 ea TLA7AC3 or 1 ea TLA7ACA 235 MHz TLA7BBx 1 TLA7BB3or 1eaTLA7BB3or 1 TLA7BB3 or TLA7BBA 750 MHz TLA7BBA 750 MHz 1 ea TLA7BBA 750 for 1 62 Gb s or 2 7 for 1 62 Gb s or 2 7 MHz Gb s Gb s TLA7NAx Not Supported Not Supported Logic A
10. Framework must be on the system for the Probe Manager application to load properly FS4438 probe This preprocessor requires its own DC power supply which is provided Additionally this preprocessor is completely initialized set up and controlled by the Probe Manager software that resides on a Windows based system either stand alone PC or logic analyzer All communication to the FS4438 preprocessor is by means of the USB port on the PC or logic analyzer Improper or incomplete installation of either the correct USB driver or the Probe Manager software will prevent operation of the FS4438 3 Tektronix Logic Analyzer The System Support files for the logic analyzer are on a CD FS1194 and AuxPort1_ 2 Install these files either for Windows XP or 7 as required and follow the instructions for logic analyzer module card interconnections and logic analyzer connections to the FS4438 probe FS1055 cables are required for connection of the FS4438 to the TLA modules 4 Target platform There are several requirements of the DP platform in order to assure that the FS4438 can successfully probe the target s DP link with minimal impact to the link and errors seen at the probe These requirements are discussed in the Probe Cables section There are two probing cables FS1041 interposer or Flying Lead There are link attributes such as lane inversion data scrambling and lane reversal which need to be defined in the Probe Manager in order for the pre
11. If the customer does not contact FuturePlus Systems within 30 days of the receipt of the product it will be said that the product has been accepted by the customer If the customer is not satisfied with the FS4438 they may return the FS4438 within 30 days for a refund For products returned to FuturePlus Systems for warranty service the Buyer shall prepay shipping charges to FuturePlus Systems and FuturePlus Systems shall pay shipping charges to return the product to the Buyer However the Buyer shall pay all shipping charges duties and taxes for products returned to FuturePlus Systems from another country FuturePlus Systems warrants that its software and hardware designated by FuturePlus Systems for use with an instrument will execute its programming instructions when properly installed on that instrument FuturePlus Systems does not warrant that the operation of the hardware or software will be uninterrupted or error free The foregoing warranty shall not apply to defects resulting from improper or inadequate maintenance by the Buyer Buyer supplied software or interfacing unauthorized modification or misuse operation outside of the environmental specifications for the product or improper site preparation or maintenance NO OTHER WARRANTY IS EXPRESSED OR IMPLIED FUTUREPLUS SYSTEMS SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE THE REMEDIES PROVIDED HEREIN ARE BUYER S SOLE AND EXCLUS
12. Trigger FDI Fie Edit View System Tools Window Help 1818 l l lalm al Trigger form Listing pe Status Idle GD 010 118 stt xalal Storage Conditional z Force Main Prefill Trigger Pos Es MagnVu 1255 gt MagniVu Trigger Pos n Storage If Group Storage 1 Run Then Store Sample State 1 Trigger on the very first sample If Group LaneO_10Bits BS Then Trigger Clause Definition FDI State 1 1 If Group 10Bit 7 m i Group Radix Symbolic Symbol File Symbol File c Nprogr Mane_decode tsf Y For Help press F1 Event Name optional Gysharet on 180542 GyRemovable Disk E IS som e Remember to always use Conditional Storage This is because the preprocessor clock is free running and the Storage bit is used to qualify what is sent to the logic analyzer modules There is a separate storage bit for HPD HPD Valid e The Event Code field makes it easy to trigger on particular packet types To capture specific traffic use the channel signals that can assist in identifying the activity that you want to capture For example to capture training use the channel TRAIN which goes high during training activity Turning off descrambling when looking at training will properly display the K characters Triggering with MST t
13. provides trigger and filtering functions The dis assembler software running on the logic analyzer provides information regarding the transactions within the captured traffic The FS4438 product consists of the following accessories e The FS4438 preprocessor power supply and cable e Protocol Disassemblers FS1194 and AuxPort1_2_Tek DP v1 2 Probe Manager application and USB driver application on a CD for either Windows XP or 7 e AUSB cable is provided for connecting the FS4438 preprocessor to the Windows machine that the Probe Manager is loaded on 1 DisplayPort cable 2m to be used between the DP source or FS1041 interposer and the DP sink We STRONGLY recommend the use of this cable as it has been carefully tested to insure it will not disturb signal integrity at HBR2 data rates e This User Manual and Quick Start sheet The minimum equipment required for analysis of a DP consists of the following equipment e Tektronix logic analysis frame with logic analysis modules e FS1055 cables for connection of the FS4438 to the TLA modules e A DPI target bus Probing System Overview The architecture of the FS4438 preprocessor and the design of the DP link to be probed should both be thoroughly understood before attempting to use the probe The following is a general outline of the steps to be taken when probing a new link Read the following pages for more specific information The FS4438 preprocessor requires the und
14. value 4 0 Lane 0 Data 2 0 3 8b decoded value A2 16 14 Lane 1 Invalid 1 1 8b10b error 13 Lane 1 Command 1 1 Control symbol 0 Data symbol 12 Lane 1 Data 7 0 8 8b decoded value 11 4 Lane 2 Invalid 1 1 8b10b error 3 Lane 2 Command 1 1 Control symbol 0 Data symbol 2 Lane 2 Data 7 6 2 8b decoded value 1 0 Lane 2 Data 5 0 6 8b decoded value A1 15 10 Lane 3 Invalid 1 1 8b10b error 9 Lane 3 Command 1 1 Control symbol 0 Data symbol 8 Lane 3 Data 7 0 8 8b decoded value 7 0 Clock is on A1 bit 16 Event Code symbol definitions mode v1 1a Event Code Symbol Bit 8 Bit 7 Bit 6 Bit 5 Bit Bit Bit Bit 1 Bit 0 Err bits Err bits Video Field Mismatch 0 x _ FO Pixel Ojo 1 0 _ x FO Stuff Data Sym including FS FE 1 0 alo BS SR Content Protection BS BF F1 Pixel F1 Stuff Data Sym including FS FE d d I O gt gt gt x SO O O O O O O Blanking Horizontal Missed SR Hor Blank BE Horizontal Blanking BE Horizontal Blanking VBID Horizontal Blanking MVID V_err Hor Blank MVID Horizontal Blanking MAUD A err Hor Blank MAUD SR Horizontal Blanking
15. Analysis From the system window of the TLA application select a logic analyzer module After selecting the module in the System window either right click the mouse and select Load Support Package or go File gt Load Support Package After clicking Load Support Package a list of installed support packages will appear Select the support package that matches the desired analysis requirements The dis assembler will load along with the system file If you are analyzing more than 1 link simply choose another analyzer module from the system window and select Load Support Package to load the second module A list of Support Packages are as follows FS1194 DisplayPort AuxPort DisplayPort Auxiliary Port The following is an example listing screen showing the protocol decode provided by the Disassembler for DisplayPort Listing 1 8 x Fie Edit view Data System Tools Window Help 81 x el ERES 4 Ell RIA trigger MY waveform fListing Status Tek S 24 E activity ALA of Search amp em 14 875ns Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data Dummy Data n o o o o 3oo0ooooooooooooooooooooooooododoooo oo0oo0o0o0PooooooooooooooooooooHbdooo Add Measurement Drag and Drop Measurements
16. Dummy Horizontal Blanking Audio Stream O O O O 01 O O O O x IO O O x Horizontal Blanking Audio TS _ Horizontal Blanking Reserved ajo Horizontal Blanking Extension ojojo ojojo ojojo alo ojojo ojojo Horizontal Blanking Info Frame 0 0 Blanking Vertical Vertical Blanking BE BE Missed SR Ver Blank BE Vertical Blanking VBID Vertical Blanking MVID V_err Vert Blank MVID MVID Vertical Blanking MAUD MAUD A_err Ver Blank MAUD Vertical Blanking Dummy Dummy Vertical Blanking MSA MSA Vertical Blanking Audio Stream O O O O O O o O O O O O O O O O O O O O O O O O O O A A A O O O O O O O Ol S c O lololo CO O a Sm O O O O x ooox Audio Stream Vertical Blanking Audio TS Vertical Blanking Reserved Reserved Audio TS x gt lt gt gt gt
17. FuturePlus Systems Corporation FS4438 DPv1 2 State Analysis Probe User Manual For use with Tektronix Logic Analyzers Revision 1 0 Copyright 2012 FuturePlus Systems Corporation FuturePlus is a registered trademark of FuturePlus Systems Corporation Howto reach US cie l u SA 3 Product Warranty cacao aao S qa see a aQ SSE ORO AD CR 4 Limitation Of Warranty 4 Exclusive Remedies 4 ECL qc E 4 How to Use This Manial e 5 I froduction 5 EX M 5 Probe Function Overview seen eo ence en nemo eene 6 FS4438 Input Output and Communication in all modes sees 6 Aux Port Processing in all 5 ener SS s q aa Sau aa nasa S 6 Hi speed Link Processing similar functions in all 1 4 6 F nctions unique to DP1 2 SST epi open Re cara panies asawa 6 Functions unique to DPT 2 MST 6 Analyzing the DP Bus iaceo e eU ua rA AR ARE n Ree SEE eva 7 Accessories Supplied u P 7 Minimum Equipment Required 7 Probing System Overview s L a 8 Front Pane ssiciccsssscasesessessscasascassesscnsesvessesovsssoneesuss ocevesecdaes
18. Hot Plug Detect signals 3 02 5 5 SUB SCF 134473 01 DA 4602 010 11 6520 25 RES 0402 3010 F JB 5M o 2 o 30 REF TYP 039 0 99 REF Pin pni Ground Pin II Ground Bin 0 55 REF A few general guidelines about the use of the flying lead cable 1 There is an instruction booklet with the FS1036B cable that provides detail on how to solder the flex pcb to your board Refer to this document 2 Polarity matters Makes sure you know how the and sides of the signal are connected Reversal of polarity can be performed in the Probe manager Configuration screen 3 The ground of the FS1036B is not connected to the target but to the shield of the cable and to the ground of the Preprocessor Users should simulate their system to ensure that the FS1036 will not interfere with the target and the appropriate eye will be presented at the probe tip The model below can be used for this simulation AUX and Hot Plug Detect HPD signals The AUX and HPD signals for DP need to be connected to the FS4438 preprocessor separately from the data link probing cables There are uniquely identified and labeled cables for doing this These must be properly oriented for polarity The DP AUX channel requires a high speed differential connection using a Samtec 050 header where pins 1 and 3 are AUXp and AUXn The HPD signal has its own cable that also connects to a 050 header pin 1 is the signal and
19. IVE REMEDIES FUTUREPLUS SYSTEMS SHALL NOT BE LIABLE FOR ANY DIRECT INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY Product maintenance agreements and other customer assistance agreements are available for FuturePlus Systems products For assistance contact Technical Support How to Use This Manual Definitions Introduction This manual is organized to help you quickly find the information you need e Analyzing the DP Bus chapter introduces you to the FS4438 and lists the minimum equipment required and accessories supplied for DP bus analysis e The State Analysis chapter explains how to configure the FS4438 to perform state analysis on your bus e The General Information chapter provides information on the operating characteristics and cable header pinout for the FS4438 probe The following terms are used to describe aspects of the DP bus e Lane One differential signal 2 wires e Link One set of up to 4 DP lanes The FS4438 handles 1 DP and 1 Aux link e SST Single Stream Traffic MST Multi Stream Traffic Probe Function Overview The FS4438 probe is capable of connecting to DisplayPort links running in any of three modes v1 1a v1 2 SST v1 2 MST at 3 link speeds 1 62 2 7 and 5 4 Gbps FS4438 Input Output and Communication in all modes 8b10b Decode amp serial to parallel conversion of serial links 1 2 and 4 lane to 5 4 Gbps Supp
20. R Done 0 Lane2 Channel EQ Done Lane2 Symbol locked Lane3 CR Done 0 Lane3 Channel EQ Done Lane3 Symbol locked 0 i LANE ALIGN STATUS UPDATED 00110 1i H 5t Trees STATUS Receive Port status out of sync ec sees Port 1 status Sink out of sync RAININ Training Patt Set Training pattern 2 Link Qual Patt Set pattern not transmitted Recovered clock out enable Disabled E oce Disable E un TRAINING LANE O SET Training Patt 1 Volt swing level 0 Max Swing Reached 1 Training Patt 2 with Pre emphasis level 3 Max Pre emphasis Reached 1 TRAINING LANE 1 SET Training Patt 1 welts Max Swing Reached Training Patt 2 with Pre emphasis level 3 Max Pre emphasis Reached 1 TRAINING LANE 2 SET Training Patt 1 Volt swing level 0 Max Swing Reached 1 Training Patt 2 with Pre emphasis level 3 Max Pre emphasis Reached TRAINING LANE 3 SET Training Patt 1 Volt swing level 0 00 125 swing level 0 TLA Aux Listing Probe Mgr SN 2906105 The Support package includes symbol files for the following DP lane data Event Codes AUX channel Commands 10b decode These are separate files that can be loaded to provide more information in the lister or for use in defining triggers Triggering The system files allow logic analyzer based trigger set ups that utilize the pre defined symbols described earlier 1815 WR TLA
21. S4438 module If a failure is suspected in the FS4438 module contact the factory or your FuturePlus Systems authorized distributor The repair strategy for the FS4438 is module replacement However if parts of the FS4438 module are damaged or lost contact the factory for a list of replacement parts
22. These requirements are listed below and described pictorially The shape of the eye as seen by the FS4438 must closely resemble the wave shape shown below Specifically the eye opening must not show a decrease in amplitude prior to reaching the center of the unit interval i d p S ZZ OS Center 0 f the wnt interval Description Specification for Specification for 2 7Gbps 5 4Gbps Min Eye height 175mV 90mV p p at footprint pad 45 UI Jitter 45 UI Jitter Min tolerance of tolerance of ids 0 55Ul 0 55Ul Length Matching Requirements 5mil 5mil Differential Pair Skew tolerated between lanes 24 ns 24 ns of a link Ul 10 00 0 01 1 05 In order for the FS4438 to achieve low error rate for the acquired data the DisplayPort Link the Jitter Spectrum for the target must be within the jitter tolerance shown below Users not adhering to this specification do so with the knowledge that errors may be seen on the FS4438 and incorrect protocol decode could result sweep 2 1 07 1 08 LE 06 Frequency Hz The FS4438 can be configured with different probing cables dependent on what the user requires FS1041 DisplayPort Interposer FS1036B Flying lead probing cable for x1 to x4 link FS1041 DP Interposer cable The FS1041 is a DisplayPort cable interposer that allows for probing of the Disp
23. Vertical MVID 0 1 0 0 1 1 0 0 Horizontal MAUD 0 0 0 1 0 0 0 1 Vertical MAUD 0 1 0 1 0 0 0 1 Vertical MSA 0 1 0 1 1 1 0 0 Horizontal Audio Stream 0 0 1 0 0 0 0 0 Vertical Audio Stream 0 1 1 0 0 0 0 0 Horizontal Audio TS 0 0 1 0 0 1 0 0 Vertical Audio TS 0 1 1 0 0 1 0 0 Horizontal Audio Copy Mgmt 0 0 1 0 1 0 1 1 Pkt Vertical Audio Copy Mgmt 0 1 1 0 1 0 1 1 Pkt Horizontal ISRC Packet 0 0 1 1 0 0 1 0 Vertical ISRC Packet 0 1 1 1 0 0 1 0 Horizontal VSC Packet 0 0 0 1 0 0 1 0 Vertical VSC Packet 0 1 0 1 0 0 1 0 Horizontal Ext Packet 0 0 1 1 1 1 0 0 Vertical Ext Packet 0 1 1 1 1 1 0 0 Horizontal Info Frame 0 0 0 1 0 1 0 0 Vertical Info Frame 0 1 0 1 0 1 0 0 Horizontal Reserved 0 0 1 0 0 0 1 1 Vertical Reserved 0 1 1 0 0 0 1 1 SF X X 1 1 0 0 1 1 VCPF RG X X 1 1 1 0 0 0 MTP Header 0 0 0 1 1 1 1 1 1 MTP Header not SR 0 or 0 0 1 1 0 1 0 0 ACT MTP Header ACT 0 0 1 1 0 0 0 1 Unprocessed VC 0 0 0 1 1 1 0 SST Mode Event Decode occurs when VC Tag 0 The SST Mode Event Decode table otherwise duplicates the MST Mode table The Training Type bits are encoded T 1 0 O indicates symbol error rate measurement pattern T 1 0 1 indicates TP1 T 1 0 2 indicates TP2 T 1 0 3 indicates T 2 is a spare Error detection Error Type DP1 1a Mode SST Mode MST Mode Analyzer Interface Analyzer Interface Analyzer Interface Data Error ErrorBit 2 0 ErrorBit 2 0 No Error 0 000 000 Mismatch 1 001 001 V_
24. ch will be presented 8 bits at a time For the additional bytes the Storage bit will be pulsed as each byte is ready the Command and ADDR Fields will be unchanged Acquiring Data First insure that the FS4438 is attached to its external power supply and configured which would be indicated by a green Ready LED Open up the Probe Manager software and insure the appropriate selections are made and applied finally make sure that the preprocessor is connected via the appropriate cable s to the target system Once connected with the link active open up the Probe Config window and select cable type lane width and reference clock options Verify that lane activity indicators show activity at the correct lanes Run the probe and observe the LEDs Link Status Meaning LED color Green Lane OK Dark Lane not active or Probe stopped Orange Data Invalid 8b10b error Red RX Error loss of sync or PLL lock If a lane s LED is red then there may be a need to select different options for lane width lane reverse or lane inversion in the Probe Config window If a Lane s LED is Orange that indicates some level of Data errors on the link Check Log file for a count of the errors BER for a DP link is specified as 10E 9 which at HBR2 5 4Gbps allows more than 5 errors every second All transient events such as a single bit error or a packet clocked into the analyzer are stretched to short visible pulses on the LEDs
25. ds settings for DFEQ link width lane reverse or lane inversion adjusted in the Probe Config window Depending on the DP target system s data lane signal characteristics such as jitter tolerance Jitter spectrum and BER the user may always see some level of orange LED activity and see the corresponding error counts recorded on the analyzer and in the Probe Error Log Front Panel The connections and features of the FS4438 preprocessor include DC input for provided external AC to DC power supply please note that the use of any other power supply voids the warranty on the FS4438 and USB connections to the Windows PC 169xx analyzer where the Probe Manager software will be loaded Link Probe cable connection for 1 of the probing cables Interposer or FL Logic Analyzer 90 pin pod connections P1 P4 are connections for HS Link and P5 P8 are for AUX link 1 FS1055 cable will connect 2 pods to 1 TLA module connector Cables for connection to AUX and HPD READY LED indicates that the FS4438 Probe firmware is loaded and the probe is ready to capture DP traffic LED indication of Lane status Lane Status Meaning LED color Green Lane OK Dark Lane not active or Probe stopped Orange Data Invalid 8b10b error Red RX Error loss of sync or PLL lock FS4438 Probing Cables Target DP Link requirements The eye requirements are measured by eye height and eye width forming a diamond shape
26. e The tool bar provides options to configure the preprocessor and the status bar displays the probes current status and or any errors that may have been encountered Error messages displayed in the status bar are also logged in the Log Form if logging is enabled The mode selection drop down box gives the user the choice of one of three modes to choose for the probe to run in e DP version 1 1a protocol at either 1 67 or 2 7Gbps link rate e DP version 1 2 Single Stream SST at either 1 67 2 7 or 5 4 Gbps e DP version 1 2 Multi Stream MST at either 1 67 2 7 or 5 4 Gbps BE Display Port 1 1 File Edit Run Stop Help a E3 Run Stop Probe Config Non Uniform Pixel Filters Log DP lla Select Probe DP 1 2 MST The menu bar contains the following options File BE Display Port 1 1 Edit Run Stop Help Load File E Non Uniform Pixel Filters Log Save As Save Exit e Load File Displays an open file dialog in which the user may navigate to and open the file contains a previous session s saved probed settings e Save As Displays a save file dialog in which the user may specify where a preprocessor settings system file may be saved e Exit Shut down the application Edit File Edit Run Stop Help e Modify Title String Allows the user to specify the title string that appears in all sub dialog s title bar This is helpful when running multip
27. e is indicated by an up down arrow symbol and a lack of signal presence is indicated by a flat horizontal line symbol When the probe is in Run mode signal activity is indicated by green or red no activity Selection of Lane Reversal on each link Link Lane Descramble On or Off Hot Plug Cable HPD Connection If Connected is selected then Aux decode requires the HPD signal for operation Selection of Link rate either 1 62 or 2 7 Gbps Selection of Toggle mode When activated the preprocessor output signals to the logic analyzer pods and the link status LEDs are toggled Mode 1 1a Filter a comprehensive suite of predefined filter functions to apply to the high speed Link These filters are state based which means that the event has to occur on all active lanes for it to be filtered Display Port 1 1 Filters E E E Filtering out unwanted traffic such as dummy data symbols can extend the storage capabilities of the logic analyzer Filtering out irrelevant bus traffic can help users focus on specific packets of interest To filter out any particular traffic type click on the appropriate box so a Y appears and click apply You must restart the preprocessor by pressing the green Run button so the new values will be written to the preprocessor hardware When Decode Pixel States is selected in the Protocol Decoder Preferences then you cannot filter Control Symbols Non Uniform Pixel Identifier The pu
28. err MVID Check 1 010 010 A_err MAUD check 1 011 011 Missed SR 1 100 100 Any Invalid NA 101 101 Loss of Sync NA 110 110 Mismatch This error occurs when there when the KChar or configuration fields of the active lanes don t match Checks are made on all KChars and the VBID MVID and MAUD fields V err MVID Check This error is detected when the no video bit is set in the VBID and the MVID field is not 0 A err MAUD check This error is detected when the audio mute bit is set in the VBID and the MVAUD field is not 0 Missed SR In 1 1a or SST mode There is a BE counter on each of the four lanes If 512 BEs are received without receiving an SR on any lane the Missed SR error is asserted In MST mode SR Control Symbol inserted in MTP Header time slot every 1024 MTP as a Link Frame boundary marker resulting in SR insertion interval of 2 16 time slots So every 1024 multi stream transport packet header is replaced with an SR or every 65536 time slot This SR is for a link frame boundary marker Aux Group Aux Port is a half duplex bi directional channel between DisplayPort transmitter source and DisplayPort receiver sink It consists of 1 differential pair transporting self clocked data The AUX CH supports a bandwidth of 1Mbps The DisplayPort Source Device is the master also referred to as AUX CH requester that initiates an AUX CH transaction DisplayPort Sink Device is the slave also referred to as the
29. erstanding and correct set up of 4 different systems before a trace should be taken These systems are 1 Probe Manager software The software has two installation exe programs associated with it one to load the USB drivers needed to establish USB connections between the probe HW and the Probe Manager program and the other is to install the Display Port 1 2 Probe Manager GUI program The USB driver should be installed first All installation programs are located on the CD that comes with the FS4438 The USBXpress software is identified as USBXpressinstaller exe and the Probe Manager software is identified as DisplayPort12 probe manager XXX exe where XXX indicates the PC s OS The Probe Manager GUI program is supported on the Windows XP or Windows 7 OS and has a separate installation program for each OS The appropriate installation program must be executed for the OS on which the program will be loaded onto Install SiLabs Driver Run the USBXpressinstaller exe program that is located on the CDROM disk to install the USBXpress driver that provides the USB connection to the probe HW Install Probe Manager Software On Windows 7 PCs Run the DisplayPort12 probe manager 7 exe program that is located on the CDROM to install the DP 1 2 Probe Manager GUI software On Windows XP PCs Run the DisplayPort12 probe manager xp exe program that is located on the CDROM to install the DP 1 2 Probe Manager GUI software NOTE The Microsoft NET
30. layPort bus between the motherboard Source and the monitor Sink One end of the interposer has a short cable with a DisplayPort connector that will mate with the motherboard The other end of the FS1041 will have a DisplayPort connector that mates with the source device monitor The body of the FS1041 is a board assembly that allows the probing of the high speed Main Link Aux Channel and HPD Aux Channel and HPD have the 3 pin header stake pins described in this document which will mate with the two cables from the FS4438 The high speed Main Link will be tapped and go to a soldered on cable The other end of the cable will go to the FS4438 instrument end header The probe cable should be attached to the FS4438 and carefully secured with the 2 captive fasteners on the cable Flying Lead Probing FS1036B cable assembly The FuturePlus FS1036B high speed flying lead probe can be connected anywhere on the target that the user thinks an adequate eye can be obtained The FS1036B was designed to be used right at the AC coupling capacitors incorporated into the DisplayPort Main Link traces The FS1036B flying lead cable assembly allows the FS4438 preprocessor to connect to components on the target board by means of directly soldering a flex pcb to a component or feature on the target pcb then connecting the header on the flying lead cable to the other end of the flex pcb 100 2 54 REF FS1036B is for use on the Main Link not the Aux Channel or
31. le probes Run Stop Display Port 1 1 File Edit gt m Run Probe Mgr F I Run Stop el Filters Log amp Stop Probe Mgr e Run Probe Mgr Running the preprocessor with the current settings This is an alternative to clicking the tool bar Run button e Stop Probe Mgr Stop the probe This is an alternative to clicking the tool bar Stop button Help E About Probe Mgr Gen 2 FuturePlus Systems Corporation Probe Mgr Gen 2 Main Program Version 1 00 0000 DLL Version 1 00 0000 FPGA Version e About Displays version numbers for the Probe Manager application and FPGA configuration The Probe Manager application provides different selections to the user based on the Mode Selection Mode that the FS4438 Probe is set to run in The sections of this User Manual that describe the configuration and use of the Probe Manager are organized by Mode DP 1 1a Mode Operation of the FS4438 in this mode will match the VESA Protocol specs for v1 1a on links of x1 x2 or x4 at either 1 62 or 2 7 Gbps The Configuration selections are shown below Note there is no Config required for Aux signals The functions provided on this screen include Selection of the Probing Cable type and Lane Width Lane Inversion can be selected on an individual channel basis by clicking the INV button associated with each lane While the preprocessor is stopped signal activity indicators are provided on each channel Signal presenc
32. nalyzer FS4438 Comment High Speed Card 1 Pod A3 A2 P1 Clock D3 D2 P2 A1 A0 P3 D1 DO P4 AUX Card 2 Pod A3 A2 P5 Clock D3 D2 P6 A1 A0 P7 D1 DO P8 When probing a single direction of an x1 x2 or x4 link the FS4438 drives 4 pods of signals to the logic analyzer It is important that before you load a system file you initiate a self test on all your modules installed in your logic analyzer to insure all modules are working properly Logic Analyzer System Support files From the system window of the TLA application select a logic analyzer module After selecting the module in the System window either right click the mouse and select Load Support Package or go to File gt Load Support Package After clicking Load Support Package a list of installed support packages will appear Select the support package that matches the desired analysis requirements The dis assembler will load along with the system file If you are analyzing more than 1 link simply choose another analyzer module from the system window and select Load Support Package to load the second module The analyzers supported by the FS4438 system files are the TLA7AA4 cards and TLA7BB cards DP x1 x2 x4 DP link analysis Requires 2 FS1055 cables and 68 logic analysis channels AUX AUX analysis Requires 2 FS1055 cables and 68 logic analysis channels Offline Analysis Data that is saved as a tla file can be imported into the TLA7xxx environment for analysis
33. nique to DP1 2 SST mode Additional Training Patterns Additional Secondary Packets Functions unique to DP1 2 MST mode Control Symbol Descrambling Time Slot Counter 6 bits to Logic Analyzer Pod Connectors Processes any set of 4 Virtual Channels remaining VCs are flagged as un processed MST Mode VC Tagging 4 Selected VCs with 3 bit tag to Logic Analyzer 4 Probe Stream Processors to handle any 4 user selected Streams Virtual Channels o Event Decode o SDP nibble swap o Pixel not recognizer o Filter MTP Header processing and checking MST Mode VC Payload Demux and VC Payload Re mux functions Accessories Supplied Minimum Equipment Required Analyzing the DP Bus This chapter introduces you to the FuturePlus Systems FS4438 preprocessor and lists the minimum equipment required for analysis The FS4438 is a DP State Analysis preprocessor The preprocessor can connect to the target by either a cabled interposer or flying leads The sideband signals such as AUX and HPD connect to the probe using separate cables The preprocessor itself is controlled by the Probe Manager software which runs under Windows and communicates with the preprocessor via a USB cable The FS4438 snoops a link without significantly degrading its signal integrity The high speed serial signal is deserialized and processed for packet identification by the FS4438 before being sent to the logic analyzer connections Additionally the preprocessor
34. ommand 1 1 Control symbol 0 Data symbol 8 Lane 3 Data 7 0 8 8b decoded value 7 0 The Clock is on A1 bit 16 The SST Mode Logic Analyzer bit assignments duplicate the MST Mode bit assignments Event Code symbol definitions in SST mode Event Code Symbol Bit 7 Bit 6 Bit Bit 1 Bit 0 FO Pixel F1 Pixel FO Stuff Data Sym FS FE F1 Stuff Data Sym FS FE Hor Content Prot BS Vert Content Prot BS Hor Content Prot SR Ver Content Prot SR Horizontal BS Vertical BS Horizontal SR Vertical SR Horizontal BE Unknown Training TP1 Training TP2 Training TP3 Horizontal VBID Vertical VBID Horizontal MVID Vertical MVID Horizontal MAUD Vertical MAUD Horizontal Dummy Vertical Dummy Vertical MSA Horizontal Audio Stream Vertical Audio Stream Horizontal Audio TS Vertical Audio TS Horizontal Audio Copy Mgmt Pkt O O O O O O O O O O O JO O O O O O OO O O O oO mQ _ ol o ool ooo
35. ort of two probe cable types interposer and flying lead No Reference Clock from Target required Serial link input polarity controllable for each lane lane inversion 8b10b Error Counting indicates signal quality in each lane and is displayed in the log file DDR State processing on 1 10 recovered link clock to logic analyzer 4 Bi color LED Display shows status of each lane Field upgradeable Flash Memory Aux Port Processing in all modes Delivery of probed Aux data to Logic Analyzer Pod connectors with single SDR state clock Probing of Hot Plug Detect HPD and display status to Logic Analyzer Hi speed Link Processing similar functions in all modes Lane Deskew with ability to tailor the individual DP1 1a SST and MST deskew functions Training Detect status to Probe Manager and Logic Analyzer Pods different patterns for DP1 1a amp 1 2 Modes Data Descrambling which may be enabled disabled Nibble swapping on all secondary packets excluding unprocessed MST streams Event Decode different code tables for 1 1a amp 1 2 Modes excluding unprocessed MST streams Pixel Not Recognizer 1 recognizer in DP1 1a or SST Mode 4 Recognizers in MST Mode Filter 1 Filter in 1 1a or SST Mode 4 Filters in MST Mode excluding unprocessed MST streams Error Detection DP1 1a Mode 4 sources 1 LAI bit DP1 2 Mode 6 sources 3 LAI bits Restart Logic allows probe to operate and continue capture through target reboots Functions u
36. pin 2 is the ground connection NOTE These signals cannot see voltages higher than 4 VDC or there is a risk of damaging the preprocessor The KOV for these cable headers is shown below The mating 3 pin header is part number Through hole Samtec TMS 103 02 S S Surface mount Samtec FTR 103 02 S S DisplayPort Auxiliary Channel MUST be plugged in correct orientation Pin 1 Pin 2 Pin 3 DP_AUX_P NC DP_AUX_N DisplayPort Hot Plug Detect Pin 1 Pin 2 Pin 3 DP_HPD GND NC Installing your The following outlines the software installation procedure when using the preprocessor for the first time Please do not attach the preprocessor to the analyzer or computer that will for the First be controlling the preprocessor until told to do so ime 1 Place the software CD that came with the product into the logic analyzer or computer that you will be installing the software on In the case of a machine that does not have a CD drive the machine will either have to be put on a network and the files loaded remotely or the CD files can be transferred from a USB drive 2 Navigate to the installation CD using Windows explorer and install the following files in this order a Silabs USB driver installation software folder USBXpressinstaller exe b DisplayPort12 probe manager 7 exe Win version vs XP version c FS1194 and AuxPort1 2 Tek exe Protocol Dis assemblers Win version vs XP version
37. plied to show only the associated stream Z m sfrie System NT u rp www a File Edit View System Tools Window File Edit em System Tools Window Help amp m lAl Wi Explorer Setup 1 Trigger AY Waveform Listing v Staus Idle US gt Tek 58 5 Analysis E Verify 11 Def Slots 3 4 0n T ooff Setu Trig DisplayPort 1 2 MS1 Stream 1 Stream 2 Stream 3 Stream 4 General Information Characteristics Standards Supported Power Requirements Logic Analyzer Required Environmental Temperature Altitude Humidity Testing and Troubleshooting Servicing This chapter provides additional reference information including the characteristics and signal connections for the FS4438 probe The following operating characteristics are not specifications but are typical operating characteristics for the FS4438 probe If the product is used in a manner not specified by manufacturer then the protection provided by the equipment may become impaired DisplayPort version 1 1a v1 2 100 240VAC 2 amps Tektronix 1690x frame and 2 of either 40 or 90 pins modules Operating 20 to 30 degrees 68 86 degrees F Operating 4 6000m 15 000 ft Non operating 15 3000m 50 000 ft Up to 80 relative humidity Avoid sudden extreme temperature changes which would cause condensation on the FS4438 module There are no automatic performance tests or adjustments for the F
38. processor to capture data properly It is strongly recommended that the user methodically proceed in the following manner when setting up the probe There is more detail on each step on page 17 1 Load the USB driver Installation software into the system that the Probe Manager software will run on 2 Load the Probe Manager software USBXpresslnstaller exe and FS1194 AUX exe files on the PC and or logic analyzer 3 Configure the logic analyzer modules as required and run the Tektronix Logic analyzer s internal diagnostics If the analyzer passes then make the appropriate target probe connections to the FS4438 probe and from the probe to the Tektronix logic analyzer 4 Connect the appropriate probing cable s to the target system power up the probe Wait until the Green ready light appears on the FS4438 This can take up to 20 seconds after power has been applied to the probe 5 Open up the Probe Manager application and select the appropriate settings for the probe cable being used and the target link Check that the expected Pad assignments for the probed link show green For the first capture turn off all the filters It is recommended that the first capture be run at HBR rate 2 7Gbps 6 If the FS4438 preprocessor Lane LEDs are all Green and the first trace file captured on the logic analyzer has no error messages then it is a good indication that all initial settings are correct 7 A link showing any orange on an LED nee
39. raffic When specifying a trigger with MST traffic it is necessary to add an additional qualifier The qualifier to use is the group label called VC Tags and set that value to the value of the virtual channel you want to see Below is a picture showing an example trigger in MST Overview Storage Then Store Sample If Group Storage 1 Storage Run State 1 Trigger on the very first sample If Group EventCode Horizontal BE And Group VC Tag 1 Then Trigger Notice VC Tag is set equal to 1 for virtual channel 1 The Protocol Disassembler Captured DP data is as shown in the following figure The figure below displays the Main Link protocol decode Listing 1 E le x S File Edit View Data System Tools Window Help x m fell 2 Al isetup waveform justia v Status Ide C E activity X Bn GS 6b f Search M sens dius 14 875ns 1 Disp t Disp t Disp1 t pisei ve 00 00 sempre Mnemonics LaneOc Dummy Data 00 0 000 65531 Dummy Data 0 00 000 65532 58 Dummy Data 0 00 0 000 Dummy Data 0 o 00 00 0 000 i 0 00 00 0090 0 ise 6 01 001 Tse UT 03c 0 0 d 5 0 1 003 0 026 0 0 080 088 0 0 Dummy Data 0 Dummy Data Dummy Data Dummy Data o Dummy Data
40. replier is the device that responds to the transaction Aux channel has its own clock 67KHz so that it can be clocked into separate modules in the LA on a separate clock domain It also has its own Inverse Assembler that has to be loaded separately Field Bits Definition Probe Channel Command 4 Command Field B1 3 0 ADDR 1 1 0 12 Address Field B1 15 4 ADDR 19 12 8 Address Field B2 7 0 Aux CLK 1 B1 16 7 0 8 Data field B2 15 8 SYNC 1 Sync Bit B3 0 First part of the transfer CMD ADDR and DATA are all updated if SYNC is 0 then only DATA is updated STOP 1 Stop last byte of the transfer B3 1 Spare 1 B3 2 Spare 1 B3 3 Request 1 High when transaction is request B3 4 Response 1 High when transaction is response B3 5 Timeout 1 Response Timer timeout period 300us B3 6 II 2 pip Weaning o Db Unplugged HPD Low level pulsed low 25ms to 1 50 5 Interrupt event event signaled on rising edge of HPD NEA In HPD High level HPD Valid 1 Indicates a valid HPD event B3 9 Storage 1 Indicates Valid states B3 15 Byte Count 5 Number of valid bytes received inclusive of current B4 10 6 state The Storage bit should be used as a qualifier for storing AUX data The rate at which Storage is pulsed depends on the packet type AUX transfers begin with a four bit CMD a 20 bit address and 8 bits of data Some packet types contain additional data whi
41. rpose of this tool is that it is to be used when the pixel values are all expected to be a single value which the user sets in the form shown below The FS4438 will produce a Trigger if it sees any Pixel value that is NOT Equal to the set value Display Port 1 1 Non Uniform Pixel Identifier Log File Once started logging continues even if the preprocessor is stopped and started or if the log window is closed and re opened The log file will not repeat an error that repeats itself constantly Once a preprocessor has been stopped the log entries can be written to a file of the user s choice by clicking the Write Log File button DP 1 2 Mode SST amp MST Probe Manager functions There are several changes to the Probe Manager Screens when DPv1 2 mode is selected The Probe Configuration screen has the following changes Display Port 1 2 MST Probe Configuration Probe SERDES adjustments are used to tune out Receive errors shown as Orange LEDs on the front panel of the FS4438 These adjustments are for use at HBR2 only The DFEQ setting may provide the most effect If the default settings do not work we would recommend adjusting DFE up to about 0A as a stating point e Receive EQ is set at 2 hex the range for the setting is from 0 7 e is set at 07 hex the range of values 0 1F This adjustable on a per lane basis to allow for SI variation between lanes VC Vir
42. teacebovessonesseseaseanassshessdsassceaseccbessosvedsessaves 10 FS4438 Probing Cables ssccscccsscissconsssenccvocessoossdsenncvsssssuonesseeceessessconessonnsvseveaceussSsocssssueacens tsonsssisssenses 11 Installing your Software for the First Time 16 Connecting the Tektronix logic analyzer to the FS4438 17 Logic Analyzer System Support files 18 Ofline A MALY SIS ies uyu eere eet an eu kenne 19 Probe Manager A pplication eese io ere roo tutae P ee 20 Mode Sel ctiOn ice ette ep eerte nta 22 Mode iet ce ecrire e E pete vea pd 22 DP 1 2 Mode SST amp MST Probe Manager functions eese nennen eene nennen 25 Syimboliles a 30 Triggering Z esee eren eto teo eoo eee 31 The Protocol Disassembbl er 32 General WEE PR E EDI de E 43 Characteristics e sss 43 Standards Supported epit nte te ot Pec e ada eee tm edere d 43 Power Requirement p ur UEM OU 43 Logie Analyzer Requited ue ERE ve rr ubaspa phun E DUE e 43 Environmental Temperature 43 ZAl tude 43 Humidity
43. tecta e it pp DEUDA DIRE pened 43 Testing and Troubleshootng re ree E eet e Dee aUe bee HR EE de E rie e 43 SEL VICI uL M O 43 How to reach us For Technical Support FuturePlus Systems Corporation 36 Olde English Road Bedford NH 03110 TEL 603 471 2734 FAX 603 471 2738 On the web http www futureplus com For Sales and Marketing Support FuturePlus Systems Corporation TEL 719 278 3540 FAX 719 278 9586 On the web http www futureplus com FuturePlus Systems has technical sales representatives in several major countries For an up to date listing please see http www futureplus com contact html This product is covered in the EC under the WEEE Directive Please go to www futureplus com for recycling information Limitation of Warranty Exclusive Remedies Assistance Product Warranty This FuturePlus Systems product has a warranty against defects in material and workmanship for a period of 1 year from the date of shipment During the warranty period FuturePlus Systems will at its option either replace or repair products proven to be defective For warranty service or repair this product must be returned to the factory Due to the complex nature of the FS4438 and the wide variety of customer target implementations the FS4438 has a 30 day acceptance period by the customer from the date of receipt
44. tings if you have several listing windows open that contain the dis assembler you must make the selections to each window About Data Listing Window Column Marks Module DisplayPort_1_2_MST_54 Show Hardware x _ Disassemble Across Gaps Highlight DisplayPort_1_2_MST_54 Controls Pixel Format Bits Per Pixel 18 bpp RGB YCICE LT Probe Stream 1 X SST MST Mode DisplayPort High Speed Groups Besides de serializing the data stream for the logic analyzer the FS4438 generates a number of identification and control bits that are used by the Disassembler and logic analyzer These are also available to the user and are described below AUX port is defined separately v1 1a mode Logic analyzer signals per pod Field Bits Definition Pod Bits Storage 1 1 store A4 16 Data Error 1 1 error 15 Train1 1 1 1 DP1 1a training 14 spare 1 13 Probe DP1 1a Mode 1 0 Probe is in DP1 1a mode 12 Pixel Not Recognizer 1 1 Pixel is detected with wrong color 11 Event Code 8 Describes packet type signal event or 10 3 error event spare 3 2 0 spare 2 A3 16 15 Data Present 3 2 1 0 4 1 lane data byte is present 14 11 LOS 3 2 1 0 4 1 lane loss of signal 10 7 Lane 0 Invalid 1 1 8b10b error 6 Lane 0 Command 1 1 Control symbol 0 Data symbol 5 Lane 0 Data 7 3 5 8b decoded
45. tual Channel Payload Time slots In MST mode only the v1 2 spec allows for video display information to be broken up into 64 Payload Time Slots that are assigned to the individual video streams VCs that are being carried on the DP link This dialog allows the user to assign each possible Time Slot to any of the up to 4 video streams that the FS4438 probe will capture and decode The information relating the VCs to each Time slot can be determined from the AUX channel State listing for registers at addresses 001C00 2h and 002C00 FFh The Filter Function has the following changes for v1 2 SST mode based on additional secondary data packet types and Training patterns that were added to the DP specification Display Port 1 2 SST Filters _ BEES Baa BEEBE El iz iz E The Filter Function has the following changes for v1 2 MST which extends the SST Filtering functions to include a separate Filter function for each Stream defined in the Configuration form and adds the ability to filter within each stream based on it s VC Payload fill or Stream Symbol Display Port 1 2 MST Filters r ii wa a m m m a a a a ELE n iz zl izl isj ig El E E a El BEEBE NN BEEBE State Analysis This chapter explains how to use the FS4438 to perform State
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