CALCULATRON - simonfoucher.com
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1. 3 1 1 B Circuit Interfacing Control Lines INPUTS E_MODE Since the error detection is done externally this notifies the controller that the value entered by the user is illegal such that the controller can display a flashing error instead of its regular message OUTPUTS RESET When the user issues a reset command to the IO CONTROLLER this line is asserted while the command is issued and resets every synchronous component in the whole circuit MODE Is equal to the mode of operation as entered by the user Used as a select line for MODE MUX the multiplexor that selects which data to display START FV Sends out the start sequence to the component that computes FV If the machine is in compute FV mode START DT Sends out the start sequence to the component that computes DT If the machine is in compute DT mode START E Sends out the start sequence to the component that computes i If the machine is in compute i mode 3 1 2 I O CONTROLLER s external components COMPONENT SEGMENT_DECODER Relevant files in DSD_LAB 5 SEGMENT DECODER Identical to the Segment Decoder described in Lab2 Report It receives a 7 bit number in binary and converts it to the sequence that will display it on the board s LED display COMPONENT G07 binary to base100 Relevant files in DSD LAB 5 compute FV CONVERT B2100 Almost identical to GO7 binary to basel00 described in Lab4 Part1 except that this one has a 27 bit binary input instead of 26 as d2. Timing Models Final Met timing requirements N A Total logic elements 3145 18 752 17 Total combinational functions 3 092 18 752 18 Dedicated logic registers 601 7 18 752 3 Total registers 601 Total pins 47 315 15 X Total virtual pins D Total memory bits 32 768 239 616 14 2 Embedded Multiplier S bit elements 107 52 1972 Total PLLs O 4 0 FIGURE 6 2 Flow summary after full compilation of the complete circuit According to the compilation report the circuit is implemented with 601 registers and 3145 logic elements roughly 17 of the board s capacity The I O interface occupies a total of 47 pins 15 and the ROM table used for the log2 component takes 32 kb of RAM 7 0 Conclusion We didn t encounter any major issues during the design process Everything was well thought out and drawn out on paper before we built the circuit and besides a few compilation errors and minor issues everything went very well and we had the board working after less than 2 hours of tweaking Some of the minor issues we encountered are as follow When we first inputted the board the connections to the LEDs were backwards It got easily solved by switching the signals You may notice in the controller that DIGI is assigned to DIGIT4 etc This had to be done because of improper pin assignments made in previous labs and it was much simpler to inverse the 4 display bus signals than to redo the pin assignment Also originally
3. between the rightmost digit and the second rightmost digit Was originally connected to LEDO but we found out that the board s display points are not pinned hex0 Connects to the board s leftmost digit Our pin assignment is reversed but so are the signals going to the digits to bots inversion balance out to regular display hex1 Connects to the board s second leftmost digit hex2 Connects to the board s second rightmost digit hex3 Connects to the board s second rightmost digit 3 1 1 B Circuit Interfacing Data Lines INPUTS DIGI Inputs the data to be displayed on the board s Digit 1 The data is externally multiplexed both for the mode of operation and for error detection such that these lines contain the appropriate result of the computation DIG2 Inputs the data to be displayed on the board s Digit 2 DIG3 Inputs the data to be displayed on the board s Digit 3 DIG4 Inputs the data to be displayed on the board s Digit 4 OUTPUTS PV OUT Sends out the value of PV to the computing components that need it to operate as entered via the user interface FV OUT Sends out the value of FV to the computing components that need it to operate as entered via the user interface N OUT Sends out the value of N to the computing components that need it to operate as entered via the user interface I OUT Sends out the value of PV to the computing components that need it to operate as entered via the user interface
4. data into FV and when done pressing button 3 while switch 7 is ON will go to the next state If the screen displays 8 YR button 0 will load data into years and to get to the next state the user needs to press button 3 while switch 8 is ON After a reset to get out of MODE state press button 3 while switch 9 is ON the leftmost switch 4 2 3 Modes of operation Your new calculatron can handle 3 modes of calculation MODE 00 Compute an interest rate given a Present Value a Future Value and N number of years MODE 01 Compute a Future Value given a Present Value interest and N MODE 10 Compute the time required to double capital given an interest rate i Once a mode of operation has been selected it will appear as a lit green LED on the right hand side of the board The rightmost LED means mode 00 the second rightmost LED meand mode 01 and the 3 LED signified mode 10 If you want to change mode at any other time than when in MODE state a system reset will be required 4 2 4 An example Reset the system by pressing all 4 buttons simultaneously while switch 1 is OFF Pressing the center buttons first works best After a reset the display should read MODE 2 Enter the mode of operation For this example we will compute FV so set the rightmost switches to 01 and press button 0 Once the mode is selected the second rightmost LED should be lit Note you can change the mode of operation as man
5. data that just got entered This state is entered with a timer and exits when the timer reaches zero to avoid being in that state for milliseconds The timer is also used to know when to send out the start O and start 1 commands that will initiate the binary to base 100 converter that will convert PV and FV into displayable data STATE input FV If we are not in mode 00 the FSM jumps to the next state as soon as it enters this state since compute I is the only operation which requires a FV If at any point an error is detected the controller will pass a flashing ERR to the LEDs as described above otherwise the controller will send DISPLAY 1 lt 0001000 SWITCH 8 TO PROCEED 08 DISPLAY2 0100101 37 DISPLAY3 lt 0001111 F 15 DISPLAYA lt 0011110 V 30 Which means Button 3 AND Switch 8 to proceed enter FV When data is entered the FSM will reset the display timer and to go display_fv mode When button 3 is pressed while sw8 ON the FSM will go to state input_PV STATE display FV When in this state the controller will convert FV to displayable digits and display them on the board When the state is entered the controller will issue a start 0 command to the convert to base 100 component On the next count next clock cycle the controller will issue start 1 to the converter to initiate the conversion Once the couter reaches zero the FSM will go back to input FV sta
6. error will start flashing but you can get rid of it by reloading a lower value while into that state A reset is not needed 7 Set switch 6 to ON and press button 3 to go on The screen should now read 5 YR This means that the calculatron is expecting N Year and that to get to the next state switch 5 will have to be ON while pressing button 3 8 Set the switches to xxxx000010 and press button 0 This will load 2 as the number of years over which to compound the interest While button O is pressed the screen will display Yr 2 Note By default N is set to 1 Since the calculator only reads the 6 rightmost switches the only out of range value we can have between 1 and 63 is 0 If you entered 0 as a period error will start flashing but you can get rid of it by reloading any other value while into that state A reset is not needed 9 Set switch 5 to ON and press button 3 to go on The screen will now display BLANK BLANK 1 L and a red LED will be lit The red LED roughly represents the decimal point on the board For some reason the Altera people never assigned a pin to the decimal points on the board The answer can be interpreted as 1 L in base 100 which is 1 21 in base 10 10 To start over reset the system Note Remember to have switch 9 OFF before issuing a reset command with the 4 buttons This is because button3 and sw9 ON will exit MODE state If a user issues a reset command
7. every input value was reset to 0 but when N 0 the error detector detects an error and automatically displays ERR on the screen regardless of the state This was fixed by resetting N 1 We also ran into a timing issue between machine time and human time Originally button3 was suppose to be used alone to detect a state change but when the user pressed button 3 in human time say for 2 second the process read it at every clock pulse and sent the machine into computation mode within a few milliseconds Instead of implementing a timer we found it simpler to couple the button 3 press with a unique switch flag Once everything was working we spent quite a bit of time enhancing the user experience by displaying information on the screen The original idea was to have button3 and sw9 to go to state 2 then button 3 and sw8 to go to state 3 then button 3 and sw7 to go to state 4 etc But since the process goes through all the input states FV PV LN but only stays into the states it needs for the mode selected different modes yielded different switch order as one might notice while navigating through the calculator states We found that displaying which switch to activate while pressing button 3 was the most convenient way for the user to remember instead of having to look up a chart all the time We also had the issue of miss reading the system s requirements of displaying data as it is inputted This was quickly resolved by imp
8. start Receives a start command from the IO CONTROLLER Input_FV FV Data vector from the CONTROLLER Input_PV PV Data vector from the CONTROLLER Input_N N data vector from the CONTROLLER OUTPUTS DONE Notifies that the computation is done not used Dlis Left most digit of the computed result to be displayed D2is Left most digit of the computed result to be displayed D3is Left most digit of the computed result to be displayed D4is Left most digit of the computed result to be displayed 3 2 1 comp i s external components Nth Root Machine Relevant files in DSD LAB 5 Nth Root MACHINE Nth Root Machine identical to the Nth Root Device described in LAB 4 This component inputs a number X takes its Nth root and outputs the result already converted to 4 digits LPM_DIVIDE Component declared in the lpm library This component for our use divides the data presented on the FV lines by the data on the PV lines We only take note of the result of the division the remainder is ignored comp_i s internal components and functions This component has a few asynchronous parts The LPM_DEVIDE is permanently wired to the FV DATA and divides it by PV The FSM looks at the result whenever it needs it Also the output ports are connected to 0 for the leftmost digit since the interest rate will be computed as x xx in base 100 FINITE STATE MACHINE CONTROLLER STATE SO reset state When the Reset port gets a 1 from the I
9. taking the 63 Root of 99 we can observe output stability of the last digit DIGIT4 and the answer vector implemented for testing at roughly 90 uS The best case shortest time result taking the 1 root of 99 see figure 3 2 3 took roughly 4 65nS on a 37nS clock From this data we can estimate that the fastest operation can be completed in roughly 126 clock pulses Ops 5400ns 1 28us 1 92us 2 56us 3 2 us 3 84us 445us 512us 5 76 us 6 4 us 7 04us 7 65 us Nam 40 0 ns 4 6 us E CLK START reset x N Y GIBEX725000000 056 2009000000000000000000000000X TEZOUTE 0j DIGITI 05 DIGIT2 DIGIT3 64 X S6 Kgs 33 LE AFAR AR AEH DIGIT4 REOR RTE AER ROGO DONE err D L MM FIGURE 3 2 3 Best time case time requirement to take the Nth Root Here taking the 1 Root of 99 we can observe output stability of the last digit DIGIT4 and the answer vector implemented for testing at roughly 4 6 uS From this data we made a basic linear approximation as follows MAX2432 NMAX63 NMINI 126 39 N 126 clock pulses given N To be conservative and avoid unpleasant surprises we used 40 instead of 39 In order to validate this estimate we looked at a middle value 31 root of 99 and tested our formula Clock pulses required 126 N 40 Clock pulses required 126 31 40 1366 Running a Quartus simulation we found
10. that this operation is stabilized within 50nS on a 37nS clock see figure 3 2 4 so within 1352 pulses which is within our estimate 7 82 us 28 06 us 38 3 us 48 54 us 58 78 us 69 02 us 7 Nam 49 88 us 4 CLK START reset i x 33 N 1 3 Y 89421 320CK1 307241 300 1837618932 1300061 300411 S002 19001 DIGIT1 7 7 DIGIT2 a DIGIT3 15 K17 16 15 E 15 DIGIT4 B2 K 18 40 1 82 8i 3 Y 98 K 37 Y S6 DONE err FIGURE 3 2 4 Middle time requirement to take the Nth Root Here taking the 31 Root of 99 we can observe output stability of the last digit DIGIT4 and the answer vector implemented for testing at roughly 49 9 uS In the end all that work got thrown out and we opted for a more optimal hand shaking mechanism between the Nth Root Machine and the comp i component Because of the way Nth Root was designed it s DONE signal 1 after a reset to notify that no work is being done Since we will be listening to this done signal to find out when the operation is done we implemented a signal called WFD Wait for Done This signal is simply used as a 3 bit counter that counts from 7 to 0 We chose a 3 bits counter because we know that when a work order is sent out to the Nth Root Machine it takes 2 3 clock pulses to initialize before Done is reset to 0 and that the start sequence might take 2 more pulses start 0 start 1 A 3 bit counter 7 to 0 is large enough to accommodate for this overhead
11. CALCULATRON The calculator most used by smart Alien investors Developed by Doumet Paul 260 226 189 Foucher Simon 260 223 197 G 07 Developed for a CYCLONE II EP2C20F256C8 FPGA Board McGill University December 1 2008 1 0 SYSTEM FEATURES The Caluculatron is a financial calculator designed for you aliens to make wise decisions when it comes to your financial investments It has three important modes 1 Computation of the future value the calculatron is capable of calculating the future value of any investment given the rate of interest i offered by the bank or any other investment company the current present value and the number of years N 2 Computation of the number of years needed to double your money double time Given the rate of interest offered by your bank or investment company the calculatron can give you the number of years needed to double your money 3 Computation of the interest rate Given the desired Present Value the desired Future Value and the number of years desired the calculatron can calculate the rate of interest needed to achieve your given goals Calculatron is your ticket to efficient fast and reliable calculations It can output any of your desired variables in Economy s most important formula FV PV 1 i 100 where FV is the future value PV is the present value i is the rate of interest and N is the number of years of your investment 2 0 BLOCK DIAGRAM FULL CIRCUI
12. IGIT KOO AXDODODUDUUC2XD 1 naz i DIGITS COT 4 DIGIT4 He E REEE rg poNE FIGURE 3 2 5 The output of the Nth_Root_Machine comes already seperated into digits In this example taking the square root of 2 dosplays 1 BLAKK 41 41 which represents 1 4141 3 3 Error detection component F NDSD LAB 5NERROR FINDER reset clik Input Pw Te 0 Input FTG 0 Input_interest DG 0 Input H 5 60 Figure 3 3 1 Picture of our error finder component 3 3 1 Cases of error This component sends an error signal whenever one of our inputs Future Value Present Value N the number of years or i the interest are out of range 1 Error gets assigned 1 whenever the Future Value entered by the user is bigger than 100000000 2 Error gets assigned 1 whenever the Present Value entered by the user is bigger than 100000000 3 Error gets assigned 1 whenever the interest i is bigger than 99 or equal to 0 4 Error gets assigned 1 whenever the number of years N is 0 N can never exceed 63 since N has only 5 bits 11111 63 3 3 2 Waveforms STI Lg c6 P uo M 4 6 us 4 64 us 4 68 us 4 72 us 4 76 us 4 8 us 4 84 us 4 88 us Name clk H Input Pv U M t interest U 4 BE i i 145 505050 AG OS AR s 5 a H Input N IESi EEE EER Roo es 52545 2 0 3 5 AR GEELEN H Input Pv U reset ud ERR ua Figure 3 3 2 Waveforms showing how the error signal gets assigned 1 when the
13. O CONTROLLER the state of the FSM is set to SO and the Nth Root Machine is reseted The function of state 0 is to set DONE 1 to notify the outside world that no work is being accomplished at the moment then the state transitions to SI STATE S1 wait for start O In this state the FSM waits for start 0 This command is sent by the IO CONTROLLER As soon as start 0 the FSM state gets set to state S2 STATE S2 wait for start 1 In this state we prepare the data presented in the input ports by the IO CONTROLLER for division by converting PV and FV to sdt logic vectors for the LPM DIVIDE component the we go to state 3 STATE S3 Prepare to take the Nth Root The initial design of this component use to estimate the time required to take the Nth root based on the size of N To so so we calculated the worst time scenario and best case scenario to give us a ball park estimate of how much time it requires to produce a stable result We estimated a worst case when taking the 63 root of 99 see figure 3 2 2 took roughly 90 uS on a 37nS clock so 2 432 clock pulses 52 24 us 72 72 us 93 2 us 113 68 us 134 16 us 154 54 L Nam 89 58715 us CLK START reset i gt 33 N HE 63 Y X 753zKl751EXI B24K1762CX17822x 17623 DIGIT1 i 1 DIGIT2 i DIGIT3 i 7 DIGIT4 x61 K 51 K 565 K 53 K 55 X 55 DONE er FIGURE 3 2 2 Worst case time requirement to take the Nth Root Here
14. OFF and pressing all 4 buttons Once the reset command has been activated all the LEDs will be momentarily turned off After a successful reset command the segments should display MODE Note You may issue a reset command at any point to get back to the starting point In case wrong data has been entered or when an operation is completed 4 2 1 Inputting Data Button 0 will load the binary data interpreted from the switches 9 to 0 to the least significant bits of what is being inputted To help the user follow the operations the LED will display what is being inputted FV PV in YR In the case of loading values that are smaller than 10 bits mode years and interest only the rightmost switches will be read to the extent of the size of the data mode will only look at switches 0 and 1 year will look at the 6 rightmost switches interest will read the 7 rightmost switches For values greater than 10 bits PV and FV press button 1 to load the switches into bits 19 down to 10 and button 2 to load the 7 rightmost switches into bits 26 down to 20 of what is displayed on the screen 4 2 2 Flowing through the operations Switching between states mode select data input and calculation is done using button 3 in combination with a single switch When inputting data the LED will display which switch to turn ON to get to the next state For example if the screen displays 7 FV this means that pressing buttons 2 1 and O will input
15. T FIGURE 2 1 Block diagram of the entire circuit The calculatron can be divided into 3 major parts 1 The IO amp DATAPATH CONTROLLER top 2 The ERROR DETECTION middle 3 The COMPUTING CORE green 2 1 The IO amp DATAPATH CONTROLLER in Paid TE CONTROLLER 7 LEDG0 aim p E LEDG1 AE S LEDGI LEDG2 am gt LEDG2 LEDRO AUIPUT TS LEDRO hexD E 0 I r ee hexO 8 0 hex1 B 0 ia hex1 6 0 hex2 6 0 Pr hex2 6 0 1236 0 TENT hexsf6 0 PV OUT 26 0 Fv OUT 26 0 N OUT 5 0 OUT E 0 RESET MODE 1 0 START_FV START_DT START I FIGURE 2 2 Close up look at the controller top section of figure 2 1 Used as an interface between the outside world the board and the internal components Also sends out input data for the computing components as well as control signals mostly start and reset 2 2 The ERROR DETECTION middle PEE M m t t v II IP i i TTE ae ERR MODE D OUTI E 0 ERRNO D OUTA 0 ERR INZG 0 D OUT3E 0 ERR NGG 0 D OUT4E 0 Reset SHOW E16 0 K SHOW RIB 0 N SHOW BLANKE 0 z MODE MUX FIGURE 2 3 Close up look at the error detection circuits middle section of figure 2 1 Constantly monitors inputs PV FV I and N and asserts ERROR line when user inputs illegal value The ERROR line is used
16. and allows flexibility to be reused for implementing other similar components like the convert to binary So in state 3 we set WDF 7 and go to state 4 This state is also used as a time buffer to give time for the LPM DIVITE to finish the division and for the result to travel to the input of the Nth root component STATE S4 Prepare the Nth Root initiation by setting Nth ROOT ENABLE 0 connected to the Nth Root start port STATE S5 Finish initiating the Nth root operation by setting Nth ROOT ENABLE lt l This state also decrements WDF by 1 The FSM is locked into this state until WDF reaches 0 At this point it transitions to S6 STATE S6 At this point the Nth root operation is on its way and DONE from the Nth Root Machine has been reset to 1 to indicate that computation is happening The FSM waits in this state until Nth ROOT DONE 1 then goes to S7 STATE S7 The Nth Root Machine outputs data already separated into digits see figure 3 2 5 so the only thing left to do is to subtract 1 from the interest rate calculated The digit signals are are connected to the comp_i s output ports Dlis D2is D3is D4is which make their way back to the IO CONTROLLER See controller s description for more details so after the substation is done the process is done The FSM goes back to state 0 ck i START T reset i x 4 2 N i 2 Y ODN NEEM OOOO 000100001 T000 TATTOO TONY ONO O OR OR TOTO 00000010 101010000010 D
17. answer with illegal inputs CLOCK START CALC MODE 00 PRESENT V 10000 FUTURE V 50000 INTEREST E a e o 10 en a B E EN B YEARS Ca are a E EENEEEEZIZNEMNEENER IEEEEEEIEIESEESEEEES NE S m E DUERDUIOETIAREDUM DD par Ea e a COLLE PELLIS LL OD pom e ee own SERERER EERSEERD EEEREREA SERSEERS SEE IEE CEEER AEEED CB Figure 3 3 5 Waveform showing the error message ERR displayed on the LED screens We can see in Figure 3 3 5 that shortly after the interest gets out of bound a error message is displaced on the LED screens And as soon as the interest gets back in bound The LED screens displays the answer that it should display We can also see that when the number of years is equal to 0 we also get a error message displayed on the LED screens 3 4 N calculator component DSD_LAB5 compute_DT Input_interest 6 0 DIGITI _F E 0 reset DIGITZ2 F B 0 CLE DIGITS _F 6 0 start DNGIT4_F B 0 DONE Figure 3 4 1 Number of years calculator component 3 4 1 Inputs Outputs This Component has 4 inputs 1 reset When reset 1 the code goes to the initial state 2 CLK clock with a period of 37 nS 3 start start has to go low at some point after reset has gone high so it can go from a state to another 4 Input interest The interest can only go from 1 to 99 which means Input interest can only go from 0000001 to 1100011 This input is 6 bits long This component has also four input
18. as an enable for the error flasher Middle component as well as a select line for a multiplexer DISPLAY MUX on the right which selects either the calculated data or a flashing ERR 2 3 The COMPUTING CORE bottom left D OUT B 0 D OUT2 6 0 D OUT3 6 0 D OUTA 0 1 0 Reset pone clk D1is 6 0 a MOD IN1 6 0 J start D2is 6 0 oC MODO IN2 B D input FV 6 0 D3is B 0 LI LJ MOO_IN3 6 0 input PV 26 0 D4is B 0 ht MOD IN4 6 0 Input N 5 0 MO1 IN1 B 0 j MO1_IN2 6 0 e MO1_ING 6 0 MO1_IN4 6 0 MO2_IN1 6 0 MO2_IN2 6 0 reset DIGIT4 O E 0 ek DIGIT2 O 6 0 NB ZLINDIS U start DIGIT3 OfB 0 Mae ING input Pv 26 0 DIGIT4 O B D Cone Ee Input_interest 6 0 DONE input N 5 0 reset CLK start _ Input_interest 6 0 DIGIT1_F 6 0 DIGIT2 F E 0 DIGIT3_F 6 0 DIGIT4_F 6 0 DONE st4 i FIGURE 2 4 Close up look at the error detection circuits middle section of figure 2 1 Contains the 3 components that perform major calculations comp_i FV g07 find n Each get inputs from the IO CONTROLLER and outputs the data already separated in 4 digits and ready to be displayed to MODE MUX This multiplexer with a select line coming from the IO CONTROLLER selects which set of 4 digits to be displayed d
19. ceded buy a display data state added last after re reading the specs In every data capture state the controller will read the E MODE line to know if we are in error mode As the user inputs the data as soon as an out of bound value is detected externally the error detecting circuitry will both warn the IO CONTROLLER of this condition and make the DISPLAY MUX pass the ERR code generated by the error flasher rather than the components output see figure 2 3 Since these lines are hard wired back to the IO CONTROLLER through the DIG 1 2 3 4 input ports the IO CONTROLLER will send out that code to the segments decoder to display a flashing error message on the board The user will still be able to get out of error mode by entering an allowed value If no error is detected the CONTROLLER will display a number which represents the switch that needs to be high while button 3 is pressed to avoid having to carry that information on a chart a dash and the name of the data being entered in FV PV Yr To enter the data the switches are used as raw data and the buttons as load commands Button 0 will load the switches into bits 9 downto 0 6 downto 0 for I and 5 downto 0 for N for PV and FV Button 1 loads bits 19 downto O and button 2 loads bits 26 downto 20 The data can be modified as long as the user is in this state As soon as the user inputs a load command the FSM will switch to display data mode and momentary display the
20. epending on the mode of operation 3 0 Description of how the system works 3 1 O CONTROLLER VHDL file DSD LAB 5 IO INTERFACE IO CONTROLLER vhd sw 9 0 LEDGO key 3 0 LEDG1 CLOCK LEDG2 DIG1 B 0 LEDRO DIG2 B D hexD B 0 DIG3 B 0 hex B 0 DIGA B 0 hex2 B 0 E MODE hex3 B 0 Pv OUT 26 0 Fv OUT 26 0 N_OUT S 0 OUTIB 0 RESET MODE 1 0 START FV START DT START inst5 FIGURE 3 1 Closer look at the component IO_CONTROLLER from figure 2 1 The IO Controller is used as a main controller for the circuit as well as a sequential board interfacing unit It takes care of inputting data outputting display sending out FV PV I and N to the computing components as well as start commands It also controls the mode line which will select which computing component s display data to send out to the LEDs 3 1 4 I O CONTROLLER s ports 3 1 1 A Board Interfacing INPUTS sw connected to the board s 10 switches pins key connected to the board s 4 switches pins CLOCK connected to the board s 50 MHz clock pin OUTPUTS LEDGO Connected to the board s green LEDO informs user that we are in mode 00 LEDGI Connected to the board s green LED1 informs user that we are in mode O01 LEDG2 Connected to the board s green LED2 informs user that we are in mode 10 LEDRO Connected to the board s red LED6 informs user that computation is done and that there should be a decimal point
21. erest UWG EEE EEE EEE ils Input N U 5 Input PV U 101 10000 reset Ul start Ue DONE BI Figure 3 5 2 Waveform displaying the value of value of the Future value onthe LED screens In this Waveform we set our input interest to 10 our Present value to 10000 which means that we have a present value of 100 and our number of years N to 5 The Answer is 16105 1 using a calculator We take the integer part of this answer and display it on the LED screens as shown in the waveform Digit 1 gets assigned 0 Digit 2 gets assigned 1 Digit 3 gets assigned 61 and Digit 4 gets assigned 5 This answer is correct since the future value of a present value of 100 should yield to 161 05 4 0 User s guide Congratulations for making the right choice and purchasing your very own calculatron the calculator most used by smart Alien investors You will find it both pleasant to use ergonomically fit for a 100 fingered alien and versatile enough to make most every day investment calculations like evaluating the purchase of planets etc 4 1 Getting started Unpack your CYCLONE II board and load up g07_LAB5 sof onto it 98 7654132410 3 2 1 0 SWITCHES BUTTONS FIGURE 4 1 The Altera board pins ans switch numbers Modified picture taken from http www cizgi tagem org e market upload product altera del DEl intro 500x pn The first thing to do once the program has started is to send out a reset command This can be done by having sw9
22. esigned Its main function is to convert FV and PV to displayable digits for the user to see Does not play any essentially functional part of the controller 3 1 5 I O CONTROLLER s internal components and functions FSM MACHINE STATE RESET Reached asynchronously when all 4 buttons are pressed simultaneously and switch 9 is OFF The switch condition is because the transition out for the next state ready is done by pressing button3 sw9 ON so had we not implemented the sw9 as a necessary condition for reset if the user let go of button 3 last he would skip the ready state In this state we reset PV and FV signals to 0 and N and I to 1 because O is a illegal value for N and I We reset the mode to 11 which is an undefined mode and force the FSM to ready state We also assert RESET SIGNAL which is sent out to all the external clocked components and resets them The following states are all activated on rising clock edge STATE READY The purpose of this state is to select the mode of calculation The first thing that is done here is to reset RESET_SIGNAL to zero in order to stop resetting the external devices When in ready state the controller will send out the values DISPLAY lt 0010110 M 22 DISPLAY2 lt 0000000 O 00 DISPLAY3 lt 0001101 d 13 DISPLA Y4 lt 0001110 E 14 to the signal lines connected to the segment decoder in order to display mode on the screen In th
23. herwise if N is equal to 0 we get our final answer that we will feed into the base 100 converter and display the answer on the LED screen of the Altera Board Note If we want 10 as our present value we multiply it by 100 to be able to represent the fractional part in the output and on the altera board Example if we want 5 as our present value we enter 500 on the altera board Using a present value of 500 will yield to a Future value of 805 225 if our interest is 10 and the number of year is 5 whereas a present value of 5 will yield a future value of 8 05 Our calculator in this case will take the integer part of our modified Present value which represents the full answer of our real present value and display it on the LED screens in base 100 In this example it will display 805 in base 10 3 5 3 Summary of Description Overall to find FV 1 add 100 to the interest 2 Check if N gt 0 if yes then multiply the result in 1 by the Present Value x 100 3 Divide answer in 2 by 100 and decrement N 4 go back to 2 to check if N gt 0 if yes then keep on going from step 2 to 4 until N 0 That way our PV 1 i 100 is going to get multiplied by itself N times 5 If N 0 feed the overall answer to the base 100 Converter and output will be fed to the Altera Board Waveform 31 01 us 31 17 us 31 33 us 31 49 us 31 65 us 31 81 us 31 87 us none clk Ul DIGITI 0 Ul 0 DIGIT2 0 UI 1 DIGIT3 0 Ul B1 DIGIT4 0 UI 5 int
24. interest go out of bound 9 78 us 9 86 us 9 94 us 10 02us 10 us 1018us 1026 us clk AD B Input FV U 500 B Linterest U 4 SA iii 3 o oo ooo 199 0 io 1A oo 1890 i014 00 005 2054 101 9 g B inp N U4 5 5 54 3519 5 04 118 1X 025070 5 ee ee 115593 TO B Input PY U 500 reset U1 ERR UO Figure 3 3 3 Waveforms showing how the error signal gets assigned 1 when the interest go out of bound We can see in Figure 3 3 2 that when our input N is equal to 0 our error signal is equal to 1 and when N gets assigned 1 afterwards the error signal goes back to 0 We can also see in figure 3 3 3 that when our interest is higher than 100 our error signal gets assigned 1 3 3 3 Overall circuit of our error scroller D OUTtfs ek SHOW EB D QUTB em put PVRS SHOW R 5 D QUTJ B 0 e hou FUE SHOW BLANK D OUT4f 0 Input _interest 6 0 Input N 5 0 Figure 3 3 4 Diagram showing how the error signal is transmitted throughout the overall circuit In Figure 3 3 4 when one of our inputs is out of bound our error signal will be equal to 1 This error signal is fed to the error scrolling component created in lab3 Our error flashing component will send a error flashing signal to the I O controller that will display a error message on the LED screens as soon as the inputs go out of bounds This will not in any way stop the processes of calculation But instead of displaying the
25. is state if button O is pressed the value of swO and swl is loaded into MODE SIGNAL This signal is sent externally to MODE MUX see figure 2 4 which selects which component s output to connect to the IO CONTROLLER s DIG 1 2 3 4 input ports which will eventually be sent to the segment decoders MODE SIGNAL is also used further so that the controller knows in which mode it needs to operate The 3 modes of operation are 00 for compute I 01 for compute FV and 10 for compute double time DT They have been chosen as such because of the order in which the components have been places in the circuit see figure 2 4 this made it easy to look at the circuit and extrapolate which data inputs was required by which state As different modes are selected the 3 rightmost green LEDs will indicate to the user in which mode the calculator is set to To exit this state the user needs to press button3 while sw9 2 ON Each state transition is made using Button 3 one unique switch to avoid having many unintentional button reads The choice of switches might not seem incoherent to the user but since the machine only captures the data it needs for the selected mode of operation it skips some states Therefore even though the switches have been assigned according to the sequence of states they do not appear sequential from a user s perspective The next 8 states are used to capture user data There are four data capture states each pre
26. ivide log of 2 and log of 121 100 which will yield the answer N 4 The final step will be to feed our answer N to the base 100 converter Note When converting to base 100 we use a WFD signal This WFD signal is used in order to avoid our VHDL code to jump from a state to another too quickly In fact it is used to ignore the Done signal of the Nth root when it is done with its calculations See more in Control inputs outputs 3 4 3 Waveforms 311 us 313 us 327 us 3 35us 3 43 us 35 us 3 53 us 367 us 375 us EE Answer 18 CLK U quoto DONE U interest U 10 z reset U start U stateB Ue ee 1 DIGITL U DIGITZF U paar u 0 X 1 4 3 7 paar u 6 y 95 gy y e j 3 di z 33 Figure 3 4 2 Waveform showing the resulting number of years displayed on the LED screens In this waveform we have an interest of 10 if we use a calculator we will find the answer to be 7 29 which is what is displayed on the waveform in Answer 7 is displayed on the 3rd LED screen while 29 get displayed on the 4 LED screen 3 5 FV Component DSD LAB compute FV p 5 5 5 z DIGIT O B5 n zs DIGITZ D 5 A zx DIGIT3 DO B D 2 E TE Input P uT25 0 DIGIT4 O B 0 L EU Input interest 6 0 DONE E E E Input N 5 D E E 3 E E Se DE d Z E inst DE 7 eas ts Sa E EEEE es ns LEX IL EEE ERE E mlm ln T A ERE E E SS REE It LI ee Figure 3 5 1 Future Val
27. lementing new display states while data is inputted Another problem arose when we were almost done testing our whole design we realized by re reading the lab carefully that we omitted the part where the inputs entered by the consumer must be displayed on the screens This was very easily fixed due to the fact that our design is extremely flexible and any change can be made very easily One unpleasant issue we encountered at the end of the design is that Altera never assigned any pins to the decimal points on the LED display We had seen them and waited until the very end of the design to implement them by looking up the user s manual an added bonus for the aliens only to find out that they were not accessible We worked around it by lighting up a red LED roughly under where the point was to be displayed In order to improve our design we could have added more components to it like calculating the Future value Number of years and interests with annuities But due to time constraints we are more than happy to have our current design work to perfection and our alien customers will be quite pleased with the effectiveness of our calculator
28. lso this state managed the N SIGNAL vector and displays DISPLAYI 0000101 SW5 TO PROCEED 05 DISPLAY2 0100101 37 DISPLAY3 0100010 Y 34 DISPLAYA lt 0011101 R 29 if the system is not in error mode When button 3 is pressed while sw 5 ON the FSM goes to state start STATE display N Very similar to display i except that since we display a 6 bit vector in a 7 bit segment decoder we add a 0 as the MSB We also display YR as the first 3 digits The data signal lines are connected to external ports of the controller so as the data is inputted by the user it instantly reaches all the computing components that will require them for proper operation Therefore at this point the component corresponding to the mode of operation has its data the data values are within legal range and the display multiplexer is letting through that component s result already segmented on 4 digits and already fed back to the IO CONTROLLER through input ports DIG 1 2 3 4 The next 2 states issue a launch signal to the appropriate component STATE start This state will innate the launch signal for the required component for the operation selected IF MODE SIGNAL 00 THEN START i lt 0 IF MODE SIGNAL 01 THEN START FV lt 0 IF MODE SIGNAL 10 THEN START DT lt 0 ELSE If there were no mode signal 11 this condition is filtered earlier but we added this as a second
29. rightmost symbol represents 57 in base 100 The error is 24 57309 24 57 100 0 4 3 Testing of the double time In order to test this we chose the interest rate to be 37 and we already know that Future Value Present Value is equal to 2 Using a calculator the double time was 2 2017 years Using the Altera Board the value displayed on the LED screens was E L The Leftmost symbol represents a 2 in base 100 and the rightmost symbol represents a 21 in base 100 The error is 2 21 2 20170 100 0 8 6 0 Summary of the FPGA resource utilization Top View Wire Bond Cyclone Il EP2C20F 48407 123 6 6 64 on 2 B H 65 6 T BEIDA gt gt fN ODOTA 000060000 OE VODOU 202 900 o GE CX Vous I Nei x xVx x VAOO a re WVV sf INE X XGOQF CN OOOO0XONVXJ A VAOVOOVOO 50 OR OR HOYx OODOODOOOOOOOOOLE AVO OVAO OVOAY OE BOOK o olo os ORTOS 7OOO AAA AOVA0O0090 r VoOQ0OO000040 Ow OXO 88 6 OO COSHDOUOR OORT 123 4 5 6 7 8 9 0 n m B H 5 HT BH DAD D E G H J AX x x OO AMH M N P T c D E F G H J K L y n N P R T u v o 20 DOS E oOx FIGURE 6 1 Top view of the pin assignments on the Cyclone II board used by the circuit Flow Status In progress Mon Nov 24 21 26 32 2008 Quartus II Version 8 1 Build 163 10 28 2008 SJ web Edition Revision Name g07_LAB5 Top level Entity Name calculatron Family Cyclone Il Device EP2C20F484C7
30. s DIGIT1 DIGIT2 DIGIT3 and DIGIT4 which are connected to the four LED screens They will give the adequate value of N on the LED screens 3 4 2 Description This circuit finds the number of years N needed for our Present Value to double which means that FV PV 2 To find N we use the following formula log 2 log 1 1 100 In order to do so we feed our log component 1 100 by using appropriate multiplications and divisions In fact we take the interest multiply it by 2 11 in order for the log component to understand what value we re inputing and then divide it by 100 using the Ipm divider After the division we only take the quotient and feed it to the log component It is already taken into account by the log component that our input represents a number between 1 and 2 which is why we do not add a 1 After that we use a second lpm divider to divide log2 and log of 121 100 which will yield the number of years N Once we have this answer we still need to feed it to the base 100 converter in order to display the answer in base 100 3 4 3 Summary of Description Overall to find N 1 Take the input multiply it by 2411 which will be understood as our interest 1 by the log component 2 Take the result of the multiplication and divide it by 100 using an lpm divider so that we can input i 100 to our log component Again we do not need to add a 1 because it is taken into account by the component 3 Using a second lpm divider we d
31. safeguard go back to ready state Once we sent out s start 0 signal move on to state start2 STATE start2 This state completes the initiation of the start sequence by sending out start 1 to the appropriate component based on the mode of operation IF MODE SIGNAL 00 THEN START i 1 IF MODE SIGNAL 01 THEN START FV lt 1 IF MODE SIGNAL 10 THEN START DT lt 1 Afterwards the FSM goes to the display state STATE display result Since earlier on the controller communicated various messages to the user via the segment decoders this state is used to finally link the computed result to the board s LED The result of the computation is hard wired into input ports DIG 1 2 3 4 and gets passed to the segment decoder The controller also lights up red LED 6 both to notify the user that the result has been computed and to remind him of the decimal point since the board s points are not pinned At this point to start over the user has to launch a reset command 3 2 Computing interest rate comp_i component VHDL file DSD_LAB 5 compute_i comp_i vhd comp i Reset DONE clk D1is 6 0 start D2is 6 0 Input_F 26 0 D3is 6 0 Input_P 26 0 D4is 6 0 Input_N 5 0 i inst6 FIGURE 3 2 1 Closer look at the component comp_i from figure 2 1 comp_i s ports INPUTS Reset Initiates a system reset sent from the IO CONTROLLER clk Connected to the circuit s 50 MHz clock
32. te STATE input PV This state is identical to input FV except that the FSM will remain here if in mode compute I and compute FV Otherwise the transition will be made to state input i Also this state manages the PV data vector and displays DISPLAY 1 lt 0000111 07 DISPLAY2 0100101 37 DISPLAY3 lt 0011001 P 25 DISPLAY4 lt 0011110 V 30 Which means button 3 AND sw 7 enter PV STATE display PV Copied and pasted from display FV but managing PV data STATE input i The FSM will stay here if MODE SIGNAL is 01 compute FV or 10 compute DT This state will manage the 7 biti signal vector and displays DISPLAY 1 lt 0000110 sw toggle 06 DISPLAY2 lt 0100101 37 DISPLAY3 lt 0000001 1 01 DISPLA Y4 lt 0010110 n 22 for sw 6 to proceed and in for interest rate STATE display i As soon as data is entered in state input i the controller will enter this state which is very similar to display FV and PV except that here there is no need to use the binary to base 100 converter as SIGNAL i can be directly fed into the decoder Also since the interest only takes up at most a single digit on the display board we ve added in as the first 3 digits to enhance user experience STATE input_N Very similar to input_i except that the controller stays here only if MODE_SIGNAL 01 or MODE SIGNAL 00 otherwise goes to state start1 A
33. ue calculator component 3 5 1 Inputs Outputs This component has 6 inputs 1 reset When reset 1 our state is initialized 2 CLK clock with a period of 37 nS 3 start start has to go low at some point after reset has gone high so that we can move from state to state 4 Input_PV Enters the Present value desired by the consumer it is represented with 26 bits It can go as low as 0 and as high as 999999 99 5 Input_interest Enters the interest desired by the consumer it is represented with 7 bits It can go as low as 1 and as high as 99 6 Input_N Enters the number of years desired by the consumer it is represented with 6 bits It can go as low as 1 year and as high as 63 years The outputs of the components are DIGIT1 DIGIT2 DIGIT3 and DIGIT4 which are connected to the four LED screens They will give the adequate value of FV on the LED screens 3 5 2 Description The component takes the interest the present value and the number of years as input and outputs the future value In order to do this calculation we add 100 to our interest If N gt 0 we multiply our interest 100 i with our present value After multiplying we divide the answer by 100 using an lpm divider component therefore it will be as if we are multiplying the present value by 1 i 100 After that we decrement our N and check again if N gt 0 As long as N is bigger than 0 we keep on multiplying our present value by 1 i 100 as described earlier Ot
34. while switch 1 is ON and button one gets let go last the system will transit to the next state immediately which could cause user confusion Note remember that some digits had appeared twice in the original base 100 number system presented in the lab2 description so 3 of the digits have been changed from the table presented in lab2 based on comments made in the DSD discussion board 5 0 Testing the circuit In order to test our whole system we tried many different inputs for each one of our modes to make sure that each one of them was working perfectly fine These here are some of the of the tests we performed on our system 1 Testing of the Future Value Calculation In order to test this we chose our Present Value to be 10 therefore our input was 1000 as stated above our interest rate to be 15 and our number of years to be 3 Using a calculator the value of our future value was 15 20875 Using our Altera Board the value displayed on the LED screen was E F F represents 15 in base 100 and the rightmost symbol represents 20 in base 100 The error here is 15 20875 15 20 100 0 8 2 Testing of the Interest Rate Calculation In order to test this we chose our Future Value to be 300 our Present Value to be 100 and the number of years to be 5 Using a calculator the value of the interest was 24 57309 Using our Altera Board the value displayed on the LED screen was O The leftmost symbol represents 24 in base 100 and the
35. y times as you wish while in MODE state 3 Go to input data Set the leftmost switch to 1 and press button 3 The screen should now read 7 PV This means that the calculatron is expecting a PV and that to get to the next state switch 7 will have to be ON while pressing button 3 4 Set the switches to 0001100100 and press button 0 This will load 1 00 as a present value While button 0 is pressed the screen will read BALNK BLANK 1 0 which means that PV is now set to 1 0 Note If you enter a PV out of bounds error will start flashing but you can get rid of it by reloading a lower value while into that state A reset is not needed Also you may change the value of PV while button 0 1 or 2 is pressed an see what FV is being set to 5 Set switch 7 to ON and press button 3 to go on The screen should now read 6 in This means that the calculatron is expecting an interest rate and that to get to the next state switch 6 will have to be ON while pressing button 3 6 Set the switches to xxx0000000 and press button 0 While button 0 is pressed you ll see in 0 meaning that you loaded 0 as an interest rate Since N is an illegal value for the years error will start to flash indicating error mode Now set the switches to xxx0001010 and press button 0 This will load 10 as an interest rate while button 0 is pressed you ll see inzA Note If you enter an interest rate out of bounds
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