Home

UEI-AI-211-manual

1. DNx Al 211 Analog Input Board Chapter 3 Programming with the Low Level API 16 bitwise indicates which of the following struct fields are valid set drive current for iepe sensors approx 0 8mA DQ 211 BIAS ON or DQ 211 BIAS OFF 12 bit comparison value for open sensor detection 12 bit comparison value for shorted sensor detection LED alarm control high pass filters test mode 48kHz filter DQ 211 ANALOG FILTER_ON or DQ 211 ANALOG FILTER OFF range 0 255 defines below defines below S S enable dataflow from main ADC s defines below secondary enables 0 sec off 1 secondary ON determine update rate for secondary LED comparison converter pDQCFGCH 211 channels flags indicate which channels should be written The following flags are defined define define define define define AI211 SEL CHAN 0 AI211 SEL CHAN 1 AI211 SEL CHAN 2 AI211 SEL CHAN 3 AI211 SEL CHAN ALL 0x01 0x02 0x04 0x08 OxOf More than one channel may be specified by or ing multiple channel flags together mask flag bits that select which parameters will be written The following flags are defined define DQAI211 CFGCH DEFAULTSET 1L 11 if 1 set all values to default state d
2. I A M amp M P e E E t Copyright 2009 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap3 fm DQAI211 FIR BY AVG SET flag bit also uses the data in avg factor BY AVG SET bit is set and DOAI211 AVGFACTORSET is also set the 211 FIR DQA DNx AI 211 Analog Input Board Chapter 3 Programming with the Low Level API If the default FIR filter coefficients will be adjusted to provide the correct low pass filter response with the factor of 2 lower data rates that come with each increment of the averaging value Function DqAdv211SetFIR Syntax int DqAdv211SetFIR int hd int devn int channel int mask int decrat int tapsize double data Command DOE Input int hd Handle to the IOM received from DqOpenIOM int devn Layer inside the IOM int channel Bit field to select channel see below int mask Bit field to select which FIR setting functions to perform see below int decrat Desired decimation ratio NULL if not required see below int tapsize Number of taps in filter length of the following data NULL if not required see below double data Pointer to filter taps data NULL if not required see below Output None Return Li DQ NO MEMORY Error allocating buffer DQ ILLE
3. define AI211 SEL CHAN 0 0x01 define AI211 SEL CHAN 1 0x02 define AI211 SEL CHAN 2 0x04 define AI211 SEL CHAN 3 0x08 define AI211 SEL CHAN ALL 0x0f More than one channel may be specified by or ing multiple channel flags together lt mask gt parameter flag bits that select which parameters will be written The following flags are defined define AI211 FIR SET DEFAULT 0x8 set and enable the default filter define AI211 FIR COEFF LOAD 0x4 load taps and coefficients define AI211 FIR SET DECIMATION RATE 0x2 set decimation rate define AI211 FIR ENABLE 0x1 enable fir filter define AI211 FIR DISABLE 0x0 disable fir filter define AI211 FIRFIRST ENABLE 0x0 perform FIR before averaging define AI211 FIRFIRST DISABLE 0x10 perform FIR after averaging TheAI211 FIR SET DEFAULT flag bit is used to easily set all of the FIR configuration values to their default state Before setting up a custom configuration it is recommended you first set all channels to their default state by setting channel toAI211 SEL CHAN ALL setting mask to AI211 FTI ET DEFAULT and calling DgAdv211SetFIR When the R S AI211 FIR SET DEFAULT flag is set all of the other mask parameter bits are ignored TheAI211 FIR ENABLE andAI211 FIR DISABLE defines are us
4. sssssssssssssee 10 1 7 Diagram of DNA AI 211 Board Position Jumper Settings 10 Chapter 2 Programming with the High Level API 0000 e cence eee eee 11 None Chapter 3 Programming with the Low Level API sees 14 None Appendix A Accessories issu a tied ee eed eee RR n 24 A 1 Photo of DNA ACC 211 Breakout Board ssssssseeeenn 24 A 2 Mounting Multiple DNA ACC 211 Breakout Boards ssseeee 26 Zs Copyright 2009 Tel 508 921 4600 www ueidaq com Vers 1 3 b d United Electronic Industries Inc Date June 2009 Al 211LOF fm DNx Al 211 Analog Input Board Chapter 1 Introduction Chapter 1 Introduction This document outlines the feature set and use of the DNx Al 211 vibration sen sor interface layer s when used with the PowerDNA Core Module DNA AI 211 or the DNR 12 1G RACKtangle system DNR AI 211 This manual describes the following products DNA AI 211 DNR AI 211 24 bit 4 channel IEPE ICP vibration sensor interface layer with 0 8 mA constant current excitation and anti aliasing filtering DNA ACC 211 Breakout Board with 4 UNF connectors for connecting to 2 wire vibration sensors Accessory modules such as BNC cables 1 1 Organization This DNx Al 211 User Manual is organized as follows NOTE Copyright 2009 all rights reserved United Electronic Industries Inc Chapter 1 Introduction This chapter provides an overview of DNx Al 211 board layer features
5. On Off Sw n INBBUBI ADC clock PGA 1 2 5 10 Gains 24 bit ADC Sensor A Isolation bypass FIR multichannel output data queue Takes data from all channels and puts it into input channel list data area DC DC Channels 1 2 3 Standard CLI Logic Implementation in proper sequence Each channel has a 4 sample FIFO Sensors Figure 1 3 Block Diagram of DNA AI 211 Channel Architecture NOTE Each of the four Al 211 channels has independent power controls that are auto matically engaged to reduce power consumption If the channel list for an ACB streaming acquisition does not specify all four channels any unused channels are automatically powered down for the duration of the acquisition session At the end of the session those unused channels are powered back up in case they may be required for the next acquisition session When this re powering occurs a 100 millisecond delay is inserted into the setup time for the next acqui sition to allow time for the power to stabilize If the application requires that acquisition sessions be performed with less than 100 milliseconds between them the channel list must specify all four channels so that the power down function is disabled and the subsequent power up delay is eliminated Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Ve
6. accessories device architecture connectivity and logic Chapter 2 Programming with High Level API This chapter provides a general overview of procedures that show how to create a session configure the session and generate output on a DNx Al 211 layer working with the UeiDaq Framework High Level API Chapter 3 Programming with the Low Level API This chapter describes the Low Level API commands for configuring and using a DNx Al 211 layer Appendix A Accessories This appendix provides a list of accessories available for use with a DNx Al 211 layer Index This is an alphabetical index of topics covered in this manual A glossary of terms used with the UEI data acquisition systems and layers can be viewed and or downloaded from www ueidaq com Tel 508 921 4600 www ueidaq com Vers 1 3 Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter 1 2 Introduction Manual Conventions To help you get the most out of this manual and our products please note that we use the following conventions Tips are designed to highlight quick ways to get the job done or reveal good ideas you might not discover on your own NOTE Notes alert you to important information CAUTION Caution advises you of precautions to take to avoid injury data loss and damage to your boards or a system crash Text formatted in bold typeface generally represents text that should be entered verbatim For instance it can represent a comm
7. 0 0 cee 9 Chapter 2 Programming with the High Level API 000 e eee eee eee 11 2 1 Creating a Session seee eee ee selle RR be hee Rd 11 2 2 Configuring the Resource String 2 1 lille 11 2 3 Configuring the Timing llle RR n 12 24 Reading Data uere eR ete ee E e bed uso e CRDI Ded dee ae 12 2 5 Cleaning up the Session 0 0 0 n 13 Chapter 3 Programming with the Low Level API seen 14 Appendix A Accessories 0 0c eee hn 24 A 1 DNA ACC 211 Breakout Board 0 ects 24 A 1 1 Mounting Multiple DNA ACC 211 Boards l l 26 A 2 Other Accessories sends Rp Im ERi RP PERDRE ERE ieee ei eee T 26 A 3 Layer Calibration resne skara tis r EREEREER RR Rh 27 Dp CETEEEIUUEEUEETETIUMEM 28 s Copyright 2009 Tel 508 921 4600 www ueidaq com Vers 1 3 b d United Electronic Industries Inc Date June 2009 Al 211TOC fm Table of Contents Table of Figures Chapter 1 Introduction 0 0 0 ee 1 1 1 DNA AI 211 Layer and DNA ACC 211 Breakout Board sees 4 1 2 Typical Measuring Circuit for a Vibration Sensor sssee 5 1 3 Block Diagram of DNA AI 211 Channel Architecture eeeseeeee 6 1 4 DB 37 I O Connector PIDOUEL i c rire et den rp dea ce t Let e hoe a e ead d e obe dedo 8 1 5 DNA ACC 211 Connector Pinout ssssssssssses eee 9 1 6 Jumper Block for DNA AI 211 Board Position
8. DQAI211 COMPLOSET flag bit is setin lt mask gt the value in complo is set Two defines are provided define DQ 211 COMP LO STD Oxc0 standard value for doing comparison define DQ 211 COMP LO DEFAULT 0x0 default value disables comparison It is suggested you keep the values between 0x30 and Oxe0 Setting a value of zero will turn the comparison off alarmctrl sets the control settings for the visual alarm LED When the DQAI211 ALARMCTRLSET flag bit is set in mask the value in xalarmctrl is set The following defines are provided define DQ 211 ALARM ON 0x3 LEDs are controlled by comparison registers and secondary adc fdefine DO 211 ALARM OFF 0 LEDs are off define DQ 211 ALARM RED 0x4 LED controlled by program red on define DQ 211 ALARM GREEN 0x8 LED controlled by program green on define DQ 211 ALARM ORANGE 0x0c LED controlled by program orange on Cd lt hpf gt sets the control settings for high pass filtering or DC coupling When the DOAI211 HPFS flag bit is set in lt mas k gt the value in lt hpf gt is set The following defines are provided define DQ 211 HPF DC 1L 0 DC coupling define DQ 211 HPF POINT1 HZ 1L 1 0 1 Hz cutoff high pass filter Copyright 2009 all rights reserved Tel 508 921 4600 www ueidag com Vers 1 3 i a a eal Date June 2009 File
9. Error allocating buffer DQ ILLEGAL HANDLE Illegal IOM Descriptor or communication wasn t established DQ BAD DEVN Device indicated by devn does not exist or is not an Al 211 DQ BAD PARAMETER Illegal value in DQCFGCH 211 structure DQ SEND ERROR Unable to send the Command to IOM DQ TIMEOUT ERROR Noth ing is heard from the IOM for timeout duration DQ IOM ERROR Error occurred at the IOM when performing this command DQ SUCCESS Successful completion Other negative values Low level IOM error Description This function sets up the channel configuration parameters for the Al 211 The user may configure as many parameters as he chooses Any parameter that is not enabled by a mask bit will retain its present value To accomplish Al 211 channel configuration the user must allocate initialize and pass a pointer to a pDOCFGCH 211 structure This structure is defined as typedef struct uintl16 channels Copyright 2009 all rights reserved United Electronic Industries Inc channel select bits Tel 508 921 4600 www ueidaq com Vers 1 3 Date June 2009 File Al 211 Chap3 fm t16 t16 t16 t16 t16 t16 t16 t16 t16 t16 t16 t16 DOCFGCH 211 mask biasdrive biasonoff comphi complo alarmctrl hpf offset anafilt main enb sec enbs secn
10. 9 DNA CBL 37 Cable 26 Index H High Level API 11 J Jumper Settings 9 L Layer Position Jumper Settings 10 Manual Conventions 2 Manual Organization 1 Measuring Circuit for a Vibration Sensor 5 P Photo of DNA ACC 211 Breakout Board 24 photo of DNA AI 211 Board 4 S Specifications of DNA ACC 211 25 Copyright 2009 Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 241IX fm
11. Frequency 15 ppm max luding both analog amp digital filters 0 49 times sample freq 3 db point Passband Ripple 0 005 dB max Stop Band Attenuation 100 dB Stop Band Frequency Bias Current Specifications Output Current Range 0 547 times sample frequency 0 0 to 8 mA software selectable Output Current Accuracy 1 Short Circuit Protection Continuous short will not cause damage Maximum Output Voltage 25 VDC minimum Dynamic Output Impedance 500 kOhm minimum Open Short Detection Open Short Annunciators General Specifications Connections 1 per channel Automatic alarms for both high and low current at user selectable trigger points LEDs adjacent to the 10 32 UNF connectors Standard 10 32 UNF coaxial connectors ESD protection 15 kV Operating temperature tested 40 C to 85 C Vibration EC 60068 2 6 IEC 60068 2 64 5 g 10 500 Hz sinusoidal 5 g rms 10 500 Hz broad band random Shock IEC 60068 2 27 50 g 3 ms half sine 18 shocks 6 orientations 30 g 11 ms half sine 18 shocks 6 orientations Humidity 0 to 95 non condensing Altitude O to 70 000 feet Power consumption 6 75 W max Cubes should include DNR FAN option if mulitple Al 211s are installed Table 1 1 DNx Al 211 Technical Specifications Copyright 2009 all rights reserved United Electronic Industries Inc Tel 508 921
12. data from the AI 211 is done using a reader object The following sample code shows how to create a scaled reader object and read samples Create a reader and link it to the session s stream Tel 508 921 4600 www ueidag com Vers 1 3 Date June 2009 File Al 211 Chap2 fm 12 DNx Al 211 Analog Input Board Chapter 2 13 Programming with the High Level API CUeiAnalogScaledReader aiReader session GetDataStream Read measurements in Gs double Gs 48 aiReader ReadSingleScan Gs 2 5 Cleaning up The session object will clean itself up when it goes out of scope or when it is the Session destroyed However you can manually clean up the session to reuse the object with a different set of channels or parameters as follows session CleanUp ee CC CUM m wc CT CC w CC KC MC S H Y HT erm Copyright 2009 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap2 fm DNx Al 211 Analog Input Board Chapter 3 Programming with the Low Level API Chapter 3 Programming with the Low Level API This section illustrates how to program the PowerDNA cube using the Low level API The low level API offers direct access to PowerDNA DAQBios protocol and also allows you to access device registers directly However we recommend that when possible you use the UeiDaq Framework High Level API see Chapter 2 because
13. is reduced by at least 80 dB 3 3 x 24 Performance at lower sample rates is even better Automatic signal averaging 8 sample averaging built into the A D converter further reduces the effective noise The digital filter in the FPGA is a programmable FIR filter that runs in real time This gives a very sharp brick wall filter with much steeper drop off than is pos sible with an analog filter and produces a uniform group delay phase shift between channels It also means that no gain or offset error is introduced as might occur with an analog filter as you change filter frequencies The anti aliasing filter achieves 109 dB attenuation within its stop band Because each filter introduces an identical phase shift no inter channel phase jitter is present that could adversely affect data integrity The FIR filter is followed by a decimator to reduce the sampling rate and com plete the anti aliasing function Tel 508 921 4600 www ueidaq com Vers 1 3 Date June 2009 File Al 211 Chap1 fm 1 5 2 1 5 3 1 5 4 1 5 5 Data Handling LEDs DNA ACC 211 Breakout Board Connectors DNx Al 211 Analog Input Board Chapter 1 Introduction Data output from the FIR filter unit is stored in sequence in the input channel list data area in 4 sample dedicated FIFOs one for each channel Refer to Chap ters 2 and 3 for programming information Continuous monitoring of the bias current in each channel enables you to detect an open
14. level IOM error values Description This function sets up advanced layer configuration parameters for the Al 211 These settings apply to all channels on the layer In the normal case these configuration settings are set automatically by the DqAcbInitOps function Use these settings to override standard behavior for special applications The user may configure as many parameters as he chooses Any parameter that is not enabled by a mask bit will retain its present value To accomplish Al 211 layer configuration the user must allocate initialize and pass a pointer to a pDOCFGLAYER 211 structure This structure is defined as typedef struct uint16 mask bitwise indicate which of the following fields are valid uintl6 clksrc select clock source for divider uintl6 clkdiv clock divider output 1MHz max clkdiv 0 passes clksrc w o change Do not set values less than 65 or 23 when 66MHz or 24MHz selected Sample rate is clksrc clkdivt1 8 uintl6 fmtr reduced precision data format 1 2 reduced 0 normal uintl6 avg factor Set the averaging factor 0 1 1 2 2 4 3 8 etc DOCFGLAYER 211 pDQCFGLAYER 211 Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap3 fm DNx Al 211 Analog Input Board Chapter 3 20 Programming with the Low Level API lt mask gt flag bits that select w
15. provided define DQ 211 MAIN FLOW OFF 0 define DQ 211 MAIN FLOW ON 1 lt sec_enbs gt provides control over the secondary A D converter used by the visual alarm LED function When the DOAT211 SECENBSSET flag bit is set in mask the value in lt sec_enbs gt is set The following defines are provided define DQ 211 SEC ENB OFF 0 SECondary converter OFF define DQ 211 SEC ENB LED Ox1 SEC converter updates LED comparison The converter must be turned on using the DQ 211 SEC ENB LED value in order for the visual alarm LED to function lt secn gt This value sets the number of main converter reads per secondary converter read When the DQAI211 SECNSET flag bit is set in mask the value in secn is set The following defines are provided define DQ 211 SEC N STD 100 Number of main reads per SECondary read define DQ 211 SEC N OFF 0 Disable secondary data flow The secondary converter s monitoring of the status of the IEPE sensor connection for the setting of the visual alarm LED does not need to occur at the same rate as the primary A D converter This setting allows the user to set the rate at which the secondary converter does this monitoring The secondary data is also transferred across the isolation barrier at this same rate to be made available for some special functions
16. 4600 Date June 2009 www ueidaq com Vers 1 3 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter1 4 Introduction Figure 1 1 is a photo of the DNA AI 211 Layer board and its associated DNA ACC 211 breakout board 120 pin DNA A bus connector DNA ACC 211 Breakout Board DB 37 female 37 pin I O connector Channel 0 Figure 1 1 DNA AI 211 Layer and DNA ACC 211 Breakout Board The DNR AI 211 Layer is functionally identical to the DNA model except for the bus connector the DNR plugs directly into the backplane in a RACKtangle rack mounted chassis instead of a PowerDNA Cube Lu M Q 1 Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter1 5 Introduction 1 3 Sensor Input The measurement signal from an IEPE or ICP vibration sensor is an AC wave Circuit form superimposed on a DC voltage The DC voltage is produced by applying excitation from a constant current source to the sensor terminals so as to gener ate a voltage drop across the sensor This voltage which has a DC component bias from the constant current source and an AC component produced by the sensor is then fed to the input of the Al 211 analog input board The AI 211 then filters the signal removi
17. 5 is high the channel 0 Green LED will be on OK If Pin 36 is brought high the Channel 0 Red LED will be on If both are high the LED will be orange However this is not a valid state on the AI 211 The valid states are green solid red flashing red Figure 1 4 DB 37 I O Connector Pinout Copyright 2009 all rights reserved United Electronic Industries Inc Tel 508 921 4600 Date June 2009 Vers 1 3 File Al 211 Chap1 fm www ueidaq com DNx Al 211 Analog Input Board Chapter 1 9 Introduction Pinout of the DNA ACC 211 breakout board is shown in Figure 1 5 Pinout Diagrams I O Connectors are female 10 32 UNF coaxial connectors Channel 1 DNA ACC 211 Bea LED Indications Green OK Solid Red Open Sensor Top View Channel 2 Flashing Red Shorted Sensor 5 Ch 2 status LED Channel 3 c 3 status LED Figure 1 5 DNA ACC 211 Connector Pinout 1 6 Jumper Figure 1 6 shows the physical layout of DNA AI 211 Base Board Settings for DNA PL 601 highlighted to show the 16 pin jumper block for setting the board Board position within the PowerDNA Cube Position NOTE Board position jumpers are not provided with the DNR versions of the Al 211 The physical position of the board within the DNR RACKtangle enclosure is determined automatically by the system Eu MMM MPH 1 Copyright 2009 a
18. 8 define DQ 211 CLK SYNCO BUS 0x8 define DQ 211 CLK SYNC1 BUS 0x9 define DQ 211 CLK SYNC2 BUS 0xa define DQ 211 CLK SYNC3 BUS 0xb clkdiv This value sets the clock divider used to set the rate of the A D conversion The maximum allowable frequency to pace the main A D is 1Mhz Do not use values less than 65 when 66MHz is selected or less than 23 when 24MHz is selected The output frequency is c1ksrc clkdiv 1 Max value is 1023 When the DOAI211 CLKDIVSET flag bit is set in mas k gt the value in lt clkdiv gt is set The default value is 65 lt fmtr gt This value sets a reduced precision mode reserved for special applications When the DQAI211 FMTRSET flag bit is set in mask the value in lt fmtr gt is set The following defines are provided define DQ 211 FMTR NORMAL 0 define DQ 211 FMTR REDUCED 1 The default value is DO 211 FMTR NORMAL avg factor This value sets the amount of averaging performed The number of samples averaged together is always a power of 2 Setting avg factor to zero gives no averaging Setting avg factor to 1 gives 2 samples averaged setting 2 averages 4 samples 3 averages 8 etc The maximum value for avg factor is 15 which averages 32 768 samples When the DQAI211 AVGFACTORSET flag bit is set in mask the value in avg factor isset The ipeum Er P a n L M MR M
19. Al 211 Chap3 fm DNx Al 211 Analog Input Board Chapter 3 18 Programming with the Low Level API define DQ 211 HPF 1 HZ 1L 2 1 0 Hz cutoff high pass filter fdefine DQ 211 HPF 10 HZ 1L 3 10 Hz cutoff high pass filter offset sets the control settings for a test mode This is not normally set by a user When the DQAI211 OFFSETSET flag bit is set in mask the value in offset is set The following defines are provided define DQ 211 OFFSET TEST ON 1 test mode on define DQ 211 OFFSET TEST OFF 0 test mode off default value When the combination of DO 211 BIAS OFF and DQ 211 OFFSET TEST ON occurs the system internally grounds the sensor input for adjustment purposes No sensor connections are allowed at this time lt anafilt gt sets the 48KHz analog filter ON or OFF When the DOAI211 ANAFILTSET flag bit is set in mask the value in lt anafilt gt is set The following defines are provided define DQ 211 ANALOG FILTER ON 1 define DQ 211 ANALOG FILTER OFF 0 lt main_enb gt provides additional control over the main A D converter for special applications Control for the main converter is normally provided automatically by the DgAdv211Read or the ACB and DMap control functions When the DOAT211 MAINENBSET flag bit is set in lt mas k gt the value in lt main_enb gt is set The following defines are
20. GAL HANDLE Illegal IOM Descriptor or communication wasn t established DQ BAD DEVN Device indicated by devn does not exist or is not an Al 211 DQ BAD PARAMETER No channel specified decimation ratio is illegal value tapsize is illegal value or data is NULL DQ SEND ERROR Unable to send the Command to IOM DQ TIMEOUT ERROR Nothing is heard from the IOM for timeout duration GI DQ IOM ERROR Error occurred at the IOM when performing this command DQ SUCCESS Successful completion Other negative values Low level IOM error Description This function can be used to perform all FIR configuration and control functions for the Al 211 In the normal case these configuration settings are set automatically by the DqAcbInitOps function Use these settings to override standard behavior for special applications The user may configure as many parameters as he chooses Any parameter that is not enabled by a mask bit will retain its present value channel parameter indicates which channels will get their FIR configuration changed The following flags are defined Copyright 2009 all rights reserved United Electronic Industries Inc Vers 1 3 File Al 211 Chap3 fm Tel 508 921 4600 Date June 2009 www ueidaq com 21 DNx Al 211 Analog Input Board Chapter 3 Programming with the Low Level API
21. Setting the value to DO 211 SEC N OFF disables the transfer of this data but does not inhibit the functioning of the visual alarm LED The DQ 211 SEC N STD define is the recommended setting for this value but it may be set to any value from zero to 32 767 Function DqAdv211SetCfgLayer Copyright 2009 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap3 fm DNx Al 211 Analog Input Board Chapter 3 19 Programming with the Low Level API Syntax int DqAdv211SetCfgLayer int hd int devn pDOCFGLAYER 211 ldata Command DOE Input int hd Handle to the IOM received from DqOpenI OM int devn Layer inside the IOM pDOCFGLAYER 211 Pointer to 211 layer config structure see below ldata Output None Return DOQ NO MEMORY Error allocating buffer DQ ILLEGAL HANDLE lllegal IOM Descriptor or communication wasn t established DQ BAD DEVN Device indicated by devn does not exist or is not an Al 211 DQ BAD PARAMETER One of the values in the pDOCFGLAYER 211 structure is set to an illegal value DO SEND ERROR Unable to send the Command to IOM DQ TIMEOUT ERROR Nothing is heard from the IOM for timeout duration DQ IOM ERROR Error occurred at the IOM when performing this command DQ SUCCESS Successful completion Other negative Low
22. ZX United Electronic wy Industries The High Performance Alternative DNR DNA AI 211 Vibration Sensor Interface Boards User Manual 24 bit 4 channel IEPE ICP 2 wire Accelerometer Input Boards for the PowerDNA and UElLogger Cubes and the PowerDNR RACKtangle System June 2009 Edition PN Man DNx AI 211 0609 Version 1 3 Copyright 1998 2009 United Electronic Industries Inc All rights reserved No part of this publication may be reproduced stored in a retrieval system or transmitted in any form by any means electronic mechanical by photocopying recording or otherwise without prior written permis sion Information furnished in this manual is believed to be accurate and reliable However no responsibility is assumed for its use or for any infringements of patents or other rights of third parties that may result from its use All product names listed are trademarks or trade names of their respective companies See UEI s website for complete terms and conditions of sale http www ueidaq com company terms aspx Contacting United Electronic Industries Mailing Address 27 Renmar Avenue Walpole MA 02081 U S A For a list of our distributors and partners in the US and around the world please see http www ueidaq com partners Support Telephone 508 921 4600 Fax 508 668 2350 Also see the FAQs and online Live Help feature on our web site Internet Support Supportsupport ueidaq com Web Sitewww ueidaq
23. and as in the following exam ple You can instruct users how to run setup using a command such as setup exe Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter 1 Introduction 1 2 The This manual describes the DNx Al 211 24 bit 4 channel IEPE ICP Vibration DNx AI 211 Sensor Interface Board Layer It also describes the DNA ACC 211 breakout Analog Input board with four 10 32 UNF coaxial channel connectors and sensor status indica Layer tor LEDs The technical specifications for the DNx Al 211 Analog Input Layer are listed in Table 1 1 Technical Specifications Number of channels Configuration 4 Two wire ICP IEPE or Voltage Sampling Simultaneous if sampled at identical freq Isolation 350 VDC chan to chan and chan to chassis Input Specifications Resolution 24 bits Signal to Noise Ratio 109 dB at max sample rate Total Harmonic Distortion 108 dB typical at 1 kHz Sample Rate 1 SPS to 125 kSPS 500 kSPS per board nput Coupling DC or AC 1 Hz 1 0 Hz or 10 Hz HP filter nput Ranges 25 13 12 5 5 0 2 5 nput Impedance 10 MOhm minimum 40 pF max Offset Error lt 0 1 mV 5 uV per C Gain Error 0 1 typ lt 0 5 5 ppm per C ntegral Nonlinearity INL Anti Aliasing Filtering inc Filter Cutoff
24. com FTP Siteftp ftp ueidaq com Product Disclaimer WARNING DO NOT USE PRODUCTS SOLD BY UNITED ELECTRONIC INDUSTRIES INC AS CRITICAL COMPO NENTS IN LIFE SUPPORT DEVICES OR SYSTEMS Products sold by United Electronic Industries Inc are not authorized for use as critical components in life support devices or systems A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Any attempt to purchase any United Electronic Industries Inc product for that purpose is null and void and United Electronic Industries Inc accepts no liability whatsoever in contract tort or otherwise whether or not resulting from our or our employees negligence or failure to detect an improper purchase Chapter 1 Introduction 0 0 ee 1 1 1 Organization i ox anette a wat ee ka Pe nea We es Rene afta PAAR A ee dip 1 1 2 The DNx Al 211 Analog Input Layer 3 1 3 Sensor Input Circuit 000 aE a pi a ea aa E a a w O EA 5 1 4 Device Architectures sarsan tapuna e Ea LENA ILES E 5 1 5 Layer Connectors and Wiring 00 7 1 5 1 Antialiasing Filters 2 0 0 eee 7 1 5 2 Data Handling liiliiielee eee 8 1 5 3 LEDS CES 8 1 5 4 DNA ACC 211 Breakout Board lisse 8 1 5 5 onn cH ae beta eh ee aun eed a bean tee 8 1 6 Jumper Settings for Board Position
25. d into a DNA Cube in adjacent slot positions you must use special care and hardware supplied with the units in mounting the associated ACC 211 boards so as to avoid short cir cuits between coaxial connector on adjacent boards To do this refer to Figure A 2 and execute the procedure described below NOTE This procedure and hardware are not required with the DNR AI 211 mounted in a RACKtangle enclosure because spacing between board positions is greater ACC 211 board in top position ACC 211 a in middle position LED 10 32 UNF Connector Insert screw for top most board o QT ZERE a 7 washer ES Standoff C 0 1 of 4 M washer I a Standoff C 0 1 of 4 ACC 211 board in bottom position STEP 1 STEP 2 STEP 3 STEP 4 A 2 Other Accessories Copyright 2009 all rights reserved United Electronic Industries Inc uz 7 nut for bottom board PC Board Figure A 2 Mounting Multiple DNA ACC 211 Breakout Boards If multiple ACC 211 breakout boards are being used pre assemble them before attaching them to the DNA AI 211 boards in the Cube Pre assemble the multiple ACC 211 boards by mounting standoffs washers nuts and retaining screws at each corner of the board as shown in Figure A 2 Be sure to use a screw in the top most beakout board and a nut for the b
26. ed to enable or bypass the FIR filter when a custom FIR filter has been loaded When standard default settings are used the system will automatically load and enable the FIR filter No additional enabling is required TheAI211 FIRFIRST ENABLE and AI211 FIRFIRST DISABLE defines are used to set the order in which the FIR filtering and the averaging takes place When standard default settings are used the system will automatically set the FIR filtering to occur first lt decrat gt parameter sets the decimation rate Zero no decimation Setting a value of 1 discards one reading for every one kept two discards two readings for every one kept etc When the AI211 FIR SET DECIMATION RATE flag bit is set in mask parameter the value in lt decrat gt is set The default value is zero tapsize and lt data gt parameters are used to load user defined filter coefficients to the selected FIR filters tapsize is the number of coefficients expected in the array of double precision coefficients pointed to by lt data gt The coefficients should be in the 1 0 1 0 range The sum of all the taps should equal 1 0 When the AT211 FIR COEFF LOAD flag bit is set in the mask parameter the lt tapsize gt and lt data gt values are set Function DqAdv211SetPIl Syntax int DgAdv211SetPll int hd int devn double samplerate double sr actual int avg fac
27. efine DOAI211 BIASDRIVESET 1L 0 1 to set biasdrive parameter define DQAI211 BIASONOFFSET 1L lt lt 1 1 to set biasonoff parameter define DQAI211 COMPHISET 1L 2 1 to set comphi parameter define DQAI211 COMPLOSET 1L 3 1 to set complo parameter define DQAI211 ALARMCTRLSET 1L 4 1 to set alarmctrl parameter define DOAI211 HPFSET 1L 5 1 to set hpf parameter define DOAI211 OFFSETSET 1L 6 1 to set offset parameter define DQAI211 ANAFILTSET 1L 7 1 to set anafilt parameter define DOAI211 MAINENBSET 1L 8 1 to set main enb parameter define DQAI211 SECENBSSET 1L 9 1 to set secenbs parameter define DQAI211 SECNSET 1L 10 1 to set secn parameter ENESCOUSURG I C c ww s e m c C m r A wc co g H P L a Copyright 2009 all rights reserved United Electronic Industries Inc Tel 508 921 4600 Date June 2009 Vers 1 3 File Al 211 Chap3 fm www ueidaq com DNx Al 211 Analog Input Board Chapter 3 17 Programming with the Low Level API The DQAT211 CFGCH DEFAULTSET flag bit is used to easily set all of the channel configuration values to their default state Before setting up a custom configuration it is recommended you first set all channels to their default state by setting lt channels gt toAI211 SEL CHAN ALL setting mask to DQAI211 CFGCH DEFAULTSET a
28. es for the Al 211 The returned average factor should be sent to the Al 211 layers using the DqgAdv211SetCfgLayer function as follows DOCFGLAYER 211 ldata ldata mask DQAI211 AVGFACTORSET DQAI211 FIR BY AVG SET LDATA AVG FACTOR uintl6 average factor DqAdv211SetCfgLayer hd0 DEVN amp ldata The Config word used by the second parameter of DgAcbInitOps must enable the PLL clock by specifying the DO LN CVCKSRC1 constant For example define CFG211 DQ ENABLED N DO LN ACTIVE DO LN GETRAW DO LN IROEN DQ LN CVCKSRC1 DO LN STREAMING DQ FIFO MODEFIFO Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap3 fm 23 DNx Al 211 Analog Input Board Appendix A Accessories A 1 DNA ACC The DNA ACC 211 Breakout Board is an easy to use versatile accessory for 211 direct connection of piezoelectric and other 2 wire vibration sensors to the DNx Breakout Al 211 board It can accept signals from 4 ICP IEPE and other vibration sen Board sors Since the Breakout Board is supplied with a DB 37 board mounted connector that mates directly with the I O connector on a DNA AI 211 or DNR AI 211 board it can be plugged directly into the DB 37 connector of the 211 board A photo of the device is shown in Figure A 1 below m d DB 37 I O Connector Annunciator LEDs 1 per channel red green 10 32 UNF Coaxial Connect
29. her open or shorted It continuously measures the voltage on each channel and compares it to a low and high comparator values When the value read is within the range the LED on the terminal block is green When the value is out of range the LED changes to flashing red By default a session is configured with the low comparator set to 1 0V and the high comparator set to 24V You can change the comparator values using the following methods on any of the channel object instances Get channel 0 object CueiAccelChannel pChan dynamic cast CueiAccelChannel session GetChannel 0 Update comparator values pChan gt SetLowExcitationComparator 5 0 pChan SetHighExcitationComparator 15 0 You can configure the Al 211 to run in simple mode point by point buffered mode ACB mode or DMAP mode n simple mode the delay between samples is determined by software on the host computer n buffered mode the delay between samples is determined by the Al 211 on board clock and data is transferred in blocks between Pow erDNA and the host PC n DMAP mode the delay between samples is determined by the Al 211 on board clock and data is transferred one scan at a time between Pow erDNA and the host PC The following sample shows how to configure the simple mode Please refer to the UeiDagq Framework User Manual to learn how to use the other timing modes session ConfigureTimingForSimpleIlO Reading analog
30. hich parameters will be written The following flags are defined define DQAI211 CLKSRCSET 1L 0 1 if clksrc contains valid data define DQAI211 CLKDIVSET 1L 1 1 if clkdiv contains valid data define DQAI211 FMTRSET 1L 2 1 if fmtr contains valid data define DQAI211 AVGFACTORSET 1L 3 1 if avg factor contains valid data define DQAI211 FIR BY AVG SET 1L 5 Set default FIR to follow averaging define DQAI211 CFGLAYER DEFAULTSET 1L 4 1 to set default state The DQAI211 CFGLAYER DEFAULTSET flag bit is used to easily set all of the layer configuration values to their default state Before setting up a custom configuration it is recommended you first set all values to their default state by setting lt ma sk gt to DOAI211 CFGLAYER DEFAULTSET and calling DqAdv211SetCfgLayer When DQAI211 CFGLAYER DEFAULTSET is set all other mask flag bits are ignored clksrc This value selects the source of the clock to be used to pace the A D conversion on the layer This clock source is routed to the clock divider that is set by c1kdiv below When the DQAI211 CLKSRCSET flag bit is set in mask the value in c1ksrc is set The following defines are provided define DQ 211 CLK 66MHZ 0 define DQ 211 CLK 24MHZ 0x10 define DO 211 CLK SYNC2 0x1
31. it is easier to use You should need to use the low level API only if you are using an operating sys tem other than Windows The low level functions for an Al 211 layer are described below DNA AI 211 Layer Functions Function DqAdv211Read Syntax int DqAdv21lRead int hd int devn int CLSize uint32 cl uintl16 bData double fData Command DOE Input int hd Handle to the IOM received from DqOpenlOM int devn Layer inside the IOM int CLSize Number of channels uint32 cl Pointer to channel list uint32 bData Pointer to raw data received from device double fData Pointer to store converted voltage data NULL if not required Output uint32 bData Raw data received from device double fData Converted voltage data Return DQ NO MEMORY Error allocating buffer DQ ILLEGAL HANDLE Illegal IOM Descriptor or communication wasn t established DQ BAD DEVN Device indicated by devn does not exist or is not an Al 211 DQ BAD PARAMETER CLSize is not between 1 and DO MAXCLSIZE bData is NULL or a channel number in c1 is too high DO SEND ERROR Unable to send the Command to IOM DQ TIMEOUT ERROR Nothing is heard from the IOM for timeout duration DQ IOM ERROR Error occurred at the IOM when performing this command DQ SUCCESS Other negative values Co
32. ll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter 1 10 Introduction See Figure 1 7 for placement of jumpers for various board positions in a Cube Figure 1 6 Jumper Block for DNA AI 211 Board Position 1 6 0 1 Jumper A diagram of the jumper block is shown in Figure 1 7 To set the board position Settings jumpers place jumpers as shown in Figure 1 7 NOTE Since all boards are assembled in Cubes before shipment to a customer you should never have to change a jumper setting unless you change a board from one layer position to another in the field Layer s Position as marked on the Faceplate 1 01 I O 2 I 03 1 04 1 05 I 06 9 10 o o oo o o oo ca oo 11 12 ox Cx oo oo cu can 13 14 o o o o o o o o oo oo 15 16 cx cx cx cx cx cx All I O Layers are sequentially enumerated from top to the bottom of the Cube o o Open Closed Figure 1 7 Diagram of DNA AI 211 Board Position Jumper Settings Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter 2 Programming with the High Level API Chapter 2 Programming with the High Level API 2 4 Creating a Session 2 2 Configuring the Resource String Copyright 2009 all
33. nd calling DgAdv211SetCfgChannel lt biasdrive gt sets the amount of drive current for the iepe sensor When the DQAI211 BIASDRIVESET flag bit is set in mask the lt biasdrive gt value is set The following scaling macro is defined to allow for easy translation to the correct values define DQ211 DRIVE CURRENT I 1 8 0 255 drive current scaling macro The driver accepts values from zero to 255 which map to drive currents from zero to 8mA Values less than zero or greater than 8 0 will return an error lt biasonoff gt Turns the drive current for the iepe sensor on or off When the DQAI211 BIASDRIVESET flag bit is set in mask the value in lt biasonoff gt is set The following two values are defined for this purpose define DQ 211 BIAS ON 1 define DQ 211 BIAS OFF 0 lt comphi gt sets the 12 bit comparison value for the open sensor detector When the DQAI211 COMPHISET flag bit is set in mask the value in lt comphi gt is set Two defines are provided define DQ 211 COMP HI STD 0xfa0 standard value for doing comparison define DQ 211 COMP HI DEFAULT 0O0xfff default value disables comparison It is suggested you keep the values between Oxf00 and Oxff0 Setting a value of Oxfff will turn the comparison off lt complo gt sets the 12 bit comparison value for the shorted sensor detector When the
34. ng the DC bias if necessary as described in the next section and passes it to an AD converter and then to an FPGA which filters it further 0 5 8 mA Constant Current Bias 25VDC Piezoelectric Sensor Voltage Input to Layer GND Figure 1 2 Typical Measuring Circuit for a Vibration Sensor 1 4 Device The DNx Al 211 Vibration Sensor Interface board has four individual channels Architecture electrically isolated from each other and from the Cube The product consists of three PC boards 1 PL 601 base board 2 an Al 211 daughter board plugged into the base board and 3 a DNA ACC 211 breakout board that plugs directly into the 37 pin I O connector on the base board The function of the breakout board is to provide four 10 32 UNF coaxial connectors and status indicator LEDs for the four vibration sensor inputs FEIER ON RR ERE NN NER KD REV NEL CREER u a DSOR EANC CNN DIM M N T v n Copyright 2009 alll rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm DNx Al 211 Analog Input Board Chapter1 6 Introduction A Block Diagram of the board layer is shown in Figure 1 3 Channel 0 FIR Filter Unit V I converter DAC for bypass monitor bias current gt Calibration DAC Alarm LEDs Control Logic Analog Secondary ADC Digital FIR Decimator
35. ors 1 per channel M Retaining Screw Channel 0 Figure A 1 Photo of DNA ACC 211 Breakout Board oa UO a aa a E E l Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 App A fm DNx Al 211 Analog Input Board The Technical Specifications for the DNA ACC 211 are listed in the table below Table 4 1 DNA ACC 211 Specifications Item Specification No of channels 4 Connector Type Standard 10 32 UNF coaxial connectors Annunciator LEDs 1 per channel red green next to UNF connectors States Indicates Green OK Solid Red Open Sensor Flashing Red Shorted Sensor Off No bias current Orange red green Not a valid state ESD Protection 15 kV Operating Temperature Tested 40 C to 85 C Vibration IEC 60068 2 6 5 g 10 500 Hz sinusoidal IEC 60068 2 64 5 g rms 10 500 Hz broadband random Shock IEC 60068 2 27 50 g 3 ms half sine 18 shocks 6 orientations 30 g 11 ms half sine 18 shocks 6 orientations Humidity 0 to 95 non condensing Altitude 0 to 70 000 feet Isolation 350 VDC chan to chan chan to chassis Copyright 2009 all rights reserved Tel 508 921 4600 www ueidag com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 App A fm 4 1 1 Mounting Multiple DNA ACC 211 Boards DNx Al 211 Analog Input Board If your installation uses multiple DNA Al 211 boards inserte
36. ottom board When pre assembly is complete carefully plug the assembled breakout boards into the DB 37 I O Connectors on the DNA AI 211 boards mounted in the Cube and tighten the retaining screws on the I O connectors Inspect the final assembly to verify that no shorts exist between the 10 32 UNF coaxial connectors on adjacent boards In addition to the DNA ACC 211 breakout board the following cable is available for the Al 211 layer e DNA CBL BNC Cable 2 foot coaxial cable with a 10 32 UNF male connector on one end and a full size male BNC Cable Adaptor connector on the other end Use for connecting a piezoelectric vibration sensor to the DNA ACC 211 break out board Tel 508 921 4600 www ueidaq com Vers 1 3 Date June 2009 File AI 211 App A fm DNx Al 211 Analog Input Board 27 A 3 Layer Please note that once you perform layer calibration yourself the factory calibra Calibration tion warranty is void For Al 211 layers we recommend annual factory recalibra tion at UEI Lo P H n Q i s EE Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 App A fm A Annunciator LEDs 8 Antialiasing Filters 7 Architecture 5 B Block Diagram 6 C Calibration 27 Connector DB 37 8 Connectors 8 D Digital Filter 7 DNA ACC 211 Breakout Board 8 DNA ACC 211 Connector Pinout
37. pyright 2009 all rights reserved United Electronic Industries Inc Successful completion Low level IOM error Tel 508 921 4600 Date June 2009 Vers 1 3 File Al 211 Chap3 fm www ueidaq com 14 Description DNx Al 211 Analog Input Board Chapter 3 15 Programming with the Low Level API When this function is called for the first time the firmware stops any ongoing operation on the device specified and reprograms it according to the channel list supplied This function uses a fixed CL update frequency 1953Hz Thus the user cannot perform this function call when the layer is involved in any streaming or data mapping operations If the user specifies a short timeout delay this function can time out when called for the first time because it is executed as a pending command and layer programming takes up to 10ms Once this function is called the layer continuously acquires data and every call to the function returns the latest acquired data If you would like to cancel ongoing sampling call the same function with Oxffffffff as a channel number Function DqAdv211SetCfgChannel Syntax int DqAdv211SetCfgChannel int hd int devn pDQCFGCH 211 cdata Command DOE Input int hd Handle to the IOM received from DqOpenlOM int devn Layer inside the IOM pDOCFGCH 211 cdata Pointer to 211 channel config structure see below Output None Return DQ NO MEMORY
38. rights reserved United Electronic Industries Inc This section describes how to program the DNx Al 211 using the UeiDaq Framework API As UeiDaq Framework is object oriented its objects can be manipulated in the same manner from different development environments such as Visual C Visual Basic or LabVIEW The following section focuses on the C API but the concept stays the same no matter what programming language you use Please refer to the UeiDaq Framework User Manual to get more information on using other programming languages The Session object controls all operations on your device Therefore the first task is to create a session object CUeiSession session Framework uses resource strings to select which device subsystem and chan nels to use within a session The resource string syntax is similar to a web URL device class gt lt IP address gt lt Device Id gt lt Subsystem gt lt Channel list gt For PowerDNA the device class is pdna For example the following resource string selects analog input channels 0 1 on device 1 at IP address 192 168 100 2 pdna 192 168 100 2 Dev1 Ai0 1 Use the method CreateAccelChannel to program the advanced features of the Al 211 such as the coupling low pass filter sensor sensitivity and excita tion current The following call configures all analog input channels of a Al 211 set as device 1 session CreateAccelChannel pdna 192 168 100 2 Dev1 A
39. rs 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap1 fm 1 5 1 5 1 Layer Connectors and Wiring Antialiasing Fliters Copyright 2009 all rights reserved United Electronic Industries Inc DNx Al 211 Analog Input Board Chapter 1 Introduction As shown in the Block Diagram of Figure 1 3 four constant current sources pro vide excitation current for each of the four vibration sensor channels This 0 to 8 mA excitation current which can be user set within 1 is used to bias the AC signal from the vibration sensor The excitation current is produced by a user programmable DAC that outputs a voltage to a V I converter to generate a constant current This excitation current is continuously monitored controlled and can be switched on and off on a per channel basis The monitoring circuit uses a second 10 bit ADC that feeds back the reading to the control logic FPGA which in turn sets the DAC The voltage from the secondary ADC is also used to turn status LEDs on off as the excitation current changes value The status LEDs associated with each channel are mounted on the DNA ACC 211 breakout board as described below When excitation is switched off the channel can be used for sensing normal analog voltage inputs same voltage ranges as with vibration sensors The board is specifically designed however to connect to Industry standard ICP and IEPE 2 wire piezoelectric vibration sensors when excitation is s
40. short or off normal condition in any channel A two color LED mounted on the ACC board next to each UNF connector indicates the current status of its associated measurement channel Green indicates OK red signifies an open circuit and flashing red means a short circuit exists The DNA ACC 211 breakout board provides four standard 10 32 UNF coaxial connectors one for each input circuit The DNA ACC 211 is designed for oper ation in harsh environments and has been tested for operation at 5g vibration 50g shock 40 to 85 C temperature and altitude up to 70 000 feet If you need a full size BNC connector for your input specify an accessory cable type DNA CBL BNC for each such input Each cable is 2 feet long and has a 10 32 UNF coaxial connector on one end and a full size BNC connector on the other end The pinout of the 37 pin connector for the DNx Al 211 Layer board is shown in Figure 1 4 A physical layout of the board is shown in Figure 1 1 on page 4 NIC CH 3 Low CH 3 LED ret CH 3 LED ret NIC CH 2 Low CH 2 LED ret CH 2 LED ret NIC NIC CH 1 Low CH 1 LED ret CH 1 LED ret NIC CH 0 Low CH 0 LED ret CH 0 LED ret NIC NIC NIC CH 3 Hi CH 3 Green LED CH 2 Red LED NIC CH 2 Hi CH 2Green LED CH 2 Red LED NIC NIC CH 1Hi CH 1 Green LED CH 1Red LED NIC CH 0 Hi CH 0 Green LED CH 0 Red LED NIC 1 2 3 4 5 6 7 8 Note An LED pin brought high turns on the LED For example if Pin 3
41. t int line Command DQE Copyright 2009 all rights reserved Tel 508 921 4600 www ueidaq com Vers 1 3 United Electronic Industries Inc Date June 2009 File Al 211 Chap3 fm 22 DNx Al 211 Analog Input Board Chapter 3 Programming with the Low Level API Input int hd Handle to the IOM received from DqOpenIOM double samplerate Desired sampling rate int line Sync line to assign signal Output double sr actual Actual sample rate int avg fact Required averaging factor for Al 211 layer Return DQ BAD PARAMETER Requested sample rate is too high or too low DQ SEND ERROR Unable to send the Command to IOM DQ TIMEOUT ERROR Nothing is heard from the IOM for timeout duration DQ IOM ERROR Error occurred at the IOM when performing this command DQ SUCCESS Successful completion Other negative Low level IOM error values Description The PLL clock circuit on the CPU layer will be programmed and routed by this function The PLL may be routed by way of the sync 1 or sync 3 lines by using the DO EXT SYNC1 or DQ EXTSYNC3 constants for the line parameter The AI 211 uses clock rates that are higher than the sampling rate and also uses data averaging to increase resolution The function will calculate the correct clock and averaging valu
42. vxQ 3 100 0 low limit 100 0 high limit 24 0 sensor sensitivity 5 0 excitation current UeiCouplingAC coupling true low pass filter It configures the following parameters Low Limit the minimum expected measurement The unit is the same as the sensor sensitivity unit The low limit combined with the high limit determines which gain will be configured e High Limit the maximum expected measurement The unit is the same as the sensor sensitivity unit The low limit combined with the high limit determines which gain will be configured Tel 508 921 4600 www ueidag com Vers 1 3 Date June 2009 File Al 211 Chap2 fm 11 2 3 Configuring the Timing 2 4 Reading Data Copyright 2009 all rights reserved United Electronic Industries Inc DNx Al 211 Analog Input Board Chapter 2 Programming with the High Level API Sensor Sensitivity The sensor sensitivity Its unit determines the unit of the measurements For example if the sensitivity is specified in mV g the measurements will be returned in number of g e Excitation Current the excitation current used to power the IEPE sensor Coupling Configures the high pass filter DC coupling disables the fil ter AC coupling enables a 0 1Hz high pass filter Low pass Filter Enables or disables the low pass analog filter Cut off frequency is 48kHz The Al 211 is equipped with alarm circuitry that can notify you when the connec tion to a sensor is eit
43. witched on Each channel has its own 24 bit successive approximation A D converter and all four channels can be sampled simultaneously at their maximum speed of 125 kSPS 500 kSPS total throughput Use of the standard trigger sync interface of the Cube or RACKtangle lets you synchronize other boards and other Cubes with this one for simultaneous sampling of all inputs Each of the four input channels is electrically isolated transformer isolation from the other channels and from the chassis The AC signal from the vibration sensor is biased by the DC excitation signal and then passed through a high pass filter with programmable cutoff frequen cies 0 0 1 1 0 or 10 Hz and a 4 tap analog low pass filter 48 kHz on or off to attenuate the natural resonant frequency of the sensor and perform anti alias ing filtering It is then passed to the PGA and to the 24 bit SAR A D Converter which also provides automatic averaging over 8 readings Since aliasing is a common problem with vibration or accelerometer measure ments UEI uses two types of anti aliasing filters digital and analog to achieve the desired response The 4 pole fixed analog filter placed ahead of the A D Converter and set at 48 kHz removes aliasing errors from 50 kHz and up This filter has a 24 dB octave rolloff which means that there are 3 3 octaves between 48 kHz and the 500 kHz non aliasing Nyquist limit of the 1 MHz A D converter Therefore the effect of any alasing error

UEI-AI-211-manual

Contents

Download Pdf Manuals

Related Search

Related Contents