Multimedia Processor for Mobile Applications (EMMA
Contents
1. TM EN 7 1 Timer count Timer count Timer value TO EN 1 cleared cleared set 7 TSTART 1 TCR CLR 7 1 TCR CLR 1 peri nnn nnn Ann nnn Timer value 9 setting register eet i Note Note 2 Real count a 0 1 2 3 4 m n nn nnnnnn TOUT pin 1 This bit is automatically cleared to 0 after the timer count value is cleared TCR CLR 1 Notes 1 Registers are set in synchronization with PCLK and real counting occurs in synchronization with TIN PCLK and TIN are asynchronous 2 After the timer count value is cleared the timer count is actually cleared one PCLK cycle two or three TIN cycles later because the value is specified to be cleared in synchronization with PCLK but is actually cleared in synchronization with TIN 3 When the timer count value is cleared the signal is output from the register for one PCLK cycle and clearing takes effect in synchronization with TIN this takes three cycles Next a clear signal in synchronization with TIN is output for one cycle and is synchronized with PCLK again this takes four cycles The timer clear register is then cleared to 0 and the clear operation is complete Therefore a timer count that is cleared within five PCLK cycles four TIN cycles is ignored For the watchdog timer set the timer value setting register TMSET bits to a value of at least 5 PCLK cycles 4 TIN cycles User s Manual S19266EJ3V0UM 21 C2. Caution Before setting values in this register read the TM SCLR bit of the timer value setting monitor register xxx SCLR xxxx xx14H confirm that the LSB of the read value is 0 and then wait for at least two or three TIN clock cycles 14 User s Manual S19266EJ3VOUM CHAPTER 2 REGISTERS 2 2 4 Real count read register This register xxx_RCR xxxx_000CH is used to read the real count registers current timer value 31 30 29 28 27 26 25 24 RCR_31 RCR_30 RCR_29 RCR_28 RCR_27 RCR_26 RCR_25 RCR_24 23 22 21 20 19 18 17 16 RCR_23 RCR_22 RCR_21 RCR_20 RCR_19 RCR_18 RCR_17 RCR_16 15 14 13 12 11 10 9 8 RCR_15 RCR_14 RCR_13 RCR_12 RCR_11 RCR_10 RCR_9 RCR_8 7 6 5 4 3 2 1 0 RCR_7 RCR_6 RCR_5 RCR_4 RCR_3 RCR_2 RCR_1 RCR 0 RCR 31 0 LS kamt 8e si Used to read the real count register values 2 2 5 Timer value setting monitor register This register xxx SCLR xxxx 0014H is used to monitor the timer value setting 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 Reserved N o oa A wo N E P Reserved Name R W Bit After Reset Function Reserved Reserved TM SCLR 31 1 0 TM SCLR R W 0 0 Monitors the timer value setting This bit holds 1H until a count value is set to the timer value setting register After a value is set this bit is automatically reset to OH Remarks 1 This bit is not automatically reset to O when the TM EN bit of the timer operation reg
3. 5 erre eege CERN sade aea rmn R nnmnnn 16 CHAPTER 4 USAGE atc ee A c Trade te CE eae a Drago CH VE De De eegene 17 4 1 Starting Ierger eege SEENEN 17 4 2 Pausing the Titer ceecccceeeeeceeeeeee eee eeneee seen neee eee neee enne nnne nnn see nnn n inse ne tn nasa sn nnmnnn nnmnnn nnmnnn nnn 19 43 Stopping EM H E 20 4 4 Clearing the Timer Count Value Timer cccecceseeeseeeceeseeeeeeeeeseeseseaeseseeeeeeeeeeseaesesneeeeseeeeeas 21 4 5 Rewriting the Timer Count Value cccsecesseeeeeeeeseeeseseeeenseeeeseaesesaaeseseeeeeeeeeseeeseseaeeeeseeeneas 22 User s Manual S19266EJ3VOUM 7 Figure No Figure 1 1 Figure 4 1 Figure 4 2 Figure 4 3 Figure 4 4 Figure 4 5 LIST OF FIGURES Title Page ATM PTX Block Diagram i eoe natem eer a raa A 10 Starting the Timer i oo REESE uieeiu iive 17 Pa sing thie Ier sse mei t et hs e ce bor epe tae estos te srt n etre el 19 Stopping the Timer iere tee dae teet a etre A ERE eeu era Mabel eae a ERR ERE Hong 20 Clearing the Timer Count Value Timer nennen nennen entere nennen enne neni 21 Rewriting the Timer Count Value enne nns nnns en nennt nnne reet nsns nente nnne nennen 22 User s Manual S19266EJ3VOUM CHAPTER 1 OVERVIEW 1 1 General The timer module ATIM is a programmable timer counter that enables 32 bit counting 1 to FFFF_FFFFH 1 2 Features 1 When a timer counts out counts up to the user set count value the timer count value returns
4. to 0 0000 0000H and the timer starts counting again free run counting The TOUT signal is asserted each time a timer counts out and the TOUT signal is output for two TIN clock cycles Once the ATIM registers are set up and the timer starts counting the ATIM continues counting as described in 1 as long as the TIN clock is supplied even if the APB bus clock PCLK is stopped The timer count set value can be changed while the timer is counting ATIM has 14 functionally equivalent timer modules TIO to TI3 TWO to TW3 and TGO to TG5 User s Manual S19266EJ3VOUM 9 CHAPTER 1 OVERVIEW 1 3 Timer Module Block Diagram 10 Figure 1 1 ATIM_Txx Block Diagram TXX_RSTZ TXX_PCLK Timer value setting register 31 0 lt S Comparator TREE NUIT Real count register 31 0 Internal system bus User s Manual S19266EJ3VOUM CHAPTER 2 REGISTERS ATIM has 256 byte register spaces for each module TIO to TI3 TWO to TW3 and TGO to TG5 which have different offset addresses 2 1 Offset Address C000_0000H C000 0100H C000 0200H C000 0300H C000 1000H C000 1100H C000 1200H C000 1300H C000 2000H C000 2100H C000 2200H C000 2300H C000 2400H C000 2500H 2 2 Registers Each ATIM register consists of 32 bits 000CH Real count read register sm RCR R 0000 0000H wo fasea 0014H Timer value setting monitor register xxx SCLR 0000 0000
5. H 0018H to Reserved OOFCH xxx TIO TH TI2 TIS TWO TW1 TW2 TW3 TGO TG1 TG2 TG3 TG4 TG5 Operation when a reserved area is accessed Write Ignored invalid Read Zeros are returned User s Manual S19266EJ3V0UM 11 CHAPTER 2 REGISTERS 2 2 1 Timer operation register This register xxx OP xxxx_0000H control the timer operations 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 Reserved 7 6 5 4 3 2 1 0 Name i Function Reserved Reserved Specifies whether to assert the TOUT signal 0 Does not assert the TOUT signal even if timer counting times out 1 Asserts the TOUT signal when timer counting times out Specifies whether to enable the timer operation 0 Disables the timer operation The internal timer count register value is reset to 0 TSTART R W 1 Starts timer counting valid when TM_EN 1 0 Does not start timer counting The internal timer count register retains the current value Starts timer counting The internal timer count register is incremented per TIN clock cycle II TM EN Caution Make sure that the interrupt enable period is at least five internal clock cycles four TIN clock cycles because the register value is output in synchronization with PCLK and TOUT is output in synchronization with the TIN clock 1 Enables the timer operation 12 User s Manual S19266EJ3VOUM CHAPTER 2 REGISTERS 2 2 2 Timer clear regist
6. HAPTER 4 USAGE 4 5 Rewriting the Timer Count Value The maximum value of real counting can be changed by changing the values of the relevant timer value setting register TMSET while the timer is counting 1 Set up the timer value setting register TMSET count value 2 Enable the timer TM EN 1 bit 0 of xxx OP register 3 Enable TOUT signal assertion TO EN 1 bit 2 of xxx OP register 4 Start timer counting TSTART 1 bit 1 of xxx OP register b Set up the timer value setting register TMSET count value count value different from that of 1 Figure 4 5 Rewriting the Timer Count Value Timer enabled TM EN 1 Timer value TOUT enabled TO EN 1 Timer value set 7 Timer starts TSTART 1 set F PCLK E i e e l E l Timer value 0 7 F setting register E EN Note 1 Note 2 R alc nt 0 1 2 3 4 5 6 7 S A We F 0 1 j Note2 i m UUU UUU TOUT pin Notes 1 Registers are set in synchronization with PCLK and real counting occurs in synchronization with TIN PCLK and TIN are asynchronous 2 The TSTART TO_EN TM_EN and TMSET bits are set in synchronization with PCLK However because real counting occurs in synchronization with TIN the setting of the TSTART TO_EN TM_EN and TMSET bits will not be applied for 2 or 3 TIN cycles This is the case regardless of whether the timer
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10. d Documents The related documents indicated in this publication may include preliminary versions However preliminary versions are not marked as such Caution The related documents listed above are subject to change without notice Be sure to use the latest version of each document when designing 6 User s Manual S19266EJ3VOUM CONTENTS CHAPTER 21 OVERVIEW niea eaae alin aac eue pna rao oua au eaa aden EE 9 11 Genera E kai a a ice BURRS 9 LZ Iul celum 9 1 3 Timer Module Block Diagram eeeeeeee eene nennen nnne nnne nnne nnmnnn nnmnnn 10 CHAPTER 2 REGISTERS eer Eeer Qo Ty EE a acsi To Do c WR ROC CY VERO De Ed 11 2 1 Offset Address eec estere dede ed dederis 11 2 2 o a A A E E E E E E A A E E E N E T Meli 11 2 2 1 Timeroperatior register onion ein E PEE RR ett EAR 12 2 2 2 Timer clear register eire e nenne Ure d a i edens 13 2 2 3 Timer val e settirig register eot ettet Eh ect red de rr le aio tette cet 14 2 2 4 Real count read register sccccessceceseccceseseeeeeeeseeeeedeaneeeesceceseageeeeeseasesseanseeteneeeeseseeseessecaeeseenees 15 2 2 5 Timer value setting monitor register esses enne enne nnne nnne 15 CHAPTER 3 DESCRIPTION OF FUNCTIONS esie esieeenne essen nennen nnne ens n nn nanne nnmnnn nnmnnn na 16 3 1 Status After Reset cisci ee ENEE NENNEN ENEE 16 3 2 Calculation of Timer Count
11. d This Manual Conventions PREFACE This manual is intended for hardware software application system designers who wish to understand and use the timer module ATIM functions of EMMA Mobile1 EM1 a multimedia processor for mobile applications This manual is intended to explain to users the hardware and software functions of the timer module ATIM of EM1 and be used as a reference material for developing hardware and software for systems that use EM1 This manual consists of the following chapters e Chapter 1 Overview e Chapter 2 Registers e Chapter 3 Description of functions e Chapter 4 Usage It is assumed that the readers of this manual have general knowledge of electricity logic circuits and microcontrollers To understand the functions of the timer module ATIM of EM1 in detail Read this manual according to the CONTENTS To understand the other functions of EM1 Refer to the user s manual of the respective module To understand the electrical specifications of EM1 Refer to the Data Sheet Data significance Higher digits on the left and lower digits on the right Note Footnote for item marked with Note in the text Caution Information requiring particular attention Remark Supplementary information Numeric representation Binary xxxx or xxxxB Decimal xxxx Hexadecimal xxxxH Data type Word 32 bits Halfword 16 bits Byte 8 bits User s Manual S19266EJ3VOUM 5 Relate
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13. enabled TM EN 1 Timer value TOUT enabled TO EN 1 Uu ise set 7 Timer starts TSTART 1 1 E u H Tn ETEN Timer value 0 7 7 setting register Real count m nfffinnnmnmnmmmnmnmnmnt TOUT pin Notes 1 Registers are set in synchronization with PCLK and real counting occurs in synchronization with TIN PCLK and TIN are asynchronous 2 The TSTART and TM EN bits are set in synchronization with PCLK However because real counting occurs in synchronization with TIN the setting of the TSTART and TM EN bits will not be applied for 2 or 3 TIN cycles This is the case regardless of whether the timer is set again while it is counting or when it is stopped 20 User s Manual S19266EJ3VOUM CHAPTER 4 USAGE 4 4 Clearing the Timer Count Value Timer The values of the internal timer count register can be cleared to 0 with a single write operation during counting This operation can be used during clearing of the watchdog timer The TOUT signal is not asserted if writing is performed at least once before the timer counts out It s used as Watchdog timer Multimedia Processor for Mobile Applications System Control General Purpose I O Interface User s Manual chapter 3 2 8 1 Clears the timer count TCR CLR 1 bit 1 of xxx CLR register Figure 4 4 Clearing the Timer Count Value Timer
14. er This register xxx CLR xxxx 0004H clears the internal timer count registers 31 30 29 28 27 26 25 24 Reserved 23 22 21 20 19 18 17 16 Reserved 15 14 13 12 11 10 9 8 Reserved 7 6 5 4 3 2 1 0 Reserved TCR CLR mas oz 0 me 1 TCR_CLR W 1 Clears the internal timer count registers 0 No operation 1 Clears the internal timer count registers This bit is automatically cleared to 0 Re setting 0 is unnecessary For details see 4 4 Timer count value clear operation User s Manual S19266EJ3VOUM 13 CHAPTER 2 REGISTERS 2 2 8 Timer value setting register This register xxx_SET xxxx_0008H specifies the value at which the timer counts out 31 30 29 28 27 26 25 24 TMSET 31 TMSET 30 TMSET 29 TMSET 28 TMSET 27 TMSET 26 TMSET 25 TMSET_24 23 22 21 20 19 18 17 16 TMSET 23 TMSET 22 TMSET 21 TMSET 20 TMSET 19 TMSET 18 TMSET 17 TMSET 16 15 14 13 12 11 10 9 8 TMSET 15 TMSET 14 TMSET 13 TMSET 12 TMSET 11 TMSET 10 TMSET 9 TMSET 8 7 6 5 4 3 2 1 0 TMSET 7 TMSET 6 TMSET 5 TMSET 4 TMSET 3 TMSET 2 TMSET 1 TMSET 0 After Reset Function TMSET 31 0 Specifies the value at which the timer counts out Set a desired value minus 1 Specify a value greater than or equal to 2 When a timer counts out the TOUT signal is asserted when TO EN 1 and the real count register is reset to 0 For details see 4 5 Rewriting the Timer Count Value
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16. et signal is received A reset operation must be executed immediately after power on for devices with reset functions POWER ON OFF SEQUENCE In the case of a device that uses different power supplies for the internal operation and external interface as a rule switch on the external power supply after switching on the internal power supply When switching the power supply off as a rule switch off the external power supply and then the internal power supply Use of the reverse power on off sequences may result in the application of an overvoltage to the internal elements of the device causing malfunction and degradation of internal elements due to the passage of an abnormal current The correct power on off sequence must be judged separately for each device and according to related specifications governing the device INPUT OF SIGNAL DURING POWER OFF STATE Do not input signals or an I O pull up power supply while the device is not powered The current injection that results from input of such a signal or I O pull up power supply may cause malfunction and the abnormal current that passes in the device at this time may cause degradation of internal elements Input of signals during the power off state must be judged separately for each device and according to related specifications governing the device User s Manual S19266EJ3VOUM The names of other companies and products are the registered trademarks or trademarks of the respective company T
17. h unused pin should be connected to Voo or GND via a resistor if there is a possibility that it will be an output pin All handling related to unused pins must be judged separately for each device and according to related specifications governing the device PRECAUTION AGAINST ESD A strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it when it has occurred Environmental control must be adequate When it is dry a humidifier should be used It is recommended to avoid using insulators that easily build up static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work benches and floors should be grounded The operator should be grounded using a wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with mounted semiconductor devices STATUS BEFORE INITIALIZATION Power on does not necessarily define the initial status of a MOS device Immediately after the power source is turned ON devices with reset functions have not yet been initialized Hence power on does not guarantee output pin levels I O settings or contents of registers A device is not initialized until the res
18. hese commodities technology or software must be exported in accordance with the export administration regulations of the exporting country Diversion contrary to the law of that country is prohibited The information in this document is current as of September 2009 The information is subject to change without notice For actual design in refer to the latest publications of NEC Electronics data sheets etc for the most up to date specifications of NEC Electronics products Not all products and or types are available in every country Please check with an NEC Electronics sales representative for availability and additional information e No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Electronics NEC Electronics assumes no responsibility for any errors that may appear in this document NEC Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC Electronics products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC Electronics or others Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and
19. is set again while it is counting or when it is stopped 3 Ifa value smaller than the real count value is set in the timer value setting register during counting the timer counts up to FFFF_FFFFH and then counts up to the preset count value If this operation causes any problems read the real count read register and set a value larger than the read value in the timer value setting register 22 User s Manual S19266EJ3VOUM Revision History Date Revision Comments February 10 2009 1 0 April 27 2009 2 0 Incremental update from comments to the 1 0 September 30 2009 3 0 Incremental update from comments to the 2 0 User s Manual S19266EJ3VOUM 23 For further information please contact NEC Electronics Corporation 1753 Shimonumabe Nakahara ku Kawasaki Kanagawa 211 8668 Japan Tel 044 435 5111 http www necel com America NEC Electronics America Inc 2880 Scott Blvd Santa Clara CA 95050 2554 U S A Tel 408 588 6000 800 366 9782 http www am necel com Europe NEC Electronics Europe GmbH Arcadiastrasse 10 40472 D sseldorf Germany Tel 0211 65030 http www eu necel com Hanover Office Podbielskistrasse 166 B 30177 Hannover Tel 0 511 33 40 2 0 Munich Office Werner Eckert Strasse 9 81829 M nchen Tel 0 89 92 10 03 0 Stuttgart Office Industriestrasse 3 70565 Stuttgart Tel 0 711 99 01 0 0 United Kingdom Branch Cygnus House Sunrise Park
20. ister is set to 0 2 If the timer value is set in the timer value setting register TMSET bits while the TM SCLR bit is set to 1 the TM SCLR bit is fixed to 1 In this case reset this bit User s Manual S19266EJ3VOUM 15 CHAPTER 3 DESCRIPTION OF FUNCTIONS 3 1 Status After Reset ATIM is set as follows after reset e TOUT signal polarity 0 e Timer count Stop e Timer setting register 0x0000_0000 Internal timer count register 0x0000 0000 3 2 Calculation of Timer Count A wide range of counting is possible by using a combination of input frequency and timer count settings The following table shows setting examples The term seconds in this table refers to the interval at which the TOUT signal is asserted TIN Timer Count Setting Value Input Frequency 0000 0000H 0000 FFFFH FFFF FFFFH 32 768 kHz 30 52 x 10 seconds 2 seconds 131072 seconds 15 616 MHz 64 04 x 10 seconds 4 20 x 10 seconds 275 04 seconds Expression 1 TIN x Count setting value 1 Example 1 32 768 kHz x 0000 FFFFH 1 30 52 x 10 5 x 65536 2 seconds 16 User s Manual S19266EJ3VOUM CHAPTER 4 USAGE 4 1 Starting the Timer 1 Set up the timer value setting register TMSET count value 2 Enable the timer TM EN 1 bit 0 of xxx OP register 8 Enable TOUT signal assertion TO EN 1 bit 2 of xxx OP register 4 Start timer counting TSTART 1 bit 1 of xxx OP register Figure 4 1 Starti
21. les This is the case regardless of whether the timer is set again while it is counting or when it is stopped User s Manual S19266EJ3VOUM CHAPTER 4 USAGE 4 2 Pausing the Timer 1 Stop timer counting with count values retained TM EN 1 TSTART 0 pause for a certain period 2 Restart timer counting TM EN 1 TSTART 1 Figure 4 2 Pausing the Timer Timer enabled TM EN 1 Timer value TOUT enabled TO EN 1 Timer stops Timer starts set 7 Timer starts TSTART 1 TSTART 0 TSTART 1 PCLK n e See Ces AH JUL E TONES Auli Timer value 0 7 7 setting register gt Note 1 Note 2 Note 2 Real count 0 d ess 7 0 1 2 3 4 Note 2 TOUT pin Notes 1 Registers are set in synchronization with APBCLK and real counting occurs in synchronization with TIN APBCLK and TIN are asynchronous 2 The TSTART and TM EN bits are set in synchronization with PCLK However because real counting occurs in synchronization with TIN the setting of the TSTART and TM EN bits will not be applied for 2 or 3 TIN cycles This is the case regardless of whether the timer is set again while it is counting or when it is stopped User s Manual S19266EJ3VOUM 19 CHAPTER 4 USAGE 4 3 Stopping the Timer 1 Stop timer counting internal count value returns to 0 TM EN 0 TSTART Figure 4 3 Stopping the Timer Timer
22. must check the quality grade of each NEC Electronics product before using it in a particular application Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster Systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems and medical equipment for life support etc The quality grade of NEC Electronics products is Standard unless otherwise expressly specified in NEC Electronics data sheets or data books etc If customers wish to use NEC Electronics products in applications not intended by NEC Electronics they must contact an NEC Electronics sales representative in advance to determine NEC Electronics willingness to support a given application Note 1 NEC Electronics as used in this statement means NEC Electronics Corporation and also includes its majority owned subsidiaries 2 NEC Electronics products means any product developed or manufactured by or for NEC Electronics as defined above M8E0904E 4 User s Manual S19266EJ3VOUM Readers Purpose Organization How to Rea
23. ng the Timer Timer enabled TM EN 1 Timer value TOUT enabled TO EN 7 1 set 7 Timer starts TSTART 1 l D PCLK E P mi JUL JUL Timer value 0 7 7 setting register Real count TOUT pin Example When the timer value is set to 7 lt 1 gt Steps 2 to 4 can be performed with a single write lt 2 gt The TOUT signal is asserted under the following conditions 1 The timer value setting register TMSET is set to a value other than 0 2 Asserting the TOUT signal is enabled TO_EN 1 3 The timer is counting TM_EN 1 TSTART 1 With these settings the TOUT signal is asserted every 8 TIN clock cycles To set the TOUT signal assertion cycle to 8 set the timer value setting register to 7 8 1 3 The internal timer count register operates even if the system clock PCLK is stopped after the timer starts as long as the TIN clock is supplied The TOUT signal is asserted according to the timer value setting every 8 clock cycles in this example User s Manual S19266EJ3V0UM 17 Notes 1 18 CHAPTER 4 USAGE Registers are set in synchronization with PCLK and real counting occurs in synchronization with TIN PCLK and TIN are asynchronous The TSTART TO_EN TM_EN and TMSET bits are set in synchronization with PCLK However because real counting occurs in synchronization with TIN the setting of the TSTART TO EN TM EN and TMSET bits will not be applied for 2 or 3 TIN cyc
24. nics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured by or for Renesas Electronics RENESAS User s Manual Multimedia Processor for Mobile Applications Timer EMMA Mobile Document No S19266EJ3VOUMO0 8rd edition Date Published September 2009 NEC Electronics Corporation 2009 Printed in Japan MEMO 2 User s Manual S19266EJ3VOUM NOTES FOR CMOS DEVICES VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction If the input of the CMOS device stays in the area between Vu MAX and Vin MIN due to noise etc the device may malfunction Take care to prevent chattering noise from entering the device when the input level is fixed and also in the transition period when the input level passes through the area between Vu MAX and Vin MIN HANDLING OF UNUSED INPUT PINS Unconnected CMOS device inputs can be cause of malfunction If an input pin is unconnected it is possible that an internal input level may be generated due to noise etc causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using pull up or pull down circuitry Eac
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26. ranted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable care in preparing the information included in this document
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