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Benchmarking Low-Power
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2. 84 MHz 6 system clock 7 2 MA 3 4 5 electronicdesign UNCOVERED The CoreMark benchmark and the EEMBC consortium address some of the aforementioned Dhrystone weaknesses It is simple yet sophisticated easily ported in minutes comes with comprehensive documentation and run rules The C code is hosted and downloadable for free from EEMBC website Care should be taken optimum settings code partition and scattering loading and MCU architecture can greatly influence the CoreMark number For example on the LPC54102 device there is an AHB Matrix with various masters and slaves The SRAM blocks are slaves as is the Flash Code and data can be scattered loaded in such a manner to reduce contention This could be viewed as cheating but really it is not It is the best utilization of the hardware memory architecture to optimize performance which can also be applied to real world applications It should be also mentioned that the best CoreMark number does not occur at the same time as the best uA MHz some specmanship Flash wait states prefetch and Flash on off also have an influence and these items can be adjusted to suit the particular application and power requirements Conclusion The best way to determine if a particular MCU fits the bill with respect to performance current consumption and processing is to write your own application code debug optimize and then measure MCU vendors use many ways to report active c
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4. read it at least twice Benchmark Tools While 1 One could argue that this is not a benchmark at all due to the simplicity and lack of code algorithm It is the most basic datasheets active current consumption number Some vendors quote running from Flash and or SRAM with various permutations of clocks on or off PLL and so on Can it really tell you something Maybe or maybe not Since it is not a standard vendors will quote this number with conditions that massage the result Fibonacci Fibonacci code is executed on the MCU and the active current consumed is measured simple Atmel and recently NXP are using this algorithm to benchmark active current performance What does this code do exactly Simply it adds the 2 previous numbers together to get the next number And so on 1 1 2 3 5 8 13 21 34 55 89 144 This is not a very sophisticated Call Us at 1 800 463 9275 or Visit newark com routine and probably not something that exercises much of the core instruction set and hardware that other benchmarks accomplish Nevertheless it is a bit better than a While 1 Of course when comparing devices with the same core it has some comparison merit Dhrystone Dhrystone was developed back in the 80s to benchmark CPUs It is older and has somewhat been superseded by the newer CoreMark Benchmark The common metric report for Dhrystone is DMIPS Dhrystone does not support any floating point operations in the
5. test suite this is covered by Whetstone benchmark Dhrystone has some weaknesses that are widely published Major portions of Dhrystone are susceptible to a compiler s ability to optimize the work away That said CoreMark can also be subject to Compiler trickery Dhrystone is still commonly seen in MCU promotional literature ARM frequently use it to show their core performance but do not expect to always match ARMs Core Dhrystone numbers with MCUs using the same ARM core Also the compiler settings and compiler used when creating this Benchmark code will greatly influence the results CoreMark This has become an Industry standard for benchmarking MCU active current NXP has been one of the advocates of the CoreMark benchmark In all the recent DS releases CoreMark performance and the way it was achieved is detailed On the recent LPC54102 launch an Application note with step by step instructions is available that helos customers recreate the excellent CoreMark numbers the part can truly achieve CoreMark benchmark also supports a Floating point option for those devices that have such hardware support Some would argue that CoreMark is now the subject of compiler wars this may be true however if a customer uses the same IDE and compiler version for benchmark they can compare two competing devices this assumes the IDE vendor does not show a preference to a particular device The CoreMark rules state that the compiler and s
6. Cortex M4F in active mode ARM Cortex MO in sleep mode CoreMark code executed from SRAM Tamb 40 C to 105 C Unless otherwise specified 1 62 V lt VDD lt 3 6 V DD supply current CCLK 12 MHz 1 5 MA 2 4 6 CCLK 48 MHz 4 8 mA 3 4 6 CCLK 84 MHz 7 9 MA 3 4 6 CCLK 100 MHz 9 9 MA 3 4 6 ARM Cortex M4F in active mode ARM Cortex M0 in sleep mode CoreMark code executed from flash Tamb 40 C to 105 C Unless otherwise specified 1 62 V lt VDD lt 3 6 V DD supply current CCLK 12 MHz 1 system clock 1 9 MA 2 4 6 CCLK 48 MHz 3 system clock 5 7 MA 3 4 6 CCLK 84 MHz 6 system clock 8 8 mA 3 4 6 CCLK 100 MHz 7 system clock 10 7 mA 3 4 6 Current Consumption Running Fibonacci ARM Cortex M4F in active mode Cortex M0 in sleep mode CoreMark code executed from SRAM Tamb 40 C to 105 C Unless otherwise specified 1 62 V lt VDD lt 3 6 V IDD supply current CCLK 12 MHz 1 7 MA 2 4 5 CCLK 84 MHz 8 0 mA 3 4 5 CCLK 96 MHz 9 4 mA 3 4 5 ARM Cortex M0 in active mode Cortex M4F in sleep mode CoreMark code executed from flash Tamb 40 C to 105 C Unless otherwise specified 1 62 V lt VDD lt 3 6 V IDD supply current CCLK 12 MHz 1 system clock 1 5 mA 2 4 5 CCLK 48 MHz 3 system clock 6 2 mA 3 4 5 CCLK
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11. design 08 UNCOVERED fizz Benchmarking Low Powe 4 element X Supplier of the Month electronicdesign UNCOVERED n this article we will discuss the common methodology and various benchmarks that are frequently used in the industry to show microcontroller MCU power performance In the MCU market space power requirements vary greatly Some applications will need a MCU device that performs best current consumption and wakeup time when off or mostly in the lowest possible power mode think pulse oximeter or glucose meters On the other hand there are applications where devices need really efficient active current for an always on type application such as listening for sensor data The focus of this article will be on the segment of MCUs that need active current consumption and how these are measured and benchmarked Microcontroller datasheets are a wonderful source for good ole factual reliable engineering information like peripheral interface timing Vih Vil threshold levels and all that malarkey But all datasheets have caveats as well For example equivalent to CoreMark code does not mean CoreMark code or maybe more obvious current consumed while executing from internal SRAM is not the same as from Flash so make sure that you are comparing apples to apples Pay attention to footnotes and other subtle hints on the true source of the data being presented Probably best to
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14. ettings should be disclosed with the number 2 ee i electronicdesign Call Us at 1 800 463 9275 UNCOVERED or Visit newark com Results for 32 bit ARM Cortex M4F MOQ microcontroller CoreMark Score Conditions Typ Parameters Parameters Detail ARM Cortex M4F in active mode ARM Cortex M0 in sleep mode CoreMark code executed from SRAM Tamb 25 C VDD 3 3V 1 Clock source 12 MHz IRC PLL disabled CCLK 12 MHz 2 6 Iterations MHz 1 3 4 5 2 Clock source 12 MHz IRC PLL enabled CCLK 48 MHz 2 6 lterations MHz 2 B 4 5 3 Characterized through bench CCLK 84 MHz 2 6 Iterations MHz 2 3 4 5 measurements using typical samples CCLK 100 MHz 2 6 Iterations MHz 2 8 4 5 4 Compiler settings Keil Vision v 5 12 optimization level 3 optimized for time on ARM Cortex M4F in active mode ARM Cortex M0 in sleep mode CoreMark code executed from flash Tamb 25 C VDD 3 3V 5 SRAMO and SRAM1 powered SRAM2 CCLK 12 MHz 1 system clock 2 6 Iterations MHz 1 B 4 6 powered down CCLK 48 MHz 3 system clock 2 4 Iterations MHz 2 8 4 6 6 See the FLASHCFG register in the CCLK 84 MHZ 4 system clock 2 3 Iterations MHz 2 8 4 6 LPG5410x User Manual for system clock c flash access time settings CCLK 100 MHz 5 system clock 2 2 lterations MHz 2 3 4 6 Current Consumption Conditions Typ Parameters ARM
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20. urrent on their datasheets each method has some advantages and some disadvantages simplicity versus complexity Reviewing a combination of these Benchmarks data points is a good approach Engineers should pay attention to the finer details when comparing devices Benchmarking Low Power Supplier of the Month NXP is driving innovation in the automotive identification and mobile industries and in application areas including wireless infrastructure lighting healthcare industrial consumer tech and computing See our entire NXP offering at newark com nxp gt LPC54100 SERIES MICROCONTROLLERS gt Ultra Low Power Microcontrollers for Always On Sensor Processing Applications The industry s most energy efficient solution for sensor processing tasks One ultra low power MCU handles sensor listening aggregation fusion and communication Newark Part No eos Ar Manufacturer Part No LPC54101J256BD64 LPC54101J512BD64 LPC54102J256BD64 LPC54102J512BD64 OM13077 OM13078 ESD DIODES gt Safeguard your design protect your board NXP s comprehensive range of advanced ESD protection Common Mode and EMI filtering and TVS devices can help you with circuit protection BIPOLAR TRANSISTORS gt NXP provides best in class power bipolar transistors small signal bipolar transistors including a Small Signal range and a host of RF wideband transistors MOSFETS gt NXP s advanced
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