Home
586-Drive™ Technical Manual
Contents
1. U10 29F800 Zaa BY ae a13 enD Hie Saiz2 piste 4 air D7 H gt 6 43 RAM 6 Haio pias 7 42 7 ao D6 We MW 8 41 8 A8 D13 9 40 9 NC D5 10 39 10 NC D12 Ti 38 Ti WR D4 12 yest vec BL 2 13 36 13 S nce pl gt 14 35 14 s Nc D3 We aie 15 34 15 H RY nio H gt AS 16 33 16 Nc p2 eS 61 17 32 17 a17 D9 18 31 18 A7 D1 19 30 19 AG D8 20 29 20 AS DO 21 28 21 A4 OE 2a a toy ee 22 23 26 BOOT aaa Re YER fag e a1 ao gt US H eno co1 po 4703 DIL e 324 D12 j5 D5 D13 5 30 D6 D14 6 31 GND 1 D7 D15 7 32 AY 2 CEYCE2 8 33 P2 3 alo vs1 H gt 9 34 GND 4 e OE RD Arae 10 35 A2 5 H A9 MRH gt Tet 36 GND 6 H as wE HH 12 37 GND 7 H A7 Roy H 13 38 GND_8 vec vcc 14 39 DO 9 A6 CS 15 20 DI 10 AS VS2 16 a1 D2 11 A4 RST 17 42 D3 12 a wt H 18 43 Trg a2 22 aa H A1 REG He 20 45 Hao Bv2 eS 21 46 Spo Bv HS 22 a7 XD DD 23 48 n2 ps Be 24 49 en ed ESTO cD2 GND gt gt CFB U15 GND_1 v25 2 ONG 4 v25 vcc RO av v33 3 LA vi LE 10 Ly o BB1117 SES cnpD 0 1UF ULA CAPNP GND_1 v33 2 CNG 4 v33 Vear Y BB1117 V33 V33 V33 5 V25 V25 c1o c23 c29_ c14 c22 c28 ai R5 VCC P4 Lo 92 wor PFI o o o D G lt Q Q Do N a I lt N a
2. U17 VCC U18 VCC INTC VCC U29 VCC m IORD 1 24 Y vec IORD 1 24 9 INTD GND DTR2 GND RXD1 1 89 RXDA 2 thas an 23 ta RXDB 2 Eee ae 23 IOWR SST sso GND 2 En Ie 7 485 TE TXDA 3 22 DO TXDB 3 22 DO ssc GND 7RTSB 6 485 MPOA4 l 2 DO Fay pI mMpoB4 1 D DO aa DI TxD1 4 DE Als 1 MPO D1 MPO Dl aR 313131313 313 DI GND 2 MPIAS mpr p2 290D2 MPIBS mp p2 9 D2 ellelsiapaJ2 22 3 A3 6 19 D3 As 6 19 D3 LTC485 NE A2 D3 A2 D3 R 4 AZ Tar pa H8 D4 A2 Tar pa 8 D4 SSCFSGG 5 al 8145 ps 17 D5 Al 8145 ps 17 D5 GND 1 6z5S0D G 31SND y x5 OT De 6 D6 XT 91 pe 16 D6 P3 ANES O EAr 30 f 5 x6 10 gt p7 15 D7 xs 10 5 p7 15 D7 GND _ 3d EXT Rr 22 REF U27 vec ESTI esrT en L24_ 8C1 RST11 psr en 14802 4 g vce 28_vec RXDA 1 5 GNDI2 Emp tnt 23 ZENTC GNDI2 Emp tur O ZENIT cape uzos 27 GND 2 A485 516 ar 28 MPOA 3 B485 SCC2691 SCC269L Tl Ei aip 25 TXDA 4 SCC2691S SCC2691S BOO 8 x6 mxo 24 B01 9 45 a15 23 B15 LTC485 XTAL4 XTAL3 X7 xg 10PF RXD1 xs 1 x6 10PF cof cos TXD1 cop Ir co6 3 68 TXDO 3 68 Lb RXDO v4 avr NY v EA HA C3 U11 Iet U23 vec Cl 1 16 V C1 c3 ios von 1169 c30 Ve 2 1 YCC T5 cup C25 C21 V 2154 enp 15 SND c3 0 1UF Ci 3 eis tig 24 74x01 T26 c 3lc1 7110 24 TXDB C244 65 Rit 13 RXD1 GND c1 ca Alco Riz 13 RXDB C4 c22 5125 gio 42 RXD1 ca 5 OS Rio 12 RX
3. VCC J1 i2x expansion GND 40 7 6 39 Veco vec 1 2 GND U16 P31 38 5 937 P27 INTB 3 2 2 4_CLKT JO P28 36 35 P29 5 6 GND O o O S E p13 15 92 TXD0 34 7 933 P23 75 9 EDO A18 1 VPP vec 32 vcc GND 3 4 GND RXDO 32 Bak 9 10 D1 Alo 2 31 EWR vcc 50 O vce P30 30 0 O r26 19 Oa pe Al6 PGM HO OO O O 0 A15 3 515 ne 30 A17 p12 7 8 TXDI 28 27 D1513 14 D3 Al2 4 29 Al4 ZINTA 9 10 GND RXD1 26 2 C25 P25 RST15 O S D4 A12 A14 O a O oO O o AT 5145 ara 28_Al3 P24 24 23 RST 175 G18 Ds a6 6 27 A8 HDRD10 22 2 Oar TINO 19 20 D6 A6 A8 O ob OD OSS AS 7 ans no Zo AS HDRD10 20 19 D1421 22 D7 Ad 8 a ali 22 ai pi7 180 OT P18 D1323 2 O21 GND as la Jor 22 ZROMRD P15 16 2 z 15 P16 25 gt S 26 A7 A2 10 45 aro L23_ALO pig 14 5 913 p13 D12 27 OS_A6 Al lila jce 22 ROM1 P12 12 7 911 SSI IOWR 29 7 G30 AS A0 1210 py 21 D7 10 5 6 9 S50 J1IORD 31 gt G32 A4 BO 13 50 pe 20 D6 TOUTO 8 54 G7 ssc D1133 34 A3 DI 14 p ps 19 D5 ZINTA 6 5 3 TOUTI Dios 2 O 367A2 D2 15 5 pa 18 D4 45 93 PrTO2 D9 37 o 2 38 Al 16 17 D3 GND 2 1 TINI D8 39 40 AO GND D3 SA Y A J PROM1024 HDRD40 J2 HDRD40 MEM32 D1 12V1 12V gt UART HV 1N5817 INTC col RST INTCDantp REF AB2 TOWR IORD SC1 SC2 i RXDO RST A D RXD1 DTR1 33 RST 32 AD TORD D15 DTA D13 D12 Q INTB us uae Piav AD7655 J4 GND _1 16 AD7655 AAL
4. ULN2003 TinyDrive Figure 3 4 Drive inductive load with high voltage current drivers 3 10 586 Drive Chapter 3 Hardware Sourcing Option U20 and U21 are also configurable as sourcing high voltage inputs See Figure 3 5 for visual reference This sourcing option MUST use UDN2982A sourcing chips instead of the ULN2003A sinking ones Also note the new jumper settings on J5 NM TE MN SI ION O Jl yio J5 1 J5 3 a a a ee a AAA Se eee ee ee y K J5 2 J5 4 O Di i me viel oy A mammam 0 015 olo Figure 3 5 Optional High Voltage Driver Configuration U20 U21 sourcing inputs 3 2 20 Optional 192x128 pixel LCD The 5D has a 20 pin Flex cable connector U31 to interface a 192x128 graphics LCD Since this interface is located underneath solenoid driver sockets U20 and U21 these two chips cannot be installed with the LCD option Also note that T2 screw terminal block cannot be installed as well to allow for physical ease on the cable and POT For contrast adjustment the LCD uses a POT P7 See Figure 3 6 For more information regarding the 5D LCD interface see sample 5d_led c in project c tern 586 samples 5d P LCD interface Contrast POT Pa AWM 20708 BOC SOV VW APO 20708 80 TORO E1865 W Figure 3 6 LCD interface amp Contrast POT Sockets U20 U21 cannot be installed Chapter 3 Hardware 586 Drive Figure 3 7 586D controller with LCD cable interface 3 2
5. We will use SER as the example in the following discussion any of the interface functions that are specific to SER1 can be easily changed into function calls for SERO For details you should see both chapter 21 of the SC520 Microprocessor User s Manual and the schematic of the 586Drive provided at the end of this manual TERN interface functions make it possible to use one of a number of predetermined baud rates These baud rates are achieved by specifying a divisor The following table shows the function arguments that express each baud rate to be used in TERN functions These are based on a 33 333 MHz external crystal Note Only up to 115 200 BAUD has been tested in house 10 25 00 300 600 2400 4800 7200 9600 hb 14 400 19 200 38 400 57 600 115 200 114 000 192 000 VD 0 JJ Dn nA Bb W N 4 9 Chapter 4 Software 586Drive Function Argument 288 000 576 000 1 152 000 Table 4 1 Baud rate values After initialization by calling s1_init SER is configured as a full duplex interrupt driven serial port and is ready to transmit receive serial data at one of the specified 16 baud rates An input buffer serl_in buf whose size is specified by the user will automatically store the receiving serial data stream into the memory The user only has to check the buffer status with serhitl and take out the data from the buffer with getser1 if any The input buffer is used as a circular ring buffer as shown in
6. gt U 69 Upload a block of Binary data COM1 Characters Sent 18476 Framing Errors 19266 Upload Progre 166 Overrun Errors TERNNS86 ROM S8 After programming the Flash 586 Drive will automatically reset G80000 to setup the CMOS RAM Jump Address and start the DEBUG kernel The on board LED should blink twice and then stay on indicating 586 Drive is ready for remote debugging Power off the controller Install the STEP2 Jumper then power on the LED blink twice Use F9 Exit The 586 Drive is ready for using Paradigm C TERN Edition to download debug and run There are several sample projects in the c tern 586 directory default working directory 2 5 586 Drive Chapter 2 Installation tern 586 led ide The most basic sample project just flashes LED tern 586 test ide Gives samples for serial ports interrupts timers etc tern 586 samples 5d 5d ide Shows how to use hardware components on board To open projects go to File and open the sample project file then build and download There are many sample programs under c tern 586 samples After you debug your application code you can setup the 586 Drive to run in Standalone Mode Standalone Mode STEP2 By default the Paradigm C TERN Edition will download your application code starting at 0x08000 in the battery backed SRAM Power off 586 Drive Remove STEP2 jumper On PC side click TOOL RTLOAD Power on 586 Drive again without STEP2 jumper the
7. valid IR7 the in service bit is set or a spurious interrupt the in service bit is cleared Functions 4 4 void nmi_init void nmi interrupt handler initialization void int0_init char i void interrupt far intO_isr void intl_init char i void interrupt far intl_isr Q void int2_init char i void interrupt far int2_isr void int3_init char i void interrupt far int3_isr void int4 init char i void interrupt far int4_isr void int5_init char i void interrupt far int5_isr void int6_init char i void interrupt far int6_isr void int7_init char i void interrupt far int7_isr void int8_init char i void interrupt far int8_isr void int9_init char i void interrupt far int9_isr 586 Drive Chapter 4 Software void intD_init char i void interrupt far intD_isr For a detailed discussion involving the interrupt the user should refer to Chapter 15 of the AMD SC520 Microcontroller User s Manual TERN provides functions to enable disable all of the external interrupts The user can call any of the interrupt init functions listed for this purpose The first argument indicates whether the particular interrupt should be enabled and the second is a function pointer to an appropriate interrupt service routine that should be used to handle the interrupt The TERN libraries will set up the interrupt vectors correctly for the specified external interrupt line At the end of int
8. 1 4 G_2 GND va e 15 v8 AAZ 3 4 v2 3155 ya 14 v7 AB2 50 6 v3 413 ve 13 VS ABI 7 2 8 va 51 ys 12 V5 vec 9 2 10 REF REFI 6 11 RST 8 VCC o o REF CR p REF1 11 12 RTSO 7 jesspo 0 7 GND v2 13 2 a v3 S5C 8l soxspr 3 S50 6 P4 vi 5 O Oie vi 5 P2 R7 v i7 2 Ois ve LTC2600 VBAT BSEN vas 19 2 2305 240048 y 1 o o U13 B1 1K c26 HDRD20 1 Ne NC Lb CAEN Yi H IN HEAT do al coma TEMP OUT HA GND TRIM BTH1 z LT1019 U7 u2 maxoor g a t VBAT RST AG VRAM 2 Eta Jai 15 RST AT 3 REF1 Ria VEC f VCC 3 yec wpo 4 WDO ZINTA Q 1N5817 330uH END 41 Exp cer 2 ROM2 c16 S Son cr 12 RAM RST_6 0 1UF ro VEC L LL wor At wot PITG2 4 INTD nn 9 R3 Vcc VCC RA L1 Tl ost pro 10 PEO t 5q Riovec SSI vc pa PO 2 oss pry PFE INTC 2K 74HC138 Cc 680 LED intBRIA Q vec vcc UA MIC8114 vce v33 REF p23 R12 SAE GND lleno v3 4 V33 prg VCC c12 c11 c17 C13 C33 c02 Title LES 2d RST ux pS A RST AA ide aa RIS O SC520 586 DRIVE TOB NE L Gb a 10K Size Document Number REV B 5D MAN SCH Date August 30 2006 Sheet 1 of 2
9. 586 Drive 3 2 19 High Voltage High Current Drivers ULN2003A has high voltage high current Darlington transistor arrays consisting of seven silicon NPN Darlington pairs on a common monolithic substrate All channels feature open collector outputs for sinking 350 mA at 50V and integral protection diodes for driving inductive loads Peak inrush currents of up to 600 mA sinking are allowed By default U21 and U20 are high voltage driver outputs and U19 provides high voltage inputs J5 3 VS e 0 DD NES OA a SS O KI 2 35 4 GND sae ae we ELLID 127 kad Uolo Figure 3 3 Default High Voltage Driver aun U19 input U20 U21 output These outputs may be paralleled to achieve high load capability although each driver has a maximum continuous collector current rating of 350 mA at 50V The maximum power dissipation allowed is 2 20 W per chip at 25 degrees C C The common substrate G is routed to T2 GND pins All currents sinking in must return to the T2 GND pin A heavy gauge 20 wire must be used to connect the T2 GND terminal to an external common ground return K connects to the protection diodes in the ULN2003A chips and should be tied to highest voltage in the external load system K can be connected to an unregulated on board 12V via JS pin 1 and pin 2 ULN2003A is a sinking driver An example of typical application wiring is shown below Solenoid Power Supply GND SUB J5 1 J5 2
10. 6 7 and 8 bit data transfers Odd even and no parity 1 1 5 or 2 stop bits Error detection Hardware flow control Transmit and receive interrupts for each port Maximum baud rate up to 1 152 MHz 586 Drive Chapter 3 Hardware The software drivers for each serial port implement a ring buffered interrupt transmitting and receiving arrangement See the samples files sI _echo c and s0_echo c s1_echo c is included in the pre built sample project tern 586 test ide 3 2 5 GP Timers Three 16 bit General Purpose Timers are on board Two external inputs TINO J1 19 Expansion and TIN1 J2 1 can be used for the GP Timer0 and Timer to capture and count external pulses up to 33 333 4 MHz Timer 0 and Timer can output pulses on TOUTO J2 8 i2chip and TOUT 1 J2 5 GP Timers support interrupt on terminal count continuous mode and square wave generation Timer2 is not connected to any external pin It can be used as an internal timer for real time coding or time delay applications It can also prescale timer0 and timer The TINO TIN1m TOUTO and TOUT pins are also shared with GP bus chip select lines See the sample programs timer02 c and tmr_out c in the tern 586 samples 5e directory GP timer code is intergrated into several of the samples in the sample project tern 586 test ide 3 2 6 PIT Timers Three 16 bit Programmable Interval Timers PIT are on board Each PIT channel has one interrupt output Only PIT2 has an external
11. ADC works well directly with analog signals from strain gages current shunts RTDs resistive sensors and also work well directly with thermocouples in the differential mode A precision reference LT1019 REF02 with a internal temperature sensor providing local temperature for thermocouple applications In addition a 4 ch 16 bit parallel ADC AD7655 0 5V supports ultra high speed 1 MHz conversion rate analog signal acquisition The AD7655 contains two low noise high bandwidth track and hold amplifiers that allow simultaneous sampling on two channels Eight 16 bit digital to analog converters TLC2600 can be installed to provide analog voltage 0 5V outputs With the 388 pin BGA package of the SC520 repair support is not available The 5D works with TERN expansion boards including the UR8 C24 P100 and P300 Special Note The core of the Am520 CPU operates at 2 5V and the I O operation at 3 3V Also the input for the VO is 5V compatable Stresses above these can cause permanent damage to the SC520 CPU Operation above these values is not recommended and can effect device reliability 1 1 Chapter 1 Introduction 586 Drive Features Features e 151x82 mm DIN rail mounting 110 mA at 24V DC power e 133 MHz AMD SC520 program in C C e High performance hardware floating point coprocessor e Non volatile SRAM Flash RTC timers interrupts e 4 RS232 485 Async serial ports and 1 Sync serial port e CompactFlash and FAT 16 f
12. Drive Chapter 3 Hardware The valid input voltage at the ADC LTC2448 is 0 1 25V with an on board 2 5V precision reference As default 16 resistor dividers RP1 7 20K 10K are installed to provide valid analog input reading of 0 3 75V Input voltage higher than 2 5V will be read by software as full scale The software source sample code on TERN CD c tern 586 samples Sd 5d_ad24 c allows user to modify the input reading resolution For digital inputs only one byte reading is needed Protective Resistor 20K 20K RP4 RP2 T1 17 IN16_ AA o B15 ADC T12 IN2 A o B01 ADC LTC2448 Analog input 0 3 75V Analog input 0 3 75V RP3 GND H6 H7 SUM H6 H7 Oo _ REF H6 H7 Landing Resistor 3 2 12 SC520 PIOs The SC520 supports 32 user programmable I O lines PIO Each of these pins can be used as a user programmable input or output signal if the interface function is not needed The 586 Drive PIO pins are 3 3V output and all inputs are 5V tolerant Absolutely no voltage greater than SV should be applied to any pins Over 5V voltage input can cause permanent damage After power on reset PIO pins default to various configurations The initialization routine sc_init provided by TERN libraries reconfigures some of these pins as needed as P27 GPCS0 J2 37 for 16 bit I O operation P31 J2 38 as input for STEP2 jumper reading PO as output for on board LED control P1 GPBHE as BHE for 1
13. Figure 4 1 ibuf in tail in_head ibuftisiz Yoyo y y TT i 1111 A Figure 4 1 Circular ring input buffer The input buffer ibuf buffer size isiz and baud rate baud are specified by the user with s1_init with a default mode of 8 bit 1 stop bit no parity After s1_init you can set up a new mode with different numbers for data bit stop bit or parity by directly accessing the Serial Port 0 1 Control Register If necessary as described in chapter 21 of the SC520 manual for asynchronous serial ports Due to the nature of high speed baud rates and possible effects from the external environment serial input data will automatically fill in the buffer circularly without stopping regardless of overwrite If the user does not take out the data from the ring buffer with getserl before the ring buffer is full new data will overwrite the old data without warning or control Thus it is important to provide a sufficiently large buffer if large amounts of data are transferred For example 1f you are receiving data at 9600 baud a 4 KB buffer will be able to store data for approximately four seconds However it is always important to take out data early from the input buffer before the ring buffer rolls over You may designate a higher baud rate for transmitting data out and a slower baud rate for receiving data This will give you more time to do other things without overrunning the input buffer You can use serhit1 to check the stat
14. TERN controllers consists of an I O address space and a memory address space I O address space ranges from 0x0000 to Oxffff or 64 KB Memory address space ranges from 0x00000 to Oxfffff in real mode or 1 MB These are accessed differently and not all addresses can be translated and handled correctly by hardware I O and memory mappings are done in software to define how translations are implemented by the hardware Implicit accesses to I O and memory address space occur throughout your program from TERN libraries as well as simple memory accesses to either code or global and stack data You can however explicitly access any address in I O or memory space and you will probably need to do so in order to access processor registers and on board peripheral components which often reside in I O space or non mapped memory This is done with four different sets of similar functions described below poke pokeb Arguments unsigned int segment unsigned int offset unsigned int unsigned char data Return value none These standard C functions are used to place specified data at any memory space location The segment argument is left shifted by four and added to the offset argument to indicate the 20 bit address within memory space poke is used for writing 16 bits at a time and pokeb is used for writing 8 bits The process of placing data into memory space means that the appropriate address and data are placed on the address and data bus and any memor
15. can be powered by a single unregulated DC power from 8V to 30V range with the on board high efficiency 5V switching regulator NETWORKING CONNECTIVITY An Fast Ethernet Module can be installed to provide 100M BaseT network connectivity The hardware LSI TCP IP stack implements TCP IP UDP ICMP and ARP in hardware With 16KB internal transmit and receiving buffer the Ethernet module releases internet connectivity and protocol processing from the host processor The system can easily handle TCP IP traffic of up to 200 Kbyte s Samples for HTTP Telnet FTP applications are available Up to 4 RS232 serial ports 2 from SC520 and 2 SCC2691 are available Two ports can be factory configured as RS485 INDUSTRIAL I O By default 7 high voltage inputs 30V and 14 high voltage sinking drivers ULN2003A are installed in DIP sockets Each driver is capable of sinking 350 mA at 50V per line They can directly drive solenoids relays or lights Optionally 12 DAC channels can be installed in their place Four high isolation voltage photo couplers PS2701 NEC can be installed to provide optically isolated inputs Also 16 additional input channels are provided with a 24 bit ADC LTC2448 connected via hardware configurable buffer resistors and screw terminal blocks Variable resistor dividers can be installed to allow variable up to 30V input range as default 0 5V They can be processed as analog or digital signals With a peak sample rate of 5 KHz this
16. gt t AD s Bilas 3 7 ira PTE Ty SSSSCSSSEGCOCD 8g ogee ceetoeos A si o iid ts a 4 r Ge e IM7010A REVI Figure 3 9 Default 586 Drive T1 amp T2 Header Configuration 3 15 586 Drive Chapter 4 Software Chapter 4 Software Please refer to the Technical Manual of the C C Development Kit for TERN 16 bit Embedded Microcontrollers for details on debugging and programming tools Guidelines awareness and problems in an interrupt driven environment Although the C C Development Kit provides a simple low cost solution to application engineers some guidelines must be followed If they are not followed you may experience system crashes PC hang ups and other problems The debugging of interrupt handlers with the Remote Debugger can be a challenge It is possible to debug an interrupt handler but there is a risk of experiencing problems Most problems occur in multi interrupt driven situations Because the remote kernel running on the controller is interrupt driven it demands interrupt services from the CPU If an application program enables interrupt and occupies the interrupt controller for longer than the remote debugger can accept the debugger will time out As a result your PC may hang up In extreme cases a power reset may be required to restart your PC For your reference be aware that our system is remote kernel interrupt driven for debugging The run time environment on
17. output pin and can provide square wave output All PITs supports interrupt on terminal count hardware retriggerable one shot and timer functions See samples at c tern 586 samples Se directory for 586_pit0 c and pit2_out c 3 2 7 Software timers The software timer is actually a hardware timer which is intended to provide a millisecond timebase with microsecond resolution Ideal applications for this function include providing a system wide timebase or a precise measurement of the time between events The software timer has a 16 bit microsecond counter that increments with a period of one millisecond This yields a maximum duration of 65 5 seconds A microsecond latch register that provides the number of microseconds since the last time that the millisecond register was read The software timer provides a very efficient hardware timerbase for use by software It is designed to replace the traditional method of system timebase generation Traditional system timebase generation is accomplished by programming a timer to generate a periodic interrupt The interrupt service routine then increments a counter This value is often kept in a global variable which can then be accessed by other code that needs to track time The problem with this traditional timebase is caused by interrupt latency and possible missed interrupt The software timer included can be used to resolve these problems See more details on AMD SC520 Users Manual on TERN C
18. pokeb MMCR _GPRDOFF_ 0x0 set the GP RD offset pokeb MMCR _GPWRW 0x1f set the GP WR pulse width pokeb MMCR _GPWROFF 0x0 set the GP WR offset User may modify the GP bus timing after sc_init Details regarding this can be found in the SC520 User s Manual and SC520 Register Set Manual Slower components such as most LCD interfaces might find the maximum programmable wait state of 15 cycles still insufficient The table below shows the I O mapping for each peripheral 0x2000 0x2004 U2 15 amp U6 32 AD7655 chip select 0x2020 U6 35 Begin conversion on ADC 0x2040 H1 1 Reset watchdog timer 0x2060 0x2074 Ul7 14 SCC2691 Enable 0x2080 0x2094 Ul8 14 SCC2691 Enable 0x20a0 74HC273 Chip select 0x20c0 A 74HC273 Chip select 0x20E0 A CompactFlash chip select 3 2 14 Eight channel 16 bit DAC LTC2600 The LTC2600 is an eight channel 16 bit digital to analog converter DAC in an SO 8 package It is complete with a rail to rail voltage output amplifier capable of driving up to 15mA It uses a 3 wire SPI compatable serial interface and has an output range of 0 REF volts making 1 LSB equal to REF 65535 V 3 7 Chapter 3 Hardware 586 Drive The reference voltage input is routed to J4 pin 11 and by default is shorted to VCC via jumper at J4 11 J4 9 The REF voltage must be greater than GND and less than VCC The DAC outputs are routed to the J4 pin header pins 13 20 The DAC is installed on the 586 Drive at l
19. unsigned char chip unsigned int control_byte void ad24_ssi_rd unsigned char raw The control byte control_byte drives the LTC2448 in 16 channel single ended mode with value 0xb000 In code the control byte is calculated this way 4 14 586 Drive Chapter 4 Software ch_sel 0 select channel control_byte control_byte speed 10 add speed desired to 0xb000 control_byte control_byte ch_sel lt lt 8 add channel selection w 8 bit left shift NOTE ch_sel and the desired channel signal do not match up Instead use this scheme to select the desired signal on the board ch_sel On U11 OnT1 chip header 0 B00 1 1 B02 3 2 B04 5 3 B06 7 4 B08 10 5 B10 12 6 B12 14 7 B14 16 8 B01 2 9 B03 4 10 B05 6 11 B07 8 12 B09 11 13 Bll 13 14 B13 15 15 B15 17 The LTC2448 also supports 8 channel differential mode This can be achieved by changing the control byte passed to the ad24 setup routine to 0xa0000 speed and channel selection is added on the same way as in single ended mode See the LTC2448 data sheet for details on how to define the control byte LTC2448 pdf in the tern_docs parts directory For a sample file demonstrating the use of the ADC please see 5d_ad24 c in tern 586 samples 586 d This sample is also included in the 586d ide test project in the tern 586 samples 5d directory 4 4 4 Compact Flash Interface File System Access The 586Drive offers a 50 pin compact flash
20. 08 Weg 2_P5 OTB 2 3 GND VS 9 ys c OOK VS Ius e COEK VS 9lys a OLK 1 VCG E UDS2982 UDS2982 UDS2982 FLEX20 TERN Title 586 Drive Size Document Number Date August 31 5D 2 2006 Sheet REV ZO
21. 21 Opto coupler Inputs There are 4 opto couplers available on the 5D Positive inputs OT1 to OT4 are routed to T1 25 0T1 T1 24 0T2 T1 22 OT3 T1 21 OT4 Negative inputs are shared in pairs however Input OTA T1 26 corresponds to the OT1 and OT2 opto couplers while input OTB T1 23 corresponds to the OT3 and OT4 optos Inputs are protected by current limiting resistors installed at RP9 Inputs CPU side are read through four Port 1 PIO lines P19 22 each corresponding to an opto coupler See tern samples 586d 5d_opto c for more details 3 2 22 100 MHz BaseT Ethernet An WizNet Fast Ethernet Module can be installed to provide 100M Base T network connectivity This Ethernet module has a hardware LSI TCP IP stack It implements TCP IP UDP ICMP and ARP in hardware supporting internet protocol DLC and MAC It has 16KB internal transmit and receiving buffer which is mapped into host processor s direct memory The host can access the buffer via high speed DMA transfers The hardware Ethernet module releases internet connectivity and protocol processing from the host processor It supports 4 independent stack connections simultaneously at a 4Mbps protocol processing speed An RJ45 8 pin connector is on board for connecting to 10 100 Base T Ethernet network A software library is available for Ethernet connectivity Lines used by the Ethernet device include P23 and Timer 0 output TOUTO These should not be user act
22. 586 Drive C C Programmable 133 MHz 32 bit Web Controller with Floating Point Unit CompactFlash 100M Ethernet High voltage I Os and 24 bit ADC DACs Technical Manual Frery 1724 Picasso Avenue Davis CA 95618 0547 USA Tel 530 758 0180 Fax 530 758 0181 Email sales tern com http www tern com COPYRIGHT 586 Drive 586 Engine 586 Engine P NT Kit and ACTF are trademarks of TERN Inc Am188ES and Am186ES ElanSC520 are trademarks of Advanced Micro Devices Inc Paradigm C C is a trademark of Paradigm Systems Windows95 98 2000 NT ME XP are trademarks of Microsoft Corporation Version 1 1 January 24 2007 No part of this document may be copied or reproduced in any form or by any means without the prior written consent of TERN Inc O 1993 2006 TERN 1724 Picasso Avenue Davis CA 95618 USA Tel 530 758 0180 Fax 530 758 0181 Email sales tern com http www tern com Important Notice TERN is developing complex high technology integration systems These systems are integrated with software and hardware that are not 100 defect free TERN products are not designed intended authorized or warranted to be suitable for use in life support applications devices or systems or in other critical applications TERN and the Buyer agree that TERN will not be liable for incidental or consequential damages arising from the use of TERN products It is the Buyer s responsibility to protect life and property against in
23. 6 bit SRAM data bus high byte enable signal P2 is used for on board EEPROM U0 SDA and AD7655 U6 AO P3 is used by 24 bit ADC LTC2448 Busy P4 is used as EEPROM SCL P5 P11 is for HV U19 8 2 P12 52 12 J0 7 12x DAT P13 J2 13 J0 1 12x CLK P14 J2 14 Some PIO pins on the J2 header are free to use PIO lines can be configured to operate as an output or an input with a weak internal pull up or pull down resistor A PIO pin s behavior either pull up or pull down is pre determined and shown in the table below These configurations as well as the processor internal peripheral usage configurations are listed below in Table 3 1 3 5 Chapter 3 Hardware 586 Drive gt P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 P16 P17 P18 P19 P20 P21 P22 P23 P24 P25 P26 P27 P28 P29 P30 P31 Table 3 1 I O pin default configuration after power on or reset GPALE GPBHE GPRDY GPAEN GPTC GPDRQ3 GPDRQ2 GPDRQ1 GPDRQO GPDACK3 GPDACK2 GPDACK1 GPDACKO GPIRQIO GPIRQ9 GPIRQ8 GPIRQ7 GPIRQ6 GPIRQS5 GPIRQ4 GPIRQ3 GPIRQ2 GPIRQI GPIRQO GPBUFOE GPIOCS16 GPMCS16 GPCSO CTS2 DSR2 DCD2 RIN2 Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull down Input with pull down Input with pull down Input with pull down Input with pull up Input with pull up Input with pull up Input with pull up Input with pull
24. A2 1 AAI 0 A2 0 ABI 1 A2 1 AA2 1 A2 0 AB2 Refer to the sample program tern 586 samples Sd 5d_ad c and data sheet tern_docs parts ad7655 pdf for additional details Also refer to the pre built sample project tern 586 samples 5d 586d ide 4 4 2 8 channel 16 bit DAC To access the DAC use the routine called da_2600 found in the tern 586 samples Sd 5d_da c sample program You must copy the routine from the source file into your application as it is not part of a library The function da 2600 takes two arguments The first is the channel to write to with the valid range 0 7 The second is the output value ranging from 0 65535 See the sample program for additional details 4 4 3 16 channel 24 bit ADC Delta Sigma ADC LTC2448 The LTC2448 ADC U22 provides 16 channels of 0 2 5V analog single ended 24 differential inputs or 0 3 75V input with 2 5V reference chip default input resistor divider network It should be noted that with a 2 5V ref chip the input at the ADC chip itself should be 1 25V To account for a diverse range of user input voltages you may reconfigure the resistor dividers to fit your input needs as long as the input voltage ADC side is 1 25V For details regarding the hardware configuration see the Hardware chapter The following functions will drive the 24 bit ADC The order of functions given here should be followed in actual implementation void ad24_init void void ad24_setup
25. B 3 4 CLKT P28 36 35 P29 5 6 GND TXDO 34 33 P23 7 8 DO RXDO 32 31 9 10 D1 P30 30 29 P26 11 12 D2 TXDI1 28 27 D15 13 14 D3 RXD1 26 25 P25 RST 15 16 D4 P24 24 23 RST 17 18 D5 22 21 TINO 19 20 D6 20 19 D14 21 22 D7 P17 18 17 P18 D13 23 24 GND P15 16 15 P16 25 26 A7 P14 14 13 P13 D12 27 28 A6 P12 12 11 SSI NOWR 29 30 A5 10 9 SSO ORD 31 32 A4 TOUTO 8 7 SSC D11 33 34 A3 INTA 6 5 TOUT1 D10 35 36 A2 4 3 PITO2 D9 37 38 Al GND 2 1 TINI D8 39 40 AO 3 4 2 Header J4 The J4 10x2 pins headers on the 586 Drive provides the user with access to DAC outputs ADC inputs See the schematic 5d man sch attached in the last page of this manual for details 3 14 J4 Signal AAI 1 2 GND AA2 3 4 GND AB2 5 6 GND ABI 7 8 GND VCC 9 10 REF REF1 11 12 v2 13 14 V3 Vil 15 16 V4 V7 17 18 V6 V8 19 20 V5 586 Drive Chapter 3 Hardware 3 4 3 Headers T1 and T2 Both these headers are 26x1 screw terminals T1 provides 16 ADC inputs and 4 opto coupler inputs T2 provides 7 HV inputs and 14 HV outputs See schematic for more details Default ULN2003A chips are installed in U20 and U21 to provide 14 high voltage sinking drivers at O10 O16 and 018 024 The O9 and O17 lines are not used for sinking drivers Optionally two UDS2892 chips can be installed in U20 and U21 to provide 16 high voltage soucing drivers The O9 and O17 lines will be used here for sourcing PRU x o O C AC EAN HOAGDSOGCs oos CN hn NO z R wr Y e g
26. D 09 lIDownload Intel Extend Hex file into SRAM Select Port gt G 1Goto and Run gt H 69 JHELP Select Baud gt M 09 IMENU gt U 69 JUpload a block of Binary data Upload HEX file D Select HEX file Ready to recieve Intel Extend HEX file Characters 2 Framing Erro Overrun Errors 5 F6 Upload HEX file from PC to 586 SRAM 2 3 586 Drive Chapter 2 Installation CAPDOS32 Of x aw dela el S Al Paradigm PDREMOTE ROM Loader Version 2 62 Help UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU UU UUUUUUUUUUUUUU UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU UU UUUUUUUUUUUUUU Send NULL UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU UU UUUUUUUUUUUUUU UUUUUUU UU UU UU UU UU UU U UU UU UU UU UU UU UU UUUUUUUUUUUUUU Select Port UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU UUUUUUUUUUUUUUUU UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU UU UUUUUUUUUUUUUU Select Baud UUUUU UU UU UU UU UU UU UU U UU UU UU UU UU UU U UU UU UU UUUUUUUUU UUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUEND of File ReUor Upload HEX file d CHKSUM HEX file CS IP 04000 Characters Se 26766 Framing Errors pload Progr 166 Overrun Errors TERN S86 ROM L_ 6 Type G04000 to run the L_29F400 in SRAM The first time you type G04000 you will get an error Doing the G04000 again you will see as below M2 CAPDOS32 Of x awo adela a A Paradigm PDREMOTE ROM Loader Version 2 62 Help UUUUUUUUUUU UU UU UU UU UU UU UU UU UU U
27. D amd_docs sc520 sc520_user_manul pdf chapter 18 3 2 8 SST A synchronous serial interface SSI provides full duplex and half duplex bi directional communication at a software programmable SSI clock speed from 64K Hz to 8MHz 586 Drive uses the SSI to interface to the LTC2448 ADC and TLC2600 DAC The user can use the SSI to interface many types of external serial peripheral devices See the sample c tern 586 samples Se ssio c 3 3 Chapter 3 Hardware 586 Drive 3 2 9 RTC A battery backed up real time clock RTC is included The RTC consists of time of day clock with alarm and a 100 year calendar It has also a programmable periodic interrupt and 114 bytes of static user RAM When the 5D is powered off the RTC and 114 bytes of static RAM is backed up by the 3V battery installed on the 586 Drive See samples 586_rtc c and rtc_pint c for more details 3 2 10 Watchdog timer The Watchdog timer included in SC520 is not disabled The 586 Drive uses a 691 supervisor chip to monitor the 5V power and provides an external watchdog User can activate the 691 watchdog with a jumper setting on H1 The watchdog timer provided a means to monitor proper software execution If software becomes stuck in an infinite loop for example the watchdog timer can reset the board to recover to proper execution If the watchdog timer is enabled via install a jumper at H1 it must be reset via software every 1 6 seconds or sooner If the watchdog time
28. DB vV Cl yo vir LL TXD vV 6 44 711 LL TXDB g31 TXDO 7 t20 721 LO TXDO TXDA 7 p59 por 20 TXDA c4 0 1UF RXDO 8 257 R20 9 RXDO RXDA 8 231 noo 2 RXDA MAX232D MAX2 32D ini a2 RRA 2 BOO U24 U25 IN2 3 4 Bol p9 3 210 po 3 2_ MO IN3 5 6 B0 A ZA py ae pi 419 Ql str p14 Ph 2 f5sm IN4 7 8 B03 D2 7 22 82 eae DA 71 2 e M2 D3 Q3 D3 Q3 DS 815 o4 C23 D3 8 5 oa 2533 RPS Da 13 55 65 4214 D4 13 55 5 2m4 INS 1 2 B04 DS 14155 oe H515 D5 14 55 e 5m5 IN6 3 aN 4 BOS D6 17157 y 1616 De 17 57 7 16 M6 INTO 5 yA 6 B06 D7 18158 os S27 D7 18 58 gs 2M7 INS TA 8 BOT 44111 ES PE RP8 RST 1 RST 1 InN9 1 2_ B08 Q CER CIR 1N103 MT BOO 74HC273 74HC273 INEL 5 op A 6 B10 IN12 7 8 Bil U31 P7 VOUT ol 10 4 P22 3 VO gt mi31 B24 2 B12 ora2 5 d 3 GND 3 GND 3 IN143 Aha 4 B13 4 IN15 5 6 B14 OPTO1 5 HDRS3 IN167_ AA 8_ B15 O2 1 PRAN 4 P19 y HDRS3 OTA 2 o 3 GND E u21 U20 LO 1 18 09 MO 1 18 017 DTRIL 18 01 RN1 OPTO1 3 T 2 a 17 010 Ml 2 17 018 P11 2 a SS 17 02 8 Pil o3 1 703 4 p21 J5 12 3 35363 1g6 011 m2 3 3303 1g6 o19 pio 3 75 65 46 03 7 P10 OTB 2 5 3_GND 12V1 o2 K 13 A ga og 19 012 M3 4 j4 og 45 020 P9 Alii oa 19 04 6 P9 Ta 5 55 os 14 O13 M45 56655 44021 P8 5 i505 14 05 YG 5 P8 vs 3 4 GND L5 6 52 oe 43 014 m5 6li2oe 13022 P76 72 62 13 06 RG 4 P7 OPTO1 o o Le I 55 67 42 015 m6 7 75 oy 42 023 Pe 7 75 65 42 07 3 P6 o4 1 704 _4 P20 HDRD4 L7 8 53 og LL 016 M7 8li308 41024 P5781 76 Gg 11
29. O led ron ron D libNae lib 1ib D c tern 186 samples ae led E D readme txt txt Run the Paradigm C ATLDAD wiy O agetimone LO nctconmected aM A HEX file Loader window will be shown 2 1 586 Drive Chapter 2 Installation CAPDOS32 ano a ala El A Paradigm PDREMOTE ROM Loader Version 2 02 Help Send NULL Select Port Select Baud Upload HEX file HEX file Characte Framing Upload P By Overrun 2 F5 Select Baud to setup 19200 3 F8 Select HEX file from c tern 586 rom L_29F400 HEX a CAPDOS32 Paradigm PDREMOTE ROM Loader Version 2 62 Help Send NULL Upload HEX file Select HEX file EXIT COM1 Charact 19266 Upload PDREM HEX 3 Power on the 586 Drive with the STEP2 jumper off the ACTF menu will show up 2 2 586 Drive Chapter 2 Installation CAPDOS32 Paradigm PDREMOTE ROM Loader Version 2 62 Help 001 fd1lStarting ACTF_586 Send NULL ACTF_586 Copyright lt c gt 26868 STE CA USA All righ ts reserved Select Port gt C 91C FUNCTIONS gt D 69 lIDownload Intel Extend Hex file into SRAM Select Baud gt G 1Goto and Run gt H 69 JHELP Upload HEX file gt M 69 IMENU gt U 69 JUpload a block of Binary data HEX file Characters O Framing Erro Ay Overrun Errors TERNN5S86 ROM L_ Paradigm PDREMOTE ROM Loader Version 2 62 Help ACTF_586 Copyright lt c gt 2666 STE CA USA All righ ts reserved Send NULL gt C 91C FUNCTIONS gt
30. TAIL ptr int out head Output buffer HEAD ptr int out size Output buffer size unsigned char Output buffer FLAG unsigned cha Output buffer MT unsigned char tmso transmit macro service operation unsigned char rts unsigned char dtr unsigned char en485 unsigned char err unsigned char node unsigned char cr scc CR register F unsigned char slave unsigned int in segm input buffer segment unsigned int in offs input buffer offset unsigned int out_segm output buffer segment unsigned int out_offs output buffer offset unsigned char byte delay V25 macro service byte delay COM FATE ER PETIT TS ES ES sn_init Arguments unsigned char b unsigned char ibuf int isiz unsigned char obuf int osiz COM e Return value none 4 11 Chapter 4 Software 586Drive This function initializes either SERO or SER1 with the specified parameters b is the baud rate value shown in Table 4 1 Arguments ibuf and isiz specify the input data buffer and obuf and osiz specify the location and size of the transmit ring buffer The serial ports are initialized for 8 bit 1 stop bit no parity communication There are a couple different functions used for transmission of data You can place data within the output buffer manually incrementing the head and tail buffer pointers appropriately If you do not call one of the following functions however the driver i
31. The text string has a format of year1000 year100 year10 yearl month10 month day10 day1 hour10 hour min10 min second10 second1 For example 19991220081020 represents year 1999 December 30 Eight o clock 10 minutes and 20 seconds This function returns 0 on success and returns in case of error such as the clock failing to respond Void rtc_init Arguments char t RTCTIME rtcp Return value none This function is used to initialize and set a value into the real time clock The argument t should be a null terminated byte array that contains the new time value to be used The RTCTIME data structure will be initialized based on the string t The byte array should correspond to weekday year10 yearl month10 month1 day10 day1 hour10 hourl minute10 minutel second10 second 0 y If for example the time to be initialized into the real time clock is June 5 1998 Friday 13 55 30 the byte array would be initialized to unsigned char t 14 Delay In many applications it becomes useful to pause before executing any further code There are functions provided to make this process easy For applications that require precision timing you should use hardware timers Software Timer of SC520 provided on board for this purpose void delay0 Arguments unsigned int t Return value none This function is just a simple software loop The actual time that it waits depends on processor speed as well as interrupt lat
32. UUUUUUUUUUUUUUUUUU UUUUUUUUUUU UU UU UU UU UU UU UU UU UU UUUUUUUUUUUUUUUUUUU Send NULL UUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUU UUUUUUUUUUUUUUUUUUUUUUUUUUUUUUUEND of File ReUor d CHKSUM 6 Select Baud CS IP 64666 Select Port Upload HEX file G64666 Upper Case Ueys only M for menu H for he p ERROR 55151515 Select HEX file Characters Se 26713 Framing Errors Upload Progre 166 Overrun Errors The 29F400 Flash sector 0x80000 to OxFBFFF will be erased It will then be ready to program Flash with new DEBUG kernel file c tern 586 rom 5860_115 hex or user application HEX 7 F8 Select HEX file from c tern 586 rom 5860_115 hex 2 4 586 Drive Chapter 2 Installation CAPDOS32 Paradigm PDREMOTE ROM Loader Version 2 62 Help SECTOR SECTOR 1 Send NULL SECTOR 2 PDREMOTE ROM filename tern S86 rom 5866_115 HEX Upload HEX file SECTOR 8 SECTOR 2 Select HEX file Ready to recieve Intel Extend HEX file at 19266 baud EXIT COM1 Characters 26714 Framing Erro 19200 1067 Overrun Errors TERNNS86 ROM L_ Paradigm PDREMOTE ROM Loader Version 2 62 VUYUUUUUUUUUUUUUU UU UU UU UU UU UU UU UU UU UU UU Send NULL tdi ACTF_58 en Select Port ACTF_586 So pyE gnese 2666 STE CA USA All righ ts reserved Select Baud gt CL IC FUNCTIONS gt D 09 lIDownload Intel Extend Hex file into SRAM Upload HEX file gt GLO JGoto and Run gt H 69 JHELP Select HEX file gt M 09 IMENU ae
33. a protocol translator works It would receive an input HEX file from SER1 and translate every character to The translated HEX file is then transmitted out of SERO This sample program can be found in tern 586 samples 5e Software Interface Before using the serial ports they must be initialized There is a data structure containing important serial port state information that is passed as argument to the TERN library interface functions The COM structure should normally be manipulated only by TERN libraries It is provided to make debugging of the serial communication ports more practical Since it allows you to monitor the current value of the buffer and associated pointer values you can watch the transmission process The two serial ports have similar software interfaces Any interface that makes reference to either s0 or ser0 can be replaced with s1 or serl for example Each serial port should use its own COM structure as defined in 586 h typedef struct unsigned char ready TRUE when ready unsigned char baud unsigned char mode unsigned char iflag interrupt status unsigned char in buf Input buffer int in tail Input buffer TAIL ptr int in head Input buffer HEAD ptr int in size Input buffer size int in crcent Input lt CR gt count unsigned char i Input buffer FLAG unsigned char i input buffer full unsigned char i Output buffer int out tail Output buffer
34. b can be used to initialize and to operate PIO pins void pio_init char bit char mode Where bit 0 31 and mode 0 for interface function 1 for input or 2 for output Example pio_init 0 2 will set PO as output pio_init 1 0 will set P1 as GPBHE void pio_wr char bit char dat 3 6 586 Drive Chapter 3 Hardware pio_wr 0 1 set PO pin high and the LED is off if PO is in output mode pio_wr 0 0 set PO pin low and the LED is on if PO is in output mode unsigned int pio_rd char port pio_rd 0 return 16 bit status of PO P15 if corresponding pin is in input mode pio_rd 1 returns 16 bit status of P16 P31 if corresponding pin is in input mode Some of the I O lines are used or shared by the 586 Drive system for on board components Do not use these lines unless you are sure that you are not interfering with the operation of such components 3 2 13 I O Space External I O devices can use I O mapping for access You can access such I O devices with inportb port or outportb port dat These functions will transfer one byte or word of data to the specified I O address The external I O space is 64K ranging from 0x0000 to Oxffff The default GP bus timing is setup in sc_init as pokeb MMCR _GPCSRT_ 0x01 set the GP CS recovery time pokeb MMCR _GPCSPW_ Ox1If set the GP CS width pokeb MMCR _GPCSOFF_ 0x01 set the GP CS offset pokeb MMCR _GPRDW_g 0x1f set the GP RD pulse width
35. cidental failure TERN reserves the right to make changes and improvements to its products without providing notice 586 Drive Chapter 1 Introduction Chapter 1 Introduction INTRODUCTION The 586 Drive 5D is a C C programmable controller based on the 32 bit 133 MHz AMD Elan SC520 It combines this high performance 586 generation processor with an extensive set of industrial I O features on a single board The SC520 integrates an Am586 CPU and a high performance ANSI IEEE 754 compliant hardware floating point unit FPU The SC520 has a total of seven timers including PIT timers and GP timers plus a software timer A real time clock RTC provides a time of day calendar and 114 bytes of battery backed RAM 13 user programmable multifunctional I O lines are available One synchronous serial interface SSI supports full duplex high speed bi directional communication By default 256K W low power 55 ns SRAM is installed to allow longer battery backup lifetime this requires slower 2 wait state access to memory Optionally if battery backup is not required a high speed 20 ns SRAM can be installed to allow higher performance zero wait state operation In additional to the on board surface mount Flash a 32 pin DIP IC socket allows using traditional user application plug in ROM Flash A 50 pin CompactFlash interface supports low cost removable up to 2 GB mass storage CompactFlash cards with Windows compatible FAT file system support The 5D
36. ency The code is functionally identical to While t t Passing in a t value of 600 causes a delay of approximately 1 ms void delay_ms Arguments unsigned int Return value none This function is similar to delay0 but the passed in argument is in units of milliseconds instead of loop iterations Again this function is highly dependent upon the processor speed NOT accurate at all 4 8 586 Drive Chapter 4 Software void sc_rst Arguments none Return value none This function is similar to a hardware reset and can be used if your program needs to re start the board for any reason Depending on the current hardware configuration this might either start executing code from the DEBUG ROM or from some other address 4 3 Functions in SERO OBJ SER1 OBJ The functions described in this section are prototyped in the header file ser0 h and ser1 h in the directory tern 586 include The internal asynchronous serial ports are functionally identical SERO 2 is used by the DEBUG ROM provided as part of the TERN EV DV P software kits for communication with the PC As a result you will not be able to debug code directly written for serial port 0 but you can run it in STEP2 Two asynchronous serial ports are integrated in the SC520 SERO 2 and SER1 Both ports have baud rates based on the system clock and can operate at a maximum of 1 152 Mbaud By default SERO is used by the DEBUG ROM for application download debugging in STEP 1
37. errupt handlers the appropriate in service bit for the IR signal currently being handled must be cleared This can be done using the Nonspecific EOI command At initialization time interrupt priority was placed in Fully Nested mode This means the current highest priority interrupt will be handled first and a higher priority interrupt will interrupt any current interrupt handlers So if the user chooses to clear the in service bit for the interrupt currently being handled the interrupt service routine just needs to issue the nonspecific EOI command to clear the current highest priority IR void intx_init Arguments unsigned char i void interrupt far intx_isr Return value none These functions can be used to initialize any one of the external interrupt channels for pin locations and other physical hardware details see the Hardware chapter The first argument i indicates whether this particular interrupt should be enabled or disabled The second argument is a function pointer which will act as the interrupt service routine The overhead on the interrupt service routine when executed is about 20 us By default the interrupts are all disabled after initialization To disable them again you can repeat the call but pass in 0 as the first argument T O Initialization Two ports of 16 I O pins each are available on the 586Drive Hardware details regarding these PIO lines can be found in the Hardware chapter Several functions a
38. es from the input buffer It also stops retrieving data from the buffer if a carriage return ASCII 0x0d is retrieved This function makes repeated calls to getser and will block until len bytes are retrieved The return value indicates the number of bytes that were placed into the buffer 4 12 586 Drive Chapter 4 Software Be careful when you are using this function The returned character string is actually a byte array terminated by a null character This means that there might actually be multiple null characters in the byte array and the returned value is the only definite indicator of the number of bytes read Normally we suggest that the getsers and putsers functions only be used with ASCII character strings If you are working with byte arrays the single byte versions of these functions are probably more appropriate Miscellaneous Serial Communication Functions One thing to be aware of in both transmission and receiving of data through the serial port is that TERN drivers only use the basic serial port communication lines for transmitting and receiving data Hardware flow control in the form of CTS Clear To Send and RTS Ready To Send is not implemented There are however functions available that allow you to check and set the value of these I O pins appropriate for whatever form of flow control you wish to implement Before using these functions you should once again be aware that the peripheral pin function you are us
39. g two interface functions There are two common data structure used to access and use both interfaces SC520 RTC data structure typedef struct unsigned char sec unsigned char alarm_sec unsigned char min unsigned char alarm_min unsigned char hour unsigned char alarm_hour unsigned char day_week unsigned char day_month unsigned char month unsigned char year RTCTIME Real time data structure typedef struct unsigned char secl One second digit unsigned char sec10 Ten second digit unsigned char min1 One minute digit unsigned char min10 Ten minute digit unsigned char hourl One hour digit unsigned char hour10 Ten hour digit unsigned char day1 One day digit unsigned char day10 Ten day digit unsigned char mon1 One month digit unsigned char mon10 Ten month digit unsigned char yearl One year digit unsigned char year10 Ten year digit unsigned char wk Day of the week y TIM 4 7 Chapter 4 Software 586Drive int rtc_rd Arguments TIM r Return value int error_code This function places the current value of the real time clock within the argument r structure The structure should be allocated by the user This function returns 0 on success and returns in case of error such as the clock failing to respond int rtc_rds Arguments char realTime Return value int error_code This function places a string of the current value of the real time clock in the char realTime
40. he H1 pinl HIT should be arranged such that the HIT pin is accessed at least once every 1 6 seconds If the H1 jumper is installed and the HIT pin is not accessed within this time out period the watchdog timer pulls the WDO pin low and asserts RST This automatic assertion of RST may recover the application program if something is wrong When controllers are shipped from the factory the H1 jumper is off which disables the watchdog timer The SC520 s internal watchdog timer is disabled by default with sc_init Battery Backup Protection The backup battery protection protects data stored in the SRAM and RTC The battery switch over circuit compares VCC to VBAT 43 V lithium battery positive pin and connects whichever is higher to the VRAM power for SRAM and RTC Thus the SRAM and the real time clock RTC72423 are backed up In normal use the lithium battery should last about 3 5 years without external power being supplied When the external power is on the battery switch over circuit will select the VCC to connect to the VRAM Chapter 3 Hardware 3 4 Headers and Connectors 3 4 1 Expansion Headers J1 and J2 There are two 20x2 0 1 spacing headers for 586 Drive expansion Most signals are directly routed to the SC520 processor These signals are 3 3V and 5V tolerant and any out of range voltages will damage the 586 Drive board J2 Signal JI Signal GND 40 39 VCC VCC 1 2 GND P31 38 37 P27 INT
41. ile system support e 4 ch 16 bit ADC AD7655 and 8 16 bit DAC LT2600 e Hardware TCP IP stack for 100M Base T Ethernet e 16 analog or digital inputs 30V with 24 bit ADC LT2448 e 20 Solenoid Drivers 4 Opto couplers 10 digital I Os Physical Description The physical layout of the 586 Drive is shown below Power Input GND 12V 7 HV Inputs 14 Solenoid Drivers We oe or on OA Es ScB y EEEE oe oe i o lt oe o 0 gt EA Ce NBA A a E len A E z 3 SEELS URNE I NA fe 2 0 2 H2 SERO i O aiii E 129 oO gt dlk J gt Debug Port af ollo AAN a am Peart 3 AAA IZNET 0 i N 5 E VICO QU e 5 60600600EAAGAGOEA G6eeGeEG0006600 w us raced ubyAneus pbs Y A e O weooooocooca soco do aoo 0z IA 16 Analog Digital Inputs based on 24 bit ADC LTC2448 100M Ethernet 8 Analog 4 Inputs Outputs 16 bit ADC 4 OPTOs TLC2600 AD7655 1MHz 1 2 586 Drive Chapter 1 Introduction Expansions of the 586 Drive A P300 expansion board can be driven by the 586 Drive E S A O ii MN DN 1 3 Chapter 1 Introduction 586 Drive Power On or Reset Validation of NO Set the CS IP in battery back up internal RAM to 8000 0000 Step 2 jumper set STEP 1 ACTF menu sent out through ser0 at 19200 baud code CS IP in CPU s internal RAM Figure 1 1 Flow chart for ACTF operation The ACTF boot
42. ing might not be selected as needed For details please refer to the SC520 User s Manual char sn_cts void Retrieves value of CTS pin void sn_rts char b Sets the value of RTS to b Completing Serial Communications After completing your serial communications you can re initialize the serial port with s1_init to reset default system resources sn_close Arguments COM c Return value none This closes down the serial port by shutting down the hardware as well as disabling the interrupt The asynchronous serial I O ports available on the SC520 have many other features that might be useful for your application If you are truly interested in having more control please read Chapter 21 of the manual for a detailed discussion of other features available to you 4 4 Functions Routines not in 586 lib 4 4 1 4 channel 16 bit ADC AD7655 The ADC is accessed using a few different control lines The control lines are summarized below Control Line Description Function ICV Begin conversion I O address 0x2020 AD Read conversion 0x2000 for AB1 AB2 and 0x2004 for AAI and AA2 P2 MUX select P2 high selects AA2 AB2 P2 low selects AAI AB1 A2 A2 AD amp 0x0004 4 13 Chapter 4 Software 586Drive The following process must be followed to read the ADC pio _wr 2 hi lo inport CV wait for 2 5 us inport ADA inport ADB Where hi_lo ADA ADB Read channel 0
43. interface TERN libraries support FAT file systems access to from the compact flash interface This allows uses to log data with the 586Drive and then conveniently access the file s with a PC Refer to tern 586 include fileio h and tern 586 include filegeo h for file system functions and descriptions Also see tern 586 samples 5p 586p ide for a sample program accessing the compact flash interface For the program in 586p ide you will need to install a FAT formatted CF FAT32 is NOT allowable card into the 586Drive and link SER1 H3 with a PC hyper terminal at 192 000 N 8 1 4 4 5 UART SCC2691 Two SCC2691 UART chips may be installed on the 5D at location U17 and U18 The UART at U17 is enabled using chip select line SC1 while U18 is enabled using SC2 Because this UART configuration is unique on the 586 Drive new functions utilizing specific mapping were created to service these chips UART U17 will use code from tern 586 samples 586d sc1 c and U18 uses tern 586 samples 586d sc2 c It is vital to include one or both of these files in your target depending on which UART s you are using 4 15 Chapter 4 Software 586Drive Also make sure to include sc1 h for scl c and sc2 h for sc2 c in your code Before using a serial port we must initialize it with the following function calls scl_init ml m2 baud scl_in_buf isize scl_out_buf osize cl U17 UART initialization sc2_init ml m2 baud sc2_in bufisize sc2_o
44. ivated if Ethernet option is installed 3 12 586 Drive Chapter 3 Hardware w 2 59 0050 47 po i4 TEN pee i 14 EASTER 0G CCECCCEEGE LIM7010A REVII Figure 3 8 WizNet Ethernet Module 3 3 Power supplies and Supervisor with Watchdog Timer Two supervisor chips monitor 5V and 3 3V and provide power failure detection a watchdog and system reset The 2 5V power supply is used for the SC520 core and 3 3V supports SC520 I O operation Signal lines on headers are 3 3V output and SV maximum input Absolutely no voltage greater than 5V should be applied to any pins The 388 pin BGA package of SC520 makes repair support not available All components are soldered on board for highest reliability The 586 Drive can be powered with a single regulated 5V with the on board 3 3V and 2 5V regulators The 586 Drive also includes an on board switching regulator to provide 5V from an unregulated 8 30V input A 691 U7 supervisor chip is used to monitor the 5V power and a MIC8114 U4 is designed to monitor the 3 3V The supervisor provides a watchdog timer battery backup power on reset delay power supply monitoring and power failure warning These will significantly improve system reliability Watchdog Timer Setting a jumper on H1 activates the 691 watchdog timer The watchdog timer provides a means of verifying proper software execution In the user s application program calls to the function inport 0x2040 that toggles t
45. loader resides in the 256KW on board Flash chip 29F400 At power on or RESET the ACTF will check the STEP 2 jumper If STEP 2 jumper is not installed the ACTF menu will be sent out from serial port0 at 19200 baud If STEP 2 jumper is installed the 586Drive will check for a valid battery back up If present it will go to the jump address stored in the CPU s 114 bytes of general purpose RAM Without a valid battery back up it will write the address 0x80000 to the inernal RAM and then go to that address There is a 32 pin ROM socket on the 5D The user s application program must reside in SRAM for debugging in STEP1 reside in battery backed SRAM for the standalone field test in STEP2 and finally be programmed into Flash for a complete product For production the user must produce an ACTF downloadable HEX file for the application based on the DV P The STEP2 jumper J2 pins 38 40 must be installed for every production version board Step 1 settings In order to correctly download a program in STEP1 with Paradigm C Debugger the 5D must meet these requirements 1 5860_115 HEX must be pre loaded into Flash starting address 0x80000 2 The CPU s 114 bytes of RAM must have the correct jump address pointing at 5860_115 HEX which is the address 0x80000 4 The STEP2 jumper must be installed on J2 pins 38 40 For further information on programming the 586 Drive refer to the Software chapter 1 4 586 Drive Chapte
46. lue unsigned int unsigned char data This function can be used to retrieve data from components in I O space You will find that most hardware options added to TERN controllers are mapped into I O space since memory space is valuable and is reserved for uses related to the code and data Using I O mappings the address is output over the address bus and the returned 16 or 8 bit value is the return value For a further discussion of I O and memory mappings please refer to the Hardware chapter of this technical manual 4 1 586 LIB 586 LIB is a C library for basic 586Drive operations It includes the following modules 586 0BJ SERO OBJ SER1 OBJ SCC OBJ You need to link 586 LIB in your applications and include the corresponding header files The following is a list of the header files timer counter ADC DAC RTC Watchdog Internal serial port 0 2 Internal serial port 1 External UART SCC2691 The 586 LIB was originally developed for the 586 Engine the predecessor to the 586 Engine D Function prototypes for the 586 Engine s ADC and DAC were incorporated into 586 lib The 586Drive does not uses these same routines for its analog I O You must refer to the sample code in the 586 samples 5d directory for examples on accessing the analog I O on the 586Drive 4 2 586 Drive Chapter 4 Software 4 2 Functions in 586 0BJ 4 2 1 586Drive Initialization sc_init This function should be called at the beginning of every program ru
47. n the ACTF menu should show up At the ACTF menu prompt type G08000 to setup the Jump Address and run your application Power off install the STEP2 Jumper Then at power on controller will jump to 0x08000 in SRAM and run your application 2 6 586 Drive Chapter 2 Installation 2 3 Hardware Installation Overview e Connect debug serial cable For debugging STEP 1 place IDE connector on SERO H2 with red edge of cable at pin 1 e Connect wall transformer Connect 9V wall transformer to power and plug into power jack adapter which installs in 2 pin screw terminal SITO COSTS OO OOOO OOOO MES pesa AN id q PEN E a STEP2 red jumper 6666 66666606G8 9 0 9 OG GC eaeesa e ag Do t c TANTAS TA A ru T OGOOGO 1IM70I0A REI IN 80s AY 5 Debug serial cable installed on SERO H2 with red edge of cable aligned with pin 1 Other end to PC s COMx port Watchdog Jumper 2 7 586 Drive Chapter 3 Hardware Chapter 3 Hardware 3 1 C520 Introduction The 586 Drive is based on AMD Elan SC520 Microcontroller It includes an industry standard Am5x86 CPU with floating point unit FPU It provides a General Purpose GP bus with programmable timing for 8 and 16 bit devices A ROM Flash controller supports on board high performance code execution An enhanced programmable interrupt controller PIC prioritizes 22 interrupt levels with up to 15 external sources Two asynchron
48. nning on 586Drive It provides default initialization and configuration of the various I O pins interrupt vectors sets up I O and provides other processor specific updates needed at the beginning of every program There are certain default pin modes and interrupt settings you might wish to change With that in mind the basic effects of se_init are described below For details regarding register use you will want to refer to the AMD SC520 Microcontroller User s manual e Initialize the programmable interrupt controller Setup the master interrupt controller at vector 0x40 The slavel interrupt vector at 0x48 and slave 2 interrupt vector at 0x50 e Initialize ROMCS chip select to support the 8 bit I O starting 0x 1000 and the GPCSO to support 16 bit I O starting address at 0x1800 e Disable SDRAM e Initialize default GP bus chip select timing as pokeb MMCR _GPCSRT_ 0x01 set the GP CS recovery time pokeb MMCR _GPCSPW_ 0x1f set the GP CS width pokeb MMCR GPCSOFF 0x01 set the GP CS offset pokeb MMCR _GPRDW_ 0x1f set the GP RD pulse width pokeb MMCR _GPRDOFF_ 0x0 set the GP RD offset pokeb MMCR _GPWRW_ Oxlf set the GP WR pulse width pokeb MMCR GPWROFF_ 0x0 set the GP WR offset e Initialize and configure PIO ports for default operation All pins are set up as default input except for P31 P27 P2 and PO The GP chip selects are set to 0x1f wait states by default This makes it p
49. nterrupt for the appropriate serial port will be disabled which means that no values will be transmitted This allows you to control when you wish the transmission of data within the outbound buffer to begin Once the interrupts are enabled it is dangerous to manipulate the values of the outbound buffer as well as the values of the buffer pointer putsern Arguments unsigned char outch COM c Return value int return_value This function places one byte outch into the transmit buffer for the appropriate serial port The return value returns one in case of success and zero in any other case putsersn Arguments char str COM c Return value int return_value This function places a null terminated character string into the transmit buffer The return value returns one in case of success and zero in any other case serhitn should be called before trying to retrieve data serhitn Arguments COM c Return value int value This function returns 1 as value if there is anything present in the in bound buffer for this serial port getsern Arguments COM c Return value unsigned char value This function returns the current byte from sm_in_buf and increments the in_tail pointer Once again this function assumes that serhitn has been called and that there is a character present in the buffer getsersn Arguments COM c int len char str Return value int value This function fills the character buffer str with at most len byt
50. ocation U8 and uses RTSO as the chip select The synchronous serial interface is used to send data to the device Refer to the sample code tern 586 samples Sd 5d_da c for an example on driving the DAC The sample is also included in the pre built sample project tern 586 samples Sd 5d ide Refer to the DAC data sheet for additional specifications tern_docs parts ltc2600 pdf 3 2 15 Four channel 16 bit ADC The unique 16 bit parallel ADC AD7655 0 5V supports ultra high speed 1 MHz conversion rate analog signal acquisition The AD7655 contains two low noise high bandwidth track and hold amplifiers that allow simultaneous sampling on two channels Each track and hold amplifier has a multiplexer in front to provide a total of 4 channels analog inputs The parallel ADC achieves very high throughput by requiring only two CPU I O operations one start one read to complete a 16 bit ADC reading With a precision external 2 5V reference the ADC accepts 0 5V analog inputs at 16 bit resolution of 0 65 535 See sample program tern 586 samples 5Sd 5d_ad c for details on reading the ADC The sample program is also included in the pre built sample project tern 586 samples Sd 5d ide Refer to the data sheet for additional specifications tern_docs parts ad7655 pdf 3 2 16 UART SCC2691 There are two UART SCC2691 chips U17 U18 which are mapped into the 8 bit I O address space at 0x2060 0x2074 and 0x2080 0x2094 The SCC2691 has a full duplex as
51. or 35MM DIN Rail e To be used in a closed rack or installation box e Possibility for both horizontal and vertical PCB e Custom Perforations and Printing TECHNICAL DATA HOUSING Material Lexan Color Gray RAL 7035 Max Temp 100 C Width 157 0 MM Flammability UL 94 VO BASE Material Noryl Color Black RAL 7021 Max Temp 100 C Max Wire Dia 2 x 2 5mm Max Load 10A Terminals 52 Fixed or Plugable Mounting DIN Rail EN50022 Flammability UL 94 VO 157 0 SERIES 1570 ORDER CODE Housing gray use with plugable terminals 4969001571 Housing gray use with screw terminals 4969001572 Housing gray closed no terminals 4969001570 Base with clip and 2 screws 4969021571 Base only 4969021570 Transparent lid 4969011570 DIN rail clip 0669000604 Plugable terminal block 13 contact PCB male 1155713580 portion Plugable terminal block 13 contact wire 1155613080 female portion Screw terminal block 13 contact 3950141308 Screwless type terminal block 1 contact 1157801150 Screw selfcutting 2 pieces 7006102965 9000000000000000000000000 ET
52. ossible to interface with many slower external peripheral components If you require faster I O access you can modify this number down as needed A CLKT signal is routed to J1 pin 4 for the external user clock The CLKT can be selected as void clkt_sel Arguments unsigned char clk Return value none The CLKT pin is programmed as an output CLKTEST When programmed as output CLKT output one of the 6 internal clocks void clkt_sel unsigned char clk where clk 000 RTC 32 768 KHz clk 001 UART 1 8443 MHz clk 010 UART 18 432 MHz clk 011 PIT 1 1882 MHz clk 100 PLL1 1 47456 MHz clk 101 PLL2 36 864 MHz clk 110 111 CLKT 0 4 3 Chapter 4 Software 4 2 2 External Interrupt Initialization The programmable interrupt controller consistes of a system of three individual interrupt controllers Master Slavel and Slave2 each has eight interrupt channels A total of 22 interrupt priority levels are supported A programmable interrupt router handles routing of various external and internal interrupt sources to the 22 interuupt channels TERN recommends an interrupt map as follows There are 22 interrupt priority levels plus NMI Ther are 15 external interrupt requests GPIRQO 10 provide a low to high edge to generate an interrupt Example internal interrupt map by TERN P1 Master PIC IRO interrupt vector 0x40 PIT timer0 P2 Master PIC IR1 interrupt vector 0x41 GPIRQO PIO23 J2 33 P3
53. ounters MAXCOUNTA B available These can all be specified using ta and tb The argument tm is the value that you wish placed into the TOCON TICON mode registers for configuring the two timers The interrupt service routine t_isr specified here is called whenever the full count is reached with other behavior possible depending on the value specified for the control register void t2_init Arguments int tm int ta void interrupt far t_isr Return values none Timer2 behaves like the other timers except it only has one max counter available 4 2 4 Other library functions On board supervisor MAX691 or LTC691 The watchdog timer offered by the MAX691 or LTC691 offers an excellent way to monitor improper program execution If the watchdog timer H1 jumper is set the function hitwd must be called every 1 6 seconds of program execution If this is not executed because of a run time error such as an infinite loop or stalled interrupt service routine a hardware reset will occur 4 6 586 Drive Chapter 4 Software void hitwd Arguments none Return value none Resets the supervisor timer for another 1 6 seconds void led Arguments int ledd Return value none Turns the on board LED on or off according to the value of ledd Real Time Clock A real time clock is included in the SC520 and can be used to keep track of real time Backed up by a lithium coin battery the real time clock can be accessed and programmed usin
54. ous UARTs can operate up to 1 15 M bit s A Synchronous Serial Interface SSI offers full duplex or half duplex operation to support on board ADC DACs and user expansion A real time clock a software timer 3 GP timers and 3 programmable interval timers are all included Thirty two programmable I O pins are on board Please refer to the SC520 User s Manual SC520 Data Sheet and SC520 Register Set Manual included on TERN s CD amd_docs sc520 3 2 C520 Features 3 2 1 Clock One 32 768 KHz and one 33 333 MHz crystal are installed to provide all the clocks required for CPU Real time clock UART timers and clock output The CLKTEST CLKT signal is routed to J1 pin 4 Software can select to output one of 6 internal clocks including 32 768K 1 8443 MHz 18 432 MHz 1 1882 MHz 1 47456 MHz and 36 864 MHz 3 2 2 GP Bus Chip Selects To Program GP bus Memory or I O Chip Selects 1 Config one of the 16 PAR regs PAR1 1 Flash 2 Config GP bus timing 3 Enable Chip select function on the desired pin in the CSPFS reg A total of 8 GP bus Chip selects is supoorted on the 586Drive GPCS0 P27 J2 37 PAR13 I O 0x1800 Free to use for expansion GPCS1 ROMCS 1 U 16 22 32 pin DIP socket memory mapping 0x40000 GPCS2 ROMCS2 SRAM PAR14 Used by 586E P D 0x0000 0x7ffff memory mapping GPCS3 PITG2 U2 5 PAR15 1 0 0x2000 used by 5D ADC1655 SC1 SC2 L1 L2 and CF select GPCS4 TMRIN 1 32 1 PAR4 1 0 0x2800 free to use for ex
55. pansion GPCS5 TMRINO J1 19 PARS I O 0x3000 Free to use for expansion GPCS6 TMROUT1 J2 5 PAR6 I O 0x3800 Free to use GPCS7 TMROUT0 J2 8 JP1 5 PAR7 Ehernet 12chip select MEM mapping 0xf0000 3 1 Chapter 3 Hardware 586 Drive 3 2 3 Programmable interrupt controller and external Interrupts The Programmable Interrupt Controller PIC prioritizes 22 interrupt levels P1 P22 with up to 15 external sources GPIRQO 10 and INTA D A programmable router must be programmed to map internal or external interrupt sources to the master or two of slave interrupt controllers to provide different priorities from P1 to P22 All 15 external interrupt requests are programmed as edge sensitive after 586_init An example map for P1 to P22 is listed below and demonstrated in the sample program 586_intx c and is included in the pre built sample project tern 586 test ide There are 22 interrupt priority levels plus NMI There are 15 external interrupt requests GPIRQO 10 INTA D Example internal interrupt map by TERN Pl Master PIC IRO interrupt vector 0x40 PIT timerO P2 Master PIC IR1 interrupt vector 0x41 GPIRQO PI023 J32 33 P3 slavel PIC IRO interrupt vector 0x48 RTC P4 slavel PIC IR1 interrupt vector 0x49 GPIRQI PI022 32 23 P5 slavel PIC IR2 interrupt vector 0x4a GPIRO2 P1021 32 21 P6 slavel PIC IR3 interrupt
56. put up to 30V a Darlington Transistor Array ULN2003A can be in U19 The maximum input voltage is 30V The input pin has 12 7K resistance load to the GND You have to provide a pulled high signal input A valid input low voltage is less than 0 8V while a valid input high voltage is higher than 3V and less than 30V 5V Darlington Transistor Digital Input upto 30V DC 2 7K _T VWW 2 S 10K GND OUT PIO pin ULN2003A Figure 3 1 Darlington Transistors used as Protective High Voltage Inputs Ul9 may be set as input or output By factory default U19 is input The input and output orientation for the ULN2003A chip in the U19 socket are different Seven high voltage inputs cab be available on T2 02 08 while the ULN2003A is installed in U19 as input mode ULN2003A is a 16 pin DIP U19 is a 18 pin socket Install ULN2003A to register ULN2003A pin 1 U19 11 Force T2 1 O1 to GND first T2 2 02 to P11 T2 3 03 to P10 T2 4 04 to P9 T2 5 05 to P8 T2 6 06 to P7 T2 7 07 to P6 T2 8 08 to P5 Input up to 24 VDC voltage on screw terminal 02 08 and read PIO line P11 PS While 02 24V P11 low O2 0V P11 high In addition the ULN2003A chip may be replaced with a resistor pack to provide digital inputs or outputs to the terminal blocks NN 400 AAA eee060066008 baas t lbesosnrcrcccccs 1IM010A RE Figure 3 2 Locations of user configurable Darlington Transistor Arrays 3 9 Chapter 3 Hardware
57. r 1 Introduction 1 2 586 Drive Programming Overview Steps for 5D based product development Preparation for debugging By default this is done in the factory Connect board to PC via serial link at 19 200 N 8 1 with Hyper Terminal Power on without STEP 2 Jumper installed 32 38 J2 40 ACTF Menu will be sent from SERO to external HyperTerminal at 19 200 baud Type D then lt enter gt to download Send Text File tern 586 rom l_29f400 hex Type G04000 then lt enter gt to execute HEX file just sent will prepare flash Send Text File tern 586 rom 5860_115 hex Type G80000 then lt enter gt to execute debug kernel Set STEP 2 Jumper J2 38 J2 40 Power on reset ready to connect to Paradigm C C for debugging STEP 1 Debugging Launch Paradigm C C Open tern 586 samples Sd 5d ide Run sample code Create application using sample code Use Paradigm C C to edit compile link locate and remote debug STEP 2 Standalone field test Downloaded code from STEP 1 is located by default at 0x0800 0x0000 in the battery backed SRAM Set Jump Address to point to downloaded code Remove STEP 2 Jumper and cycle power Setup Hyper Terminal and see ACTF menu sent from 5D Type G08000 then lt enter gt to jump to and execute application in SRAM Set STEP 2 jumper 5D will execute application at 0x08000 at power up Test application Return to STEP 1 as needed STEP 3 Production DV P Kit required U
58. r is not reset after 1 6 seconds the 691 supervisor will assert RST and reset the 586Drive To reset the watchdog timer user code needs to toggle the PIO pin P4 With the watchdog jumper enabled this routine should be arragned such that it is called every 1 6 seconds are sooner 3 2 11 Analog digital inputs based on 24 bit ADC LTC2448 with resister dividers A 24 bit LTC2448 sigma delta ADC can be installed The ADC is driven by SC520 via the high speed Sync Serial Port The LTC2448 chip offers 8 ch differential or 16 ch single ended input channels Variable speed resolution settings can be configured A peak single channel output rate of 5 KHz can be achieved The LTC2448 switches the analog input to a 2 pf capacitor at 1 8MHz with an equivalent input resistance of 110K ohm The ADC works well directly with strain gages current shunts RTDs resistive sensors and 4 20mA current loop sensors The ADC can also work well directly with thermocouples in the differential mode Installing a precision reference with a internal temperature sensor LT1019 2 5V provides local temperature measurement for thermocouple applications Protected resistor networkd are provided on board to buffer the 16 channel inputs In order to support both analog or digital inputs with variable higher voltage level user configurable protection resistor networks are designed into the board Peg eg 50 e duo R2 20x Pres 20x Pres 20K Bera 20x Wy 3 4 586
59. re provided for access to the PIO lines At the beginning of any application where you choose to use the PIO pins as input output you will probably need to initialize these pins in one of the three available modes Before selecting pins for this purpose make sure that the peripheral mode operation of the pin is not needed for a different use within the same application You should also confirm the PIO usage that is described above within se_init During initialization several lines are reserved for TERN usage and you should understand that these are not available for your application There are several PIO lines that are used for other on board purposes These are all described in some detail in the Hardware chapter of this technical manual For a detailed discussion on the I O ports please refer to Chapter 23 of the AMD SC520 User s Manual Please see the sample program 586_pio c in tern 586 samples 5e You will also find that these functions are used throughout TERN sample files as most applications do find it necessary to re configure the PIO lines The function pio_wr and pio_rd can be quite slow when accessing the PIO pins Depending on the pin being used it might require from 5 10 us The maximum efficiency you can get from the PIO pins occur if you instead modify the PIO registers directly with an poke instruction Performance in this case will be around 1 2 us to toggle any pin For example poke MMCR PIOSET15_0_ m void pio_init A
60. rguments char bit char mode Return value none 4 5 Chapter 4 Software 586Drive bit refers to any one of the 32 PIO lines 0 31 mode refers to one of 3 modes of operation e 0 Interface operation e 1 input with pullup down e 2 output unsigned int pio_rd Arguments char port Return value byte indicating PIO status Each bit of the returned 16 bit value indicates the current I O value for the PIO pins in the selected port void pio_wr Arguments char bit char dat Return value none Writes the passed in dat value either 1 0 to the selected PIO 4 2 3 GPTimer Units The three GP timers present on the 586Drive can be used for a variety of applications These timers are controlled and configured through a mode register that is specified using the software interfaces The mode register is described in detail in chapter 17 of the AMD SC520 User s Manual Two of the timers Timer0 and Timerl has external pulses output and counter inputs It is also possible to use the output of Timer2 to pre scale one of the other timers since 16 bit resolution at the maximum clock rate specified gives you only 150 Hz Only by using Timer2 can you slow this down even further The sample files timer02 c and timer12 c located in tern 586 samples 5e demonstrate this void t0_init void t1_init Arguments int tm int ta int tb void interrupt far t_isr Return values none Both of these timers have two maximum c
61. se Paradigm C C to generate ACTF downloadable application HEX file In Paradigm C C open Target Expert for application Set Target Connection to No Target ROM Build target Paradigm C C will generate HEX file Remove STEP 2 Jumper and see ACTF menu at hyper terminal Download 29f400 hex Same process as above Type G04000 to prepare flash Send you application HEX file Type G80000 to execute code and set jump address to point to you application in flash Set STEP2 Jumper 1 5 586 Drive Chapter 2 Installation Chapter 2 Installation 2 1 Software Installation Refer to the Technical manual Software_Kit pdf on TERN CD under tern_docs manuals By manufacture default upon shipment the 586 Drive should be ready to communicate with Paradigm C for debugging with STEP2 jumper installed CMOS RAM setup for 0x80000 and 5860_115 debug kernel residing in Flash starting 0x80000 Power on the on board LED should blink twice indicating running debug kernel You DO NOT have to download debug kernel into flash again You can SKIP the operation discussed in 2 2 below 2 2 Prepare 586 Drive for Paradigm C TERN Edition This section uses RTLOAD to communicate with the ACTF utility while chapter refers to a hyper terminal Either works fine 1 Start Paradigm C Select from Top menu Tool RTLOAD Project c tern 186 led ide olx bOvee xe xe PDREMOTE ROM D config 186 cfg cfg ED
62. slavel PIC IRO interrupt vector 0x48 RTC P4 slavel PIC IR1 interrupt vector 0x49 GPIRQ1 PIO22 J2 23 P5 slavel PIC IR2 interrupt vector 0x4a GPIRQ2 PIO21 J2 21 P6 slavel PIC IR3 interrupt vector 0x4b GPIRQ3 PIO20 J2 19 P7 slavel PIC IR4 interrupt vector 0x4c GPIRQ4 PIO19 J2 20 P8 slavel PIC IRS interrupt vector 0x4d FPU P9 slavel PIC IR6 interrupt vector 0x4e INTD SCC J3 14 P10 slavel PIC IR7 interrupt vector 0x4f GP timer1 INTC J3 13 P11 Master PIC IR3 interrupt vector 0x43 SER2 0 P12 Master PIC IR4 interrupt vector 0x44 SER1 P13 Slave2 PIC IRO interrupt vector 0x50 GP timer0 P14 Slave2 PIC IR1 interrupt vector 0x51 GPIRQS5 PIO18 J2 17 P15 Slave2 PIC IR2 interrupt vector 0x52 GPIRQ6 PIO17 J2 18 P16 Slave2 PIC IR3 interrupt vector 0x53 GPIRQ7 PIO16 J2 15 P17 Slave2 PIC IR4 interrupt vector 0x54 PIT timerl P18 Slave2 PIC IRS interrupt vector 0x55 GPIRQ8 PIO15 J2 16 P19 Slave2 PIC IR6 interrupt vector 0x56 GPIRQ9 PIO14 J2 6 P20 Slave2 PIC IR7 interrupt vector 0x57 GPIRQ10 PIO13 J2 8 P21 Master PIC IR6 interrupt vector 0x46 PIT Timer2 INTB J3 12 P22 Master PIC IR7 interrupt vector 0x47 INTA J3 11 A spurious interrupt is defined as a Not Valid interrupt A Spurious Interrupt on any IR line generates the same vector number as an IR7 request The spurious interrupt however does not set the in service bit for IR7 Therefore an IR7 isr must check the isr register to determine the interrupt source was a
63. up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up LED L1 pin 2 SRAM U9 40 EE U0 5 SDA ADC7655 US 3 AO LTC2448 U22 2 Busy EE U0 6 SCL HV U19 8 HV U19 7 HV U19 6 HV U19 5 HV U19 4 HV U19 3 HV U19 2 J2 12 J0 7 i2x DAT J2 13 J0 1 i2x CLK J2 pin 14 J2 pin 16 J2 pin 15 J2 pin 18 J2 pin 17 OPTO 2 OPTO 4 OPTO 3 OPTO 1 J2 pin 33 I2chip INT JP 1 2 J2 pin 24 J2 pin 25 J2 pin 29 J2 pin 37 J2 pin 36 J2 pin 35 J2 pin 30 J2 pin 38 Output for LED control High byte enable BHE Input with pull up Input with pull up Input with pull up Input with pull down Input with pull down Input with pull down Input with pull down Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up Input with pull up 16 bit I O operation Input with pull up Input with pull up Input with pull up STEP2 Jumper C function in the library 586 li
64. us of the input buffer and return the offset of the in_head pointer from the in tail pointer A return value of 0 indicates no data is available in the buffer You can use getserl to get the serial input data byte by byte using FIFO from the buffer The in_tail pointer will automatically increment after every getserl call It is not necessary to suspend external devices from sending in serial data with RTS Only a hardware reset or s1_close can stop this receiving operation For transmission you can use putserl to send out a byte or use putsersl to transmit a character string You can put data into the transmit ring buffer s1_out_ buf at any time using this method The transmit ring buffer address obuf and buffer length osiz are also specified at the time of initialization The transmit interrupt service will check the availability of data in the transmit buffer If there is no more data the head and tail pointers are equal it will disable the transmit interrupt Otherwise it will continue to take out the data from the out buffer and transmit After you call putserl and transmit functions you are free to do other tasks with no additional software overhead on the transmitting 4 10 586 Drive Chapter 4 Software operation It will automatically send out all the data you specify After all data has been sent 1t will clear the busy flag and be ready for the next transmission The sample program ser1_0 c demonstrates how
65. ut_bufosize c2 Ul18 UART initialization Important Notes e These UARTs will use the same COM structure as the default Serial Ports 0 and 1 located in tern 586 include 586 h e U17 uses INTC as the interrupt input to the SC520 The function initializing INTC however is not included in 586 lib The user will need to paste this function and its prototype into their code The function is found in 5d_se1 c inside of tern 586 samples 586d directory and is appropriately named void intC_init char i void interrupt far intC_isr 4 16 586 Drive Appendix A 586 Drive Layout Appendix A 586 Drive Layout The 586 Drive measures 151x82 mm 5 94x3 23 inches All dimensions are in inches For mounting holes arrows point to the center of the mounting hole For pin headers arrows point to pin 1 of the header and to the center the pin The 586Drive PCB is designed to fit in a 35 mm DIN rail mount enclosure JIT DR 1570 www jit components com See datasheet of the JIT DR1570 570 305 5 93 3 225 0 3 225 5 658 2 592 0 25 3 05 ES No e m S MEA EE AA ERA AAA I a gt wo ps a S foal N 7 S gt S o _ SIENA TIE ona mn ot A PETT TIT nel 7 4 2 de SS Y Aa so So wo 4 S S S yOORSHHOSSOSHOHOHSISOSSOOHVSSOD i 5 70 0 15 0 0 0 60 0 725 3 883 0 742 0 25 0 15 J1 pin40 5 93 0 J J J www jit components com Components Inc JIT DR1570 Enclosure for 35MM Din Rail e Module enclosure f
66. vector 0x4b GPIRO3 P1020 J2 19 P7 slavel PIC IR4 interrupt vector 0x4c GPIRO4 P1019 32 20 P8 slavel PIC IR5 interrupt vector 0x4d FPU fi P9 slavel PIC IR6 interrupt vector 0x4e INTD SCC J3 14 P10 slavel PIC IR7 interrupt vector 0x4f GP timerl INTC J3 13 P11 Master PIC IR3 interrupt vector 0x43 SER2 0 lah P12 Master PIC IR4 interrupt vector 0x44 SER1 P13 Slave2 PIC IRO interrupt vector 0x50 GP timer0 P14 Slave2 PIC IR1 interrupt vector 0x51 GPIRQ5 PI0O18 J2 17 P15 Slave2 PIC IR2 interrupt vector 0x52 GPIRQ6 PIO17 J2 18 P16 Slave2 PIC IR3 interrupt vector 0x53 GPIRQ7 PIO16 J2 15 P17 Slave2 PIC IR4 interrupt vector 0x54 PIT timerl P18 Slave2 PIC IR5 interrupt vector 0x55 GPIRQ8 PIO15 J2 16 P19 Slave2 PIC IR6 interrupt vector 0x56 GPIRQ9 PIO14 J2 6 El P20 Slave2 PIC IR7 interrupt vector 0x57 GPIRQ10 PIO13 J2 8 P21 Master PIC IR6 interrupt vector 0x46 PIT Timer2 INTB J3 12 P22 Master PIC IR7 interrupt vector 0x47 GP timer2 INTA J3 11 See the sample program in c tern 586 samples Se 586_intx c for more details The 586 Drive uses vector interrupt functions to respond to external interrupts Refer to the SC520 User s manual for more information about interrupt vectors 3 2 4 Asynchronous Serial Ports The SC520 has two 16450 16550 compatible asynchronous serial channels SERO 2 and SER1 Both asynchronous serial ports support the following Full duplex operation 5
67. y space mappings in place for this particular range of memory will be used to activate appropriate chip select lines and the corresponding hardware component responsible for handling this data peek peekb Arguments unsigned int segment unsigned int offset Return value unsigned int unsigned char data These functions retrieve the data for a specified address in memory space Once again the segment address is shifted left by four bits and added to the offset to find the 20 bit address This address is then output over the address bus and the hardware component mapped to that address should return either an 4 1 Chapter 4 Software 586Drive 8 bit or 16 bit value over the data bus If there is no component mapped to that address this function will return random garbage values every time you try to peek into that address outport outportb Arguments unsigned int address unsigned int unsigned char data Return value none This function is used to place the data into the appropriate address in I O space It is used most often when working with processor registers that are mapped into I O space and must be accessed using either one of these functions This is also the function used in most cases when dealing with user configured peripheral components When dealing with processor registers be sure to use the correct function Use outport if you are dealing with a 16 bit register inport inportb Arguments unsigned int address Return va
68. ynchronous receiver transmitter a quadruple buffered receiver data register an interrupt control mechanism programmable data format selectable baud rate for the receiver and transmitter a multi functional and programmable 16 bit counter timer an on chip crystal oscillator and a multi purpose input output including RTS and CTS mechanism The U17 chip uses signals TXDA and RXDA routed to H4 2 H4 3 respectively while the U18 chip uses signals TXDB and RXDB routed to H5 2 H5 3 respectively The UART in location Ul7 is RS485 configurable if the option is desired By default both UARTs use RS232 drivers See sample programs tern 586 samples 5d 5d_scl c and tern 586 samples Sd 5d_sc2 c for details on activating both UARTs The sample programs are also included in the pre built sample project tern 586 samples 5d 586d ide 3 2 17 EEPROM A serial EEPROM of 512 bytes 24C04 or 2K bytes 24C16 can be installed in U0 The 586 Drive uses the P4 SCL serial clock and P2 SDA serial data to interface with the EEPROM The EEPROM can be used to store important data such as a node address calibration coefficients and configuration codes It typically has 1 000 000 erase write cycles The data retention is more than 40 years EEPROM can be read and written by simply calling the functions ee_rd and ee_wr 3 8 586 Drive Chapter 3 Hardware 3 2 18 Protective high voltage inputs In order to support high voltage digital signal in
Download Pdf Manuals
Related Search
Related Contents
Eee PC User Manual the legal mumbo jumbo we paid our lawyers for this, and to get our Manuel d`instruction pour la caméra #16 Owner and Installation Manual ENEWI-1XN4x_2XN4x User Manual © Manual de Instruções e de Instalação do BluWave Cyclical Calling User Guide Copyright © All rights reserved.
Failed to retrieve file