CAMAC Interface PC16 / PC16-Turbo User Manual - W-IE-NE
Contents
1. The following procedure examples describe set base address set crate number get status crate on off CAMAC initialize Z set CAMAC inhibit I get Q and X response call NAF and write read data 16bit get LAM void cam adr int bad 13 PC 16 00155 A0 01 96 badr bad badr2 badr 2 badr4 badr 4 D void set crate int crate outport badr 0 outport badr2 crate amp 16 D int getstatus void unsigned int j j 0 outport badr 1 outport badr2 7 outport badr 3 j inport badr4 return j amp 7 m void cam z void D badr 1 badr2 11 badr2 9 badr2 6 outport outport outport outport is void cam i void outport badr 1 outport badr2 10 int cam q void char j j inport badr return j amp 1 D int cam x void char j j inport badr return j amp 2 gt 1 E void cam nfa write int n int f int a int data 16 bit data int nfa nfa a 5 nfa nfa f lt lt 5 nfa nfa n outport badr 1 outport badr2 0 outport badr 2 outport badr2 nfa 14 PC 16 00155 A0 01 96 outport outport outport outport p M e eg badr 1 badr2 2 badr 2 badr2 data int cam nfa read int n int f int a 16 bit data int nfa nfa a 5 nfa nfa f nfa nfa outport badr 1 eue pus n 0x8000 D outport badr2 0 outport badr 22. 1 1 or and SOF 2 5 f ES and 1F 2 5 n and SIF OUT BADR 1 OUT BADR 2 O0 OUT BADR 2 if f 15 then goto 73 OUT BADR 2 1 or 8000 OUT BADR 1 OUT BADR 2 3 OUT BADR 3 data OUT BADR 4 if gt 15 OUT OUT OUT OUT OUT OUT OUT OUT OUT return B B n then goto 84 BADR 2 1 BADR 1 BADR 2 1 BADR 2 BADR S 2 0000 BADR 1 BADR 2 2 BADR 2 BADR 42 data 16 PC 16 00155 A0 01 96 5 PC16 TURBO Programming and CAMAC operation Compared with the PC16 standard interface the CC16 TURBO operation and programming has to be done in a more simple and compressed form without considering the several primary modes and and submodes of the CP bus protocol The following instruction schemes describes programming language independant the CAMAC access types 5 1 Call and set crate on off select crate write geographical address write crate address opt delay to GEO port BADR 0 Set crate on off write dummy data to Crate on BADR 18 to test the setting read S mode R BADR 10 bit 3 on 0 off 1 The crate ON OFF is displayed by a status LED at the front panel of the CC16 These ON OFF modes are only relevant for broadcast operations 5 2 General CAMAC commands Z C I CAMAC INITIALISE Z write dummy data to Crate Z BADR 16 Q and X response will be set to 1 as response of CC16 to the Z cycle CAMAC CLEAR C write dummy data to Crate C BADR 1
3. BADR get CC16 Status check crate available set geographical crate Address CC16 Initialization CAMAC Command register 0 no C Z I CAMAC Initialize Z CAMAC Clear C CAMAC Inhibit I set CAMAC Clear Inhibit T CAMAC LAM Interrupt enabled CAMAC LAM Interrupt disabled get CAMAC Q response get CAMAC X Response set N F A and start CAMAC cycle set N F A and read data 2byte set N F A and write data 2byte set N F A write data 2byte and get Q and X set N F A read data 2byte and get Q and X set N F A write data 3byte and get Q and X set N F A read data 3byte and get Q and X LAM request from station any LAM request set NFA and fast blockread BADR basic I O address has to be defined in CAM Controller Ini standard 380 copyright A Ruben W Ie Ne R Plein amp Baus GmbH 14 02 94 23 PC 16 00155 A0 01 96 BORLAND C CAMAC Routines for CC16 Unit cam cc16 h comprises cam adr getstatus cam cratecheck set crate cam controller ini cam U cam 2 cam c cam i cam ci cam irq cam noirq cam q cam x cam nfa cam nfa read cam nfa write cam nfaqx write cam nfaqx read cam nfaqx write24 cam nfaqx read24 cam lam cam lamf Set I O Address starting address BADR get CC16 Status check crate available set geographical crate Address CC16 Initialization camAC Command register 0 no C
4. 1 i 16 or crate portw BADR 0 portw BADR 2 i portw BADR 1 portw BADR 2 7 portw BADR 2 portw BADR 2 0 end Function getstatus word var j byte begin j 0 portw BADR 1 portw BADR2 7 portw BADR 3 J port BADR4 getstatus j and 7 end procedure CAM C var i byte begin portw BADR 1 portw BADR2 B portw BADR2 8 portw BADR2 6 end procedure CAM I begin 12 PC 16 00155 A0 01 96 portw BADR 1 portw BADR2 A end PROCEDURE CAM QX var x q boolean var i word begin i portw BADR if i and 1 0 then q false else q true if i and 2 0 then x false else x true end PROCEDURE CAM NAF n a f byte var data word var i j word begin i a and SOF shl 5 i i or f and 1P shl 5 i i or n and SIF PORTW BADR 1 PORTW BADR 2 0 PORTW BADR 2 if f 15 then begin PORTW BADR 2 i or 8000 PORTW BADR 1 PORTW BADR 2 3 PORTW BADR 3 data PORTW BADR 4 end else begin PORTW BADR 2 1 PORTW BADR 1 PORTW BADR 2 1 PORTW BADR 2 PORTW BADR 2 0000 PORTW BADR 1 PORTW BADR 2 2 PORTW BADR 2 PORTW BADR 2 data end end 4 2 C C Within C the I O operations are performed via outport for integer output or inport for integer input commands BADR is the start address of the I O range hex 0x380
5. Z I camAC Initialize Z camAC Clear C camAC Inhibit T set camAC Clear Inhibit T camAC LAM Interrupt enabled camAC LAM Interrupt disabled get camAC Q response get camAC X Response set N F A and start camAC cycle set N F A and read data 2byte set N F A and write data 2byte set N F A write data 2byte and get Q and X set N F A read data 2byte and get Q and X set N F A write data 8byte and get Q and X set N F A read data 3byte and get Q and X LAM request from station any LAM request badr basic I O address has to be defined in cam controller ini standard 0x380 copyright A Ruben W Ie Ne R Plein amp Baus GmbH 21 11 94 24 PC 16 00155 A0 01 96 W IE NE R Plein amp Baus GmbH PC16 TURBO 1 W IE NE R Plein amp Baus GmbH PC16 TURBO 1 W IE NE R Plein amp Baus GmbH PC16 TURBO 2 W IE NE R Plein amp Baus GmbH PC16 TURBO 3 W IE NE R Plein amp Baus GmbH PC16 TURBO 4 W IE NE R Plein amp Baus GmbH PC16 TURBO 5 25 PC 16 00155 A0 01 96 Changes 26 09 2001 Page 6 Bit gt Value K 26 PC 16 00155 A0 01 96
6. high byte to HB W BADR 04 write low word to LW W BADR 06 The S bit of the NAF word has to be 0 to avoid the CAMAC cycle ddirectly after setting NAF The CAMAC cycle will be realized in this case after writing the low word READ 16 BIT or 24 BIT WORD write NAF to FNA port BADR 02 FNA with S 1 read high byte from HB R BADR 08 read low word from LW R BADR 0A To realise a prompt CAMAC cycle after NAF setting the S bit has to be 1 16 BIT FAST BLOCK TRANSFER READ write NAF to FNA port BADR 02 FNA with Sz0 read low word from BR R BADR 0C read low word from BR R BADR 0C the last word has to be read again by the full sequence read low word from LW R BADR 0A 18 PC 16 00155 A0 01 96 5 5 CAMAC status bits Q and X The status bits Q and X are stored in the status register of the interface PC16 TURBO in the first bits The Q and X bits will be stable within 1 Aus read status from R_S BADR 12 6 PC16 TURBO Software Examples 6 1 TURBO PASCAL Within TURBO PASCAL the I O operations are performed via port for byte in and output or portw for word in and output commands BADR is the start address of the I O range normally hex380 The following procedure examples describe Procedure Set Crate CNr begin set crate number get status crate on off CAMAC clear C set CAMAC inhibit T get Q response call NAF and write read data 16bit word portw BAdr00 2 16
7. or cnr end function getstatus word var i j begin j 0 byte integer J portw badr10 getstatus j and 7 end procedure CAM C begin portw badr14 end Il eo procedure CAM I begin portw badr0E 10 end function CAM Q Boolean var i byte begin i port badr12 and 1 if i 1 then CAM Q true else CAM Q false end procedure CAM NFA Write N F A Data var naf integer begin 19 integer PC 16 00155 A0 01 96 naf A and SOF shl 5 naf naf or F and SIF shl 5 naf naf or N and SIF portw badr02 naf portw badr06 data end function CAM NFA Read24 N F A integer longint var li longint naf integer begin naf A and SOF shl 5 naf naf or F and SIF shl 5 naf naf or N and SIF portw badr02 naf or 8000 li portw badr08 li li and Sff shl 16 CAM NFA Read24 li portw badr0A end 6 2 C C Within C the I O operations are performed via outport for integer output or inport for integer input commands BADR is the start address of the I O range hex 0x380 The following procedure examples describe set crate number get status crate on off CAMAC clear C set CAMAC inhibit I get Q response call NAF and write read data 16bit void set crate int crate outport badr00 crate amp 16 D int getstatus void char i char j J 0
8. 4 Q and X response will be set to 1 as response of CC16 to the C cycle SET CAMAC INHIBIT I write A to S mod W BADR OE SET BACK CAMAC INHIBIT I write B to S mod W BADR S0E The status of the inhibit line T is displayed at the CC16 front panel by the Inhibit LED 5 3 LAM servicing ENABLE SERVICING IRQ ON LAM REQUEST write C to S mod W BADR S0E 17 PC 16 00155 A0 01 96 DISABLE SERVICING IRQ ON LAM REQUEST write D to S mod W BADR S0E GET PENDING LAM if IRQ enabled read R_S BADR 12 read ISR pending LAM bit 2 READ STATUS REGISTER SCB read S mod R BADR 10 CC16 INITIALISATION The complete CC16 initialisation should include setting of crate branch and SCB as well as of giving Z cycle and checking for no setting of I line write crate address opt delay to GEO port BADR 0 write dummy data to Crate Z BADR 16 write B to S mod W BADR S0E write C to S mod W BADR S0E 5 4 Read and Write Data ACCESS AND DATA TRANSFER TO CAMAC MODULES The data transfer to or from modules of the CC16 controlled crate has to be done in two steps due to the 24 bit word length of the CAMAC bus First read or write the low 16 bit word The second cycle is for reading writing the high byte if required However a lot of CAMAC modules use only word length up to 16 bit In this case 16 bit data transfer is faster and more useful WRITE 16 BIT or 24 BIT WORD write NAF to FNA port BADR 02 FNA with S 0 write
9. CAMAC Interface PC16 PC16 Turbo User Manual 0 PC 16 00155 A0 01 96 CONTENT 1 CAMAC IBM PC interface PEIG 1 eie Et nete um etoile eA eluents 2 1 1 General description PC16 standard interface AAA 2 1 2 PC16 I O operation and address range anna 2 1 3 High speed interface PC16 Turbo eese ener rennen enne 4 1 4 PC16 Turbo I O operation and address range eee 4 1 5 Usmo rov EUER HE 7 2 Installation m 2 22 12 2222 2 ee 7 2 1 Interfaee Installation ue ssseseseeiteen tanken skin N E EES 7 2 2 Inttialisation nun RBB II 7 3 BC 16 Programming nete en ER head aA 8 4 PC16 Software Examples 4 tee n be haces rn 12 4 1 Turbo Paseal 2 14 2 2 naar sr eet ee etie reser 12 4 2 QU e E E EE ette uo RE Unete cies een e EH E rte eH eren 13 4 3 ho 15 5 PCIG6 Turbo Programming areire nter dE 17 6 PC16 Turbo Software Examples AA 19 6 1 Turbo Pascal 1 e ed e rer RI e ER IL 19 6 2 5740 D E M EE E 21 APPENDIX A Technical Documentation PC 22 APPENDIX B Technical Documentation PC16 Turbo 22 17 January 1996 1 PC 16 00155 A0 01 96 1 IBM PC AT interface Card PC16 1 1 General description The PC16 interface card connects the CC16 CAMAC crate controller with a standard personal computer AT or XT with 80X86 CPU It is a 16 bit ISA bus card of full length AT board The PC16 can be used both in byte or word access mode to support XT or AT computers The required mode
10. I outport badr2 nfa outport badr 1 outport badr2 3 outport badr 3 return im int cam lamf void d int j j inport badr return j amp 4 4 3 BASIC inport badr4 gt 2 Within BASIC the I O operations are perfomed via an inp command for getting the value of an I O register and an out command for setting an I O register Due to the large differences between the BASIC dialects this examples demonstrate only the general principle BADR is the start address of the I O range normally hex380 The following examples describe set crate number switch selected crate bus on get status crate on off CAMAC clear C set CAMAC inhibit T get Q and X response call NAF and write read data 16bit SetCrate crate crate number 10 l 1 11 l 16 or crate 12 OUT BADR 0 13 OUT BADR 2 1 CratOn crate crate number 20 l 1 21 1 16 or crate 22 OUT BADR O0 23 OUT BADR 2 1 24 OUT BADR 1 25 OUT BADR 2 7 15 PC 16 00155 A0 01 96 26 OUT BADR 2 27 OUT BADR 2 0 getstatus 31 j 0 32 OUT BADR 1 33 OUT BADR 2 7 34 OUT BADR 3 35 J INP BADR 36 getstatus j and 7 CAM_C 41 OUT BADR 1 42 OUT BADR 2 SB 43 OUT BADR 2 8 44 OUT BADR 2 6 CAM_I 51 OUT BADR 1 52 OUT BADR 2 SA CAM_NAF n a f data 61 62 63 64 65 66 67 68 69 70 71 72 73 75 76 37 78 79 80 81 82 83 84 oo peu oe Il d i a
11. R 380 2 PC 16 00155 A0 01 96 JP1 JP8 ae ermination JP9 JP16 8 16 bit access XT AT mode H sm MTM c VO Base D eis LH IRQ number Fig 1 PC 16 jumper and switch locations All I O operations for CC16 access are done within a 3 word range 3 x 16 bit or 6 x 8 bit starting at the basic I O address defined by DIP switches setting as described above The relevant operations are defined in the following table Table 4 I O range of PC16 With the OSR output one of 4 four primary modes of the CC16 is defined by CSRO and CSRI see 1 5 Reading the status register ISR one can get the Q and X response of the previous CAMAC operation Further any pending LAM is given if the CC16 is enabled for LAM servicing The following table gives the ISR bit assignment o Lem Con csp2 LAM Table 5 Bit assignment ISR 3 PC 16 00155 A0 01 96 1 3 High Speed Interface PC 16 Turbo The PC16 TURBO was designed to accelerate the CAMAC control via IBM PC This new interface card for the CC16 fits into a standard AT long slot word access only The PC16 Turbo card contains a high integrated PLD circuit which allows to reduce the CAMAC controller access time by using a wider I O port range Thus this new interface has a read write rate between computer and CAMAC controller of up to 6us CNAF or up to nearly 1 5us in block mode measured with 486DX2 66 In case of cable length up to 15 metres one may use the intern
12. Z cycle and checking for no setting of I line set PMO get crate branch write GAW write crate branch set PM1 set sub mode set SM7 set SM to CC16 status register set PM2 set write data write SCB write SCB 0 bit2 0 set crate on set PM1 set sub mode set SM11 set SM to disable I set SM13 set SM to disable IRQ on LAM request 3 4 Read and Write Data ACCESS AND DATA TRANSFER TO CAMAC MODULES The data transfer to or from modules of the CC16 controlled crate has to be done in two steps due to the 24 bit word length of the CAMAC bus First read or write the low and middle byte in AT mode as one 16 bit word The second cycle is for reading writing the high byte if required However a lot 9 PC 16 00155 A0 01 96 of CAMAC modules use only word length up to 16 bit In this case 16 bit data transfer is faster and more useful WRITE 24 BIT WORD set PM1 set SMO set PM2 write NAF set PM1 set SM1 set PM2 write W17 24 set PM1 set SM2 set PM2 write W1 16 WRITE 16 BIT WORD set PM1 set SMO set PM2 write NAF set PM1 set SM2 set PM2 write W1 16 set sub mode set SM to write NAF word set write data NAF with S bit 0 set sub mode set SM to write high byte set write data write high data byte set sub mode set SM to write low word set write data write low data word and start CAMAC cycle set sub mode set SM to write NAF word set write data NAF with S bit 0 set sub mode set SM t
13. al 24MHz oscillator in case of longer distances and or a noisy environment it may be necessary to run the interface card with the standard 8MHz AT ISA bus clock jumper selectable see figure 2 sw2 e I O Base IRQ number CLS WI High speed AT bus Fig 2 PC16 Turbo jumper and switch locations 1 4 PC16 Turbo Operation and Address Range The PC16 Turbo data in and output is arranged via an enhanced I O port range of 26 bytes starting at the basic address BADR The BADR value is defined by the binary decoded DIP switch SW1 in the range between hex 000 and 3E0 Bi A6 As A8 A7 A9 ruin Base Address setting Table 6 PC16 Turbo BADR switch setting The standard factory prepared address range starts at BADR 380 All I O operations for CC16 access are done within a 26 byte 13 word range starting at the basic I O address defined by DIP switches setting as described above The relevant registers and operations are defined within the following table 4 PC 16 00155 A0 01 96 BADR GEO port crate address and cable delay BADR 02 function subaddress station number BADR S04 write BADR S06 BADR 08 read high byte read BADR SOA BADR 0C block read with NAF repeat PEE MEE Table 7 PC16 Turbo I O address layout address offset in hex Note that all the primary and submode operations described within the CC16 manual as well as in the PC16 chapter a
14. d W1 16 set set set NAF set set set sub mode SM to write NAF word write data with S bit 1 and start CAMAC cycle sub mode SM to read low word read data read low data word and start CAMAC cycle read low data word and start CAMAC cycle read low data word and start CAMAC cycle read low data word and start CAMAC cycle the last word has to be read again by the full sequence sub mode SM to read low word read data read low data word and start CAMAC cycle set PM1 set set SM3 set set PM3 set read W1 16 3 5 CAMAC status bits and X The status bits Q and X are stored in the status register of the interface ISR in the first bits CSDO and CSD1 The Q and X bits will be stable within 1 4us read ISR read ISR Q bit 0 X bit 1 11 PC 16 00155 A0 01 96 4 PC16 Software Examples 4 1 TURBO PASCAL Within TURBO PASCAL the I O operations are performed via port for byte in and output or portw for word in and output commands BADR is the start address of the I O range normally hex380 The following procedure examples describe set crate number switch selected crate bus on get status crate on off CAMAC clear C set CAMAC inhibit T get Q and X response call NAF and write read data 16bit PROCEDURE SetCrate crate byte var i word begin L lz i 16 or crate portw BADR 0 portw BADR 2 i end PROCEDURE CratOn crate byte var i word begin i
15. is defined by jumper setting jumpers 1 16 In case of XT byte access mode two cycles for in and for output are necessary For correct operation the interface cable has to be terminated inside the PC16 in the same way as done in the last CC16 of the chain see 1 3 Two types of cable termination are provided DIL 220 Ohm 2 x SIL 8 1 x 100 Ohm Table 1 Termination resistor types factory prepared The CC16 allows an interrupt based LAM servicing Both IRQ number as well as I O address for data transfer can be chosen by DIP switches or jumper settings see Fig 2 Table 2 IRQ setting J19 labelling of jumpers starts at the left side at RX3 The enabling disabling of interrupt based LAM servicing is done on the CC16 and has to be performed by software Further the ALE switch has to be in ON position Up to 15 CC16 can be linked in parallel to one CC16 interface card For control 15 geographical addresses 0 14 and one broadcast address 15 for parallel access is used 1 2 PC16 Operation and I O Address Range The data in and output is arranged via a 6 byte I O port range starting at the basic address BADR The BADR value is defined by the binary decoded DIP switch SW1 in the range between hex 0 and 3F8 The first bits of BADR are 0 Switch 8 ALE has to be in position ON for CAMAC operation n fas se Is Las Im Im e ug Table 3 BADR setting The standard factory prepared address range starts at BAD
16. is on bit2 1 crate is off The crate ON OFF is displayed by a status LED at the front panel of the CC16 These ON OFF modes are only relevant for broadcast operations 3 2 General CAMAC commands Z C I CAMAC INITIALISE Z set PM1 set sub mode set SM9 set SM to enable Z set SM6 set SM to perform Z cycle Q and X response will be set to 1 as response of CC16 to the Z cycle CAMAC CLEAR C set PM1 set sub mode set SM8 set SM to enable C set SM6 set SM to perform C cycle Q and X response will be set to 1 as response of CC16 to the C cycle 8 PC 16 00155 A0 01 96 SET CAMAC INHIBIT I set PM1 set sub mode set SM10 set SM to enable I SET BACK CAMAC INHIBIT I set PM1 set sub mode set SM11 set SM to disable I The status of the inhibit line T is displayed at the CC16 front panel by the Inhibit LED 3 3 LAM servicing ENABLE SERVICING IRQ ON LAM REQUEST set PM1 set sub mode set SM12 set SM to enable IRQ on LAM request DISABLE SERVICING IRQ ON LAM REQUEST set PM1 set sub mode set SM13 set SM to disable IRQ on LAM request GET PENDING LAM if IRQ enabled read ISR read ISR pending LAM bit 2 READ STATUS REGISTER SCB set PM1 set sub mode set SM7 set SM to CC16 status register set PM3 set read data read SCB read SCB bit mapping see 1 5 CC16 INITIALISATION The complete CC16 initialisation should include setting of crate branch and SCB as well as of giving
17. j inport badr10 return j amp 7 es void cam c void outport badr14 0 D void cam i void outport badr0e 10 E 20 PC 16 00155 A0 01 96 int cam q void char j j inport badr12 return j amp 1 D void cam nfaqx write int n int f int a int data int q int x int nfa char j nfa a 5 nfas nfa f lt lt 5 nfa nfa n outport badr02 nfa outport badr06 data j inport badr12 q j amp 1 x j amp 2 gt 1 nt long int cam nfaqx read24 int n int f int a int q int x int nfa char j long int lh nfa a 5 nfa nfa lt lt 5 nfa nfa n 0x8000 outport badr02 nfa lh inport badr08 amp 255 lh lh lt lt 16 lh unsigned int inport badr0a j inport badr12 q j amp 1 x j amp 2 gt 1 return 1h 21 PC 16 00155 A0 01 96 APPENDIX 1 Technical Documentation PC16 1 Technical Documentation PC16 TURBO 22 PC 16 00155 A0 01 96 TURBO PASCAL CAMAC Routines for CC16 TP 5 0 7 0 Unit CAM CC16 PAS comprises CAM ADR Getstatus CAM CrateCheck Set Crate CAM Controller Ini CAM 0 CAM Z CAM C CAM I CAM CI CAM IRQ CAM NoIRQ CAM Q CAM X CAM NFA CAM NFA Read CAM NFA Write CAM NFAQX Write CAM NFAQX Read CAM NFAQX Write24 CAM NFAQX Read24 CAM LAM CAM LAMF CAM NFA Blockread Set I O Address starting address
18. o write low word set write data write low data word and start CAMAC cycle 16 BIT FAST BLOCK TRANSFER WRITE set PM1 set SMO set PM2 write NAF set PM1 set SM2 set PM2 write W1 16 write W1 16 write W1 16 write W1 16 write W1 16 READ 24 BIT WORD set PM1 set SMO set PM2 write NAF set PM1 set SM4 set PM3 read W17 24 set PM1 set SM3 set PM3 read W1 16 set sub mode set SM to write NAF word set write data NAF with S bit 0 set sub mode write low word set write data write low data word and start CAMAC cycle write low data word and start CAMAC cycle write low data word and start CAMAC cycle write low data word and start CAMAC cycle write low data word and start CAMAC cycle set sub mode set SM to write NAF word set write data NAF with S bit 1 and start CAMAC cycle set sub mode set SM to read high byte set read data read high data byte set sub mode set SM to read low word set read data read low data word and start CAMAC cycle 10 PC 16 00155 A0 01 96 READ 16 BIT WORD set PM1 set SMO set PM2 write NAF set PM1 set SM3 set PM3 read W1 16 set set set NAF set set set sub mode SM to write NAF word write data with S bit 1 and start CAMAC cycle sub mode SM to read low word read data read low data word and start CAMAC cycle 16 BIT FAST BLOCK TRANSFER READ set PM1 set SMO set PM2 write NAF set PM1 set SM5 set PM3 read W1 16 read W1 16 read W1 16 rea
19. re done automatically by the high integrated PLD of the PC16 Turbo interface e set crate address and delay GEO port Bit assignment Address BADR ao a2 as as vo o pa vs TI Ooo Crate number Delay Table 8 GEO_port bit assignment The address of the crate which has to be accessed corresponds to the value selected on the CC16 front panel For broadcast calls the address 15 hexF has to be used The delay value can be neglected set to 0 for cable lengths of up to 10 30 metres In case of longer distances each bit corresponds to an additional delay of about 500ns e set NFA NFA port Bit assignment Address BADR 02 The NAF code includes the station number N of the addressed module the sub address A and the function number F It is coded according to the following bit assignment EE ERE ERES station N function F sub address A Table 9 NAF port coding 5 PC 16 00155 A0 01 96 The last bit S corresponds to an immediate CAMAC cycle on a NAF load If this bit is 0 the NAF load in the CC16 will not cause a prompt CAMAC cycle S 0 is necessary write data to the dataway For read operations one has to set S 1 e set special modes S mode W Bit assignment Address BADR 0E 10 A set CAMAC I Inhibit line 11 B no CAMAC I Inhibit line 12 C enable LAM detect 13 D disable LAM detect Table 10 S mode W bit mapping e Read special status S mode R Bit assignment Addre
20. rom the software standpoint the interrupt handling is highly language dependent Thus consult the language description for correct programming 2 Installation 2 1 Interface installation Prepare and insert the interface into the computer system Check the I O address and IRQ number for validance and insert the board into a free IBM PC slot of full size 16 bit slot for 16 bit operations By the help of switch 1 the basic I O address is fixed The standard value for I O base address is hex380 Note that installed devices or PC cards mouse network cards printer often use this I O range too In this case one has to look for another free range If the CC16 can not be accessed change the used I O address on the PC16 card and in the used CAMAC software To get a free IRQ inspect the computer with the help of a hardware test code like the Microsoft MSD program Be shure that the IRQ number choosen for the PC16 card is not used by any other hardware component Ipt com net Connect the PC 16 to the CC16 in parallel with the enclosed 50 pin flat cable In case of longer distances 230 metres the use of a twisted pair cable is recommended CC16 standard interface only If only a 8 bit slot or XT computer is available change the jumper setting for 8 16 bit access jumper 1 17 The jumper 18 has to be installed for operation with CC16 2 3 Initialisation For correct operation the CC16 interface system has to be initialised fir
21. ss BADR 10 Lo read CAMAC I Inhibit line 1 read LAM enable disable bus on off broadcast calls Table 11 S_mode_R bit mapping e Read Controller status R_S Bit assignment Address BADR 12 Lo read Q Response u read X Response Bo LAM pending and enabled Table 12 R_S bit mapping The controller status register R_S can be used for getting as well as the Q and X response of the CAMAC calls as well as a pending LAM The LAM information is only available if the CC16 crate controller is enabled for LAM servicing test by reading S mode R register bit 1 Normally the CAMAC module which has to generate the LAM has to be enabled too by a N F 26 A 0 command 6 PC 16 00155 A0 01 96 1 5 Using Interrupts The LAM request from any CAMAC station can be used for interrupting the computer to execute a service routine immediately and return then to what is was doing However MS DOS is not a real time system and has only rudimentary features for interrupt handling The PC16 card has the feature to connect the LAM line with an interrupt line of the IBM PC AT IRQ 3 5 9 11 12 selecteable by jumper or DIP switches see figures 1 and 2 In case of CC16 Turbo DIP switch setting only one switch has to be in ON position For interrupt based LAM servicing the LAM detect IRQ feature has to be enabled within the CC16 Further in case of the PC16 standard card the ALE bit of the DIP switch has to be in position on F
22. st by setting the geographical address of the CC16 controller which has to be accessed Further the initial conditions for inhibit line 1 set off and Detect IRQ on LAM should be defined see next chapters At the end of initialisation a CAMAC initialise Z should be performed see next chapter 7 PC 16 00155 A0 01 96 3 PC16 Programming and CAMAC operation The CC16 operation is performed on the basis of calling the several primary and sub modes and writing reading data via the I O ports of the interface card IBM PC system according to the CP Bus protocol The following instruction schemes for the PC16 standard interface are given in terms of setting these modes and writing reading data In general the several calls for I O operations are depending on the programming language Therefore in this chapter only the main principles of programming are given For description of modes and registers see chapter 1 5 Software examples for several languages TURBO PASCAL BASIC are given in the next chapters 3 1 Call and set crate on off select crate write geographical address set PMO get crate branch write GAW write crate branch Set crate on off set PM1 get sub mode set SM7 set SM to CC16 status register set PM2 set write data write SCB write scb with bit2 0 switch crate on bit2 1 switch crate off to test the setting read the SCB with set PM3 set read data read SCB read SCB with bit2 0 crate
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