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Reception in Clock-asynchronous Serial I/O Mode

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1. Setting the receive enable bit to 1 readies data receivable status At this time output from the RTSi pin goes to L level to inform the transmission side that the receivable status is ready 2 When the first bit the start bit of reception data is received from the RxDi pin output from the RTSi goes to H level Then data is received bit by bit in sequence LSB MSB and stop bit s 3 When the stop bit s is are received the content of the UARTi receive register is transmitted to the UARTi receive buffer register At this time the receive complete flag goes to 1 to indicate that the reception is completed the UARTi receive interrupt request bit goes to 1 and output from the RTS pin goes to H level 4 The receive complete flag goes to 0 when the lower order byte of the UARTi buffer register is read Figure 1 shows the operation timing REJ05B0625 0110 Rev 1 10 May 2005 Page 2 of 12 434 NESAS Example of wiring Microcomputer Example of operation BRGi count source Receive enable bit RE Transfer clock Receive complete flag RI Receive interrupt request bit IR 9 i 0to2 1 Reception enabled 2 Start reception Reception started when transfer clock is generated by falling edge of start bit M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode Transmitter side IC 3 Reception is complete Transfe
2. approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these materials If these products or technologies are subject to the Japanese export control restrictions they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination Any diversion or reexport contrary to the export control laws and regulations of Japan and or the country of destination is prohibited Please contact Renesas Technology Corporation for further details on these materials or the products contained therein REJ05B0625 0110 Rev 1 10 May 2005 Page 12 of 12
3. generator Approx 9600bps 20MHz f1 u2c1 0x04 UART transmint receive control register 1 setting Reception enabled F while 1 while ri u2cl Check amp wait the status of UARTO receive complete flag recevie_data u2rb Recevie data read REJ05B0625 0110 Rev 1 10 May 2005 Page 9 of 12 RENESAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 5 Reference Renesas Technology Corporation Home Page http www renesas com E mail Support E mail csc renesas com Hardware Manual M 16C 26 M 16C 26A M 16C 28 M 16C 29 Group Hardware Manual Use the latest version on the home page http www renesas com TECHNICAL UPDATE TECHNICAL NEWS Use the latest information on the home page http www renesas com REJ05B0625 0110 Rev 1 10 May 2005 Page 10 of 12 434 NE SAS Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode REVISION HISTORY M16C Tiny Series Rev Date Description Summary 1 10 2005 05 30 Page First edition issued REJ05B0625 0110 Rev 1 10 May 2005 Page 11 of 12 434 NE SAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode Keep safety first in your circuit designs Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable but the
4. ke kk kok Kk Ck kk k kok k kok kok kok k kc ke kk ke ke ke k k k FILE NAME CPU M16C Tiny series x Function Operation of UART2 ii 9 Clock asynchronous serial I O receive 9 a Version 1 00 x Copyright C 2004 Renesas Technology Corp i Copyright C 2004 Renesas Solutions Corp oko k CK kk kok ok kk ok kk kk kk kok ok kk ok kk kk kk kk kk kkk kk kk kkk kk k k k k ko ke e ke e e x ORK k k k oko k kc ke kk ke kk kc ke ke kk ke ke ek e e k T include file CKCkCk k kok kok kok k k kok kk ke k kok I include sfr28 h ORK K k k k k k k I k k k k k k k k k k k k k k k k ui Function Definition m ok kok kok kok kk koe ko ke ke ke ke ke ee e e ee e e x ORK K k k k k k k k k k k kk I k k kc k k k k e k k x main ok kok kok kok k k kok kk ko ke ke ke ke ke ke e ee e e x unsigned short recevie data void main void u2mr 0x05 UART2 transmint receive mode register setting UART mode transfer data 8 bits long Internal clokc select One stop bit Parity disabled f u2c0 0x04 UART2 transmint receive control register 0 setting RTS function select CTS RTS function enabled TxDO pin is CMOS output Transmission data is output at falling edge of transfer clock and reception data is input at rising edge LSB first y u2c1 0x00 UART transmint receive control register 1 setting UARTO tansmit interrupt cause is selected to Transmit bufffer empty TI 1 R u2brg 129 Setting UART2 bit rate
5. 434 NESAS APPLICATION NOTE M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial O Mode 1 Abstract In receiving data in clock asynchronous serial I O mode choose functions from those listed in Tablel Operations of the checked items are described below Table 1 Choosed Functions Transfer clock Yes Internal dock f1 f2 fa f32 CTS RTS Yes CTS RTS shared pin source External dock CLKi pin separated function CTS RTS separated Note 1 RTS function Yes RTS function enabled Data logic select Yes Noreverse RTS function disabled Note 2 Reverse TxD RxD I O Yes Noreverse polarity reverse Reverse function Note 2 Note 1 UARTO only Note 2 UART2 only 2 Introduction The explanation of this issue is applied to the following condition Applicable MCU M 16C 26 M 16C 26A M 16C 28 M 16C 29 Group This program can also be used when operating other microcomputers within the M 16C family provided they have the same SFR Special Function Registers as the M16C 26 M16C 26A M16C 28 M16C 29 microcomputers However some functions may have been modified Refer to the User s Manual for details Use functions covered in this Application Note only after careful evaluation REJ05B0625 0110 Rev 1 10 May 2005 Page 1 of 12 RENESAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 3 Operation of Serial I O 1
6. ER I IK IKK IK IK ke k kei ke ee include sfr28 h BORK k Ck kk kk ko ke k k ke kk kc ke kok ke ke ke ek e e A Function Definition x CKCkCk ck kck kk k ck ck k kok k kk ke ke ke ke ke ke e e ORK k k k ke kk ko ke kk ke kk kc ke ke kk ke k e ke e ek main m CKCk Ck ck ck IR ko kok kk ke kok eee unsigned short recevie data void main void uOmr 0x05 UARTO transmint receive mode register setting UART mode transfer data 8 bits long Internal clokc select One stop bit Parity disabled x u0c0 0x04 UARTO transmint receive control register 0 setting RTS function select CTS RTS function enabled TxDO pin is CMOS output Transmission data is output at falling edge of transfer clock and reception data is input at rising edge LSB first x ucon 0x00 UART transmint receive control register 2 setting UARTO tansmit interrupt cause is selected to Transmit bufffer empty TI 1 CTS RTS shared pin xwv uObrg 129 Setting UARTO bit rate generator Approx 9600bps 20MHz f1 u0c1 0x04 UART transmint receive control register 1 setting Reception enabled mr while 1 while ri u0cl Check amp wait the status of UARTO receive complete flag recevie data u0rb Recevie data read REJ05B0625 0110 Rev 1 10 May 2005 Page 8 of 12 434 NE SAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 4 2 UART2 RK IK RR AR kk Ck kk Ck kk H kk Ck kk k
7. Setting UARTi transmit receive control register 0 i20 1 b7 bo ojoj fo 1 Ll CLK1 to CLKO BRG Count Source Select Bit 00 f1S10 or f2S10 is selected 01 f8SIO is selected 10 f32s10 is selected 11 Do not set to this value CRS CTS RTS Function Select Bit 1 RTS function is selected TXEPT Transmit Register Empty Flag 0 Data present in transmit register during transmission 1 No data present in transmit register transmission completed CRD CTS RTS Disable Bit 0 CTS RTS function enabled NCH Data Output Select Bit 0 TxDi pins are CMOS output 1 TxDi pins are N channel open drain output CKPOL Set to 0 in clock asynchronous serial I O mode UFORM Set to 0 in clock asynchronous serial I O mode REJ05B0625 0110 Rev 1 10 May 2005 Page 4 of 12 RENESAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 3 Setting UART transmit receive control register 2 b7 bo lolojojolojo M E UORRM U1RRM Set to 0 in clock asynchronous serial I O mode CLKMDO Set to 0 in clock asynchronous serial I O mode CLKMD1 Set to 0 in clock asynchronous serial I O mode RCSP Separate UARTO CTS RTS Bit 0 CTS RTS shared pin 1 CTS RTS separated CTSo supplied from the P64 pin b7 Set to 0 4 Setting UARTi baud rate generation register i 0 1 b7 bo Ld U can be set to 0016 to FF16 Note Note Write to UARTi baud rate gen
8. duct distributor for the latest product information before purchasing a product listed herein The information described here may contain technical inaccuracies or typographical errors Renesas Technology Corporation assumes no responsibility for any damage liability or other loss rising from these inaccuracies or errors Please also pay attention to information published by Renesas Technology Corporation by various means including the Renesas Technology Corporation Semiconductor home page http www renesas com When using any or all of the information contained in these materials including product data diagrams charts programs and algorithms please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products Renesas Technology Corporation assumes no responsibility for any damage liability or other loss resulting from the information contained herein Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake Please contact Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for any specific purposes such as apparatus or systems for transportation vehicular medical aerospace nuclear or undersea repeater use The prior written
9. e Bit 0 No reverse 2 Setting UART2 transmit receive control register 0 b7 bo ojoj Oj 1 CRS TXEPT CRD NCH CKPOL UFORM LL cki to CLKO BRG Count Source Select Bit 00 f1s10 or f2sio is selected 01 f8SIO is selected 10 132510 is selected 11 Do not set to this value CTS RTS Function Select Bit 1 RTS function is selected Transmit Register Empty Flag 0 Data present in transmit register during transmission 1 No data present in transmit register transmission completed CTS RTS Disable Bit 0 CTS RTS function enabled Data Output Select Bit 0 TxD pins are CMOS output 1 TxD pins are N channel open drain output Set to 0 in clock asynchronous serial I O mode Set to 0 in clock asynchronous serial I O mode REJ05B0625 0110 Rev 1 10 May 2005 Page 6 of 12 lal CE NI ESAS M1 6C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 3 Setting UART2 transmit receive control register 1 b7 bo ojojo U2RRM Set to 0 in clock asynchronous serial I O mode U2LCH Data Logic Select Bit 0 No reverse U2ERE Error Signal Output Enable Bit Set to 0 in clock asynchronous serial I O mode 4 Setting UART2 baud rate generation register b7 bo U Can be set to 0016 to FF16 Note Note Write to UART2 baud rate generation register when transmission reception is halted 5 Transmission enabled UART2 tran
10. eration register when transmission reception is halted 5 Transmission enabled UARTi transmit receive control register 1 i 0 1 b7 bo olofo MTT L RE Receive Enable Bit 1 Reception enabled 6 Checking the status of UARTi receive buffer register i 0 1 b7 bo oo T TT RI Receive Complete Flag 0 No data present in UiRB register 1 Data present in UiRB register 7 Reading out reception data and checking error Read UARTi reception buffer register i 0 1 b15 b8 f b7 bo b7 bo oer Reception data OER Overrun Error Flag 0 No overrun error 1 Overrun error found FER Framing Error Flag 0 No framing error 1 Framing error found PER Parity Error Flag 0 No parity error 1 Parity error found SUM Error Sum Flag 0 No error 1 Error found REJ05B0625 0110 Rev 1 10 May 2005 Page 5 of 12 434 NESAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 3 1 2 UART2 1 Setting UART2 transmit receive mode register b7 bo 0 0 0 010 1 01 1 CKDIR STPS PRY PRYE IOPOL SMD2to SMDO Serial O Mode Select Bit 101 UART mode transfer data 8 bits long Internal external Clock Select Bit 0 Internal clock Stop Bit Length Select Bit 0 One stop bit Odd even Parity Select Bit Effective when PRYE 1 0 Odd parity Parity Enable Bit 0 Parity disabled TxD RxD I O Polarity Revers
11. re is always the possibility that trouble may occur with them Trouble with semiconductors may lead to personal injury fire or property damage Remember to give due consideration to safety when making your circuit designs with appropriate measures such as i placement of substitutive auxiliary circuits ii use of nonflammable material or iii prevention against any malfunction or mishap Notes regarding these materials These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation product best suited to the customer s application they do not convey any license under any intellectual property rights or any other rights belonging to Renesas Technology Corporation or a third party Renesas Technology Corporation assumes no responsibility for any damage or infringement of any third party s rights originating in the use of any product data diagrams charts programs algorithms or circuit application examples contained in these materials All information contained in these materials including product data diagrams charts programs and algorithms represents information on products at the time of publication of these materials and are subject to change by Renesas Technology Corporation without notice due to product improvements or other reasons It is therefore recommended that customers contact Renesas Technology Corporation or an authorized Renesas Technology Corporation pro
12. rred from UARTi receive register to UARTI receive buffer regist Read UARTi receive buffer 4 Read of reception data register SES Z Set to 0 upon accepting an interrupt reguest or by writing in program Shown in are bit symbols The above timing applies to the following settings Transfer data length is 8 bits Parity is disabled One stop bit e RTS function is selected Figure 1 Operation Timing of Reception in Clock Asynchronous Serial I O Mode REJ05B0625 0110 Rev 1 10 May 2005 Page 3 of 12 RENESAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 3 1 Register Setting To enable the operation defined in Section 3 Operation of timer A the following register settings must be taken place step by step For detail configuration of each register please refer to M 16C 26 Group hardware manual M 16C 26A Group hardware manual M 16C 28 Group hardware manual M 16C 29 Group hardware manual 3 1 1 UARTO 1 1 Setting UARTi transmit receive mode register i 0 1 b7 bo oJoo o o 1 0 1 ULL SMD to SMDO Serial I O Mode Select Bit 101 UART mode transfer data 8 bits long CKDIR Internal external Clock Select Bit 0 Internal clock STPS Stop Bit Length Select Bit 0 One stop bit PRY Odd even Parity Select Bit Effective when PRYE 1 0 Odd parity PRYE Parity Enable Bit 0 Parity disabled b7 Set to 0 2
13. smit receive control register 1 b7 bo 0 0 0 1 ES RE Receive Enable Bit 1 Reception enabled 6 Checking the status of UARTi receive buffer register i 0 1 b7 bo ojojo Lo RI Receive Complete Flag 0 No data present in U2RB register 1 Data present in U2RB register 7 Reading out reception data and checking error Read UART2 reception buffer register b15 b8 T b7 CO b7 bo OTIT NAI 1 Reception data OER Overrun Error Flag 0 No overrun error 1 Overrun error found FER Framing Error Flag 0 No framing error 1 Framing error found PER Parity Error Flag 0 No parity error 1 Parity error found SUM Error Sum Flag 0 No error 1 Error found REJ05B0625 0110 Rev 1 10 May 2005 Page 7 of 12 434 NE SAS M16C Tiny Series Operation of Serial I O Reception in Clock Asynchronous Serial I O Mode 4 Sample Program 4 1 UARTO OK KI IKK kk kk kk kok o ooo kk kk A kk Ck Ck kk kk kk kok kok Ck kk k ke kk kok kok kc kk k ke kk ke ke k k k k FILE NAME ka CPU M16C Tiny series A Function Operation of UARTO 5 Clock asynchronous serial I O receive E me Version 1 00 m Copyright C 2004 Renesas Technology Corp x Copyright C 2004 Renesas Solutions Corp kok oko k kok o oko CkCk kk kk kk Ck kk Ck kk kok Ck Kk Ck kk kk kk k kok k ko ke kk kok k I ke BORK k k k ke kk kc ke kk ke kk kc ke kk ke ke ke ek e ek include file F

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