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CPB902 User Manual 1.5b E

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1. CPB902 User Manual 20 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 Functional Description 4 1 Structure and Layout Functional diagram of the CPB902 module is shown in Figure 4 1 Figure 4 1 CPB902 Block Diagram MiniDIN 6 IDC20 IDC40 Kbd Mouse DB9 IDC26 2pins IDC10 IDC44 2mm 1 27mm 1 27mm DB15 n UDE CompactFlash On board flash TL16C754 DP83815 DP83815 16 MB 4xUART Ethernet Ethernet 10 100 10 100 ij Mbit Mbit J11 B J COM3 RS232 422 485 4xIDC10 1x6pins IDC30 2mm RJ45 RJ45 CPB902 User Manual 21 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 CPB902 includes the following main functional units STPC Vega 180 200 MHz microprocessor including 32 bit x86 PII core 64 bit coprocessor 64 bit SDRAM memory bus SDRAM system memory 128 or 32 MB for versions CPB90204 and CPB90205 respectively Flash memory based reserved BIOS in system modification Onboard flash disk 16 MB IDE port with support for two Ultra DMA 66 devices CompactFlash port Serial ports COM1 RS232 3 wires null modem for console I O and file exchange maximum exchange rate 115 2 Kbit s COM2 RS232 9 wires complete maximum exchange rate 115 2 Kbit s COM3 COM6 RS232 RS422 RS485 maximum exchange rate 921 6 Kbit s Two Fast Ethernet channels 10 100 Mbit s Two USB 1 1 channels Two watchdog timers with LED indication CMOS SFRAM
2. Features Configuration This item allows to set such system features as Ultra DMA mode and boot options Custom Configuration This item opens a menu screen where you can setup DMA and interrupt levels I O ports base addresses and select console I O devices PnP Configuration This menu item gives you access to Plug and Play related IRQ and DMA settings Shadow Configuration Shadow memory configuration item allows you to select BIOS extensions memory blocks to copy into RAM on module initialization Start RS232 Manufacturing Link This menu item starts the service mode which allows to explore the disk drives of the CPB902 from a remote PC using a RS232 link between the module and a remote PC see section 5 8 Reset CMOS to last known This menu command allows you to reset the BIOS configuration parameters to the values values with which the system has switched on last time and continue with BIOS Setup Reset CMOS to factory defaults This command allows you to reset the BIOS configuration parameters to the values set by the manufacturer Write to CMOS and Exit This command lets you write the configuration parameters into CMOS memory and exit BIOS Setup Exit without changing CMOS This command allows you to exit the Setup program without writing any possible changes into the CMOS memory thus keeping intact the previously saved configuration Use Up and Down cursor keys or Tab key to move between
3. CPB902 User Manual 53 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 Figure 4 20 Point to Point Connection of Two Modules in RS 422 Mode IDC10 Connector 45 J7 J9 J11 off LA s RS422 RS485 Converter RS422 RS485 me Converter 120 120 e oe on on Figure 4 21 Connection of Several Devices in RS 485 Mode Terminating Module IDC10 Connector J5 J7 J9 J1 1 on RS422 RS485 Converter 120 D ka Peripheral Module RS485 Converter 120 RO o 2 off O D D DI DE Terminatin oae GE on p Peripheral e 1 RS422 RS485 5 Module Converter 120 RS485 Converter i 5 CTS o 7 DTR 120 E La A DE off Figure 4 22 presents a diagram explaining functioning and mode selection for one of COM3 COM6 ports TXD COM and RXD COM are TTL level signals and are routed to UART16550 compatible serial interface controller RS 232 converter is activated on setting EN_COM 1 and RS 422 RS 485 converter is activated when EN COM O RXD COM signal is multiplexed from the appropriate converter In RS 485 mode the TXEN 485 signal determi
4. Please find notes on callouts on the next page CPB902 User Manual 17 2008 Fastwel Vd bb E External Connections Fastwel dy CPB902 Callouts of the Figure 3 1 1 CDMO2 adapter for CD ROM connection 2 ASC00010 FCC44 cable 3 Null modem cable with DB9 connectors 4 IDC10 DB9 adapter cable 5 PS 2 Y cable The following standard equipment can be connected to the module Figure 3 1 CD ROM drive HDD SVGA monitor Personal computer Power supply The following devices are necessary to put the module into operation H Power supply unitwith 5 V and 1 to 1 5 A output is connected to J20 power connector If the module is intended for operation with PC 104 modules requiring 12 V power supply then this voltage should be connected to the appropriate J20 contact For checkout and adjustment purposes the AT or ATX power supply units are recommended W Y cable allowing to connect a mouse and a keyboard to the module s J5 connector It is enough to connect only a keyboard directly to J5 connector for CPB90205 version of the module W The following devices may be connected to the module to serve as a display unit Monitor of a remote PC console operation connected via a null modem cable and FCD9F adapter to J4 connector SVGA monitor directly attached to P7 connector The operating system is loaded from the on board NAND Flash memory Operating system on this flash disk is FDOS supplemented with utilities Before s
5. Table 4 24 PC 104 P4 Rows C and D Contacts Designation In tables 4 23 and 4 24 Not used Power The power is supplied to the module installed into a crate In Out column shows the data transfer direction for a processor module being the bus master CO GND In DO GND In Gi SBHE Out D1 MEMCS16 In C2 LA23 Out D2 10CS16 In C3 LA22 Out D3 IRQ10 In C4 LA21 Out D4 IRQ11 In C5 LA20 Out D5 IRQ12 In C6 LA19 Out D6 IRQ13 In C7 LA18 Out D7 IRQ14 In C8 LA17 Out D8 DACKO Out C9 MEMR Out D9 DRQO In C10 MEMW Out D10 DACK5 Out C11 SD8 In Out D11 DRQ5 In C12 SD9 In Out D12 DACK6 Out C18 SD10 In Out D13 DRQ6 In C14 SD11 In Out D14 DACK7 Out C15 SD12 In Out D15 DRQ7 In C16 SD13 In Out D16 5V In C17 SD14 In Out D17 MASTER In C18 SD15 In Out D18 GND In C19 KEY D19 GND In Note CPB902 User Manual 66 2008 Fastwel i5 E Functional Description Fastwel TE CPB902 4 3 19 Diagnostic LEDs CPB902 has four diagnostic LEDs D9 D10 D11 D20 upper right corner in Figure 4 2 If the processor module is installed into the mounting cage additional light pipes can be installed to conduct the light to the front panel The following table describes the function of these LEDs Table 4 25 CPB902 Diagnostic LEDs Function D9 IDE HDD activity D10 User LED1 D11 User LED2 D20 Processor reset by WDT This LED light
6. CPB90204 1 3 A CPB90205 1 2 A Important N 12 V voltage is not used by the module 12 V line from power supply connector is routed to the PC 104 header contact 2 3 Environmental x Operating temperature range from 40 C to 85 C H Storage temperature 55 C to 90 C E Relative humidity 5 to 9596 at 25 C noncondensing 2 4 Mechanical m Vibration 5g l Single shock peak acceleration 100 g B Multiple shock peak acceleration 50 g CPB902 User Manual 14 2008 Fastwel Vd bb E Technical Specifications Fastwel TE CPB902 2 5 Dimensions and Weight E Dimensions not more 107 x 147 x 26 mm 4 21 x 5 79 x 1 02 see also section 4 4 for mounting dimensions H Weight not more 0 22 kg 2 6 MTBF MTBF for CPB902 is 120000 hours The value is calculated according to Telcordia Issue 1 model Method Case 3 for continuous operation at a surface location at normal environmental conditions Russian State Standard GOST 15150 69 UHL4 climatic parameters and at ambient temperature 30C CPB902 User Manual 15 2008 Fastwel Vd bb E External Connections Fastwel Lee CPB902 3 External Connections The following precautions must be observed to ensure proper installation and to avoid damage to the module other system components or harm to personnel 3 1 Safety Regulations The following safety regulations must be observed when installing or operating the module Fast
7. mode or between D and D lines of COM5 port in RS485 mode J12 1 2 Enable terminator between TX and TX lines of COM6 port in RS422 Terminators on COM6 mode in RS 422 RS 485 modes J12 3 4 Enable terminator between RX and RX lines of COM6 port in RS422 mode or between D and D lines of COM6 port in RS485 mode J13 1 2 Enable module reset by supervisor s WDT Microprocessor RESET J13 3 4 Enable module reset by SIO internal WDT signal source selection J13 5 6 Enable module reset by optoisolated input signal J13 7 8 Enable the optoisolated input as IRQ14 source LCD contrast control J18 1 2 LCD contrast control voltage range is set to O 5 V voltage range selection J18 3 4 LCD contrast control voltage range is set to negative value 7V 0 ha icd of the battery J19 1 2 If closed the battery is connected to RTC ROM1 addressing Enable lower ROM BIOS part addressing Switching between main J19 3 4 If the jumper is not set the upper part of ROM BIOS is addressed with main BIOS copy Closing the jumper enables reserve BIOS copy The action described in this column corresponds to the closed jumper contacts CPB902 User Manual 2008 Fastwel Matt 5 b 88 E Appendices Fastwel Ty CPB902 6 2 Jumper Settings by Assignment Table 6 2 Jumper Settings by Assignment J13 1 2 Enable module reset by supervisor s WDT J13 3 4 Enable module reset by
8. PC104 IRQI C104 Ret IRQ15 HDD2 Secondary IRQO Timen IRQ MUXO IRQI r CPB902 User Manual 32 2008 Fastwel Vd bb E Functional Description Fastwel Lee CPB902 Interrupt request configuration is performed in BIOS Setup see description in sections 5 5 and 5 6 Table 4 4 Interrupt Settings IRQO System timer IRQ1 Keyboard main port Matrix keypad IRQ2 Cascading to IRQ9 IRQ3 COM2 IRQ4 COM1 IRQ5 PC 104 FBUS controller IRQ6 FDD PC 104 IRQ7 PC 104 LPT1 IRQ8 RTC IRQ9 Serial interfaces COM3 COM6 PC 104 IRQ10 PCI bus devices IRQ11 PC 104 Serial interfaces COM3 COM6 IRQ12 Mouse PC 104 IRQ13 Reserved for math coprocessor IRQ14 Primary IDE controller External optoisolated input or PC 104 IRQ15 Secondary IDE controller Flash disk or PC 104 CPB902 User Manual 33 2008 Fastwel V 1 5b E Functional Description Fastwel TE CPB902 4 2 4 DMA Channels Figure 4 5 DMA Request Channels Multiplexing Diagram DRQ Selector DRQ MUX DRQO DRQ1 PC104 DRQ1 FDC_DRQ2 SIO PC104 DRQ2 DRQ2 L DRQ MUXI FBUS DRQ1 PC104 DRQ3 DRQ3 FBUS DRQ2 DRQ4 PC104 DRQ5 DRQ5 PC104 DRQ6 PC104 DRQ7 DRQ MUXO DRQ6 DRQ7 DACK Demux DACK Selector DACKENCO see DREQ Selector DACKENC1 DACKENC2 IPC104 DACK1 IFDC DACK2 SIO IPC104 DACK2 FBUS_DACK1
9. 1 1 Module Intro AU CHO M ccm 10 UC De Ee E 11 FC ENEP IVACITUJE MEER 11 1 4 Additional Accessories AA 11 1 5 Supplementary Information 12 1 5 1 Related Documents 12 2 Technical Specifications eeeeessieeeeeeeee eee eeseeeeeeene esee nene nennt nnns nanus anne nnnm n nasa nnns sanant 13 2 1 GHENONA ke 13 2 2 NS nn taeetttt tA AAAS CEEE EAAEAACEEEEAEEESCEEEEEEAEAACEEEEEEEEESCEnEE EEE En eena 14 23 Environmental sesse reete RE SER CRAX REESEN A 14 2 4 M CHANICA EE 14 2 5 Dimensions and Weoht tata aa eaaa nn nn sasa a aaa oaaoott nn nnne nsn r nest nnne nnne nnne 15 26 MIBE icti ai tett teke g ken pipi kk ap pa baddest kn ia ii du ki pip a p e ik cette pip debes qute eg 15 3 External Connections 16 3 1 Safety R QUIAUONS a A EE EARRA EANA 16 3 2 Connection of Peripheral Devices AAA 17 3 2 1 CompactFlash Cards Installation eeesssseeeeennne nene 19 3 2 2 USB Devices Connection essssssssseeeeeeeeeeeene nennen nnne nnne s enne nnns 19 3 2 3 Battery Replacement AAA 20 3 3 e TE UE e EE 20 4 Functional Description 1 eeeeeeeeeeeeeeeeeeeeeneeeeeeee nennen rr 21 4 1 Str cture arnd ME e EE 21 4 2 Address Mapping eem nennen nn nn nnnm rsen nint nrnnner eser nnne nnne nnne nnne 24 4 2 1 Memory Addressing AEN 24 4 2 2 I O Addressing EE 24 4 2 3 INKL 32 4 2 4 DMA Camel Sees dice
10. 5 KEY R2 20 LCD DO 6 KEY CO 21 LCD D1 7 KEY C3 22 LCD D2 8 KEY R3 23 LCD D3 9 KEY R4 24 LCD D4 10 KEY C4 25 LCD D5 11 KEY C5 26 LCD D6 12 KEY R5 27 LCD D7 13 GND 28 LCD CS1 14 GND 29 LCD CS2 15 5V 30 LCD_RST Table 4 19 J18 Pinpad Pinout 1 VEE Driver power input 2 GND Common ground 3 VEE Driver power input 4 7 V 7 V supply from module The figure below 4 25 shows circuit diagram explaining the function of the J18 pinpad If a commercial temperature range LCD module is used the LCD TRIM line voltage should be 0 to 5 V J18 jumper in position 1 2 voltage adjusted by R154 If an extended temperature range LCD module is used it is possible that the LCD TRIM voltage should have negative value 418 jumper in position 3 4 voltage adjusted by R154 Figure 4 25 J18 Pinpad Connection Circuit Diagram 45V J18 ToLCDT RIMContact R154 gt 1 2 7V 3 4 0 CPB902 User Manual 59 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 13 2 Matrix Keypad Connection A matrix keypad can be connected to the J17 header It is possible to use a matrix keypad having 16 4x4 20 4x5 or 5x4 25 5x5 30 6x5 or 5x6 or 36 6x6 keys To interface with a keypad CPB902 has two ports in I O address area one is column scanning and interrupt control port another one is row scanning port The keyboard interface can also be used as a discrete input output Column scanning and interrupt
11. 6 no 7 no 0 yes 1 yes FBUS unit Received Transmitted bytes counters loading 2 yes Loading order 313 3 yes 1 Transmit counter lower byte write 4 yes 2 Transmit counter upper byte 5 yes 3 Receive counter lower byte 6 yes 4 Receive counter upper byte 7 yes CPB902 User Manual 27 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 0 NE 0 FBUS unit Disable interrupt on completion of transmission cycle y 1 FBUS unit Enable interrupt on completion of transmission cycle 1 os 0 FBUS unit Disable interrupt on error y 1 FBUS unit Enable interrupt on error 2 yes 0 1 Start transmission cycle via FBUS 314 7 m z E write 4 yes 1 0 FBUS unit Set transmission rate coefficient TRC 5 yes 1 The FBUS unit transmission rate BR is calculated using 0 the following equation 6 yes 1 BR 2 1 TRC Mbit s 7 yes 1 0 yes FBUS unit DAISY line status 1 yes FBUS unit Interrupt line status 314 2 no 8 read 3 no 4 no E 5 no 6 no 7 no 310 6 0 no n 1 Matrix keypad column O scanning in progress 0 yes 0 Write Set status of the KEY RO discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY RO discrete I O chan
12. Color resolution 9 bpp 3 bits per color channel x001xxxx Color resolution 12 bpp 4 bits per color channel x 010xxxx Color resolution 18 bpp 6 bits per color channel x 0 1141xxxsx Color resolution 24 bpp 8 bits per color channel x 100 x x x x 24 bit per pixel 12 12 bit 2 pixels clock x101xxxx Analog TFT display RGB SOL Oe ae S 36 bit per pixel 18 18 bit 2 pixels clock OK x xx x oe 16 bit DSTN interface l X XXXXXX 24 bit DSTN interface 11111111 VGA monitor in RGB mode Examples 10110010 LCD resolution 640x480 24 bit 60 85 Hz 10110110 LCD resolution 800x600 24 bit 60 85 Hz 10111010 LCD resolution 1024x768 24 bit 60 85 Hz 10111110 LCD resolution 1280x1024 24 bit 60 Hz CPB902 User Manual 39 2008 Fastwel Vd bb E Functional Description Fastwel TR CPB902 The module s video controller supports color STN and TFT panels with digital interface These panels are connected to J16 connector AMP 147377 4 counterpart AMP 111196 9 Color TFT panels with RGB interface are also supported Correspondence between the video controller interface lines FDATA 23 0 and TFT STN panels interfaces is given in table 4 9 below Pin destinations of J16 connector is presented in table 4 10 Table 4 9 Different Types of TFT STN Panels Connection FHSYNC LP LP HSYNC HSYNC HSYNC HSYNC HSYNC FVSYNC FP FP
13. Designation oooconnncnncccnnnccconcnannncnnncnonanann enne 66 CPB902 Diagnostic LEDs FUNCTION cece ner in anette een nnnm rennen nnne nnns 67 J20 Power Connector ue 67 EDEN 71 Basic CMOS Configuration Menu ltems oooononcooccccnnccononononcnononnnnnanancnnnnncnnnnnnnnnnnnnnncnnnnnnnnnnnnnnnnnnnnnnnns 72 Features Configuration Menu lteMS ooooccccnccnnncccoocccncccconananancnnnnncnnnnnnnnncnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnns 74 Custom Configuration Menu Items mne nnnm nnne nennen nnne 75 Jumper Settings BY FUNCT OM NET 88 Jumper Settings by Assignment nennen nnne nnnm nnne nr nn nr rn nnne nnns 89 CPB902 User Manual 3 2008 Fastwel Vedia bb E Fastwel Lee CPB902 List of Figures Figure 1 1 CPB902 Module Appearance AEN 10 Figure 3 1 External Devices Connection ENEE 17 Figure 3 2 Cables 3 and 4 Fig 3 1 Connection for Console Operation 19 Figure 4 1 CPB902 Block Diagram cect er nn rn nn nn nn nnnn nnne nnne nnne nnnnnnrn nennen nennen rsen nnn 21 Figure 4 2 Top Side Connectors and Main Components Layout 23 Figure 4 3 Bottom Side Connectors and Main Components Layout 23 Figure 4 4 Interrupt Source Multiplexing Diagor am 32 Figure 4 5 DMA Request Channels Multiplexing Diagramm 34 Figure 4 6 Connection of 16 bit DSTN Panel enm nennen nnnm ener nnn nennen rsen 42 Figure 4 7 Connection of 24 bit DSTN Panel nnne nenne nnnmernse rnnt nnne nnne 42 Figure 4 8 Connect
14. General Software amp BIOS Fastwel Len CPB902 To control the WDT2 the OCTAGON interface can be used as well Enable WDT2 Input parameters AX OFDO1h DX 0FFFFh WDT2 strobing Input parameters AX OFDO2h4 DX 0FFFFh Disable WDT2 Input parameters AX 0FDO3h DX FFFFh INT17H call Input parameters AH 0Fh DX 4657H Returned value AL 310h register state after FPGA is loaded Bit 1 set to 1 indicates that the module has rebooted at the command of WDT CPB902 User Manual 87 2008 Fastwel v 1 5b E Appendices Fastwel Lee CPB902 6 Appendices 6 1 Jumper Settings by Function Table 6 1 Jumper Settings by Function Enable terminator between TX and TX lines of COM3 port in RS422 and reserve BIOS copies J6 1 2 Terminators on COM3 mode in RS 422 RS 485 modes J6 3 4 Enable terminator between RX and RX lines of COM3 port in RS422 mode or between D and D lines of COMS port in R8485 mode J8 1 2 Enable terminator between TX and TX lines of COM4 port in RS422 Terminators on COM4 mode in RS 422 RS 485 modes J8 3 4 Enable terminator between RX and RX lines of COM4 port in RS422 mode or between D and D lines of COMA port in RS485 mode J10 1 2 Enable terminator between TX and TX lines of COM5 port in RS422 Terminators on COM5 mode in RS 422 RS 485 modes J10 3 4 Enable terminator between RX and RX lines of COM5 port in RS422
15. KEY C5 discrete I O channel trigger 316 310 6 1 yes 4 gray indicates trigger status after reset Read KEY C5 discrete I O channel status W 0 Matrix keypad row 4 0 No key pressed 310 059 i 1 1 Key pressed 4 yes 0 310 6 1 no 1 KEY RO discrete I O channel trigger status 3 0 Matrix keypad row 5 0 No key pressed 910 659 Ge 1 1 Key pressed 5 yes 0 310 6 1 no 1 KEY Ri discrete I O channel trigger status 310 620 no 0 6 yes 0 310 6 1 no 7 KEY R2 discrete I O channel trigger status 310 620 no 0 7 yes 310 6 1 no KEY R3 discrete I O channel trigger status 0 IRQ1 source selection SIO IRQ1 9 yes yes 1 IRQ1 source selection KBD IRQ matrix keypad 1 as as 0 IRQ5 source selection FBUS IRQ FBUS unit y y 1 IRQ5 source selection PC104 IRQ5 2 as s 0 IRQ6 source selection SIO IRQ6 y y 1 IRQ6 source selection PC104_IRQ6 0 IRQ7 source selection SIO IRQ7 317 i yes yes 1 IRQ7 source selection PC104 IRQ7 0 IRQ8 source selection SIO IRQ8 4 yes yes 1 IRQ8 source selection PC104_IRQ4 0 IRQ9 source selection UART IRQ internal 5 yes yes 1 IRQ9 source selection PC104_IRQ9 yes no 0 0 IRQ11 source selection UART_IRQ internal 7 yes yes 1 IRQ11 source selection PC104 IRQ11 0 IRQ12 source selection SIO IRQ12 9 yes yes 1 IRQ12 source selection PC104_IRQ12 0 IRQ14 source selection OPTO IRQ l yes yes 1 IRQ14 source selection PC104 IRQ14 2 0 IRQ15 source selection FL RB NAND FLASH available 318 y y 1 IRQ15 source
16. Main menu N returns you to the Main menu without changing anything 5 9 3 Write to CMOS and Exit After making your changes on the BIOS Setup menus always select Write to CMOS and Exit to store the selections displayed in the menus in CMOS short for battery backed CMOS RAM a special section of nonvolatile memory that stays on after you power down your system The next time you boot your computer the BIOS configures your system according to the Setup parameters stored in CMOS memory On selection of this Main menu command the program displays this message Save changes and exit Y N If you choose Y the program saves the BIOS Setup parameters to CMOS exits BIOS Setup and reboots the system N returns you to the Main menu without making any changes During boot up General Software amp BIOS attempts to load and use the values stored in CMOS If system does not boot with those values reboot and press Del to enter BIOS Setup In Setup you can try to change the parameters that caused the boot failure or get the Factory Default Values 5 9 4 Exit without changing CMOS Use this option to exit Setup without storing in CMOS any changes you may have made The previous parameters remain in effect The program displays this message Exit without changing CMOS Y N Y confirms exiting without saving any changes closes Setup and reboots the system N returns you to the Main menu without making any changes CPB9
17. Manufacturing Link mode allows to exchange files between the module and a remote PC via RS232 link To do so the driver mfgdrv sys should be loaded into PC memory In this case the disk drives of the CPB902 become available at the PC as logical units The config sys initialization string for loading mfgdrv sys into PC memory should look like this DEVICE MFGDRV SYS BAUD 115K PORT COMn UNIT u where PORT PC COM port number COM1 COM2 UNIT Module s disk drive which will be available at the PC via COM port u 0 disk A u 1 disk B u 80 disk C u 81 disk D etc For example if C is the last PC disk drive then in Manufacturing Link mode after mfgdrv sys is loaded with the following parameters DEVICE MFGDRV SYS BAUD 115K PORT COM2 UNIT O DEVICE MFGDRV SYS BAUD 115K PORT COM2 UNIT 80 the drives D and E corresponding to the devices A and C of the module will appear on the PC Manufacturing Link mode can also be used for formatting of the CPB902 disks and transferring of MS DOS or FDOS 6 22 operating systems To format a CPB902 disk and transfer MS DOS operating system 1 Boot a PC with the operating system which is to be transferred onto a CPB902 disk and start the Manufacturing link mode 2 On the PC enter the command FORMAT Z S where Z is a CPB902 drive name 3 Waituntil the message System transferred appears To format a CP
18. SIO WDT J13 5 6 Enable module reset by optoisolated input signal J13 7 8 Enable the optoisolated input as IRQ14 source J6 1 2 Enable terminator between TX and TX lines of COM3 port in RS422 mode J6 3 4 Enable terminator between RX and RX lines of COMS port in RS422 mode or between D and D lines of COM3 port in RS485 mode J8 1 2 Enable terminator between TX and TX lines of COM4 port in RS422 mode J8 3 4 Enable terminator between RX and RX lines of COM4 port in RS422 mode or between D and D lines of COM4 port in RS485 mode J10 1 2 Enable terminator between TX and TX lines of COM5 port in RS422 mode J10 3 4 Enable terminator between RX and RX lines of COMS port in RS422 mode or between D and D lines of COM5 port in RS485 mode J12 1 2 Enable terminator between TX and TX lines of COM6 port in RS422 mode J12 3 4 Enable terminator between RX and RX lines of COM6 port in RS422 mode or between D and D lines of COM6 port in RS485 mode J18 1 2 LCD contrast control voltage range is set to O 5 V J18 3 4 LCD contrast control voltage range is set to negative value 7V 0 J19 1 2 Enable connection of battery to the RTC J19 3 4 Switch addressing to lower part of ROM BIOS Note The Assignment column describes the action corresponding to the closed jumper position CPB902 User Manual 89 2008 Fastwel v 1 5b E
19. USER LED2 user LEDs are switched on and off by writing logical 1 or 0 respectively to GPIO4 and GPIOS lines of the GPIO processor unit Sample LED control program code fragments are given below Attention GPIO3 GPIOO lines are used by the system Incorrect handling of these lines may lead to system failure Enable GPIO processor unit 32 bit output of the value 0x80006040 to OxCF8 port outpd OxCF8 0x80006040 32 bit input from OxCFC port SB MISC REG cont inpd OxCFC if SB MISC REG cont amp 0x2 outpd OxCF8 0x80006040 Enable GPIO unit outp OXCFC SB MISC REG cont 0x02 Obtaining GPIO base address and saving it to gpio base variable outpd OxCF8 0x80006044 gpio base inpw OxCFC GOxFFF Check the lines direction direction reg cont inp gpio base Li if direction reg cont amp 0x30 Set GPIO4 and GPIO5 lines to output outp gpio_base direction_reg_cont amp 0xCF Get GPIO lines state from data source read control reg cont inp gpio base l if read control reg cont GPIO state read directly from GPIO lines outp gpio_baset 1 0x00 Switch USER_LED1 on off if inp gpio_baset 6 amp 0x10 Switch USER_LED1 off outp gpio base 6 inp gpio base 6 amp 0x EH nj else Switch USER_LED1 on outp gpio base 6 inp gpio_base 6 0x10 Switch USER LED2 on off if inp gpio base 6 amp 0x20 Switc
20. coe DoD ad 34 43 Functional Description i end or Cree tat eese EE ag ta CU ip e aaa ake ode bann Ses oo lacada 35 4 3 1 Mlei ee encre 35 4 3 2 SDRAM auper M 35 4 3 3 Reserved Flash BIOS ENNEN 35 4 3 4 WIDE Interface ene 36 4 3 5 CompactFlash Socket AAA 37 4 3 6 NAN D FVASI ss owa ti eka ta kat kk kt pk kt kd lp kk dp di l did kal Da kk lak ep dd 38 CPB902 User Manual 1 2008 Fastwel v 1 5b E Fastwel Lee CPB902 4 3 7 Video Controller and VGA LCD Adapter Mocduiles A 38 4 3 7 1 Video Controller Operation Modes and Connection of Monitors 38 4 3 7 2 CVM02 Sharp LQ104V1DG51 TFT Panel Connection eeeeeesesss 46 4 3 7 8 CVMO04 Sharp LQ104V1LG61 TFT Panel Connection ccconnconcccnnncccnnnanancnnnncinannnns 47 4 3 7 4 CVMO1 Expansion Module 50 4 3 8 Keyboard and Mouse Interface 51 4 3 9 USB Itten AER EE doute ntes 52 4 3 10 Fast Ethernet Interface sn Nee EEN kn ko k PO Oo bone ko ke PRA Ret te SERT 52 4 3 11 Serial Ports EE ia ko bi bu lox te kob be bk pe P ko vi a ce eege v den 52 4 3 12 FDD LPT PON wiki kaka v ni ek v y ya paye e 55 4 3 13 LCD andi Matrix Keyboard Port ctii i t erede Eta tete a Ein aut e age donas 57 4319 1 LGD GConnectlOn uix rns Fe ERA x AER n EE a od ERR AER Y ka 57 4 3 13 2 Matrix Keypad Connection eese eene
21. control port Port address 315h Bits 5 0 available for read only 1 in one of the bits indicates the number of the currently scanned column Bit 6 not used Bit 7 available for read write When read this bit indicates the presence of keypad interrupt 1 keypad interrupt is present cleared after read 0 no interrupt In write mode controls the matrix keypad generation 0 interrupt disabled 1 interrupt enabled Row scanning port Port address 316h Bits 5 0 available for read only 0 in one of the bits indicates the column where the key is pressed If no key is pressed all these bits are set to 1 There are two ways to access a keypad in a user program by reading bit 7 of 315h port or using IRQ1 interrupt By default this interrupt is used by a PS 2 keyboard at P5 connector To use it for matrix keypad it is necessary to switch it in BIOS Setup program see section 5 5 Upon receipt of the key pressed attribute or enabling the IRQ1 interrupt handler the user program should read the 315h and 316h ports and generate the code of the pressed key The way the keys are coded depend on the type of the keypad on the KEY R 5 0 and KEY C 5 0 lines connection diagram and therefore is not described in this Manual 4 3 13 3 Using Keyboard Interface by Discrete UO Unit The discrete I O unit consists of 12 I O channels KEY R 5 0 and KEY C 5 0 routed to J17 header The
22. menu items Enter selects the item and allows to proceed with the command or opens the submenu screen CPB902 User Manual 71 2008 Fastwel Vd bb E Fastwel Lee General Software BIOS CPB902 5 3 Basic CMOS configuration On selection of this Main menu item the following screen is shown Figure 5 2 Basic CMOS Configuration Screen Image System BIOS Setup Basic CMOS Configuration C 2005 General Software Inc All rights reserved DRIVE GE Hds EO Master EO Slave El Master OMETRY Not installed Not installed ot installed Sect Cyls 1980 27 Date Jan 01 Time 04 47 Onboard Flash Disk Enabled First Boot From C F1 Error Wait Enabled NumLock Enabled Typematic Rate 30 cps Typematic Delay 0 25 s 1st Disk Onboard Flash Disk Disk C Floppy Disk Drive Not installed Boot Method Boot Sector emory Base Ext 632KB 127MB to modify 1 1 5 CR Tab to select or lt PgUp gt lt PgDn gt lt Esc gt to return to main menu Use arrow keys Tab key and Enter to move between items and for selection lt PgUp gt PgDn lt gt or lt gt are used to change the selected parameter Esc to return to the Main Menu The following table presents explanations on Basic CMOS Configuration menu screen Table 5 2 Basic CMOS Configuration Menu Items Date Time These items allow you to set system dat
23. selection PC104 IRQ15 3 yes no 0 4 yes no 0 5 yes no 0 6 yes no 0 7 yes no 0 CPB902 User Manual 29 2008 Fastwel V 1 5b E Functional Description Fastwel TR CPB902 0 yes yes 0 1 yes yes 1 2 yes yes 3 yes yes 319 0 LCD read write data write commands read status 4 yes yes 1 5 yes yes 6 yes yes 7 yes yes 0 yes no Always 1 LCD read available 1 yes no 0 2 yes no 0 3 yes yes lcd cs2 line status 0 31A 4 yes yes 1 lcd e line status 5 yes yes lcd rs line status 6 yes yes lcd rw line status 7 yes yes lcd cs1 line status 0 KEY R4 discrete I O channel trigger status 9 yes ix 1 bit 6 of port 310 is set to 1 1 s h 0 KEY R5 discrete I O channel trigger status y 1 bit 6 of port 310 is set to 1 2 s h 0 KEY CO discrete I O channel trigger status y 1 bit 6 of port 310 is set to 1 3 s M 0 KEY C1 discrete I O channel trigger status 31B d 1 bit 6 of port 310 is set to 1 4 ak 0 KEY C2 discrete I O channel trigger status y 1 bit 6 of port 310 is set to 1 5 m Ge 0 KEY C3 discrete I O channel trigger status y 1 bit 6 of port 310 is set to 1 6 s go 0 KEY CA discrete I O channel trigger status y 1 bit 6 of port 310 is set to 1 0 KEY
24. unit is enabled by writing 1 to the bit 6 of 310h port and at the same time the matrix keyboard unit is disconnected from KEY R 5 0 and KEY C 5 0 lines All the 12 channels are identical Each channel allows to read the line status and if pull up resistors are connected to set the required logical state The line status is read from the ports 315h bits 7 0 correspond to the channels KEY_C 1 0 and KEY R 5 0 and 316h bits 3 0 correspond to the channels KEY C 5 2 For each channel logical zero is set by writing 0 to the corresponding bit of 315h and 316h ports Logical one is set by writing 1 to the corresponding bit of 315h and 316h ports if pull up resistors are connected For each channel the trigger status is retrieved via the ports 316h bits 7 4 correspond to KEY R 3 0 lines and 31Bh bits 7 0 correspond to KEY C 5 0 and KEY R 5 4 lines Discrete I O channel block diagram is shown in Figure 4 26 The I O unit structure is presented in Figure 4 27 CPB902 User Manual 60 2008 Fastwel Vd bb E Fastwel Lee Functional Description CPB902 Figure 4 26 Discrete I O Channel Block Diagram Outputport T rigger FPGA 315h 316h W 316h 31Bh R 5V max Inputport 315h 316h R max 20 mA S CE Figure 4 27 Discrete UO Unit Ports Binding Diagram Read Writeport316h DG KEY C5 De KEY C4 DI KEY C3 DO KEY C2 D7 KEY C1 D6 KEY CO D6 KEY R5 DI KEY R4 D K
25. 02 Sharp LQ104V1LG61 LCD panel connection module ACS00022 685611 050 Cable for connection of CVMO2 to CPB90204 CC90201 301152 011 CPB902 mounting cage for installation on surface CC90202 301152 011 01 CPB902 mounting cage for installation on DIN rail or on surface PS90201 436434 004 18 72 V to 5V DC DC power converter for installation in CC902 Additional accessories are not supplied with the processor module ordered separately CPB902 User Manual 11 2008 Fastwel Vd bb E Introduction Fastwel L CPB902 1 5 Supplementary Information 1 5 1 Related Documents Information related to this product and its components can be found in the following documents Table 1 4 Related Publications CompactFlash cards CF and CompactFlash Specification Revision 1 4 Processor STPC Vega Programming manual Graphics controller LynxEM DataBook Super UO SuperlO FDC37B787 Data sheet CPB902 User Manual 12 2008 Fastwel Vd bb E Technical Specifications Fastwel T pi CPB902 2 Technical Specifications 2 1 General CPU STPC Vega 200 MHz 32 bit x86 PII core 64 bit coprocessor 64 bit memory bus System memory SDRAM 128 32 MB for CPB90204 05 respectively Flash BIOS E 256 KB reserved In system modification Solid State Disk 16 MB with MS DOS compatible Fastwel file system Storage Compact Flash Type I II socket on board bottom side Support for two UltraDMA 66 IDE devices Se
26. 02 User Manual 81 2008 Fastwel Vd bb E General Software amp BIOS Fastwel TE CPB902 5 10 Reset CMOS to Factory Defaults from a Remote PC CMOS RST COM is a software utility which allows to reset the BIOS setup parameters stored in CMOS memory to factory defaults from a remote PC To do so follow the procedure below 1 Connect COM1 port of CPB902 to a PC COM port with a null modem cable 2 Start CMOS RST COM on a remote PC with the parameter CMOS RST COM COM2 where COM2 is a name of a PC COM port to which the module is connected 3 Switch on the module power The PC monitor should display the following message Reset acknowledged 5 11 Extended BIOS Functions 5 11 1 User Programs Interface with FRAM Memory Units INT17H BIOS function is used to address FRAM memory FRAM size available to user is 7 KB For read mode the following parameters are set ah 0 bx address offset in the FRAM user area 0 1BFFh cx number of bytes to read dx 4657h FW es di read data buffer gt For write mode the following parameters are set ah 1 bx address offset in the FRAM user area 0 1BFFh cx number of bytes to write dx 4657h FW ds si write data buffer On completion the functions return the result in C CF tag NC OK CY Error CPB902 User Manual 82 2008 Fastwel Vd bb E General Software amp BIOS Fastwel T CPB902 5 11 2 User LEDs Control USER LED and
27. 11 Extended BIOS Functions eer ve vr E Es 82 5 11 1 User Programs Interface with FRAM Memory LUlnte 82 5 11 2 User LEDS ul te TEE 83 5 11 3 SuperlO Watchdog Timer Operation 84 5 11 4 ADM8697 Supervisor s Watchdog Timer Operation 85 5 11 5 Using INT 17H BIOS Extension to Control the Watchdog Timers oooooooccccnncnoccccocnccnnncconanannncnn 86 6 APPO ICO ina cias 88 6 1 Jumper Settings by Function oooooocccnnncconncoonncnnnnononnnonnnnnnncnnnnnnnnncn nn in nr nn rn nennen nnnm rsen rnnt nnne nnne nnn 88 6 2 Jumper Settings by ASSIGNMENT eene ener nnn nennen serene nnne nene 89 CPB902 User Manual 2 2008 Fastwel Vedia bb E Fastwel Lee CPB902 List of Tables Table 1 1 Table 1 2 Table 1 3 Table 1 4 Table 4 1 Table 4 2 Table 4 3 Table 4 4 Table 4 5 Table 4 6 Table 4 7 Table 4 8 Table 4 9 Table 4 10 Table 4 11 Table 4 12 Table 4 13 Table 4 14 Table 4 15 Table 4 16 Table 4 17 Table 4 18 Table 4 19 Table 4 20 Table 4 21 Table 4 22 Table 4 23 Table 4 24 Table 4 25 Table 4 26 Table 5 1 Table 5 2 Table 5 3 Table 5 4 Table 6 1 Table 6 2 CPB902 EE 11 CPB902 S pplied SOL w ERE 11 CPB902 Additional Accessories iii ka kk ke kak kk Ak a ka kk ka ka RE eR dd 11 Related PUDIICAIONS ENEE cheatin ke ken pea kok kk n ER e ke n ak KR kk RE VA A 12 Memory Address Mapping 0 cee tt i a aaa aa eat in nemen nnne etree ania nennen nennen rsen 24 WO Addr
28. 14 CVMO01 J5 Connector Pinout 1 VEEP 21 FDATA14 2 VDDP 22 GND 3 GND 23 GND 4 FDATA1 24 FDATA17 5 FDATAO 25 FDATA16 6 FDATA3 26 FDATA19 7 FDATA2 27 FDATA18 8 FDATA5 28 FDATA21 9 FDATA4 29 FDATA20 10 FDATA7 30 FDATA23 11 FDATA6 31 FDATA22 12 GND 32 GND 13 GND 33 GND bd FDATA9 34 NP FPVS 15 FDATA8 35 NP_FPSCLK 16 FDATA11 36 NP_FPHS 17 FDATA10 37 GND 18 FDATA13 38 GND 19 FDATA12 39 NP_FPEN 20 FDATA15 40 NP_FPDE 4 3 8 Keyboard and Mouse Interface CPB902 is provided with a 6 contact PS 2 mini DIN connector P5 for mouse and or keyboard Simultaneous connection of mouse and keyboard is possible via Y cable If mouse is not used a keyboard is directly connected to P5 connector Table 4 15 PS 2 Keyboard Mouse Connector P5 Pinout ETE ES ES ES 1 KDATA Keyboard data In Out 2 MDATA Mouse data In Out 3 GND GND signal 4 VCC VCC signal 5 V 5 KCLK Keyboard clock Out 6 MCLK Mouse clock Out CPB902 User Manual 51 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 9 USB Interface The module is equipped with two USB 1 1 host ports Each channel has separate power control circuit These ports are available via P3 USB A duplex connector at the edge of the board 4 3 10 Fast Ethernet Interface The CPB902 has two 10Base TX 100Base TX Ethernet channels provided by two National Semiconductor DP83815 controllers They are available via two RJ45 P1 and P2 connectors at the e
29. 15 2 Vdd LCD TRIM J17 16 3 Vo LCD RS J17 17 4 RS LCD R W J17 18 5 R W LCD E J17 19 6 E LCD DO J17 20 7 DBO LCD D1 J17 21 8 DB1 LCD D2 J17 22 9 DB2 LCD D3 J17 23 10 DB3 LCD D4 J17 24 11 DB4 LCD D5 J17 25 12 DB5 LCD D6 J17 26 13 DB6 LCD D7 J17 27 14 DB7 Note A LCD TRIM voltage should be set to the range from 1 V to 3 V using R154 potentiometer and J18 3 J18 4 jumper Figure 4 24 POWERTIP PG12864 A Graphics LCD Connection Diagram GND J17 14 1 Vss 5V J17 15 2 Vdd LCD_TRIM J17 16 3 Vo LCD_RS J17 17 4 D 1 LCD R W J17 18 5 R W LCD_E J17 19 6 E LCD_DO J17 20 7 DBO LCD_D1 J17 21 8 DB1 LCD_D2 J17 22 9 DB2 LCD_D3 J17 23 10 DB3 LCD_D4 J17 24 11 DB4 LCD_D5 J17 25 12 DB5 LCD D6 J17 26 13 DB6 LCD D7 J17 27 14 DB7 LCD CS1 J17 28 15 CS1 LCD_CS2 J17 29 16 CS2 LCD RST J17 30 17 RST Note A LCD TRIM voltage should be set to 7 V using R154 potentiometer and J18 3 J18 4 jumper CPB902 User Manual 58 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 J17 connector pinout is given in Table 4 18 Table 4 19 presents designation of contacts of the J18 pinpad which is used to set the LCD driver power voltage Table 4 18 J17 Connector Pinout 1 KEY RO 16 LCD TRIM 2 KEY C2 17 LCD RS 3 KEY C1 18 LCD R W 4 KEY R1 19 LCD E
30. 22 LVDS Power Matrix Keypad Reset IRQ Figure 4 3 Bottom Side Connectors and Main Components Layout US 9 FR U14 e m Yo e C7 C5 C21 U8 D19 ur L K U36 U32 Compact Flash jute ja S i LI uzo T U44 40 U5 U3 N l U51 i a a ve men k e o SDRAM c kI CPB902 User Manual 23 2008 Fastwel Veet Bb E Functional Description Fastwel T CPB902 4 2 4 2 1 Table 4 1 Address Mapping Memory Addressing Memory Address Mapping 00000h O9FFFh 640 KB System memory A0000h BFFFFh 128 KB Video memory COOOOh C7FFFh 32 KB Display BIOS memory BIOS extensions C8000h EFFFh 160 KB 16K blocks can be copied into system memory See Shadow Configuration section 5 7 for details F0000h FFFFFh 64 KB System BIOS area 10000h 4FFFFFFh 127 KB Extended system memory FE0000h FFFFFFh 128 KB System BIOS area 4 2 2 l O Addressing Table 4 2 UO Address Space 000h 0A7h System I O ports OA8h OAFh System I O ports OBOh OFFh System I O ports 100h 107h COM3 default 108h 10Fh COMA default 110h 117h COM5 default 118h 11Fh COME default 120h 141h Reserved 142h COM3 COM6 ID register default 143h 2F7h Reserved alternative address space for COM3 COM6 and LPT1 2F8h 2FFh COM2 300h 31Fh Syste
31. 5 40 The following four diagrams explain how different types of TFT STN panels are connected to the module via J16 header CPB902 User Manual 41 2008 Fastwel Vd bb E Fastwel TN Functional Description CPB902 Figure 4 6 Connection of 16 bit DSTN Panel FPVDDEN Reeg panel power SY VDD VBIASEN control circuitry VEE eege s FP ma FP na 7 O E C S MES FDATA HA OS ed e ie a EE W ke E SH Dual Color TN ll u E FDATA AAA EDATAS VH a AA baa l Ge EM EE aza H FDATAO Figure 4 7 Connection of 24 bit DSTN Panel FPVDDEN panel power VDD VBIASEN control circuitry ponn VEE SS en E ee LLL FP FBATA23 el jon FDATA22 Ub FDATA21 e EDAD B8S ws FDATAI9 HA A FDATA18 e FDATA PS FOATAT ues J16 FRATAS W Se FDATA14 SSES ae EE BATAN E HA AA eh E lt FDATA10 gt gt GE gt DATAS A FDATAT E A LLL DANNS S pal MM PAN I EE DAIA uu FB e by FDATAO CPB902 User Manual 2008 Fastwel v 1 5b E 42 Functional Description Fastwel Lee CPB902 Fig
32. 5 connector shared with FDD port Switching between LPT and FDD ports is performed in BIOS Setup LPT1 uses IRQ7 interrupt line IRQ6 is assigned to FDD port Interrupts from these ports can be disabled and switched for use by ISA bus devices in BIOS Setup program see sections 5 5 and 5 6 A printer is connected to J15 header via ACS00011 FCD25F cable with DB25F connector A floppy disk drive is connected to J15 header via the ACS00002 FC26 60 26 thread ribbon cable and CDMO1 469535 030 transition module which is installed directly on 34 pin FDD connector The table below describes pin assignments of the J15 connector CPB902 User Manual 55 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 Table 4 17 LPT FDD J15 Connector Pinout 1 STROBE DSO 2 ALF DRVDENO 3 PDO INDEX 4 ERROR HDSEL 5 PD1 TRKO 6 INIT DIR 7 PD2 WP 8 SLCTIN STEP 9 PD3 RDATA 10 GND GND 11 PD4 DSKCHG 12 GND GND 13 PD5 B 14 GND GND 15 PD6 MTRO 16 GND GND 17 PD7 18 GND GND 19 ACK DS1 20 GND GND 21 BUSY MTR1 22 GND GND 23 PE WDATA 24 GND GND 25 SLCT WGATE 26 5V 5V CPB902 User Manual 56 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 13 LCD and Matrix Keyboard Port LCD monitors and matrix keypads share J17 header on the top side of CPB902 processor module 4 3 13 1 LCD Conne
33. 7 TxOUT1 H 17 GND 8 TXOUT1 L 18 GND 9 GND 19 TXCLK OUT H 10 GND 20 TXCLK OUT L Note DSTN LVDS panels are not supported CPB902 User Manual 43 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 Figure 4 10 LVDS Interface for TFT LCD Panel J21 TxOutO RxinO RxOut RxOut TxOut1 Rxin1 RxOut TxOut2 Rxin2 RxOut RxOut TxOut3 Rxin3 RxOut TxCLKOut RxCLKIn RxXCLKOut Figure 4 11 PanelLink Interface for TFT LCD Panel PanelLink Transmitter PanelLink Receiver TFT J21 Sil100 Sil100 LCD Panel R 7 0 TxIn TxOutO RxOut G 7 0 TxIn RxOut TxOut1 B 7 0 TxIn RxOut FHSYNC TxIn TxOut2 RxOut FVSYNC TxIn RxOut DE TxIn RxOut LVDSCLK TxCLKIn TxCLKOut RxCLKIn RxCLKOut CPB902 User Manual 44 2008 Fastwel Vd bb E Fastwel TS Functional Description CPB902 Figure 4 12 PanelLink Interface for DSTN LCD Panel PanelLink Transmitter PanelLink Receiver DSTN J21 Sil100 Sil100 LCD Panel U 11 0 L 11 0 FHSYNC FVSYNC DE TxOutO TxOuti TxIn TxOut2 TxIn TxIn TxCLKIn TxCLKOut RxOut RxOut RxOut RxCLKIn RxCLKOut U 11 0 L 11 0 Color DSTN panels with 16 bit or 24 bit interface and resolutions up to 1280x1024 and 1024x768 respectively are supported For color TFT panels the color resolutions of 9 12 18 and 24 bits per pixel are supported A VGA analog monitor can be connected to the 15 contact D Sub connector
34. 7PC104_DACK3 IFBUS DACK2 PC104_DACK5 PC104_DACK6 7PC104_DACK7 Table 4 5 DMA Request Map 0 Reserved for memory regeneration 1 PC 104 DRQ1 E FDD SIO PC 104 DRQ2 FBUS PC 104 DRQ3 Slave controller FBUS PC 104 DRQ5 PC 104 DRQ6 E NIOJ AJOJN PC 104 DRQ7 CPB902 User Manual 34 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 Functional Description 4 3 1 Microprocessor The module is based on STPC Vega 180 200 MHz microprocessor which includes 32 bit x86 PII core 64 bit coprocessor and 64 bit memory bus SDRAM The processor also includes MAC connected to PCI bus the MAC is not used in the current version Programmable UO port JPIO O 7 of the processor is used for system and application purposes The detailed description of the microprocessor can be found in STPC Vega Programming Manual 4 3 2 SDRAM Memory Four SDRAM memory chips are soldered on board two on the top side two on the bottom side of the PCB Total memory size is 128 MB CPB90204 or 32 MB CPB90205 4 3 3 Reserved Flash BIOS The CPB902 takes advantage of flash memory based BIOS Flash BIOS storage capacity is 512 KB The main working copy of BIOS occupies 256 KB the rest 256 KB is used for reserve BIOS copy Reserve BIOS is enabled by closing pins 3 4 at the J19 pinpad It is possible to upgrade BIOS in system It is done with t
35. B902 disk and transfer FDOS 6 22 operating system 1 Establish a connection between CPB902 and a PC in Manufacturing Link mode 2 If Windows is running on the PC enter the following command LOCK Z where Z stands for a CPB902 disk name 3 From FDOS system directory on the PC enter the next command SYS Z Fi JC 4 Wait until the messages System transferred and COMMAND COM transferred appear CPB902 User Manual 80 2008 Fastwel Vd bb E General Software amp BIOS Fastwel TE CPB902 5 9 The Rest Main Menu Commands 5 9 1 Reset CMOS to last known values If you changed your mind and decided not to write the changes you have made in BIOS Setup program and have not yet saved the values in CMOS memory you may select this command to return to the last saved parameters i e to those with which the system was successfully booted last time and continue with BIOS Setup On selection of this command the following message appears Reset CMOS to last known values Y N Pressing Y resets the parameters in CMOS memory and returns you to the Main menu N returns you to the Main menu without making any changes 5 9 2 Reset CMOS to Factory Defaults To reset the BIOS parameters to the values defined by the manufacturer select this Main menu command The program responds with this message Reset CMOS to factory defaults Y N Pressing Y resets the values stored in CMOS to the factory defaults and returns you to the
36. C5 discrete I O channel trigger status d yes is 1 bit 6 of port 310 is set to 1 0 yes no TXEN 485 COMS line status 1 yes no n TXEN 485 COMA line status 2 yes no TXEN 485 COMB line status 3 yes no TXEN 485 COMS line status 31C 0 4 yes yes 1 HF 485 COMS3 line status 5 yes yes n HF 485 COM line status 6 yes yes HF 485 COMS line status 7 yes yes n HF 485 COM6 line status CPB902 User Manual 30 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 0 yes yes EN 232 COWS line status 1 yes yes EN 232 COMA line status 2 yes yes n EN 232 COMS line status 31D 0 3 yes yes 1 EN 232 CON amp line status 4 yes no 0 5 yes no 0 6 yes no 0 7 yes no 0 0 yes yes 0 1 yes yes 1 2 yes yes 3 yes yes 0 FPGA registers marked with access control 1 To allow access to FPGA registers it is necessary 31E ide as 0 to write 55h to the port y y 1 After reset contains FFh 0 5 yes yes 1 6 yes yes 7 yes yes 0 yes no n COMS port interrupt request line status 1 yes no n COM4 port interrupt request line status 142 2 yes no COM5 port interrupt request line status 1C2 242 3 yes no COM6 port interrupt request line status d 4 g Bs 0 UART reference frequency is 1 8432 MHz regis y y 1 UART reference frequency is 14 7456 MHz ter 00 UART base addres
37. CDMO2 adapter This adapter is connected to the 40 pin contact connector of the IDE device and with the ACS00010 FC44 cable to CPB902 J1 connector CPB902 User Manual 36 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 5 CompactFlash Socket CompactFlash Type I II cards can be connected to J2 socket on the bottom side of CPB902 The device in this socket will be detected by the system as Secondary Master disk drive This device can be assigned as a bootable disk in BIOS Setup program The pinout of the J2 socket is presented in the following table Table 4 7 J2 Compact Flash Socket Pinout ET O O ES 1 GND 26 CD1 2 D03 27 D11 3 D04 28 D12 4 D05 29 D13 5 D06 30 D14 6 D07 31 D15 7 CS0 32 CS1 8 A10 NC 33 VS1 NC 9 ATA SEL 34 NORD 10 A09 NC 35 IOWR 11 A08 NC 36 ANE 12 A07 NC 37 INTRQ 13 VCC 5V 38 VCC 5V 14 A06 NC 39 CSEL 15 A05 NC 40 VS2 NC 16 A04 NC 41 RESET 17 A03 NC 42 IORDY 18 A02 43 INPACK 19 A01 44 REG 20 A00 45 DASP NC 21 DOO 46 PDIAG NC 22 D01 47 D08 23 D02 48 D09 24 IOCS16 49 D10 25 CD2 50 GND Note NC indicates that this contact is not connected to the module s circuits CPB902 User Manual 37 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 6 NAND Flash The capacity of the on board NAND flash memory chip is 16 MB It can be use
38. E M C19 SL El D19 Please see this connector s pinout tables on the next pages CPB902 User Manual 64 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 Table 4 23 PC 104 P4 Rows A and B Contacts Designation A1 IOCHK B1 GND Power A2 SD7 In Out B2 RESET Out A3 SD6 In Out B3 45V Power A4 SD5 In Out B4 IRQ9 In A5 SD4 In Out B5 5V A6 SD3 In Out B6 DRQ2 In A7 SD2 In Out B7 12V Power A8 SD1 In Out B8 ows In A9 SDO In Out B9 12V Power A10 IOCHRDY In B10 GND Power A11 AEN Out B11 SMEMW Out A12 SA19 Out B12 SMEMR Out A13 SA18 Out B13 IOW Out A14 SA17 Out B14 IOR Out A15 SA16 Out B15 DACK3 Out A16 SA15 Out B16 DRQ3 In A17 SA14 Out B17 DACK1 Out A18 SA13 Out B18 DRQ1 In A19 SA12 Out B19 REFRESH Out A20 SA11 Out B20 BCLK Out A21 SA10 Out B21 IRQ7 In A22 SA9 Out B22 IRQ6 In A23 SA8 Out B23 IRQ5 In A24 SA7 Out B24 IRQ4 In A25 SA6 Out B25 IRQ3 In A26 SA5 Out B26 DACK2 Out A27 SA4 Out B27 TC Out A28 SA3 Out B28 BALE Out A29 SA2 Out B29 5V Power A30 SA1 Out B30 OSC Out A31 SAO Out B31 GND Power CPB902 User Manual 65 2008 Fastwel Vd bb E Functional Description Fastwel Lee CPB902
39. EY R3 De KEY R2 DI KEY Ri DO KEY RO TriggersStateReadP ort316h D7 D6 D6 DI TriggersStateReadPort31Bh D D6 D6 DI D De DI DO CPB902 User Manual v 1 5b E 61 2008 Fastwel Functional Description Fastwel TE CPB902 4 3 14 Optoisolated Reset Interrupt The module has one optoisolated discrete input J14 which can be used for remote reset or for interrupt generation This interrupt is served by IRQ14 line of the interrupt controller Use J13 jumpers to select the microprocessor reset source and to enable the interrupt generation by the signal from the optoisolated input Remote reset source voltage is 3 5 V Figure 4 28 presents a simplified diagram of the circuits J13 jumper settings are described in the Table 4 20 Figure 4 28 Reset Source Selection and Optoisolated Input Circuit Diagram 3 3V J13 V WDT WDT Ze WDT 0 eee 7 CPURESET OPTO IR OptoisolatedReset IRQInput a gt i 470 E i J14 3 5V 2 IRQ Table 4 20 J13 Settings Switching Reset IRQ Source 1 2 Enable Reset from supervisor s WDT 3 4 Enable Reset from SIO WDT 5 6 Enable the optoisolated input as a Reset source Enable Reset from the optoisolated input 7 8 Enable the optoisolated input as an IRQ14 interrupt source IRQ14 interrupt can be used only if Primary IDE channel is disabled in BIOS Setup see section 5 5 It is not allowed to close the contacts 5 6 and 7 8 simultaneously the optoisolated input can h
40. FL RB line status reading NAND FLASH not available 3 dis es 0 CE NAND FLASH line set to 0 y y 1 CE NAND FLASH line set to 1 301 0 WP NAND FLASH line set to 0 i yes yes 1 WP NAND FLASH line set to 1 5 yes no 0 Reserved Permanent logic 0 6 ds k 0 ALE NAND FLASH line set to 0 y y 1 ALE NAND FLASH line set to 1 7 m we 0 CLE NAND FLASH line set to 0 y y 1 CLE NAND FLASH line set to 1 0 yes no Opto IRQ line status reading 1 2 302 3 4 5 6 7 0 yes yes PDOWN VIDEO line status set read 1 yes no WDT READ line status read 2 yes yes WDT RES line status set read 3 yes no SV PFO line status read 0 PC104 MEMW line mask bit status set read 310 yer yes 1 1 Set mask 0 Clear mask 0 SV PFO line mask bit status set read 2 yes yes 1 1 Set mask 0 Clear mask KEY R 5 0 and KEY_C 5 0 lines switching between matrix 0 keypad and discrete I O units 0 Matrix keypad unit connected to S yes yes KEY_RI5 0 and KEY C 5 0 lines 1 1 Discrete I O unit connected to KEY R 5 0 and KEY O 5 0 lines 7 yes no 0 CPB902 User Manual 26 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 Switching DMA acknowledgement DACENC 2 0 yes yes i to EDC DACK2line i 1
41. FRAM memory units 7 KB are available to the user via INT17H BIOS function See also subsection 5 11 1 in BIOS Setup description For long term storage of the CPB902 module the on board battery can be disconnected by removing the jumper from the J19 contacts 1 2 see next subsection 4 3 17 J19 Configuration Jumpers Some of the system configuration jumpers are integrated at the J19 pinpad They allow switching between main and reserve BIOS copies and connect disconnect the RTC battery The J19 circuit diagram is shown in Figure 4 29 and the jumpers function is given in Table 4 22 below Figure 4 29 J19 Circuit Diagram 45V lo p To RTC ES z To ROMBIOS SA18 7T I9 Battery Table 4 22 J19 Pins Designation 1 2 Closed RTC battery is connected open the battery is disconnected 3 4 When closed the reserve BIOS copy is enabled EEPROM lower addresses area When open the main BIOS copy is enabled EEPROM high addresses area CPB902 User Manual 63 2008 Fastwel Vest bob E Functional Description Fastwel TE CPB902 4 3 18 PC 104 Header P4 header mounted on CPB902 allows connection of PC 104 expansion modules The processor module can accommodate 3 PC 104 expansion modules maximum The contact configuration of P4 header is shown in Figure 4 30 Tables 4 23 and 4 24 give the designation of P4 contacts Figure 4 30 PC 104 P4 Contacts Layout B1 EI SS E Epa Epa man B32 At m m GEI E bi E m ama A32 Co K
42. Fastwel T CPB902 3 5 Highly Integrated Low Power SBC User Manual Product Title CPB902 Document name CPB902 User Manual Manual version 1 5b E Ref doc v 1 48 R 1 08 1 11 1 12 467444 014 Copyright 2005 2006 2007 2008 Fastwel Co Ltd All rights reserved Revision Record 1 4 beta Initial version CPB902 November 2005 1 4a Errors corrections design and styling changes figures and tables CPB902 November 2005 modification 1 4b Minor text modifications CPB902 February 2006 1 5 Modifications following design changes 04 05 CPB902 November 2007 1 5a Corrections to v 1 5 CPB902 March 2008 1 5b COM ports diagrams and description corrected CPB902 May 2008 document structure changed Contact Information Fastwel Co Ltd Fastwel Corporation US Address 108 Profsoyuznaya st 45 Main Street Moscow 117437 Suite 319 Russian Federation New York 11201 USA Tel 7 495 232 1681 1 718 554 36 86 Fax 7 495 232 1654 1 718 797 06 00 E mail info fastwel com info fastwelcorp com Web http www fastwel com Fastwel Lee CPB902 Table of Contents Table of Contents 0 a a E A 1 istor Tables 20 A T 3 MI gegeu rt 4 Notation gero au 5 General Safety EE 6 Unpacking Inspection and Handling 7 Three Year Wamramty RRRRRRRRRRRRREEEMMEEEEEEEMMEEMMMMMMM 9 1 Iterum ies 10
43. Fastwel Vd bb E General Software amp BIOS Fastwel T CPB902 5 6 PnP Configuration This BIOS Setup section provides access to Plug and Play related IRQ and DMA assignments The menu screen is shown in the figure below Figure 5 5 Plug n Play Configuration Menu Screen Image System BIOS Setup Plug n Play Configuration C 2005 General Software Inc All rights reserved Enable PnP Suppor Enabled Enable PnP O S Enabled ct ROO to PnE RO1 to Pn RO2 to PnE RO3 to PnE RO4 to Pn RO5 to PnE RO6 to PnE RO7 to PnE Assign Assign Assign Assign Assign Assign Assign Assign Disabled Assign IRQ8 to PnP Disabled Enabled Assign IRQ9 to PnP Disabled Enabled Assign IRQ10 to PnP Disabled Enabled Assign IRQ11 to PnP Enabled Disabled Assign IRQ12 to PnP Enabled Enabled Assign IRQ13 to PnP Enabled Disabled Assign IRQ14 to PnP Enabled Disabled Assign IRQ15 to PnP Enabled UU UU UU U U E I I I I I I I Assign Assign Assign Assign A0 to PnE Disabled Assign DMA4 to PnP Disabled A1 to PnE Disabled Assign DMA5 to PnP Enabled A2 to PnE Disabled Assign DMA6 to PnP Enabled A3 to PnE Enabled Assign DMA7 to PnP Disabled UUUU 1 1 2 CR Tab to select or lt PgUp gt lt PgDn gt to modify lt Esc gt to return to main menu All items allow to choose between the two options Enabled or Disabled Use arrow keys Ta
44. O6 line to output outp gpio_base direction_reg_cont amp 0xBF Get GPIO lines state from data source read control reg cont inp gpio base l if read control reg cont GPIO state read directly from GPIO lines outp gpio_baset 1 0x00 Reset the WDT in a user program do Any actions WDT reset outp gpio base 6 inp gpio base 6 0x40 outp gpio base 6 inp gpio base 6 amp 0xBF Any actions jwhile Exit More details on GPIO unit operation can be found in STPC Vega Programming manual CPB902 User Manual 85 2008 Fastwel Vowil bb E General Software amp BIOS Fastwel TE CPB902 5 11 5 Using INT 17H BIOS Extension to Control the Watchdog Timers INT 17H extensions which allow to access the watchdog timers and to support their operation are described below SIO WDT1 control WDT1 enable Input parameters AH 11h CX TIMEOUT in seconds If CX gt 255 the value is rounded down to a number devisable by 60 DX 4657h Returned value CF NC on successful completion CF CY if incorrect value is specified in CX e WDT1 strobing Input parameters AH 12h DX 4657h Disable WDT1 Input parameters AH 13h DX 4657h Supervisor s WDT control WDT2 Enable WDT2 Input parameters AH 21h DX 4657h WDT2 strobing Input parameters AH 22h DX 4657h Disable WDT2 Input parameters AH 23h DX 4657h CPB902 User Manual 86 2008 Fastwel Vd bb E
45. P7 Its pinout is presented in the table below Table 4 12 P7 D Sub VGA Connector Pinout 1 OUTR 9 2 OUTG 10 GND 3 OUTB 11 4 B 12 SDA 5 GND 13 HSYNC 6 GND 14 VSYNC 7 GND 15 SCL 8 GND CPB902 User Manual 45 2008 Fastwel v 1 5b E Functional Description Fastwel TE CPB902 4 3 7 2 CVMO02 Sharp LQ104V1DG51 TFT Panel Connection Sharp LQ104V1DG51 TFT panel can be connected to J16 header of the module using ACS00022 40 thread ribbon cable and CVMO2 adapter card which is installed directly on the panel s connector The CVMO2 adapter card has a J2 pinpad used to set display orientation on the panel screen and for backlight control The diagram on the figure below shows how this panel type is connected to CPB902 Figure 4 13 Sharp LQ104V1DG51 TFT Panel Connection and Setup Ez y EEH EE ESCH Table 4 13 CVMO2 J2 Pin Assignments 1 6 Panel screen display orientation see figure above 7 FPVDDEN signal is used for backlight control 8 GND Sharp LQ104V1DG51 backlight lamp is powered by the TDK CXA P1212B WJL external converter CPB902 User Manual 46 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 7 3 CVMO4 Sharp LQ104V1LG61 TFT Panel Connection CVMO4 module is designed to serve as an intermediate device to connect Sharp LQ104V1LG61 or similar LCD panel to Fastwel CPB90204 processor module CVMO4 funct
46. Switching DMA acknowledgement DACENC 2 to PC104 DACK line 0 Switching DMA acknowledgement DACENC 3 1 yes yes to FBUS DACKI line 1 Switching DMA acknowledgement DACENC 3 to PC104 DACKS line 0 Switching DMA acknowledgement DACENC 5 2 yes yes to FBUS DACK2 line 311 1 Switching DMA acknowledgement DACENC 5 to PC104 DACKS line 3 yes yes 0 DMA request DRQ2 received via FDC DRQ2 line 1 DMA request DRQ2 received via PC104 DRQ2 line 4 yes yes 0 DMA request DRQ3 received via FBUS DRQN line 1 DMA request DRQ3 received via PC104 DRQ3 line 5 yes yes 0 DMA request DRQ5 received via FBUS DRQ2 line 1 DMA request DRQ5 received via PC104 DRQS line 6 no no 7 no no 0 yes FBUS unit FAULT line status 1 Data Unreliable error 1 yes n FBUS unit FERR line status 1 Frame Error 2 yes FBUS unit T ERR line status 1 Timeout error 3 yes 0 FBUS unit TXMODE line status o 312 8 1 1 FBUS unit in data transmission mode read 4 yes 0 FBUS unit RXMODE line status 1 1 FBUS unit in data reception mode 5 yes 0 FBUS unit CHECKMODE line status 1 1 FBUS unit in data validity check mode 6 yes 0 FBUS unit OVR line status 1 1 FBUS Input Buffer Overflow error 7 yes FBUS unit HISPEED line status 0 yes 0 FBUS unit Set DAISY line status to 0 1 FBUS unit Set DAISY line status to 1 1 no 2 no 312 3 E yes 0 FBUS unit Clear Reset write 1 FBUS unit Set Reset 4 no 5 no
47. VSYNC VSYNC VSYNC VSYNC VSYNC FPSCLK XCK XCK CK CK CK CK CK DE ENAB ENAB ENAB ENAB ENAB FPEN FPEN FPEN FPEN FPEN FPEN FPEN FPEN FDATA23 UD11 R7 RB3 FDATA22 UD10 R6 RB2 FDATA21 UD9 R5 R5 RB1 FDATA20 UD8 R4 R4 RBO FDATA19 UD7 UD7 R3 R3 R3 RA3 FDATA18 UD6 UD6 R2 R2 R2 R2 RA2 FDATA17 UD5 UD5 R1 R1 R1 R1 RA1 FDATA16 UD4 UD4 RO RO RO RO RAO1 FDATA15 UD3 UD3 G7 GB3 FDATA14 UD2 UD2 G6 GB2 FDATA13 UD1 UD1 G5 G5 GB1 FDATA12 UDO UDO G4 G4 GB01 FDATA11 LD11 G3 G3 G3 GA3 FDATA10 LD10 G2 G2 G2 G2 GA2 FDATA9 LD9 G1 G1 G1 G1 GA1 FDATA8 LD8 GO GO GO GO GAO FDATA7 LD7 LD7 B7 BB3 FDATA6 LD6 LD6 B6 BB2 FDATAS LD5 LD5 B5 B5 BB1 FDATA4 LD4 LD4 B4 B4 BBO FDATA3 LD3 LD3 B3 B3 B3 BA3 FDATA2 LD2 LD2 B2 B2 B2 B2 BA2 FDATA1 LD1 LD1 B1 B1 B1 B1 BA1 FDATAO LDO LDO BO BO BO BO BAO FPVDDEN VDD VDD VDD VDD VDD VDD VDD VBIASEN VEE VEE VEE VEE VEE VEE VEE CPB902 User Manual 40 2008 Fastwel Ve WER E Functional Description Fastwel TES CPB902 Table 4 10 TFT STN Panels Connector J16 Pinout 1 GND 21 FDATA16 2 LVDS MCKIN 22 FDATA17 3 VBIASEN 23 FDATA18 4 FPVDDEN 24 FDATA19 5 FDATAO 25 FDATA20 6 FDATA1 26 FDATA21 7 FDATA2 27 FDATA22 8 FDATAS3 28 FDATA23 9 FDATA4 29 FPEN 10 FDATA5 30 DE 11 FDATA6 31 FPSCLK 12 FDATA7 32 FVSYNC 13 FDATA8 33 GND 14 FDATA9 34 FHSYNC 15 FDATA10 35 45V 16 FDATA11 36 5V 17 FDATA12 37 18 FDATA13 38 19 FDATA14 39 20 FDATA1
48. ad connected to J17 connector IRQ5 FBUS IRQ5 from FBUS controller PC 104 IRQ5 from PC 104 interface IRQ6 FDC IRQ6 from floppy disk controller PC 104 IRQ6 from PC 104 interface IRQ7 LPT IRQ7 from printer controller PC 104 IRQ7 from PC 104 interface IRQ8 RTC IRQ8 from RTC PC 104 IRQ8 from PC 104 interface IRQ9 COM3 COM6 IRQ9 from COM3 COM6 ports PC 104 IRQ9 from PC 104 interface IRQ11 COM3 COM6 IRQ11 from COM3 COM6 ports PC 104 IRQ11 from PC 104 interface IRQ12 PS 2 mouse IRQ12 from PS 2 mouse PC 104 IRQ12 from PC 104 interface IRQ14 OPTO IRQ IRQ14 from optoisolated input PC 104 IRQ14 from PC 104 interface This interrupt is available only if IDE Primary channel is disabled IDEO Master Not Installed IDEO Slave Not Installed IRQ15 NAND FLASH IRQ15 from NAND Flash PC 104 IRQ15 from PC 104 interface This interrupt is available only if IDE Secondary channel is disabled IDE1 Master Not Installed CPB902 User Manual 2008 Fastwel Ve Bb E 76 General Software amp BIOS Fastwel TE CPB902 DRQ2 FDC DMA channel is used by floppy disk controller PC 104 DMA channel is available for external devices via PC 104 interface Remember Wrong or incorrect settings may lead to abnormal system performance To correct possible errors restart the BIOS Setup program and restore manufacturer s settings by selection of Reset CMOS to factory defaults command in Main menu CPB902 User Manual 77 2008
49. ave only one assignment The jumpers 1 2 3 4 and 5 6 can be set closed together In this case the resulting active low Reset signal for the microprocessor is formed as logic OR function based on incoming signals The supervisor issues Reset signal when the power voltage drops below the specified value or when the connected to the supervisor SW1 button is pressed see Components Layout Diagram Figure 4 2 Starting from BIOS version 2 7 it is possible to route OptoIRQ signal to NMI input See bit 7 of 310h register description in Table 4 3 OptoIRQ signal status is represented by bit O of 302h register CPB902 User Manual 62 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 4 3 15 FBUS Connector FBUS is an interface bus which enables CPB902 to be a part of FBUS networks FBUS interface controller is routed to J22 one row 6 pin 2 mm pitch on board connector FBUS physical level is identical to the one of RS485 interface The addresses 0x312 0x314 are used to manipulate the FBUS controller The J22 contacts assignment is given in Table 4 21 Table 4 21 FBUS Connector J22 Pinout 1 D 4 HISPEED 2 D 5 GND 3 DAISY OUT 6 GND 4 3 16 RTC and Serial FRAM The module is equipped with a standard Real Time Clock FRAM is non volatile memory with 12C serial interface It serves as a back up storage for BIOS Setup parameters and for restoration of the RTC memory if an error is detected Free
50. b key and Enter to move between items and for selection lt PgUp gt PgDn lt gt or lt gt are used to change the selected parameter Esc to return to the Main Menu CPB902 User Manual 78 2008 Fastwel Vowil bb E General Software amp BIOS Fastwel T CPB902 5 7 Shadow Configuration The figure below presents the Shadow Configuration menu screen Figure 5 6 Shadow Configuration Menu Screen Image System BIOS Setup Shadow Cache Configuration C 2005 General Software Inc All rights reserved gt Disabled Disabled Disabled Disabled Disabled Disabled Disabled Disabled S S S S S S S S DO DD DO DO DD W Du DD 0 D a EF EE EC ck E ch 1 1 2 CR Tab to select or lt PgUp gt lt PgDn gt to modify lt Esc gt to return to main menu All items allow to choose between the two options Enabled or Disabled Use arrow keys Tab key and Enter to move between items and for selection lt PgUp gt lt PgDn gt or lt gt are used to change the selected parameter Esc to return to the Main Menu If Enabled is selected Shadow Configuration menu items allow to copy extension modules BIOS into operating memory by 16 KB blocks on initialization of the processor module CPB902 User Manual 79 2008 Fastwel Vd Bb E General Software amp BIOS Fastwel T CPB902 5 8 Manufacturing Link Mode
51. bb E Functional Description Fastwel TES CPB902 Table 4 16 Serial Ports Pin Assignments 1 DCD DCD TX D 2 DSR DSR TX D 3 RXD RXD RXD 4 RTS RTS 5 TXD TXD TXD 6 CTS CTS 7 DTR DTR RX 8 RI RI RX 9 GND GND GND GND GND 10 5V 5V 5V COM2 CONG COM6 ports have ESD and overload protection COM1 port has no protection Physical protocols for COM3 COM6 ports are switched by software Jumpers on J6 COM3 J8 COM4 J10 COM5 and J12 COM6 pinpads connect terminators to RS 485 RS 422 signal lines In RS 232 mode the terminators should not be connected The pins of all pinpads have identical designation shown in the following figure Figure 4 19 COM3 COM6 Ports Jumpers 2 4 1 3 L RX RX T erminatorEnabled TX T X T erminatorEnabled To use any of the COM3 COM6 ports in RS 422 or RS 485 mode do the following Set jumpers on the pinpad corresponding to the port Initialize the port by software The figures 4 20 and 4 21 show the RS 422 and RS 485 interfaces structure respectively Figure 4 20 shows two modules connected in RS 422 mode The jumper connecting terminator is set on receive lines only lines RX and RX In RS 485 mode the terminators are connected only on devices at the ends of the line see Figure 4 21 Resistance of terminators is 120 Ohm The complete description of jumpers can be found in Appendices
52. cfg reg 0x08 WDT VAL wdt timeout Any actions jwhile Exit GP12 configuration register write to configuration register WDT UNITS More details on SuperlO FDC37B787 operation can be found in SuperlO FDC37B787 Data sheet CPB902 User Manual 84 2008 Fastwel V 1 5b E General Software amp BIOS Fastwel TE CPB902 5 11 4 ADMS8697 Supervisor s Watchdog Timer Operation This watchdog timer has fixed timeout period from 4 5 to 10 5 seconds depending on supervisor chip parameters Upon expiry of the timeout the WDT resets the system unless it is reset by the user program Sample program code fragments for setting and recurring resetting the ADM8697 WDT are given below To reset the WDT the GPIO6 line of the GPIO processor unit is used Attention GPIO3 GPIOO lines are used by the system Incorrect handling of these lines may lead to system failure Enable GPIO unit 32 bit output of the value 0x80006040 to OxCF8 port outpd 0xCF8 0x80006040 32 bit input from OxCFC port SB MISC REG cont inpd OxCFC if SB MISC REG cont amp 0x2 outpd 0xCF8 0x80006040 Enable GPIO unit outp OXCFC SB MISC REG cont 0x02 Obtaining GPIO base address and saving it to gpio_base variable outpd OxCF8 0x80006044 gpio base inpw 0xCFC amp OxFFFE Check the GPIO line direction direction reg cont inp gpio base if direction reg cont amp O0x40 Set GPI
53. ction The CPB902 connector J17 is used for connection of LCD monitors based on HD44780 S6A0069 S6B0108 or compatible controllers Sample LCD connection diagrams are shown in the figures below 4 23 4 24 The driver power voltage is controlled by R154 adjustable potentiometer and J18 pinpad jumper see description and a diagram below in this section Two ports in I O address space are dedicated for data transmission and control purposes when working with LCDs They are Command Data port 319h and Control port 31Ah Commands Data port Port address 319h The port is available for read write Assignment read write data to from LCD write commands to LCD read LCD status Control Port Port Address 31Ah The control bits of this port are used to set the required timing chart for data exchange between the processor and LCD Control Port Bits Designation 0 Read Always 1 LCD available for read 1 Read Always 0 2 Read Always 0 3 Read Write LCD CS2 line control 4 Read Write LCD E line control 5 Read Write LCD_RS line control 6 Read Write LCD_R W line control 7 Read Write LCD CS1 line control CPB902 User Manual 57 2008 Fastwel Vd bb E Functional Description Fastwel T Ji CPB902 Figure 4 23 POWERTIP PC1604 A Alphanumeric LCD Connection Diagram GND J17 14 1 Vss 45V J17
54. d BIOS 2000 tm Revision 5 3 Copyright C 2005 General Software Inc All rights reserved Fastwel adaptation for CPB902 CPC106 boards Revision 2 2 Copyright C 2005 Fastwel Co Ltd Hit lt Del gt if you want to run SETUP Fastwel Flash Disk FFD Version 3 0 Copyright C 1999 2004 Fastwel Inc Starting FDOS To start BIOS Setup press Del key on a keyboard while the message Hit lt Del gt if you want to run SETUP is seen on the screen This will lead you to the Main Menu screen shown in Figure below CPB902 User Manual 70 2008 Fastwel Vowil bb E General Software amp BIOS Fastwel TE CPB902 Figure 5 1 Main Menu Screen Image System BIOS Setup Utility v5 3 C 2005 General Software Inc All rights reserved gt Basic CMOS Configuration Features Configuration Custom Configuration PnP Configuration Shadow Configuration Start RS232 Manufacturing Link Reset CMOS to last known values Reset CMOS to factory defaults Write to CMOS and Exit Exit without changing CMOS 1 1 Tab to select Esc to continue no save www gensw com www fastwel ru The Main Menu items and their functions are described in the table below Table 5 1 Main Menu Items Basic CMOS Configuration This item lead you to the menu which allows you to setup the main system parameters such as System date and time Disk drives types definition and letter assignments Boot sequence and others
55. d as a bootable disk or can be disabled in BIOS Setup see section 5 3 for details 4 3 7 Video Controller and VGA LCD Adapter Modules 4 3 7 1 Video Controller Operation Modes and Connection of Monitors The module utilizes Silicon Motion SM722GE graphics controller with the following main features Video memory size 8 MB Connection of TFT or DSTN LCD panels with resolution up to 1280x1024 Connection of VGA RGB monitors Dual display capability Possibility to direct video output from two applications to two monitors simultaneously in Windows 95 98 NT only H LVDS interface The details on architecture and programming of the video controller can be found in LynxEM DataBook CPB902 User Manual 38 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 The S1 DIP switch allows to choose video mode for the display Power on enables the selected mode The table below presents available display types and video controller operation modes 0 corresponds to ON position 1 to OFF Table 4 8 S1 Settings Display Type and Video Mode Selection x X XX xX x x 0 LCD type Color TFT XXXXXXXl LCD type Color STN XXXXXX Orx TFT FPCLK normal XXXXXXlx TFT FPCLK inverted XXXXxX00x_x LCD resolution set to 640x480 xxxx lxx LCD resolution set to 800x600 XXXXx10xx LCD resolution set to 1024x768 xxxx11xx LCD resolution set to 1280x1024 x 000xxxx
56. d the module preferably by the front panel card edges or ejector handles Avoid touching the components and connectors Retain all original packaging at least until the warranty period is over You may need it for shipments or for storage of the product Initial Inspection Although the product is carefully packaged it is still possible that shipping damages may occur Careful inspection of the shipping carton can reveal evidence of damage or rough handling Should you notice that the package is damaged please notify the shipping service and the manufacturer as soon as possible Retain the damaged packing material for inspection After unpacking the product you should inspect it for visible damage that could have occurred during shipping or unpacking If damage is observed usually in the form of bent component leads or loose socketed components contact Fastwel s official distributor from which you have purchased the product for additional instructions Depending on the severity of the damage the product may even need to be returned to the factory for repair DO NOT apply power to the product if it has visible damage Doing so may cause further possibly irreparable damage as well as result in a fire or electric shock hazard CPB902 User Manual 7 2008 Fastwel v 1 5b E Fastwel Lee CPB902 If the product contains socketed components they should be inspected to make sure they are seated fully in their sockets Handling In pe
57. dge of the board see Figure 4 2 Their pinout conforms to IEEE 802 3 Ethernet specification 4 3 11 Serial Ports The CPB902 is furnished with six serial ports COM1 and COM ports have standard PC AT base addresses The base address of COM3 COM6 group of ports can be changed COMI is routed to J4 IDC10 connector 2 54 mm pitch It has only three lines RXD TXD and GND and is intended for console operation and file exchange To connect this port to a remote PC a null modem cable is needed COMe is a full function RS232 port and is routed to DB9 J3 connector Maximum transfer rate for COM1 and COM2 ports is 115 2 Kb s They are fully compatible with UART 16550 COM3 COM6 ports allow data transmission rates up to 921 6 Kb s and support RS 232 RS 422 RS 485 interfaces The transmission clock frequency and operation modes for these ports are set in BIOS Setup see section 5 5 These four ports are routed to IDC10 on board connectors J5 J7 J9 and J11 correspond to COM3 COM4 COM5 and COM6 respectively IDC10 connector pins numbering is shown on figure below Figure 4 18 IDC10 Pins Numbering e wech o e e e 9 e The following table gives information on COM ports pin assignments for all serial ports and different interfaces Empty cells dashes in cells mean that in the current mode the pins are not used but it is not allowed to connect any signals to them CPB902 User Manual 52 2008 Fastwel Vd
58. e and time First Boot From Selection of disk name to boot from first Choice set A C CDROM F1 Error Wait Enables or disables waiting for pressing of F1 key on error NumLock Allows to control the state of a numeric keypad after boot Enabled NumLock On Disabled NumLock Off Typematic Rate Keyboard autorepeat rate setting in characters per second Typematic Delay Sets typematic delay of the keyboard in seconds or milliseconds Boot Method Operating system boot mode Options Boot Sector for operating systems using boot sector to load Windows CE to load Windows CE image using the internal loader Onboard Flash Disk Enables or disables the onboard flash disk CPB902 User Manual 2008 Fastwel 72 V 1 5b E General Software amp BIOS Fastwel TE CPB902 IDE DRIVE GEOMETRY IDE disk drive geometry selection for Primary Master IDEO Master Primary IDEO Master Slave IDEO Slave and Secondary Master IDE1 Master Compact Flash IDEO Slave Options IDE1 Master Not installed disk drive not connected User Type user selects custom parameters Autoconfig Normal automatic geometry detection without disk parameters translation Autoconfig LBA automatic geometry detection with translation of disk parameters into linear address Autoconfig Large disk parameters translation using Phoenix algorithm CDROM CDROM dr
59. ed Quick Boot Disabled Enables disables shortened testing of some functional units and Enabled peripheral devices Remember Wrong or incorrect settings may lead to abnormal system performance To correct possible errors restart the BIOS Setup program and restore manufacturer s settings by selection of Reset CMOS to factory defaults command in Main menu CPB902 User Manual 74 2008 Fastwel Vd bb E General Software amp BIOS Fastwel T Ji CPB902 5 5 Custom Configuration Custom Configuration menu screen is shown on the following figure Figure 5 4 Custom Configuration Menu Screen System BIOS Setup Custom Configuration C 2005 General Software Inc All rights reserved PS 2 Kbd FBUS FDC LPT RTC COM3 COM6 COM3 COM6 PS 2 Mouse Fi OPTO IRO NAND FLASH FDC Console Input COMI KBD Console Output COMI VGA FDC LPT Pins E FDC PS 2 Mouse Enabled NMI Source Disabled COM3 COM6 Base Address 100h COM3 COM6 Clock MHz E 1 8432 COM3 COM6 IRQ Inversion OFF COM3 Mode RS232 COMA Mode RS232 COM5 Mode RS232 COM6 Mode S RS232 I I I I T I I T I I D lt CR gt lt Tab gt to select or lt PgUp gt lt PgDn gt to modify lt Esc gt to return to main menu Custom Configuration menu items are described in the table below Table 5 4 Custom Configuration Menu Items Console Input COM1 KBD Input via PS 2 keyboard port and COM1 defaul
60. ential or incidental damages originated by the use of this software This document contains information which is property of Fastwel Co Ltd It is not allowed to reproduce it or transmit by any means to translate the document or to convert it to any electronic form in full or in parts without antecedent written approval of Fastwel Co Ltd or one of its officially authorized agents Fastwel and Fastwel logo are trademarks owned by Fastwel Co Ltd Moscow Russian Federation Ethernet is a registered trademark of Xerox Corporation IEEE is a registered trademark of the Institute of Electrical and Electronics Engineers Inc Microsoft is a trademark of the Microsoft corporation In addition this document may include names company logos and trademarks which are registered trademarks and therefore are property of their respective owners Fastwel welcomes suggestions remarks and proposals regarding the form and the content of this Manual CPB902 User Manual 4 O2008 Fastwel Vee dia bb E Fastwel Lee CPB902 Notation Conventions Warning ESD Sensitive Device This symbol draws your attention to the information related to electro static sensitivity of your product and its components To keep product safety and operability it is necessary to handle it with care and follow the ESD safety directions Warning This sign marks warnings about hot surfaces The surface of the heatsink and some components can get very hot during operatio
61. ess Gpace AAA 24 Systeml O ports FPGA ks e eege iesse See saa eege Eege 26 ieren e EE 33 IP MEC MEETS 34 J1 HDD Gonnector PiniQUt uiii nerit eren enr naeh re denen dare E ke ni ae ken 36 J2 Compact Flash Socket Pinot 37 S1 Settings Display Type and Video Mode Selection ooonnoooncccnnnnnncccoccccnacononanannconnncnnnnnan occ n 39 Different Types of TFT STN Panels CONMNECtON ooooccccncccconononnccnnnccnonnnnnnncnnncnonannn eene menn 40 TFT STN Panels Connector J16 PinOut EE 41 LVDS Connector J21 Pinout iiicuc icri eee reote inane TEC SL d Ga EDU ann RD v D M o ka dd 43 P7 D Sub VGA Connector PinOUt ccc eee irr ii nnnm nnne nennen nennen nennen nnne 45 CVMO2 J2 Pin ASSIGNMENTS ee re nn rn nn ee nnn eene nnne n nnns enne nennen nsn nnne 46 GVMO1 J5 Gomiector PINOUT yi oett etie ee me Ra eri en ade od de era reda 51 PS 2 Keyboard Mouse Connector P5 Pinot 51 Serial Ports Pin Assigniments iicet ki ee 53 EPT FDD Jr Connector Pinout Cesana irent SEENEN ENEE REN 56 J17 Connector PINOUT REPE 59 J18 Pinpad PINOUE tea aaa a aaa aa aaa aaa ee ee eee aa eee RR RR RAR R RR RR RR RR ner nan nnnnrrnnrrnnnnennnn 59 J13 Settings Switching Reset IRQ Source mener nennen 62 FBUS Connector J22 Pinout iii ENNEN bk kak ske niin 63 J19 Pins Designation orit ien korr eoo ka Rte on ed vade a og a RR ee dana 63 PC 104 P4 Rows A and B Contacts Desionatton nnnm 65 PC 104 P4 Rows C and D Contacts
62. f CVMO4 and CN1 conector at LQ104V1LG61 LCD panel with 685612 037 cable Attention A It is necessary to observe correct connector orientation when connecting this cable The wire connected to contact 1 is marked by color thermocontractable tube Connect the LCD panel backlight lamps cables to connectors CN2 and CN3 of PS DA0253 03 DC AC converter Supply 5 V and 12 V power voltages to the XP4 connector of CVM04 according to the following table Note AK XP4 power connector type is 22 27 2041 Molex recommended mating connector is 22 01 2045 Molex XP4 Connector Contacts Designation 1 12 V 2 GND 3 GND 4 5 V CPB902 User Manual 48 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 CVMO4 is equipped with components enabling following additional functions Backlight Lamps Brightness Control An adjustable resistor R2 is installed on the module R2 allows to adjust the brightness of LCD backlight lamps through changing its resistance according to PS DA0253 03 DC AC converter specification R2 resistance is adjusted in a range from 0 to 10 kiloohm Maximum brightness is achieved at 0 ohm minimum brightness at 10 kohm The resistance is increased by turning adjustment screw clockwise LCD Screen Image Orientation Control It is possible to control LCD screen image orientation using jumpers at XP5 pinboard Figure below shows screen image positions depending on location of the in
63. for BIOS configuration storage Real time clock with Li battery backup PS 2 keyboard mouse port FDD LPT shared header Universal parallel port supports EPP and ECP modes LCD matrix keypad ports FBUS port SM722 graphics controller 5 Video memory 8 MB LCD TFT or DSTN panels support resolution up to 1280x1024 Analog RGB display support DualApp and DualView modes support under Windows 95 98 NT only s LVDS interface Optoisolated remote Reset IRQ input Layouts of main CPB902 components and connectors on top and bottom sides are presented in Figures 4 2 and 4 3 respectively CPB902 User Manual 22 2008 Fastwel Veal bb E Functional Description Fastwel T zi CPB902 Figure 4 2 Top Side Connectors and Main Components Layout PS 2 Mouse KBD COM1 COM2 VGA Ethernet USB Seegen P5 m P3 F P1 P2 J4 FDD LPT J15 8 1 ES a Reset J20 1 4 1 Sw1 Button o ue 73 1118 U7 U9 D20 D11 D10 D9 e ag 12V GND GND 5V Reset 1 Selector Video U52 e e e e PC 104 e 1 1 e O U18 USB y pa L COM3 ES m p 6 COMA J19 2 L15 oi G 1 1 2 eo Battery J18 SS uo Jt U25 b U26 n vs Z us cooo S COM5 p r COM6 pese R154 a ez Speaker 1 21 2 S SE p L A Jel Je J21 m m ES 2 lat n COM3 COM6 Terminators FBUS TFT LCD LCD and Optoisolated in RS422 485 Modes J
64. h USER LED2 off outp gpio base 6 inp gpio base 6 amp 0xDF else Switch USER LED2 on outp gpio base 6 inp gpio base 6 Ox20 More details on GPIO unit operation can be found in STPC Vega Programming manual CPB902 User Manual 83 2008 Fastwel Vd bb E Fastwel Lee General Software BIOS CPB902 5 11 3 SuperlO Watchdog Timer Operation The SuperlO FDC37B787 internal WDT has software adjustable programmable timeout period from 1 second up to 255 minutes Upon expiry of the timeout the RESET signal is issued by the WDT unless it is reset by the user program Sample program code fragments setting and clearing the WDT are given below SuperIO configuration register setting function void write cfg reg BYTE log dev BYTE reg ind BYTI asm dx 0x370 al 0x55 mov mov cli out dx al sti dx 0x370 al 0x07 dx al dx 0x371 al log dev dx al dx 0x370 al reg ind dx al dx 0x371 al value dx al dx 0x370 ax OxAA dx al mov mov out mov mov out mov mov out mov mov out mov mov out Watchdog timer setup WDT timeout variable wdt_timeout 10 WDT timeout in seconds write cfg reg 0x08 WDT UNITS 0x80 Set GP12 line to work with the WDT write cfg reg 0x08 GP12 0x0A Reset the WDT do in a user program Any actions E value Write the timeout value to WDT VAL configuration register write
65. hall have no liability for direct or consequential damages of any kind arising out of sale delay in delivery installation or use of its products If a product should fail through Fastwel s fault during the warranty period it will be repaired free of charge For out of warranty repairs the customer will be invoiced for repair charges at current standard labor and materials rates Warranty period for Fastwel products is 36 months since the date of purchase The warranty set forth above does not extend to and shall not apply to 1 Products including software which have been repaired or altered by other than Fastwel personnel unless Buyer has properly altered or repaired the products in accordance with procedures previously approved in writing by Fastwel 2 Products which have been subject to power supply reversal misuse neglect accident or improper installation Returning a product for repair 1 Apply to Fastwel company or to any of the Fastwel s official representatives for the Product Return Authorization 2 X Attach a failure inspection report with a product to be returned in the form accepted by customer with a description of the failure circumstances and symptoms 3 Carefully package the product in the antistatic bag in which the product had been supplied Failure to package in antistatic material will VOID all warranties Then package the product in a safe container for shipping 4 The customer pays for shippi
66. he help of fwflash exe program For example fwflash exe b902v1 3 bin where b902v1 3 bin BIOS image binary file name BIOS can be upgraded via RS232 COM serial port in console operation mode To do so connect COM ports of the module and of a remote PC enable Start RS232 Manufacturing Link mode in BIOS Setup and run fwflash exe utility at a remote PC with the following parameters fwflash exe b902v1_3 bin 1 where b902v1 3 bin BIOS image binary file name 1 PC COM port number COM1 CPB902 User Manual 35 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 4 3 4 UIDE Interface J1 connector of CPB902 Figure 4 2 allows connection of two UDMA 66 compatible devices master and slave to the primary IDE channel J1 connector is a 44 pin 2 mm pitch header Its pinout is shown in the following table Table 4 6 J1 HDD Connector Pinout 1 RESET 12 DD12 23 IOW 34 2 GND 13 DD2 24 GND 35 DAO 3 DD7 14 DD13 25 IOR 36 DA2 4 DD8 15 DD1 26 GND 37 CS1 5 DD6 16 DD14 27 IOCHRDY 38 CS3 6 DD9 17 DDO 28 GND 39 DASP 7 DD5 18 DD15 29 DACK 40 GND 8 DD10 19 GND 30 GND 41 45V 9 DD4 20 31 IRQ 42 5V 10 DD11 21 DRQ 32 CS16 43 GND 11 DD3 22 GND 33 DA1 44 The ACS00010 FC44 cable allows direct connection of a 2 5 HDD to the J1 connector Other IDE devices 3 5 HDD CD ROM having 40 contact 2 5 mm pitch connector can be connected to CPB902 via the
67. in the correctly oriented card and gently press to engage the contacts completely To disengage the card use the ejector button Note A Connection of the CompactFlash cards while the power is on may damage your system CompactFlash socket description can be found in Subsection 4 3 5 3 2 2 USB Devices Connection The CPB902 can accept Plug8Play connection of USB 1 1 computer peripheral devices printers keyboards mice etc All USB devices may be connected or disconnected while the host power is on CPB902 User Manual 19 2008 Fastwel Vd bb E External Connections Fastwel dy CPB902 3 2 3 Battery Replacement The lithium battery must be replaced with Panasonic BR2032 or a battery with similar characteristics The expected life of a 190 mAh battery Panasonic BR2032 is about 5 years However this typical value may vary because battery life depends on the operating temperature and the shutdown time of the system in which the battery is installed Note Itis recommended to replace the battery after approximately 4 years to be sure it is operational Replacing the battery make sure the polarity is correct up Dispose of used batteries according to the local regulations f Important 3 3 Software Installation The installation of the peripheral drivers is described in the accompanying information files For details on installation of an operating system please refer to the relevant software documentation
68. ion of a TFT Panel with 1 Pixel per FPSCLK Period 43 Figure 4 9 Connection of a TFT Panel with 2 Pixels per FPSCLK Period 43 Figure 4 10 LVDS Interface for TFT LCD Panel 44 Figure 4 11 PanelLink Interface for TFT LCD Panel 44 Figure 4 12 PanelLink Interface for DSTN LCD Panel eee rere intr i eee ee nemen nennen nennen 45 Figure 4 13 Sharp LQ104V1DG51 TFT Panel Connection and Setup seeesm een 46 Figure 4 14 CV04 Unit AppearancCe EEN 47 Figure 4 15 CVMO4 Connections Diagram nennen nnne nnne nnnm tees nennen nnne nnne nnn 48 Figure 4 16 LCD Screen Image Orientation Control eer nn rr me eee nnne 49 Figure 4 17 CVMO1 Expansion Module 50 Figure 4 18 AENA 52 Figure 4 19 COM3 COM6 Ports Jumpers ANNE ENNEN EEN 53 Figure 4 20 Point to Point Connection of Two Modules in RS 422 Mode 54 Figure 4 21 Connection of Several Devices in RS 485 Mode 54 Figure 4 22 COM3 COM6 Ports Simplified Interface Circuit Diagram seen 55 Figure 4 23 POWERTIP PC1604 A Alphanumeric LCD Connection Diagoram irlr eerrrreeeeeeoooororassasasoooooooossnanan 58 Figure 4 24 POWERTIP PG12864 A Graphics LCD Connection Diagram nn 58 Figure 4 25 J18 Pinpad Connection Circuit Diagram ssesssseeeeennne eene nennen nnn Figure 4 26 Discrete I O Channel Block Diagram nme nemen nennen nnne nnn Figure 4 27 Discrete I O Unit Ports Binding Diagram Figure 4 28 Reset Source Selection and Optoiso
69. ions as an adapter module between LVDS connector of processor module and LCD panel Moreover CVMO4 provides a number of additional functions including control of DC AC power converter Power Systems PS DA0253 03 supplying power voltage for LCD panels backlights The module is supplied to customer in a set including the following components CVO4 unit 469535 056 1 Cable 685611 092 1 Cable 685612 015 02 1 Cable 685612 037 1 User Manual 1 In Russian notation the codes may be preceded by DATIM letters denoting internal specification CV04 unit s appearance with mounting dimensions and key components layout is presented below Figure 4 14 CV04 Unit Appearance XP2 XP3 190 00000000 o 1 23 200000000000 2 2 openings oooooooo og 18 0000000000 CPB902 User Manual 47 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 Figure 4 15 CVMO4 Connections Diagram FAPI 685611 092 Cable L 70 mm e FAPI 685612 037 Cable LQ104V1LG61 CPB90204 CN3 CN2 FAPI 68561 2 015 02 Cable DC AC PS DA0253 03 Power Supply CN1 5 V 12 V d To connect LQ104V1LG61 LCD panel to CPB90204 processor module follow the procedure below Table 2 1 Connect J21 of CPB90204 and XP1 of CVMO4 with 68561 1 092 cable Connect XP3 of CVMO4 and CN1 of PS DA0253 03 DC AC converter with 685612 015 02 cable Connect XP2 o
70. ity a Preferably unpack or pack this product only at EOS ESD safe workplaces Otherwise it is important to be electrically discharged before touching the product This can be done by touching a metal part of your system case with your hand or tool It is particularly important to observe anti static precautions when setting jumpers or replacing components El If the product contains batteries for RTC or memory back up ensure that the module is not placed on conductive surfaces including anti static mats or sponges This can cause short circuit and result in damage to the battery and other components D Store this product in its protective packaging while it is not used for operational purposes Unpacking The product is carefully packed in an antistatic bag and in a carton box to protect it against possible damage and harmful influence during shipping Unpack the product indoors only at a temperature not less than 15 C and relative humidity not more than 70 Please note that if the product was exposed to the temperatures below 0 C for a long time it is necessary to keep it at normal conditions for at least 24 hours before unpacking Do not keep the product close to a heat Source Following ESD precautions carefully take the product out of the shipping carton box Proper handling of the product is critical to ensure correct operation and long term reliability When unpacking the product and whenever handling it thereafter be sure to hol
71. ive installed 1 Disk Disk C Selection of a disk drive to assign C Choice set IDE Master IDE Slave On Board Flash Disk Floppy Disk Drive FDD Floppy 0 type selection Options Not Installed FDD is not connected 360 KB 5 25 1 2 MB 5 25 720 KB 3 5 1 44 MB 3 5 2 88 MB 3 5 Memory Indication of Base and Extended memory size available for applications Base Ext CPB902 User Manual 73 2008 Fastwel Vd bb E General Software amp BIOS Fastwel TE CPB902 5 4 Features Configuration Features Configuration menu screen is shown on the following figure Figure 5 3 Features Configuration Menu Screen System BIOS Setup Features Configuration C 2005 General Software Inc All rights reserved Advanced Power Management Disabled Quik Boot Enabled Primary IDE UDMA Disabled Secondary IDI Disabled lt CR gt lt Tab gt to select or lt PgUp gt lt PgDn gt to modify lt Esc gt to return to main menu Features Configuration menu items are described in the table below Table 5 3 Features Configuration Menu Items Advanced Power Management Disabled Switches Advanced power management modes This menu item is reserved for future versions of the module Primary IDE UDMA Disabled Enables disables Ultra DMA mode for Primary IDE channel Enabled Secondary IDE UDMA Disabled Enables disables Ultra DMA mode for Secondary IDE channel Enabl
72. lated Input Circuit Diagram teeta 62 Figure 4 29 J19 Circuit Diagram 00 0 nn once ran eran nnne nnne nnne 63 Figure 4 30 S POATO4 PA Contacts LayOUt cetero etd et m rax ec Da ere ED OR dert pte e E seet 64 Figure 4 31 CPB902 Top Side Overall and Mounting Dimenslons enn 68 Figure 4 32 CPB902 Bottom Side Overall and Mounting DIMENSIONS nn 68 Figure 5 1 Main Menu Screen Image EEN 71 Figure 5 2 Basic CMOS Configuration Screen IMage mener nnn 72 Figure 5 3 Features Configuration Menu Screen emere nennen nennen nennen nnn nnne 74 Figure 5 4 Custom Configuration Menu Green 75 Figure 5 5 Plug n Play Configuration Menu Screen Image 78 Figure 5 6 Shadow Configuration Menu Screen Image eene 79 All information in this document is provided for reference only with no warranty of its suitability for any specific purpose This information has been thoroughly checked and is believed to be entirely reliable and consistent with the product that it describes However Fastwel accepts no responsibility for inaccuracies omissions or their consequences as well as liability arising from the use or application of any product or example described in this document Fastwel Co Ltd reserves the right to change modify and improve this document or the products described in it at Fastwel s discretion without further notice Software described in this document is provided on an as is basis without warranty Fastwel assumes no liability for consequ
73. m and user I O ports FPGA 370h 377h System I O ports SIO 378h 37Bh LPT1 default range 278h address is allowed unless allocated for COM3 COM6 3FOh 3F7h FDD controller 3F8h 3FFh COM1 CF8h CFFh Host PCI controller configuration registers CPB902 User Manual 24 2008 Fastwel v 2b E Functional Description Fastwel TE CPB902 Base addresses of COM3 COM6 ports can be changed by bits 5 6 of COM ID identification register the ID register address itself changes along with it By default the LPT port is set to ECP mode and has base address 378h System UO ports allocated in OOOh OFFh range have standard IBM PC addressing Non standard ports within 300h 31Fh range are used for module resource management FPGA ports description is presented in the table below Attention FPGA ports description is intended for use by system programmers Application programs should not address these ports CPB902 User Manual 25 2008 Fastwel Vd bb E Functional Description Fastwel TER CPB902 Table 4 3 System UO ports FPGA 0 yes yes 1 yes yes 2 yes yes 3 yes yes 200 0 NAND flash read write data write address write commands 4 yes yes 1 5 yes yes n 6 yes yes 7 yes yes 0 yes no 0 8 1 yes no 0 2 yes no
74. n Take due care when handling avoid touching hot surfaces Caution Electric Shock This symbol warns about danger of electrical shock 60 V when touching products or parts of them Failure to observe the indicated precautions and directions may expose your life to danger and may lead to damage to your product Warning Information marked by this symbol is essential for human and equipment safety Read this information attentively be watchful Note This symbol and title marks important information to be read attentively for your own benefit SE gt b gt CPB902 User Manual 5 2008 Fastwel Vedia bb E Fastwel Lee CPB902 General Safety Precautions This product was developed for fault free operation Its design provides conformance to all related safety requirements However the life of this product can be seriously shortened by improper handling and incorrect operation That is why it is necessary to follow general safety and operational instructions below A A A Warning All operations on this device must be carried out by sufficiently skilled personnel only Warning When handling this product special care must be taken not to hit the heatsink if installed against another rigid object Also be careful not to drop the product since this may cause damage to the heatsink CPU or other sensitive components as well Please keep in mind that any physical damage to this product is not co
75. nel status 310 620 no 7 1 Matrix keypad column 1 scanning in progress 1 yes 0 Write Set status of the KEY R1 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY R1 discrete I O channel status 310 6 0 no 1 Matrix keypad column 2 scanning in progress 2 yes 0 Write Set status of the KEY R2 discrete I O channel trigger 310 6 1 yes gray indicates trigger status after reset 1 Read KEY_R2 discrete I O channel status 310 6 0 no 1 Matrix keypad column 3 scanning in progress 3 yes 0 Write Set status of the KEY R3 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY R3 discrete I O channel status 310 620 no 7 1 Matrix keypad column 4 scanning in progress 315 4 yes 0 Write Set status of the KEY R4 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY R4 discrete I O channel status 310 6 0 no 1 Matrix keypad column 5 scanning in progress 5 yes 0 Write Set status of the KEY R5 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY R5 discrete I O channel status 310 6 0 no 7 6 yes 0 Write Set status of the KEY CO discrete I O channel trigger 310 621 yes 1 gray indicates trigger status after reset Read KEY CO discrete I O channel status Read Matrix keypad interrupt indicator 1 Unprocessed interrupt exists cleared after read T 0 No interr
76. nes the data transfer direction it switches the channel between receive and transmit modes This signal status can only be read When EN COM O HF 485 allows to select RS 485 or RS 422 mode HF 485 1 corresponds to RS 485 mode HF 485 0 to RS 422 CPB902 User Manual 54 2008 Fastwel Vd Bb E Functional Description Fastwel TE CPB902 Figure 4 22 COM3 COM6 Ports Simplified Interface Circuit Diagram IDC10 Connectors RTX RS 232 J5 7 9 J11 1 5CD TX D Other RS 232 Signals TTL DSR TX D RXD TXD COM TTL P TXD RXD MUX 2 to 1 EN_COM ran Port Ox31D bit N 3 TXEN 485 Terminators Port 0x31C bit N 3 HF 485 Port 0x31C bit N 1 RTX RS 422 485 N COM port number 3 4 5 6 In RS 232 mode the terminators should not be enabled In RS 485 or RS 422 modes the jumpers should be set on appropriate pinpads J6 COM3 J8 COMA J10 COM5 and J12 COMO In RS 485 mode jumper 1 2 should be set on terminating modules in RS 422 point to point mode jumper 3 4 should be set Switching to RS 422 RS 485 modes is done in BIOS Setup For COM1 COM6 ports base addresses please refer to Tables 4 2 and 4 3 4 3 12 FDD LPT Port The LPT1 port of CPB902 supports EPP and ECP operation modes ECP is the default mode LPT is routed to J1
77. ng the product to Fastwel or to an official Fastwel representative or dealer CPB902 User Manual 9 2008 Fastwel Vedia bb E Introduction Fastwel TE CPB902 1 Introduction This document presents general information on CPB902 processor module the details of its proper and safe installation configuration and operation The issues of PC 104 modules and external devices connection are also considered 1 1 Module Introduction CPB902 processor module is a 3 5 highly integrated single board computer with full PC functionality It is designed for applications where high performance and low power consumption are required CPB902 incorporates numerous UO ports and interfaces serial ports IDE interface CompactFlash socket printer FDD connector digital I O port combined with LCD monitor matrix keypad interface two USB ports PS 2 mouse keyboard connector video port two Fast Ethernet ports and PC 104 interface The module is supplied with installed FDOS 6 22 operating system and is compatible with Windows 2000 Windows XPe Windows CE5 Linux QNX6 3 RTOS32 and MSDOS operating Systems Figure 1 1 CPB902 Module Appearance The appearance may vary for different versions of the module CPB902 User Manual 10 2008 Fastwel v 1 5b E Introduction Fastwel TE CPB902 1 2 CPB902 Versions At the present time the CPB902 module is manufactured in two basic versions differing in SDRAM memory size and SVGA capabilit
78. nnn 60 4 3 13 3 Using Keyboard Interface by Discrete I O Un 60 4 3 14 Optoisolated Hesetilnterupt AAA 62 4 3 15 FBUS Contneclof ceto ptc rete ott pa tk pan e uteretur tached asa ter basket kanape 63 4 3 16 RTC and Serial PRAM iconos ere E AES EEEE TEE ETNEN REEE 63 4 3 17 J19 Configuration Jumpers 63 4 3 18 REEL NS 64 4 3 19 Diagnostic LEDS DE 67 4 3 20 Power Supply GONNECHON ik i kw e eii esent a eorr dn Du XR Ha Fe Du Lu eu HD D 67 4 4 Overall and Mounting Dimensions nennen nne nn nennen ennt nnne nne nnne 68 4 4 1 Mounting on a Panel 69 5 General Software BIOS eeseeeeeeeeeeeeeeeiieeeeeeeee nennen nnne nennt tnn nasa n nass nennen anna nass annnm 70 5 1 BIOS Setup Program Introducnon nennen enne 70 5 2 CIIM 70 5 3 Basic CMOS configuration vwe ok n cedet add 72 5 4 Features Configuration EEN 74 5 5 Qustom Be ele le CC le EE 75 5 6 PnP ge Tute Le RE 78 5 7 Shadow Configuration 0 ce nnn nnnnnmrns nene deen rsen nent nennen seen nnn 79 5 8 Manufacturing Link Mode menm nene in nnne seen nn nnnm nier ennt nennen rsen nnn 80 5 9 The Rest Main Menu Commande A 81 5 9 1 Reset CMOS to last known values EEN 81 5 9 2 Reset CMOS to Factory Detauhts ANNE 81 5 9 3 Write to CMOS and EN echten ENEE d b a blek dp Lbs Dp pakab an tv Leti bu 81 5 9 4 Exit without chariging CMOS ti 4 ki vis tt ka ei swa dak idi ed kte ile 81 5 10 Reset CMOS to Factory Defaults from a Remote PDC 82 5
79. rforming all necessary installation and application operations please follow only the instructions supplied by the present manual In order to keep Fastwel s warranty you must not change or modify this product in any way other than specifically approved by Faswel or described in this manual Technical characteristics of the systems in which this product is installed such as operating temperature ranges and power supply parameters should conform to the requirements stated by this document Retain all the original packaging you will need it to pack the product for shipping in warranty cases or for safe storage Please pack the product for transportation in the way it was packed by the supplier When handling the product please remember that the module its components and connectors require delicate care Always keep in mind the ESD sensitivity of the product CPB902 User Manual 8 2008 Fastwel Vedia bb E Fastwel Lee CPB902 Three Year Warranty Fastwel Co Ltd Fastwel warrants that its standard hardware products will be free from defects in materials and workmanship under normal use and service for the currently established warranty period Fastwel s only responsibility under this warranty is at its option to replace or repair any defective component part of such products free of charge Fastwel neither assumes nor authorizes any other liability in connection with the sale installation or use of its products Fastwel s
80. rial ports Six serial ports High speed NS160550 compatible COM1 RS232 3 wires null modem up to 115 Kb s COM2 RS232 complete up to 115 Kb s COM3 COM6 RS232 422 485 up to 921 6 Kb s FIFO buffer for each channel 64 bytes USB Two USB 1 1 channels Ethernet Two Fast Ethernet ports 10 100 Mb s VGA controller SM722 Video memory 8 MB LCD TFT or DSTN panels support resolution up to 1280x1024 E Analog display support DualApp and DualView modes support B LVDS interface Watchdog timers Two Watchdog timers with LED indication Safety ta System configuration settings stored in CMOS SFRAM Saving essential user data in SFRAM in case of power failure RTC p On board real time clock with Li battery v 1 5b E CPB902 User Manual 13 2008 Fastwel Technical Specifications Fastwel TE CPB902 B PS 2 5 PS 2 keyboard and mouse interface H FDD Floppy disk interface H Parallel port a SPP ECP EPP compatible Header shared with FDD controller LCD Display and Matrix keyboard ports Connector for devices with FBUS interface Optoisolated Reset IRQ input PC 104 Expansion Header Software Support ta General Software BIOS e DOS QNX 6 3x RTOS32 Windows CES Windows XPe Linux Windows 2000 2 2 Power Requirements The module is powered by an external DC power source providing the following characteristics W Voltage 5 V from 4 75 V to 5 25 V Bi Consumption current without external devices
81. s 100h ID register address 142h 6 5 s es 01 UART base address 180h ID register address 1C2h y y 10 UART base address 200h ID register address 242h 11 UART base address 280h ID register address 2C2h 0 Direct interrupt lines status output d yon yon 1 Inverted interrupt lines status output Notes Gray color marks values after reset The ports marked with are not available for read write after hardware reset see port 31E Table 4 3 CPB902 User Manual 31 2008 Fastwel Veal bb E Functional Description Fastwel TE CPB902 4 2 3 Interrupt settings By default interrupts are generated by the devices belonging to the CPB902 module The interrupt source multiplexing diagram is presented in Figure 4 4 Table 4 4 contains interrupt settings Among the alternative interrupt generating devices are expansion modules on ISA system bus PC 104 connector optoisolated Reset input NAND flash memory and keyboard Figure 4 4 Interrupt Source Multiplexing Diagram IRQ Selector IRQ MUX SIO IRQ1 SIOKey board Kbd IRQ SIO IRQ4 SIOCom1 IRQ_MUX1 O IRQ2 Cascade P 0 US I IRQ3 Int Com2 L IRO MUX L IRQ4 COM1 IRQ_MUX3 PC104 IRQ5 IRQ5 LPT2 P SIO IRQ6 PC104 IRQ6 IRQ6 Floppy SIO IRQ5 PC104 IRQ7 IRQ7 LPT1 SIO IRQ8 7 PC104_IRQ4 IRQ8 RTC UART IRQ Z PC104 IRQ9 kk A IRQS IRQ10 PC104 IRQ11 LI SIO IRQ12 SIOMouse PC104 IRQ12 IRQ12 Mouse OptoIRQ IRQ13 MCo PC104 IRQ14 IRQ14 HDD1 FL_RB Primary
82. s up when the processor was reset on WDT timeout expiry It should not lit during normal operation LED1 and LED2 user LEDs are linked directly with GPIO5 and GPIO6 microprocessor ports They are switched on and off by a BIOS procedure which can be invoked from user application programs The description of the procedure can be found in subsection 5 11 2 4 3 20 Power Supply Connector The power is supplied to CPB902 via J20 connector The main power voltage of the processor module is 5V 12 V is supplied via J20 connector but is not used in CPB902 It is routed to P4 PC 104 connector The PC 104 connector contacts corresponding to 5 V and 12 V voltages are not connected to the board circuitry The following table gives J20 contacts assignments Table 4 26 J20 Power Connector Pinout 1 412 V 2 GND 3 GND 4 5 V CPB902 User Manual 67 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 4 Overall and Mounting Dimensions Figure 4 31 CPB902 Top Side Overall and Mounting Dimensions Figure 4 32 CPB902 Bottom Side Overall and Mounting Dimensions A Heat conducting Plate View M3 Two openings CPB902 User Manual 68 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 4 1 Mounting on a Panel It is possible to provide additional heat removal when CPB902 is installed on a metallic mounting panel using 9 mm high stud spacers For better hea
83. stalled jumpers Figure 4 16 LCD Screen Image Orientation Control 60 5 6D apd 49 lbs 439 gp3sa 2 a a 1 2 o Q 1 CPB902 User Manual 49 2008 Fastwel Vd bb E Functional Description Fastwel TE CPB902 4 3 7 4 CVMO01 Expansion Module CVMO01 469535 004 is an expansion module which allows to connect TFT STN panels via 40 pin 2 54 mm pitch J5 connector or additional RGB monitor with standard VGA interface via P1 D Sub connector CVMO1 has a DAC which converts digital input into analog VGA signal This expansion module is connected to CPB902 J16 header with 40 thread cable The following figure presents location of CVMO1 connectors and other components Figure 4 17 CVMO1 Expansion Module TFT Panels Connection Pus hus ya Discrete Input The CVMO1 P1 VGA connector has the same pin assignments as CPB902 P7 connector see P7 Pinout Table in subsection 4 3 7 1 The pinout of CVMO1 J5 connector is given in the table below CVMO1 provides possibility to adjust the display driver power voltage VEEP with R5 potentiometer and to set the digital interface power voltage with J2 J4 jumpers Closing J3 and J4 sets VDDP 3 3 V closing J2 and J3 sets VDDP 5 V CPB902 User Manual 50 2008 Fastwel Vd bb E Functional Description Fastwel TES CPB902 Table 4
84. t Terminal setting should be 115200 n 8 1 COM Input via COM1 KBD Input via PS 2 keyboard port Console Output COM1 VGA Output to COM1 and video controller default Transmission parameters 115200 n 8 1 COM 1 Output to COM1 VGA Output to video controller FDC LPT Pins FDC J15 connector device selection LPT When Disabled is selected the LPT and FDD address ranges a can be used by other interface devices Disabled PS 2 Mouse Enabled PS 2 mouse support Disabled CPB902 User Manual 75 2008 Fastwel Vd bb E General Software amp BIOS Fastwel TS CPB902 NMI Source Disabled If enabled connects the PFO signal to NMI Enabled PFO Power Fail Output signal is issued by a supervisor if power voltage becomes lower than nominal value CON3 COM6 100H COMS COMG ports base address selection Base Address 180H 200H 280H COM3 COM6 1 8432 MHz COM3 COM6 ports frequency selection Clock MHz 14 7456 MHz When frequency of 14 7456 is selected the exchange rate is eight times as much compared to standard one CON3 COM6 Disabled IRQ request lines bits inversion in interrupts ID register IRQ Inversion Enabled The inversion may be needed to provide compatibility with multi port card drivers COM3 Mode RS232 COMS COM6G ports operation mode selection COM4 Mode RS422 COM5 Mode RS485 COM6 Mode IRQ1 Interrupt source PS 2 Kbd PS 2 keyboard Matrix Kbd Matrix keyp
85. t transfer results use thermal paste or heat conducting pad In case the additional heat dissipation is not needed the stud spacers height should be not less than 10 mm To install CPB902 on a panel it is recommended to use the CC902 mounting card cage It provides mechanical protection for CPB902 and its components as well as easy accommodation of a 2 5 HDD and PS902 power converter CPB902 User Manual 69 2008 Fastwel Vd bb E General Software amp BIOS Fastwel T CPB902 5 General Software BIOS The General Software BIOS in CPB902 is an adapted version of a standard BIOS for IBM PC AT compatible personal computers equipped with Intel x86 and compatible processors BIOS provides low level support for the central processing memory and I O system units The last section of this chapter gives instructions on usage of extended BIOS functions 5 1 BIOS Setup Program Introduction With the BIOS Setup program you can modify BIOS settings and control special features of the module The Setup program offers a convenient menu interface to modify basic system configuration settings and switching between the subsystems operation modes These settings are stored in a dedicated battery backed memory CMOS RAM that keeps the information when the power is switched off 5 2 Main Menu To start the BIOS Setup program switch on the power or restart the system By default the startup screen looks like this General Software Embedde
86. tarting to work with CPB902 it is necessary to close the initially opened 1 2 jumper of J19 switch to enable the battery of the RTC for both versions of the module See subsection 4 3 17 for details For CPB90204 version with graphics controller a console remote PC connected via a null modem cable to J4 and or VGA monitor connected to P7 can be used as a display unit A keyboard and a mouse are connected via a Y cable to P5 For CPB90205 version without graphics controller a remote PC console operation connected via a null modem cable and FCD9F adapter to J4 connector can be used as a display unit Figure 3 2 illustrates the cables connection PS 2 keyboard is connected directly to P5 connector Y cable is not supplied with this version of the module CPB902 User Manual 18 2008 Fastwel Vd bb E External Connections Fastwel TEn CPB902 Figure 3 2 Cables 3 and 4 Fig 3 1 Connection for Console Operation PCCOM port CPB902ConnectorJ4 DB9 IDC10 oon D Null ModemCable The Hyperterminal program running on the PC to support console operation should have the following settings Transfer rate 115200 bit s Data bits 8 Stop bits 1 Parity check Off As the module is switched on and BIOS is loaded the screen displays information described in Section 5 2 3 2 1 CompactFlash Cards Installation CompactFlash socket of CPB902 J2 supports any 3 3 V or 5 V CompactFlash ATA type I II cards Carefully slide
87. upts 910 650 yes Write Controls matrix keypad interrupt generation KBD_IRQ 7 yes 1 1 Interrupts enabled 0 Interrupts disabled 0 Write Set status of the KEY C1 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY C1 discrete I O channel status CPB902 User Manual 28 2008 Fastwel Vd bb E Functional Description Fastwel T CPB902 S 0 Matrix keypad row 0 0 No key pressed SE no 1 1 Key pressed 0 yes 0 Write Set status of the KEY C2 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY C2 discrete I O channel status B 0 Matrix keypad row 1 0 No key pressed ak ie Ge 1 1 Key pressed 1 yes 0 Write Set status of the KEY C3 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY C3 discrete I O channel status E 0 Matrix keypad row 2 0 No key pressed dis iE 1 1 Key pressed 2 yes 0 Write Set status of the KEY C4 discrete I O channel trigger 310 6 1 yes 1 gray indicates trigger status after reset Read KEY C4 discrete I O channel status S 0 Matrix keypad row 3 0 No key pressed SE Ge 1 1 Key pressed 3 yes 0 Write Set status of the
88. ure 4 8 FPVDDEN J16 Figure 4 9 J16 FDATA 23 0 VBIASEN FPSCLK FPVDDEN VBIASEN FPSCLK FDATA panel power control circuitry panel power control circuitry Connection of a TFT Panel with 1 Pixel per FPSCLK Period Connection of a TFT Panel with 2 Pixels per FPSCLK Period 1 pixel clock TFT VDD VEE FPEN ENAB HSYNC VSYNC CK RGB 9 12 18 24 TFT Panel 2 pixels clock VDD VEE FPEN ENAB HSYNC VSYNC CK RGB 12 18 A first pixel RGB 12 18 B second pixel LVDS Low Voltage Differential Signaling interface is also supported The module can accept direct connection of LVDS or PanelLink devices with transmitter receiver chips For example LVDS support is provided by National Semiconductor DS90C383 4 3 3 V 65 MHz or Texas Instruments SN75LVDS83 2 3 3 V 65 MHz chips Silicon Image Sil100 is a PanelLink chipset Panels with LVDS or PanelLink interfaces are connected via J21 header AMP 5 147377 2 counterpart AMP 111196 2 Table 4 11 below shows pinout of J21 connector Figure 4 10 illustrates 24 bit interface for TFT LVDS panels Figures 4 11 and 4 12 show samples of 24 bit interfaces for TFT and DSTN PanelLink panels respectively Table 4 11 LVDS Connector J21 Pinout a 1 VDD EN 11 TxOUT2 H 2 DISPEN 12 TXOUT2 L 3 TXOUTO H 13 GND 4 TxOUTO L 14 GND 5 GND 15 TxOUT3 H 6 GND 16 TXOUT3 L
89. vered under warranty Note This product is guaranteed to operate within the published temperature ranges and relevant conditions However prolonged operation near the maximum temperature is not recommended by Fastwel or by electronic chip manufacturers due to thermal stress related failure mechanisms These mechanisms are common to all silicon devices they can reduce the MTBF of the product by increasing the failure probability Prolonged operation at the lower limits of the temperature ranges has no limitations Caution Electric Shock Before installing this product into a system and before installing other devices on it always ensure that your mains power is switched off Always disconnect external power supply cables during all handling and maintenance operations with this module to avoid serious danger of electrical shock CPB902 User Manual 6 O2008 Fastwel Vedia bb E Fastwel Lee CPB902 Unpacking Inspection and Handling Please read the manual carefully before unpacking the module or mounting the device into your system Keep in mind the following ESD Sensitive Device Electronic modules and their components are sensitive to static electricity Even a non perceptible by human being static discharge can be sufficient to destroy or degrade a component s operation Therefore all handling operations and inspections of this product must be performed with due care in order to keep product integrity and operabil
90. wel assumes no responsibility for any damage resulting from infringement of these rules Warning When handling or operating the module special attention should be paid to the heatsink because it can get very hot during operation Do not touch the heatsink when installing or removing the module Moreover the module should not be placed on any surface or in any kind of package until the module and its heatsink have cooled down to ambient temperature ESD Sensitive Equipment This product comprises electrostatically sensitive components Please follow the ESD safety instructions to ensure module s oparability and reliability L Use grounding equipment if working at an anti static workbench Otherwise discharge yourself and the tools in use before touching the sensitive equipment W X Try to avoid touching contacts leads and components Extra caution should be taken in cold and dry weather CPB902 User Manual 2008 Fastwel Vd bb E 16 External Connections Fastwel T CPB902 3 2 Connection of Peripheral Devices Figure 3 1 External Devices Connection y CD ROM Y cono OptoReset ES Jis Jak T 2 315 PC 104Connector P7 e a gill z LE Sj a Monitor Q O gt LU Hm 3 a g RRE H 8 3 3 4 8 I Jp CompactFlash Console 5 RemotePC S a E LL PS 2Mouse 5 s ux 0 CH E 33 m o BE AA PS 2Key board Ethernet 2 Ethernet 1 On Off Switch Pow er Supply 220 V
91. y Table 1 1 CPB902 Versions CPB90204 467444 001 128 MB 4 CPB90205 467444 002 32 MB 1 3 Delivery Checklist Table 1 2 CPB902 Supplied Set CPB90204 or Processor module 467444 001 or 467444 002 CPB90205 ACS00006 FCD9F 685611 012 02 or 685611 017 adapter cable DB9 IDC10 for connection to COM1 ACS00010 FC44 685611 051 cable for connection of a 2 5 HDD to 44 pin onboard header CDMO2 Adapter module for connection of 3 5 HDD or CD ROM drive 469535 023 Y cable for simultaneous connection of PS 2 keyboard and mouse Not supplied with 1700060202 CPB90205 version Jumpers 382575 2 AMP CD ROM with documentation and service software Antistatic bag and consumer carton box Note A Keep the antistatic bag and the original package at least until the warranty period is over It can be used for future storage or warranty shipments 1 4 Additional Accessories Peripheral devices are attached to the module directly or via additional accessories and cables listed in the following table Table 1 3 CPB902 Additional Accessories ACS0001 1 FCD25F LPT connection cable IDC26 DB25 ACS00002 FC26 60 FDD connection cable IDC26 IDC26 CDMO1 469535 030 FDD connection adapter CVMO1 469535 024 Additional VGA monitor or TFT STN panel adapter module CVM02 469535 031 Sharp LQ104V1DG51 LCD panel connection module CVM04 468364 0

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