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YAMON™ Reference Manual

1. 63 122 4 arch per Slon De 63 12 3 Adaptalonmof PCI s doe cca ache tecto te Ea ncaa uy LBS Oboe 63 12 3 Taho oce eonig ww 63 12 3 2 arch pe COMM dO OB uiuos 63 8 3 uper 63 12 8 4 EET ES 63 Chapter 13 CPU 65 OVER 65 13 2 System Environment SYSENV and ENV modules 66 Appendix lc 69 Appendix B REVISIT PBEOUV 2 42 cu E OUI e XzIY LL DELI FEM ca Esa NE EMEN RE EM dM ERES 71 MIPS YAMON Reference Manual Revision 02 20 4 List of Tables Table 1 1 Supported Core Boards and 8 Table 2 1 YAMON Top Level Directie Ss ESEE 13 Table 2 2 Architecture specific SubdirectorieS esses eene nennen enn 14 Table 2 3 Make allaesultinc aeo tran ed ea eite Da 16 Table 2 4 Make dis Resulting Piles iit err teet MES 16 Table 2 5 REVISION Register 17 Table 2 6 3rd Party REVISION Register EayOUL uiio eter treinta rri oer texte pese patiatur ed aa 17 Table 5 1 Cache
2. bera abdo oder aa 47 8 12 SEAD 3 Booton TIY Seal Olli pretiu pt 47 COMERS ee 48 GO COMMING e rt PS 48 8 31 Apple atom AP 49 8 22 GDB COIT fid Osce 50 8 4 Booting Linux on Multi core Systems Using YAMON ia aaas 51 rcs UR 0 53 9 15 OVENI OW i IE D ME DART 53 9 2 SUPPO re E 53 Ja Directory SG 53 54 2 5 92 64 54 niens nadie IMEEM VI MEI M 54 Sus AND WINE CO 55 9 0 Howto Extract the deii sa 55 O19 GPL MESE YAMON Build E T 56 Chapter 10 System Header 57 11 59 Chapter 12 PCI Configuration PCI Module 61 121 0 22 ETE 61 122 Adaptation or pol DR Of 61 2 61 12 2 2 a rchi pel adest eren rre eb aaa mode T 62 61010 a
3. Modules INT32 IO open UINT32 major UINT32 minor void p param INT32 IO close UINT32 major UINT32 minor void p param INT32 IO read UINT32 major UINT32 minor void p param INT32 IO write UINT32 major UINT32 minor void p param INT32 IO ctrl UINT32 major UINT32 minor void p param IN major device number IN minor device number INOUT device parameter block IN major device number IN minor device number INOUT device parameter block IN major device number IN minor device number INOUT device parameter block IN major device number IN minor device number INOUT device parameter block IN major device number IN minor device number INOUT device parameter block A specific driver may choose to implement a subset of the six generic services fitting the required services of that par ticular driver Calling a service that is not provided is handled by the IO module and an error code is returned 23 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 3 3 Driver API IO Module MIPS YAMON Reference Manual Revision 02 20 24 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 4 Error Handling YAMON provides a mechanism for handling errors in a cons
4. bit e Restore max settings 1 hardware reset settings for D cache e nitialise D cache e Write new D cache settings e Clear we bit e Restore CPO STATUS register Return to caller in KSEGO 13 2 System Environment SYSENV and ENV modules This section describes the implementation of environment variables YAMON maintains system created environment variables and allows the user to create new environment variables as described in 1 There are several layers involved in the implementation of environment variables flash driver drivers flash flash_strata c writes and deletes the flash The SYSENV module implemented sysenv sysenv c manages records consisting of a fixed length header and fixed length data It depends on the flash driver for writing deleting the flash The ENV module implemented in env and arch env directories includes the functions used to create modify delete environment variables They depend on SYSENV for managing the records The flash driver is accessed using the standard mechanism described in Section 3 3 Driver API IO Module SYSENV manages fixed records of 128 bytes accessible through a logical index The first 32 bit word of each record defines a control header leaving 124 bytes for data managed by ENV Each control header contains four 8 bit fields 1 status free in use 2 logical index assigned by ENV used to reference record MIPS YAMON
5. typedef struct char name Name of command t func func Function implementing cmd char syntax Syntax of command char descr Detailed description of cmd t cmd option options Command options UINT32 option count Number of options bool secret if TRUE help will ignore t cmd The cmd structure contains the information required to define a command Table 6 2 describes the fields of the Structure 35 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 6 2 Shell Commands Table 6 2 t_cmd Structure Field Description name Null terminated string containing the name of the command func The function implementing the command syntax Null terminated string defining the syntax of the command Used only by the help command and for displaying the syntax in case of syntax errors descr Null terminated string containing a textual description of the command Used only by the help command options Array of options defined using the option structure Used only by the help command and possibly the command itself option count Number of options Used only by the help command and possibly the command itself secret Boolean variable specifying whether the command should be listed when issuing a help command help a will ignore this variable and list all command
6. Except for a new Reset exception an NMI or an EJTAG exception these handlers will simply halt YAMON loop forever as coded in file arch reset bootvector reset S In the case of a cache error the message CacheEr will be displayed in the LED display if the board supports this 7 2 Reset Exception A Reset exception will cause the YAMON code located at the reset vector location 0xbfc00000 to be invoked This is described in Chapter 11 Initialization on page 59 7 3 NMI Exception An NMI exception will also cause the YAMON code located at the reset vector location Oxbfc00000 to be invoked After some early initialisation code see Chapter 11 Initialization on page 59 YAMON will determine in a plat form specific way whether it was an NMI exception that caused the jump to location Oxbfc00000 If so the text NMT will be displayed in the ASCII display if the platform supports this and a jump is performed to address 0x80000a80 The EXCEP module will install code at 0x80000a80 that performs the following e Write the exception vector offset 0xa80 to a system variable to indicate this is an NMI exception MIPS YAMON Reference Manual Revision 02 20 42 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Exception Handling EXCEP Module e Jump to the function exc_handler which is the function handling most other exceptions as well For further actions see Section 7 7 1 handl
7. This function extracts the multi field from the PCI configuration word Oxc Word holding Bist Header Type Latency Timer Cache Line Size The function treats the GT64120 system controller as a special case because it is actually a multi function device and we only use function 0 63 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 12 3 Adaptation of pci_core c MIPS YAMON Reference Manual Revision 02 20 64 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 13 CPU Reconfiguration 13 1 This chapter describes YAMON s support for reconfiguration of the CPU Overview Some implementations of the MIPS families of CPUs allow configuration of the following parameters e Cache line size may be set to 0 which in effect causes corresponding cache I or D cache to be disabled e Cache associativity may be reduced e Number of cache lines per way may be reduced Ifthe CPU includes a TLB the MMU may be configured as either TLB or Fixed mapping This feature is present for the specific purpose of supporting configuration testing of the core in a lead vehicle and is not supported in any other environment Attempting to use this feature outside of the scope of a lead vehicle is a vio lation of the MIPS Architecture and may cause unpredictable operation of the processor Configuration is performed by writing the following fields e
8. t pci bar bar Requirements for BAR t pci bar req The structure pci bar is defined in arch include pci_api h typedef struct pci bar struct pci bar next Reserved linked list ptr UINT8 pos BAR position UINT8 io 1 gt IO mapped 0 gt Memory mapped UINT32 mask Mask obtained from device UINT8 prefetch Prefetch field obtained from device UINT32 start PCI side start address of range UINT32 size Size of range bool fixed TRUE gt Fixed location BAR t pci bar Only the pos io prefetch start size fields of pci bar must be setup e count Must be set to the number of such requirements for base address registers 12 2 2 arch pci system slot This function determines whether or not the board is located in a Compact PCI system slot MIPS YAMON Reference Manual Revision 02 20 62 Copyright 1999 2011 MIPS Technologies Inc All rights reserved PCI Configuration PCI Module 12 2 3 arch_pci_slot This function determines whether or not a particular Device number corresponds to a PCI slot arch_pci_slot must set the number variable to the number of the PCI slot number is only used for display via the info pci command The Device number depends on which PCI address bit is used for the JDSEL pin of the device Device number 1 maps to ADP11 Device number 2 maps to ADP12 Device number 21 ma
9. Config1 24 22 I cache sets per way e Configi 21 19 I cache line size e Configi 18 16 I cache associativity e Configl1 l15 13 D cache sets per way e Config1 12 10 D cache line size e Config1 9 7 D cache associativity e Config 8 TLB O0 Fixed 1 The above fields of the CONFIG1 and CONFIG registers are by default Read Only However 4K 5K processor imple mentations may use Config 17 bit as Write Control wc bit Setting wc makes the fields Read Write YAMON probes whether the CPU is configurable attempts to set wc bit and attempts to write fields If one or more parameters are configurable the shell command scpu is installed This command may be used to configure the CPU The new setting may be stored in the environment variable cpuconfig scpu and cpuconfig are fur ther described in 1 MIPS YAMON Reference Manual Revision 02 20 65 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 13 2 System Environment SYSENV and ENV modules Reconfiguring cache settings requires all ways of the corresponding cache not just the reduced number of ways to be reinitialized As an example the function sys_cpu_dcache_config in file arch sys cpu sys arch cpu s S reconfig ures the D cache settings as follows e Disable interrupts by clearing TE bit of CPO STATUS register e Flush D cache e Start executing KSEG1 uncached instructions Set Config 17
10. FUGLOFS as 30 Table 6 1 Command Line Recall Editing Commands Fea ee Tere 34 Table 6 2 iu 36 Table 6 3 t emd option 36 Table 8 1 Initial Applicaton 2 a a Es 48 Table 9 1 FPU Emulation ar prx E 54 5 MIPS YAMON Reference Manual Revision 02 20 MIPS YAMON Reference Manual Revision 02 20 Chapter 1 Introduction This document is the Reference Manual for the YAMON ROM Monitor revision 02 20 It includes instructions on how to build a new version of YAMON and describes the structure of the YAMON source code This document sup plements the YAMON User s Manual Reference 1 by including implementation details YAMON Yet Another MONitor is the ROM monitor used to control and monitor program execution on the eval uation and reference boards from MIPS Technologies Inc YAMON includes boot code and traditional monitor func tionality used for loading executing and debugging applications YAMON source code is highly portable to other MIPS based platforms The latest version of YAMON can be downloaded from http www mips com The target audience for this document is software designers who need detailed information on the structure of the YAMON source code typically because they are adapting YAMON to new boards or CPUs or they are copying parts of YAMON for use in other soft
11. MIPS Technologies Inc All rights reserved Chapter 12 PCI Configuration PCI Module This chapter describes YAMON s support for PCI devices 12 1 Introduction The PCI module detects the available PCI devices and verifies that the devices found belong to one of following cat egories Known devices of the board Device located in PCI slot e Device located behind a PCI bridge The PCI module then allocates the PCI memory and I O maps based on the requirements of the devices and config ures the devices accordingly Some of the known devices may have fixed requirements for memory and I O mapping The PCI module has two public functions that may be used for looking up the configuration for a specific device or a specific memory or I O region BAR setup for a device pci lookup device pci lookup bar In order to adapt the PCI module to a specific platform the following files must be adapted as described in the fol lowing sections arch pci platform pci platform c arch pci platform core pci core c 12 2 Adaptation of pci platform c The following subsections describe the functions that must be adapted in pci platform c 12 2 1 pci config This function reads the available memory and I O ranges through SYSCON calls these objects must be adapted to the platform during initialisation of the SYSCON module see Section 3 2 System Configuration SYSCON mod ule The function then sets the following platform specif
12. a hardware FPU but it is fully functional and allows modifications to YAMON to have more flexible licensing options 9 2 Support The emulator supports e MIPS32 FPU instructions e MIPS64 FPU instructions e 32 bit addressing The emulator does NOT support e MIPS 3D ASE FPU instructions e Paried Single FPU instructions e 64 bit addressing 9 3 Directory Structure The directory structure is shown in Table 9 1 MIPS YAMON Reference Manual Revision 02 20 53 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Table 9 1 FPU Emulation Directories fpuemul math Directory Contents fpuemul Main directory Makefile handler S etc fpuemul include Header files fpuemul include asm Header files fpuemul include linux Header files fpuemul include sys Header files IEEE754 functions and header files All the files in puemul math correspond to those in the MIPS Linux distribution 9 4 Cause Codes There are two relevant exception cause codes in the CPO CAUSE register for the FPU emulator 9 4 Cause Codes e 15 FPE floating point exception This exception occurs when the hardware FPU operates on numbers it can t handle When the emulator is enabled for this exception it ensures that denormalized numbers and large num bers in conversions are handled correctly e l coprocessor unusable This exception occurs whenever a COPI instruction is encountered and th
13. isa ISA module ISA address mapping 2 3 Makefile Structure The makefile structure is described in this section All assembler files are expected to be named rather than lt name gt s 1 use capital S since by default the C preprocessor is only run on 5 files All C files are expected to be named name c Making YAMON actually involves making three software images which are then concatenated to a single image The images are e Start up code that determines endianness and passes control to either the little or big endian image e Little endian image e Big endian image There is one main makefile for YAMON It is named bin Makefile Header files used by YAMON are part of the YAMON source code There is only one exception to this which is the lt stdarg h gt header file for passing variable sized argument lists Because this file is tightly dependent on the com piler s calling convention and not an operating system it must be supplied by the toolchain There are several linker scripts involved in making YAMON bin link link xn MIPS YAMON Reference Manual Revision 02 20 14 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Getting Started bin link link el xn bin link link eb xn The first linker script is used for the start up code while the last two contain the layout of the little endian and big endian code Besides these linker scripts there a
14. 0 FPU registers if available 0 Same as YAMON context except that IE bit is cleared thus disabling interrupts cpO status epc Entry point of application obtained from 1 command or as a parameter to go Other CPO registers Identical to YAMON context FPU control registers if available 8 3 1 Application API Identical to YAMON context YAMON holds a table at flash memory location Ox1fc00500 holding addresses of functions that applications may invoke in order to shift back to YAMON context and perform specific actions One of these functions is the exit function Calling the exit function will cause the application to end The same result may be obtained by jumping to the address stored in register 31 ra when the application was invoked Register ra holds the address of the function she11 return in file shell appl if S The only difference between the exit function and shell return is that the exit function transfers its return value in register a0 while shell return uses register vO The application API is described in Ref 1 This section describes how this interface is implemented The application API allows applications to request YAMON to perform the following operations documented in the header file include yamon api h 49 Print string to ttyO either zero terminated or using a character count Get character from tty0 Flush caches Register deregister Except
15. 011 MIPS Technologies Inc All rights reserved 13 2 System Environment SYSENV and ENV modules MIPS YAMON Reference Manual Revision 02 20 68 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Appendix A References MIPS YAMON User s Manual MIPS document MD00008 MIPS YAMON Errata MIPS document MD00032 MIPS Malta User s Manual MIPS document MD00048 MIPS SEAD 3 Board User s Manual MIPS document MD00682 MIPS SEAD 3 Board Schematics MIPS Document MD00648 MIPS SEAD 3 Board Getting Started MIPS Document MD00687 MIPS SEAD 3 IO Processor User s Manual MIPS Document MD00630 MIPS SEAD 3 Basic RTL Reference Manual MIPS Document MD00692 MIPS SEAD 3 Basic RTL User s Manual MIPS Document MD00693 System level Bringup of a MIPS32 1004K 1074K Coherent Processing System MIPS Document MD00808 MIPS YAMON Reference Manual Revision 02 20 69 MIPS YAMON Reference Manual Revision 02 20 70 Appendix B Revision History Change bars vertical lines in the margins of this document indicate significant changes in the document since its last release Change bars are removed for changes that are more than one revision old Revision Date Description 01 00 00 01 07 Initial revision 01 01 00 02 08 Updated for YAMON 01 01 01 02 00 03 22 Updated copyright notice 02 00 00 09 11 Updated for YAMON
16. 02 00 02 01 01 01 31 Document layout modified 02 02 01 07 27 Updated for YAMON 02 02 02 03 02 08 15 Updated for YAMON 02 03 02 04 02 11 21 Updated for YAMON 02 04 02 05 03 12 13 Updated for YAMON 02 05 02 06 04 03 24 Updated for YAMON 02 06 02 07 04 10 25 Updated for YAMON 02 07 02 08 05 03 21 Updated for YAMON 02 08 02 09 05 06 15 Updated for YAMON 02 09 02 10 05 10 14 Updated for YAMON 02 10 02 11 06 02 16 Updated for YAMON 02 11 02 12 06 0704 Updated for YAMON 02 12 02 14 07 11 12 Updated for YAMON 02 14 02 15 07 12 30 Updated for YAMON 02 15 No public release 02 16 08 06 23 Updated for YAMON 02 16 02 17 09 11 6 Updated for YAMON 02 17 02 18 10 3 30 Updated for YAMON 02 18 02 19 10 8 26 Updated for YAMON 02 19 02 20 11 2 15 Updated for YAMON 02 20 MIPS YAMON Reference Manual Revision 02 20 71 MIPS YAMON Reference Manual Revision 02 20 72
17. 1oad and gdb commands I cache invalidation is followed by a call to sys 1ush pipeline Q which performs an eret in order to flush the CPU pipeline This is necessary because instructions in the cache line s being invalidated may already be in the CPU pipeline MIPS YAMON Reference Manual Revision 02 20 30 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Cache Functions The copy and disk commands also flush the caches before and after copying data This is done because these com mands are expected to be frequently used for moving applications between for example Flash and RAM and this requires flushing the D cache and invalidating the I cache as previously described If the user does not want the com mand to flush the caches he may use the option Otherwise YAMON does not usually flush the caches behind the back of the user So if the user issues an edit command to uncached memory and a memory location within the same cache line has previously been accessed cached it is the responsibility of the user to make sure the D cache has been flushed by issuing the flush d com mand The following commands are the only commands which take care of flushing the caches load gdb e disk scpu see Chapter 13 CPU Reconfiguration on page 65 e cache YAMON itself is compiled for KSEGO by default cached addresses Data is generally accessed cached except in the case o
18. 7 1 exc handler It is however possible to enable a built in FPU emulator See Chapter 9 FPU Emulator on page 53 and 1 for details 7 7 Exception Handlers 7 7 1 exc handler Except for Reset and EJTAG exceptions all exceptions eventually reach exc handler assuming BEV field of CPO STATUS register is O 43 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 7 7 Exception Handlers exc handler will perform the following e Store context CPU and possibly FPU registers In case of a MIPS32 MIPS64 Release 2 CPU supporting register shadow sets save CPU registers corresponding to the shadow set that was in use when the exception was taken are stored e Set stack pointer sp to an exception stack e Jump to the function exception sr with the cause code field of CPO CAUSE register as argument The excep tion vector offset is also passed as an argument to distinguish between NMI and Cache error exceptions Note that a similar function exc_handler_ejtag is used for EJTAG exceptions 7 7 2 exception_sr branch out exception sr is the first level branch out exception handler working in parallel with exception_ejtag First level NMI will cause super default action which will print a register dump to ttyO and restart YAMON shell A branch is taken to an Exception Service Routine ESR specific to each cause code An Exception Service Rou
19. Administrative functions and e Generic driver services Each of the above is described in the following subsections Drivers are identified by major and minor device numbers Major device numbers are defined in include sysdev h Minor numbers are defined in specific driver api h files 3 3 1 Administrative Functions Administrative functions are used during initialization to allocate table space and install the drivers needed INT32 IO setup UINT32 devices IN max devices to be supported INT32 IO install UINT32 major IN major device number io service init init service function pointer xy t io service open open service function pointer t io service close close service function pointer 7 t_io_service read read service function pointer io service write write service function pointer t io service ctrl ctrl service function pointer 3 3 2 Generic Driver Services Generic driver services are used to request services provided by installed drivers the classic set of init open a close read write ctrl INT32 IO_init UINT32 major IN major device number UINT32 minor IN minor device number void p param INOUT device parameter block MIPS YAMON Reference Manual Revision 02 20 22 Copyright 1999 2011 MIPS Technologies Inc All rights reserved
20. IPS32 1004K MIPS32 1074K in FPGA System Controller MIPS SOC it 101 Bonito64 MIPS ROC it SEAD 3 Basic RTL Supported by Malta Yes Yes No Supported by SEAD 3 No Yes Yes The same binary image is used for all boards and CPUs supported by YAMON YAMON detects the specific board CPU at run time The binary image contains both little and big endian code YAMON detects the endianness at run time and executes the appropriate code and on RoHS compliant Malta boards the endianness can be selected by a hardware switch or via software On the SEAD 3 board endianness is selected by setting the YAMON variable softendian YAMON is not an operating system It does not support switching between several concurrent applications nor does it manage the memory TLB YAMON is a monitor performing bios like system initialisation and allowing the user to examine modify memory and memory mapped devices as well as loading and starting applications one at a time As such YAMON is well suited for hardware and software bringup Some of the main YAMON features are e System initialisation including RAM size type detection and auto configuration cache initialisation PCI auto detection and auto configuration PCI not available on all boards Shell with command line history and editing e Traditional shell commands load go dump edit etc MIPS YAMON Reference Manual Revision 02 20 8 Copyright 1999 2011 MIPS Tec
21. Mis TECHNOLOG I MIPS YAMON Reference Manual Document Number MD00009 Revision 02 20 February 15 2011 MIPS Technologies Inc 955 East Arques Avenue Sunnyvale CA 94085 4521 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Copyright 1999 2011 MIPS Technologies Inc All rights reserved Unpublished rights if any reserved under the copyright laws of the United States of America and other countries This document contains information that is proprietary to MIPS Technologies Inc MIPS Technologies Any copying reproducing modifying or use of this information in whole or in part that is not expressly permitted in writing by MIPS Technologies or an authorized third party is strictly prohibited At a minimum this information is protected under unfair competition and copyright laws Violations thereof may result in criminal penalties and fines Any document provided in source format i e in a modifiable form such as in FrameMaker or Microsoft Word format is subject to use and distribution restrictions that are independent of and supplemental to any and all confidentiality restrictions UNDER NO CIRCUMSTANCES MAY A DOCUMENT PROVIDED IN SOURCE FORMAT BE DISTRIBUTED TO A THIRD PARTY IN SOURCE FORMAT WITHOUT THE EXPRESS WRITTEN PERMISSION OF MIPS TECHNOLOGIES INC MIPS Technologies reserves the right to change the information contained in this document to improve function design or otherwise MIPS Technologi
22. N go comand e Otherwise appl_shel1_func will update appl context register v0 with its return value and simply return to assembler level e At the assembler level restore all general purpose registers and CPO STATUS register e Return to the application 8 3 2 GDB Command This section describes the GDB interface implemented by the shell command gdb The supported subset of the GDB Standard Remote Protocol with extensions for Algorithmics SDE GDB is described in Ref 1 The gdb shell command is implemented in the file shell gdb c The gdb command function gdb first sets up the initial application context in the same way as the go command see Table 8 1 GDB may request the target YAMON to single step code in which case YAMON replaces the next instruction of the application with a BREAK instruction and storing the old instruction so that it may be rewritten later Actu ally in case of branches two BREAK instructions are inserted one at the instruction following the branch delay slot and one at the target address of the branch Setting breakpoints in exception handling code is not supported When the GDB debugger issues a command requesting an application to be executed like the C Continue or s Singlestep command the function shell shift to user is called as described in Section 8 2 Contexts with a pointer to the desired user context with cp0_epc set to the start ad
23. Reference Manual Revision 02 20 66 Copyright 1999 2011 MIPS Technologies Inc All rights reserved CPU Reconfiguration 67 3 size byte count of user data 4 checksum simple 8 bit checksum of the data field bytes Each SYSENV_write defined in the include sysenv_api h causes a record to be written into the environment FLASH at the next free location maintained by SYSENV When the environment FLASH is full i e no more free physical records are available SYSENV performs a gar bage collection procedure which includes an erase of the entire environment FLASH to free up all old physical records no longer used SYSENV is accessed indirectly using SYSCON The SYSCON object used for this is SYSCON DISK ENVIRONMENT ID The ENV module manages environment variables defined by two 0 terminated strings one for the name and one for the value These strings are placed in a buffer which is written to SYSENV for storage in flash ENV is initialised after a reset as described in Chapter 3 Modules on page 19 by calling the function env initQ env init reads the available SYSENV records and creates modifies system environment variables Usually sys tem variables are not modified between resets but if for example the RAM module is replaced with a module of dif ferent size the environment variable 1 will be modified MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2
24. Technologies Inc All rights reserved 7 9 Platform Adaptation of Interrupt Controller EXCEP install exc in ram EXCEP save context EXCEP get context ptr EXCEP exc handler ret EXCEP exc handler ret ss EXCEP print context EXCEP run default esr handler Only one ESR may be registered for a specific exception On the other hand more than ISR or ISR may be registered for a specific interrupt When registering an ESR it may be requested that the ESR is called in raw mode 1 6 with context CPU and FPU registers in the exact state it was when the exception occurred except for and in case of an EITAG exception the exact state includes and k1 7 9 Platform Adaptation of Interrupt Controller In order to adapt YAMON for a new interrupt controller modifications must be made to the file arch exception platform excep platform c The file contains the following functions that must be modified in order to support the new platform arch excep init intctrl This function initialises the interrupt controller if any The function must set the two output variables ic count and ic_int arch_excep_enable_int arch_excep_disable_int These functions enable disable a specific line of the interrupt controller arch_excep_pending This function returns the interrupt status value One bit must be set
25. The following targets are available for make install generates subdirectories used for the little and big endian object files e clean deletes the files generated by make e depend generates dependencies e 211 default builds the images dis generates disassembly files The following should be noted make install should be run before making other targets e make clean deletes dependency files and make all does not generate dependency files So make clean should be followed by make depend in case dependency files are wanted 15 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 2 4 Porting The final files generated by make a11 are listed in Table 2 3 Table 2 3 Make all Resulting Files bin yamon lt rev gt f1 YAMON image in format required for download to flash using parallel port or USB YAMON image in binary format suitable for programming devices bin reset lt rev gt map Linker generated map file for the startup code located at the reset exception vector bin EL yamon lt rev gt _el map Linker generated map file for the little endian image bin EB yamon lt rev gt _eb map Linker generated map file for the big endian image The files generated by make dis are listed in Table 2 4 Table 2 4 Make dis Resulting Files bin reset lt rev gt dis Disassembly of startup code located at the reset exception vector bi
26. ck e e He He Fe He He REE EKER e He He ER He He e He He ke e khe heck ke e e khe e He He ek ke He ke ek EXCEP exc handler ret Description Restore context and return from exception Return values None ke heec e heck hehe ke hec e e heck ke e heec KEK ke heck EKER ke kc e ke ke ce e e heck ke ke ke e ke ek koe ke void EXCEP exc handler ret t gdb regs context The context parameter contains a pointer to a structure containing the context CPU and FPU register values to be restored By calling EXCEP exc handler ret directly a registered ESR may control the context to be restored Another function exc handler ret 55 15 used for toggling between YAMON and the application con text as described in Chapter 8 Applications on page 47 This function first makes sure that CPU register shadow set 0 is used for MIPS32 MIPS64 Release 2 CPUs including shadow sets since the application might have changed this It then calls EXCEP exc handler ret 7 8 EXCEP API 45 The EXCEP module has the following API functions see excep api h for details EXCEP init EXCEP register esr EXCEP deregister esr EXCEP register cpu isr EXCEP deregister cpu isr EXCEP register ic isr EXCEP deregister isr EXCEP store handlers EXCEP set handlers MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS
27. d for the BREAK exception The current context YAMON context is saved so that it may be restored later EXCEP exc handler ret see Chapter 7 Exception Handling EXCEP Module on page 41 is called with a pointer to the application context exc handler ret will load that context and issue an thus causing code to continue at the location pointed to by its EPC which is the application s entry point Applications may return to YAMON by the method described in Section 8 3 1 Application Table 8 1 Initial Application Context Field Value reg4 a0 Set to the argument count reg5 al reg6 a2 Pointer to array of strings holding the arguments 0 in case application is started by go command argv 0 gdb in case application is started by gdb command Pointer to table holding environment variables MIPS YAMON Reference Manual Revision 02 20 48 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Applications Table 8 1 Initial Application Context Continued Field Value reg7 a3 reg31 ra Size of memory in bytes SYS APPL STACK SIZI 4 words below top of memory range reserved for user stack size defined by symbol YAMON E defined in include sys api h Return address Application may jump to this address in order to exit and return to Other CPU registers
28. d in modules with indirectly called functions Porting may involve adding new modules or removing modules See Chapter 3 Modules on page 19for information about how to do this MIPS YAMON Reference Manual Revision 02 20 16 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Getting Started 17 All boards supplied by MIPS Technologies use the memory mapped location MIPS REVISION 0x1fc00010 for the REVISION register used for board identification The format of the REVISON register is shown in Table 2 5 Table 2 5 REVISION Register Layout Bits Field Name Function 31 8 Reserved Board specific extensions 7 4 PROID Identifies the basic system motherboard type 3 0 PRORV Identifies the basic system motherboard revision Throughout the YAMON arch directory board specific code is executed based on the global variable sys_platform sys platform holds the value of the PROID field The values available for sys_plat form are defined in the file arch include product h In this version of YAMON the defined values are Encoding of proid field define PRODUCT_MALTA ID 0x2 Malta board define PRODUCT SEAD3 ID 0x4 SEAD 3 define PRODUCT THIRD PARTY ID Third party The value PRODUCT THIRD PARTY ID is allocated for third party products Non MIPS Technologies prod ucts The layout of bits 31 8 are different for Non MIPS Techno
29. ded at compile time in YAMON s start up sequence are defined in the header file arch include initswitch h 3 1 Summary of Modules All modules listed below are included in this Release e module System Configuration See Section 3 2 System Configuration SYSCON module module Driver interface See Section 3 3 Driver API IO Module e EXCEP module Exception handling See Chapter 7 Exception Handling EXCEP Module on page 41 e RTC module RTC driver e FREQ module Frequency detection e PCI PCI auto detection and auto configuration See Chapter 12 PCI Configuration PCI Module on page 61 e drivers EEPROM Driver for NM24C09 devices e FLASH STRATA Driver for flash devices conforming to the Common Flash Interface CFI specification e SYSENV module Manages the system flash Section 13 2 System Environment SYSENV ENV mod ules e manages environment variables See Section 13 2 System Environment SYSENV ENV mod ules e SERIAL UART drivers LAN_SAA9730 Driver for SAA9730 Ethernet controller LAN_AM79C973 Driver for AM79C973 Ethernet controller e Networking protocols IDE IDE support e NEWSC NORTH EAST WEST SOUTH CENTER button support MIPS YAMON Reference Manual Revision 02 20 19 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 3 2 Sy
30. dianness and jumps to the corresponding little or big endian image The endian specific code entry point is the function reset handler in file arch reset init S reset handler is linked at addresses 0x9fc10000 little endian and 0x9fc78000 big endian The initialisation code is contained in assembler files and C files The first code executed is assembler code all of which is found in the directory arch reset Files located in that directory have several things in common e Their code is linked to flash and executed from flash Their file names are listed separately in linker scripts e They execute on registers alone without using any RAM variables or any stack space e They detect and set up the SDRAM properties size speed etc and configure the system controller accord ingly enabling the first C function to be called Other functions performed by the assembler code includes detecting NMI detecting cache sizes initialising caches copying code and initialised data from boot flash eprom to RAM and initialising stack pointer sp The first C function called is c entry in init main c This function performs the remaining initialisation before calling the function shell which starts the shell Most of the initialisation requested by entry is performed by the function initmodules as described in Chapter 3 Modules on page 19 MIPS YAMON Reference Manual Revision 02 20 60 Copyright 1999 2011
31. dress shell shift to user is noti fied that this application is being debugged so that exceptions will not cause the context to be displayed and YAMON halted but rather will cause shell shift to user to return to gdb so that GDB may be notified of the exception with special handling of BREAK exception and act accordingly When the function shell shift to user returns it will have updated the application context structure with the new context including new EPC The gdb function determines if single stepping was set up and in this case MIPS YAMON Reference Manual Revision 02 20 50 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Applications restores the original instruction s Then it responds to GDB and starts polling GDB again for the next command on ttyl Two options are available for the gdb command They are v verbose This option will cause all requests from GDB and all responses from YAMON to be displayed on ttyO c checksum off This option will disable the checksum validation used in GDB commands This is very useful for debugging the GDB protocol because it makes it convenient to enter commands manually using a terminal rather than the GDB host connected to tty1 without having to calculate checksums The user may simply termi nate commands with the sequence 00 or any other dummy checksum 8 4 Booting Linux on Multi core Systems Using YAMON The basic steps for booting Linu
32. dule Header files are generally located in the include and arch include directories A few local header files are located in the directory of the corresponding module Public header files for modules generally contain the postfix api For example the EXCEP interface is defined in the header file include excep api h Architecture board CPU specific source code is in the arch directory Ideally when porting YAMON to a new board CPU this is the only place where modifications should be made except for new drivers which belong in the driver directory See also Section 2 4 Porting The arch directory contains the subdirectories listed in Table 2 2 13 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 2 3 Makefile Structure Table 2 2 Architecture specific Subdirectories Name Description include Architecture specific header files Architecture specific reset code and early initialisation code executed from flash Architecture specific initialisation code Architecture specific part of PCI module Architecture specific shell code syscon Architecture specific part of SYSCON module sys Architecture specific system functions used throughout YAMON Architecture specific part of ENV module exception Architecture specific part of EXCEP module freq FREQ module detection of CPU and bus frequencies
33. e file for further information Another header file often used by assembler files is arch include mips h mips h includes a few workarounds for bugs in early revisions of 4K family of processors mips h further includes the following file holding basic MIPS32 and MIPS64 definitions arch include Archl Defs h ArchDefs h includes definitions of the CPO registers and the following naming conventions for CPU general pur pose registers define zero 0 define AT 1 define v0 2 define vi 3 define a0 4 define al 5 define a2 6 define a3 7 define 0 8 define t1 9 define t2 10 MIPS YAMON Reference Manual Revision 02 20 57 Copyright 1999 2011 MIPS Technologies Inc All rights reserved define t3 11 define t4 12 define t5 13 define t6 14 define t7 15 define 50 516 define s1 17 define s2 18 define s3 19 define s4 20 define s5 21 define s6 22 define s7 23 define t8 24 define t9 25 define 526 define k1 27 define gp 28 define sp 29 define s8 30 define fp 30 define ra 31 Again refer to the source file for further information MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 11 Initialization This chapter describes the initialization code executed following a reset Following a reset hardware fetches instructions starting at the reset excepti
34. ed 7 2 Reset Exception 0xa0000100 Cache error e 0x80000180 General exception e 0x80000200 Used for Interrupts since Iv field of CAUSE register is set e 0x80000300 Allocated by YAMON used for legacy EJTAG exceptions e 0x80000380 Allocated by YAMON used for legacy NMI exceptions 0x80000200 Allocated by YAMON used for EJTAG exceptions 80000 80 Allocated by YAMON used for NMI exceptions The last two entries allow applications to receive EJTAG and NMI exceptions by installing code at those vector addresses Prior to YAMON 2 07 the legacy locations were used for the EJTAG amp NMI vectors but these clashed with the EIC interrupt vector table For backwards compatibility YAMON installs a jump to the legacy exception vectors when EIC mode is not being used Exception handling is performed by the EXCEP module located in the following two directories e exception Architecture independent code e arch exception Architecture dependent code The EXCEP module initialisation init code will call EXCEP install exc ram to setup the var ious exception vector locations and clear the BEV bit of the CPO STATUS register Before the exception vector locations have been set up by the EXCEP initialisation code the BEV bit of the STATUS register will be set and interrupts will be disabled Exceptions will cause exception handlers located in flash memory Oxbfc00xx0 to be invoked
35. er 7 4 EJTAG Exception An EJTAG exception will cause instructions to be fetched from address Oxbfc00480 unless an EJTAG probe has requested instructions to be fetched from the probe The YAMON code at Oxbfc00480 will jump to the address 0x80000a00 with unmodified registers The EXCEP module will install code at 0x80000a00 that performs the following e Save register in a reserved CPO register CPO DESAVE e Save register context including and at a specific EJTAG context structure e Set up stack pointer to a specific EJTAG exception stack e Jump to the function exception ejtagO where a branch is taken to an Exception Service Routine ESR specific to the EJTAG cause code or perform a context dump and reenter shell if no ESR is registered 7 5 Cache Error Exception The EXCEP module will install code at the cache error exception vector 0xa0000100 performing the following Jump to function exc handler cacheerr which performs the following Read CPO CONFIG register and store it in a system variable so that the value may later be written by a con text dump e Change field of CPO CONFIG so that KSEGO now executes uncached e Jump to the function exc_handler which is the function handling most other exceptions as well For further actions see Section 7 7 1 handler 7 6 FPU Exception An FPU exception will normally follow default action i e jump to exc handler see Section 7
36. er to array of string pointers t sys error string define SYSCON ERRORMSG IDX 0 String index for error message Ef define SYSCON_DIAGMSG_IDX 1 String index for diagnose message define SYSCON HINTMSG IDX 2 String index for hint message Up to 3 strings may describe error e The primary error message e diagnostic message e hint message Whenever an error indication defined by a global error number is received SYSCON may be requested to lookup the error strings which need not be static In this version of YAMON the only module performing error lookup is the shell The SYSCON object used for this is SYSCON_ERROR_LOOKUP_ID The lookup is performed in the file shel1 shell c t sys error string error string lookup syserror error string syserror err error string count MAX NUMBER OF ERROR STRINGS error string strings err strings for i20 i 3 i MIPS YAMON Reference Manual Revision 02 20 26 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Error Handling error_string strings i NULL SYSCON_read SYSCON_ERROR_LOOKUP_ID amp error string sizeof error string SYSCON will direct the call to the error lookup function registered by the specific module This error lookup func tion then writes the error string structure 27 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technol
37. ere is no FPU or the FPU has been disabled in the CPO STATUS register When the emulator is enabled for this excep tion it is possible to emulate all FPU instructions This is not recommended for performance critical applica tions a software floating point library should be used instead 9 5 32 64 bit Stacking The exception handler will automatically determine whether all registers must be saved as 32 bit registers or 64 bit registers When YAMON is initialized it analyzes the CPU If the CPU can run in 64 bit mode the variable sys 64bit is set to 1 The FPU emulator uses the external variable sys 64bit to determine whether to stack all registers as 32 bit or 64 bit registers 9 6 API The FPU emulator offers a single function FPUEMUL_handler The handler takes a single argument in k1 which is expected to hold the address of the default handler If the emula tion succeeds an eret will cause the emulator to return directly from the exception If the emulation fails illegal instruction or similar the emulator will jump to the handler pointed to by k1 The global structure FPUEMUL_stat contains statistics for the emulator See inc1ude asm fpu emulator h for details The struct has a string text which is set if a problem occurred with the emulation YAMON is expected to display this text on failure MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights re
38. es does not assume any liability arising out of the application or use of this information or of any error or omission in such information Any warranties whether express statutory implied or otherwise including but not limited to the implied warranties of merchantability or fitness for a particular purpose are excluded Except as expressly provided in any written license agreement from MIPS Technologies or an authorized third party the furnishing of this document does not give recipient any license to any intellectual property rights including any patent rights that cover the information in this document The information contained in this document shall not be exported reexported transferred or released directly or indirectly in violation of the law of any country or international law regulation treaty Executive Order statute amendments or supplements thereto Should a conflict arise regarding the export reexport transfer or release of the information contained in this document the laws of the United States of America shall be the governing law The information contained in this document constitutes one or more of the following commercial computer software commercial computer software documentation or other commercial items If the user of this information or any related documentation of any kind including related technical data or manuals is an agency department or other entity of the United States government Government the u
39. f drivers accessing DMA buffers or memory mapped hardware devices For systems with coherent IO data buffers are alloacted in cached space to ensure the data is accessed with consistent cache coherency attributes If KSEGO has been configured to be uncached using the cache command cache flushing will be disabled so in this case TLB mapped cached applications should not be loaded 5 4 TLB YAMON performs no TLB operations The TLB is not initialised nor is it managed However YAMON includes the command t1b which is used to initialise and setup the TLB Also YAMON commands will validate addresses and issue error messages if for example an address in a mapped memory range e g KUSEG is attempted without proper TLB setup Address validation is performed by the function sys validate range in the file sys sys c 31 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 5 4 TLB MIPS YAMON Reference Manual Revision 02 20 32 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 6 Shell This chapter provides an overview of the shell and the shell commands that are supported by YAMON For a detailed description of shell commands refer to 1 6 1 Introduction The shell parses commands typed on the command line and includes command line history and editing The main shell function is she11 in the file shell shell c The shel
40. fine define TCHAR port ch sys getchar port ch TCHAR port sys_getchar_ctrlc port 6 2 Shell Commands These function take as a parameter the port to be used ttyO or tty1 The port values are defined in include sysdefs h define PORT TTYO 0 define PORT TTY1 define PORT NET 2 PORT NET corresponds to the TFTP UDP Ethernet connection used by the load command see Section 8 1 Loading Applications sys getchar polls for a received character In case a character was received it is written to the char pointed to by the ch parameter and the function returns TRUE If no character is available it returns FALSE sys getchar ctrlc does not actually read a character but is used for determining whether a ctrl c has been pressed It returns TRUE if ctrl c has been detected otherwise FALSE The functions do not echo received characters 6 2 4 2 Output Commands may output data to the terminal in two ways e Using the standard library e g print Using the functions sys puts or sys putchar e Using the functions shell puts or shell 0 printf outputs data on ttyO and has the traditional functionality with a format string and a variable number of arguments sys puts and sys putchar are implemented in sys sys c and defined in sys api h They output data on ttyO or tty1 as defined by PORT_TTYO and PORT 1 in the subsection In
41. for each pending interrupt It is also allowed to just set the bit for the highest priority pending interrupt arch excep 1 On some the Malta board an End Of Interrupt cycle must be performed Besides adapting excep platform c device drivers must configure devices to generate interrupts and register ISRs Interrupt Service Routines For some platforms e g Malta some interrupt related setup may also be performed in the file arch init platform init platform c For example in case of Malta the IRQ numbers of the units of the SMSC Super I O controller UARTS parallel port etc are configured in this file MIPS YAMON Reference Manual Revision 02 20 46 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 6 Applications This chapter describes how applicatons are loaded and executed using YAMON 8 1 Loading Applications Applications are loaded using the Load command and executed using go command or under debugger control using the gdb command The 1oad command implemented in shell load c The shell 1654 command invokes the function loader_image in file 10ad 1oader c which controls the loading and interprets the file formats Currently only Motorola S record files as defined in Ref 1 are supported loader_image loads the S records from one of the two UARTS or from Ethernet using the TFTP UDP protocol on platforms supporting Ethernet 8 1 1 SEAD 3 Secondary Boot L
42. heck that the instruction causing the exception was the predefined invalid COPI instruction Also check the cookie and then restore the EPC from SP 12 Execute eret 9 8 How to Extract the Emulator e sure that all directories and sub directories in puemul are available Fixthe trampoline code as necessary e Check file porting S for the method of addressing user space e available 8 bit variable sys 64bit or change the code 0 indicates that we are running on a 32 bit system 1 indicates that we are running on a 64 bit system e Let the general exception handler call FPUEMUL handler for FP exceptions Make sure that k1 points to the default exception handler 55 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 9 9 GPL free YAMON build 9 9 GPL free YAMON build In its basic form YAMON has a soft FPU and is subject to the GPL This means that regardless of any hardware FPU support the system is fully compliant with IEEE floating point operations YAMON itself uses no FPU operations and will function normally with no FPU and no software support If a GPL free YAMON build is required the soft FPU can be removed from the build by running a helper shell script from within the bin directory cd bin nogpl sh There are some issues to note about operation without the soft FPU e attempt to use instructions that acces
43. hnologies Inc All rights reserved Introduction e Ethernet IDE and serial port support Ethernet and IDE not available on all boards e Configuration of CPU for CPUs supporting this e FPU emulation YAMON supports the following interfaces e Command line interface through serial port e Debug interface through dedicated debug serial port Interface conforms to GNU GDB Standard Remote Proto col with extensions for SDE GDB from MIPS Technologies Inc e Vector table based call interface for use by applications PMON compatible e Ethernet for TFTP load save and ping support Ethernet not available on all boards DE for reading and writing sectors on hard disk compact flash IDE not available on all boards e The SEAD 3 board supports the USB interface 9 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 10 Chapter 2 Getting Started This chapter describes how to install YAMON the file structure used by YAMON and how to port YAMON to a new board CPU 2 1 Installing YAMON This section describes how to unpack and build the YAMON software 2 1 1 Environment YAMON has been built and tested in the following environment e Host running Sun Sparc Solaris 2 7 or Red Hat Linux release 7 0 e GNU Make version 3 77 e GNU comp
44. ic variables which must be adapted to the platform known devs Must point to an array of t_known_dev structures defined in arch include pci h describ ing the known devices In the case of the Malta boards one additional array element has been reserved for the system controller data This is setup by the function arch pci config controller see Section 12 3 Adaptation of pci core c MIPS YAMON Reference Manual Revision 02 20 61 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 12 2 Adaptation of pci_platform c typedef struct UINT16 vendorid Vendor ID UINT16 devid Device ID UINT8 function Function number UINT8 intline Interrupt line used by device char vendor String holding vendor name x char device String holding device name t_known_dev known devs count Must be set to the size of the known_devs array number of known devices e intline The interrupt line used for the system controller bar req Mapping of PCI memory and I O ranges is done through the Base Address Registers BARs of the PCI devices If some devices have fixed requirements for mapping of memory and I O space bar req array must be setup accordingly req consists of elements of type pci bar req defined in arch include typedef struct UINT16 vendorid Vendor ID UINT16 devid Device ID UINT8 function Function number
45. iler tools gcc 14 objcopy objdump Cygnus GNUPro Embedded ToolSuite with MIPS support e g gcc 2 9 or Algorithmics SDE MIPS 4 0b or Algorithmics SDE MIPS 4 1 MIPS Toolkit e GNU Perl v5 6 0 e gunzip tool 2 1 2 Unpacking YAMON source code may be distributed on CD without being compressed in any way It may also be distributed in gzipped tar files with the following naming convention yamon src rev tar gz The compressed file should be moved to the directory where you wish YAMON to be installed and the following operations should be performed lt rev gt is assumed to be 02 19 gunzip yamon src 02 19 tar gz tar xvf yamon src 02 19 tar This procedure will create a directory named yamon containing the source tree of YAMON The base of the YAMON source tree is termed ROOT in the remainder of this document All references to files or directories are based at ROOT MIPS YAMON Reference Manual Revision 02 20 11 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 2 2 Directory Hierarchy 2 1 3 Building This section describes how to build the YAMON image See Section 2 3 Makefile Structure for a full description of the makefile structure and make targets YAMON is written in C and assembler code Any ANSI C compliant compiler should be able to build YAMON However the makefile assumes GNU GCC compiler tools The main makefile is named bin Makefile A separate makefile is i
46. ion Service Routines ESRs and Interrupt Service Routines ISRs ESRs are always called in raw mode i e with context in the exact state it was when the exception occurred except for and registers Note that the YAMON GDB stub must Access SYSCON module read object values Exit application Copyright 1999 2011 MIPS Techno own the BREAK exception MIPS YAMON Reference Manual Revision 02 20 logies Inc All rights reserved 8 3 Go Command The function pointers are stored in a table at base address Ox1fc00500 The function pointed to is found in the file appl if S That function and the similar function she11_return to which ra points when application is started will cause the YAMON context to be entered by the following mechanism e In assembler level Save CPO STATUS register and disable interrupts e Save all general purpose registers to appl_context e Set stack pointer sp to the current YAMON sp value so that the active part of the YAMON stack is untouched e Call appl_shell_func to perform the requested function in c level Ifthe function requested is exit or the application simply jumped to the address contained in register ra when application was started EXCEP_exc_handler_ret_ss see Chapter 7 Exception Handling EXCEP Mod ule on page 41 is called with a pointer to the previously saved YAMON context returning back into shell_shift_to_user to end the YAMO
47. istent manner Modules are allocated a domain range of 1000 values defined in the file include syserror h Error numbers are allocated as follows ERROR CODE RANGE MODULE DEFINED IN 3 0000 0001 0000 0FFF reserved E 0000 1000 0000 1FFF reserved 00002000 0000 2FFF IO io api h 00003000 0000 3FFF SERIAL serial api h 0000 4000 0000 4FFF LAN lan api h 00005000 0000 5FFF IIC iic api h 00006000 0000 6FFF eeprom_api h R 0000 7000 0000 7FFF RTC rtc api h 0000 8000 0000 8FFF SYSCON syscon api h 0000 9000 0000 9FFF FLASH flash_api h xs 0000 A000 0000 AFFF NET net api h x 0000 B000 0000 BFFF EXCEP excep api h 0000 C000 0000 CFFF SYSENV sysenv api h 00000000 0000 DFFF LOADER loader_api h 0000 E000 0000 EFFF ENV env api h 0000 F000 0000 pci api h 0001 0000 0001 0FFF SHELL shell api h 0001 1000 0001 1FFF IDE ide api h syserror h also defines the following two generic error codes define OK 0x00000000 define NOT_OK Oxffffffff Domain numbers are found by right shifting error numbers by 12 bits For example the domain number for the LAN module is Ox4 Actually there are two LAN modules in YAMON since there are two different Ethernet drivers However only one will be installed on an
48. kefile Structure Architecture independent header files fpuemul Architecture independent floating point emulation code See Chapter 9 FPU Emulator on page 53 init Architecture independent initialisation code See Chapter 11 Initialization on page 59 arch Architecture specific code See Table 2 2 shell Architecture independent part of YAMON shell and shell commands See Chapter 6 Shell on page 33 Architecture independent system functions used throughout YAMON load Functions for loading and interpreting s records net NET module network stack including arp udp tftp ping etc drivers Device drivers io IO module Driver interface See Section 3 3 Driver API IO Module Standard library sysenv SYSENV System environment module handling records kept in flash See Section 13 2 System Environment SYSENV and ENV modules env Architecture independent part of ENV Module handling environment variables See Section 13 2 System Environment SYSENV and ENV modules excepti Architecture independent part of EXC module exception handling on See Chapter 7 Exception Handling EXCEP Module on page 41 pci Architecture independent part of PCI module PCI auto detection and auto configuration See Chapter 12 PCI Configuration PCI Module on page 61 syscon Architecture independent part of SYSCON module System Configuration See Section 3 2 System Configuration SYSCON mo
49. l is started by the function shell setupQ in the file shell shell_init c shell setup installs functions accessible from applications through the mechanism described in Section 8 3 1 Application APT shell setup then calls shell arch which calls initialisation functions for each shell command supported for a specific board CPU and registers the commands using the mechanism described in Section 6 2 Shell Com mands shell then starts the shell by calling the she11 function shellQ first does some initialisation including registration of the shell error messages she11 then stores the cur rent context so that the shell may later be reentered by a call to she11_reenter The shell is reentered after an NMI interrupt a cache error exception or any other exception occurring in YAMON and causing a context dump for example triggered bya port a 1 command she11 then enters an infinite loop implemented in function command_loop performing the following actions e Print prompt e Receive command line e Remove excess spaces Add line to command stack e Call function execute line The function execute line performs the following actions 66 99 e Split line in separated sub commands e Determine repeat count indicated by lt n gt at the beginning of a command line for line and repeat fol lowing actions the requested number of times MIPS YAMON Reference Man
50. logies products as shown in Table 2 6 Table 2 6 3rd Party REVISION Register Layout Reserved MANPD Manufacturer s product ID MANID Manufacturer s ID code ome memi E The specific third party product is identified by vANID MANPD fields The MANID field is allocated by MIPS Technologies while vANPD is allocated by the company A platform need not necessarily support the REVISION register but the YAMON port must set the following vari ables e platform should be set to OxE MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved sys manid allocated by MIPS Technologies sys manpd allocated by company that owns the board 2 4 Porting An additional variable sys corecardis used for the Malta and SEAD 3 boards to identify the Core card plug on card holding CPU system controller and SDRAM These variables are set in function arch platform init in the file arch init platform init platform c The REVISION register is also accessed in the following files which must therefore be adapted arch reset bootvector reset S arch reset init platform s S arch reset init core s S arch syscon platform syscon platform c MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 18 Chapter 3 Modules YAMON operates with Modules The modules to be inclu
51. n EL yamon lt rev gt _el dis Disassembly for the little endian image bin EB yamon lt rev gt _eb dis Disassembly for the big endian image 2 4 Porting Porting YAMON to a new board CPU is done by adapting the files in the arch directory New device drivers belong in the drivers directory Architecture specific directories may be further split in subdirectories e cpu CPU specific code e platform Platform specific code e platform core Core card specific code Core cards are used on the Malta and SEAD 3 boards They hold the CPU the system controller Northbridge and SDRAM module plat form core holds the system con troller specific code For some platforms it may make more sense to place this code in the platform directory In order to port YAMON to a new platform the recommended practice is to go through the files of the relevant direc tories e g arch lt subdir gt cpu when a new CPU is added The functions are commented and switch constructs have been used extensively for board CPU selection Also it is strongly recommended to read this document but you are obviously doing that already For example adap tation of interrupt handling is described in Section 7 9 Platform Adaptation of Interrupt Controller and adaptation of PCI configuration is described in Section 12 2 Adaptation of pci platform c and Section 12 3 Adaptation of pci core c YAMON code is to some extent arrange
52. nd dirty write it to memory Invalidate line void Flush L2 cache line containing specified index sys_scache_flush_index UINT32 index void Write all valid and dirty D cache lines to memory sys dcache flush all void Invalidate entire D cache void sys flush caches void First call dcache flush 8110 Then call sys icache invalidate 8110 void First addr is word aligned sys flush cache line Then call sys dcache flush addr void addr Then call sys icache invalidate addr 5 3 Other Cache Issues A potential source of errors is the access of two memory locations contained within the same cache line both cached and uncached If for example an address is written uncached it may be overwritten later by hardware in case of writeback caches if the corresponding cache line was valid at the time and later evicted Another potential source of errors is the loading of an application to memory Since this is done by writing the instructions to memory using store word instructions D cache domain it is important that the I cache is invali dated so that it will be refilled before executing new instructions To make sure the I cache refill is performed on the correct data the D cache must be flushed to physical memory after loading the application Also if the application executes uncached it is important to flush the D cache before starting to load the application All of this is handled by the
53. nvoked by the main makefile for building the FPU emulator fpuemul Makefile The main makefile contains the following expressions which define the names of the compiler tools replace this according to your setup Tool chain used for compilation of target code cygnus sde or linux TOOLCHAIN cygnus TOOLCHAIN sde TOOLCHAIN linux YAMON is built from the bin directory by issuing the commands make install make make install simply generates directories bin EL bin EB fpuemul EL and fpuemul EB used for holding little endian and big endian object code make will generate the following files yamon lt rev gt f1 yamon lt rev gt bin yamon lt rev gt 1 contains the YAMON image in the format required for programming the Monitor flash memory using the parallel port or USB depending on platform yamon lt rev gt bin contains the YAMON image in binary format suitable for E PROM programming hardware See Ref 1 for instructions on how to upgrade your specific board with the YAMON image 2 2 Directory Hierarchy The first level of the YAMON source tree located at ROOT contains the subdirectories listed in Table 2 1 MIPS YAMON Reference Manual Revision 02 20 12 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Getting Started Table 2 1 YAMON Top Level Directories Name Short description bin Makefile linker scripts and binary images See Section 2 3 Ma
54. oader The secondary boot loader for SEAD 3 boards at flash sector Oxbfa00000 is useful for booting applicatons such as the Linux kernel To run the secondary boot loader copy Oxbfa00000 0x800d0000 0x21000 go 0x800d0000 app name app parameters app name should contain the path and filename of the application you want to run The boot loader will try to read this file from the MicroSD card The MicroSD must be formated in FAT16 mode and all filenames must follow the 8 3 FAT16 naming convention The MicroSD must be formatted and populated with your application using an exter nal MicroSD card reader writter on a window PC or a Linux PC Currently the secondary boot loader cannot write to the MicroSD and does not support SDHC cards app parameters is the list of parameters you want to pass to your application 8 1 2 SEAD 3 Boot on TTY Serial Port To boot YAMON on the RS 232 serial port reset the SEAD 3 board while continuously holding the WEST button This selection is not permanant To make it permanant use the set yamontty command To boot YAMON on the USB serial port reset the board while continuously holding the EAST button This selection is not permanant To make it permanant use the set yamontty command MIPS YAMON Reference Manual Revision 02 20 47 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 8 2 Contexts 8 2 Contexts YAMON operates with four different contexts YAMON context
55. ogies Inc All rights reserved 8 4 Booting Linux on Multi core Systems Using YAMON The bit definitions for the flags are as follows define LAUNCH FREADY 1 define LAUNCH_FGO 2 define LAUNCH_FGONE 4 The Linux code that sets up the registers and then sets the go bit is in arch mips mti malta malta amon c The YAMON code that checks for the go bit and jumps to the specified pc is in arch reset init S MIPS YAMON Reference Manual Revision 02 20 52 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 9 FPU Emulator This chapter describes YAMON s emulation of floating point operations 9 1 Overview Floating point operations on very small numbers denormalized numbers and illegal numbers NaNs must be han dled by software Also some IEEE exceptions and exceptional results will cause an FPU exception The FPU emula tor is thus mandatory for full IEEE compliance even when the system has a hardware FPU The FPU exception handler is a GPL licensed stand alone module i e it comes with a complete exception handler YAMON will call it without stacking any registers If the emulation succeeds the emulator will perform a return from exception Otherwise the YAMON exception handler will be called The exception handler is also optional not including it ina YAMON build will result in a system that does not follow IEEE floating pointfloating point behaviour accurately with or without
56. ogies Inc All rights reserved MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 28 Chapter 5 Cache Functions This chapter describes the cache operations supported by YAMON 5 1 Introduction The set of cache functions listed in Table 5 1 are available They are implemented and defined in the following files sys cpu cpu c sys cpu cpu_s S include sys_api h The functions also support a level 2 cache if one is available and enabled and L2 cache resizing Presence of an L2 cache is by default disabled but may be enabled using the shell cache command which causes the function sys_cpu_12_enable to be called 5 2 Cache Operations Cache operations may address cache lines of the I or D cache in one of the following ways e All cache lines A specific cache line using the index of the line The cache line if any that references a particular virtual address may correspond to one of several cache lines depending on cache associativity The index of a cache line includes the cache way as well as the line within that way as defined by the MIPS cache instruction Indexed I cache operations always invalidate the requested line based on the index of the line Indexed D cache operations will write the contents of the cache line to memory if the line is valid and dirty The cache line will be set to the invalid state Addressed I cache operations will
57. on vector Oxbfc00000 Code is actually linked to KSEGO configured as cached address space but until caches have been initialised code executes in KSEGI uncached address space This requires addresses to be converted to KSEGI space before per forming jumps Initially code is executed from flash E PROM At some point the code is copied from flash to RAM and YAMON starts executing from RAM space because executing from RAM is faster The code is linked the following way as defined in the linker scripts bin link link xn bin link link el xn bin link link eb xn Based at 0x9fc00000 reset S Based at 0x9fc10000 little endian or Ox9fc78000 big endian init S init platform s S init_core_s S e malta_platform s 9564120 core S e bonito64 core S mscOl 5 sead platform S init cpu s S e cache 5 Remaining code is linked at base address 0x80005000 cached RAM The initialisation code is located in the following directories MIPS YAMON Reference Manual Revision 02 20 59 Copyright 1999 2011 MIPS Technologies Inc All rights reserved e arch reset bootvector The file reset S e arch reset Architecture dependent assembler files e init Architecture independent code in c file format e arch init Architecture dependent code in file format The function reset vector in file arch reset bootvector reset S is invoked following a reset This function detects the en
58. ontroller sr a branch is taken to an Interrupt Controller Routine ISR specific to each line of the interrupt controller MIPS YAMON Reference Manual Revision 02 20 44 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Exception Handling EXCEP Module An interrupt controller IC ISR may be registered for any specific line of the interrupt controller A default IC ISR may be registered for handling interrupts on lines not handled by any other IC ISR The function controller sr will pass control to the ISR registered for the interrupt that occurred the default IC ISR If no ISR not even a default IC ISR has been registered the super default handler is invoked as described above Registration of an ISR is done using the EXCEP module API as described in Section 7 8 EXCEP APT If an ESR returns a jump is performed to function exc handler which will restore the context and perform an eret or deret instruction based on whether the exception was normal or ejtag The ESR registered for interrupts interrupt_sr will return this way unless the super default handler is called interrupt with no registered ISR in which case YAMON will print a register dump and restart Instead of returning an ESR may itself call exc handler ret EXCEP exc handler ret has the fol lowing format F F k e ER ERR he ek hehe He He he
59. perform the same operation as the indexed I cache operation on the line if any containing the virtual address Addressed D cache operations will perform the same operations as the indexed D cache operation on the line if any containing the virtual address Note that the functions sys icache invalidate addr and sys icache invalidate al1 also flush the CPU pipeline by performing an eret instruction actually performed by the function sys 1ush 1 This is required because instructions in the cache line being invalidated may already be in the CPU pipeline MIPS YAMON Reference Manual Revision 02 20 29 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 5 3 Other Cache Issues Table 5 1 Cache Functions Function Description void Invalidate I cache line at location defined by index Sys icache invalidate index UINT32 index void If any I cache line contains address invalidate the line Sys icache invalidate This function also flushes the pipeline UINT32 address void Invalidate entire I cache and flush the pipeline Sys icache invalidate all void void If the D cache line at location defined by index is valid and sys_dcache_flush_index dirty write the line to memory Invalidate the line UINT32 index void If any D cache line contains address perform the follow sys_dcache_flush_addr ing UINT32 addr If the line is valid a
60. ps to ADP31 12 2 4 arch pci slot intline This function determines the interrupt line for the interrupt controller used for the PCI slot identified by the PCI device number 12 3 Adaptation of pci core c The following subsections describe the functions that must be adapted in pci core c 12 3 1 arch pci config controller This function is called from the pci_config function described above see Section 12 2 Adaptation of pci platform c It configures the system controller Northbridge device according to the setup determined by pci config and performs any other PCI related initialisation of the controller For a specific platform this functionality may be moved to pci con ig However because the Malta board sup port several Core boards with different system controller devices it makes sense for these boards to keep the Core board specifics in a separate file Any fixed requirements for memory and I O mapping set by the system controller should be setup by this function setup array and adjust count The system controller data controller must also be setup 12 3 2 arch pci config access This function is used for generating PCI configuration cycles read or write If no device responds the function must return the error value ERROR PCI ABORT 12 3 3 arch pci lattim This function determines the latency timer value to be written to the PCI device 12 3 4 arch pci multi
61. put above void Sys puts UINT32 port char s void sys_putchar UINT32 char define PUT define PUT port ch s sys puts port s CHAR port ch sys putchar port ch MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 38 Shell 39 shell puts and shell_putc are implemented in shell shell c and defined in include shell api h bool shell char string UINT32 indent bool shell_putc char ch UINT32 indent define SHELL PUTS s shell puts s 0 define SHELL PUTS INDENT s indent shell puts s indent define SHELL PUTC c shell putc c 0 define SHELL PUTC INDENT c indent shell putc c indent shell puts and shell perform the following actions sys puts and sys putchar do not do this e Always output to ttyO e Keep track of the number of characters displayed on the current line e Allow request for a specific indentation e Keep track of the current line number e Each MON DEF LINEMAX 24 numbers of lines display the following message and await a keypress before replacing the message with the requested text and continuing Press any key Ctrl C to break Enter to singlestep Incaseactrl c is detected at any line indicate this to the calling function by returning TRUE Otherwise return FALSE The Pres
62. ranch to Exception Service Routines ESR registered for the particular exception cause code Spe cial handling of NMI cache error and EJTAG exceptions 3 The function interrupt is registered as the ESR for cause code Interrupt This function performs a second level branch to CPU Interrupt Service Routines CPU ISR for the particular sw and hw interrupt num ber 4 Aspecial CPU ISR controller sr may be registered for the hw interrupt used by the interrupt controller if one is used This function performs a third level branch to Interrupt Controller Interrupt Service Routines IC ISR for the particular interrupt line Each level may be intercepted by application programs by hooking of the vector or registration of a specific or gen eral entry The following exceptions are handled e Reset exception see Section 7 2 Reset Exception e NMI exception see Section 7 3 NMI Exception e EJTAG exception see Section 7 4 EJTAG Exception e CACHE ERROR exception see Section 7 5 Cache Error Exception e FPU exception see Section 7 6 FPU Exception e Other exceptions including interrupts see Section 7 7 Exception Handlers The following is a summary of RAM based exception vectors including two vectors allocated by YAMON e 0 80000000 TLB refill e 0 80000080 XTLB refill MIPS YAMON Reference Manual Revision 02 20 41 Copyright 1999 2011 MIPS Technologies Inc All rights reserv
63. re three linker scripts used when generating code suitable for use on a hardware simulator Modifications include linking all code and initialized data to RAM except the very first code located at the reset vector This way code and initialized data need not be copied from flash E PROM to RAM When building an image for use on a hardware simulator we also assume that the caches need not be initialized and RAM need not be cleared Avoiding these time consuming tasks is a big benefit when simulating the hardware The symbol SIMULATE is defined by makefile and used for conditional compilation of relevant parts of the code The linker scripts used for this code are bin link link sim xn bin link link el sim xn bin link link eb sim xn The make procedure requires a Perl script for conversion of formats bin tools srecconv pl srecconv pl converts s record file to two files A file with the image in the format required for download to flash using the parallel port or USB and a binary file in the format required for programming an E PROM device The file used as input file for 1 yamon lt rev gt rec is not a normal s record file It is created by the makefile by concatenating the 3 images start up code little endian code and big endian code Also the special strings B and L have been inserted in yamon lt rev gt rec in order to notify srecconv p1 about the endian ness of the 3 sections
64. rld The shell implements command line history and editing Previous commands may be recalled by typing Ctrl p or arrow up The shell accepts the control codes shown in Table 6 1 VT 100 control sequences are used for the arrows ESC B ESC C ESC D Table 6 1 Command Line Recall Editing Commands c Bw ee Ctrl p arrow up Recall previous command in command stack do not perform it Ctrl n arrow down Recall next command in command stack Ctrl a Move to first character MIPS YAMON Reference Manual Revision 02 20 34 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Shell Table 6 1 Command Line Recall Editing Commands Continued NEL NENNEN Ctrl h DEL Delete character to the left of cursor position Ctrl k Delete characters from cursor position to end of line Ctrl u Delete line Ctrl c Cancel current line Command completion Commands may be auto completed by pressing TAB Also the shell attempts to auto complete commands when pars ing them However a minimum 2 characters must be typed before auto completing For example if the user enters he the command help will be performed 6 2 Shell Commands The following subsections describe aspects of shell commands 6 2 1 Command Registration Shell commands are defined in the file include shell api h shell api h defines the following command structure
65. s FPU will result in the floating point exception path being fol lowed and the operation terminated with SIGFPU e Ifthe FPU environment variable is set to use the FPU emulator before flashing the system with a non FPU YAMON the contents of the environment variable will be erased on first boot If you wish to alter the behaviour of the non FPU system without using the GPL FPU use the file cop1 c in the puemul directory which contains the function that handles the exception branch from handler 5 For more information regarding the need for a soft FPU on a system with a hardware FPU consult Chapter 7 4 of See MIPS Run Linux Second Edition by Dominic Sweetman MIPS YAMON Reference Manual Revision 02 20 56 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 10 System Header Files This chapter describes the header files used by YAMON The main system header file is include sysdefs h sysdefs h includes among other things the following e Definitions of integer types UINT32 UINT16 etc Macros converting to KSEGO KSEGI KUSEG etc addresses Endianness swapping macros e definition of the UART used by the shell DEFAULT PORT set to PORT TTYO e definition of the UART used by GDB DEFAULT GDB PORT set to PORT TTY1 If a board has only a single tty available DEFAULT GDB PORT symbol is ignored and PORT is used for the GDB port Refer to the sourc
66. s This variable should usually be set to FALSE The t option structure is defined in shell api h and has the following layout typedef struct char option Name of option char descr Description of option t cmd option The fields of the cmd option structure are described in Table 6 3 Table 6 3 t cmd option Structure Field Description option Null terminated string containing the name of the option All options will be prefixed with the character descr Null terminated string containing a textual description of the option Used by the help command A command is registered by calling the following function also defined in shell api h void shell register cmd t cmd cmd Command to be registered The function implementing a command has the following format UINT32 name UINT32 argc char argv MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 36 Shell The maximum number of commands registered is defined by the symbol 50 in shell shell init c 6 2 2 Command Invocation Repeating the above example assume the user has created an environment variable test using the following com mand setenv test Hello Now assume the user enters the following line echo test world The shell will pass the following arguments to the function regi
67. s any key message feature may be disabled enabled by calling the following function implemented in shell c and defined in shell api h void shell setmore bool enable more define SHELL DISABLE MORE shell setmore FALSI define SHELL ENABLE MORE shell setmore TRUE Note that the print function will not update the line number It is recommended that shell commands use either printf sys_puts sys_putchar or shell puts shell 0 not both Please observe that the ctrl c information is volatile and disappears after sys getchar sys getchar 1 shell puts and shell 0 In order to catch ctrl c correctly the return value of these functions must always be checked MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 6 2 Shell Commands MIPS YAMON Reference Manual Revision 02 20 40 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Chapter 7 Exception Handling EXCEP Module This chapter describes how exceptions are handled by YAMON 7 1 Overview Exceptions are handled in four steps 1 Assembler code is installed at exception vector locations storing context and forwarding vectorized exceptions to single C language entry point for non EJTAG exceptions exception sr and language entry point for EJTAG exceptions exception ejtag Q 2 First level b
68. saved in structure shell context while a go or gdb command is executing with stack space allocated in init S Exception context with stack space allocated in excep 5 This context includes set up of register gp to YAMON s value which enables exception routines to access all of YAMON s variables and functions At entry current context is saved in structure exc context EJTAG exception context with stack space allocated in excep S This context includes set up of register gp to YAMON s value which enables exception routines to access all of YAMON s variables and functions At entry the current context is saved in the structure ejtag context Application context saved in structure appl context with stack space allocated in init S 8 3 Go Command The go command first examines the arguments and sets up the initial application context This is defined by the fields of the structure user context of type t gdb regs as described in Table 8 1 Then the application is invoked using the following mechanism which is by the way shared with the command gdb First the application context appl context is set up as shown in Table 8 1 Then shell to shift user in shell go c is called which causes a shift to the application context in the fol lowing way The function app1_exception is registered as default ESR Exception Service Routine If the application is being run through GDB app1_exception is also registere
69. se duplication reproduction release modification disclosure or transfer of this information or any related documentation of any kind is restricted in accordance with Federal Acquisition Regulation 12 212 for civilian agencies and Defense Federal Acquisition Regulation Supplement 227 7202 for military agencies The use of this information by the Government is further restricted in accordance with the terms of the license agreement s and or applicable contract terms and conditions covering this information from MIPS Technologies or an authorized third party MIPS MIPS I MIPS II MIPS III MIPS IV MIPS V MIPSr3 MIPS32 MIPS64 microMIPS32 microMIPS64 MIPS 3D MIPS16 MIPS16e MIPS Based MIPSsim MIPSpro MIPS Technologies logo MIPS VERIFIED MIPS VERIFIED logo 4K 4Kc 4Km 4Kp 4KE 4KEc 4KEm 4KEp 4KS 4KSc 4KSd MI4K 5K 5 5Kf 24K 24 24Kf 24 24KEc 24KEf 34 34Kf 74K 74 74Kf 1004K 1004Kc 1004Kf 1074K 1074 1074Kf R3000 R4000 R5000 ASMACRO Atlas At the core of the user experience BusBridge Bus Navigator CLAM CorExtend CoreFPGA CoreLV FPGA View FS2 FS2 FIRST SILICON SOLUTIONS logo FS2 NAVIGATOR HyperDebug HyperJTAG IASim JALGO Logic Navigator Malta MDMX MED MGB microMIPS OCI PDtrace the Pipeline Pro Series SEAD SEAD 2 SmartMIPS SOC it System Navigator and YAMON are trademarks or registered trademarks of MIPS Technologies Inc in the United Sta
70. served 54 FPU Emulator 9 7 Trampoline Code A special problem exists when emulating FP branch instructions This is only relevant if there is no H W FPU or it is disabled via the bit in SR When the FP instruction has been emulated the instruction in the branch delay must also be emulated To avoid having a complete integer instruction emulator a so called trampoline is used The instruction from the branch delay is copied to the area above the user s stack pointer followed by an invalid COPI instruction The EPC is set to point the this area before calling eret The invalid COPI instruction ensures that the emulator will regain control and in turn setup the correct EPC produced by the branch Note that this is self modify ing code so the caches must be invalidated WARNING If the emulator is ported to a system which supports multiple users e g Linux the trampoline code must be thor oughly inspected Beware not to execute the outstanding branch delay instruction from kernel space The instruction must be copied to and executed from user space A suggested implementation is as follows e Make sure all users have 16 20 for 64 bit addressing bytes of stack allocated for this purpose e the outstanding branch delay instruction to the user s stack SP 0 e Place an invalid COPI instruction after it SP 4 e Place a cookie at SP 8 Save the next EPC SP 12 e Execute eret e nthe exception handler c
71. stem Configuration SYSCON module e PIC32 IO via PIC32 support The list shown above corresponds to the following code in initswitch h switches to control which modules to install in YAMON define INCLUDE SYSCON define INCLUDE IO define INCLUDE EXCEP define INCLUDE RTC define INCLUDE FREQ define INCLUDE PCI define INCLUDE IIC define INCLUDE EEPROM IIC define INCLUDE FLASH STRATA define INCLUDE SYSENV define INCLUDE ENV define INCLUDE SERIAL define INCLUDE LAN SAA9730 define INCLUDE LAN AM79C973 define INCLUDE NET define INCLUDE IDE define INCLUDE NEWSC define INCLUDE PIC32 db db db db db db db The sequence of module initialisation is important because some modules depend on others Therefore changing the sequence should be done with great care Modules are initialised by the function initmodules in file arch init platform initmodules c initmodules is called during initialisation of YAMON see Section 17 Initialisation Code 3 2 System Configuration SYSCON module YAMON is designed to determine the hardware platform board and CPU at run time and configure itself accord ingly Many parts of the code in particular the shell and the drivers do not have any information about the specific plat form but acquire platform specific data for example the memory mapping of devices serial por
72. stered with name echo argc 3 argv 0 echo argv 1 Hello argv 2 world The shell will change line print n before passing control to a command The shell will not change line before printing the new prompt upon command return 6 2 3 Error Reporting The command function returns an error code as described in Chapter 4 Error Handling on page 25 The following generic code indicates no error OK A command may request additional information to be displayed by setting the string pointer shell error data This should always be done in case of illegal options in which case shell error should point to the string containing the illegal option command may also include hint for solving a specific error by setting the string pointer shell error hint The shell looks up the error text using SYSCON as described in Chapter 4 Error Handling on page 25 and displays it 6 2 4 Command Input Output The following subsections describe how shell commands may receive data from the UART and transmit data to the UART 6 2 4 1 Input Commands may receive characters from the terminal by calling the following functions implemented in sys sys c and defined in include sys_api h bool sys getchar UINT32 port 37 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved char ch bool sys getchar ctrlc UINT32 port de
73. t data etc and other centralized system data through a System Configuration SYSCON module SYSCON is divided into an architecture independent part implemented in the files syscon syscon c syscon syscon_tty c and an architecture specific part implemented in the files arch syscon cpu syscon_cpu c arch syscon platform syscon_platform c arch syscon platform syscon_platform_tty c arch syscon platform core syscon_core c The SYSCON API is defined in the header file MIPS YAMON Reference Manual Revision 02 20 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Modules arch include syscon api h The SYSCON API defines the following interface functions INT32 SYSCON init void INT32 SYSCON read UINT32 param id IN one of the SYSCON xyz ID param id s void param INOUT parameter value mr UINT32 param size IN parameter size bytes INT32 SYSCON_write UINT32 param_id IN one of the SYSCON xyz ID param id s void param IN parameter value UINT32 param_size IN parameter size bytes SYSCON_init is called during YAMON initialisation It initializes the internal data structures of the SYSCON module SYSCON_read and SYSCON_write functions are called whenever software modules need to access system parameters Each parameter is identified by a unique ID defined in the SYSCON API header file SYSCON objects may be read through the applica
74. tes and other countries All other trademarks referred to herein are the property of their respective owners Template nB1 03 Built with tags 2B MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Table of Contents Chapter 1 7 met Pe pn oy nee Y 7 Chapter 2 es 11 COIN hehe d ase tinea 11 2 1 1 BMV INO tient 11 2 11 XH ET 12 2 ideo watts e ica thee a dud 12 2 8 Makefile 14 NOE EL TU UII E M 16 19 3 1 SUMMARY OF Modules ent wetter 19 3 2 System Configuration SYSCON module sse ener enne nens 20 9 9 Diver APL UO Module raise Nenana esee taeda i a rischi E 21 OSI 22 813 2 Generic Diver SerViGBS adie avails 22 Chapter 4 Error t 25 Chapter 5 Cache Funct 29 De PMO GU CHO 29 5 2 Cache Operations du EP 29 5 3 Other Cache SSUES aso sortent odeur et aep pesce AEEA OE A T 30 S wh d
75. tine ESR may be registered for any specific exception cause code A default ESR may be registered for handling exceptions not handled by any specific ESR If no ESR not even a default ESR has been registered a super default handler is invoked which will print a register dump to ttyO and restart YAMON shell Registration of an ESR is done using the EXCEP module API as described in Section 7 8 EXCEP API Second level A specific ESR is the function interrupt 5 which is registered by YAMON for the cause code Interrupt In interrupt sr a branch is taken to an Interrupt Service Routine CPU ISR specific to each hardware or software interrupt line of the CPU An Interrupt Service Routine ISR may be registered for any specific hardware or software interrupt line of the CPU A default ISR may be registered for handling hw sw interrupts not handled by any other CPU ISR interrupt sr will pass control to the CPU ISR registered for the interrupt that occurred or the default CPU ISR If no CPU ISR not even a default CPU ISR has been registered the super default handler is invoked as described above Registration of an CPU is done using the EXCEP module API as described in Section 7 8 EXCEP Third level A specific ISR is the function controller sr which is registered by YAMON for the interrupt port used by the interrupt controller if an interrupt controller is available In c
76. tion interface see Section 8 3 1 Application APT In order to retain backward compatibility with YAMON 02 00 IDs used for YAMON 02 00 SYSCON objects were kept unmodified in this version of YAMON New object IDs are always allocated after IDs from previous versions 3 3 Driver API IO Module 21 YAMON s access to supplied hardware is organized into a number of drivers with a common API Currently the fol lowing drivers are available e EEPROM driver for NM24CO device e IC driver for SAA9730 device e driver for PITX4 Southbridge device e IC driver for SEAD 3 Basic RTL and MIPS SOC it 101 Driver for flash devices conforming to the Common Flash Interface CFI specification e LAN driver for SAA9730 Ethernet device e LAN driver for AM79C973 Ethernet device e Real Time Clock driver for DS1687 compatible devices e UART driver for SAA9730 UART device e UART driver for TI16550 compatible UART devices MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 3 3 Driver API IO Module DE driver for PIIX4 South bridge device e NEWSC driver for controlling NEWSC buttons e PIC32 driver for communicating with the PIC32 chip All drivers are accessed through an Input Output IO module implemented in the file io io c The API is defined in the file include io api h The API defines interface functions which can be grouped into e
77. ual Revision 02 20 33 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 6 1 Introduction e For each sub command perform the following actions e Expand environment variables 99 e Call execute_line recursively so that further separation caused by expansion of environment vari ables may occur This allows for alias like use of environment variables like setenv x echo abc echo def x In the recursive call instead of expanding environment variables the sub command is divided into tokens and executed by calling function execute command The return code from execute command is used for error handling by calling function shell command error Note that environment variables are not expanded recursively in order to avoid problems with cyclic dependencies This is illustrated in the following example YAMON gt setenv x echo Sy YAMON gt setenv y echo x YAMON gt x Sy YAMON gt The function execute_commandd performs the following actions Lookup function registered for the command name e Call function using traditional argc argv based argument passing As an example assume the user has created an environment variable test using the following command Setenv test Hello Now assume the user enters the following line echo test world This will be expanded to three tokens which are passed to the function registered for the echo command echo Hello wo
78. w E O EE E rS 31 91 di Mae 33 5 1 IMINO GU CH c 33 8 2 E E A 35 1 Command Iso MEZ LIS EE LLL 35 235Co ndilivecaho 37 6 2 3 REPOMING ee 37 6 24 Command MPU OUUTE N E N 37 Chapter 7 Exception Handling EXCEP Module nnne 41 EE I OO 41 canini cuo dt et nadie don 42 pee 42 TA meom e EE 43 7 5 Cache hederae rci Erase N enses ure Redes RE pcena A AA Ex OIM dnd 43 1 02 FEU ENG 43 7 7 EE 43 43 42 8xcoptionzsm 44 POO ERGEP AP O E E E M 45 7 9 Platform Adaptation of Interpt Controler accio 46 3 MIPS YAMON Reference Manual Revision 02 20 Chapter 8 Applications 47 47 SEAD S Secondary Boot
79. ware projects YAMON actively supports the following boards e SEAD 3 SEAD 3 boards may be equipped with CPU cards that include one or more 532 M14K or M14Kc CPUs SEAD 3 boards are shipped with a system controller Basic RTL included for the on board FPGA YAMON sup ports Basic RTL revisions up to and including 01 03 and MIPS SOC it 101 System Controller Revision 1 1 Malta boards may be equipped with various Core cards A core card includes a CPU a system controller aka Northbridge and an SDRAM module Table 1 1 shows the core cards and CPUs supported by YAMON for the available boards MIPS YAMON Reference Manual Revision 02 20 7 Copyright 1999 2011 MIPS Technologies Inc All rights reserved Table 1 1 Supported Core Boards and CPUs Board Types CoreLV CoreFPGA QED5261 Board Core 24K Available CPUs MIPS32 4K class CPUs MIPS32 4K class CPUq MIPS64 5K class MIPS64 5K6 class CPU CPUs MIPS32 M4K in FPGA System Controller GT64120 MIPS SOC it 101 Supported by Malta Yes Yes Board Types CoreFPGA 2 Core20K CoreBonito64 PC ant SEAD 3 CoreFPGA 5 MIPS32 4K class CPUs MIPS64 5K class CPUs Available CPUs MIPS64 20 QED RM5261 MIFS320 24KO MIPS32 M14K MIPS64 25Kf QED RM7061A MIPS32 MIPS32 M14Kc MIPS32 34K MIPS32 74K M
80. x on a multi core system are as follows 1 2 On power up YAMON initializes and brings up coreO If other cores are detected it also initializess and brings up those cores and sets them to run a polling program 0 continues to run YAMON Each core except core0 will set the LAUNCH FREADY flag described below in its corresponding CPULAUNCH array the cpu number is used as the index into the array and then enter polling mode to poll for the LAUNCH FGO flag which is set later by Linux From YAMON set up system to run Linux refer to Reference 10 Linux starts to run on core0 When Linux is ready to start the other cores it checks the LAUNCH FREADY flag to ensure the readiness of a core It then programs the CPULAUNCH data e g pc sp gp in that core s CPULAUNCH array and sets the LAUNCH FGO flag Linux then waits for the polling program to set the LAUNCH FGONE flag to ensure the core has started This is repeated for each available core At this point all cores should be running as expected The CPULAUNCH array 0x80000f00 is a struct typedef struct unsigned long pc unsigned long gp unsigned long Sp unsigned long a0 unsigned long _pad 3 pad to cache line size to avoid thrashing unsigned long flags cpulaunch t The core is used as an index into the array 51 MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technol
81. y particular platform so they share the error range The range 0x000 to OxOFFF is reserved for non unique error codes bypassing the global error handling system This range is not used in this version of YAMON A module registers an error lookup function to SYSCON This function converts a specific error number within the module domain to text strings describing the error The SYSCON ID used for registering an error lookup function is SYSCON ERROR REGISTER LOOKUP ID MIPS YAMON Reference Manual Revision 02 20 Copyright 1999 2011 MIPS Technologies Inc All rights reserved 25 The following code from sysenv sysenv c illustrates the registration mechanism t sys error lookup registration registration register lookup syserror registration prefix SYSERROR DOMAIN ERROR SYSENV registration lookup SYSENV error lookup SYSCON write SYSCON ERROR REGISTER LOOKUP ID amp registration sizeof registration I The lookup function has the following format from syscon_api h typedef INT32 t sys error lookup t sys error string p param INOUT code to string s The input output parameter is a pointer to a structure of type sys error string defined as follows from syscon api h typedef struct sys error string UINT32 syserror system error code to be converted mr UINT32 count number of string pointers returned UINT8 strings point

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