User Manual - Connect Tech Inc.
Contents
1. DSR 11 6 v 28 4 DCD 19 P1 a DCD 15 V 28 2 RTxC 17 a p RTxC 8 v 28 SYNCA4P I1 E a eL op MY Paar Pari a EE BI 11 SYNC P 22 V 28 IM BH wvilviilviilwviilvoslwvi V28 2 TRxC 413 E E a eens 2 5 eR a e e A e ea e Bo fil TRxC P V 11 v 28 EU TS 15 V 1187 Vos fti GND 1 13 1 7 GND GND GND GND GND GND GND GND Notes Hl Tri State I WV 35 Termination Network is Pl Hi Z resistance gt 10K Q to GND applied between the and Bl When Signal is an Output signals 7 When Signal is an Input V 10 RS 423 5l 120 Q termination resistor is applied between the V 11 RS 422 V 28 RS 232 and signals V 35 V 35 Line Termination The multi mode transceiver provides line termination networks built into the chip Switches 5 and 6 on DIP switch SW1 disable or enable these networks for channels A and B on the ComSync 104 Please contact Connect Tech support for more information concerning these line termination networks Please refer to the Line Interface Mode table listed above concerning the ComSync 104 signal assignments and related notes Figure 3 Line Termination DIP switch SW1 Line termination enable disable switches ON enable line termination OFF disable line termination ar This example shows the default setting with RX RTxC and TRxC Receiver Terminations2. Controls the direction of the TRxC pins of the Reset state is an Input Line Interface to match the setting of the ESCC WR4 5 4 3 2 Various SYNC modes which Controls the direction of the SYNC pins of the require the SYNC pin to bean Line Interface to match the setting of the ESCC Input Reset to Async mode SYNC is an input when External SYNC is selected or Async mode is selected All other times SYNC is an Output WRI 6 Changes functionality of the When programmed to the WAIT function and W REQ pin Reset state is the the WAIT Enable I O 7 7 bit is ON the card WAIT function will generate wait states onto the PC 104 Bus during Data reads or writes using the IOCHRDY signal USE EXTREME CAUTION WHEN USING THIS MODE INFINITE WAIT PERIODS CAN OCCUR When programmed for the REQ function the ESCC pin becomes the DMA signal DRQn WR14 2 Changes the functionality of the When programmed to the DTR function the DTR REQ pin Reset state is DTR z signals on the line interface are supplied the DTR function by the ESCC WR5 7 and the DMA signal DROn is disabled When programmed to the REQ function the ESCC pin becomes the DMA signal DRQn and the DTR line interface signals are provided by the I O 4 0 1 bits Security Feature Due to the specialized nature of this product users may wish to Secure their software to the use of the CTI hardware This is similar to the use of a Software Security Dongle somet
3. Arrow Road Guelph Ontario Canada NIK 1S6 Note Please go to the Download Zone or the Knowledge Database in the Support Center on the Connect Tech website for product manuals installation guides device driver software and technical tips Submit your technical support questions to our customer support engineers via the Support Center on the Connect Tech website Table of Contents Limited Lifetime Warranty eere RENTES d Vet ate eed aSk DUI BESSEREN E Peu esu E te rep ege 2 Copyright vro tpe 2 Trademark AXcknowledbmell se siue eye eese tao S ESSE SNR e RON axsdensvsdice saben egscunsstnesseteevensestce 2 Customer Support COVERY IG Was Cewsss eve esee dtes s eo te REWAR IE MER ce Meere rikoe EEUU Um ee MN EUN SONS 3 Contact EC EIER TIE TET RE 3 Table OF COritentsca eter terrere tet ene o ena ete Ree Se sre ese tele ee eee ees Ere te soe ek ESAE 4 Ec e 4 IECIT ee EE T EE 4 Holes i e POTESTIS TTL TP 5 IntrOQUCtlOf eedoeeeee cete teet eeo tete ene d vetro tee se ee desse s ese tuse eese ebeten lese redu Pres ks URN e eee eene Oda 5 UFER EN E EE ve ve e tae eee eo vE vene cin Une eR ve e o hae Eee ERE Ve ee kh o Uus ee we ee Line eau va V Eee ue ki e one ER Ve eue 5 Hardware Installaatiot eei dioe ee eese ev eoe eoo roa aeneo cuve va aee e oo eu aao eaae o en vua Pa eaa eo eo ebay un 6 InnOVative VO Str Ct fe ei sees eroe cs oe reae ae ee ee eret eo anke ee pore veto Pese
4. Down Revision C and proceeding As noted in the Shared IRQ section the chosen IRQ requires a pull down resistor 1K in order to operate correctly There can be only one pull down resistor for each shared IRQ To enable the pull down turn On the pull down Enable bit I O 8 1 This activates a 1K pull down to GND resistor on the programmed IRQ Remember if you have two or more cards sharing an IRQ only one of them should have the pull down enabled Software Selectable Line Interface Modes The Serial Line Interface utilizes Sipex devices SP507 on Revision A and B cards or SP508 on Revision C and proceeding cards Refer to the data sheet for these devices for all electrical characteristics of the interface The Line Interface Mode is software selectable for each Channel The following Modes are available Table 5 Line Interface Mode Settings Line Interface Mode Settings Pin 5 binary values T O address offset 7 bits 0 1 2 are for Channel A amp bits 3 4 5 are 26 Pin 25 pin for Channel B TX 2 mp o RX 6 16 V 118 v 118 vi vii y 35lel viel Pl P1 RX 5 V 118 v 35 y 115 V DTR 20 23 Vill il V1 V 11 a V 11 DTR 14 20 V 11 V 10 V 11 V 11 V28 V 11 V 28 1 CTS 25 13 V11 V11 V 11 V 11 Pl vil B 2 CTS 9 5 VAL VIL VII V 11 V28 V 11 V 28 2 DSR 18 22 V vaii E Vl E E s 2 N Signal Header D Sub 000 001 010 011 100 101 110 111
5. Enable bits should be turned on for the desired channel For example Bits 0 and 1 for Channel A Bits 2 and 3 for Channel B Multi Drop To create this setup only the TX RTS Enable bit should be turned on for the desired channel For example Bit 1 for Channel A bit 3 for Channel B I O Connect Pin Assignments Table 7 Pin Assignments Header DB 25 Signal Header DB 25 Signal Pin Pin Pin Pin 1 1 GND 14 20 DTR 2 14 TX 15 8 DCD 3 2 TX 16 21 4 15 TRXC 17 9 RTXC 5 3 RX 18 22 DSR 6 16 RX 19 10 DCD T 4 RTS 20 23 DTR 8 17 RTXC 21 11 SYNC 9 5 CTS 22 24 SYNC 10 18 23 12 TRXC 11 6 DSR 24 25 12 19 RTS 25 13 CTS 13 7 GND 26 View facing 26 pin header 235 23 2 19 17 15 13 411 9 7 5 3 1 V OR ER ER 9M M OM OA A 6 pin header ND NE OO SS SS AY Printed circuit board Top view of DB 25 cable 4 26 pin cable header Arrow pin 1 Red stripe pin 1 Ribbon Cable Female DB 25 Connector 2 a I O Address and I O Mode Setup The Base I O Address and the I O mode are selected via a miniature Dip Switch When the Basic mode is selected the card only decodes eight consecutive addresses If Enhanced Mode is used then 64 consecutive addresses are used The following are the selections Table 8 I O Address Selection SWI Base I O 1 2 3 4 Address off Off Off X 0x100 On Off X 0x14
6. disabled SW1 5 is set OFF for Channel A SW1 6 is set OFF for Channel B RS485 Modes Revision C and proceeding The ESCC can manipulate the RTS signal to perform a variety of Line Transceiver enabling and other signaling related to operation in either asynchronous or SDLC modes Refer to sections 4 2 1 and 4 4 1 of the Zilog ESCC manual Also see the description for registers WR5 1 WR7 2 and WR10 2 for additional information about RTS control operations on the ESCC The card allows the RTS signal to control the Line Transceivers for the TX and RX TX and RX signals only A two wire Half Duplex or four wire Multi Drop style of interface can be achieved Note The ESCC does not control RTS completely autonomously software is required to perform some of the RTS control Table 6 Control Bits I O Offset 9 Contra Bit RTS State 8 d RX RTS Enable Channel A On RTS low RX Receiver will be disabled Allow RTS to control RX Enable Off RTS high RX Receiver will be enabled TX RTS Enable Channel A On RTS low TX Driver will be enabled Allow RTS to control TX Tri State 2 RX RTS Enable Channel B Same as above Same as above Aoverstecmorex Ee M mt 3 TX RTS Enable Channel B Same as above Same as above 2 AoversecmeTx a Notes 1 The RX Enable control bit function will only operate if the TX Enable bit is also On Examples Half Duplex Setup To create this setup both the RX RTS Enable and TX RTS
7. ie e npe reete ree e moie ee eet eee 8 Table 3 Register Bit Cloning ete etie so naine eSEE EErEE E erred MIDI SD renta tie epe pend 9 Table 4 IRQS eee eet nete nee tbe be ae p uere i ede ise a 10 Table 5 Line Interface Mode Settings essessssssseesesseeeeeeee eene EET TEEDEST nenne trennen nenne 11 Table 6 Control Bits iore terr ente bee eU eve eR Eee Coo bine eve uii ve A nie bie RENE v te 12 Table 7 Pin Assignments ueniet entere ert etie ei ie eeepc eb aee EOD rei GEk EKOS Eo okoa 13 Tabe g VO Address Selection ene RE RLIMI ee a aa ean HU Udemee a r KES 14 Introduction The Connect Tech Inc ComSync 104 is a 2 channel Synchronous Asynchronous Serial Adapter card for PC 104 Bus systems The card utilizes the features and functionality of the Zilog 85230 ESCC along with an innovative I O structure to provide the user with full featured SYNC ASYNC communications Features Zilog 85230 clocked at 19 6608 MHz allowing bit rates up to 4 9 Mbps Innovative I O structure featuring basic and enhanced I O Choice of seven software selectable electrical interfaces RS 232 RS 422 RS 449 EIA 530 EIA 530 A V 35 and X 21 Support four software programmable DMA Direct Memory Access channels with TC Terminal Count interrupt 85230 Register Bit Cloning Available security features Software selectable IRQ on PC 104 bus and Master Interrupt Enable Software selectable Shared IRQ and Pull Down modes Re
8. 0 Off Off X 0x200 On Off X 0x240 Off Off On x 0x280 On On X 0x300 Off On X 0x340 On On X 0x380 X X Off Basic Mode X X On Enhanced Mode DIP switch SW1 Base I O address amp enhanced l O setup switches This example shows the default setting Base I O address 0x300 Enhanced I O Mode ON
9. Connect Tech Inc Industrial Strength Communications ComSync 104 PC 104 serial communications User Manual T MIHI ess dece 9 ComSyncz194 65859 RevA CTIB 00020 8 jeuubu Channel A p ea 7 Beam uam ziir P Al Connect Tech Inc 42 Arrow Road Guelph Ontario NIK 1S6 Tel 519 836 1291 Toll 800 426 8979 Fax 519 836 4878 Email sales connecttech com URL http www connecttech com CTIM 00012 Revision 0 04 June 2007 Limited Lifetime Warranty Connect Tech Inc provides a Lifetime Warranty for all Connect Tech Inc products Should this product in Connect Tech Inc s opinion fail to be in good working order during the warranty period Connect Tech Inc will at its option repair or replace this product at no charge provided that the product has not been subjected to abuse misuse accident disaster or non Connect Tech Inc authorized modification or repair You may obtain warranty service by delivering this product to an authorized Connect Tech Inc business partner or to Connect Tech Inc along with proof of purchase Product returned to Connect Tech Inc must be pre authorized by Connect Tech Inc with an RMA Return Material Authorization number marked on the outside of the package and sent prepaid insured and packaged for safe shipment Connect Tech Inc will return this product by prepaid ground shipment service The Connect Tech Inc Lifetime Warranty is defined as the serviceable l
10. able 7 Software IRQ 7 Software IRQ g BI RS485 0 3 RX and TX RS485 Modes 0 3 RX and TX RS485 Modes Control 4 7 Reserved 4 7 Reserved 0x20 Ox2F 9 Channel A 0 7 Register Write data 0 7 Register Read data Registers 0x30 Ox3F Channel B O 7 Register Write data 0 7 Register Read data Registers Notes isl 2 3 4 10 Iu See Zilog ESCC user manual for description of functionality DTR control from this I O point is only valid when the DTR REQ pin of the ESCC is programmed for use as a DMA request TC is the Terminal Count signal from the PC 104 Bus which occurs at the end of a DMA transfer When the W REQ pin of the ESCC is programmed as a WAIT function this bit enables WAIT states to occur on the PC 104 Bus When both channels are programmed to operate in DMA mode this bit becomes a TC Interrupt Enable 85230 Registers bits which are cloned Only when Enhanced Addressing mode is enabled Refer to description below for bit meanings I O Offsets 8 and 9 are only available on Revision C or later cards IRQ Selection can be set at I O Offset 8 and 4 same bit numbers Master Interrupt Enable can be set at I O Offset 8 and 7 same bit number Software IRQ will cause the card to generate an IRQ and is mostly used for testing DMA Support To allow fast data reception and transmission the ComSync 104 supports four DMA channels each one is a
11. ful owners of the trademarks and copyrights mentioned in this document Customer Support Overview If you experience difficulties after reading the manual and or using the product contact the Connect Tech reseller from which you purchased the product In most cases the reseller can help you with product installation and difficulties In the event that the reseller is unable to resolve your problem our highly qualified support staff can assist you Our support section is available 24 hours a day seven days a week on our website at www connecttech com sub support support asp See the contact information section below for more information on how to contact us directly Our technical support is always free Contact Information We offer three ways for you to contact us Telephone Facsimile Technical Support representatives are ready to answer your call Monday through Friday from 8 30 a m to 5 00 p m Eastern Standard Time Our numbers for calls are Telephone 800 426 8979 North America only Telephone 519 836 1291 Live assistance available 8 30 a m to 5 00 p m EST Monday to Friday Facsimile 519 836 4878 on line 24 hours Email Internet You may contact us through the Internet Our email and URL addresses are sales 9 connecttech com support connecttech com www connecttech com Mail Courier You may contact us by letter and our mailing address for correspondence is Connect Tech Inc Technical Support 42
12. ife of the product This is defined as the period during which all components are available Should the product prove to be irreparable Connect Tech Inc reserves the right to substitute an equivalent product if available or to retract Life Time Warranty if no replacement is available The above warranty is the only warranty authorized by Connect Tech Inc Under no circumstances will Connect Tech Inc be liable in any way for any damages including any lost profits lost savings or other incidental or consequential damages arising out of the use of or inability to use such product Copyright Notice The information contained in this document is subject to change without notice Connect Tech Inc shall not be liable for errors contained herein or for incidental consequential damages in connection with the furnishing performance or use of this material This document contains proprietary information that is protected by copyright All rights are reserved No part of this document may be photocopied reproduced or translated to another language without the prior written consent of Connect Tech Inc Copyright O 2007 by Connect Tech Inc Trademark Acknowledgment Connect Tech Inc acknowledges all trademarks registered trademarks and or copyrights referred to in this document as the property of their respective owners Not listing all possible trademarks or copyright acknowledgments does not constitute a lack of acknowledgment to the right
13. imes attached to a Parallel port of a PC The function is implemented by CTI engineers with customer input and can be customer specific It is programmed into the PLD logic component on the card during manufacturing The security feature is enabled by setting I O 4 2 setting the required security bits this is customer specific and then reading back the result from I O 5 When finished with the security feature the bit at I O 4 2 is cleared to return to normal operation When the security feature is enabled the following functions are inhibited e Master Interrupt Enable cannot be changed WAIT states are disabled IOCHRDY will not activate on PC 104 bus cycles WAIT Enable cannot be changed Line Interface Mode cannot be changed for either channel Note The function which can be programmed is limited in scope and is NOT as fully featured as one would find on a typical Security Dongle but it is usually sufficiently cryptic to slow down pirates Software Selectable IRQs There are eight IRQ numbers which can be selected by software along with a Master Interrupt Enable as follows Table 4 IRQs Master Enable Setting IRQ Selected YO 7 6 YO 4 3 5 Enabled e 1 ea 3 1 5 1 7 1 9 1 10 1 m 1 6 O 12 1 15 Since the interrupt is programmable the card powers up with all interrupt driving circuits tri stated During software initialization of the card both channels of the ESCC should be set u
14. p first then the desired interrupt should be programmed and finally the Master Interrupt Enable bit set I O 7 6 At this point the chosen IRQ signal will be driven inactive low When the SCC generates an interrupt the selected IRQ will be driven active high by the card When the interrupt has been serviced the IRQ signal will return to the inactive state The IRQ signal is never tri stated during this process On most PC 104 buses the IRQ signals are positive edge activated with a pull up resistor on the IRQ signal usually located on the PC 104 CPU module Therefore it is possible to generate a phantom interrupt when the Master Interrupt Enable bit is turned off During the shutdown of the card when a software driver is stopped or disabled by the operating system the interrupt should first be disconnected disabled from the operating system and then the Master Interrupt Enable bit turned off A false interrupt can be prevented in this way Shared IRQ Revision C and proceeding The Selected IRQ can be shared between multiple ComSync 104 cards This shared IRQ mechanism is designed using the guidelines in the PC 104 Specification V 2 5 appendix C To enable Shared IRQ turn On the Shared IRQ Enable bit I O 8 0 When this bit is On the IRQ signal will be tri stated when it is inactive and driven high when active A pull down resistor is required on the IRQ signal to allow it to operate correctly See IRQ Pull Down IRQ Pull
15. seus ee eee eo asi e e eae eros be Plebe e err PUE Pe arare 6 JASPER 8 85230 Resister INO m 9 Security du Pe ED 9 Sottware Selectable IROS ccccsccsiiessessetesedsoecdeessesesceessvostebossevocs besboceesedeveusesveoteboscevecsbesdeesoee 10 Shared IRQ Revision C and proceeding e eere e eee ee esee ee ette seen seen seta setas tas senos ena 10 IRQ Pull Down Revision C and proceeding cease eee e eerte eee etn ete eto setate sta soo 10 Software Selectable Line Interface Modes e eere eene ee eee eee ee eee e eese ene e e eee nee seen nee 11 Tine TermitatiOD s eoetes oos ct oer eate ep est soos ere Ee pee d ee US eU S Pe eror ed aoro ee gue eus CES ENAA ENS 12 RS485 Modes Revision C and proceeding eee eee eere eter eee ette ette etn etes te setas eaae 12 I O Connect Pin ASSIgMMeE ts wscscsseccssessassensssecsenssoossesessosteseasososseoss suas soessoevesooseonsscesoesesessontess 13 VO Address and I O Mode Setup essent nnne entrent 14 List of Figures Figure 1 ComSync104 board layout preceeding Revision Co eee eeeeeecesecesecesecesecesecaeecneeeaeseaseneeeeees 5 Figure 2 ComSync104 Revision C D board layout sess enne eene nene 6 Figure 3 Lane Terminato ee eroe er t RE RERO OT E EMITE Ee eee yiR US 12 List of Tables Table EAT OD E i cete ceo PORE PO ete ERES 7 Table 2 DM A SUDDpOfL oen teet s
16. ssigned to one of the ESCC DMA Request pins Each channel of the ESCC has 2 request pins which can be programmed as either a combined receive transmit request or as separate receive and transmit requests see the ESCC Users Manual for much more detail The I O of this card will support a DMA Enable for each Channel of the ESCC The DMA support is organized as follows Table 2 DMA Support 85230 PC 104 85230 DMA Chan 85230 Enable DMA signals pin nel Register Bit Bit Function DRQO DTR REQA A I O 4 7 Transmit DMA DACKO DRQI WIIREQA A I O 4 7 Receive or Transmit DMA DACK1 DRQ2 DTR REQB B WR14 2 1 I O 4 6 Transmit DMA DACK2 DRQ3 W REQB B WR1 6 1 I O 4 6 Receive or Transmit DMA DACK3 Note If a Floppy drive is installed in the system then DRQ2 DACK2 are used and should not be used for the ComSync 104 85230 Register Bit Cloning Various features of the ComSync 104 board are set up when certain register bits of the ESCC are programmed This feature is extremely convenient and reduces the redundancy of setup functions When certain bits are written to ESCC registers the card keeps a copy of those bits to perform the setup of card features These Register bits are cloned for each channel of the ESCC to perform the following functions Table 3 Register Bit Cloning ESCC Register Bit s Function on ESCC Function on Card Cloned WR11 2 TRxC pin as an Input or Output
17. upports the Basic mode plus an additional I O region which allows the ESCC registers to be read written in one PC 104 Bus cycle The following table shows the I O Map Table 1 I O Map I O Address Function Bit Definitions Bit Definitions Offset Name Write Read 0 Channel A 0 7 185230 Data register 0 7 85230 Data register Data 1 Channel A 0 7 185230 Control register 0 7 85230 Control register Control 2 Channel B 0 7 85230 Data register 0 7 85230 Data register Data 3 Channel B 0 7 85230 Control register 0 7 85230 Control register Control 4 Status and 0 DTR A P 0 DSR A Control 1 DTR B 1 DSR B 2 Security Feature Enable 2 Security Feature Enable 3 5 IRQ Selection 3 85230 INT pin 4 T O mode 5 TC Interrupt 6 DMA Enable B 6 DMA Enable B 7 DMA Enable A 7 DMA Enable A 5 TC amp any Clear TC Interrupt P 0 7 Security Function Security 6 85230 any Resets 85230 and 0 7 85230 Interrupt Acknowledge Control Register Bit Clones P 7 Misc 0 2 Line Interface Mode A 0 2 Line Interface Mode A Control 3 5 Line Interface Mode B 3 5 Line Interface Mode B 6 Master Interrupt Enable 6 Master Interrupt Enable 7 WAIT TC Enable 7 WAIT TC Enable 8 Bl IRQ O0 Shared IRQ Enable 0 Shared IRQ Enable Control 1 IRQ Pull Down Enable 1 IRQ Pull Down Enable 2 Reserved 2 Reserved 3 5 IRQ Selection P 3 5 IRQ Selection 6 Master Interrupt Enable 6 Master Interrupt En
18. v C and later RS485 Mode support Rev C and later Available Industrial Temperature operating range of 40 to 85 degrees Celsius 40 to 185 degrees F at a reduced clock rate 14 7456 MHz Figure 1 ComSync 104 board layout preceeding Revision C Zilog 85230 ESCC Pin 26 Pini Channel B bes j Channel A ComSync 104 RI Pini 65859 Rev Pin 26 CTIB 00020 P5 Made in Canada P4 swi c 2002 Connect Tech Inc DIP Switch SW1 I O address VO mode Line termination PC 104 bus connector Figure 2 ComSync104 Revision C D board layout Zilog 85230 ESCC Pin 1 Pin 26 Channel B Les a Channel A e L 7 RLI ComSync 104 65859 Rev C 4 Pin 26 Pin1 CTIB 00020 SW1 DIP Switch SW1 l I O address I O mode Line termination att uia PC 104 bus connector Hardware Installation Be sure to configure all dip switch settings prior to the physical installation of your ComSync 104 adapter into your PC 104 stack Innovative I O Structure The innovative I O structure supports either a Basic mode or Enhanced mode of I O interfacing The Basic mode decodes 16 eight prior to Revision C consecutive I O addresses of which 10 are used which supports the ESCC along with Control and Status functions The Enhanced mode is 64 consecutive I O addresses which s
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