Home
HSPICE Device Models Quick Reference Guide
Contents
1. Parameter Default Description PARL1 1 0 strength of lateral electric field gradient PARL2 2 2e 8m depletion width of channel contact junction SC1 13 5V1 short channel coefficient 1 SC2 1 8V2 short channel coefficient 2 SC3 0 0V 2m short channel coefficient 3 SCP1 0 0v 1 short channel coefficient 1 for pocket SCP2 0 0V 2 short channel coefficient 2 for pocket SCP3 0 0V 2m short channel coefficient 3 for pocket Level 64 Narrow Channel Parameters Parameter Default Description WFC 0 0m F cm2 voltage reduction MUEPH2 0 0 mobility reduction Wo 0 0log cm minimum gate width Level 64 Mobility Parameters Parameter Default Description VDSO 0 05V drain voltage for extracting low field mobility MUECBO 300 0cm2 Vs__ Coulomb scattering MUECB1 30 0cm2 Vs Coulomb scattering MUEPHO 0 295 phonon scattering MUEPH1 1 0e7 phonon scattering MUETMP 0 0 temperature dependence of phonon scattering MUESRO 1 0 surface roughness scattering MUESR1 7 0e8 surface roughness scattering NDEP 1 0 coefficient of effective electric field NINV 0 5 coefficient of effective electric field NINVD o 0ov modification of NINV MOSFET Models 85 Parameter Default Description BB 2 0 NMOS high field mobility degradation 1 0 PMOS VMAX 1 0e7cm s maximum saturation velocity VOVER 0 0 velocity overshoot effect VOVERP 0 0 Lgate dep
2. PAT Pseudo Random Bit Generator Source PRBS Function General Form vxxx n n LFSR lt gt vlow vhigh tdelay trise tfall rate seed lt gt taps lt gt lt rout val gt lt gt Or Ixxx n n LFSR lt gt viow vhigh tdelay trise tfall rate seed lt gt taps lt gt lt rout val gt lt gt LFSR Specifies the voltage current source as PRBS vlow The minimum voltage current level vhigh The maximum voltage current level tdelay Specifies the initial time delay to the first transition trise Specifies the duration of the onset ramp in seconds from the initial value to the pulse plateau value reverse transit time tfall Specifies the duration of the recovery ramp in seconds from the pulse plateau back to the initial value forward transit time rate The bit rate seed The initial value loaded into the shift register taps The bits used to generate feedback rout The output resistance Diodes Diodes 11 Diode Element General Form Dxxx nplus nminus mname lt lt AREA gt area gt lt lt PJ gt vab lt WP vab lt LP vab lt WM vab lt LM val lt OFF gt lt IC vd gt lt M vab lt DTEMP vab Or Dxxx nplus nminus mname lt W width gt lt L length gt lt WP vab lt LP vab lt WM vab lt LM vab lt OFF gt lt IC va gt lt M val l
3. General Qxxx nc nb ne lt ns gt mname lt AREA vab lt OFF gt lt Form VBE vab lt VCE vakb lt M vab lt DTEMP vab lt angle brackets gt indicate optional parameters Qxxx BJT element name Must begin with Q followed by up to 1023 alphanumeric characters nc Collector terminal node name or number nb Base terminal node name and number ne Emitter terminal node name or number ns Substrate node name or number t Self heating node name or number mname BJT model name reference AREA Normalized emitter area OFF Sets initial condition to OFF for this element in DC analysis Do not use OFF with VBE or VCE VBE Initial internal base emitter voltage VCE Initial internal collector emitter voltage M Multiplier to simulate multiple BUTs in parallel DTEMP Difference between the temperature of the element and the circuit For more information see http hbt ucsd edu Also see BUT Level 11 UCSD HBT Model in the HSPICE Elements and Device Models Manual 40 Level 9 VBIC99 Model JFET and MESFET Elements General Form for Elements General Form Jxxx nd ng ns lt nb gt mname lt lt lt AREA gt area lt W vab lt L valb gt lt OFF gt lt IC vdsval vgsval gt lt M val lt DTEMP vab Or Jxxx nd ng ns lt nb gt mname lt lt lt AREA gt area gt lt W vab lt L vab gt lt OFF gt lt VDS vdsvab lt VGS vgsval
4. LEVEL Model Index 7 for TOM3 7 TNOM Reference temperature 25 VTO Threshold voltage V 2 VTOTC Threshold voltage temperature V K 0 coefficient ALPHA Saturation factor 1 V 2 BETA Transconductance parameter AN Q 0 1 LAMBDA Channel length modulation 1 V 0 parameter VBI Gate diode built in potential 1 CDS Drain to source capacitance F 1E 12 IS Forward gate diode saturation 1E 14 current KF Flicker noise coefficient 0 AF Flicker noise exponent 1 GAMMA Drain voltage induced threshold 0 voltage lowering coefficient Q Parameter Q to model the non 2 square law of the drain current EG Barrier height at OK used for V 1 11 capacitance model XTI Diode saturation current 0 temperature coefficient VST Sub threshold slope V 1 JFET and MESFET Elements 45 Parameter Description Units Default ALPHATCE ALPHA temperature coefficient K 14 0 exponential ILK Leakage diode current parameter A 0 PLK Leakage diode potential parameter V 1 K Knee function parameter 2 VSTTC Linear temperature coefficient of VK 1 0 VST QGQL Charge parameter FV 5E 16 QGQH Charge parameter FV 2E 16 QGIO Charge parameter A 1E 6 QGAG Charge parameter V 1 1 QGAD Charge parameter V 1 1 QGGB Charge parameter A 1V 1 100 QGCL Charge parameter F 2E 16 QGSH Sidewall capacitance F 1E 16 QGDH Sidewall capacitance F 0 QGGO Charge parameter F 0 MST Su
5. Poli Si thin film transistor TFT model developed by Renssalear Polytechnic Institute It uses the general model statement described in MOSFET Model Statement on page 49 Using LEVEL 62 with HSPICE e Set LEVEL 62 to use the AIM SPICE MOS16 Poli Si TFT model e Default value for L is 100um default value for W is 100um e The LEVEL 62 model is a 3 terminal model No bulk node exists therefore no parasitic drain bulk or source bulk diodes are appended to the model You can specify a fourth node but it does not affect simulation results The default room temperature is 25 C in HSPICE but 27 C in some other simulators You can choose whether to set the nominal simulation temperature to 27 C by adding OPTION TNOM 27 to the netlist MOSFET Models 79 LEVEL 63 Philips MOS11 Model The Philips MOS Model 11 Level 1100 and 1101 are available as Level 63 in the Synopsys HSPICE device models based on the Unclassified Report NL UR 2001 813 by R Langevelde Philips MOS Model 11 Level 1101 is an updated version of Level 1100 It uses the same basic equations as Level 1100 but uses different geometry scaling rules It includes two types of geometrical scaling rules physical rules and binning rules To select these scaling rules use the Version parameter 1100 11010 or 11011 Also for the parasitic diode model the Philips JUNCAP Parasitic Diode Model was added For more information about the MOS
6. lt VCE vakb lt M vab lt DTEMP vab lt tnodeout gt Qxxx nc nb ne nt mname lt AREA val gt lt OFF gt lt VBE vab lt VCE vab lt M vab lt DTEMP vab lt tnodeout gt This second form uses nt as a self heating node but does not use a substrate node AREA Normalized emitter area DTEMP Difference between element and circuit temperature M Multiplier for multiple BUTs in parallel mname BJT model name reference nb Base node name or number ne Collector terminal node name or number ne Emitter terminal node name or number ns Substrate node name or number nt Self heating node name or number OFF Sets initial condition OFF for the element in DC analysis Qxxx BJT element name Must begin with Q then up to 1023 alphanumeric characters tnodeout Identify self heating node from substrate node VBE Initial internal base to emitter voltage VCE Initial internal collector to emitter voltage BJT Element 23 Philips MEXTRAM 503 Parameters The following tables describe MEXTRAM Levels 503 as Level 6 model parameters including parameter names descriptions units default values notes Flags Level 503 Parameter Unit Default Description EXAVL 0 Flag for extended modeling avalanche currents EXMOD 0 Flag for extended modeling of the reverse current gain EXPHI
7. 0 Temperature coefficient of the resistivity of the emitter AB 1 0 Temperature coefficient of the resistivity of the base AEPI 2 5 Temperature coefficient of the resistivity of the epilayer AEX 0 62 Temperature coefficient of resistivity of extrinsic base AC 2 0 Temperature coefficient of resistivity of the buried layer DVGBF V 5 0e 2 Bandgap voltage difference of forward current gain CVGBR V 4 5e 2 Bandgap voltage difference of reverse current gain VGB V 1 17 Bandgap voltage of the base VGC V 1 18 Bandgap voltage of collector VGJ V 1 15 Bandgap voltage recombination emitter base junction DVGTE V 0 05 Bandgap voltage difference of emitter stored charge Noise Parameters Level 504 Parameter Unit Default Description AF 2 0 Exponent of the flicker noise KF 2 0e 11 Flicker noise coefficient of the ideal base current KFN 2 0e 11 Flicker noise coefficient of the non ideal base current Substrate Paramet ers Level 504 Parameter Unit Default Description ISS A 4 8e 17 Base substrate saturation current IKS A 2 5e 4 Base substrate high injection knee current CJS F 3 15e 13 Zero bias collector substrate depletion capacitance VDS V 0 62 Collector substrate diffusion voltage PS 0 34 Collector substrate grading coefficient VGS V 1 2 Bandgap voltage of substrate AS 1 58 e For a closed buried layer AS AC e For open bur
8. 5 0e 3 for HiSIM101 5 0e 6 for others GIDL2 0 0 1 0e 6 GIDL3 0 0 0 3 GLEAK1 0 0 0 01e 6 for HiSIM101 10 0e 3 for others GLEAK2 0 0 20 0e 6 GLEAK3 0 0 0 3 PZADDO 1 0e 3 5 0e 3 NFTRP 100 0e 9 10 0e 9 NFALP 2 00e 15 1 0e 16 MOSFETS To turn off model effects use the following settings e Short Channel Effect SC1 SC2 SC3 0 Reverse Short Channel Effect Quantum Mechanical Effect Poly Depletion Effect Channel Length Modulation Narrow Channel Effect LP 0 QME1 QME2 QME3 0 PGD1 PGD2 PGD3 0 CLM1 CLM2 CLM3 0 WFC MUEPH2 0 90 MOSFET Models
9. 58 59 Meyer amp Charge Conservation IGIDL LX47 GIDL current Meyer and 57 58 59 Charge Conservation ITUN LX48 Tunneling current Meyer and 57 58 59 Charge Conservation Qbacko LX49 Internal body charge 57 59 Ibp LX50 Body contact current 57 59 Sft LX51 Value of the temperature node 57 59 with shmod 1 VBFLOAT LX52 Internal body node voltage if 57 59 you do not specify the terminal Rbp LX53 Combination of rbody and rhalo 57 59 IGB LX54 Gate tunneling current 57 59 MOSFET Models 61 Name Alias Description MOSFET Levels QSRCO LX55 Total Source charge Charge 49 53 Conservation QS 57 59 QG QD QB CQs LX56 Source charge current 57 59 CGEBO LX57 CGEBO dQg dVe intrinsic 57 59 gate to substrate capacitance CSSBO LX58 CSSBO dQs dVs intrinsic 57 59 source capacitance CSGBO LX59 CSGBO dQs dVgq intrinsic 57 59 source to gate capacitance CSDBO LX60 CSDBO dQs dVd intrinsic 57 59 source to drain capacitance CSEBO LX61 CSEBO dQs dVe intrinsic 57 59 source to substrate capacitance weff LX62 Effective channel width 54 leff LX63 Effective channel length 54 weffcv LX64 Effective channel width for CV 54 leffcv LX65 Effective channel length for CV 54 igbo LX66 Gate to Substrate Current Igb 54 Igbacc Igbinv igcso LX67 Source Partition of Igc 54 igcdo LX68 Drain Partition of Igc 54 iimi
10. 666 Source fraction of gate capacitance use with GCAP GCAP F Zero bias gate capacitance DC Model LEVEL 1 Parameters Name Alias Unit Default Description LEVEL 1 0 LEVEL 1 invokes SPICE JFET model BETA amp V2 1 0e 4 Transconductance parameter gain LAMBDA 1 V 0 0 Channel length modulation parameter ND 1 V 0 0 Drain subthreshold factor NG 0 0 Gate subthreshold factor VTO V 2 0 Threshold voltage DC Model LEVEL 2 Parameters Name Alias Unit Default Description LEVEL 1 0 LEVEL of FET DC model BETA amp V2 1 0e 4 Transconductance parameter gain LAMBDA 1 V 0 0 Channel length modulation parameter LAM1 1 V 0 0 Channel length modulation gate voltage parameter ND 1 V 0 0 Drain subthreshold factor NG 0 0 Gate subthreshold factor VTO V 2 0 Threshold voltage JFET and MESFET Elements 43 DC Model LEVEL 3 Parameters Name Alias Unit Default Description LEVEL 1 0 FET DC model level LEVEL 3 is Curtice MESFET model A m 0 5m Active layer thickness ALPHA 1 V 2 0 Saturation factor BETA amp V2 1 0e 4 Transconductance parameter gain Weff M BETAeff BETA Tel D 11 7 Semiconductor dielectric constant Si 11 7 GaAs 10 9 DELTA 0 Ids feedback parameter of TriQuint model GAMDS 0 Drain voltage induced threshold GAMMA voltage lowering coefficient LAMBDA 1 V 0 0 Cha
11. Energy gap for pn junction diode F1EX 0 Bulk junction bottom grading coefficient GAP1 eV K 7 02e 4 First bandgap correction factor GAP2 K 1108 Second bandgap correction factor LAMEX 12K 0 LAMBDA temperature coefficient N 1 0 Emission coefficient MOSFET Elements 53 Name Alias Unit Default Description MJ 0 5 Bulk junction bottom grading coefficient MJSW 0 33 Bulk junction sidewall grading coefficient PTA vV K 0 0 Junction potential PB temperature coefficient PTC V K 0 0 Fermi potential PHI temperature coefficient PTP V K 0 0 Junction potential PHP temperature coefficient TCV V K 0 0 Threshold voltage temperature coefficient TLEV 0 0 Temperature equation LEVEL selector TLEVC 0 0 Temperature equation LEVEL selector for junction capacitances potentials TRD 1 K 10 0 Temperature coefficient for drain resistor TRS 1 K 0 0 Temperature coefficient for source resistor XT 0 0 Saturation current temperature exponent MOSFET Models MOSFET Model Table All Platforms All Platforms LEVEL MOSFET Model Description including PC except PC 1 Schichman Hodges X 2 MOS2 Grove Frohman X SPICE 2G MOS3 empirical SPICE 2G X Grove Frohman LEVEL 2 X model based on SPICE 2E 3 5 AMI ASPEC depletion and X enhancement Taylor Huang 6 Lattin Jenkins Grove ASPEC X style parasitics 7 Lattin Jenkins
12. Model 11 and the Philips JUNCAP Parasitic Diode Model see http Awww semiconductors philips com Philips_Models Using the Philips MOS11 Model in HSPICE e Set Level 63 to select Philips MOS Model 11 e Set the MOS11 version Set Version 1100 to identify Philips MOS Model 11 Level 1100 Set Version 11010 to identify Philips MOS Model 11 Level 1101 physical geometry scaling rules Set Version 11011 to identify Philips MOS Model 11 Level 1101 binning geometry scaling rules e The default room temperature is 25 C in HSPICE but is 27 C in most other simulators When comparing to other simulators set the simulation temperature to 27 using TEMP 27 or OPTION TNOM 27 e The set of model parameters should always include the model reference temperature TR which corresponds to TREF in other levels in HSPICE The default for TR is 21 0 to match the Philips simulator 80 MOSFET Models e The model has its own charge based capacitance model The CAPOP parameter which selects different capacitance models is ignored in this model e The model uses analytical derivatives for the conductances and ignores the DERIV parameter for the finite difference method DTEMP can be used with this model It is set on the element line and increases the temperature of individual elements relative to the circuit temperature e Since defaults are nonzero it is strongly recommended that every model parameter listed in Le
13. Specifies a wire model CRATIO Ratio for total wire element parasitic capacitance Assign a value between 0 and 1 to CRATIO Noise Parameter for Resistors Resistor models generate electrical thermal noise However some tasks such as macro modeling require noiseless resistor models e If you set noise 1 default or if you do not specify the noise parameter HSPICE models a resistor that generates noise e If you do not want the resistor model to generate thermal noise set noise 0 in the instance statement noiseless resistor model Resistor Model Selector For multiple resistor models you can use the automatic model selector in HSPICE to find the proper model for each resistor The model selector syntax is based on a common model root name with a unique extension for each model The resistor model selector uses the following criteria LMIN lt L lt LMAX WMIN lt W lt WMAX Passive Devices and Independent Sources 3 Capacitors Capacitor Element General Cxxx n1 n2 lt mname gt capval lt TC1 gt lt TC2 gt Form lt SCALE vab lt IC val lt M vab lt W val gt lt L vab lt DTEMP val gt Or Cxxx n1 n2 lt mname gt C capacitance lt TC1 vab lt TC2 vab lt IC valb lt M vab lt W val gt lt L val gt lt DTEMP valb gt Or Cxxx n1 n2 C equation lt CTYPE 0I1 gt lt above_options gt If you choose a model for the capacitor capval specificat
14. collector junction exponent grading factor MJE ME 0 33 Base emitter junction exponent grading MJS 0 5 Substrate junction exponent grading ESUB factor VJC PC V 0 75 Base collector built in potential VJE PE V 0 75 Base emitter built in potential VJS V 0 75 Substrate junction built in potential PSUB XCJC 1 0 Internal base fraction of base collector CDIS depletion capacitance Parasitic Capacitances Parameters Name Alias Unit Default Definition CBCP F 0 0 External base collector constant capacitance CBEP F 0 0 External base emitter constant capacitance CCSP F 0 0 External collector substrate constant capacitance vertical or base substrate lateral Transit Time Parameters Name Alias Unit Default Definition ITF JTF amp 0 0 TF high current parameter PTF x 0 0 Frequency multiplier to determine excess phase TF s 0 0 Base forward transit time TR s 0 0 Base reverse transit time 22 BJT Element Name Alias Unit Default Definition VTF V 0 0 TF base collector voltage dependence on coefficient XTF 0 0 TF bias dependence coefficient Noise Parameters Name Alias Unit Default Definition AF 1 0 Flicker noise exponent KF 0 0 Flicker noise coefficient LEVEL 6 Philips Bipolar Model General Qxxx nc nb ne lt ns gt nt mname lt AREA val gt lt OFF gt Form lt VBE vakb
15. detailed descriptions of MOSFET models summarized in this manual see the HSPICE MOSFET Models Manual e For detailed descriptions of all other types of models summarized in this manual see the HSPICE Elements and Device Models Manual DDL Use General Form X11 n2 subcircuitname PAR1 val n1 n2 Node names PAR1 Parameter defined at top of each macro subcircuit name Model name from DDL list X1 Subcircuit call DDL Access HSPICE circuit simulation automatically looks for a file in the local directory named hspice ini To override this name enter default_include lt file name gt in a meta cfg file For example hspice ini sample Automatic Include File Option OPTION search usr meta h92 lib pmi search usr meta h92 lib burr_brn search usr meta h92 lib linear search usr meta h92 lib signet search usr meta h92 lib ti search usr meta h92 lib bjt search usr meta h92 lib dio search usr meta h92 lib fet search usr meta h92 lib macro x xadd user options parameters model includes subcircuit includes or libraries here eee tet Discrete Device Library DDL 1 Passive Sources Devices and Independent Statements Element Statement General Form NAME node1 node2 nodeN lt model reference gt value lt optional parameters gt Model Statement General MODEL mname modeltype Form lt keyword valu
16. element name nb Bulk terminal node name which is optional nd Drain terminal node name ng Gate terminal node name NRD Number of squares of drain diffusion for resistance calculations NRS Number of squares of source diffusion for resistance calculations ns Source terminal node name OFF Sets initial condition for this element to OFF in DC analysis PD Perimeter of the drain junction PS Perimeter of the source junction RDC Additional drain resistance due to contact resistance in units of ohms RSC Additional source resistance due to contact resistance in units of ohms Ww MOSFET channel width in meters 48 MOSFET Elements MOSFET Model Statement General MODEL mname PMOS NMOS lt LEVEL vab gt Form lt keyname 1 val1 gt lt keyname2 val2 gt lt VERSION version_number gt Or MODEL mname NMOS lt LEVEL val lt keyname val1 gt lt keyname2 val2 gt lt VERSION version_number gt LEVEL MOSFET models include several device model types mname Model name NMOS Identifies an N channel MOSFET model PMOS Identifies a P channel MOSFET model Diode Model Parameters DC Model Parameters Name Alias Unit Default Description ACM 0 Area calculation method JS amp m2 9 Bulk junction saturation current JSW amp m 0 Sidewall bulk junction saturation current IS amp te 14 Bulk junction saturation current N 1
17. for pn junction diode GAP1 eV 7 02e 4 First bandgap correction factor From Sze alpha term GAP2 9 1108 Second bandgap correction factor From Sze beta term TCV 1 2 0 0 Breakdown voltage temperature coefficient TLEV 0 0 Temperature equation LEVEL selector for diode interacts with TLEVC TLEVC 0 0 LEVEL selector for diode temperature junction capacitances and contact potentials use with TLEV TM1 1 2 0 0 First order temperature coefficient for MJ TM2 1 22 0 0 Second order MU temperature coefficient TPB vic 0 0 Temperature coefficient for PB TVJ TPHP vie 0 0 Temperature coefficient for PHP TREF c 25 0 Model reference temperature LEVEL 1 or 3 only TRS 1 2 0 0 Resistance temperature coefficient TTT1 1 2 0 0 First order temperature coefficient for TT Diodes 15 Name Alias Unit Default Description TTT2 4 2 0 0 Second order TT temperature coefficient XT 3 0 Saturation current temperature exponent XTITUN 3 0 Exponent for the tunneling current temperature Fowler Nordheim Diode Fowler Nordheim Tunnel Diode Element LEVEL 2 Dxxx nplus nminus mname lt W valkkL vab gt Form lt WP vab lt OFF gt lt IC va gt lt M vab Dxxx Diode element name nplus Positive terminal anode node name nminus Negative terminal cathode node name mname Model name AREA Diode ar
18. gt lt M vab lt DTEMP val AREA area Area multiplying factor that affects the BETA RD RS IS CGS and CGD model parameters Default 1 0 square meters DTEMP Difference between element temperature and circuit temperature degrees Celsius IC vdsval Initial internal drain source voltage vdsval and gate vgsval VDS source voltage vgsval VGS JXXX JFET or MESFET element name L FET gate length in meters M Multiplier to simulate multiple JFETs or MESFETs in parallel Default 1 mname JFET or MESFET model name reference nb Bulk terminal node name optional nd Drain terminal node name ng Gate terminal node name ns Source terminal node name OFF Sets initial condition to OFF for this element in DC analysis Ww FET gate width in meters JFET and MESFET Model Statements General Form MODEL mname NJF lt LEVEL vab lt pname1 val1 gt Or MODEL mname PJF lt LEVEL vab lt pname1 val1 gt LEVEL Selects different DC model equations mname Model name NJF Identifies an n channel JFET or MESFET model PJF Identifies a p channel JFET or MESFET model pname1 val1 Can include several model parameters JFET and MESFET Elements 41 JFET Model Parameters Gate Diode DC Parameters Name Alias Unit Default Description ACM Area calculation method ALIGN m 0 Misalignment of gate AREA The d
19. lt gt Or xxx n n SIN lt gt vo va lt freq lt td lt q lt j gt gt gt gt lt gt Exponential Source Function General Form Vxxx n n EXP lt gt v1 v2 lt td1 lt t1 lt td2 lt t2 gt gt gt gt lt gt Or xxx n n EXP lt gt v1 v2 lt td1 lt t1 lt td2 lt t2 gt gt gt gt lt gt 8 Passive Devices and Independent Sources Piecewise Linear Source Function General Form Vxxx n n PWL lt gt t1 v1 lt t2 v2 t3 V3 gt lt R lt repeat gt gt lt TD delay gt lt gt Or Ixxx n n PWL lt gt t1 v1 lt t2 v2 t3 v3 gt lt R lt repeat gt gt lt TD delay gt lt gt MSINC and ASPEC General Form Ixxx n n PL lt gt v1 t1 lt v2 t2 v3 13 gt lt R lt repeat gt gt lt TD delay gt lt gt Data Driven Piecewise Linear Source Function General Form Vxxx n n PWL TIME PV along with DATA dataname TIME PV ti vi t2 v2 t3 v3 t4 v4 ENDDATA TRAN DATA datanam Or Ixxx n n PWL TIME PV Single Freq uency FM Source Function General Form Vxxx n n SFFM lt gt vo va lt fc lt mdi lt fs gt gt gt lt gt Or Ixxx n n SFFM lt gt vo va lt fc lt mdi lt fs gt gt gt lt gt Amplitude Modulation Source Function General Form Vxxx n n AM lt gt so sa fm fc lt td gt lt gt Or Ixxx n n AM
20. node name or number np External body contact node name or number mname MOSFET model name reference L SOI MOSFET channel length in meters Ww SOI MOSFET channel width in meters M Multiplier to simulate multiple SOI MOSFETs AD Drain diffusion area AS Source diffusion area PD Drain junction perimeter including channel edge PS Source junction perimeter including channel edge NRD Number of squares of drain diffusion for drain series resistance NRS Number of squares of source diffusion for source series diffusion NRB Number of squares in body series resistance RDC Additional drain resistance due to contact resistance in units of ohms 78 MOSFET Models RSC Additional source resistance due to contact resistance in units of ohms RTHO Thermal resistance per unit width CTHO Thermal capacitance per unit width OFF Sets initial condition to OFF BJTOFF Turning off BUT if equal to 1 IC Initial guess in order drain front gate internal body back gate external voltage The UC Berkeley SOI BSIM3 SOI Dynamically Depleted DD model is MOSFET LEVEL 60 LEVEL 61 RPI a Si TFT Model LEVEL 61 is the AIM SPICE MOS15 amorphous silicon a Si thin film transistor TFT model developed by Renssalear Polytechnic Institute It uses the general model statement described in MOSFET Model Statement on page 49 LEVEL 62 RPI Poli Si TFT Model LEVEL 62 is an AIM SPICE MOS 16 poly silicon
21. pinch off voltage Gate Capacitance Model Parameters Name Alias Units Default Description CGS F 0 0 Zero bias gate source junction capacitance CGD F 0 0 Zero bias gate drain junction capacitance PB V 0 8 Gate Junction Potential N 1 0 Emission coefficient for gate drain and gate source diodes JFET and MESFET Elements 47 MOSFET Elements MOSFET Element Statement General Mxxx nd ng ns lt nb gt mname lt lt L gt length gt Form lt lt W gt width gt lt AD vab lt AS vab lt PD vab lt PS val gt lt NRD vab lt NRS vab lt RDC vab lt RSC val lt OFF gt lt IC vds vgs vbs gt lt M val gt lt DTEMP vab lt GEO vab lt DELVTO vab Or OPTION WL Mxxx nd ng ns lt nb gt mname lt width gt lt ength gt lt other options gt AD Drain diffusion area AS Source diffusion area DELVTO Zero bias threshold voltage shift DTEMP Difference between element temperature and circuit temperature in degrees Celsius GEO Source drain sharing selector for MOSFET model parameter value ACM 3 IC vds Initial voltage across external drain source vds gate vgs vos source vgs and bulk source terminals vbs L MOSFET channel length in meters M Multiplier simulate multiple parallel MOSFETs mname MOSFET model name reference Mxxx MOSFET
22. the base resistance at zero bias RE ohm 2 0 Emitter series resistance TAUNE s 3 e 10 Minimum delay time of neutral and emitter charge MTAU 1 18 Non ideality factor of the neutral and emitter charge CJE F 2 5e 13 Zero bias collector base depletion capacitance VDE V 0 9 Emitter base diffusion voltage PE 0 33 Emitter base grading coefficient XCJE F 0 5 Fraction of the emitter base depletion capacitance that belongs to the sidewall CJC F 1 3e 13 Zero bias collector base depletion capacitance VDC V 0 6 Collector base diffusion voltage PC 0 4 Collector base grading coefficient variable part XP F 0 2 Constant part of CJC MC 0 5 Collector current modulation coefficient XCJC 0 1 Fraction of the collector base depletion capacitance under the emitter area VGE V 1 01 Band gap voltage of emitter VGB V 1 18 Band gap voltage of the base VGC V 1 205 Band gap voltage of collector VGJ V 1 1 Band gap voltage recombination emitter base junction VI V 0 040 lonization voltage base dope NA cm 3 0E17 Maximum base dope concentration 3 ER 2 E 3 Temperature coefficient of VLF VLR BJT Element 25 Parameter Unit Default Description AB 1 35 Temperature coefficient resistivity of the base AEPI 2 15 Temperature coefficient resistivity of the epilayer AEX 1 0 Temperature coefficient resistivity of extrinsic base AC 0 4 Temperature coefficient r
23. 1 AREA is unitless for LEVEL 3 unit is meter EXPLI amp 0 0 Current explosion model AREAeff parameter EXPLIR amp EXPLI Reverse mode current explosion AREAeff model parameter IB amp 1 0e 3 Current at breakdown voltage AREAeff IBV amp 1 0e 3 Current at breakdown voltage AREAeff IK IKF amp 0 0 Forward knee current JBF AREAeff IKR JBR amp 0 0 Reverse knee current AREAeff IS JS amp 1 0e 14 Saturation current per unit area AREAeff 0 0 Level 1 default 1 0e 14 Level 3 default 0 0 JSW ISP amp 0 0 Sidewall saturation current per PJeff unit junction periphery L Default diode length LEVEL 1 Diode model selector N 1 0 Emission coefficient PJ 0 0 Junction periphery RS ohms or 0 0 Ohmic series resistance ohms m SHRINK 1 0 Shrink factor VB BV V 0 0 Reverse breakdown voltage VAR VRB W Default width of diode XW Accounts for masking and etching effects NBV Breakdown emission coefficient JTUN amp 0 0 Tunneling saturation current per AREAeff unit area Diodes 13 Name Alias Unit Default Description JTUNSW_ amp 0 0 Sidewall tunneling saturation PJeff current per unit junction periphery NTUN 30 Tunneling emission coefficient Junction Capacitance Parameters Name Alias Unit Default Description CJ CJA F 0 0 Zero bias bottomwall capacitan
24. 1 Flag distributed high frequency effects OUTFLAG 0 Flag displays more output data Basic Parameters Level 503 Parameter Unit Default Description TREF o 10 0 Model nominal temperature IS A 5 E 17 Collector emitter saturation current BF A 140 0 Ideal forward current gain XIBI 0 0 Fraction of ideal base current belonging to sidewall IBF A 2 0E 14 Saturation current of the non ideal forward base current VLF V 0 5 Cross over voltage of the non ideal forward base current IK A 15 E 3 High injection knee current BRI 16 0 Ideal reverse current gain IBR A 8 0e 15 Saturation current of the non ideal reverse base current VLR V 0 5 Cross over voltage of the non ideal reverse base current XEXT 0 5 Part of EX Q EX Q TEX and SUB that depends on VBC1 base collector voltage QBO Cc 1 2e 12 Base charge at zero bias ETA 4 0 Factor of built in field of the base AVL 50 Weak avalanche parameter EFI 0 7 Electric field intercept with EXAVL 1 IHC A 3 e 3 Critical hot carrier current 24 BJT Element Parameter Unit Default Description RCC ohm 25 Constant part of the collector resistance RCV ohm 750 Resistance of unmodulated epilayer SCRCV ohm 1000 0 Space charge resistance of the epilayer SFH 0 6 Current spreading factor epilayer RBC ohm 50 Constant part of the base resistance RBV ohm 100 Variable part of
25. 1 model which includes the following new features that are not available in BSMISOIS 0 74 MOSFET Models Ideal Full Depletion FD Modeling BSIMSOI3 0 supports the modeling of these two families of SOI MOSFETs with a SOIMOD switching model flag e SOIMO 0 for partially depleted devices PD e SOIMOD 1 for devices that tend to operate in a mixed mode of PD and FD V3 1 also provides an ideal full depletion FD module SOIMOD 2 not available in V3 0 to model FD SOI devices that literally exhibit no floating body behavior As in BSIMSOI3 0 the default SOIMOD value is 0 for BSIMSOI3 1 The following physical modeling components related to the internal SOI body node are critical for accurately modeling PD SOI devices but are not needed for the ideal FD module e Source Drain to body diode currents e Source Body Drain parasitic BUT currents e Impact ionization currents e Gate body direct currents e Body related capacitances Gate Resistance Modeling BSIMSOI3 1 uses the same gate resistance models as in the BSIM4 model with four options for various gate resistance modeling topologies e RGATEMOD gate resistance model selector RGATEMOD 0 No gate resistance default RGATEMOD 1 Constant gate resistance RGATEMOD 2 Rii model with variable resistance RGATEMOD 3 Rii model with two nodes e XRCRG1 parameter for distributed channel resistance effect for intrinsic input resistance e XRCRG2 parameter to account
26. 12 Gate edge junction capacitance VDBR V 1 00 Diffusion voltage bottom junction VDSR V 1 00 Diffusion voltage of sidewall junction VDGR V 1 00 Diffusion voltage of gate edge junction PB 0 40 Bottom junction grading coefficient PS 0 40 Sidewall junction grading coefficient PG 0 40 Gate edge junction grading coefficient BJT Element General Form Qxxx nc nb ne lt ns gt mname lt AREA area gt lt OFF gt lt lC vbeval vceval gt lt M val gt lt DTEMP vab Or Qxxx nc nb ne lt ns gt mname lt AREA area gt lt AREAB valb lt AREAC vab lt OFF gt lt VBE vbevab lt VCE vcevalb lt M val gt lt DTEMP vab AREA area Emitter area multiplying factor which affects currents resistances and capacitances Default 1 0 AREAB Base AREA multiplying factor Default AREA AREAC Collector AREA multiplying factor Default AREA DTEMP The difference between the element and circuit temperatures in degrees Celsius IC vbeval VBE Initial internal base emitter voltage vbeval and vceval VCE collector emitter voltage vceval M Multiplier to simulate multiple BUTs in parallel mname BJT model name reference nb Base terminal node name ne Collector terminal node name ne Emitter terminal node name ns Substrate terminal node name optional OFF Sets initial condition to OFF in DC analysis Qxxx BJT element name Must begin with Q followed by up to 1023 alphanumeric characte
27. BE Tunneling Parameter Unit Default Description IBETS A 0 Saturation current ABET 0 0 Exponent coefficient External Elements BC Capacitance Parameter Unit Default Description CJCX0O F 5 393e 15 Zero bias depletion value VDCX V 0 7 Built in voltage ZCX 0 333 Exponent coefficient VPTCX V 100 Punch through voltage CCOX F 2 97e 15 Collector oxide capacitance FBC 0 1526 Partitioning factor for C_BCX C _BCx C _BCx BC Base Current Component Parameter Unit Default Description IBCXS A 4 39e 20 Saturation current MBCX 1 03 Non ideality factor Other External Elements Parameter Unit Default Description CEOX F 1 13e 15 Emitter base isolation overlap cap RBX Ohm 0 External base series resistance RE Ohm 0 Emitter series resistance RCX Ohm O External collector series resistance Substrate Transistor Parameter Unit Default Description ITSS A 0 0 Transfer saturation current MSF 0 0 Non ideality forward transfer current TSF 0 0 Minority charge storage transit time 34 BJT Element Parameter Unit Default Description ISCS A 0 0 Saturation current of CS diode MSC 0 0 Non ideality factor of CS diode Collector Substrate Depletion Capacitance Parameter Unit Default Description CJSO F 3 64e 14 Zero bias value of CS deple
28. Emission coefficient NDS 1 Reverse bias slope coefficient VNDS V 1 Reverse diode current transition point Capacitance Model Parameters Name Alias Unit Default Description CBD F 0 Zero bias bulk drain junction capacitance CBS F 0 Zero bias bulk source junction capacitance CJ CDB F m2 579 11 Zero bias bulk junction capacitance CSB CJA uF m CJSW F m 0 Zero bias sidewall bulk junction CJP capacitance CJGATE F m CJSW Only for ACM 3 zero bias gate edge sidewall bulk junction capacitance FC 0 5 Forward bias depletion capacitance coefficient not used MOSFET Elements 49 Name Alias Unit Default Description MJ EXA 0 5 Bulk junction grading coefficient EXJ EXS EXD MJSW 0 33 Bulk sidewall junction grading EXP coefficient NSUB 1 cm8 1e15 Substrate doping DNB NB PB PHA V 0 8 Bulk junction contact potential PHS PHD PHP V PB Bulk sidewall junction contact potential TT s 0 Transit time Drain and Source Resistance Model Parameters Name Alias Unit Default Description RD ohm sq 0 0 Drain ohmic resistance RDC ohm 0 0 Additional drain resistance due to contact resistance LRD ohm m Drain resistance length sensitivity WRD ohm m Drain resistance width sensitivity PRD ohm m2 Drain resistance product area sensitivity RS ohm sq 0 0 Source ohmic resis
29. GBO LX32 CDGBO dQd dVg intrinsic drain to gate capacitance Meyer amp Charge Conservation All CDDBO LX33 CDDBO dQd dVd intrinsic drain capacitance Meyer and Charge Conservation All CDSBO LX34 CDSBO dQd dVs intrinsic drain to source capacitance Meyer amp Charge Conservation All QE LX35 Substrate charge QE Meyer and Charge Conservation 57 58 59 60 MOSFET Models Name Alias Description MOSFET Levels CQE LX36 Substrate charge current 57 58 59 CQE Meyer and Charge Conservation CDEBO LX37 CDEBO dQd dVe intrinsic 57 59 drain to substrate capacitance igso LX38 Gate to Source Current 54 CBEBO LX38 CBEBO dQb dVe intrinsic 57 59 floating body to substrate capacitance igdo LX39 Gate to Drain Current 54 CEEBO LX39 CEEBO dQe dVe intrinsic 57 59 substrate capacitance CEGBO LX40 CEGBO dQe dVg intrinsic 57 59 substrate to gate capacitance CEDBO LX41 CEDBO dQe dVd intrinsic 57 59 substrate to drain capacitance CESBO LX42 CESBO dQe dVs intrinsic 57 59 substrate to source capacitance VBSI LX43 Body source voltage VBS 57 58 59 Meyer amp Charge Conservation ICH LX44 Channel current Meyer and 57 58 59 Charge Conservation IBUT LX45 Parasitic BUT collector 57 58 59 current Meyer and Charge Conservation II LX46 Impact ionization current 57
30. Grove SPICE X style parasitics 8 Advanced LEVEL 2 X 9 AMD X 54 MOSFET Models All Platforms All Platforms LEVEL MOSFET Model Description including PC except PC 10 AMD X 11 Fluke Mosaid X 12 CASMOS GTE style X 13 BSIM xX 14 Siemens LEVEL 4 X 15 User defined based on X LEVEL 3 16 Not used 17 Cypress X 18 Sierra 1 X 19 Dallas Semiconductor X 20 GE CRD FRANZ X 21 STC ITT X 22 CASMOS GEC style xX 23 Siliconix X 24 GE Intersil advanced X 25 CASMOS Rutherford X 26 Sierra 2 xX 27 SOSFET xX 28 Modified BSIM Synopsys X proprietary model 29 Not used 30 VTI X 31 Motorola X 32 AMD X 33 National Semiconductor X 34 EPFL not used X 35 Siemens Xx 36 Sharp X 37 T X 38 IDS Cypress Depletion X 39 BSIM2 xX 40 HP a Si TFT xX 41 TI Analog X 46 SGS Thomson MOS Level3 X 47 BSIM3 Version 2 0 MOS X MOSFET Models 55 All Platforms All Platforms LEVEL MOSFET Model Description including PC except PC 49 BSIM3 Version 3 Enhanced X MOS 50 Philips MOS9 xX 53 BSIM3 Version 3 Berkeley X MOS 54 BSIM4 Berkeley X 55 EPFL EKV Version 2 6 R 11 X 57 UC Berkeley BSIM3 SOI X MOSFET Version 2 0 1 58 University of Florida
31. HSPICE Device Models Quick Reference Guide Version W 2005 03 March 2005 SYNOPSYS Copyright Notice and Proprietary Information Copyright 2005 Synopsys Inc All rights reserved This software and documentation contain confidential and proprietary information that is the property of Synopsys Inc The software and documentation are furnished under a license agreement and may be used or copied only in accordance with the terms of the license agreement No part of the software and documentation may be reproduced transmitted or translated in any form or by any means electronic mechanical manual optical or otherwise without prior written permission of Synopsys Inc or as expressly provided by the license agreement Right to Copy Documentation The license agreement with Synopsys permits licensee to make copies of the documentation for its internal use only Each copy shall include all copyrights trademarks service marks and proprietary rights notices if any Licensee must assign sequential numbers to all copies These copies shall contain the following legend on the cover page This document is duplicated with the permission of Synopsys Inc for the exclusive use of and its employees This is copy number E Destination Control Statement All technical data contained in this publication is subject to the export control laws of the United States of America Disclosure to nationals of other countries contrary to United St
32. LX69 Impact ionization current 54 igidlo LX70 Gate induced drain leakage 54 current igdt LX71 Gate Dielectric Tunneling 54 Current Ig Igs lgd lgc lgb igc LX72 Gate to Channel Current Igc 54 Igcs Igcd igbacc LX73 Determined by ECB Electron 54 tunneling from the Conduction Band significant in the accumulation igbinv LX74 Determined by EVB Electron 54 tunneling from the Valence Band significant in the inversion vibsd LX75 Flat band Voltage between the 54 Gate and S D diffusions 62 MOSFET Models Name Alias Description MOSFET Levels vgse LX76 Effective Gate to Source 54 Voltage vox LX77 Voltage Across Oxide 54 rdv LX78 Asymmetric and Bias 54 Dependent Source Resistance rdsMod 1 rsv LX79 Asymmetric and Bias 54 Dependent Drain Resistance rdsMod 1 cap_bsz LX80 Zero voltage bias bulk source 54 capacitance cap_bdz LX81 Zero voltage bias bulk drain 54 capacitance CGGBM LX82 Total gate capacitance 54 57 including intrinsic and all 59 60 overlap and fringing components CGDBM LX83 Total gate to drain capacitance 54 57 including intrinsic and 59 60 overlap and fringing components CGSBM LX84 Total gate to source 54 57 capacitance including 59 60 intrinsic and overlap and fringing components CDDBM LX85 Total drain capacitance 54 57 including intrinsic overlap 59 60 and fringing components and j
33. MBSO GBDO LX10 Conductance of the drain diode All GBDO GBSO LX11 Conductance of the source All diode GBSO QB LX12 Total bulk body charge All QB Meyer and Charge Conservation CQB LX13 Bulk body charge current All CQB Meyer and Charge Conservation QG LX14 Total Gate charge QG All Meyer and Charge Conservation CQG LX15 Gate charge current CQG All Meyer amp Charge Conservation QD LX16 Total Drain charge QD 49 53 58 MOSFET Models Name Alias Description MOSFET Levels QD LX16 Channel charge QD Meyer All except and Charge Conservation 49 53 CQD LX17 Drain charge current CQD 49 53 CQD LX17 Channel charge current Allexcept CQD Meyer and Charge 49 53 Conservation CGGBO LX18 CGGBO dQg dVg CGS All except CGD CGB Meyer and 54 57 Charge Conservation 59 60 CGGBO LX18 Intrinsic gate capacitance 54 57 59 60 CGDBO LX19 CGDBO dQg dVd Meyer All except and Charge Conservation 54 57 59 60 CGDBO LX19 Intrinsic gate to drain 54 57 capacitance 59 60 CGSBO LX20 CGSBO dQg dVd Meyer All except and Charge Conservation 54 57 59 60 CGSBO LX20 Intrinsic gate to source 54 57 capacitance 59 60 CBGBO LX21 CBGBO dQb dVg Meyer All except and Charge Conservation 54 57 59 60 CBGBO LX21 Intrinsic bulk to gate 54 capacitance CBGBO LX21 Intrinsic floating body to gate 57 59 60 capacitance CBDBO LX22 CBDBO dQb dVd Meyer All exc
34. SOI X Version 4 5 59 UC Berkeley BSIM3 SOI FD X 61 RPT Amorphous Silicon TFT X 62 RPT PolySilicon TFT X 63 Philips MOS11 X 64 STARC HiSIM model Xx eK not officially released equations are proprietary documentation not provided requires a license equations are proprietary no documentation Parameters in MOSFET Output Templates Name Alias Description MOSFET Levels L LV1 Channel Length L All Ww LV2 Channel Width W All AD LV3 Area of the drain diode AD All AS LV4 Area of the source diode AS All ICVDS LV5 Initial condition for the drain All source voltage VDS ICVGS LV6 Initial condition for the gate All source voltage VGS ICVBS LV7 Initial condition for the bulk All except source voltage VBS 57 58 59 ICVES LV7 Initial condition for the 57 58 59 substrate source voltage VES VTH LV9 Threshold voltage bias All dependent 56 MOSFET Models Name Alias Description MOSFET Levels VDSAT LV10 Saturation voltage VDSAT All PD LV11 Drain diode periphery PD All PS LV12 Source diode periphery PS All RDS LV13 Drain resistance squares All RDS RSS LV14 Source resistance squares All RSS GDEFF LV16 Effective drain conductance 1 All RDeff rgeoMod is not 0 GSEFF LV17 Effective source conductance All 1 RSeff rgeoMod is not 0 CDSAT LV18 Drain bulk
35. act ionization current coefficient LALPHA um V 0 0 ALPHA length sensitivity WALPHA um V 0 0 ALPHA width sensitivity VCR V 0 0 Critical voltage LVCR um V 0 0 VCR length sensitivity WVCR um V 0 0 VCR width sensitivity IIRAT 0 0 Portion of impact ionization current that goes to source MOSFET Elements 51 Gate Capacitance Model Parameters Basic Gate Capacitance Parameters Name Alias Unit Default Description CAPOP 2 0 Capacitance model selector COX CO F m2 3 453e 4 Oxide capacitance TOX m le 7 Oxide thickness calculated from COX when COX is input Gate Overlap Capacitance Model Parameters Name Alias Unit Default Description CGBO F m 0 0 Gate bulk overlap capacitance per CGB meter channel length CGDO F m 0 0 Gate drain overlap capacitance per CGD C2 meter channel width CGSO F m 0 0 Gate source overlap capacitance CGS C1 per meter channel width LD LATD m Lateral diffusion into channel from DLAT source and drain diffusion METO m 0 0 Fringing field factor for gate to source and gate to drain overlap capacitance calculation WD m 0 0 Lateral diffusion into channel from bulk along width Meyer Capacitance Parameters CAPOP 0 1 2 Name Alias Unit Default Description CF1 V 0 0 Transition of cgs from depletion to weak inversion for CGSO CF2 V 0 1 Transition of cgs
36. age saturation current JLE NC NLC 2 0 Base collector leakage emission coefficient NE NLE 1 5 Base emitter leakage emission coefficient Base Width Modulation Parameters Name Alias Unit Default Definition VAF VA VBF V 0 0 Forward early voltage VAR VB VRB BV V 0 0 Reverse early voltage High Current Beta Degradation Effect Parameters Name Alias Unit Default Definition IKF IK JBF amp 0 0 Corner for forward Beta high current roll off IKR JBR amp 0 0 Corner for reverse Beta high current roll off NKF 0 5 Exponent for high current Beta roll off IKF IK JBF amp 0 0 Corner for forward Beta high current roll off Parasitic Resistance Parameters Name Alias Unit Default Definition IRB IRB amp 0 0 Base current where base IOB resistance falls half way to RBM RB ohm 0 0 Base resistance RBM ohm RB Minimum high current base resistance RC ohm 0 0 Collector resistance RE ohm 0 0 Emitter resistance BJT Element 21 Junction Capacitor Parameters Name Alias Unit Default Definition CJC F 0 0 Base collector zero bias depletion capacitance CJE F 0 0 Base emitter zero bias depletion capacitance CJS CCS F 0 0 Zero bias collector substrate capacitance CSUB FC 0 5 Coefficient for forward bias depletion capacitance MJC MC 0 33 Base
37. ance caused by the interface trapped carriers AF 1 0 SPICE2 flicker noise exponent KF 0 0 SPICE2 flicker noise coefficient EF 0 0 SPICE2 flicker noise frequency exponent Conserving Symmetry at Vds 0 for Short Channel Parameter Default Description VZADDO 1 0e 2V symmetry conservation coefficient PZADDO 1 0e 3V symmetry conservation coefficient MOS Diode Parameter Default Description JSO 4 0e 4Am 2 saturation current density JSOSW 0 0Am 1 sidewall saturation current density NJ 1 0 emission coefficient NJSW 1 0 sidewall emission coefficient XTI 3 0 junction current temperature exponent coefficient CJ 8 397247e 04F m2 bottom junction capacitance per unit area at zero bias MOSFET Models 87 Parameter Default Description CJSW 5 0e 10Fm source drain sidewall junction capacitance per unit area at zero bias CJSWG 5 0e 10Fm source drain gate sidewall junction capacitance per unit area at zero bias MJ 0 5 bottom junction capacitance grading coefficient MJSW 0 33 source drain sidewall junction capacitance grading coefficient MJSWG 0 33 source drain gate sidewall junction capacitance grading coefficient PB 1 0V bottom junction build in potential PBSW 1 0V source drain sidewall junction build in potential PBSWG 1 0V source drain gate sidewall junction
38. ance connected between bNodePrime and bNode Resistance connected between bNodePrime and dbNode Resistance connected between bNodePrime and sbNode Resistance connected between dbNode and bNode Resistance connected between sbNode and bNode Number of device fingers Whether to minimize the number of drain or source diffusions for even number fingered device Drain contact resistance for per finger device Source contact resistance for per finger device Shift in zero bias threshold voltage VTHO Low field mobility UO multiplier MOSFET Models 69 DELK1 Shift in body bias coefficient K1 DELNFCT Shift in subthreshold swing NFACTOR DELTOX Shift in gate electrical physical equivalent oxide thickness TOXE and TOXP RGATEMOD Gate resistance model selector OFF IC LMLT WMLT Level Sets initial condition OFF in DC analysis Initial guess in the order Channel length shrink factor specified in the model card Default 1 0 Channel width shrink factor specified in the model card Default 1 0 54 the UC Berkeley BSIM 4 0 0 MOS model can model sub 0 13 micron CMOS technology and RF high speed CMOS circuit simulation BSIM4 0 0 has major improvements and additions over BSIM3v3 including Model of intrinsic input resistance Rii for both RF high frequency analog and high speed digital applications Flexible substrate resistance network for RF modeling A channel thermal noise model and a nois
39. ar XP SWIFT Taurus Taurus Device Taurus Layout Taurus Lithography Taurus Process Taurus Topography Taurus Visual Taurus Workbench TimeSlice TimeTracker Timing Annotator TopoPlace TopoRoute Trace On Demand True Hspice TSUPREM 4 TymeWare VCS Express VCSi Venus Verification Portal VFormal VHDL Compiler VHDL System Simulator VirSim and VMC are trademarks of Synopsys Inc Service Marks sm MAP in SVP Caf and TAP in are service marks of Synopsys Inc SystemC is a trademark of the Open SystemC Initiative and is used under license ARM and AMBA are registered trademarks of ARM Limited All other product or company names may be trademarks of their respective owners Document Order Number 37822 000 XA HSPICE Device Models Quick Reference Version W 2005 03 Table of Contents Discrete Device Library DDL Passive Devices and Independent Sources Diodes BJT Element Level 9 VBIC99 Model JFET and MESFET Elements MOSFET Elements MOSFET Models 11 19 38 41 48 54 Discrete Device Library DDL The Synopsys Discrete Device Library is a set of models of discrete components for use with HSPICE and Star SimXT circuit simulators It includes Diodes FETs MACROs op amps and comparators Burr Brown PMI Signetics and TI For descriptions of Transmission Line and IBIS models see the HSPICE Signal Integrity Guide These are not HSPICE device models so this manual does not describe them e For
40. ates law is prohibited It is the reader s responsibility to determine the applicable regulations and to comply with them Disclaimer SYNOPSYS INC AND ITS LICENSORS MAKE NO WARRANTY OF ANY KIND EXPRESS OR IMPLIED WITH REGARD TO THIS MATERIAL INCLUDING BUT NOT LIMITED TO THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE Registered Trademarks Synopsys AMPS Arcadia C Level Design C2HDL C2V C2VHDL Cadabra Calaveras Algorithm CATS CSim Design Compiler DesignPower DesignWare EPIC Formality HSPICE Hypermodel iN Phase in Sync Leda MAST Meta Meta Software ModelAccess ModelTools NanoSim OpenVera PathMill Photolynx Physical Compiler PowerMill PrimeTime RailMill Raphael RapidScript Saber SiVL SNUG SolvNet Stream Driven Simulator Superlog System Compiler Testify TetraMAX TimeMill TMA VCS Vera and Virtual Stepper are registered trademarks of Synopsys Inc Trademarks abraCAD abraMAP Active Parasitics AFGen Apollo Apollo Il Apollo DPII Apollo GA ApolloGAll Astro Astro Rail Astro Xtalk Aurora AvanTestchip AvanWaves BCView Behavioral Compiler BOA BRT Cedar ChipPlanner Circuit Analysis Columbia Columbia CE Comet 3D Cosmos CosmosEnterprise CosmosLE CosmosScope CosmosSE Cyclelink Davinci DC Expert DC Expert Plus DC Professional DC Ultra DC Ultra Plus Design Advisor Design Analyzer Design Vision DesignerHDL DesignTime DFM Workben
41. b threshold slope drain V 1 0 parameter N Forward gate diode ideality factor 1 GAMMATC Linear temperature coefficient for K 1 0 GAMMA VBITC Linear temperature coefficient for VK 1 0 VBI CGSTCE Linear temperature coefficient for K 1 0 CGS CGDTCE Linear temperature coefficient for K 1 0 CGD MSTTC Linear temperature coefficient for V 1K 1 O MST BETATCE Linear temperature coefficient for K 1 0 BETA JFET Level 8 Materka Model This section summarizes the Synopsys JFET amp MESFET model Level 8 For more information about this model see Compact dc Model of GaAs FETs for Large Signal Computer Calculation IEEE Journal of Solid State Circuits Volume SC 18 No 2 April 1983 Computer Calculation of Large Signal 46 JFET and MESFET Elements GaAs FET Amplifier Characteristics IEEE Transactions on Microwave Theory and Techniques Volume MTT 33 No 2 February 1985 Materka Model Parameters in HSPICE DC Model Parameters Name Alias Units Default Description LEVEL 8 Level 8 is the Materka MESFET model ALPHA1 Empirical constant VTO V 2 0 Threshold voltage If set it overrides internal calculation A negative VTO is a depletion transistor regardless of NJF or PJF A positive VTO is always an enhancement transistor VP V Pinch off voltage default is calculated IDSS A 0 1 Drain saturation current for Vgs 0 GAMMA 1 V_ 0 0 Voltage slope parameter of
42. build in potential VDIFFJ 0 5V diode threshold voltage between source drain and substrate PTHROU_ 0 0 correction for steep subthreshold swing Subthreshold Swing Parameter Default Description PTHROU_ 0 0 correction for steep subthreshold swing Model parameter defaults in the above tables are valid only for versions 100 and 110 For other versions please refer to the following table Parameter Version 100 110 Others VMAX 1 00e 7 7 00e 6 BGTMP1 9 03e 5 90 25e 6 BGTMP2_ 3 05e 7 100 0e 9 88 MOSFET Models Parameter Version 100 110 Others TOX 3 60e 9 5 0e 9 RS 0 0 80 0e 6 RD 0 0 80 0e 6 VFBC 0 722729 1 0 NSUBC 5 946417 1 0e 17 PARL2 2 20e 8 1 0e 17 LP 0 0 15 0e 9 NSUBP 5 946 17 1 0e 17 SC1 13 5 0 0 SC2 1 8 0 0 PGD1 0 0 0 01 PGD2 0 0 1 0 PGD3 0 0 0 8 NINVD 0 0 1 0e 9 MUEPH1 1 00e 7 25 0e 3 MUEPHO 0 295 0 300 MUESR1 7 00e 8 2 0e 15 MUESRO_ 1 0 2 0 MUETMP 0 0 1 5 SUB1 0 0 10 0 SUB2 70 0 20 0 SUB3 1 0 0 8 CJ 8 397247e 04 5 0e 04 CLM1 0 3 0 7 CLM2 0 0 2 0 CLM3 0 0 1 0 RPOCK1 0 0 0 01 MOSFET Models 89 Parameter Version 100 110 Others RPOCK2 0 0 0 1 RPOCP1 0 0 1 0 VOVER 0 0 0 01 VOVERP 0 0 0 1 QME1 0 0 40 0e 12 QME2 0 0 300 0e 12 GIDL1 0 0
43. ce CJO AREAeff CJP F PJeff 0 0 Zero bias periphery capacitance CJSW FC 0 5 Coefficient for forward bias depletion area capacitance FCS 0 5 Coefficient for forward bias depletion periphery capacitance M EXA 0 5 Area junction grading coefficient MJ MJSW 0 33 Periphery junction grading EXP coefficient PB PHI V 0 8 Area junction contact potential VJ PHA PHP V PB Periphery junction contact potential TT s 0 0 Transit time Metal and Poly Parameters Level 3 Name Alias Unit Default Description LM m 0 0 Default length of metal LP m 0 0 Default length of polysilicon WM m 0 0 Default width of metal WP m 0 0 Default width of polysilicon XM m 0 0 Accounts for masking and etching effects in metal layer XOl A 7000 Thickness of poly to bulk oxide XOM A 10k Thickness of metal to bulk oxide XP 0 0 Accounts for masking and etching effects in poly layer 14 Diodes Noise Parameters LEVEL 1 and 3 Name Alias Unit Default Description AF 1 0 Flicker noise exponent KF 0 0 Flicker noise coefficient Temperature Effects Temperature Effect Parameters LEVEL 1 and 3 Name Alias Unit Default Description CTA 1 0 0 Temperature coefficient for area CTC junction capacitance CJ CTP 4 0 0 Temperature coefficient for periphery junction capacitance CJP EG eV Energy gap
44. ch DFT Compiler Direct RTL Direct Silicon Access Discovery DW8051 DWPCI Dynamic Macromodeling Dynamic Model Switcher ECL Compiler ECO Compiler EDAnavigator Encore Encore PQ Evaccess ExpressModel Floorplan Manager Formal Model Checker FoundryModel FPGA Compiler Il FPGA Express Frame Compiler Galaxy Gatran HDL Advisor HDL Compiler Hercules Hercules Explorer Hercules ll Hierarchical Optimization Technology High Performance Option HotPlace HSPICE Link iN Tandem Integrator Interactive Waveform Viewer i Virtual Stepper Jupiter Jupiter DP JupiterXT JupiterXT ASIC JVXtreme Liberty Libra Passport Library Compiler Libra Visa Magellan Mars Mars Rail Mars Xtalk Medici Metacapture Metacircuit Motamenager Metamixsim Milkyway ModelSource Module Compiler MS 3200 MS 3400 Nova Product Family Nova ExploreRTL Nova Trans Nova VeriLint Nova VHDLlint Optimum Silicon Orion_ec Parasitic View Passport Planet Planet PL Planet RTL Polaris Polaris CBS Polaris MT Power Compiler PowerCODE PowerGate ProFPGA ProGen Prospector Protocol Compiler PSMGen Raphael NES RoadRunner RTL Analyzer Saturn ScanBand Schematic Compiler Scirocco Scirocco i Shadow Debugger Silicon Blueprint Silicon Early Access SinglePass SoC Smart Extraction SmartLicense SmartModel Library Softwire Source Level Design Star Star DC Star MS Star MTB Star Power Star Rail Star RC Star RCXT Star Sim Star SimxXT Star Time St
45. citance including intrinsic overlap and fringing components and junction capacitance 57 59 60 QGI LX97 Intrinsic Gate charge 49 53 QSI LX98 Intrinsic Source charge 49 53 QDI LX99 Intrinsic Drain charge 49 53 QBI LX100 Intrinsic Bulk charge Charge Conservation QBI QGI QSI QDI 49 53 CDDBI LX101 Intrinsic drain capacitance 49 53 CBDBI LX102 Intrinsic bulk to drain capacitance 49 53 64 MOSFET Models Name Alias Description MOSFET Levels CBSBI LX103 Intrinsic bulk to source 49 53 capacitance VBDI LX109 Body drain voltage VBD 57 58 59 Meyer and Charge Conservation IGISLO LX110 Gate induced source leakage 54 current The remainder of this section provides the general syntax for and basic description of the commonly used MOSFET models LEVEL 47 and higher LEVEL 47 BSIM3 Version 2 MOS Model The LEVEL 47 model uses the general MOSFET model statement It also uses the same e Model parameters for source drain diode current capacitance and resistance ACM controls the choice of source drain equations e Noise equations as the other LEVELs NLEV controls the choice of noise equations Like all MOSFET models LEVEL 47 can use parameters to model process skew either by worst case corners or by Monte Carlo Using BSIM3 Version 2 e Set LEVEL 47 to identify t
46. depleted FD SOI models no dynamic mode operating between NFD and FD allowed that separately describe two main types of SOI devices 76 MOSFET Models The UFSOI version 4 5F model has been installed in HSPICE as LEVEL 58 This model is described in the UFSOI Model User s Manual at http www soi tec ufl edu In some processes there is an external body contact to the device HSPICE only supports a 4 terminal device which includes drain front gate source and back gate or substrate Additional body contact is not supported and is floated The effects of parasitic diodes in SOI are different from those in bulk MOSFET The junction model ACM developed for bulk MOSFETs is not included in the SOI model LEVEL 59 UC Berkeley BSIM3 SOI FD General Mxxx nd ng ns ne lt np gt mname lt L vab lt W val gt Form lt M val gt lt AD valb lt AS val gt lt PD vakb lt PS vab gt lt NRD vab lt NRS vab lt NRB vab lt RTHO val gt lt CTHO val gt lt off gt lt BUToff vab lt IC Vds Vgs Vbs Ves Vps gt AD Drain diffusion area AS Source diffusion area BJTOFF Turning off BUT if equal to 1 CTHO Thermal capacitance per unit width IC Initial guess in the order L SOI MOSFET channel length in meters M Multiplier to simulate multiple SOI MOSFETs in parallel mname MOSFET model name reference Mxxx SOI MOSFET element name nd Drain terminal nod
47. e ZCI 0 333 Exponent coefficient VPTCI V 416 Punch through voltage q Nci w 2ci 2epsilion Forward Transit Time Parameters Parameter Unit Default Description TO s 4 75e 12 Low current transit time at V g 0 DTOH s 2 1e 12 Time constant for base and BC SCR width modulation TBVL s 40e 12 Voltage for carrier jam at low Voge TEFO s 1 8e 12 Storage time in neutral emitter GTFE 1 4 Exponent factor for current dep emitter transit time THCS s 3 0e 11 Saturation time constant at high current densities ALHC 0 75 Smoothing factor for current dep C and B transit time FTHC 0 6 Partitioning factor for base and collection portion ALQF 0 225 Additional delay time of Q_f Critical Current Parameters Inverse Transit Time Parameter Unit Default Description RCIO Ohm 127 8 Low field resistance of internal collector region VLIM V 0 7 Voltage separating ohmic and SCR VPT V 5 0 Epi punch through vtg of BC SCR VCES V 0 1 Internal CE sat vtg Parameter Unit Default Description TR S 1 0e 9 Time constant for inverse operation Base Current Components Parameter Unit Default Description IBEIS A 1 16e 20 BE saturation current MBEI 1 015 BE saturation current IREIS A 1 16e 6 BE recombination saturation current 32 BJT Element Parameter Unit Default D
48. e partition model for the induced gate noise A non quasi static NQS model consistent with the Rii based RF model and an AC model that accounts for the NQS effect in both transconductances and capacitances A gate direct tunneling model A geometry dependent parasitics model for various source drain connections and multi finger devices A model for steep vertical retrograde doping profiles A model for pocket implanted devices in Vth bulk charge effect model and Rout Asymmetrical and bias dependent source drain resistance Select either internal or external to the intrinsic MOSFET Accepts either electrical or physical gate oxide thickness as the model input 70 MOSFET Models e Quantum mechanical charge layer thickness model for both IV and CV e A mobility model for predictive modeling e A gate induced drain leakage GIDL current model e A unified flicker 1 f noise model which is smooth over all bias regions and considers the bulk charge effect e Different diode IV and CV characteristics for source and drain junctions e Junction diode breakdown with or without current limiting e Dielectric constant of a gate dielectric as a model parameter BSIM4 2 1 has the following major improvements and additions over BSIM4 2 0 e GISL Gate Induced Source Leakage current component corresponds to the same current at the drain side GIDL e The warning limits for effective channel length channel width and gate
49. e 20 V TO 0s DTOH 0s TBVL 0s TEFO 0s GTFE 1 THCS 0s ALHC 0 1 FTHC 0 ALQF 0 RCIO 150 ohm VLIM 0 4 V VPT 3V VCES 0 1 V TR 0s IBEIS 1e 18 A MBEI 1 IREIS 1e 30 A MREI 2 IBCIS 1e 16 A MBCI 1 FAVL 0 1 V QAVL 0 As RBIO 0 ohm FDQRO 0 FGEO 0 6557 FQI 1 FCRBI 0 LATB 0 LATL 0 CJEPO 0F VDEP 0 9 V ZEP 0 5 ALJEP 2 5 IBEPS 1e 30 A MBEP 1 IREPS 1e 30 A MREP 2 IBETS 0A ABET 40 CJCX0 0 F VDCX 0 7 V ZCX 0 4 VPTCX 1e 20 V CCOX 0F FBC 0 IBCXS 1e 30 A MBCX 1 CEOX 0F RBX 0 ohm RE 0 ohm RCX 0 ohm ITSS 1e 30 A MSF 1 TSF 0 ISCS 1e 30 A MSC 1 CJSO 0 F VDS 0 6 V ZS 0 5 VPTS 1e 20 V RSU 0 ohm CSU 0F KF 0 AF 2 VGB 1 17 V ALB 0 005 1 K ALTO 0 1 K KTO 0 1 K ZETACI 0 ALVS 0 1 K ALCES 0 1 K ZETARBI 0 ZETARBX 0 ZETARCX 0 ZETARE 0 ALFAV 0 00083 1 K ALQAV 0 002 1 K RTH 0 K W CTH 0 K W KRBI 1 ZETACX 0 IS 1e 16 MCF 1 MSR 1 FBCS 1 BJT Element 37 Level 9 VBIC99 Model The VBIC 95 Vertical Bipolar Inter Company Model for Motorola bipolar transistor device is BUT level 4 VBIC99 the new version of the VBIC model is BUT level 9 To use the VBIC99 model specify the Level 9 parameter for the bipolar transistor model VBIC99 covers several improved effects compared to the VBIC95 model In VBIC99 temperature coefficients of base and collector re
50. e drain junction including the channel edge PDBCP Parasitic perimeter length for body contact at drain side PS Perimeter of the source junction including the channel edge PSBCP Parasitic perimeter length for body contact at source side RDC Additional drain resistance due to contact resistance with units of ohms RSC Additional source resistance due to contact resistance with units of ohms RTHO Thermal resistance per unit width TNODEOUT Temperature node flag indicating the use of T node VBSUSR Optional initial value of Vbs that you specify for transient analysis Ww MOSFET channel width in meters The UC Berkeley SOI model BSIM3 SOI supports Fully Depleted FD Partially Depleted PD and Dynamically Depleted DD SOI devices of which BSIM3PD2 0 1 for PD SOI devices is LEVEL 57 Level 57 also includes a Full Depletion FD module soiMod 1 This module provides a better fit to FD SOI devices As soiMod 0 default the model is identical to previous BSIMSOI PD models This module also includes gate to channel drain source tunneling currents and overlap components DELTOX in the MOS active element M models the relative variation on the transconductance oxide thickness of the MOS in Monte Carlo analysis This model is described in the BSIM3PD2 0 MOSFET MODEL User s Manual at http www device eecs berkeley edu bsim3soi MOSFET Level 57 model also supports the UCB BSIMSOI3
51. e keyword value gt Resistors Resistor Element General Rxxx n1 n2 lt mname gt Rval lt TC1 lt TC2 gt gt Form lt SCALE vab lt M vab lt AC vab lt DTEMP vab lt L val gt lt W vab lt C vab lt NOISE vab Or Rxxx n1 n2 lt mname gt lt R gt resistance lt TC1 vab lt TC2 vab lt SCALE val gt lt M val gt lt AC val gt lt DTEMP vab gt lt L val gt lt W vab lt C vab lt NOISE vab Or Rxxx n1 n2 R user defined equation If you specify mname the resistor value is optional AC Resistance for AC analysis C Capacitance DTEMP Element and circuit temperature difference L Resistor length in meters M Multiplier used to simulate parallel resistors mname Resistor model name ni Positive terminal node name n2 Negative terminal node name NOISE NOISE 0 do not evaluate resistor noise NOISE 1 evaluate resistor noise default R Resistance value at room temperature Rxxx Resistor element name SCALE Element scale factor for resistance and capacitance TC1 First order temperature coefficient TC2 Second order temperature coefficient 2 Passive Devices and Independent Sources user defined Function of any node voltages element currents equation temperature frequency or time WwW Resistor width Wire RC Model General Form MODEL mname R keyword value lt CRATIO vab keyword Any model parameter name mname Model name R
52. e name or number ne Back gate or substrate node name or number ng Front gate node name or number np Optional external body contact node name or number NRB Number of squares for body series resistance NRD Number of squares of drain diffusion for drain series resistance NRS Number of squares of source diffusion for source series resistance ns Source terminal node name or number MOSFET Models 77 OFF Sets initial condition to OFF in DC analysis PD Perimeter of drain junction including the channel edge PS Perimeter of source junction including the channel edge RTHO Thermal resistance per unit width WwW MOSFET channel width in meters The UC Berkeley SOI BSIM3 SOI Fully Depleted FD model is MOSFET LEVEL 59 This model is described in the BSIM3SOI FD2 1 MOSFET MODEL User Manual at http www device eecs berkeley edu bsim3soi LEVEL 60 UC Berkeley BSIM3 SOI DD Model General Mxxx nd ng ns ne lt np gt mname lt L valb gt lt W val gt Form lt M valb gt lt AD val gt lt AS vab lt PD vab lt PS vab lt NRD vab lt NRS vakb lt NRB vab lt RHT0 vab lt CTHO vakb lt off gt lt BJToff val gt lt IC Vds Vgs Vbs Ves Vps gt Mxxx SOI MOSFET element name nd Drain terminal node name or number ng Front gate node name or number ns Source terminal node name or number ne Back gate or substrate
53. ea unitless for LEVEL 1 diode square meters for LEVEL 3 diode not used in Level 2 OFF Sets initial condition to OFF in DC analysis Default ON IC vd Initial voltage across this element M Multiplier to simulate multiple diodes WwW Width of diode in meters Overrides W in the LEVEL 2 model Default 0 0 L Length of diode in meters Overrides L in the LEVEL 2 model Default 0 0 PJ Periphery of junction unitless for LEVEL 1 meters for LEVEL 3 diode not used in Level 2 WP Width of polysilicon capacitor in meters WM Width of metal capacitor in meters not in Level 2 LM Length of metal capacitor in meters not in Level 2 Diode Model Parameters LEVEL 2 Name Alias Unit Default Description EF V cm 1 0e8 Forward critical electric field ER V cm EF Reverse critical electric field JF amp V 1 0e Forward Fowler Nordheim current 10 coefficient 16 Diodes Name Alias Unit Default Description JR amp v2 JF Reverse Fowler Nordheim current coefficient L m 0 0 Length of diode for calculation of Fowler Nordheim current TOX A 100 0 Thickness of oxide layer WwW 0 0 Width of diode for calculation of Fowler Nordheim current XW m 0 0 Account for masking and etching effects Level 4 JUNCAP Diode Model General Syntax General Form Dxxx nodeplus nodeminus modelname lt lt area gt val gt lt lt peri gt val lt lt pgate gt va
54. ecifies the inductance calculated by a polynomial R Inductor resistance in ohms Default 0 0 SCALE Element scale parameter scales inductance by its value Default 1 0 TC1 First order temperature coefficient TC2 Second order temperature coefficient Mutual Inductor Element General Form Kxxx Lyyy Lzzz lt K gt coupling magnetization Mutual Core Kaaa Lbbb lt Lccc lt Lddd gt gt mname Form lt MAG magnetization gt K coupling Coefficient of mutual coupling KXXX Mutual inductor element name Lyyy Name of the first of two coupled inductors Lzzz Name of the second of two coupled inductors Kaaa Saturable core element name Must begin with K followed by up to 1023 alphanumeric characters Lbbb Lccc Names of the windings about the Kaaa core Must use Lddd the magnetic winding syntax mname Saturable core model name MAG Initial magnetization of the saturable core You can set this to 1 O or 1 Polynomial Inductor Element General Lxxx n1 n2 POLYCO c1 lt L gt inductance Form lt lt TC1 gt vab lt lt TC2 gt va lt SCALE vab lt IC vab lt M va lt DTEMP vab lt R vab Magnetics Magnetic Winding Element General Lxxx n1 n2 NT turns lt L gt inductance lt lt TC1 gt vab Form lt lt TC2 gt vab lt SCALE vab lt lC va lt M vab lt DTEMP vakb lt R vab Mutual Core Statement General Form Kaaa Lbbb l
55. efault area multiplier HDIF m 0 Distance of the heavily diffused or low resistance region from source or drain contact edge to lightly doped region IS amp 1 0e 14 Gate junction saturation current L m 0 0 Default length of FET LDEL m 0 0 Difference between drawn and actual or optical device length LDIF m 0 Width of the lightly doped region from heavily doped region to transistor edge N 1 0 Emission coefficient for gate drain and gate source diodes RD ohm 0 0 Drain ohmic resistance RG ohm 0 0 Gate resistance RS ohm 0 0 Source ohmic resistance RSH ohm sq O Heavily doped region sheet resistance RSHG ohm sq 0 Gate sheet resistance RSHL ohm sq O Lightly doped region sheet resistance W m 0 0 Default width of FET WDEL m 0 0 The difference between drawn amp actual or optical device width Gate Capacitance LEVEL 1 2 and 3 Parameters Name Alias Unit Default Description CAPOP 0 0 Capacitor model selector CALPHA ALPHA Saturation factor for capacitance model CAPOP 2 only CAPDS F Drain to source capacitance for TriQuint model 42 JFET and MESFET Elements Name Alias Unit Default Description CGAMDS GAMDS Threshold lowering factor for capacitance CAPOP 2 only CGD F 0 0 Zero bias gate drain junction capacitance CGS F 0 0 Zero bias gate source junction capacitance CRAT 0
56. endence of velocity overshoot RPOCK1 0 0V2 m1 2 resistance coefficient caused by the potential barrier RPOCK2 0 0V resistance coefficient caused by the potential barrier Level 64 Channel Length Modulation Parameters Parameter Default Description CLM1 0 3 hardness coefficient of channel contact junction CLM2 0 0 coefficient for Qg contribution CLM3 0 0 coefficient for Q contribution Level 64 Substrate Current Parameters Parameter Default Description SUB1 0 0Vv 1 substrate current coefficient 1 SUB2 70 0 substrate current coefficient 2 SUB3 1 0 substrate current coefficient 3 Level 64 Gate Current Parameters Parameter Default Description GLEAK1 0 0A V 22 C gate current coefficient 1 GLEAK2 0 0 gate current coefficient 2 GLEAK3 0 0 gate current coefficient 3 GLPART1 0 partitioning ratio of gate leakage current GLPART2 0 partitioning ratio of gate leakage current 86 MOSFET Models Level 64 GIDL Current Parameters Parameter Default Description GIDL1 0 0A m V22 C GIDL current coefficient 1 GIDL2 0 0V71 2 em GIDL current coefficient 2 GIDL3 0 0 GIDL current coefficient 3 Level 64 1 f Noise Parameters Parameter Default Description NFALP 2 0e 15 NFTRP 1 0e11 contribution of the mobility fluctuation ratio of trap density to attenuation coefficient CIT 0 0F cm2 capacit
57. ept and Charge Conservation 54 57 59 60 CBDBO LX22 Intrinsic bulk to drain 54 capacitance CBDBO LX22 Intrinsic floating body to drain 57 59 60 capacitance CBSBO LX23 CBSBO dQb dVs Meyer All except and Charge Conservation 54 57 59 60 CBSBO LX23 Intrinsic bulk to source 54 capacitance CBSBO LX23 Intrinsic floating body to source 57 59 60 capacitance MOSFET Models 59 Name Alias Description MOSFET Levels QBD LX24 Drain bulk charge QBD 49 53 54 QBS LX25 LX26 Drain bulk charge current CQBD not used in HSPICE releases after 95 3 Source bulk charge QBS All All LX27 Source bulk charge current CQBS not used after HSPICE release 95 3 All CAP_BS CAP_BS LX28 LX28 Bias dependent bulk source capacitance Extrinsic drain to substrate Capacitances Meyer and Charge Conservation CAP_BS csbox csesw csbox is the substrate to source bottom capacitance csesw is the substrate to source sidewall capacitance All except 57 58 57 58 CAP_BD CAP_BD LX29 LX29 Bias dependent bulk drain capacitance Extrinsic source to substrate Capacitances Meyer and Charge Conservation CAP_BD cdbox cdesw cdbox is the substrate to drain bottom capacitance cdesw is the substrate to drain sidewall capacitance All except 57 58 57 58 Cas LX31 Channel charge current CQS All CD
58. escription MREI 2 0 BE recombination non ideality factor IBCIS A 1 16e 20 BC saturation current MBCI 1 015 BC non ideality factor Weak BC Avalanche Breakdown Parameter Unit Default Description FAVL 1 V 1 186 Pre factor for CB avalanche effect QAVL As 1 11e 14 CB avalanche effect exponent factor Internal Base Resistance Parameter Unit Default Description RBIO Ohm 0 Value at zero bias FDQRO 0 0 Correction factor for modulation by BE and BC SCR FGEO 0 73 Geometry factor value corresponding to long emitter stripe FQI 0 9055 Ratio of internal to total minority charge FCRBI 0 0 Ratio of h f shunt to total internal capacitance Lateral Scaling Parameter Unit Default Description LATB 3 765 Scaling factor for Qfc in b_E direction LATL 0 342 Scaling factor for Qfc in I_E direction Peripheral Elements BE Depletion Capacitance Parameter Unit Default Description CJEPO F 2 07e 15 Zero bias value VDEP V 1 05 Built in voltage ZEP 0 4 Depletion coeff ALJEP 2 4 Ratio of max to zero bias value BJT Element 33 Base Current Parameter Unit Default Description IBEPS A 3 72e 21 Saturation current MBEP 1 015 Non ideality factor IREPS A 1e 30 Recombination saturation factor MREP 2 0 Recombination non ideality factor
59. esistivity of the buried layer KF 2 E 16 Flicker noise coefficient ideal base current KFN 2 E 16 Flicker noise coefficient non ideal base current AF 1 0 Flicker noise exponent ISS A 6 E 16 Base substrate saturation current IKS A 5 E 6 Knee current of the substrate CJS F 1 e 12 Zero bias collector substrate depletion capacitance VDS V 0 5 Collector substrate diffusion voltage PS 0 33 Collector substrate grading coefficient VGS V 1 15 Substrate band gap voltage AS 2 15 e Fora closed buried layer AS AC e For an open buried layer AS AEPI DTA C 0 Global model parameter Difference between the circuit temperature and the ambient temperature MULT 1 Multiplier to simulate multiple BUTs in parallel You can use either of two parameters to specify the difference between the circuit temperature and the ambient temperature in the MEXTRAM model e dtemp instance parameter as set in the element statement e DTA global model parameter e DTA and atemp both default to zero dtemp overrides DTA locally if you specify both The dtemp value derates the temperature in model equations and parameters e If you do not specify either the dtemp or the DTA parameter then dtemp 0 0 26 BJT Element e If you specify DTA but not dtemp dtemp uses the DTA value e If you specify dtemp then simulation uses the dtemp value and ignores the DTA value Philips MEXTRAM 504 Parameters The following tab
60. for the excess channel diffusion resistance for intrinsic input resistance MOSFET Models 75 e NGCON number of gate contacts e XGW distance from the gate contact to the channel edge in the W direction e XGL offset of the gate length due to variations in patterning e RSHG gate electrode sheet resistance Gate Resistance Equivalent Circuit e RGATEMOD 0 No gate resistance default e RGATEMOD 1 Constant gate resistance e RGATEMOD 2 Variable resistance with Rii model e RGATEMOD 3 Rii model with two nodes e Rgeltd Poly gate electrode resistance bias independent e Rii Intrinsic input gate resistance reflected to the gate from the intrinsic channel region It is bias dependent and a first order non quasi static model for RF and rapid transient MOSFET operations Enhanced Binning Capability Model parameters for the following components are now binnable for better accuracy and scalability e Junction depth e Gate tunneling current e Temperature dependence of threshold voltage mobility saturation velocity parasitic resistance and diode currents LEVEL 58 University of Florida SOI Model General Mxxx nd ngf ns lt ngb gt mname lt L vab lt W val gt Form lt M valb lt AD vab lt AS vab gt lt PD vab lt PS vab gt lt NRD vab lt NRS vab lt NRB val gt lt RTH vab lt CTH vak lt off gt lt IC Vds Vgfs VGbs gt UFSOI has non fully depleted NFD and fully
61. from weak to strong inversion region CF3 1 0 Transition of cgs and cgd from saturation to linear region as a function of vds CF4 50 0 Contour of cgb and cgs smoothing factors CF5 0 667 Capacitance multiplier for cgs in saturation region CF6 500 0 Contour of cgd smoothing factor CGBEX 0 5 Cgb exponent 52 MOSFET Elements Gate Capacitances Simpson Integration CAPOP 3 CAPOP 3 uses the same set of equations and parameters as the CAPOP 2 model Charges are obtained by Simpson numeric integration instead of the box integration in CAPOP models 1 2 and 6 Charge Conservation Parameters CAPOP 4 Name Alias Unit Default Description XQC z 0 5 Coefficient of channel charge share attributed to drain Gate Capacitance CAPOP 5 Use CAPOP 5 for no capacitors and simulation does not calculate the gate capacitance Noise Parameters Name Alias Unit Default Description AF 1 0 Flicker noise exponent KF 0 0 Flicker noise coefficient GDSNOI 1 0 Channel thermal noise coefficient NLEV 2 0 Noise equation selector Temperature Effects Parameters Name Alias Unit Default Description BEX 1 5 Low field mobility UO temperature exponent CTA 1 K 0 0 Junction capacitance CJ temperature coefficient CTP 1 K 0 0 Junction sidewall capacitance CUSW temperature coefficient EG eV
62. he BSIM3 model e The default setting is CAPOP 13 BSIM1 charge conserving capacitance model e The TNOM model parameter is an alias for TREF for compatibility with SPICES e Default room temperature is 25 C in HSPICE but 27 C in SPICE3 to specify BSIM3 model parameters at 27 C use TREF 27 e The default of DERIV is zero analytical method if set to 1 finite difference method it gives more accurate derivatives but consumes more CPU time MOSFET Models 65 e Three ways that BSIM3 can calculate Vp User specified K1 and K2 values GAMMA1 GAMMA2 VBM and VBX values entered in the MODEL statement User specified NPEAK NSUB XT and VBM values e NPEAK and UO can be in meters or centimeters You must enter the parameter NSUB in cm units e VTHO for P channel in the MODEL statement is negative e Default value of KT7 is 0 11 e Minimum LI TL value is 1 0e 9 m e VSAT after temperature adjustment is not allowed to go below a minimum value of 1 0e4 m sec to assure that it is positive after temperature compensation e The model parameters that accommodate temperature dependencies are KT1 and KT2 for VTH UTE for UO AT for VSAT UAT for UA UB1 for UB and UC1 for UC e Set up the conversion of temperature between HSPICE and SPICES as follows SPICE3 OPTION TEMP 125 MODEL NCH NMOS LEVEL 8 TNOM 27 HSPICE TEMP 125 MODEL NCH NMOS LEVEL 47 TREF S27 eas e SCALM affects the com
63. ied layer AS AEPI 30 BJT Element Self Heating Parameters Level 504 Parameter Unit Default Description RTH C W 0 Thermal resistance CTH J PC 0 Thermal capacitance LEVEL 8 HiCUM Model The general form is the same as in LEVEL 6 Philips Bipolar Model on page 23 Model Parameters Parameter Unit Default Description LEVEL 8 HiCUM BJT level TREF Cc 26 85 Temperature in simulation VERS 2 0 Version use 2 1 for self heating Internal Transistors Transfer Current Parameters Parameter Unit Default Description C10 A 2s 3 76e 32 Constant if IS gt 0 C10 IS QPO otherwise C10 C10 Qpo As 2 78e 14 Zero bias hole charge ICH fa 209e 0z High current correction for 2D 3D HFC 1 0 Weighting factor for Qfc in HBTs HFE 1 0 Weighting factor for Qef in HBTs HJCI 1 0 Weighting factor for Qjci in HBTs HJEI 0 0 Weighting factor for Qjei in HBTs ALIT 0 45 Factor for additional iT delay time BE Depletion Capacitance Parameters Parameter Unit Default Description VDEI V 0 95 Built in voltage CJEIO F 8 11e 15 Zero bias value ZEI 0 5 Exponent coefficient ALJEI 1 8 Ratio of max to zero bias value BJT Element 31 BC Depletion Capacitance Parameters Parameter Unit Default Description CJCIO F 1 16e 15 Zero bias value VDCI V 0 8 Built in voltag
64. iode model LEVEL Identifies a diode model LEVEL 4 JUNCAP Diode Model keyword Model parameter keyword JSGBR JSDBR Juncap Model Parameters Name Alias Unit Default Description AB M2 1e 12 Diffusion area LS M 0 0 Length of side wall for AB diffusion area not under gate Default deviates from Philips JUNCAP 1 0e 6 LG M 0 0 Length of side wall for AB diffusion area under gate Default deviates from Philips JUNCAP 1 0e 6 DTA C 0 0 Juncap temperature offset TR C 25 Pre set temp parameters VR V 0 0 Pre set voltage parameters JSGBR Am2 1 0E 3 Bottom saturation current density due to electron hole generation at V VR JSDBR Am2 1 0E 3 Bottom saturation current density due to back contact JSGSR Am2 1 0E 3 Sidewall saturation current due to electron hole generation at V VR JSDSR Am 1 0E 3 Sidewall saturation current due to back contact JSGGR Am 1 0E 3 Gate edge saturation current due to electron hole generation at V VR JSDGR Am 1 0E 3 Gate edge saturation current due to back contact NB 1 0 Emission coefficient of bottom forward current NS 1 0 Emission coefficient of sidewall forward current NG 1 0 Emission coefficient of gate edge forward current VB V 0 9 Reverse breakdown voltage CJBR Fm2 1 0E 12 Bottom junction capacitance 18 Diodes Name Alias Unit Default Description CJSR Fm2 1 0E 12 Sidewall junction capacitance CJGR Fm2 1 0E
65. ions are optional Cxxx Capacitor element name Must begin with C followed by up to 1023 alphanumeric characters ni Positive terminal node name n2 Negative terminal node name mname Capacitance model name C Capacitance at room temperature as a numeric value capacitance or a parameter in farads TC1 First order temperature coefficient TC2 Second order temperature coefficient SCALE Element scale parameter IC Initial voltage across the capacitor in volts M Multiplier to simulate multiple parallel capacitors Default 1 0 Ww Capacitor width in meters L Capacitor length in meters DTEMP Element temperature difference from the circuit temperature in degrees Celsius C Capacitance at room temperature as a function of a equation node voltage branch current or independent variable such as time frequency HERTZ or temperature CTYPE Determines capacitance charge calculation for elements with capacitance equations If a capacitor model uses the same name as a parameter for capval the model name is taken to avoid syntactic conflicts 4 Passive Devices and Independent Sources Capacitance Model General MODEL mname C parameter value Form C Specifies a capacitance model mname Model name parameter Any model parameter name Polynomial Capacitor Elements General Cxxx n1 n2 POLY c0 c1 l
66. l gt lt lt dtemp gt vab lt lt off gt val gt lt lt lC gt val gt lt lt m gt val gt Dxxx Diode element name Must begin with D nodeplus Positive terminal anode node name Series resistor of the equivalent circuit is attached to this terminal nminus Negative terminal cathode node name mname Diode model name reference area Diode area In the model card AB can use this value peri Side wall length in the AB diffusion area which is not under the gate In the model card LS uses this value pgate Side wall length in the AB diffusion area which is under the gate In the model card LG uses this value off Sets initial condition for this element to OFF in DC analysis The default is ON M Multiplier to simulate multiple diodes in parallel The M setting affects all currents capacitances and resistances Default 1 ic Initial voltage across a diode element Use this value when you specify the UIC option in the tran statement The IC statement overrides this value Dtemp Difference between element temperature and circuit temperature in degrees celsius Default 0 0 option list Prints the updated temperature parameters for the juncap diode model Diodes 17 Juncap Model Statement General Form MODEL modelname D level 4 lt keyword vab modeiname Model name D Identifies a d
67. les describe MEXTRAM Level 504 Level 6 model parameters including parameter names units default values descriptions and notes Parameters with are not in the DC model Flags Level 504 Parameter Unit Default Description LEVEL 6 Model level VERS 504 Flag for choosing MEXTRAM model level 503 or 504 EXMOD 1 Flag for extended modeling of the reverse current gain EXPHI 1 Flag for distributed high frequency effects in transient EXAVL 0 Flag for extended modeling of avalanche currents TREF AC 25 0 Reference temperature SUBS 1 Flag for substrate effect e subs 1 applies substrate effect e subs 0 does not apply substrate effect OUTFLAG 0 Flag displays more output data Basic Parameters Level 504 Parameter Unit Default Description IS A 2 2e 17 Collector emitter saturation current VER 2 5 Reverse early voltage VEF 44 0 Forward early voltage BF 215 0 Ideal forward current gain XIBI 0 0 Fraction of ideal base current that belongs to the sidewall IBF A 2 7e 15 Saturation current of non ideal forward base current MLF V 2 0 Non ideality factor of non ideal forward base current BJT Element 27 Basic Parameters Level 504 Continued Parameter Unit Default Description IK A 0 1 Collector emitter high injection knee current BRI 7 0 Ideal reverse current gain IBR A 1 0e 15 Saturation current
68. lier MULUB second order mobility degradation coefficient UB multiplier When HSPICE prints back a MOSFET element summary option list it identifies the BSIM3V3 MOSFET and prints back these three additional instance parameters For more information about this model see LEVELs 49 and 53 BSIM38v3 MOS Models in the HSPICE MOSFET Models Manual MOSFET Models 67 Selecting Model Versions The recommended BSIM3v3 model specification is LEVEL 49 VERSION 3 22 LEVEL 50 Philips MOS9 Model The Philips MOS9 model available in HSPICE as LEVEL 50 uses the general model statement described in MOSFET Model Statement on page 49 Specific changes include e The ACM Parasitic Diode Model using parameters JS JSW N CJ CUSW CJUGATE MJ MJSW PB PHP ACM and HDIF was added e The Philips JUNCAP Parasitic Diode Model were added e The JUNCAP 1 model parameter selects the JUNCAP Model JUNCAP 0 default selects the ACM Model e Gate noise current is not available For more information see http www us semiconductors com Philips_Models LEVEL 54 BSIM 4 0 Model General Form Mxxx nd ng ns lt nb gt mname lt L val gt lt W val gt lt M val gt lt AD val gt lt AS val gt lt PD val gt lt PS val gt lt RGATEMOD val gt lt RBODYMOD val gt lt TRNQSMOD val gt lt ACNQSMOD val gt lt GEOMOD val gt lt RGEOMOD val gt lt NRS val gt lt NRD val gt lt RBPB val gt lt RBPD val gt lt RBPS val g
69. lt gt so sa fm fc lt td gt lt gt AM Keyword for an amplitude modulated time varying source EXP Keyword for a exponential time varying source fc Carrier frequency in Hz fm Modulation frequency in hertz Default 1 TSTOP freq Source frequency in Hz Default 1 TSTOP fs Signal frequency in Hz j Phase delay in units of degrees mdi Modulation index that determines the magnitude of deviation from the carrier frequency oc Offset constant a unitless constant that determines the absolute magnitude of the modulation Default 0 0 per Pulse repetition period in seconds PULSE Keyword for a pulsed time varying source Passive Devices and Independent Sources 9 PV Parameter name for amplitude value provided in a DATA statement pw Pulse width the width of the plateau portion of the pulse in seconds PWL Keyword for a piecewise linear time varying source Damping factor in units of 1 seconds sa Signal amplitude in volts or amps Default 0 0 SFFM Keyword for a single frequency frequency modulated time varying source SIN Keyword for a sinusoidal time varying source t1 Rise time constant in seconds t1 t2 tn Timepoint values where the corresponding current or voltage value is valid t2 Fall time constant in seconds td Delay time before the start of the signal in seconds Default 0 0 tf Duration of the recovery ra
70. lt off gt lt BUToff val gt lt IC Vds Vgs Vbs Ves Vps gt AD Drain diffusion area AEBCP Parasitic body to substrate overlap area for body contact AGBCP Parasitic gate to body overlap area for body contact AS Source diffusion area BJTOFF Turning off BUT if equal to 1 CTHO Thermal capacitance per unit width DELTOX Shift in gate electrical physical equivalent oxide thickness TOXE and TOXP FRBODY Coefficient of distributed body resistance effects Default is 1 0 IC Initial guess in the order L SOI MOSFET channel length in meters M Multiplier to simulate multiple SOI MOSFETs in parallel mname MOSFET model name reference Mxxx SOI MOSFET element name nb Internal body node name or number NBC Number of body contact isolation edge nd Drain terminal node name or number ne Back gate or substrate node name or number ng Front gate node name or number np External body contact node name or number NRB Number of squares for body series resistance NRD Number of squares of drain diffusion for drain series resistance NRS Number of squares of source diffusion for source series resistance ns Source terminal node name or number NSEG Number of segments for channel width partitioning nT Temperature node name or number MOSFET Models 73 OFF Sets initial condition to OFF in DC analysis PD Perimeter of th
71. mon MOS parameters such as XL LD XW WD CJ CJSW JS and JSW e LEVEL 47 uses MOS parasitic models specified by ACM e LEVEL 47 uses MOS noise models specified by NLEV e DELVTO and DTEMP on the element line can be used with LEVEL 47 66 MOSFET Models e The impact ionization current set by PSCBE1 and PSCBE2 contributes to the drain source current not bulk current LEVEL 49 and 53 BSIM3v3 MOS Models LEVELs 49 and 53 use the general model statement described in MOSFET Model Statement on page 49 They also maintain compliance with the UC Berkeley release of BSIM3v3 Differences between LEVEL 49 and 53 are e LEVEL 49 complies with Berkeley BSIM3v3 but enhanced for higher speed To achieve this ACM defaults to 0 in LEVEL 49 Berkeley BSIM3v3 compliance requires ACM 10 e LEVEL 53 is completely compliant with Berkeley BSIM3v3 all HSPICE specific parameters default to OFF e Level 53 maintains full compliance with the Berkeley release including numerically identical model equations identical parameter default values and identical parameter range limits e Level 49 and 53 both support the following instance parameters along with the DELVTO instance parameter for local mismatch and NBTI negative bias temperature instability modeling MULUO low field mobility UO multiplier Default 1 0 MULUA first order mobility degradation coefficient UA multip
72. mp in seconds from the pulse plateau back to the initial value forward transit time TIME Parameter name for time value provided in a DATA statement Duration of the onset ramp in seconds from the initial value to the pulse plateau value reverse transit time vi v2 vn Current or voltage values at the corresponding timepoint va Voltage or current RMS amplitude in volts or amps vo Voltage or current offset in volts or amps VXXX xxx Independent voltage source Pattern Sou rce Function General Form Vxxx n n PAT lt gt vhi vio td tr tf tsample data lt RB val gt lt R repeat gt lt gt Vxxx n n PAT lt gt vhi vio td tr tf tsample component 1 componentn lt RB val gt lt R repeat gt lt gt Ixxx n n PAT lt gt vhi vlo td tr tf tsample data lt RB val gt lt R repeat gt lt gt Ixxx n n PAT lt gt vhi vlo td tr tf tsample component 1 componentn lt RB val gt lt R repeat gt lt gt 10 Passive Devices and Independent Sources Pattern Command Driven Pattern Source General Form Vxxx n n PAT lt gt vhi vio td tr tf tsample PatName lt RB val gt lt R repeat gt lt gt Ixxx n n PAT lt gt vhi vlo td tr tf tsample Patname lt RB val gt lt R repeat gt lt gt See the HSPICE Command Reference for the syntax and description of the pattern command
73. nce e High current beta rolloff effect e Fixed collector substrate capacitance e Reverse transport saturation current Level 10 MODELLA Model The level10 Philips Modella model provides an extensive description of a lateral integrated circuit junction isolated PNP transistor The equivalent circuit analytical equations and model parameters are derived directly from the physics and structure of the lateral PNP The following list summarizes the major features in level 10 e Models current crowding under the emitter Forward early voltage depends on Vcb and Veb e Fall off of ft and hfe is due not only to high injection but also to ohmic voltage drop across the emitter e Separate saturation current for the substrate base diode Level 11 UCSD HBT Model e Most formulations from Berkeley SPICE have been grandfathered not all are retained e The HBT model allows various degrees of trade off between accuracy and computational complexity e Flags permit turning off several features of the model in order to allow faster computation or easier convergence e Default room temperature is 25 C in HSPICE but 27 C in most other simulators Level 9 VBIC99 Model 39 e The model parameter set should always include the TREF model reference temperature The default TREF value is 27 e You can use DTEMP with this model Element Syntax The element syntax of BUT Level 11 is
74. nel length modulation CLM source and drain charge sharing reverse short channel effect RSCE e Substrate current due to impact ionization e Quasi static charge based dynamic model e Thermal and flicker noise modeling e First order NQS model for transadmittances e Short distance geometry and bias dependent device matching Coherence of Static and Dynamic Models Simulation derives all aspects of the static the quasi static and the non quasi static NQS dynamic and noise models from the normalized transconductance to current ratio These expressions use symmetric normalized forward and reverse currents e For quasi static dynamic operations you can use either a charge based model for the node charges and trans capacitances or a simpler capacitances model e The dynamic model including the time constant for the NQS model is described in symmetrical terms of the forward and reverse normalized currents 72 MOSFET Models The charge formulation also expresses effective mobility dependence of a local field LEVEL 57 UC Berkeley BSIM3 SOI Model General Mxxx nd ng ns ne lt np gt lt nb gt lt nT gt mname Form lt L vab lt W vakb lt M vab lt AD val gt lt AS vab lt PD vab lt PS vab lt NRD vab lt NRS val gt lt NRB vab lt RTHO valb lt CTHO vab lt NBC vab lt NSEG vab lt PDBCP val gt lt PSBCP vab lt AGBCP val gt lt AEBCP val gt lt VBSUSR vab lt DELTOX val gt lt TNODEOUT gt
75. nel thermal noise NONE Flicker noise HiSIM1 model Level 64 Technological Parameters Parameter Default Description TOX 3 6e 9m oxide thickness XLD 0 0m gate overlap length XWD 0 0m gate overlap width MOSFET Models 83 Parameter Default Description XPOLYD 0 0m difference between gate poly and design lengths TPOLY 0 0m height of the gate poly Si RS 0 00hm m source contact resistance RD 0 00hm m drain contact resistance NSUBC 5 94e 17cem3 substrate impurity concentration NSUBP 5 94e 17cem3 maxim pocket concentration VFBC 0 722729 V flat band voltage LP 0 0m pocket penetration length XJ 0 0m junction depth KAPPA 3 9 dielectric constance for gate oxide Level 64 Temperature Dependence Parameters Parameter Default Description BGTMP1 9 03e 5eVK bandgap narrowing BGTMP2 3 05e 7eVK2 bandgap narrowing Level 64 Quantum Effect Parameters Parameter Default QME1 0 0mV QME2 0 0V QME3 0 0m Description coefficient quantum mechanical effect coefficient quantum mechanical effect coefficient quantum mechanical effect Level 64 Poly Depletion Parameters Parameter Default Description PGD1 0 0V strength of poly depletion PGD2 0 0V threshold voltage of poly depletion PGD3 0 0 Vas dependence of poly depletion 84 MOSFET Models Level 64 Short Channel Parameters
76. nnel length modulation parameter K1 y1 2 0 0 Threshold voltage sensitivity to bulk node NCHAN atom 1 552e Effective dopant concentration in cm 16 the channel ND 1 V 0 0 Drain subthreshold factor NG 0 0 Gate subthreshold factor SAT 0 0 Saturation factor SATEXP 3 Drain voltage exponent UCRIT V cm 0 Critical field for mobility degradation VBI 1 0 Gate diode built in voltage VGEXP Q 2 0 Gate voltage exponent VP Pinch off voltage default is calculated TOM Model Parameters Name Alias Unit Default Description BETATCE Temperature coefficient for BETA DELTA IDS feedback parameter CAPDS B Drain to source capacitance 44 JFET and MESFET Elements Noise Parameters Name Alias Unit Default Description AF 1 0 Flicker noise exponent KF 0 0 Flicker noise coefficient GDSNOI 1 0 Channel noise coefficient NLEV 2 0 Noise equation selector JFET MESFET Level 7 TOM 3 Model TOMS TriQuint s Own Model III is JFET MESFET Level 7 in the Synopsys models TriQuint developed it to improve the accuracy of the capacitance equations using quasi static charge conservation in the implanted layer of a MESFET Note For more information refer to TOM3 Equations Revised 2 December 1999 by Robert B Hallgren and David S Smith Parameter Descriptions Parameter Description Units Default
77. node n Negative node tranfun Transient source function one or more of AM DC EXP PE PL PU PULSE PWL SFFM SIN VXXX Independent voltage source element name Passive Devices and Independent Sources 7 Port Element General Form Pxxx p n port number Voltage or Power Information Peres lt dc mag gt lt ac lt mag lt phase gt gt gt lt one tran waveform gt KKK Power Switch kkkkkkkk lt zo val gt lt rdc vab lt rac vab lt rtran vab lt dc mag gt DC voltage or power source value Unlike the V I source you must explicitly specify the DC voltage lt ac lt mag lt phase gt gt gt AC voltage or power source value lt one tran waveforms gt TRAN voltage or power source waveform lt z0 val gt System impedance used in LIN analysis Currently supports only real impedance You can also enter zo val zo defaults to 50 ohms lt rdc vab Series resistance for DC analysis Overrides zo for DC analysis Independent Sources Pulse Source Function General Form Vxxx n n PU lt LSE gt lt gt v1 v2 lt td lt tr lt tf lt pw lt per gt gt gt gt gt lt gt Or Ixxx n n PU lt LSE gt lt gt v7 v2 lt td lt tr lt tf lt pw lt per gt gt gt gt gt lt gt Sinusoidal Source Function General Form Vxxx n n SIN lt gt vo va lt freq lt td lt q lt j gt gt gt gt
78. of non ideal reverse base current VLR V 0 2 Cross over voltage of non ideal reverse base current XEXT 0 63 Part of lex Qex Qtex and Isub that depends on the base collector voltage Vbc1 DTA C 0 Global model parameter Difference between the circuit temperature and the ambient temperature MULT 1 Multiplier to simulate multiple BUTs in parallel Avalanche Model Parameters Level 504 Parameter Unit Default Description WAVL m 1 1e 6 Epilayer thickness used in weak avalanche model VAVL V 3 0 Voltage determining avalanche current curvature SFH 0 3 Current spreading factor of avalanche model if EXAVL 1 Resistance and Epilayer Parameters Level 504 Parameter Unit Default Description RE Ohm 5 0 Emitter resistance RBC Ohm 23 0 Constant part of base resistance RBV Ohm 18 0 Zero bias value of the variable part of the base resistance RCC Ohm 12 0 Constant part of the collector resistance RCV Ohm 150 0 Resistance of the un modulated epilayer SCRCV Ohm 1250 0 Space charge resistance of epilayer IHC A 4 0e 3 Critical current for velocity saturation in the epilayer AXI 0 3 Smoothness parameter for the onset of quasi saturation 28 BJT Element Base Emitter Capacitances Level 504 Parameter Unit Default Description CJE F 7 3e 14 Zero bias emitter base de
79. or avalanche breakdown Self Heating Parameter Unit Default Description RTH K W 0 Thermal resistance not supported in v2000 4 CTH Ws K O Thermal resistance not supported in v2000 4 To use the self heating HiCUM feature in BJT Level 8 set vers 2 1 and set an RTH parameter value other than 0 If you use vers 2 0 or RTH 0 then self heating is OFF The self heating effect also applies to the circuit temperature as an increased self heating temperature T Tckt circuit temp Tsh self heating temp dtemp the difference between the circuit temperature and the ambient temperature Other Parameters Parameter Unit Default Description FBCS 1 0 Determine external BC capacitance partitioning IS A 1 0 Ideal saturation current if IS gt 0 C10 IS QPO KRBI 1 0 Noise analysis of internal resistance MCF 1 0 Non ideality factor of reverse current between base and collector VT VT MCF ZETACX 1 0 Temperature exponent factor epi layer MSR 1 0 Non ideality factor of reverse current in substrate transistor VT VT MSR 36 BJT Element Default Parameter set for HiCum v2 1 LEVEL 8 TREF 300 15 K uses TNOM value if you do not specify TREF VERS 2 1 C10 2e 30 A 2s QPO 2e 14 As ICH 1e 20 A HFC 1 HFE 1 HJCI 1 HJEI 1 ALIT 0 CJEIO O F VDEI 0 9 V ZEI 0 5 ALJEI 2 5 CJCIO 0 F VDCI 0 7 V ZCI 0 4 VPTCI 1
80. oxide thickness have been reduced to avoid unnecessary warnings if you use BSIM4 aggressively beyond the desired model card application ranges e The DELTOX parameter in the MOS active element M models the relative variation on the transconductance oxide thickness of the MOS in Monte Carlo analysis HSPICE also supports BSIM4 2 3 and BSIM4 3 0 LEVEL 55 EPFL EKV MOSFET Model The EPFL EKV MOSFET model is scalable compact and built on fundamental physical properties of the MOS structure LEVEL 55 uses the general model statement see MOSFET Model Statement on page 49 Use this model to design and simulate low voltage low current analog and mixed analog digital circuits with submicron CMOS MOSFET Models 71 Single Equation Model The EPFL EKV MOSFET model is a single expression which preserves continuity of first and higher order derivatives with respect to any terminal voltage in the entire range of validity of the model Use analytical expressions of first order derivatives as transconductances or transcapacitances LEVEL 55 models these physical effects e Basic geometrical and process related aspects as oxide thickness junction depth effective channel length and width e Effects of doping profile substrate effect e Modeling of weak moderate and strong inversion behavior e Modeling of mobility effects due to vertical and lateral fields velocity saturation e Short channel effects as chan
81. pletion capacitance VDE V 0 95 Emitter base diffusion voltage PE 0 4 Emitter base grading coefficient XCJE 0 4 Fraction of the emitter base depletion capacitance that belongs to the sidewall CBEO F 0 0 Base emitter extrinsic capacitance Base Collector Capacitances Level 504 Parameter Unit Default Description CJC F 7 8e 14 Zero bias collector base depletion capacitance VDC V 0 68 Collector base diffusion voltage PC 0 5 Collector base grading coefficient XP 0 35 Constant part of CJC MC 0 5 Coefficient for the current modulation of the collector base depletion capacitance XCJC 3 2e 2 Fraction of the collector base depletion capacitance under the emitter CBCO F 0 0 Base collector extrinsic capacitance Transit Time Parameters Level 504 Parameter Unit Default Description MTAU 1 0 Non ideality emitter stored charge TAUB S 4 2e 12 Transit time of stored base charge TAUE S 2 0e 12 Minimum transit time of stored emitter charge TEPI S 4 1e 11 Transit time stored epilayer charge TAUR S 5 2e 10 Transit time of reverse extrinsic stored base charge DEG EV 0 0 Bandgap difference over base XREC 0 0 Pre factor of recombination Ib1 part Temperature Parameters Level 504 AQBO 0 3 Temperature coefficient of the zero bias base charge BJT Element 29 Temperature Parameters Level 504 Continued AE 0
82. rrent model e COIIGS 1 yes e COIIGS 0 no Version lt 111 does not support this model COISTI Selects the shadow trench isolation STI leakage current e COISTI 1 yes e COISTI 0 no Version lt 111 does not support this model COGIDL O yes Gate induced drain leakage GIDL current model selector e COGIDL O0 yes e COGIDL 1 no This model is not activated in HiSIM1 0 release CONOIS O no 1 f noise model selector e CONOIS 0 no e CONOIS 1 yes COCGSO Selects the gate source overlap capacitance e COCGSO 0 no e COCGSO 1 yes 82 MOSFET Models Parameter Default Description COCGDO 0 Selects the gate drain overlap capacitance e COCGDO 0 no e COCGDO 1 yes COADOV 0 Selects whether lateral field induced and overlap charges capacitances are added to the intrinsic ones e COADOV 0 no e COADOV 1 yes COSMBI 0 1 f noise model selector e COSMBI 0 no e COSMBI 1 yes NOISE 5 Channel thermal and flicker noises combination selector e NOISE 1 Channel thermal noise SPICE2 model Flicker noise SPICE2 model e NOISE 2 Channel thermal noise HiSIM1 model corresponding to BSIM3 model Flicker noise HiSIM1 model e NOISE 3 Channel thermal noise SPICE2 model Flicker noise HiSIM1 model NOISE 4 Channel thermal noise HiSIM1 model corresponding to BSIM3 model Flicker noise SPICE2 model NOISE 5 Chan
83. rs BJT Element 19 BJT Model Statement General Form MODEL mname NPN lt gt lt pname1 val1 gt lt gt Or MODEL mname PNP lt pname1 val1 gt mname Model name NPN Identifies an NPN transistor model pname1 Several model parameters are possible PNP Identifies a PNP transistor model BJT Model Parameters Basic DC Model Parameters Name Alias Unit Default Definition BF BFM 100 0 Ideal maximum forward BETA BR BRM 1 0 Ideal maximum reverse BETA BULK 0 0 Sets the bulk node to a global NSUB node name IBC amp 0 0 Reverse saturation current between base and collector EXPLI amp 1 e15 Current explosion model parameter IBE amp 0 0 Reverse saturation current between base and emitter IS amp 1 0e 16 Transport saturation current ISS amp 0 0 Reverse saturation current bulk to collector or bulk to base LEVEL 1 0 Model selector NF 1 0 Forward current emission coefficient NR 1 0 Reverse current emission coefficient NS 1 0 Substrate current emission coefficient SUBS Substrate connection selector UPDATE 0 Selects alternate base charge equation 20 BJT Element Low Current Beta Degradation Effect Parameters Name Alias Unit Default Definition ISC C4 amp 0 0 Base collector leakage saturation JLC current ISE C2 amp 0 0 Base emitter leak
84. saturation current All at 1 volt bias CSSAT LV19 Source bulk saturation current All at 1 volt bias VDBEFF V20 Effective drain bulk voltage All BETAEFF LV21 BETA effective All GAMMAEFF LV22 GAMMA effective All DELTAL LV23 AL MOS6 amount of channel 1 2 3 6 modulation UBEFF LV24 UB effective 1 2 3 6 VG LV25 VG drive 1 2 3 6 VFBEFF LV26 VFB effective All LV31 Drain current tolerance not All used in HSPICE releases after 95 3 IDSTOL LV32 Source diode current tolerance All IDDTOL LV33 Drain diode current tolerance All COVLGS LV36 Gate source overlap and All fringing capacitances COVLGD LV37 Gate drain overlap and fringing All capacitances COVLGB LV38 Gate bulk overlap All except capacitances 57 59 COVLGE LV38 Gate substrate overlap 57 59 capacitances MOSFET Models 57 Name Alias Description MOSFET Levels VBS LX1 Bulk source voltage VBS All except 57 59 VES LX1 Substrate source voltage 57 59 VES VGS LX2 Gate source voltage VGS All VDS LX3 Drain source voltage VDS All CDO LX4 DC drain current CDO All CBSO LX5 DC source bulk diode current All CBSO CBDO LX6 DC drain bulk diode current All CBDO GMO LX7 DC gate transconductance All GMO GDSO LX8 DC drain source conductance All GDSO GMBSO LX9 DC substrate All except transconductance GMBSO 57 58 59 GMESO LX9 DC substrate 57 58 59 transconductance G
85. sistances are separate The temperature dependence of the built in potential is also improved Element Syntax The element syntax of BUT Level 9 is General Qxxx nc nb ne lt ns gt mname lt AREA vab lt OFF gt Form lt VBE vab lt VCE vab lt M vab lt DTEMP valb lt angle brackets gt indicate optional parameters Qxxx BJT element name Must begin with Q which can be followed by up to 1023 alphanumeric characters nc Collector terminal node name or number nb Base terminal node name and number ne Emitter terminal node name or number ns Substrate node name or number nt Self heating node name or number mname_ BJT model name reference AREA The normalized emitter area VBIC99 level 9 model has no area effect Default value 1 Area is used only as an alias of the multiplication factor M OFF Sets initial condition to OFF for this element in DC analysis You cannot use OFF with VBE or VCE VBE Initial internal base emitter voltage VCE Initial internal collector emitter voltage M Multiplier to simulate multiple BUTs in parallel DTEMP Temperature difference of element and circuit VBIC99 Model The VBIC99 model includes several effects that are improved compared to the VBIC95 model e Temperature dependency for parameters e Base emitter breakdown model 38 Level 9 VBIC99 Model e Reach through model for base collector depletion capacita
86. t lt RBDB val gt lt RBSB val gt lt NF val gt lt MIN val gt lt RDC val gt lt RSC val gt lt DELVTO val gt lt MULU0 val gt lt DELK1 val gt lt DELNFCT val gt lt DELTOX val gt lt RGATEMOD val gt lt OFF gt lt IC Vds Vgs Vbs gt nd Drain terminal node name ng Gate terminal node name ns Source terminal node name nb Bulk terminal node name mname MOSFET model name reference eeetteteeeee 68 MOSFET Models m AS PD PS RGATEMOD RBODYMOD TRNQSMOD ACNQSMOD GEOMOD RGEOMOD NRS NRD RBPB RBPD RBPS RBDB RBSB NF MIN RDC RSC DELVTO DELVTO MULUO BSIM4 MOSFET channel length in meters BSIM4 MOSFET channel width in meters Drain diffusion area Source diffusion area Perimeter of the drain junction if PERMOD 0 excludes the gate edge otherwise includes the gate edge Perimeter of the source junction if PERMOD 0 excludes the gate edge otherwise includes the gate edge Gate resistance model selector Substrate resistance network model selector Transient NQS model selector AC small signal NQS model selector Geometry dependent parasitics model selector specifies how the end S D diffusions are connected Source drain diffusion resistance and contact model selector specifies the end S D contact type point wide or merged and how S D parasitics resistance is computed Number of source diffusion squares Number of drain diffusion squares Resist
87. t DTEMP vab AREA Area of the diode DTEMP Difference between the element temperature and the circuit temperature in Celsius Dxxx Diode element name IC vd Initial voltage across the diode element L Diode length in meters LEVEL 3 diode model only LM Length of metal capacitor in meters for LEVEL 3 diode model only LP Length of polysilicon capacitor in meters for LEVEL 3 diode model only M Multiplier to simulate multiple diodes in parallel mname Diode model name reference nminus Negative terminal cathode node name nplus Positive terminal anode node name OFF Initial element condition is OFF in DC analysis PJ Periphery of junction W Diode width in meters LEVEL 3 diode only WM Width of metal capacitor in meters for LEVEL 3 diode model only WP Width of polysilicon capacitor in meters for LEVEL 3 diode model only Junction Model Statement General Form MODEL mname D lt LEVEL vab lt keyword vab gt mname Model name D Identifies a diode model LEVEL LEVEL 1 Junction diode LEVEL 2 Fowler Nordheim diode LEVEL 3 Geometric junction diode processing LEVEL 4 Philips JUNCAP model keyword Model parameter keyword such as CJO or IS 12 Diodes Junction Model Parameters Junction DC Parameters LEVEL 1 and 3 Name Alias Unit Default Description AREA 1 0 Junction area For LEVEL
88. t IC v gt Form c0 c1 Coefficients of a polynomial described as a function of the voltage across the capacitor Cxxx Capacitor element name Must begin with C followed by up to 1023 alphanumeric characters IC Initial voltage across the capacitor in volts ni n2 Node names POLY Keyword to identify the capacitor as non linear polynomial Inductors Linear Inductor Element General Lxxx n1 n2 lt L gt inductance lt lt TC1 gt val gt Form lt lt TC2 gt val gt lt SCALE vab lt IC vab lt M val gt lt DTEMP val gt lt R vab Or Lxxx n1 n2L equation lt LTYPE val gt lt above_options gt Or Lxxx n1 n2 POLY c0 c1 lt above_options gt Or Lxxx n1 n2 NT turns lt above_options gt c0 c1 Coefficients of a polynomial in the current describing the inductor value DTEMP Temperature difference between element and circuit in degrees Celsius IC Initial current through inductor in amperes Lxxx Inductor element name L Inductance value inductance L Inductance at room temperature equation LTYPE Calculates inductance flux calculation for elements using inductance equations M Multiplier used to simulate parallel inductors Default 1 0 Passive Devices and Independent Sources 5 ni n2 Positive and negative terminal node names NT turns Number of inductive magnetic winding turns POLY Keyword that sp
89. t Lccc lt Lddd gt gt mname lt MAG magnetization gt K coupling Coefficient of mutual coupling Kaaa Saturable core element name 6 Passive Devices and Independent Sources Kxxx Mutual inductor element name Lbbb Lccc Names of the windings about the Kaaa core Lddd Lyyy Name of the first of two coupled inductors Lzzz Name of the second of two coupled inductors MAG Initial magnetization of the saturable core magnetization mname Saturable core model name Magnetic Core Model General Form MODEL mname L lt pname1 val1 gt CORE Identifies a Jiles Atherton Ferromagnetic Core model L Identifies a saturable core model LEVEL x Equation selection for Jiles Atherton model mname Model name pnamet val1 Value of the model parameter Independent Source Element General Form Vxxx n n lt lt DC gt dcval lt tranfun gt lt AC acmag lt acphase gt gt Or lyyy n n lt lt DC gt devab lt tranfun gt lt AC acmag lt acphase gt gt lt M vab AC AC source keyword for use in AC small signal analysis acmag Magnitude RMS of AC source in volts acphase Phase of the AC source in degrees DC dcval DC source keyword and value in volts lyyy Independent current source element name M Multiplier to simulate multiple parallel current sources n Positive
90. tance LRS ohm m Source resistance length sensitivity WRS ohm m Source resistance width sensitivity PRS ohm m2 Source resistance product area sensitivity RSC ohm 0 0 Additional source resistance due to contact resistance RSH RL ohm sq 0 0 Drain and source diffusion sheet resistance MOS Common Geometry Model Parameters Name Alias Unit Default Description HDIF m 0 Length of heavily doped diffusion LD DLAT m Lateral diffusion into channel from LATD source and drain diffusion LDIF m 0 Length of lightly doped diffusion adjacent to gate 50 MOSFET Elements Name Alias Unit Default Description WMLT 1 Width diffusion layer shrink reduction factor XJ m 0 Metallurgical junction depth XW m 0 Accounts for masking and etching WDEL effects DW Common Threshold Voltage Parameters Name Alias Unit Default Description DELVTO V 0 0 Zero bias threshold voltage shift GAMMA y1 2 0 527625 Body effect factor NGATE 1 cm8 Polysilicon gate doping used for analytical model only NSS 1 cm2 1 0 Surface state density NSUB 1 cm8 1e15 Substrate doping DNB NB PHI V 0 576036 Surface potential TPG TPS 1 0 Type of gate material used for analytical model only VTO VT V Zero bias threshold voltage Impact lonization Model Parameters Name Alias Unit Default Description ALPHA 1 V 0 0 Imp
91. tion cap VDS V 0 6 Built in voltage ZS 0 447 Exponent coefficient VPTS V 1000 Punch through voltage Substrate Coupling Network Parameter Unit Default Description RSU Ohm 0 Substrate series resistance CSU F 0 Substrate capacitance from bulk material permittivity Noise Parameters Parameter Unit Default Description KF 1 43e 8 Flicker noise factor no unit for AF 2 AF 2 0 Flicker noise exponent factor KRBI 1 17 Factor for internal base resistance Temperature Dependence Parameter Unit Default Description ALB 1 K 6 3e 3 Temperature coefficient of forward current gain ALTO 1 K 0 First order temperature coefficient of TEFO KTO 1 K 0 Second order temperature coefficient of TEFO ZETACI 1 6 Temperature exponent factor RCIO ALVS 1 K 1e 3 Temperature coefficient of saturation drift velocity ALCES 1 K 0 4e 3 Relative temperature coefficient of VCES VGB V 1 17 Bandgap voltage ZETARBI 588 Temperature exponent factor of RBiO ZETARBX 0 2060 Temperature exponent factor of RBX ZETARCX 0 2230 Temperature exponent factor of RCX ZETARE 0 Temperature exponent factor of RE BJT Element 35 Parameter Unit Default Description ALFAV 1 K 8 25e 5 Temperature coefficient for avalanche breakdown ALQAV 1 K 1 96e 4 Temperature coefficient f
92. unction capacitance CDSBM LX86 Total drain to source 54 57 60 capacitance CDGBM LX87 Total drain to gate capacitance 54 57 including intrinsic and 59 60 overlap and fringing components CBGBM LX88 Total bulk to gate floating 54 57 body to gate capacitance 59 60 including intrinsic and overlap components CBDBM LX89 Total bulk to drain capacitance 54 including intrinsic and junction capacitance MOSFET Models 63 Name CBDBM CBSBM CBSBM Alias LX89 LX90 LX90 Description Total floating body to drain capacitance including intrinsic and junction capacitance Total bulk to source capacitance including intrinsic and junction capacitance Total floating body to source capacitance including intrinsi c and junction capacitance MOSFET Levels 57 59 60 54 57 59 60 CAPFG LX91 Fringing capacitance 54 CDEBM LX92 Total drain to substrate capacitance including intrinsi c and junction capacitance 57 59 60 CSGBM LX93 Total source to gate capacitance including intrinsic and overlap and fringing components 57 59 60 CSSBM LX94 Total source capacitance including intrinsic overlap and fringing components and junction capacitance 57 59 60 CSEBM LX95 Total source to substrate capacitance including intrinsic and junction capacitance 57 59 60 CEEBM LX96 Total substrate capa
93. vel 63 Model Parameters table be set in the MODEL statement e The general syntax for MOSFET element is the same as the other standard MOSFET models other than PS and PD In Level 63 PS and PD are defined as the length of the sidewall of the source drain which is not under the gate e MOS11 has LMIN as its own parameter which has the difference definition from that of HSPICE To avoid the conflict with LMIN in HSPICE LMIN parameter in HSPICE level 63 was changed to LLMIN LEVEL 64 HiSIM1 0 Model HiSIM Hiroshima university STARC IGFET Model is a publicly available MOSFET model for circuit simulation It uses drift diffusion approximation and a channel surface potential description Level 64 Model Selectors Parameter Default Description LEVEL 64 Model selector VERSION 100 Model version number MOSFET Models 81 Parameter Default Description CORSRD 0 Flag Indicates whether to include Rs and Rd contact resistors and whether to solve equations iteratively CORSRD 0 no and CORSRD 1 yes COOVLP Overlap capacitance model selector e COOVLP 1 constant value e COOVLP 0 approximating linear reduction of the field e COOVLP 1 considering lateral impurity profile COISUB Substrate current model selector e for VERSION lt 110 COISUB 0 yes COISUB 1 no e otherwise COISUB 0 no COISUB 1 yes COIIGS Selects the gate tunneling cu
Download Pdf Manuals
Related Search
Related Contents
取扱説明書 - 日立の家電品 LevelOne FBR-1430 router userguide-Z88 FIA Tech Electronic Give-Up Automated Invoicing System (eGAINS yellow Trukiflot - La main à la pâte User`s Manual - Rohrback Cosasco Systems HECHT 761 R Copyright © All rights reserved.
Failed to retrieve file