IO-Link PHY BoosterPack™ (Rev. A)
Contents
1. Ensure that 3 3 V are provided at J12 Pin 1 from TPS7A1633 3 3 3 V from TPS7A1633 which also powers the mM LaunchPad 9 e Set jumper on J1 set jumper on J2 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com System Design Theory IO Link PHY TI DA 00339 Status Information On J5 and LEDs pP I a NP ES PWR esee rc ceci TEMP e ae ee ie Ese uu E exl STATUS Protection VCC eje UART TX eje SPI CLK UART RX eje SPI MISO L ENBL eje SPI MOSI GND eje SPI CS1 Cava tom Launchpad X kemien X SPI I2C for interfacing Sensor on J11 Monitoring UART on J11 Launchpad BoosterPack Connector MSP EXP430FR4133 simplified Onboard Emulator Figure 5 Power Supply Option 1 TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 9 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS System Design Theory www ti com 10 Link PHY TI DA 00339 Status Information On J5 and LEDs acl a ds ad lle a J5 SIS PWB e sce e ME TEMP e Lope E ie Protection STATUS VCC eje UART TX eje SPI CLK UART RX eje SPI MISO L ENBL2. from the connected LaunchPad The board gets its 3 3 V 2 3 3 V from TPS7A1633 X from the LDO TPS7A1633 The board gets its 3 3 V from the LDO TPS7A1633 and the MCU of the connected LaunchPad is also powered by the LDO 3 3 V from TPS7A1633 3 while powering X X LaunchPad CAUTION Due to the use of a LaunchPad and its flexible design the user must ensure that both boards and additional booster packs operate at the same voltage levels Please carefully read the description of power supply options and the power section in the user s guide for the LaunchPad The MSP430 LaunchPad typically provides 3 3 V to the BoosterPack headers To obtain the same voltage levels during TX and RX communication and avoid voltage compliance issues at the MCUs GPIO pins TI recommends to use either Power Supply Option 1 or Power Supply Option 3 While debugging the MCU additional communication between the MCU and emulator Power Supply Option 1 must be used View the power supply options in Table 2 Table 2 Power Supply Options POWER SUPPLY OPTIONS DESCRIPTION e Remove jumper on J2 set jumper on J1 1 Teo Mone EEA Verify the power supply options of the connected LaunchPad and ensure that 3 3 V are provided at J12 Pin 1 e Remove jumper on J1 set jumper on J2 2 33 V from TPS7A16332 Verify the power supply options of the connected LaunchPad to l supply the MCU externally
3. JESD46 latest issue and to discontinue any product or service per JESD48 latest issue Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete All semiconductor products are sold subject to Tl s terms and conditions of sale supplied at the time of order acknowledgment TI warrants performance of its components to the specifications applicable at the time of sale in accordance with the warranty in Tl s terms and conditions of sale of semiconductor products Testing and other quality control techniques for Tl components are used to the extent TI deems necessary to support this warranty Except where mandated by applicable law testing of all parameters of each component is not necessarily performed Tl assumes no liability for applications assistance or the design of Buyers products Buyers are responsible for their products and applications using Tl components To minimize the risks associated with Buyers products and applications Buyers should provide adequate design and operating safeguards Reproduction of significant portions of TI information in TI data books data sheets or reference designs is permissible only if reproduction is without alteration and is accompanied by all associated warranties conditions limitations and notices Tl is not responsible or liable for such altered documentation Information of third parties may be subject to additional restri
4. Manual SIO Mode Figure 10 Manual SIO Mode IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com 4 4 Interfacing MCU System Design Theory TIDA 00339 is designed as a BoosterPack in order to be used with Tl s LaunchPads Because the IO Link communication requires an IO Link PHY U2 in addition to the MCU for the stack the user can choose from different MCUs for their needs For this design guide the LaunchPad MSP EXP430FR4133 has been chosen for verification Figure 11 shows the standardized pinout of the different available LaunchPads Figure 12 shows the two connectors J10 and J12 to connect the IO Link design to the LaunchPad An overview of the connection between TIDA 00339 and the LaunchPad is given in Figure 11 GPIO J 0 J 1800 mil 1600 mil Emulator LaunchPad Figure 11 BoosterPack Pinout SPI CS Wireless GPIO SPI CS Display GPIO gus SPI CS other GPIO WK SC GND GPIO J 5j GPIQEC RST Table 3 Pin Description of MSP EXP430FR4133 LaunchPad and TIDA 00339 LAUNCHPAD PINs DESCRIPTION 1 3 3V 2 Analog In 3 UART RX 4 UART TX 5 GPIO 6 Analog In 7 SPI CLK 8 GPIO 9 l2C SCL TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback PINs J12 11 13 15 17 TIDA 00339 DESCRIPT
5. L voltage for supplying power to the PHY as well as a local controller and additional circuits The SN65HVD101 and SN65HVD102 are available in the 20 pin RGB package 4 mm x 3 5 mm quad flat no leads QFN for space constrained applications Vee Vee Vec OUT IN SET L SUPPLY VOLTAGE CONTROL PWR_OK TX Voltage Voltage Timers Detectors EN Control Over Current Over Current Logic Timers Detectors WAKE s TEMPERATURE CUR_OK SENSE TEMP_OK ILIM_ADJ GND L Figure 2 Functional Block Diagram SN65HVD102 e Configurable CQ output push pull high side or low side for SIO Mode e Remote wake up indicator e Current limit indicator e Power good indicator e Overtemperature protection Reverse polarity protection e Configurable current limits e 9 V to 36 V supply range e Tolerant to 50 V peak line voltage e 3 3 V or 5 V configurable integrated LDO SN65HVD101 only e 20 pin QFN package 4 mm x 3 5 mm TPS7A1633 The TPS7A16 family of ultra low power LDO voltage regulators offers the benefits of ultra low quiescent current high input voltage and miniaturized high thermal performance packaging The TPS7A16 family is designed for continuous or sporadic power backup battery powered applications where ultra low quiescent current is critical to extending the system battery life The TPS7A16 family offers an enable pin EN compatible with standard c
6. provided by the LaunchPad I TEXAS INSTRUMENTS www ti com Table 9 Jumper Settings for Board Setup in IO Link Mode SHORT Set 1 2 Remove Set 2 3 Set 1 2 Set 1 2 Don t Care COMMENTS Power Supply Option 1 enabled Resistor R10 4 75 k active IO Link Mode active Only active in Manual SIO Mode 2 Verify the jumper settings of the LaunchPad Table 10 This example uses the MSP EXP430FR4133 pa LaunchPad Please refer to the user s guide of the LaunchPad in use for more details Table 10 Jumper Settings for MSP EXP430FR4133 LaunchPad c P J101 J101 J101 J101 J101 J101 J101 J101 J101 CONNECTOR MSP EXP430FR4133 device PIT 14 T aE SS e He St a Os 0 Fes IO Link PHY BoosterPack i ET 15 TRI M E gl 2 NI JUMPER SILKSCREEN JP1 GND 5V 3V3 RTS CTS RXD TXD SBWTDIO SBWTCK M E TIDh 00338E1 k pooo i i bia xor Y r ih ae Lu Lz SHORT Set 1 2 Set Set Set Remove Remove Set Set Set Set As Figure 17 shows connect the TIDA 00339 device J10 and J12 outer rows to the J1 and J2 Figure 17 Connection Between TIDA 00339 and MSP EXP430FR4133 TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS 4 Connect the PC through a USB cable to the LaunchPad J102 to power the system If the LaunchPad is not pre programmed please
7. refer to the Software Section of the TIDA 00339 product folder 4 Verify that the LED D1 of TIDA 00339 is on as soon as the system powers on Connect the TIDA 00339 J3 to the IO Link master Launch the USB IO Link Master V2 software on the PC Follow the steps provided in the IO Link Master user s manual to establish a connection and import the IODD files 9 Figure 18 shows a screen shot of the GUI after successfully establishing the connection 10 Figure 19 shows the Process Data tab which shows the content of the available variables ood A V BAe o File Options Help Logged in as Specialist TMG USB IO Link Master V2 SE 1 L1 I Port 01 Pin 4 TIDA 00339 fi blockwritemode Common Process Data Identification Observation Parameter Generic Overview Topology E USB E 1 TMG USB IO Link Master V2 SE i 04 TIDA 00339 Vendor Texas Instruments Incorporated Qo IO Link Vendor Text Factory Automation and Control Vendor ID Qx01C4 URL http www ti com TIDA 00339 Sample Device with ADS 1220 10 Link Revision 1 1 MinCycle Time 1000 SIO mode supported Catalog E O EtherNet IP fy PROFINET EC USB IODD Texas Instruments TIDA 20150202 I0DD1 1 xml EC TMG TE GmbH z e2 TMG USB IO Link Master V2 SE EM Due ane ee TMG USB IO Link Master V2 TS Connection acy IO Link 10 Device Description S O Sample Devices S C TIDA 00339 g Cy V1 1 QM TIDA 00339 c
8. when the TVS does not conduct The VRM must be greater than or equal to the maximum signal of the transceiver and a supply voltage of 30 V to prevent the TVS from conducting during normal operation IPP the peak pulse current of the TVS at the short circuit pulse waveform must be greater than the application specific peak pulse current IPP app The open circuit voltage of the combination wave generator surge generator and the impedance of the generator and the coupling device determines the application specific peak pulse current IPP app Most TVSs specify the IPP for a 10 1000 us pulse only however the pulse used for the surge test is mostly an 8 20 us pulse In this case the pulse rating curve in the datasheet can be used to derive the peak pulse power PPP for a specific pulse width of 20 us IPP can then be derived by dividing the PPP by the estimated clamping voltage VCL at this IPP level The VCL for an 8 20 us pulse will be much larger than the VCL for the 10 1000 us pulse TI recommends to contact the TVS manufacturer when estimated values are used unless there is a large margin between IPP and IPP app When the TVS conducts and becomes low impedance to shunt the surge current to ground the TVS application specific clamping voltage VCL appl must be lower than the maximum transient stand off voltage of 50 V of the transceiver To obtain the application specific clamping voltage the VCL of the TVS must be redu
9. 02 X7R 0402 8 D1 D2 D10 3 Green 150060VS75000 Wurth Elektronik eiSos LED Green SMD LED 0603 9 D3 1 200 V RF071M2S Rohm en a SOD 123 10 D4 D5 D6 3 30 V SMAJ30CA Littelfuse Diode TVS Bi 30 V 400 W SMA SMA 11 D7 D8 D9 3 Yellow 150060YS75000 Wurth Elektronik eiSos LED Yellow SMD LED 0603 Fiducial mark There is nothing to ee 12 FID1 FID2 FID3 3 N A N A buy or mount Fiducial 13 J1 J2 2 61300211121 Wurth Elektronik eiSos Header 2 54 mm 2 x 1 Gold TH Header SEM Sd M12 Socket 14 J8 43 01205 Conec M12 Socket Backmounting 4Pos Backmounting 4Pos R A Gold R A TH TH 15 J4 J6 J7 J8 J9 5 61300311121 Wurth Elektronik eiSos Header 2 54 mm 3 x 1 Gold TH Meader 2 54 mm 3x 1 16 J5 1 61300411121 Wurth Elektronik eiSos Header 2 54 mm 4 x 1 Gold TH Header nl ool Connector Receptacle 100 mil 10 17 J10 J12 2 SSW 110 23 F D Samtec x 2 Gold plated TH 10 x 2 Receptacle 18 J11 1 61301021 121 Wurth Elektronik eiSos Header 2 54 mm 5 x 2 Gold TH Header EM OMe 19 R1 R2 R8 3 68 1 CRCWO040268R1FKED Vishay Dale RES 68 1 196 0 063 W 0402 0402 20 R3 R4 R9 3 0 CRCWO08050000ZO0EAHP Vishay Dale RES 0 596 0 333 W 0805 0805 21 R5 R6 R7 3 150 CRCW0402150RFKED Vishay Dale RES 150 1 0 063 W 0402 0402 26 O Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Copyright 2015 Texas Instruments Incorporated Submit Documentation Feedback la TEXAS INSTRUMENTS www ti com Table
10. 0CA device has a stand off voltage VRM of 30 V a minimum breakdown voltage VBR of 33 3 V and an application specific clamping voltage of roughly 46 3 V at the 2 A current level and at a junction temperature of 150 C D3 provides an additional level of reverse polarity protection While the SN65HVD102 device can withstand negative voltages up to 40 V in steady state and up to 50 V transient as expressed previously the diode avoids the supply voltage bypass capacitor C5 being discharged during a negative pulse The diode enables the design to recover much faster from such a negative surge event For testing purposes the design allows to bypass the protection circuit In this case the OR resistors R3 R4 and R9 must be removed The signals L L and C Q cannot be fed through the M12 connector J3 but through the header J9 In this condition the TVS diodes D4 D5 and D6 and the reverse polarity diode D3 are no longer active Manual SIO Mode The SIO Mode can either be used through the MCU default or manual operation For manual operation the shunts must be placed on J6 and J7 between PINs 2 3 With J8 the user can select between the NPN 1 2 or PNP 2 3 output Switch button S2 can then be used for manual SIO Mode operation Figure 10 is showing the circuit section By using the manual SIO Mode the signals TX and EN of the IO Link PHY U2 are disconnected from the MCU on the LaunchPad i i i i BM BM BM BM BKM SK o9
11. 11 BOM continued Design Files ITEM DESIGNATOR QUANTITY VALUE PART NUMBER MANUFACTURER DESCRIPTION PACKAGE REFERENCE 22 R10 1 4 75 kQ CRCWO08054K75FKEA Vishay Dale RES 4 75 KQ 196 0 125 W 0805 0805 23 R11 1 20 KQ 3224J 1 203 E Bourns TRIMMER 20 kQ 0 25 W SMD 4 8 x 3 71 x 4 6 mm 24 R12 1 10 0 kQ CRCWO040210KOFKED Vishay Dale RES 10 0 kQ 1 0 063 W 0402 0402 25 S1 S2 2 434121025816 Wurth Elektronik eiSos Switch Tactile SPST 12 V SMD SMD 6 x 3 9 mm 60 V 5 A IQ 100 mA Low Dropout Voltage Regulator 26 U1 1 TPS7A1633DRBR Texas Instruments With Enable and Power Good DRBO0008B DRBOO08B IO LINK PHY for Device Nodes 27 U2 1 SN65HVD102RGBR Texas Instruments RGB0020A RGBO0020A 8 C6 0 330 pF GRM155R72A331KA01D MuRata Cae PRO peg inesse 0402 TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated IO Link PHY BoosterPack 27 Design Files 6 3 Layer Plots To download the layer plots see the design files at TIDA 00339 LE jae ct Ul c2 TIDA 00339E1 O m7 F1 g LI e 9 3U3 ND Oo cae OOOOO LN He suum suum sen ORO ogo KHOKOKOKO OQ OZO OI ORO OZO OO OKO OJO IO OZO Figure 27 Bottom Solder Mask gaoooo m I TEXAS INSTRUMENTS www ti com oo 9 Bis Texas e INSTRUMENTS O OKO OZOICOEROXOIO ORO A Figure 26 Bottom Layer IT MOS
12. A 00339E1 rJ C z S Bypass Protection Protection Circuitry Interface Connector DIO 22 mu ul den g zE a 2 rgoaton s HAR 35 f zum R Of Wz RES jim J4 C Q Current Limiter LaunchPad BoosterPack Manual SIO Connections Mode Figure 16 TIDA 00339 Board Description Power supply options As described in Section 4 1 the design has several power supply options depending on the usage Table 5 shows the different settings of J1 and J2 For the initial setup use Power Supply Option 2 Table 5 Power Supply Options TIDA 00339 POWER SUPPLY OPTIONS J1 J2 COMMENTS The board gets its 3 3 V 1 3 3 V from LaunchPad X from the connected LaunchPad The board gets its 3 3 V 2 3 3 V from TPS7A1633 X from the LDO TPS7A1633 The board gets its 3 3 V from the LDO 3 3 V from TPS7A1633 TPS7A1633 and the 3 while powering X X MCU of the connected LaunchPad LaunchPad is also powered by the LDO VCC LED LED D1 indicates the presence of VCC LDO TPS7A1633 The linear voltage regulator circuit in Power Supply Option 2 and Power Supply Option 3 generates the 3 3 V VCC from the 24 V of the IO Link interface TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 19 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated 20 I TEXAS INSTRUMENTS Getting Started www ti com IO Link PHY SN65HVD102 Ci
13. ESI 7 5 4 PWR OK PAD 15 CUR OK 18 TEMP OK WAKE NC no 4 5 ILIM_ADJ nc SN65HVD102RGBR J11 SPI CS1 Figure 20 Schematic L C Q L VCC N 1 SW LED N ZD2 Green J9 U L 1 L 2 R2 C Q 3 68 10 GND D3 R3 00 RF071M2S SMAJ30CA WP D4 D5 C5 DNP SMAJ30CA 2 2 UF 30V 30V SMAJ30CA Manual SIO Mode J7 VCC 8 GND J6 VCC S2 R12 10 0 k VCC D1 Green 68 1 0 0 z o TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated IO Link PHY BoosterPack 25 Design Files 6 2 Bill of Materials To download the bill of materials BOM see the design files at TIDA 00339 la TEXAS INSTRUMENTS www ti com Table 11 BOM ITEM DESIGNATOR QUANTITY VALUE PART NUMBER MANUFACTURER DESCRIPTION PACKAGE REFERENCE 1 IPCB1 1 TIDA 00339 Any Printed Circuit Board CAP CERM 4 7 pF 10 V 10 2 C1 1 4 7 uF GRM21BR71A475KA73L MuRata X7R 0805 0805 CAP CERM 0 47 uF 100 V 3 C2 1 0 47 uF GRM21BR72A474KA73L MuRata 10 X7R 0805 0805 CAP CERM 4 7 uF 6 3 V 20 4 C3 1 4 7 uF C1005X5R0J475M050BC TDK X5R 0402 0402 CAP CERM 0 1 pF 100 V 5 5 C4 1 0 1 uF 12061C104JAT2A AVX X7R 1206 1206 6 C5 2 2 uF GRM32ER72A225KA35L MuRata Oe ares pics tae Nose 1210 X7R 1210 7 C7 1 330 pF GRM155R72A331KA01D MuRata uel TD are TOO vete 04
14. ION 3V3 UART RX UART TX ENBL SPI_CLK CUR_OK Copyright 2015 Texas Instruments Incorporated FUNCTION VCC from LP BP to BP LP Depending on the power settings Communication between MCU on LaunchPad and SN65HVD102 Communication between MCU on LaunchPad and SN65HVD102 Communication between MCU on LaunchPad and SN65HVD102 SPI clock for the communication between MCU on LP and an optionally connected sensor STATUS signal from SN65HVD102 IO Link PHY BoosterPack 15 I TEXAS INSTRUMENTS System Design Theory www ti com Table 3 Pin Description of MSP EXP430FR4133 LaunchPad and TIDA 00339 continued PINs CONTINUED DESCRIPTION PINs J10 DESCRIPTION FUNCTION 10 l2C SDA 19 22 GND 4 GND 20 GND 2 GND STATUS signal from 19 GPIO 4 TEMP OK SN65HVD102 18 SPI CS 6 SPI CS1 General purpose switch 17 GPIO 8 SW 91 that is the teaching function 16 RST 10 SPI for the communication between 15 SPI MOSI 12 SPI MOSI MCU on LP and an optionally connected sensor SPI for the communication between 14 SPI MISO 14 SPI MISO MCU on LP and an optionally connected sensor General purpose LED 13 GPIO 16 LED that is status indication STATUS signal from 12 GPIO 18 PWR OK SN65HVD102 STATUS signal from 11 GPIO 20 WAKE SN65HVD102 RR Na A a ea ES RS NX NM NES 1 l l LaunchPad BoosterPack Connectors l
15. January 2015 IO Link PHY BoosterPack 1 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS Key System Specifications www ti com An IMPORTANT NOTICE at the end of this TI reference design addresses authorized use intellectual property matters and other important disclaimers and information 1 Key System Specifications PARAMETER SPECIFICATION IO Link Version V1 1 Compatible to V1 0 IO Link SIO Mode Supports SIO Mode BAUD Rate Support COM1 COM2 and COM3 IEC 61000 4 2 IEC 61000 4 4 IEC 61000 4 5 and IEC 60255 5 Easy to use with existing LaunchPads SPI or C Interface for sensor via BoosterPack or external Easy access to all signals of IO Link PHY SN65HVD102 2 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated l TEXAS INSTRUMENTS www ti com System Description 2 2 1 2 2 2 3 2 4 System Description The TI design TIDA 00339 is a fully IO Link compliant design enabling the user to easily evaluate the lO Link communication The modular approach is capable of use with different MCUs microcontrollers based on the LaunchPad and BoosterPack ecosystem and also allows the user to test his or her own sensor front end IO Link Interface The system incorporates an IO Link PHY plus protection circuit bypassable and a standard M12 4 pin A cod
16. O Figure 28 Bottom Overlay 28 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com Design Files 1700 00mi1 101 60mm Figure 29 Drill Drawing Figure 30 Board Outline TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 29 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS Design Files www ti com 6 4 Assembly Drawings J10 J12 Figure 31 Top Assembly Drawing Figure 32 Bottom Assembly Drawing 6 5 PCB and Layout Guidelines The form factor of the PCB has been chosen to fit on existing MSP430 LaunchPads The PCB of the TIDA 00339 device extends to the left and right sides instead of the top and bottom sides This setup allows the user to operate any existing buttons and visual indicators like LEDs and displays on the LaunchPad Figure 33 shows a 3D plot of the TI design connected to the MSP430 LaunchPad Figure 33 3D Plot of TIDA 00339 Connected to MSP430 LaunchPad 30 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright O 2015 Texas Instruments Incorporated I TEXAS IN
17. STRUMENTS www ti com Software Files Tl recommends to place the protection circuitry close to the M12 connector J3 The TVS diodes D4 D5 and D6 have been placed directly at J3 which enables the immediate clamping of potential high currents according to the TVS specifications Figure 34 shows a circuit snippet highlighting the three signals L L and C Q going from J3 to the TVS diodes In this view the VCC and GND plane as well as the polygons were disabled Depending on the use for SN65HVD101 U2 a proper thermal design is required especially when the device is used in the SIO Mode According to the datasheet a residual voltage across the driver low side switch of 3 5 V can be present for a current of 250 mA resulting in a power dissipation of 875 mW Figure 34 Layout of the Protection Circuitry 7 Software Files To download the software files see the design files at TIDA 00339 8 About the Author ALEXANDER WEILER is a systems engineer at Texas Instruments where he is responsible for developing reference design solutions for the industrial segment Alexander brings to this role his extensive experience in high speed digital low noise analog and RF system level design expertise Alexander earned his diploma in electrical engineering Dipl Ing FH from the University of Applied Science in Karlsruhe Germany TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 31 Submit Documentation Feedbac
18. Tl Designs IO Link PHY BoosterPack Wi TEXAS INSTRUMENTS TI Designs Design Features TI Designs provide the foundation that you need O Link V1 1 and V1 0 Connectivity Out of the Box including methodology testing and design files to TMG Stack Physical Interface Device PHY and quickly evaluate and customize the system TI Designs M12 Connector help you accelerate your time to market Simple Interfacing of Sensors Design Resources Designed to Meet With IEC 61000 4 2 IEC 61000 4 4 IEC 61000 4 5 and IEC 60255 5 Standards a Pia al Featured Applications SN65HVD102 Product Folder TPS7A1633 Product Folder e Sensors and Field Transmitters MSP EXP430FR4133 Tool Folder e Factory Automation and Process Control TI LaunchPad Ecosystem Tool Folder e Field Actuators Building Automation FR V ASK Our E2E Experts Portable Instrumentation T E2E WEBENCH Calculator Tools Community TIDA 00339 Protection TIDA 00339 powered by 3V3 from Launchpad ESEN wsmmto X 3V3 from LDO powering Launchpad Launchpad BoosterPack Connec tor wa amm amp pun E re ui c2 TIDA 00339E1 o HEB HO e aigi EM T TOO OD 060 gt 00 a s u aajo kon x ejume D ji 43 8 s 1043433 z od fa vee 3 2 s ROG was RES jIEIM M s JTRIM em J4 All trademarks are the property of their respective owners TIDU681A January 2015 Revised
19. an be frozen and the stopwatch continues running in the background The second mode Operate Split Time provides a simple thermometer application using the on chip temperature sensor The temperature is displayed on the LCD and can be shown in degrees Fahrenheit or Celsius IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS www ti com Block Diagram Free software development tools are also available such as Tl s Eclipse based Code Composer Studio software and IAR Embedded Workbench Both of these integrated development environments IDEs support EnergyTrace technology when paired with the MSP430FR4133 LaunchPad More information about the LaunchPad the supported BoosterPacks and available resources can be found at Tl s LaunchPad portal www ti com launchpad i Dis x SREK ERE IY n EEDA SPA M inum i e t o gt Lig dS Pt E 3 PL es J meamea CATT Pe 2 ie 1c102 mizanses e c e ES d 7 5 Sy EM 400546 HEU NA6000218 AL 2E 18 t ci ig TEXAS P soe INSTRUMENTS 7 Ju 5b oP W VY m C FA ke PB aam aaa att L8 82894 828 28 R A a B8 A M AM RM MN vU gt X id 7 r Ld dl gt Ju B Y e p EL Ini BEE G m ne oe R4 RS z L gu Cy m omy LEO TTE 2 P1 0 P4 0 Figure 4 MSP EXP430FR4133 Board Picture e MSP430 ULP FRAM ba
20. available for this communication INT32 INT16 and Bool1 to Bool8 The default application Stop Watch has been modified in the MSP EXP430FR4133 firmware 1 Stop Watch Mode The LaunchPad runs its default application Stop Watch and the data sends through the IO Link interface to the IO Link master and displays in the GUI The sensor front end is not used in Stop Watch Mode 2 Temperature Mode The LaunchPad runs its default application Temperature and the data sends through the IO Link interface to the IO Link master and displays in the GUI The sensor front end is not used in Temperature Mode 3 Sensor Front End Mode The LaunchPad runs the additional Sensor and sends the data through the IO Link interface to the IO Link master and displays the data in the GUI A sensor front end is required in the Sensor Front End Mode 24 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com Design Files 6 Design Files 6 1 Schematic To download the schematic see the design files at TIDA 00339 SN65HVD102 STATUS Signals VCC SPI_CLK U1 LDO 3V3 OUT WE EN 4 3p DELAY ax C1 S C2 4 7 UF 0 47 pF 4 GND DNC 9 PAD nc TPS7A1633DRBR GND GND GND vcc VCC U2 nc E 1o VCCIN 12 VCCSET CQ ke TX EN lie n RX GND GND 5
21. ced according to the reduction of the IPP to the application specific IPP app Some data sheets provide the differential resistance for the specific pulse waveform which helps to determine the reduction of the IPP to the application specific IPP app If differential resistance for the specific pulse waveform is not supplied and if there is not enough margin contact the TVS manufacturer The VBR and VCL voltages in the TVS data sheets are often given for an ambient temperature of 25 C only Because those voltages usually have a positive temperature coefficient the VCL values must be corrected accordingly to ensure that this requirement 3 is fulfilled even at the maximum ambient temperature of the application specific case and under the conditions of multiple repetitive surges which heat up the TVS The temperature coefficient is given in most data sheets TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 13 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS System Design Theory www ti com 4 3 14 For this IO Link design a 1 2 us 50 us 1 kV pulse applied by way of a 500 O impedance has been considered according to IEC 60255 5 The resulting peak current through the clamping device TVS is then roughly 1 kV 500 Q 2 A The SMAJ30CA device is a bidirectional TVS and fulfills the above mentioned requirements by clamping voltages with both polarities The SMAJ3
22. ck TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS www ti com INSTRUMENTS System Design Theory SN65HVD102 SMAJ30CA Specification as in Calculated VCL based on Specification as in datasheet example application specific datasheet example pulse current waveform and temperature IPP_app 2A 8 20 ps max 64 3 V rT 36 A 25 C PPP 2 3 kW fora VCL Clamping voltage for a specific amp 8 20 us pulse short circuit current pulse waveform 4 a specific L peak pulse current IPP Line voltage transient 50V inax AB A V based on peak pulse power PPP 6 i D gt IPP PPP VCL pulse width lt 100 us 8 3 A 25 C PPP 400 W for a O ambient temperature TA i ed F E max 46 4 V 150 C 10 1000 ps pulse VCL appl mimm oe 8 max 38 4V 25 C VCL l VBR Breakdown voltage a specific C ad typ 35 1 V 1 mA 25 C leakage current IR min 33 3 V 1 mA 25 C ambient temperature TA Line voltage steady state VRM Stand off voltage leading to a D 30V 1pA 85 C maximum leakage current IRM 9 a specific temperature Nominal supply voltage range Figure 9 SN65HVD102 Device and SMAJ30CA Device In order to choose TVS diodes appropriately three requirements must be satisfied 1 VRM is the stand off voltage the voltage
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24. d party products or services does not constitute a license to use such products or services or a warranty or endorsement thereof Use of such information may require a license from a third party under the patents or other intellectual property of the third party or a license from TI under the patents or other intellectual property of TI TI REFERENCE DESIGNS ARE PROVIDED AS IS TI MAKES NO WARRANTIES OR REPRESENTATIONS WITH REGARD TO THE REFERENCE DESIGNS OR USE OF THE REFERENCE DESIGNS EXPRESS IMPLIED OR STATUTORY INCLUDING ACCURACY OR COMPLETENESS TI DISCLAIMS ANY WARRANTY OF TITLE AND ANY IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE QUIET ENJOYMENT QUIET POSSESSION AND NON INFRINGEMENT OF ANY THIRD PARTY INTELLECTUAL PROPERTY RIGHTS WITH REGARD TO TI REFERENCE DESIGNS OR USE THEREOF TI SHALL NOT BE LIABLE FOR AND SHALL NOT DEFEND OR INDEMNIFY BUYERS AGAINST ANY THIRD PARTY INFRINGEMENT CLAIM THAT RELATES TO OR IS BASED ON A COMBINATION OF COMPONENTS PROVIDED IN A TI REFERENCE DESIGN IN NO EVENT SHALL TI BE LIABLE FOR ANY ACTUAL SPECIAL INCIDENTAL CONSEQUENTIAL OR INDIRECT DAMAGES HOWEVER CAUSED ON ANY THEORY OF LIABILITY AND WHETHER OR NOT TI HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES ARISING IN ANY WAY OUT OF TI REFERENCE DESIGNS OR BUYER S USE OF TI REFERENCE DESIGNS TI reserves the right to make corrections enhancements improvements and other changes to its semiconductor products and services per
25. d to 50 V for transients with a pulse width less than 100 us The IO Link PHY U2 margin and the ability of the PHY to withstand even negative voltages ease the design because of the robustness of the solution against electrostatic discharge ESD burst and surges as defined in the IEC 61000 4 2 IEC 6100 4 4 and IEC 6100 4 5 standards The design uses an additional transient protection circuitry consisting of the transient voltage suppressor TVS diodes D4 D5 and D6 and bypass capacitors C4 C5 and C7 to be in compliance with IEC 61000 4 2 IEC 6100 4 4 and IEC 6100 4 5 standards RF071M2S SMAJ30CA U2 8 NC L L VCCIN vccsET Ca kee 18 Tx e EN L 1 d Rx GND GND SMAJ30CA GND PWR_OK PAD 15 jJ CUR OK 19 TEMP OK 16 _ WAKE NC NC Y ILIM_ADJ NC SN65HVD102RGBR Figure 8 IO Link Interface With Protection The IO Link specification does not require a surge transient test IEC61000 4 5 because of the limitation of maximum cable length to 20 meters however use of the design in applications using digital input or output and with cable lengths exceeding 30 meters requires surge testing The design uses the assumption that the surge test is the most severe of the three transient test cases The design also uses the assumption that the surge test is the test with the highest energy level therefore take special care when selecting the right TVS as a clamping device IO Link PHY BoosterPa
26. e C Q line Table 7 Settings for Current Limit Options J4 RESISTOR DESCRIPTION PINs 1 2 shorted R11 active 20 k potentiometer flexible adjustment of C Q current limit PINs 2 3 shorted l default R10 active 4 75 k resistor 250 mA Status indication and connector The status signals of the IO Link PHY WAKE TEMP OK CURR OK and PWR OK are available on J5 and indicated with LEDs D7 D8 D9 and D10 The output of those signals is an open drain output In case of a fault operation warning or error the GND switches to the respective J5 pins and the corresponding LEDs illuminate During normal operation the LEDs must be off Interface connector The interface connector J11 can be used to connect an additional sensor front end to the SPI of the MCU of the connected LaunchPad Connector J11 also monitors the communication interface between the IO Link PHY and the MCU See Section 4 6 for more details IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com Getting Started 5 2 First Board Setup Manual SIO Mode The initial board setup uses the TIDA 00339 in manual SIO Mode without the need of a connected LaunchPad In this mode IO Link communication is impossible Table 8 Jumper Setting for First Board Setup JUMPER SHORT COMMENTS J1 Remove Power Su
27. ed connector which can be connected to any IO Link master system and supports IO Link V1 1 and V1 0 The design also allows use of the IO Link PHY in SIO Mode either manually through the switch button or through MCU communication Power Supply A high input voltage low dropout regulator LDO Vin max 60 V can generate 3 3 V VCC of the system directly from the nominal 24 V of the IO Link L line while withstanding potential high voltage inputs during surge conditions Alternatively the connected LaunchPad can power the system TI LaunchPad and BoosterPack Ecosystem TIDA 00339 must be used in combination with an MCU on which the IO Link stack is running The advantage of the design in the BoosterPack pin out is the flexible option of using an MCU that best suits the needs of the customer Many TI MCUs are available as a LaunchPad which can easily connect to the IO Link PHY BoosterPack design This design guide uses the LaunchPad MSP EXP430FR4133 to showcase features View further information on TI s LaunchPad and BoosterPack ecosystem here www ti com launchpad Sensor Front End In addition to the actual IO Link PHY evaluation the system allows users to attach their own sensor front ends with a serial peripheral interface SPI or I C interface Two options are available for the user 1 Sensor attach through headers the TI design provides easy access to the MCUs SPI and C interface on the board An external sensor front e
28. f l SPI MOSI GND eje SPI CS1 Cava tom Launchpad X ra EE E SPI I2C for interfacing Sensor on J11 Monitoring UART on J11 x lt X Launchpad BoosterPack Connector MSP EXP430FR4133 simplified Onboard Emulator Figure 6 Power Supply Option 2 10 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com System Design Theory IO Link PHY TI DA 00339 Status Information On J5 and LEDs pP I a NP ES PWR esee rc ceci TEMP e ae ee ie Protection STATUS VCC eje UART TX eje SPI CLK UART RX eje SPI MISO L ENBL eje SPI MOSI GND eje SPI CS1 Cava tom Launchpad X kemien X SPI I2C for interfacing Sensor on J11 Monitoring UART on J11 Launchpad BoosterPack Connector MSP EXP430FR4133 simplified Onboard Emulator Figure 7 Power Supply Option 3 TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 11 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS System Design Theory www ti com 4 2 Protection 12 The L and CQ pins of the SN65HVD101 device offer a 40 V absolute maximum steady voltage rating which is furthermore extende
29. ink interface for industrial point to point communication When the device is connected to an IO Link master through a 3 wire interface the master can initiate communication and exchange data with the remote node while the SN65HVD10X acts as a complete physical layer for the communication The IO Link driver output CQ can be used in push pull high side or low side configurations using the EN and TX input pins The PHY receiver converts the 24 V IO Link signal on the CQ pin to standard logic levels on the RX pin The use of a simple parallel interface transmits and receives data and status information between the PHY and the local controller The SN65HVD101 and SN65HVD102 implement protection features for overcurrent overvoltage and overtemperature conditions The IO Link driver current limit can be set using an external resistor If a short circuit current fault occurs the driver outputs are internally limited and the PHY generates an error signal SC These devices also implement an overtemperature shutdown feature that protects the device from high temperature faults IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com Block Diagram The SN65HVD102 operates from a single external 3 3 V or 5 V local supply The SN65HVD101 integrates a linear regulator that generates either 3 3 V or 5 V from the IO Link
30. k Copyright 2015 Texas Instruments Incorporated IMPORTANT NOTICE FOR TI REFERENCE DESIGNS Texas Instruments Incorporated TI reference designs are solely intended to assist designers Buyers who are developing systems that incorporate TI semiconductor products also referred to herein as components Buyer understands and agrees that Buyer remains responsible for using its independent analysis evaluation and judgment in designing Buyer s systems and products TI reference designs have been created using standard laboratory conditions and engineering practices Tl has not conducted any testing other than that specifically described in the published documentation for a particular reference design TI may make corrections enhancements improvements and other changes to its reference designs Buyers are authorized to use TI reference designs with the TI component s identified in each particular reference design and to modify the reference design in the development of their end products HOWEVER NO OTHER LICENSE EXPRESS OR IMPLIED BY ESTOPPEL OR OTHERWISE TO ANY OTHER TI INTELLECTUAL PROPERTY RIGHT AND NO LICENSE TO ANY THIRD PARTY TECHNOLOGY OR INTELLECTUAL PROPERTY RIGHT IS GRANTED HEREIN including but not limited to any patent right copyright mask work right or other intellectual property right relating to any combination machine or process in which TI components or services are used Information published by TI regarding thir
31. l l I I l l l l I I l l l I l l l l l l l l l l l l l l l l l l l l l E GND i l SEL MOSI l l I I l l l l E a a a l Figure 12 LaunchPad and BoosterPack Connectors 16 IO Link PHY BoosterPack TIDU681A January 2015 Revised January 2015 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated la TEXAS INSTRUMENTS www ti com System Design Theory 45 Interfacing Sensor Front End In addition to evaluating the IO Link interface with different MCUs the design also enables the user to attach a sensor front end allowing testing of an overall system A sensor front end can be connected in two ways through an SPI and by choosing the I C interface depending on the type of LaunchPad used 1 J10 and J12 The SPI signals from the MCU on the LaunchPad are available on J10 and J12 LaunchPad and BoosterPack connectors and another BoosterPack can be connected with a sensor front end 2 J11 The SPI signals from the MCU on the LaunchPad which are present on J10 and J12 are also routed to J11 for easy access as Figure 13 shows SPI CLK 6 4 SPI MISO SPI MOSI SPI CS1 Figure 13 Sensor Front Interface and MCU IO Link PHY Communication 4 6 C Q Current Limiter The C Q driver output current limit of SN65HVD102 can be set using an external resistor on the LIMADJ pin This limit can typically be set between 95 mA for a resistor of 20 k a
32. mance MSOP 8 PowerPAD e Operating temperature range 40 C to 125 C MSP EXP430FR4133 The MSP EXP430FR4133 LaunchPad development kit is an easy to use evaluation module EVM for the MSP430FR4133 microcontroller The development kit contains everything needed to start developing on the MSP430 ultra low power ULP FRAM based microcontroller platform including on board emulation for programming debugging and energy measurements The board features on board buttons and LEDs for the quick integration of a simple user interface as well as a liquid crystal display LCD which showcases the integrated driver with flexible software configurable pins The MSP430FR4133 device features embedded FRAM ferroelectric random access memory a non volatile memory known for its ultra low power high endurance and high speed write access Rapid prototyping is simplified by the 20 pin BoosterPack plug in module headers which support a wide range of available BoosterPacks Users can quickly add features like wireless connectivity graphical displays environmental sensing and much more Users can also design a customized BoosterPack or choose among many already available from TI and third party developers The out of box functionality provided with the MSP EXP430FR4133 LaunchPad features the on board segmented display and offers two operating modes Stop Watch Mode can run a timer for up to 100 hours or alternatively operate split time where the display c
33. nd 400 mA for a OR resistor Figure 14 shows the non linear behavior between resistor value and current limit 450 400 350 C2 e e 250 N e e Current Limit mA Q e 100 50 0 5000 10000 15000 20000 25000 Radjust Q Figure 14 Typical Current Limit Characteristics The design has the flexibility to adjust the current limit with the potentiometer R11 Figure 15 or use the default resistor value of R10 4 75 k approximately 250 mA typically Table 4 Settings for the Current Limiter Options 4 RESISTOR DESCRIPTION 20 k potentiometer M flexible adjustment PINs 1 2 shorted H11 active of C Q current limit PINs 2 3 shorted default R10 active 4 75 k resistor M 250 mA TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 17 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated System Design Theory 18 IO Link PHY BoosterPack Current Limiter Options Figure 15 Current Limiter Options I TEXAS INSTRUMENTS www ti com TIDU681A January 2015 Revised January 2015 Copyright 2015 Texas Instruments Incorporated Submit Documentation Feedback I TEXAS INSTRUMENTS www ti com Getting Started 5 Getting Started 5 1 Board Description Figure 16 shows the different sections of the TIDA 00339 design Power Supply VCC LDO IO Link PHY Options LED TPS7A1633 SN65HVD102 j N Bum cu TID
34. nd with an SPI or lC interface can be connected 2 Sensor attach through BoosterPack the LaunchPad ecosystem allows the connection of several BoosterPacks This design also allows an additional BoosterPack containing a sensor front end to stack up and communicate with the MSP430 of the LaunchPad For example the TIDA 00168 Thermocouple AFE has been developed to also be used as a BoosterPack TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 3 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated 3 3 1 3 1 1 SPI I2C for interfacing Monitoring UART on J11 I TEXAS INSTRUMENTS Block Diagram www ti com Block Diagram VCC 10 Link PHY Tl DA 00339 Status Information On J5 and LEDs S casa tee AE Se J5 wow 0X w E oe Protection CURR e 7 3 TEMP e a WAKE Q AA eh le CIRCA REI ote zl STATUS J11 vcc eje UART TX eje SPI CLK UART RX eje SPI MISO ENBL eje SPI MOSI GND eje SPI CS1 avarromLaunchpad X Ewsmmioo X Sensor on J11 Launchpad BoosterPack Connector Launchpad IO Link Stack On MCU of Launchpad Launchpad BoosterPack Connector Booster Pack Additional Booster Packs can be connected Figure 1 TIDA 00339 System Block Diagram Highlighted Products SN65HVD102 The SN65HVD101 and SN65HVD102 IO Link PHYs implement the IO L
35. omplementary metal oxide semiconductor CMOS logic and an integrated open drain and active high power good output PG with a user programmable delay These pins are intended for use in microcontroller based battery powered applications where power rail sequencing is required In addition the TPS7A16 is ideal for generating a low voltage supply from multi cell solutions ranging from high cell count power tool packs to automotive applications Not only can this device supply a well regulated voltage rail but it can also withstand and maintain regulation during voltage transients These features translate to simpler and more cost effective electrical surge protection circuitry TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 5 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated I TEXAS INSTRUMENTS Block Diagram www ti com 3 1 3 VCC uC2 EN TPS7A16xx DELAY Figure 3 Functional Block Diagram TPS7A1633 e Wide input voltage range 3 V to 60 V e Ultra low quiescent current 5 UA e Quiescent current at shutdown 1 uA e Output current 100 mA Low dropout voltage 60 mV at 20 mA e Accuracy 2 Available in Fixed output voltage 3 3 V 5 0 V Adjustable version from approximately 1 2 V to 18 5 V Power good with programable delay e Current limit and thermal shutdown protections e Stable with ceramic output capacitors 2 2 2 uF e Package high thermal perfor
36. pply Option 2 enabled J2 Set 1 2 J4 Set 2 3 Resistor R10 4 75k active J6 Set 2 3 Manual SIO Mode active J7 Set 2 3 J8 Set 1 2 NPN selected 5 3 First Board Setup IO Link Mode 5 3 1 Hardware and Software Requirements For the initial setup the following hardware and software is required e TIDA 00339 e MSP EXP430FR4133 LaunchPad O Link stack including the application firmware 4 e USB IO Link Master this design uses the TMG USB IO Link Master V2 SE GUI for USB IO Link Master this design uses the TMG IO LINK Device Tool V4 0 e IO Device Description IODD 4 e M12 cable female male USB cable 5 3 2 Software Installation Please refer to the user manual of the USB IO Link master in use for further details on its software installation and how to import the IODD folder The following steps use the USB IO Link Master V2 SE software from TMG www tmgte com The user manual is available after installing the software which is delivered along with the hardware The user manual describes the steps involved in importing the IODD files TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 21 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated Getting Started 5 3 3 Ze s JUMPER c ccc oc Z c Co Step By Step Description Verify the jumper settings of the TIDA 00339 device Table 9 Use the Power Supply Option 1 3 3 V for TIDA 00339 is
37. rcuitry of the IO Link PHY Bypass protection The user can bypass the on board protection circuit by removing R3 R4 and R9 The entire protection is removed including M12 connector J3 and the IO Link signals L L and C Q must be applied through J9 Note that in this case the reverse polarity is no longer available Protection circuitry The design uses an additional transient protection circuitry consisting of the TVS diodes D4 D5 and D6 and bypass capacitors C4 C5 and C7 to be in compliance with the IEC 61000 4 2 IEC 6100 4 4 and IEC 6100 4 5 standards Refer to Section 4 2 for more details on the protection circuitry Manual SIO Mode Section to enable the manual SIO Mode and use switch S2 to toggle either NPN or PNP Table 6 SIO Mode Options J6 J7 J8 DESCRIPTION 1 2 1 2 X MCU control 2 3 2 3 1 2 Manual S2 control NPN Mode 2 3 2 3 2 3 Manual S2 control PNP Mode LaunchPad and BoosterPack connectors J10 and J12 are the connectors to interface TIDA 00339 to a LaunchPad Please refer to the LaunchPad in use to ensure proper connection between the devices J10 and J12 have two long pins allowing the connection of additional BoosterPacks on top of the TIDA 00339 device for example a display BoosterPack or a sensor front end BoosterPack C Q current limiter The circuitry changes between the resistor R10 4 75 k and potentiometer R11 20 k to allow individual settings of the current limit of th
38. s and agrees that any military or aerospace use of Tl components that have not been so designated is solely at Buyer s risk and Buyer is solely responsible for compliance with all legal and regulatory requirements in connection with such use TI has specifically designated certain components as meeting ISO TS16949 requirements mainly for automotive use In any case of use of non designated products TI will not be responsible for any failure to meet ISO TS16949 Mailing Address Texas Instruments Post Office Box 655303 Dallas Texas 75265 Copyright 2015 Texas Instruments Incorporated
39. sed MSP430FR4133 16 bit MCU 16KB FRAM 16 Bit RISC architecture up to 8 MHz FRAM access and 16 MHz system clock speed 3 x timer blocks 10 ch 10 bit analog to digital converter ADC 8 x 32 segment LCD driver with integrated charge pump and configurable pins e EnergyTrace available for ultra low power debugging e 20 pin LaunchPad standard leveraging the BoosterPack ecosystem e Onboard eZ FET emulation Two buttons and two LEDs for user interaction e Segmented LCD TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated 7 I TEXAS INSTRUMENTS System Design Theory www ti com 4 4 1 8 System Design Theory Power Supply In an IO Link based sensor transmitter the sensor itself can draw power from the L line While the SN65HVD101 has a built in LDO with a 3 3 V or 5 V output to supply the remaining circuits the SN65HVD102 requires its supply from an external source Due to the modular approach and flexibility of this TI design the on board LDO TPS7A1633 device is used to supply the IO Link PHY For the overall sub system evaluation TIDA 00339 and MSP430 LaunchPad the SN65HVD102 device can also be supplied by the 3 3 V from the LaunchPad Table 1 shows the three power supply options Table 1 TIDA 00339 Power Supply Options TIDA 00339 POWER SUPPLY OPTIONS J1 J2 COMMENTS The board gets its 3 3 V 1 3 3 V from LaunchPad X
40. y TMG TE GmbH Figure 18 IO Link Master GUI After Established Connection to TIDA 00339 TIDU681A January 2015 Revised January 2015 IO Link PHY BoosterPack 23 Submit Documentation Feedback Copyright 2015 Texas Instruments Incorporated lm TEXAS INSTRUMENTS Getting Started www ti com MR nil p m Wo Ae A Q File Options Help Logged in as Specialist TMG USB IO Link Master V2 SE 1 1 Port 0 Pin 4 TIDA 00339 a Ti blockwritemode E USB Process Data identification Observation Parameter Generic ni e nanus Master V2 SE Process Data In Catalog H O EtherNet IP cy PROFINET EC USB BMC TMG TE GmbH e2 TMG USB IO Link Master V2 SE ez TMG USB IO Link Master V2 TS Ej Cy 10 Link Ej C Texas Instruments Incorporated EC Sample Devices EC TIDA 00339 g Cy V1 1 i QM TIDA 00339 cy TMG TE GmbH m Figure 19 IO Link Master GUI Process Data Tab 5 3 4 Usage To reiterate the objective of this TI design is to allow a flexible evaluation of the IO Link interface with the existing sensor front ends A connectable sensor front end requires an MCU because of the flexibility of the TIDA 00339 device This MCU communicates with the MSP430 on the LaunchPad exchanging the data from the sensor to the IO Link interface and vice versa for configuring the sensor Several variables are
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