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GS-DL010 - Combinational Digital Logic Trainer

1. xyxyz XyX Z 2 zxyz zX z zy z using theorem 12a two times one for xy and one for z xyz xyX Z Xyy z xyz zX z zy z using theorem 7a two times one for xy and one for 2 xyz xyx z Xyy z zx z zy z using theorem 7b on xyz xyz xyz 0 0 0 0 using theorem 9a and four times xyz using theorem 6b Hence we have again shown that the two circuits are functionally equivalent 3 6 2 Using K Maps The K map method is a visual technique for simplifying Boolean equations The K map itself is just another way of representing the truth table and like the truth table it is also a 2 dimensional table The main difference is in the labeling of the columns and rows The columns and rows in a K map are labeled with the input variable names and their two possible constant values Since each variable can have either a 0 or a 1 therefore two columns or two rows are needed for each vari able Figure 18 shows the setup of a K map for two three and four variables For the two variable K map in Figure 18 a we have placed the variable x in the two rows and the variable y in the two columns The intersection of each row and column gives us the unique value for these two variables hence there are the four intersection boxes that represent the unique combination of the two input variables xy having the values 00 01 10 and 11
2. Pn b i i Oi dt c i i 1 d ii 11 11 iii 11 f ic il iil ti i 3 21 2 0 1 0 g i L i hi Global Specialties 70 Ch 4 Labs Based on these seven simplified equations we obtain the circuit as shown in Figure 44 SW7 SW6 SWS SW4 5 h 10 Figure 44 Reduced circuit for the BCD to 7 segment LED decoder Experiments 1 Implement the BCD to 7 segment LED display decoder circuit as shown in Figure 44 Connect the four inputs i i i i to the four switches SW7 SW6 SW5 SWA respectively and connect the seven outputs a b c d e f g to the 7 segment LED display Notice that the output of NOT gate number 10 needs to connect to seven inputs Since there are only six wire connection points you can make one connection to the breadboard to give you more connection points The XNOR gate can be obtained by connecting a NOT gate to the output of the XOR gate In the schematic diagram it is the XOR gate number 10 connected to the NOT gate number 6 and the XOR gate number 11 connected to the NOT gate number 8 Verify that it operates correctly according to the table in Figure 43 2 Implement the BCD to 7 segment LED display decoder circuit based directly from the original truth table shown in Figure 43 and without doing any simplifications Verify that it operates cor rectly according to the table in Figure 43 3 Recall from Experiment 4 of Lab 2 that you can get the same functio
3. a b c Figure 18 K map setup for a two variables b three variables and c four variables Regardless of how many variables the equation has the K map for it is still going to be a 2 dimen sional table Hence for a three variable K map we need to double up two of the variables as shown in Figure 18 b for the two variables y and z It does not matter whether you put it in the columns or the rows Now each column will have two unique values for yz 00 01 10 and 11 Notice however that we reversed the label ordering for the third and fourth columns The reason is that in order for the K map to work the values for every adjacent column or row must differ in only one bit So with this new ordering 00 01 11 and 10 this condition is satisfied Notice that this condition is also satis fied between the first and last columns 00 and 10 Hence you need to visualize that the first and last Global Specialties 22 Ch 3 Digital Logic Circuits columns are also adjacent to each other For a four variable K map we will have two variables with four combinations for both the col umns and rows as shown in Figure 18 c Again the value labeling for both the third and fourth columns and rows are reversed As you can quickly see it is almost impossible to visualize a five variable K map although it is sometimes done The fifth variable v will be in a third dimension There will be two four variable one on top of th
4. it doesn t matter what this other value is the result will always be a 0 Similarly theorem 5b says that when you OR a 1 with another value in this case the variable x it doesn t matter what this other value is the result will always be a 1 Theorems 6a and 6b say that if you AND a 1 with x or OR a 0 with x the result will always be x Again theorems 5 and 6 are a direct result from the definitions of the AND and OR operations Theorem 7a is obtained from axioms 1a and 2a and theorem 7b is obtained from axioms 1b and 2b Theorem 8 simply says that if you double negate a value you get back the original value For theorem 9a you AND x with x But since there are only two possible constant values 0 and 1 therefore if x is a 1 then x has to be a 0 and vice versa Therefore one of the two values that you AND with will always be a 0 and so the result of the AND will always be a 0 from theorem 5a For the two and three variable theorems in Figure 15 c theorem 10 is just the commutative property in mathematics that you know theorem 11 is the associative property and theorem 12 is Global Specialties 18 Ch 3 Digital Logic Circuits the distributive property Note that for theorem 12a and b you can have the AND distributing over the OR and the OR distributing over the AND This is not true for the math version of the distributive property but true in Boolean algebra Theorem 13 is very special and so it has a name it is calle
5. x y The circuits for the left and right side of the equality are respectively shown next TI H T f umm m Separately implement these two circuits and derive their truth tables Because of the equality the two truth tables should be the same 15 DeMorgan s theorem 13b states that x y x Implement these two circuits and derive their truth tables similar to Experiment 14 above Verify that these two truth tables are the same Global Specialties 34 Lab 1 Truth Tables for Reporting Results Ch 4 Labs 2 input AND gate 2 input OR gate NOT gate Experient 1 Experiment 2 Experiment 3 4 input AND gate 4 input OR gate UJ input AND gate 3 input OR gate Experiment 4 Experiment 5 Experiment 6 Experiment 9 Experiment 10 Experiment 11 35 www globalspecialties com Combinational Logic Design Experiment 11 Boolean Equaation Experiment 14 Experiment 15 Global Specialties 36 Ch 4 Labs 4 2 Lab 2 NAND NOR XOR and XNOR Gates Purpose In this lab you will experiment with the NAND NOR XOR and XNOR gates You will verify their operations by deriving the truth tables for them Introduction In addition to the AND OR and NOT gates the NAND NOR XOR and XNOR gates are also consid ered as basic building blocks for digital circuits In practice the NAND gate is actually u
6. Combinational Logic Design there is also a carry in bit cin from the previous bit slice The result of the addition produces a sum bit and a carry out bit cout for a carry to the next bit slice The carry in and carry out bits allow the FA to pass bits from one bit position to the next bit position when several FAs are connected together in series So in total there are three input bits first input operand x second input operand y and the carry in cin and two output bits carry out cout and the sum s The logic symbol truth table and the simplified circuit are shown in Figure 32 a b and c respectively a Figure 32 The full adder FA a logic symbol b truth table c simplified circuit Experiments 1 Implement the full adder circuit shown in Figure 32 c and verify that it operates according to the truth table shown in Figure 32 b 2 Notice that the full adder circuit shown in Figure 32 c is much simplified If you construct the circuit by picking out the 1 s rows in the output columns of the truth table you will end up with a much larger circuit Derive this larger circuit then implement and verify that it operates accord ing to the truth table 3 What should the value for c be if allyou want is to add the values of the two operands x and y 4 Derive the truth table for a full subtractor circuit following the same way that the full adder was constructed You will have three inputs x y and
7. EPROM with a capacity of 4 096 bytes the tip of a pen the 7440 chip which contains two 4 input NAND gates and a transistor Every digital circuit is categorized as either a combinational circuit or a sequential circuit A micro processor circuit is composed of many different combinational circuits and many different sequential circuits In part of this three part series on microprocessor design training courseware you will learn how to design combinational circuits In part Il you will learn how to design sequential circuits And fi nally in part IIl you will learn how to design microprocessors by putting these different combinational and sequential circuits together to make a real working microprocessor 2 2 Combinational and Sequential Circuit Analogy A simple analogy of the difference between a combinational circuit and a sequential circuit is the combination lock that we are familiar with There are actually two different types of combination locks as shown in Figure 5 For the lock in Figure 5 a you just turn the three number dials in any order you like to the correct number and the lock will open For the lock in Figure 5 b you also have three numbers that you need to turn to but you need to turn to these three numbers in the correct sequence If you turn to these three numbers in the wrong sequence the lock will not open even if you have the numbers correct The lock in a is like a combinational circuit where the order in which
8. the position of a digit or the position of a bit in the case of binary numbers denotes a specific value For example in the decimal number 38 the 3 actually has a higher value than the 8 because it is in the tens position whereas the 8 is in the ones position For binary numbers we only use 05 and 1 s instead of the ten digits for decimal numbers and the base that we use is based 2 instead of based 10 The value for the decimal number 238 is calculated as follows 238 2 102 3 101 8 100 200 30 8 238 Similarly the value for the binary number 10011 the subscript 2 denotes that the number is a binary number is calculated as follows 10011 1 24 0 23 0 22 1721 1 2 16 0 0 2 1 19 in decimal When adding and subtracting binary numbers we carry and borrow a two instead of a ten So when we add 1 1 in binary we get a 10 instead of a 2 The full adder circuit adds a 1 bit binary number with a second 1 bit number to produce a sum and a carry out bit The circuit also has a carry in bit that allows it to be connected in series with other FA circuits Consider the following addition of two 4 bit binary numbers LT j 0 1 1 10 0 The full adder circuit is designed to only add one bit slice of the 4 bit number for example the bit slice that is outlined in the rectangle In adding this bit slice in addition to the two input operands 51 www globalspecialties com
9. ALU circuit for performing addition subtraction AND and OR Global Specialties 66 Ch 4 Labs Experiments 1 Implement the 2 bit ALU circuit shown in Figure 42 You will need to have two FA circuits with their c s c S connected together For each x input to the FA you will need to connect the output of the LE circuit to it Similarly for each y input to the FA you will need to connect the output of the AE circuit to it Connect the output of the CE circuit to c Connect the 2 bit oper and a to switches SW3 and SW2 Connect the 2 bit operand b to switches SW1 and SWO Con nect the 2 bit result fto LED1 and LEDO Connect the unsigned overflow signal to LED3 and the signed overflow signal to LEDA In the circuit diagram the numbers inside each gate denote the corresponding component number on the board to help in debugging These numbers are for reference only Verify that your ALU circuit does perform the four different operations as given in the table in Figure 40 a correctly Record your results and compare your results with the follow ing table The four bits e g 0 0 00 in the entries denote from left to right the signed overflow bit unsigned overflow bit 7 and 7 Operand Operand a b a b aANDb aORb a b s 00 s 01 s 10 s 11 0000 ex eoo 000 0 1 Q 0 Q ERO oon 0001 000 oon naj o 0 10 1 1 0 i 67 www globa
10. as 05 or 15 originate from the primary inputs and travel through the various gates finally ending at the primary output f The circuit in Figure 12 b has three inputs x y and z and two outputs f and g This circuit also shows an example of where the output of one gate is connected to the inputs of two different gates As you can see the output of the AND gate is connected to the input of the OR gate and to the input of the XOR gate Also the primary input z is connected to both the input of the NOT gate and to the input of the OR gate The output of the XOR gate is connected to the input of the NAND gate and is also the primary output signal g The output from the NAND gate is the second primary output signal f The circuit in Figure 12 c is very similar to the circuit in Figure 12 a The one main difference besides having only two inputs is that the output from the OR gate is connected back to the input of the AND gate Finally the circuit in Figure 12 d will produce errors because both the AND gate output and the NOT gate output are connected to the same input of the OR gate Think about what happens if the AND gate outputs a 1 and the NOT gate outputs a 0 Since a 1 is having voltage like 5 volts and 13 www globalspecialties com Combinational Logic Design 0 is ground and by connecting them together you are creating a short circuit between power and ground which is similar to connecting the plus and minus terminals of a
11. axioms and theorems for Boolean algebra are listed in Figure 15 Figure 15 a lists the axioms b lists the single variable theorems and c lists the two and three variable theorems of them come in pairs For example axiom 1a and axiom 1b is a pair The pairing basically comes from the fact 17 www globalspecialties com Combinational Logic Design that one set uses the AND operation the a set and the second set uses the OR operation the b set The first four pairs of axioms listed in Figure 15 a are basically just a summary of what we already know about the AND OR and NOT operations from their truth tables 1a 2a and 3a are directly from the AND truth table 1b 2b and 3b are directly from the OR truth table and 4a and 4b are directly from the NOT truth table ae ana a 0 sa a b xey ez xe yez x y 2 2 xXe y z xey 2 vez 2 t y ty c Figure 15 Boolean algebra axioms and theorems a axioms b single variable theorems c two and three variable theorems The single variable theorems listed in Figure 15 b basically show what happens when you com bine a single Boolean variable with a constant And again these are a direct result from the defini tions of the AND OR and NOT operations For example theorem 5a says that when you AND a 0 with another value in this case the variable x
12. b for borrow in and two outputs for borrow out and d for difference The circuit performs the subtraction x y to give d A 1 for denotes that there is a borrow from the bit on the right side and a 1 for b denotes that this current bit needs to borrow from the bit on the left So in essence you are doing x y b to give d and if you need to borrow then set b a 1 otherwise b is a 0 Keep in mind that you are working with binary numbers so when you borrow you get a 2 and not a 10 The first two rows out of the truth table are shown next For the second row you have 0 0 1 and x being 0 is not enough so you borrow by setting b to a 1 When you borrow you get a 2 so x now has a 2 and 2 0 1 1 so dis also a 1 Try to complete the truth table on your own before looking for the answers The complete truth table is found in Experiment 5 of Lab 3 Global Specialties 52 Ch 4 Labs 5 Implement the circuit from the truth table in Experiment 4 and verify that it operates correctly 53 www globalspecialties com Combinational Logic Design Global Specialties 54 Ch 4 Labs 4 8 Lab 8 4 bit Adder Purpose In this lab you will learn about the 4 bit adder circuit This 4 bit adder circuit is for adding two 4 bit binary numbers producing a 4 bit sum and a carry out You will implement the circuit and verify its operations Introduction There are different ways to design a
13. battery directly together with a piece of wire 3 3 Identifying Combinational Circuits Before learning to design combinational circuits we need to be able to determine whether a given digital circuit is a combinational circuit or not And if it is a combinational circuit then we want to be able to formally describe its operation by deriving the truth table for it Looking back at the three correct digital circuits in Figure 12 i e a b and two of them are combinational circuits and one is a sequential circuit Can you figure out which two are combinational circuits The difference is not in how many inputs or outputs the circuit has but rather in how the gates are connected together Notice in Figure 12 a and b signals as determined by the connections in the circuits all flow in one general direction from the primary inputs on the left hand side to the primary output on the right hand side However in Figure 12 c not only is the output from the AND gate connected to the input of the OR gate but the output from the OR gate is connected back to the input of the same AND gate thus creating a feedback loop The difference is in the presence of this feedback loop Another way to identify a feedback loop is that the output of a gate is connected back to one of its own input either directly or indirectly via other gates A circuit is a combinational circuit only if it does not have any feedback loops Hence the first two c
14. chips All of the holes are already connected together in groups This way you can connect two wires together or connect a wire to an IC pin simply by plug ging the two wires into two holes that are already connected together The layout of the breadboard is shown in Figure 2A 5 Global Specialties 2 Ch 1 Combinational Logic Design Trainer Section 1 00000 00000 00000 Section 2 000 OOO 0200 OOO OOO 000 000 OOO 000 OOO OOO 000 000 OOO ooo OOO 000 O O O O O O Section 3 Section 4 00000 00000 Figure 2A Breadboard layout The holes in section 1 are connected horizontally The holes in section 2 are connected vertically The holes in section 3 are connected vertically The holes in section 4 are connected horizontally Holes in any two different sections are not connected There are four general sections on the breadboard All of the holes in section 1 are connected in common horizontally The holes in this section are usually connected to VCC to provide power or the logic 1 signal to your circuit on the breadboard Like section 1 all of the holes in section 4 are also connected in common horizontally The holes in this section are usually connected to G
15. each combination of input values what the corresponding output ought to be i e whether the siren S should be turned on or off For example in the first row where M 0 D 0 and V 0 this means that the system is off so regardless of the state of the door switch or the vibration sensor the siren should be off Hence the output S is 0 for this row In the row where M 1 D 0 and V 0 this means that the system is on but since the door is closed D 0 and there is no vibration V 0 the siren should also be off Hence the output S for this row is also 0 Continuing with this reasoning you should be able to complete the table and obtain the complete truth table as shown in Figure 27 a 41 www globalspecialties com Combinational Logic Design M D V D DD M b c a Figure 27 Car security system a truth table b circuit diagram derived from the truth table c simplified circuit diagram Obtaining a circuit from a truth table is fairly straight forward For each row where the output S is a 1 you use the AND operation to AND the input values together Where the input value is a 1 you connect that input directly to an input of the AND gate Where the input value is a 0 you connect the negated input through the NOT gate to an input of the AND gate Finally the outputs of all the AND gates are connected to the inputs of an OR gate to produce the primary output signal Hence from the truth table in Figure 27 a you
16. expression is normally evaluated from left to right but just like in math where the multiplication and division operations are performed before the addition and subtraction operations so in Boolean equations the NOT operation has the highest precedence followed by the AND operation and lastly the OR operation The ordering in which these operations are performed can be changed by the use of parenthesis So in the equation f x4yz the NOT z is performed first followed by the y AND z and lastly the x OR yz If we want to per form the x y before the yz we would have to add in parenthesis like this f x y z If we want to negate NOT the entire expression x y z we would have to write either f x y z or 1 Ot Be careful when you use a variable name that has more than one letter such as sum and not in terpret itasseuem There are no special symbols for the NAND and NOR operations The expression for the NAND operation is just xy and the expression for the NOR operation is just x y Two other symbols are also used in Boolean expressions and equations They are for the XOR operation and for the XNOR operation From the definition of the XOR operation we have the equality xy and from the definition of the XNOR operation we have the equality See Experiments 4 and 6 of Lab 2 for proofing the correctness of these two equalities 3 5 2 Axioms and Theorems The
17. f has a 1 x isa 1 and y isa 0 so the AND term for this second row is xy Finally we ORed these two AND terms together to give the resulting equation for the circuit shown in Figure 24 b The circuit as obtained from this equation is shown in Figure 24 c You probably recognize the equation in Figure 24 b as the equation for the XOR gate It has to be because the truth table that we started out with is for the XOR gate As another example let us synthesize the circuit for the truth table shown in Figure 25 a f 2 x y z x yz xy z xyz xyz a b Figure 25 Synthesis example a truth table b equation and c synthesized circuit There are five 1 s in the output f column so we will have five AND terms in the final equation These five AND terms in order are x y z x yz xy z xyz and xyz ORing these five AND terms together give us the equation for the circuit shown in Figure 25 b The circuit as derived from this equation is shown in Figure 25 c You may have recognized that this truth table in Figure 25 a is the same truth table from Figure 13 d However the circuit obtained from this truth table certainly is much larger in size than the circuit shown in Figure 13 c The conclusion is that if you start out with a circuit derive the truth table for it and then derive the circuit from the truth table you most likely will not get the same circuit that you started out with The equation that you obt
18. have multiple wire connec tion points To connect from the output of a logic gate to the input of another logic gate simply use a hook up wire to connect between the two wire connection points For example push button PBO has six common wire connection points so to use PBO you can connect a hook up wire to any one of these six connection points Connect the other end of the hook up wire to a connection point for LEDO When you press the push button the LED should turn on Try this simple connection now to see that it works The logic gates on the trainer are also numbered for easy reference for when connecting a circuit up For instance the eight 4 input AND gates are numbered from 1 to 8 There are also eight 4 input OR gates and they are also numbered from 1 to 8 So be careful when a circuit diagram says gate number 1 that you know which type of gate it is referring to i e whether it is the 4 input AND gate the 4 input OR gate or even one of the other gates For example the following circuit diagram uses the number 1 4 input AND gate the number 2 2 input AND gate and the number 6 2 input OR gate In this courseware we will use the notation 4 AND 1 2 AND 2 and 2 OR 6 to refer to these three gates respectively The general breadboard area allows you to connect other components that are not available on the trainer together with your circuit The breadboard consists of many holes for you to connect hook up wires and integrated circuit IC
19. into two subcubes of size 2 each In Figure 22 c the four 1 s are separated into two subcubes of size 2 each In Figure 22 d the size 2 subcube is made into a subcube of size 4 In Figure 22 e the six 1 s are separated into two subcubes of size 4 each The 1 box in column 10 is combined with the 1 box in column 00 of the same row to make a subcube of size 2 The 1 box in column 11 is not adjacent to any other 1 s so it is a subcube all by itself In Figure 22 f the two 1 s at the top are not adjacent to the two 1 s at the bottom so they must be separated into two subcubes of size 2 each 25 www globalspecialties com Combinational Logic Design d e f Figure 22 Examples of valid subcubes from the K maps in Figure 21 a size of both subcubes can be made larger b size of subcube is not a power of 2 c shape of subcube is not rectangle d size of the 2 subcube can be made bigger e size of the larger subcube with six 1 is not a power of 2 and the smaller subcube is not horizontal or vertical f the 1 boxes are not adjacent You may have wondered why for Figure 22 b that we did not make the following subcubes in stead The answer should be obvious because rule 5 says that we need to make each subcube as large as possible and the subcube of size 1 can be made into a subcube of
20. lines Experiments 1 Implement the 2 to 4 decoder circuit as shown in Figure 29 c and verify that it works accord ing to the truth table shown in Figure 29 b Connect the two inputs A and A to two switches and connect the outputs Y Y Y and Y to four LEDs 2 Implement the 2 to 4 decoder with enable circuit as shown in Figure 30 c and verify that it works according to the truth table shown in Figure 30 b 3 Design and implement a 3 to 8 decoder 4 Design and implement a 3 to 8 decoder with enable Global Specialties 48 Ch 4 Labs 4 6 Lab 6 Comparators Purpose In this lab you will learn about comparator circuits Comparators are for comparing between two numbers to see if one number is less than equal to or greater than a second number You will imple ment different comparator circuits and verify their operations Introduction A comparator will output a 1 if the logical condition that it is testing for is true and outputs a 0 if the condition is false The simplest comparator is to compare whether a value is equal or not equal to a constant The use of an AND gate is all that is needed for the equality comparator with a constant For example the circuit in Figure 31 a tests whether a 4 bit variable x is equal to the constant 3 or not Since 3 in binary is 0011 therefore with x and x inverted the AND gate will output a 1 when x is equal to 0011 For all numbers other than 3 it will output a
21. lines A A 01 the output line Y will be selected when the address lines A A 10 the output line Y will be selected and when the ad dress lines A A 11 the output line Y will be selected The selected output line will have a 1 value while all of the remaining output lines will have 05 Given this description you should now be able to derive the truth table and the circuit for a 2 to 4 decoder The truth table and the circuit are shown in Figure 29 b and c 2 to 4 decoder Y Y Yo Y Y Y Y a b 9 Figure 29 A 2 to 4 decoder a logic symbol b truth table c circuit A variation of the 2 to 4 decoder has an extra enable E input line When E is a 1 this decoder works exactly like the original However when the circuit is disabled with E set to 0 then it doesn t matter what the address input lines are all of the output lines will be a 0 The logic symbol truth table and the circuit for the 2 to 4 decoder with enable are shown in Figure 30 47 www globalspecialties com Combinational Logic Design E Ai 4 c Figure 30 A 2 to 4 decoder with enable a logic symbol b truth table c circuit In addition to the 2 to 4 decoder there are other sizes of decoders namely the 1 to 2 decoder and the 3 to 8 decoder Both of these can have the variation of either having or not having the enable input line The 3 to 8 decoder will have three address lines and eight output
22. number of inputs is odd the XNOR gate operates exactly like the XOR gate In addition to having just two inputs for all of the above mentioned gates except for the NOT gate they can have more than two inputs Theoretically there is no upper limit to the maximum number of inputs to these gates In practice however they have only 2 3 4 6 and 8 inputs Re gardless of the number of inputs they have they always have only one output Figure 10 shows the symbols for a 3 input NAND gate a 4 input AND gate and a 6 input OR gate D D b 9 Figure 10 The logic symbols for a 3 input NAND gate b 4 input AND gate c 6 input OR gate The truth tables for the 3 input NAND gate 3 input AND gate and 3 input OR gate are shown in Figure 11 Figure 11 Truth table for a 3 input NAND gate b 3 input AND gate c 3 input OR gate 3 2 Digital Circuits A digital circuit is just the connections of a number of these logic gates together There are certain rules however that one must follow in connecting these logic gates together to make an operation ally correct circuit 1 The output of a gate is always connected to the input of one or more gates unless it is a primary output 2 Primary outputs are the very last outputs from the circuit and are not connected to the inputs of other gates but instead are connected to external devices such as light emitting diodes LEDs and VGA monitors 3 The outputs from two
23. of input values into the circuit s primary inputs Knowing the primary input values we can determine for each gate in the circuit what its output ought to be by starting from the primary inputs and tracing through the circuit to the final output For example in the top circuit in Figure 13 c using xyz 000 i e x 0 0 and 2 0 the two inputs to the AND gate are both 0 Hence the output of the AND gate will be a 0 since from the AND gate truth table 0 AND O is O This 0 from the output of the AND gate goes to one input of the OR gate and the other input to the OR gate is also a 0 from z 0 From the OR gate truth table we see that 0 ORO is 0 Hence the output of the OR gate which is also the primary output for the circuit at f is 0 Therefore the value 0 for f is inserted into the truth table under the f column and in the row where xyz 000 as shown in Figure 13 d Continuing on for the next set of input values where xyz 001 as shown in the bottom circuit in Figure 13 c the output of the AND gate is again 0 However with z being a 1 going into the OR gate the output of the OR gate will be a 1 Therefore f is a 1 for this second set of inputs This 1 is inserted under the f column and in the second row of the truth table where xyz 001 This tracing process is repeated for the rest of the combinations and at the end you will have the completed truth table for the circuit as shown in Figure 13 d To help speed up the
24. of size 2 and one of size 4 Figure 21 shows some invalid subcubes In Figure 21 a the two size 1 subcubes can be made larger by combining them together into one size 2 subcube In Figure 21 b the subcube size with three 1 s is not a power of 2 In Figure 21 c the subcube shape is not a rectangle In Figure 21 d the size 2 subcube can be made larger into a subcube of size 4 In Figure 21 e the subcube with size 6 is not a power of 2 and the size 2 subcube is not horizontal or vertical In Figure 21 f the four 1 s are not adjacent 2 Refer to the book Digital Logic and Microprocessor Design with VHDL by E Hwang for a detailed discussion on how to use K maps to simplify combinational circuits Global Specialties 24 Ch 3 Digital Logic Circuits d e f Figure 21 Examples of invalid subcubes a size of both subcubes can be made larger b size of subcube is not a power of 2 c shape of subcube is not rectangle d size of the 2 subcube can be made bigger e size of the larger subcube with six 1 is not a power of 2 and the smaller subcube is not horizontal or vertical f the 1 boxes are not adjacent Figure 22 shows how to form valid subcubes for the K maps shown in Figure 21 In Figure 22 a the two 1 s are grouped together to form one subcube In Figure 22 b the three 1 s are separated
25. one or more different but functionally equivalent digital circuit A digital circuit that implements a truth table is always a combinational circuit The design process be gins with an informal description of the circuit that you want This informal description is translated into a precise and formal description of the circuit in the form of a truth table Given a truth table you can easily construct a combinational circuit for it Hence the circuit will operate according to the specifications given in the truth table As an example we begin with an informal description of a car security system that we would like to implement This simple car security system consists of a master switch M for turning on and off the system a door switch D for detecting whether the car door is open or close a vibration sensor V for detecting movements of the car and a siren S for sounding the alarm Given these input and output parameters assume that you are at least slightly acquainted with the functional operations of a security system so that you can precisely describe its operation using a truth table First you layout your truth table with the column labels being the input and output signals Next using binary numbers you enumerate all possible input values creating one row per value You should have the table shown in Figure 27 a but without the values in the S column Interpreting a 1 being on and a 0 being off determine for each row i e
26. rectangle area in the left half Each junction is a transistor Figure 3 Pictures of transistors a a discrete transistor with a piece of silicon b hundreds of transistors inside an IC chip as viewed through an electron microscope The right half of the picture is a magnification of the rectangle area in the left half Figure 4 is a picture with several generations of integrated circuit chips Going clockwise from the top left corner is a lump of silicon which can be used to make many transistors an Intel amp 8085 micro processor with its top opened The 8085 is an 8 bit general purpose microprocessor with a maximum clock speed of around 10 MHz and contains around 29 000 transistors an Intel amp 486 DX microproces sor The 486 has a maximum clock speed of 100 MHz and contains around 1 2 million transistors the 2732 erasable programmable read only memory EPROM which has a non volatile storage capacity Global Specialties 6 Ch 2 Microprocessors of 4 096 bytes The 2732 contains around 32 000 transistors the tip of a pen which contains no transis tor the 7440 chip which has two 4 input NAND gates and contains 20 transistors and finally a single discrete transistor Figure 4 Picture of various integrated circuit chips Going clockwise from the top left corner is a lump of silicon an eight bit Intel 8085 microprocessor with its top opened an Intel 486 DX mi croprocessor the 2732 erasable programmable read only memory
27. should obtain the circuit in Figure 27 b This circuit will operate exactly according to the truth table In practice we usually want to make the circuit as small as possible but still operates exactly the same Using logical reasoning and looking at the truth table in Figure 27 a more carefully you might notice that the siren should be turned on S 1 only when the master switch is on M 1 and either the door is opened D 1 or there is vibration V 1 In other words you want S to be 1 only when 1 and either D 1 or V 1 or both D and V are 15 Writing this out as a Boolean equation we get Sz M AND D OR V In textbooks you might see the equation above written as S M e D V where the e symbol denotes the AND operation and the symbol denotes the OR operation or even without the symbol for the AND operation like this 5 0 This equation gives rise the simplified circuit shown in Figure 27 The two circuits in Figure 27 are functionally equivalent i e they satisfy the same truth table 6 For an in depth discussion on Boolean equations refer to the book Digital Logic and Microprocessor Design with VHDL by E Hwang Global Specialties 42 Ch 4 Labs Experiments 1 Implement the two circuits in Figure 27 b and separately and verify that both of them operate according to the truth table in Figure 27 a Connect the master switch M to SWO Connect the door switch D and the vibration s
28. the inputs are entered into the circuit does not matter whereas a sequential circuit is like the lock in b where the sequence of the inputs does matter T www globalspecialties com Combinational Logic Design b Figure 5 Two types of combination locks a the order in which you enter the numbers does not matter b the order in which you enter the numbers does matter So a combinational circuit is one where the output of the circuit is dependent only on the inputs to the circuit but not dependent on the order in which these inputs are entered One example of a combinational circuit is the adder circuit for adding two numbers The adder takes two numbers for its inputs With these two input numbers it evaluates the sum of these two numbers and outputs the result It doesn t matter which input number you enter first as long as you enter both numbers and the adder will output the sum Examples of combinational circuits used inside a microprocessor circuit include adders multiplex ers decoders arithmetic and logic unit ALU and comparators In part 1 of this three part series courseware you will learn about these and many other combinational circuits Global Specialties 8 Ch 3 Digital Logic Circuits Chapter 3 Digital Logic Circuits 3 1 Basic Logic Gates All digital circuits are implemented with logic gates The three fundamental logic gates are the AND gate the OR gate and the NOT gate Using these three types of l
29. to the three AND terms x y x y and xy ORing these three AND terms results in the equation f x y x y xy This equation for the 2 input NAND gate can be simplified as follows f x y x y xy x y t XV xy y y x x XxXe1 y 1 The last equality is the right hand side of the equation in DeMorgan s theorem Global Specialties 30 Ch 4 Labs Chapter 4 Labs The following labs will teach you how to design and implement combinational circuits Many of these circuits are standard components used in microprocessor circuits You will need to understand these circuits in order for you to use them in our Microprocessor Design Trainer where you will actu ally design and implement your very own custom real working microprocessor 4 1 Lab 1 Basic Gates Lights Action Purpose In this lab you will first learn how to implement combinational logic circuits using the Combina tional Logic Trainer by connecting the basic logic gates and 1 05 correctly for a given circuit You will use the trainer to confirm the operations of the basic gates Finally you will learn how to derive the truth table for any combinational circuits Introduction The AND OR and NOT gates are the basic building blocks for building any digital logic circuits Any digital logic circuit no matter how large or complex it is can be constructed using these three types of basic gates Therefore in order to d
30. tracing process notice that when input zis a 1 the output of the OR gate will 15 www globalspecialties com Combinational Logic Design always be a 1 regardless of the other input Therefore when z is a 1 it doesn t matter what x and y are fwill always be a 1 By reasoning this way you can more quickly determine many of the output values without having to actually trace through the entire circuit with each set of numbers As an exercise derive the truth table for the circuit shown in Figure 14 a Try to derive your own truth table first and after you have done that then compare your results with the answer shown in Figure 14 b a b Figure 14 a A combinational circuit and b the truth table for it 3 5 Boolean Algebra Instead of drawing combinational digital circuits using logic gate symbols as we have seen so far we can use Boolean equations to represent these combinational circuits Using Boolean equations to represent combinational circuits allow us to easily manipulate them by using Boolean algebra Boolean algebra is very similar to the algebra in mathematics with which you should already be familiar For instance both of them have constants and variables and operators for manipulating the constants and variables Furthermore both of them have axioms and theorems and many of the theorems such as the commutative theorem and the associative theorem are very similar One main difference between the two howeve
31. 0 b x lt 5 Ryt D Wap ih x lt 5 x x X X X X c Figure 31 Simple 4 bit comparators for a x 3 b x y x lt 5 The XOR gate can be used for comparing inequality between two variables Recall that the XOR gate outputs a 1 when its two input values are different Hence we can use one XOR gate for com paring each bit pair of the two operands A 4 bit inequality comparator is shown in Figure 31 b Four XOR gates are used with each one comparing the same position bit from the two operands The outputs of the XOR gates are ORed together so that if any bit pair is different then the two operands 49 www globalspecialties com Combinational Logic Design are different and the resulting output is a 1 For the greater than or less than relationships we can construct a truth table and build the cir cuit from it For example to compare whether a 4 bit value x is less than five we get the truth table shown in Figure 31 c The first five rows have a 1 output since their decimal values are equal to 0 to 4 respectively The remaining rows from 5 to 15 will all have a 0 output The resulting simplified circuit 8 is shown in Figure 31 Experiments 1 Design and implement a 4 bit comparator circuit that tests for the condition x 7 Verify that it operates correctly 2 Design and implement a 4 bit comparator circuit that tests for the condition x 7 Verify that it operates correctly
32. 1 Combinational Logic Design Trainer layout All of the logic gates and I O s are pre mounted with wire connection points connected to them The following is a list of all of the components on the trainer Twelve NOT gates Eight 4 input AND gates Twelve 2 input AND gates Eight 4 input OR gates Eight 2 input OR gates Twelve 2 input XOR gates Eight red LEDs VV VV M 1 www globalspecialties com Combinational Logic Design Two 7 segment LED displays Eight toggle switches One push button switch VCC and GND connection points VV V General bread board area with 270 tie points gt Hook up wires of various lengths The eight LEDs and the LED segments in the 7 segment displays are active high which means that a logic 1 signal will turn the light on and a logic 0 signal will turn the light off The push button PBO is also active high so pressing the button will produce a logic 1 signal All of the eight switches are configured so that when the switch is in the up position the output is a logic 1 and when the switch is in the down position the output is a logic 0 You can also connect a wire to one of the VCC connection points to directly get a logic 1 signal Similarly connecting a wire to one of the GND connection points will get a logic 0 signal All of the logic gates and I O s are pre mounted for easy wiring of a circuit All logic gate inputs are connected to one wire connection point and all logic gate outputs
33. 3 Design and implement a 4 bit comparator circuit that tests for the condition x y Verify that it operates correctly 4 Design and implement a 4 bit comparator circuit that tests for the condition x 7 AND x 12 Verify that it operates correctly 5 Design and implement a 4 bit comparator circuit that tests for the condition x 7 OR x 12 Verify that it operates correctly 6 Design and implement a 4 bit comparator circuit that tests for the condition x x 7 Verify that it operates correctly 7 Design and implement a 4 bit comparator circuit that tests for the condition x 7 Verify that it operates correctly 8 Design and implement a 4 bit comparator circuit that tests for the condition x 3 AND x3 7 Verify that it operates correctly 8 For an in depth discussion on how to simplify Boolean equations and circuits refer to the book Digital Logic and Microprocessor Design with VHDL by E Hwang Global Specialties 50 Ch 4 Labs 4 7 Lab 7 Full Adder Purpose In this lab you will learn about the full adder FA circuit The full adder circuit is for adding two 1 bit binary numbers with carry in and carry out You will implement the circuit and verify its opera tions Introduction Binary Numbers Before we discuss the construction of the full adder we need to talk about binary numbers Binary numbers are positional numbers just like decimal numbers that you are very familiar with In other words
34. 4 bit adder circuit but one very easy to understand way is to simply connect four full adder circuits together in series as shown in Figure 33 b Each box with the label FA is a full adder circuit from Figure 32 and repeated here in Figure 33 for easy reference The carry out c_ signal from each FA is connected to the carry in c signal of the next FA on the left side The first carry in signal is connected to a logic 0 and the final carry out signal is the overflow signal for the complete 4 bit adder circuit The two 4 bit operands are x and y and the re sulting 4 bit sum from the adder is s The subscripts for x y and s denote the bit position of the 4 bit number e g x is bit zero or the first bit of operand x and s is bit three or the fourth bit of s The complete detailed schematic diagram is shown in Figure 34 This adder circuit is called a ripple carry adder because of how the carry signal ripples through the chain of FAs 3 0 4 bit adder 53 0 a b 9 Figure 33 The 4 bit adder a logic symbol b circuit c the FA circuit from Figure 32 c SW7 SW3 SW6 SW2 SWS SWI sw4 SWO X Va X3 X Vi Xo Vo overflow LED7 Figure 34 The complete detailed 4 bit adder circuit 9 The operation of the ripple carry adder is relatively slow A faster adder circuit is called the carry lookahead adder 55 www globalspecialties com Combinational Logic Design A 4 bit ad
35. Copyright 2011 1997 Copyright renewed by Enoch Hwang Ph D and Global Specialties All rights reserved Printed in Taiwan No part of this publication may be reproduced stored in a retrieval system or transmitted in any form or by any means electronic mechanical photocopying recording or otherwise without the prior written permission of the author Combinational Logic Design Table of Contents Chapter 1 Combinational Logic Design Trainer Model DL 010 Chapter 2 MicroprocesSOTS W ooooooWooWo o oom Section 2 1 Introduction to Microprocessors Section 2 2 Combinational and Sequential Circuit Analogy Chapter 3 Digital Logic Circuits o oo Section 3 1 Basic LOGIC Gates sii ta Section 3 2 Digital Circuits ooooWoWoo XX Section 3 3 Identifying Combinational Circuits Section 3 4 Analysis of Combinational Circuits Section 3 5 Boolean Algebra Section 3 6 Simplifying Combinational Circuits Section 3 7 Synthesis of Combinational Circuits chapter 4A Section 4 1 Lab 1 Basic Gates Lights and Action Section 4 2 Lab 2 NAND NOR and XNOR Gates Section 4 3 Lab 3 Designing Combinational Circuits Section 4 4 Lab 4 Multiplexers iii Section 4 5 Lab 5 Decoders o
36. ED3 LED2 LEDI LEDO Sw7 SW6 545 SW4 SW3 SW2 Swi Swo Figure 2B Combinational Logic Design Trainer with three jumper wires connecting AND gate to Switches and LED Using three pieces of hook up wires make these same connections now on your trainer Slide the two switches up and down and see how the LED turns on and off At this point you may not under stand why the LED turns on and off the way it does Just keep reading and you will find out very quickly and you will be well on your way to designing your very own microprocessors Global Specialties 4 Ch 2 Microprocessors Chapter 2 Microprocessors 2 1 Introduction to Microprocessors Whether you like it or not microprocessors also known as microcontrollers control many aspects of our lives today either directly or indirectly In the morning a microcontroller inside your alarm clock wakes you up and another microcontroller adjusts the temperature in your coffee pot and alerts you when your coffee is ready When you turn on the TV for the morning news it is a microcon troller that controls the operation of the TV such as adjusting the volume and changing the channel A microcontroller opens your garage door and another inside your car releases your anti lock break when you drive your car out At the traffic light a microcontroller senses the flow of traffic and turns on hopefully the green light for you when you reach the intersection You stop by a gas station and a microco
37. ND to provide a common ground or the logic 0 signal to your circuit The holes in section 2 are connected vertically so the five holes in each column are connected in common but the vertical columns are not connected together The holes in section 3 are also connected vertically like those in section 2 so the five holes in each column are connected in common but the vertical columns between section 2 and section 3 are not connected together Finally holes in any two different sections are not connected together In the case where you might need more connection points for a component on the trainer you can use the breadboard to give you extra connection points Typically you use a breadboard to connect wires to an IC chip A standard dual in line DIP IC chip would be plugged into the breadboard with one row of pins in section 2 and the second row of pins in section 3 Let us now test out the trainer The three thick lines in Figure 2B show three wires connected from the two switches SW6 and SW7 to the inputs of the number 12 a 2 input AND gate and the output of this AND gate is connected to LED6 In a schematic circuit drawing this circuit would be shown as sal ios SW 7 follows 3 www globalspecialties com Combinational Logic Design DL 010 COMBINATIONAL LOGIC TRAINER 9 V 300 mA GAN Global X8GG508 88888 SBEHSEX SBHBBBEBBHEHBHEHE BHEHUHOHBSEEEESSEHBEEESEHE OF LO LED6 LEDS LED4 L
38. The operation of the NOT gate simply inverts the value at its input So if the input is a 0 then the output will be a 1 and vice versa 3 1 2 Truth Tables We formally describe the operation of a logic gate or any combinational digital circuit with a truth table A truth table is a two dimensional table that lists all possible combinations of the circuit s input values and their corresponding output values The headings for the columns are labeled with the in put and output signal names and there is one row for each combination of input values The values in the output column s are deduced by analyzing the operation of the circuit for each combination of input values The truth table for the AND gate is shown in Figure 7 a In this truth table the two columns la beled x and y are the input signal names and they represent the status of the two binary switches x and y The column labeled f is the output from the AND gate Under the x and y columns we list all possible combinations of the status of these two binary switches again using the convention that a 1 means that the switch is turned on and a 0 means that the switch is turned off In the first row with both x and y being a 0 meaning that both switches are turned off the output of the AND gate will be a 0 hence f for this row is a 0 Thus having understood the operation of the AND gate using the binary switch analogy we can deduce all of the output values for the AND gate As you can
39. ain directly from a truth table without any simplification will always produce the largest circuit for that truth table You should therefore always try to simplify it to get a smaller circuit If the truth table has more than one output then you simply create one circuit for each output However it is possible that some AND terms are the same and so you can remove the duplicate ones For example given the truth table with two outputs f and g shown in Figure 26 a the two separate circuits for f and g are shown in Figure 26 b Notice however that both outputs have a 1 for the row xyz 110 The AND term for this row is needed in both circuits but the total circuit can be made smaller by using only one AND gate for both of these two AND terms as shown in Figure 26 c 29 www globalspecialties com Combinational Logic Design a b Figure 26 Synthesis example a truth table with two outputs b the two separate circuits and c the two circuits with one AND gate removed We will conclude our discussion by proofing the correctness of DeMorgan s theorem Theorem 13a Says x y The left side of this equation x is just the expression for the 2 input NAND gate see Figure 16 c and Figure 9 a if you have forgotten and we know that the truth table for the 2 input NAND gate is This 2 input NAND gate truth table shows that there are three 1 s in the output column and these three 1 s correspond
40. al circuits deal with just two discrete values usually represented by either a 0 or a 1 whereas analog circuits deal with a continuous range of values The main com ponents in an analog circuit usually consist of discrete resistors capacitors inductors and transistors whereas the main components in a digital circuit consist of the AND OR and NOT logic gates From these three basic types of logic gates the most powerful computer can be made Logic gates are built using transistors the fundamental active component for all digital logic circuits Transistors are just electronic binary switches that can be turned on and off The two binary values 1 and 0 are used to represent the on and off states of a transistor So instead of having to deal with different voltages and currents as in analog circuits digital circuits only deal with the two abstract values of 0 and 1 Hence it is usually easier to design digital circuits than analog circuits Figure 3 a is a picture of a discrete transistor Above the transistor is a shiny piece of raw silicon which is the main ingredient for making transistors As you can see in the picture the transistor has three connections one for the signal input one for the signal output and one for turning on and off the transistor Figure 3 b is a picture of hundreds of transistors inside an integrated circuit IC chip as viewed through an electron microscope The right half of the picture is a magnification of the
41. bit operand b b to b to switches SW3 SWO Connect the 4 bit result f f to f to LED3 to LEDO Connect the carry out signal c to LED7 Verify that your circuit does subtract two 4 bit binary numbers correctly The following table lists some sample numbers that you might want to try The numbers in parenthesis are the corresponding decimal numbers Output unsigned signed Observed Result Operand x Operand y Mer suna Difference f oom 1 o om con omo 1 o 00000 pu Song 9 9 amen Ss omg e 1 o sn Lowe we 0 met __ men me 3 0 so c ome c omm 1 som 2 In the first row of the table for Experiment 1 where you performed 3 2 the unsigned over flow bit is a 1 because you are actually doing 3 2 which is 0011 1110 If you interpret these as unsigned numbers then you are really adding 3 14 17 and 17 cannot be represented as a 4 bit unsigned value 61 www globalspecialties com Combinational Logic Design 3 Implement the circuit shown in Figure 38 Verify that your circuit does either add or subtract two 4 bit binary numbers correctly The following table lists some sample numbers that you might want to try The numbers in parenthesis are the corresponding decimal numbers Observed Output Observed unsigned signed Sum Di
42. d DeMorgan s theorem s theorem Theo rem 13a says that if you take the inverse of x AND y you get the inverse of x OR the inverse of y Similarly for theorem 13b if you take the inverse of x OR y you get the inverse of x AND the inverse of An easy way to remember this is to change all the to and vice versa and change all the prime to no prime and vice versa See Section 3 7 and Lab 1 Experiments 14 and 15 for proofing the correctness of this theorem 3 5 3 Manipulating Boolean Equations Given a Boolean equation we can modify it yet without changing its functional equivalency by applying any of the Boolean axioms and theorems to it For example if we start with the following equation f y xy we can transform it to any of the following intermediate forms and they will all be functionally equivalent f y xy 1 y xy using theorem x x y xy using theorem 9b xy X y xy using distributive theorem 12a xy xy X y using commutative theorem 10b x y using theorem 7b x x y using theorem distributive theorem 12a in reverse 1 e y using theorem 9b yusing theorem 6a 3 5 4 Relationship between Boolean Equations and Combinational Circuits It turns out that every output signal in a combinational circuit can be expressed as a Boolean equa tion and every Boolean equation has a corresponding combinational circuit Figure 16 shows some sample combinational digital c
43. der will produce the correct sum only if the result is in the range from 0 binary 0000 to 15 binary 1111 If the sum of the two numbers is greater than 15 then the overflow bit will be as serted and the resulting sum bits will be incorrect For example 7 12 19 but since 19 is 10011 in binary therefore the four sum bits will be 0011 In order to get the correct result for 7 12 we need to use a 5 bit adder instead Experiments 1 Implement the circuit shown in Figure 34 You will need to have four FA circuits with their 5 and C s connected together Connect the 4 bit operand x x x and x to switches SW7 to SWA Similarly connect the 4 bit operand y y y and y to switches SW3 to SWO Connect the 4 bit sum Sy 5 5 and s to LED3 to LEDO Connect the carry in signal to GND Connect the carry out signal c to LED7 Verify that your circuit does add two 4 bit binary numbers correctly The fol lowing table lists some sample numbers that you might want to try The numbers in parenthesis are the corresponding decimal numbers Note that to be absolutely certain that your circuit works correctly you need to test all possible input combinations Output Operand y eg om _ ww oro iene om ww mas SS woo 1 cente morta 1 __ mes mas 1 2 What happens if the initial car
44. do this elsewhere or on a breadboard you will still have to connect the unused inputs to GND 7 If you need to use a 6 input AND gate you would normally get a 6 input AND gate However you can make a 6 input AND gate by combining a 4 input AND gate with a 2 input AND gate Connect the two outputs from these two AND gates to another 2 input AND gate The circuit for Global Specialties 32 Ch 4 Labs connecting these three AND gates is shown next DID Connect six switches to this 6 input AND gate and connect the output from the second 2 input AND gate to a LED Confirm its operation by recording the LED output for all combinations of the input switches 8 Similarly you can make a 6 input OR gate by combining a 4 input OR gate with a 2 input OR gate Connect the two outputs from these two OR gates to another 2 input OR gate Connect six switches to this 6 input OR gate and connect the output from the second 2 input OR gate to a LED Confirm its operation 9 Implement the circuit in Figure 12 a Connect the three inputs x y and z to three switches and connect the output f to a LED Record the LED output for all combinations of input switches in the blank truth table provided Verify that it operates according to the truth table in Figure 13 d 10 Implement the circuit in Figure 12 b Connect the three inputs x y and z to three switches and connect the two outputs f and g to two LEDs Since the trainer does
45. e ALU circuit One method is to do something similar to what we did with the adder subtractor circuit in Lab 8 by starting out with the basic layout of connecting several full adders FA together in series And just like for the adder sub tractor circuit we will modify the two operand inputs to the FA appropriately so that the FAS will produce the correct results For doing additions and subtractions we will modify the second y operand to the FAs doing something similar to the XOR gate that was used in the adder subtractor circuit but with some slight modifications We will label this sub circuit black box the AE for Arithmetic Extender For doing logical operations we need to do something a little more extensive After all you re member that the FAs can only add numbers and you saw in Lab 8 how you could use the FAs to both add and subtract numbers However the FAs cannot do logical operations so what we will need to do is to have another sub circuit to perform the actual logical operations and then pass the result of the logical operations through the FAs to the output So for logical operations we do not want the FAs to modify the number that is being passed through its first x operand and the way to do this is to have the FAs add a 0 to the number We will label this sub circuit black box the LE for Logic Extender Furthermore depending on the operation that we want to perform the initial carry in signal cy has to be set appropria
46. e four 1 boxes but this time the common value is a 0 so the equation is f z In Figure 23 d there are two subcubes For the size 8 subcube only y has a 0 for all eight of the 1 boxes so the AND term Global Specialties 26 Ch 3 Digital Logic Circuits from this subcube is y For the size 4 subcube w has the value 0 and x also has the value 0 for all four of the 1 boxes The other two variables have different values so the AND term from this subcube is w x The final simplified equation from this will ORed the two AND terms together to give f w x The ordering of the AND terms in the equation does not matter because of the commuta tive property but it is preferred to list the larger subcubes fewer variables in the AND terms first In Figure 23 e there are also two subcubes The size 8 subcube is the same as the previous one so the AND term for this subcube is also y For the size 4 subcube x has a common value of 1 and z hasa common value of 0 so the AND term for this subcube is xz The simplified equation is f y xz In Figure 23 f the size 4 subcube AND term is x z and the size 2 subcube AND term is w xz The simpli fied equation is f 2 x z w xz d e f Figure 23 Simplified equations from the K maps in Figure 20 As an exercise you may want to find the simpli
47. e its operation by deriving its truth table Also derive the Boolean equation for the circuit 9 Implement the following 3 input XOR gate circuit and determine its operation by deriving its Global Specialties 38 Ch 4 Labs truth tabletruth table for it Dop 10 Implement the following 3 input XNOR gate circuit and determine its operation by deriving its truth table X _ y Dop 11 Implement the following 4 input XOR gate circuit and determine its operation by deriving its truth table ew 12 Implement the following 4 input XNOR gate circuit and determine its operation by deriving its truth table I D 39 www globalspecialties com Combinational Logic Design Lab 2 Truth Tables for Reporting Results Experiment 1 Experiment 2 Experiment 5 Experiment 6 3 input XOR Experiment 9 3 input XNOR Experiment 10 Ea E o ES E 4 input Experiment 11 4 input XNOR Experiment 12 Global Specialties Ch 4 Labs 4 3 Lab 3 Designing Combinational Circuits Purpose In this lab you will learn how to design combinational circuits from any given truth table and implement them on the trainer Introduction As you saw in Lab 1 the operation of any combinational circuit can be described formally by a truth table Moreover any given truth table can be implemented with a digital circuit In fact any truth table can be implemented with
48. e other with one for when vis a 0 and the other for when viis a 1 What we put into the intersection boxes in a K map are the 1 output values in the equation or truth table For example if we want to minimize the equation in Figure 19 a the corresponding truth table and K map for this equation is shown in b and c We do not need to include the 0 outputs from the truth table in the K map because we are only interested in when the equation produces a 1 output d Figure 19 a Boolean equation b corresponding truth table c corresponding K map and d K map with subcube formed Having set up the K map and added all of the 1 outputs from the truth table into the K map we are ready to minimize the equation using the K map by forming subcubes We form subcubes by circling adjacent boxes with 1 s in them The following rules must be observed when forming the subcubes 1 All of the 1 boxes must be physically adjacent to each other except for the two ends For the two end boxes such as those in a three and four variable K maps visualize them as also being adjacent to each other because they also differ in only one bit from 00 to 10 2 The size of the subcube i e the number of 1 boxes inside the subcube must be a power of two So you can only have 1 2 4 8 etc number of 1 boxes inside a subcube 3 The shape of a subcube must be a rectangle either horizontally or vertically 4 All of the 1 bo
49. ecimal digit isto be shown on the 7 segment LED display as shown in the Display column of the table in Figure 43 Each LED segment in the 7 segment display has a letter name from a to g given to it as shown in the header of the last seven columns in Figure 43 Hence to display the decimal digit 0 we want segments a b c d e and f to be turned on while segment g is turned off Similarly to display the decimal digit 1 we want only segments b and c to be turned on while the remaining segments are turned off Continuing on in this fashion we obtain the rest of the truth table for the seven individual segments as shown in the last seven columns of the table in Figure 43 The remaining six binary combinations from 1010 to 1111 are not used in the BCD to 7 segment decoder therefore it does not matter what those values are The x symbol is used to denote the don t care value of a variable Inputs Decimal a b C d e f g i i i i Digit Display H z a 0 H 1 1 1 1 1 1 0 ak T 1101011 9 eo eo zu gm En zr eo Rest of the Combinations x x x x x x x Figure 43 Design and truth table for the BCD to 7 segment LED decoder X denotes 0 or a 1 69 www globalspecialties com Combinational Logic Design Having completed the truth table for the decoder we can co
50. edure would be identical The only difference is that instead of substituting the input values into the diagram you would substitute them into the equation Global Specialties Ch 3 Digital Logic Circuits 3 6 Simplifying Combinational Circuits Notice that the truth table in Figure 14 b is exactly the same as the truth table for a 3 input NAND gate shown in Figure 11 a What this means is that functionally the 3 input NAND gate operates exactly the same as the circuit in Figure 14 a but obviously the 3 input NAND gate is much smaller in size Hence if we want just the functionality of the circuit in Figure 14 a we should implement it by using a 3 input NAND gate This way we will have a much smaller circuit but having the same functionality In section 3 5 3 we also saw how we use the Boolean axioms and theorems to transform the equa tion f y xy to a much simpler but functionally equivalent equation f y There are different formal methods for simplifying combinational circuits These include the use of Boolean algebra Karnaugh maps or K maps for short and tabulation methods Using Boolean Theorems and Boolean algebra is the theoretical method whereas using K maps is a visual method K maps are easier to understand but only works for very few inputs maybe five at most In practice there will be much more than five input variables Tabulation methods are best suited for program ming the computer and they work for any n
51. esign digital logic circuits you need to know how these gates operate Experiments 1 The three thick lines in Figure 2B show three wires connected from the two switches SW6 and SW7 to the inputs of the 2 input AND 12 gate 4 and the output of this AND 5 gate is connected to LED6 Using three pieces of hook up wires make these same connections now on your trainer Slide the two switches up and down and record the output on LED6 for all combinations of the input switches in the blank truth table provided at the end of this lab Remember that when the switch is in the up position it is a logic 1 and when it is in the down position it is a logic 0 Verify that your results match the AND logic truth table shown in Figure 7 a Page 10 2 After you have confirmed that the AND gate does work according to the truth table repeat the experiment with the 2 input OR gate Connect the two switches to the inputs of a 2 input OR gate and connect the output from the OR gate to the LED Slide the two switches up and down and record the LED output for all combinations of the input switches in the blank truth table provided Verify that your results match the truth table in Figure 7 b 4 Remember that we will be using notations such as 2 AND 12 to refer to specific gates on the trainer for ease of debugging Note that it doesn t have to be that specific 2 input AND gate Any 2 input AND gate would work also 31 www globalspecialties com Combinat
52. fference f Result overflow overflow Fo wm 9 fo come wm see Fo wwe wmm fo Fo wwe wn 9 ome Fo wen ow m Lo sens wwe fo fo mo fo emm mem 3 Po em p xem 3 Pomme ome 3 oy o p mem 3 99 e ewe 3 i wwe we 3 Fi wwe wwe e Li sens wwe m i sens wem fo 9 iom poem 3 1 pm s 3 wm omen 3 999 wm e l Global Specialties 62 Ch 4 Labs 4 10 Lab 10 2 bit Arithmetic and Logic Unit ALU Purpose In this lab you will learn about the Arithmetic and Logic Unit ALU This is the main component inside the microprocessor for performing simple logical and arithmetic operations The logical opera tions are like those of the basic logic gates such as the AND OR and NOT The arithmetic operations are just simple additions and subtractions More complex arithmetic operations such as multiply and divide are done in other dedicated components You will design a 2 bit ALU implement the circuit and verify its operations Introduction Like with most circuits there are many ways of designing th
53. fied equations from the K maps shown in Figure 22 These equations are a f y b f xy xz Qf xy yz d f z w x e f w y xy wxz wx yz f f w oy w oy The simplified equation obtained from a K map may not necessary be the smallest possible equa tion After having obtained the simplified equation from a K map you may be able to reduce it even further using Boolean algebra 27 www globalspecialties com Combinational Logic Design 3 7 Synthesis of Combinational Circuits In the synthesis of combinational circuits we are first given either an informal description of the circuit s operation or a formal description with a truth table If we start with an informal description then we need to first construct the formal truth table for it From the truth table we can derive the Boolean equation for it Next we can optionally simplify the equation And finally from the simpli fied equation we can derive and implement the circuit Deriving the equation from a given truth table is actually quite straight forward There will be one equation created for each output signal in the circuit The steps to create an equation for one output signal are as follows 1 Create an AND term for each row in the truth table where the output signal is a 1 Each AND term is created as follows For that one row of input values a If the value for an input variable is a 1 then use that variable as is b If the val
54. g the two inputs of a 2 input XOR gate to two switches and the output to an LED Determine its operation by recording the LED output for all combinations of the two input switches in the blank truth table provided Verify that it matches the truth table in Figure 9 c 4 Implement the following circuit and determine its operation by deriving its truth table Verify that this truth table is the same as that for the XOR gate Also derive the Boolean equation for the circuit 37 www globalspecialties com Combinational Logic Design 5 The 2 XNOR gate is the inverse of the 2 input gate Implement 2 input XNOR gate by connecting the output of a 2 input XOR gate to a NOT gate Connect the two inputs of the XOR gate to two switches the output of the XOR gate to the input of the NOT gate and finally the output of the NOT gate to an LED Determine its operation by recording the LED output for all combinations of the two input switches in the blank truth table provided Verify that it matches the truth table in Figure 9 d 6 Implement the following circuit and determine its operation by deriving its truth table Verify that this truth table is the same as that for the XNOR gate Also derive the Boolean equation for the circuit 7 Implement the following circuit and determine its operation by deriving its truth table Also derive the Boolean equation for the circuit 8 Implement the following circuit and determin
55. hat this binary number represents an unsigned number then the decimal value of this number would be 01101001 0 x 27 1 x 25 1 x 2 0 x 2 1x 2 0x 2 0 21 1 x 2 1 x 2 1 x 2 1 x 23 1 x 2 64 32 8 1 105 in decimal Notice that the power x used in 2 denotes the position of the bit in the binary number The first bit of the binary number starting from the right hand side is position 0 the second bit to the left is position 1 etc If you say that this same binary number 01101001 represents a signed number then the decimal value of this number would be evaluated differently For signed numbers the most significant bit MSB which is the left most bit tells whether the number is positive or negative If the most signifi cant bit is a 0 then the number is positive and the value of this positive signed number is obtained exactly as for unsigned numbers So if we interpret 01101001 as a signed number we would get the same decimal value 105 However if the most significant bit of a signed number is a 1 then the number is negative and we use what is referred to as the two s complement method to determine its value The 25 complement is a method for representing negative or signed numbers and it involves three steps to determine the value In step 1 you flip all the 1 bits in the binary number to 0 and all the 0 bits to 1 s In step 2 you add a 1 to the result obtained from s
56. he three inputs 5 d and d to three switches and connect the output y to an LED 7 For an in depth discussion on how to simplify Boolean equations and circuits refer to the book Digital Logic and Microprocessor Design with VHDL by E Hwang 45 www globalspecialties com Combinational Logic Design 2 Design the 2 to 1 mux circuit based on the truth table shown in Figure 28 c and without any simplifications Implement your circuit and confirm that it operates according to the truth table 3 A larger size is a 4 to 1 where there are four data inputs d d d and d In order to select one of the four data inputs two select lines s and s are needed When 5 5 00 data from d is passed to the output when s s 01 data from d is passed to the output when s s 10 data from d is passed to the output and When 5 5 11 data from d is passed to the output Design a 4 to 1 mux circuit by first deriving the truth table and equation With six inputs 5 Sy dy d d and dy the truth table will have 2 64 rows am sure you don t want to write out this entire table An easier way to reduce the size of the truth table is to not have the d input columns but instead write out the d s as entries under the output column Using this method the 2 to 1 mux truth table shown in Figure 28 c reduces to From this simplified truth table we can immediately obtain the simplified equation y s d sd Appl
57. ional Logic Design 3 Repeat the experiment with the NOT gate Connect one switch to the input of a NOT gate and connect the output from the NOT gate to a LED Record your results in the blank truth table provided Verify that your results match the truth table in Figure 7 c 4 Repeat the experiment with the 4 input AND gate and the 4 input OR gate Record your results in the blank truth tables provided 5 If you need to use a 3 input AND gate you would normally get a 3 input AND gate However you can also use 4 input AND gate instead by connecting the unused 4 input to a logic 1 Re member that connecting to VCC will always give you a logic 1 On the trainer the VCC connection points are located next to the GND connection points at the bottom right corner For this experiment connect three switches to three inputs of a 4 input AND gate connect the 4 input of the AND gate to VCC and connect the output from the AND gate to a LED Slide the three switches up and down and record the LED output for all combinations of the input switches in the blank truth table provided Verify that your results match the truth table in Figure 11 b page 12 What happens if you connect the extra input of the 4 input AND gate to GND instead of VCC For ease of use all of the 4 input AND gates in the trainer have pull up resistors connected to all of its inputs What this means is that you do not have to actually connect any unused inputs of the 4 i
58. ircuits with there corresponding Boolean equation In Figure 16 g and h the Boolean equations for the XOR and XNOR gates are not so obvious because they are actu ally derived from their corresponding truth tables Experiments 4 and 6 of Lab 2 show that these two gates are equivalent in operation to the two circuits in Figure 16 e and f respectively hence the equations are identical To derive the Boolean equation for larger combinational circuits it is easier 19 www globalspecialties com Combinational Logic Design to annotate the circuit at the output of each gate with their intermediate expression until you reach the final output Two examples are shown in Figure 16 i and j x Xy y xytz 2 f f xy z a f xy c x xy xy y xy f xy xy e 5 2 7 9 x Xy D WEN AME f 2xy xy z f i 2 ra yz b jou f d xy x y f f 2 xy xy f f xy x y h xy Xytz NS Gortz GG 2 f 7 xyG Qy z f xy z xy z y xy 2 9 Figure 16 Sample combinational digital circuits and their corresponding Boolean equation Since there is a direct relationship between a combinational circuit diagram and its correspond ing Boolean equation therefore we can also easily derive the truth table from the equation instead of from the circuit diagram The proc
59. ircuits without a feedback loop are combinational circuits The circuit in Figure 12 c because of the feedback loop makes it a sequential circuit Be careful however that in larger sequential circuits the feedback loop can go through many gates and not just two as shown in Figure 12 c There might also be more than one feedback loop within a circuit but as long as there is at least one loop the circuit is a sequential circuit This is the only distinction between a combinational circuit and a sequen tial circuit Hence it is very easy to tell whether a given digital circuit is a combinational circuit or a sequential circuit 3 4 Analysis of Combinational Circuits Analyzing a circuit means to determine its functional operation In analyzing a combinational circuit we are given a combinational circuit and we want to find out how it operates The functional operation of a combinational circuit is described formally with a truth table and you have already seen several truth tables for the basic logic gates So in the analysis of combinational circuits what we want to do is to derive the truth table for a given combinational circuit As an example let us analyze the combinational circuit in Figure 13 c The first step in the analysis process is to set up the truth table for it First we list all of the primary inputs found in the circuit one input per column followed by all of the primary outputs found in the circuit again one output
60. irst come up with the truth table for each of these three circuits and then from the truth tables we can derive the circuits for them We start with the operational specifications for our ALU as shown in Figure 40 a Note that the assignment of which operation is assigned to which selection combination is arbitrary So for the combination 5 5 00 we will perform the addition of A B And just like for the adder subtractor circuit we want the first operand to the FA to be A and the second operand to the FA to be B thus the LE will output a the 7 bit of A and the AE will output b the 7 bit of B Recall from the adder subtractor circuit that for addition we want the initial carry in to be a 0 hence CE will output a 0 For the combination s s 01 we will perform the subtraction of A B Recall from the adder sub tractor circuit that for subtraction we need to invert the second operand B and then add a 1 through the initial carry in c Hence the AE will output 6 and the CE will output a 1 Global Specialties 64 Ch 4 Labs sso are EN Pa Hc o 1 Semen 1 1 9 RANDE sAND amp ow o m Le Q 5 n b c d Figure 40 ALU operations a function table b LE truth table c AE truth table d CE truth table For the two logical operations the actual operation will be performed in the LE so the LE will out
61. itions The OR gate on the other hand is like connecting two binary switches together in parallel as shown in Figure 6 b In order for a signal to travel from the input to the output either one or both of the switches have to be turned on A signal is prevented from getting from the input to the output only if both switches are turned off Note however that when both switches are turned on the out put signal is not doubled but is the same as having only one switch turned on Using the convention of a 1 meaning on and a 0 meaning off 1 and assuming that the input 1 This familiar convention is referred to as active high In practice the active low convention is sometimes used where a 1 means off and a 0 means on 9 www globalspecialties com Combinational Logic Design has a 1 then the AND gate will output a 1 only when both switches are turned on i e both switches are 1 s otherwise the output will be a 0 Since we assume that the input is always a 1 therefore we are only interested in the status of the two switches x and y that is whether they are a 1 on or a 0 off For the OR gate and having a 1 input the output is a 1 when either one or both of its switches are turned on i e either one or both of the switches is a 1 otherwise the output will be a 0 Again we assume that the input is always a 1 and so we are again only interested in the status of the two switches whether they are a 1 on ora 0 off
62. lexer is used to channel data from multiple sources to one destination You will design multiplexer circuits and implement them on the trainer Introduction Multiplexer also known as a mux is a frequently used component in a digital circuit They are used to pass data from multiple sources to one destination An analogy of its operation is like a railroad switch where two rail tracks are merged into one track Depending on the switch setting trains from either one of the two tracks are directed onto the one track The logic symbol for a 2 to 1 mux is shown in Figure 28 a It has two inputs labeled d and d and one output labeled y Instead of pass ing trains data is passed from either input d or d to the output y depending on the select line s If the value of s is 0 then the data from input d is passed to the output and if the value of s is 1 then the data from input d is passed to the output The simplified circuit for the 2 to 1 mux is shown in Figure 28 b The truth table and the equation are shown in Figure 28 c and d do 5 y d b y s d d s dd sdd sd d 0 100 s d d d sd d dj s d sd c d Figure 28 A 2 to 1 multiplexer a logic symbol b circuit c truth table d equation Experiments 1 Implement the simplified 2 to 1 mux circuit as shown in Figure 28 b and confirm that it oper ates according to the truth table shown in Figure 28 c Connect t
63. lspecialties com Combinational Logic Design 3 Design and implement a 2 bit ALU having the following functions s 5 Operation Name Operation a Fo i 0 ANANDE 4 Design a 4 bit ALU having the following functions 5 5 Operation Name Operation Fo Ja o AB 1 0 semet 1 1 movement Taio 5 Design a 4 bit ALU having the following functions Global Specialties s s s Name operaio o Passamos o 1 arion o 1 0 suiracton o 1 1 increment 1 o peremen 1 o 1 AANDE ft 68 Ch 4 Labs 4 11 Lab 11 BCD to 7 segment LED Decoder Purpose In this lab you will learn how to construct a Binary Coded Decimal BCD to 7 segment LED display decoder circuit This circuit converts a 4 bit binary number to cause a 7 segment LED display to show the corresponding decimal digit You will implement the circuit and verify its operation Introduction BCD is the name given for the 4 bit binary representation of the ten decimal digits Only the first ten combinations of the 4 bit binary number from 0000 to 1001 are used as shown in the first two columns Inputs and Decimal Digit of the table in Figure 43 For each one of these ten binary combi nations the corresponding d
64. ly indicates an overflow for unsigned numbers Whether you want to consider the status of the unsigned overflow bit or the signed overflow bit depends on how you want to interpret the input numbers If you want to interpret your input numbers as unsigned numbers then you need to only look at the unsigned overflow bit to determine whether there is an overflow or not On the other hand if you interpret your input numbers as signed numbers then you need to only look at the signed overflow bit The complete detailed schematic diagram for the 4 bit subtractor circuit is shown in Figure 36 unsigned _ overflow LED74 4 signed _ overflow LED6 Figure 36 The complete detailed 4 bit subtractor circuit 59 www globalspecialties com Combinational Logic Design In Figure 36 the XOR gate for generating the signed_overflow signal has been replaced by a 4 in put OR gate two 4 input AND gates and two NOT gates Recall from Lab 2 Experiment 4 that this circuit is equivalent to a XOR gate The only reason for doing this is that we have used up all of the XOR gates on the trainer Adder Subtractor Circuit One enhancement that we can make to the subtractor circuit is to replace the NOT gates with 2 input XOR gates One input to the XOR gate is connected to the second operand just like with the NOT gate but the second input to all of the XOR gate are connected to a common select signal s as shown in Figure 37 Unsigned Overflo
65. m Section 4 6 Lab 6 Section 4 7 Lab 7 Full Adder esses Section 4 8 Lab 8 4 bit Section 4 9 Lab 9 4 bit Adder Subtractor Section 4 10 Lab 10 2 bit Arithmetic and Logic Unit ALU Section 4 11 Lab 11 BCD to 7 Segment LED Decoder Page 31 Global Specialties Ch 1 Combinational Logic Design Trainer Chapter 1 Combinational Logic Design Trainer The Combinational Logic Design Trainer that you have contains all of the necessary tools for you to easily implement many combinational digital logic circuits Combinational logic circuits are one major type of digital circuits found inside microprocessors The layout of the trainer is shown in Figure 1 DL 010 COMBINATIONAL LOGIC TRAINER 9 V 300 mA Global Specialties Bo ar J Y ele alae Sub poe YCOONE Cocca 28800 E C CE CD 2 C 3 Teja a080 Ty SEDED CREER C C02 02 EL CD E CS S 03 BEE HEECECHOEGEBEBEBEBOE x a B a a a E a a a B B E E E E E x benng J quan A 1001010101 LED7 LED6 LED5 LED4 LED2 LEDI LEDO Segment Display ABCDEFG s E E B ee GERACE SW7 SW6 SW5 SW4 SW3 SW2 SW1 SWo Figure
66. nal circuit by selecting the 71 www globalspecialties com Combinational Logic Design rows in the truth table where the output is a 0 instead of a 1 and then inverting the final output By doing this you might get a smaller circuit Use this method to design the circuit for the truth table in Figure 43 Do you get a smaller circuit than the one in Figure 44 4 Instead of the BCD to 7 segment decoder where only ten of the 16 combinations are used we can build a complete 4 bit to 7 segment hexadecimal LED display decoder where we decode all of the 16 combinations of the 4 bit binary number Figure 45 shows the initial design table Complete the design of this 4 bit to 7 segment hexadecimal LED display decoder circuit and implement it Decimal e PERRE Display Digit r H Hr H F b TET ee M E B E E g Figure 45 Design of the 4 bit to 7 segment hexadecimal LED display decoder Global Specialties 72 73 Ch 4 Labs www globalspecialties com
67. not have a NAND gate you will need to use an AND gate and a NOT gate to get the same functionality as the NAND gate This is accomplished by connecting the output of an AND gate to the input of a NOT gate Determine its operation by deriving its truth table Record LED outputs in the blank truth table provided 11 Implement the following circuit and determine its operation by filling out the truth table pro vided Recall from experiments 5 and 6 on how to get a 3 input gate from a 4 input gate Connect the three inputs x y and z to three switches and connect the output f to an LED Determine its operation by deriving its truth table Also derive the Boolean equation for the circuit 12 Implement the circuit in Figure 12 c and determine its operation by deriving the truth table and recording it Notice that for the input combination y 1 and z 0 sometimes the output is a 0 and sometimes the output is a 1 This is because of the loop back that is causing a memory effect You will learn more about this in sequential circuits 13 Implement the circuit in Figure 12 d Connect a wire from the output of the AND gate to the input of the OR gate and connect another wire from the output of the AND gate to the output of 33 www globalspecialties com Combinational Logic Design the NOT gate Determine its operation by deriving the truth table for it Is there anything wrong with the results 14 DeMorgan s theorem 13a states that x y
68. nput AND gates to VCC and it will still work Verify this by disconnecting the wire that connects from the 4 input to VCC and see that it still works as before Keep in mind that this is only true for this trainer and if you do this elsewhere or on a breadboard you will still have to connect the unused inputs to VCC 6 If you need to use a 3 input OR gate you would normally get a 3 input OR gate However you can also use a 4 input OR gate instead by connecting the unused 4 input to a logic 0 Remember that connecting to GND will always give you a logic O For this experiment connect three switches to three inputs of a 4 input OR gate connect the 4 input of the OR gate to GND and connect the output from the OR gate to a LED Slide the three switches up and down and record the LED output for all combinations of the input switches in the blank truth table provided Verify that your results match the truth table in Figure 11 c What happens if you connect the extra input of the 4 input OR gate to VCC instead of GND For ease of use all of the 4 input OR gates in the trainer have pull down resistors connected to all of its inputs What this means is that you do not have to actually connect any unused inputs of the 4 input OR gates to GND and it will still work Verify this by disconnecting the wire that connects from the 4 input to GND and see that it still works as before Keep in mind that this is only true for this trainer and if you
69. ntinue with the design by deriving the equations and drawing the circuits for each of the seven segments As discussed in Lab 2 given any truth table we can produce a circuit for it by simply ANDing the inputs of a row for which the output of that row is a 1 and then ORing the outputs of all the AND gates together Looking at the column in the truth table for segment a we note that there are eight 1 s Hence we obtain the fol lowing Boolean equation a i i i i slot ty FE 35 hU L L LE L LEIL 3210 3 219 abbi ETE iii T 3 210 h lg LET 3 2 1 0 To implement the circuit for segment a based on this equation would require four NOT gates eight 4 input AND gates and one 8 input OR gate However we can get a much smaller circuit by sim plifying the equation The K map for simplifying the Boolean equation for segment a is shown next 1 T if VLL XN The x s are also placed in the K map Each x can either be considered as a 1 if it helps to make a larger subcube or it can be considered as a 0 and be ignored if it doesn t help to make a larger sub cube In this K map for segment a all of the x s are taken to be a 1 From evaluating the above K map for segment a we obtain the following simpler equation for segment a a i i tii 1 SA Oi Proceeding in a similar manner we get the following remaining six simplified eguations for seg ments b c d e f and g
70. ntroller reads and accepts your credit card and let you pump your gas When you walk up to your office building a sensor senses your presence and informs a microcontroller to open the glass door for you You press button eight inside the elevator and a microprocessor controls the elevator to take you up to the 8 floor During lunch break you stop by a gift shop to buy a musical birthday card for a friend and find out that the birthday song is being generated by a microprocessor that looks like a dried up pressed down piece of gum inside the card can continue on with this list of things that are controlled by microprocessors but think you got the idea Oh one last example do you know that it is also a microprocessor that is at the heart of your personal computer whether it is a PC or a Mac That s right the Intel Duo Core CPU inside a PC is a general purpose microprocessor So you see microprocessors are at the heart of all smart devices whether they be electronic de vices or otherwise and their smartness comes as a direct result of the decisions and controls that the microprocessors make In this three part award winning series on microprocessor design training kits you will learn how to design and actually implement real working custom microprocessors Designing and building microprocessors may sound very complicated but don t let that scare you because it is not really all that difficult to understand the basic principles of how micro
71. ogic gates the most complex microprocessor circuit can be built Logic gates are built from transistors the fundamental active component for all digital logic cir cuits Transistors are just binary switches that can be turned on and off The two binary values 1 and 0 are used to represent the on and off states of a transistor usually a 1 means on or having volt age and a 0 means off or no voltage In operation a transistor is like your light switch on the wall where you can either turn it on or off When you turn on the light switch current flows through the switch and the light comes on Physically transistors are of course much smaller than your light switch 3 1 1 AND OR and NOT Gates An analogy for the operation of the AND gate is like connecting two binary switches together in series as shown in Figure 6 a In the diagram the signal flows from the input on the left hand side to the output on the right hand side through the two switches x and y In order for a signal to travel from the input to the output both switches have to be turned on i e connected If either one or both switches are turned off then a signal would not be able to get from the input to the output switch x switch x switch y NM a4 Tm switch y t input o gt output inpu lt outpu a b Figure 6 Two possible connections of two binary switches a in series b in parallel In both dia grams the switches are in their off pos
72. or more gates cannot be con nected to the same input of the same gate 4 Primary inputs which are inputs from external devices such as switches and push buttons are always connected to the inputs of various gates Global Specialties 12 Ch 3 Digital Logic Circuits At this point we will focus on the logical aspects of designing the digital circuit itself and not on how the external devices are connected to the primary inputs and primary outputs For our imple mentation and testing purposes we will connect the primary inputs to switches and buttons that will simply produce a 0 or a 1 and connect the primary outputs to simple LEDs that will be turned on when there is a 1 and turned off when there is a 0 Figure 12 are schematic drawings of some very simple digital circuits c d Figure 12 Sample digital circuits a combinational circuit b combinational circuit with one output connected to two inputs c sequential circuit d invalid circuit with two outputs connected to the same input In Figure 12 a the circuit has three primary inputs x y and z from the external world i e the user supplies either a 0 or a 1 to each of these three inputs x and y are connected to the inputs of the AND gate and z is connected to one input of the OR gate The output of the AND gate is connected to the second input of the OR gate Finally the primary output of the circuit is f which is from the out put of the OR gate Signals either
73. per column These columns are labeled with the names of the inputs and outputs Since the circuit in Figure 13 c has three input variables x y and z and one output variable f therefore we obtain a Global Specialties 14 Ch 3 Digital Logic Circuits table having four columns with the four variable names as shown in Figure 13 a In the second step we enumerate all possible combinations of 0 and 1 s for all of the input variables For three vari ables we will have 2 8 different combinations In general for a circuit with n input variables there will be 2 combinations going from 0 to 2 1 We will insert a row for each combination into the table Figure 13 b shows the eight rows with the eight sets of input values in binary counting order Figure 13 Deriving a truth table for a combinational circuit a Step one create a column for each input and output b Step two enumerate all possible combinations of 0 s and 1 s for the inputs c Step three for each set of input values trace through the circuit to determine the output value The top circuit is annotated with the first set of input values and the bottom circuit is annotated with the second set of input values d the completed truth table The third and final step is to fill in the values for the output column s For each row in the table that is for each set of input values we need to determine what the output value is This is done by first substituting each set
74. processors are designed After you have learned the materials presented in these labs you will have the basic knowledge of how microprocessors are designed and be able to design and implement your very own custom microprocessors There are generally two types of microprocessors general purpose microprocessors and dedicated microprocessors General purpose microprocessors such as the Intel Pentium CPU can perform dif ferent tasks under the control of software instructions General purpose microprocessors are used in all personal computers Dedicated microprocessors also known as microcontrollers on the other hand are designed to perform just one specific task So for example inside your cell phone there is a dedicated micropro cessor that controls its entire operation The embedded microprocessor inside the cell phone does nothing else but controls the operation of the phone Dedicated microprocessors are therefore usu ally much smaller and not as complex as general purpose microprocessors Although the small dedi 5 www globalspecialties com Combinational Logic Design cated microprocessors are not as powerful as the general purpose microprocessors they are being sold and used in a lot more places than the powerful general purpose microprocessors that are used inside personal computers The electronic circuitry inside a microprocessor is called a digital logic circuit or just digital circuit as opposed to an analog circuit Digit
75. put the result of the respective logical operation So for the combination 5 5 10 where the ALU will perform the logical AND operation the LE will output the result of a AND b Similarly for the combination s s 11 where the ALU will perform the logical OR operation the LE will output the result of a OR For all logical operations we do not want the FAs to add anything so the AE which outputs to the second operand of the FA should output a 0 Similarly the CE should output a 0 So from the above analysis we are able to come up with the three truth tables for the LE AE and CE as shown in Figure 40 b c and d respectively Given these three truth tables for the LE AE and 65 www globalspecialties com Combinational Logic Design CE you should now be able to derive their respective circuits Try to first work it out on your own before looking at the solutions given in Figure 41 Note that you may come up with a different circuit from what is given in Figure 41 but that doesn t mean that you are wrong because there can be many different possible solutions for the same truth table The complete 2 bit ALU circuit for performing the four operations is shown in Figure 42 b 1 1 b c Figure 41 ALU extender circuits a logic extender LE b arithmetic extender AE c carry extender CE SW3 SWI SW2 SWO SW7 SW6 s LED3 unsigned overflow overflow Figure 42 The complete 2 bit
76. r is the fact that in mathematics you normally work with deci mal numbers which use the digits from 0 to 9 but in Boolean algebra we work with binary numbers which use only the two binary digits 0 and 1 Another main difference between the two is that in mathematics there are four operations add subtract multiply and divide that you perform on the constants and variables but in Boolean algebra there are only three operations AND OR and NOT With the reduced number of constants and operations you can guess that Boolean algebra should be much simpler and it is 3 5 1 Expressions and Equations When writing Boolean expressions or Boolean equations we use the symbol e or no symbol at all for the AND operation the symbol for the OR operation and the symbol or for the NOT opera tion Here are two simple examples of Boolean equations 0 x 0 reads 0 AND x is equal to 0 and Global Specialties 16 Ch 3 Digital Logic Circuits 0 10r 0 1 reads NOT 0 is equal to 1 Another example is f x yz which reads f is equal to x OR y AND NOT z First of all notice that these Boolean equations are written just like mathematical equations except that the symbol is not for addition but for the OR operation and the e symbol is not for multiplication but for the AND operation Second notice that the e symbol for the AND operation can be removed just like the multiplication in math so y x can be written as yx Third the
77. ry in signal c is connected to a 1 instead of a 0 3 How would you expand this 4 bit adder circuit to be an 8 bit adder circuit 4 When you add 7 0111 plus 12 1100 you get a 1 for c_ and the sum s is actually a 3 0011 What do you need to do in order to actually get the correct binary value in the Sums output when you add 7 12 5 How many bits do you need for an adder in order to produce the correct result for adding 16 16 and Global Specialties 56 Ch 4 Labs 4 9 Lab 9 4 bit Adder Subtractor Purpose In this lab you will learn about a 4 bit adder subtractor circuit This 4 bit adder subtractor circuit is for both adding and subtracting two 4 bit binary numbers producing either a 4 bit sum or difference You will implement the circuit and verify its operations Introduction It turns out that with very minimal modifications to the 4 bit adder circuit from Figure 33 b you can get it to subtract numbers as well This simple and elegant solution is a direct result of how nega tive numbers are represented inside computers Negative Binary Numbers Binary numbers can be interpreted as either signed or unsigned Unsigned numbers include only positive numbers and zero whereas signed numbers include positive negative and zero Given a binary number such as 01101001 the computer does not know whether it is a signed or unsigned number It is up to you the designer to decide how you want to interpret it If you say t
78. s in deed correct by performing the three step process again Subtractor Circuit Now that we understand how negative numbers are represented we are ready to design the subtractor circuit We know from algebra that subtracting a positive number is the same as adding the negative of the number So using this fact we can use the 4 bit adder to do subtraction simply by changing the second number to its negative equivalent In other words we simply perform the first two steps flip the bits and add a 1 in the 2 s complement process to convert the second number to its negative value and then pass this negative number to the adder circuit The interesting trick is that these two steps can be easily done at two different places in the circuit First we can flip the bits by using a NOT gate for every bit of the second number Second remember that setting c to a 1 in the FA adds an extra one to the sum and since the addition of a 1 can occur anytime during the ad dition process therefore we can add the 1 simply by setting c to a 1 instead of the original 0 Hence we obtain the subtractor circuit shown in Figure 35 Global Specialties 58 Ch 4 Labs Unsigned _ Overflow Signed Overflow Figure 35 The 4 bit subtractor circuit Notice that there is an extra XOR gate whose inputs are connected to c and c The output from this gate indicates whether there is an overflow or not for signed numbers The c signal alone on
79. sed more than the AND gate because it requires only four transistors whereas the AND gate requires six transistors to implement Furthermore it turns out that all digital logic circuits can be built using only the NAND gate Experiments 1 As you recall the operation of the NAND gate is the inverse of the AND gate If you need to use a 2 input NAND gate you would normally get a 2 input NAND gate but since our trainer does not have any NAND gates therefore we need to implement it by connecting a 2 input AND gate to a NOT gate as shown next ss Connect the two inputs of the AND gate to two switches the output of the AND gate to the input of the NOT gate and finally the output of the NOT gate to an LED Determine its operation by recording the LED output for all combinations of the two input switches in the blank truth table provided Verify that it matches the truth table in Figure 9 a Page 11 2 The NOR gate is the inverse of the OR gate Again we can implement a 2 input NOR gate by using a 2 input OR gate followed by a NOT gate Connect the two inputs of the OR gate to two switches the output of the OR gate to the input of the NOT gate and finally the output of the NOT gate to an LED Determine its operation by recording the LED output for all combinations of the two input switches in the blank truth table provided Verify that it matches the truth table in Figure 9 b 3 Verify the operation of the 2 input XOR gate by connectin
80. see fis a 0 for all values of x and y except for when both of them are a 1 then f is a 1 a b c Figure 7 Truth tables for the a AND gate b OR gate c NOT gate In these truth tables x and y are the inputs and f is the output The truth table for the OR gate is shown in Figure 7 b The binary switch analogy for the OR gate shows that the output is a 0 only when both of the switches are a 0 off Hence f is a 0 only when both x and y are O s otherwise f is a 1 Global Specialties 10 Ch 3 Digital Logic Circuits The truth table for the NOT gate is shown in Figure 7 c Notice that the NOT gate only has one input x When the input x is a 0 then the output f is a 1 and when x is a 1 then the output f is a 0 3 1 3 Logic Symbols When drawing digital circuit diagrams also referred to as schematic diagrams we use logic sym bols to represent these gates The logic symbols for the AND OR and NOT gates are shown in Figure 8 x and y are the inputs to these gates and fis the output DI DI De y y a b c Figure 8 Logic symbols for the a AND gate b OR gate and c NOT gate x and y are the inputs and f is the output 3 1 4 NAND NOR XOR and XNOR Gates As mentioned before any digital circuit no matter how complex they may be can be built using these three types of basic gates However there are several other gates that are derived from the AND OR and NOT gates that are also used frequentl
81. size 2 Furthermore rule 4 says that a 1 box can be inside one or more subcubes Having formed the subcubes for covering all of the 1 s in the K map the final step is to write up the reduced equation Each subcube becomes one AND term in the equation and all of the AND terms will be ORed together to produce the final simplified equation For each subcube write down the variable s having the same value for all of the 1 boxes in that subcube If the value is a 0 then ne gate the variable and if the value is a 1 then just leave the variable as is All of the variables obtained from the same subcube are ANDed together to form one AND term Figure 23 shows the simplified equations as obtained from the K maps in Figure 20 The K maps are redrawn here for convenience In Figure 23 a the value of x for both of the 1 boxes is 0 but the value of y is a 0 for the left 1 box and a 1 for the right 1 box Hence there is only one variable x that has the same value a 0 for all of the 1 boxes therefore this AND term will consist of just one variable x The final reduced equation from this is f x In Figure 23 b the value of x is a 0 for the top two 1 boxes and a 1 for the bottom two 1 boxes The value of y is a 0 for the left two 1 boxes and a 1 for the right two 1 boxes Only the value of z for all four 1 boxes is a 1 Hence the simplified equation from the K map is f z In Figure 23 c again only z has the same value for all of th
82. tely In the design this is done by the Carry Extender CE black box Select lines are needed to tell the ALU which one of several operations to perform If we want the ALU to be able to perform four operations we will need two select lines s and 5 because two bits will give four different combinations 00 01 10 and 11 Since the outputs of the LE AE and CE are dependent on which operation we want to perform therefore the select lines are also inputs to these three boxes 63 www globalspecialties com Combinational Logic Design Unsigned _ Overflow Signed _ Overflow Figure 39 The 2 bit ALU circuit The overall circuit for the 2 bit ALU is shown in Figure 39 If you compare this circuit with the ad der subtractor circuit in Figure 35 b you will see that they are very similar except for the three added black boxes LE AE and CE And just like with the adder subtractor circuit to add more bits to the ALU you simply have to add more of the FA bit slices What we now need to do is to come up with the three circuits for the LE AE and the CE The con structions of these circuits of course will be dependent on what operations we want to implement and the way to do it is the same as designing any other combinational circuits As an example we will design an ALU that can perform four operations addition subtraction AND and OR Following the steps for designing a combinational circuit as outlined in Lab 2 we will f
83. tep 1 Finally for step 3 interpret the binary number obtained in step 2 as an unsigned number and determine its value The negative of this resulting value is the value of the original negative signed number 10 sometimes two s complement is also written as 2 s complement 57 www globalspecialties com Combinational Logic Design For example if we say that the binary number 11101001 represents a signed number then we would have to do the following to determine its value First we note that the MSB is a 1 so we know that it is a negative number To determine the value of a negative number we perform the three steps for the 2 s complement process Starting with this number 11101001 Step 1 flip the bits 00010110 Step 2 add a one to the number from step 1 00010111 Step 3 determine the value of the number from step 2 1 x 24 1 x 2 1 x 2 1 x 2 16 4 2 1 23 Therefore the value for the signed number 11101001 is 23 To find the 2 s complement binary representation of a negative number we start with the positive binary representation and then perform only the first two steps in the process For example to find the 255 complement binary representation for 35 we start with the binary representation for 35 Starting with 35 00100011 Step 1 flip the bits 11011100 Step 2 add a one to the number 11011101 Therefore 11011101 is the 255 complement representation for 35 You can verify that this i
84. ue for an input variable is a 0 then negate NOT the variable c All of the variables from a and b above for that one row are ANDed together to form one AND term 2 All of the AND terms created in step 1 above are ORed together to produce the final equation Once we have the equation we can easily derive the circuit for it as shown in Section 3 5 4 Thus given any truth table we can produce a circuit for it by simply ANDing the inputs of a row for which the output of that row is a 1 and then ORing the outputs of all the AND gates together If the truth table has two or more output variables then you repeat the same process creating one equation for each output variable Let us now synthesize the circuit for the truth table shown in Figure 24 a It has two inputs x and y and one output f f x y xy x b c Figure 24 Synthesis example a truth table b equation and c synthesized circuit We see that there are two rows where f has a 1 so we will have two AND terms one for each row 3 As in when your supervisor gives you a verbal imprecise description of a circuit that he or she wants Global Specialties 28 Ch 3 Digital Logic Circuits In the first row where f has a 1 the value for x is 0 so we negate the variable x to get x In the same row the value for y is 1 so we don t need to change it The AND term for this first row is therefore x y Continuing on in the same manner in the second row where
85. umber of inputs In this courseware we will discuss the use of Boolean algebra and K maps 3 6 1 Using Boolean Algebra You have already seen in section 3 5 3 how a Boolean equation can be modified but without changing its functional operation by applying any of the Boolean axioms and theorems to it So us ing the Boolean algebra method to simplify combinational circuits simply means that we start with a Boolean equation of the circuit and then use the axioms and theorems to transform the equation to a more reduced but functionally equivalent equation The smaller the equation the smaller the circuit will be We have noted that the two circuits shown in Figure 17 are equal in operation Their correspond ing equations are also shown x y 2 Pa f xy z xy z xy zn f xyz a b Figure 17 Two functionally equivalent combinational circuits We will now show how the equation f xy z xy z xy z can be transformed to f xyz using the Boolean axioms and theorems There are no set rules as to which axiom or theorem is to be used first and when to use it So there might be other ways to perform this transformation 21 www globalspecialties com Combinational Logic Design f xy z 2 xy zl xy z xyz xy 2 using theorem 8a on z y xy z xyz x y z using theorem 13a on xy xy z xyz x z y z using theorem 12a on x y 2
86. w Signed Overflow Figure 37 The 4 bit adder subtractor combination circuit The select signal is also connected to c With this change the circuit can now perform both addi tions and subtractions depending on the select signal s When s is 0 c will be 0 and with one input of the XOR gate being a 0 the bit at the second input will pass unchanged to the output refer to the XOR gate truth table to see that this is so Therefore the circuit will perform an addition when s is a 0 When s is 1 c will be 1 and with one input of the XOR gate being a 1 the output will be the inverse of the bit at its second input Therefore the circuit will perform a subtraction when s is a 1 Just like the subtractor circuit there is an extra gate connected to c and c to indicate whether there is an overflow or not for signed numbers If you need to add more bits to the adder subtrac tor circuit you simply have to daisy chain more of the FA bit slices The complete detailed schematic diagram for the 4bit adder subtractor circuit is shown in Figure 38 Global Specialties 60 Ch 4 Labs unsigned _ overflow LED7 4 signed overflow LED6 Figure 38 The complete detailed 4 bit adder subtractor circuit Experiments 1 Implement the circuit shown in Figure 36 You will need to have four FA circuits with their s and c_ s connected together Connect the 4 bit operand a to a to switches SW7 to SW4 Con nect the 4
87. witch V to the two push buttons PBO and PB1 Connect the siren output S to LEDO Verify that the circuit operates as described 2 Design and implement the circuit for the following truth table where x y and z are the inputs and f is the output See Experiment 8 in Lab 1 on how to construct a 6 input OR gate 3 Design and implement the circuit for the following truth table where x y and z are the inputs and f is the output 4 Notice that the outputs for Experiment 3 are just the inverse of those from Experiment 2 i e all the 05 and 1 s are flipped In other words if you implement a circuit by selecting the rows where the output f is a 0 instead of a 1 you will end up with the inverse of f Also notice that the circuit for Experiment 3 is much smaller than the circuit for Experiment 2 So a better way to implement the truth table for Experiment 2 is to start with the circuit for Experiment 3 and simply add a NOT gate to the output to invert the result Implement this new circuit and verify that it operates exactly the same as the circuit from Experiment 2 i e both circuits produce the same truth table 43 www globalspecialties com Combinational Logic Design 5 Design and implement the circuit for the following truth table where x y and b are the in puts and b_ and d are the outputs Global Specialties 44 Ch 4 Labs 4 4 Lab 4 Multiplexers Purpose In this lab you will learn about multiplexers A multip
88. xes in must be inside a subcube but the same 1 box can be inside one or more subcubes 5 The size of each subcube should be made as large as possible 23 www globalspecialties com Combinational Logic Design Forming subcubes is like trying to figure out a puzzle where you want to have as few subcubes as possible and each subcube to be as large as possible Figure 19 d shows the subcube of size 2 containing the two adjacent 1 s Figure 20 shows some valid subcubes of various sizes Figure 20 a is a rectangular subcube of size 2 Figure 20 b is a square subcube of size 4 Figure 20 c is a square subcube of size 4 Notice that the four 1 s are adjacent to each other because column 10 wraps around and is adjacent with column 00 Figure 20 d and e both have two subcubes each one of size 8 and one of size 4 Two of the 1 boxes are in both subcubes Figure 20 f have two subcubes one of size 4 and one of size 2 For the size 4 subcube the four cornered 1 s are all adjacent because they all wrap around d e f Figure 20 Examples of valid subcubes a subcube of size 2 b subcube of size 4 c wrap around subcube of size 4 d two subcubes one of size 8 and one of size 4 Notice that two of the 1 are in both subcubes e two subcubes one of size 8 and one of size 4 and f two subcubes one
89. y in digital circuits They are the NAND gate NOR gate XOR gate and XNOR gate Their logic symbols and truth tables are shown in Figure 9 Figure 9 The logic symbols and truth tables for a NAND b NOR gate XOR gate XNOR gate In these truth tables x and y are the inputs and f is the output The NAND gate is derived from connecting a NOT gate to the output of an AND gate hence the name NAND which came from the two words Not AND Recall that the NOT gate inverts the input value Thus the values in the output column of the truth table for the NAND gate are inverted from that of the AND gate We say that the operation of the NAND gate is the inverse of the AND gate and vice versa Similarly the NOR gate is derived from connecting a NOT gate to the output of an OR gate hence the name Not OR or simply NOR Again the values in the output column of the truth table for the NOR gate are inverted from that of the OR gate 11 www globalspecialties com Combinational Logic Design The XOR gate also known as the eXclusive OR gate is similar to the OR gate but the output is a 1 only when one of the inputs is a 1 If both inputs are a 1 then the output is a O The 2 input XNOR gate is the inverse of the 2 input XOR gate However the XNOR gate is not al ways the inverse of the XOR gate It turns out that the XNOR gate is the inverse of the XOR gate only for when the number of inputs is even When the
90. ying this method for the 4 to 1 mux we get the following simplified truth table and the equation will be y 5 5 0 5 5 s s d s s d Draw out the circuit from this equation then implement your circuit and confirm that it works correctly 4 Design and implement an 8 to 1 multiplexer There should be 8 data input lines 3 select lines and 1 output line Since there are only 8 switches on the trainer you can connect the three select lines directly to either VCC for 1 or GND for 0 Global Specialties 46 Ch 4 Labs 4 5 Lab 5 Decoders Purpose In this lab you will learn about decoders A decoder is used to select one among several devices or memory locations You will design decoder and encoder circuits and implement them on the trainer Introduction A decoder is another frequently used component in a digital circuit The function of the decoder is to select one thing among several things For example if you have an array of 16 memory loca tions and you want to read from one particular location a decoder will be used to select which one of the 16 memory locations that you want to access The logic symbol for a 2 to 4 decoder is shown in Figure 29 a As implied by the name 2 to 4 decoder this component has two input lines A A which are the two address select lines for selecting one of the four output lines Y Y Y Y When the address lines A A 00 the output line Y will be selected when the address

GS-DL010 - Combinational Digital Logic Trainer

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