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J750 Test Systems

1. D CG mmm Fan Plate Assembly 7 405 325 00 eg Get d TTT am swe II lt mn iz TT hit Mol a PUDO all IV O a ae Jl GE S de Ee o smo illl a sevo Eal 0000 aioli ES E III 990000 10 Vol ll opoto JI Figure 8 4 J750E tester power supply locations Always wear a tested grounding strap while working on the J750E tester Note Protect against the possibility of dropping hardware into the power supplies tester electronics or backplane 1 Remove the AC line connections for the 5 volt 10 5 volt power supply module as follows Remove the yellow protective shield from the connector terminals Loosen the screws on the connector terminals a few turns using the no 2 Phillips screwdriver then remove the three 3 terminal lugs from the connector Repair 8 23 2 Disconnect the AC line connector from the 10 5 volt 5 volt and 24 volt power supply module by pushing in on the tabs at the ends of the connector with your thumb and first finger then pulling up on the connec
2. a e DIR i al TOS Oo H Vacuum Sg 1 vacuum channels Gauge alignment pin exhaust out hose clamp check valve vacuum in Muffler Y airin air in Se Vacuum Pump 1 Vacuum Pump 2 J 1 air flow port2 8 port 1 ATS solenoid assembly Quick Disconnect 7 Tester Housing Hose Coupling customer supplied compressed air regulated to 70 101 PSI F 000985 Figure 9 5 J750E tester vacuum system flow diagram 9 8 J750E 512 Pin Test System Service Reference Manual Perform the following steps to determine if a vacuum leak is a problem N 4 5 O ON Always wear a tested grounding strap while working on the J750E tester Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer Check the DIB fixture vacuum seals as outlined in section Vacuum Seal Inspection and Cleaning on page 7 16 of Chapter 7 Maintenance to ensure the seals are clean and free from damage Check that all of the pogo pins are present in each pogo block Position the tester so that the DIB mounting surface faces down to increase the force applied to the pogo block o rings Open the tester as outlined in section Opening t
3. Capture LVM LF gt Filter V Rani Hi Digitizer ers anges Z e Programmable SS De MF Offset enerator Digitizer S Source Digital e Programmable Support Attenuator Circuitry LF P 50 Ohm Source S Filters o DSP e Ze 50 Ohm MF z E Source as SE Programmable Offset Board Control Relay FPGA Control and Leg PPMU x2 Temperature Calibration ID Sensors x 4 Prom Calibration DGS Bus a D 00K Ohm Grounder a Digital D MLS a 7 Polarity i Signal na 2k Ohm TF S ra Reverse ES Shaper EH D jal Li m 1 a e i i i D LI vn ren In Dh Ee Eeer d Li La ota La Measure Bus i i E E a Cal ADC Get een 7 e A H 1 d 20 Bit lo o il dicas El prota ta Source Bus i i o o mnm ee A emm mee LO it ut LA dE peta i ity Differential i DC tt Bandpass Differential i Reference e Elter Notch Filter it i Ze H i F 000429 Figure 5 14 ASIO block diagram 5 32 J750E 512 Pin Test System Service Reference Manual Capture Hi Capture Hi Alt Capture Lo Capture Lo Alt To Measure Bus Source Hi Capture PPMU Channels 0 3 A PPMU B DGS Source Channels 0 3 DGS DC Performance Oly Source Hi Alt Source Lo Source Lo Alt To Source Bus To DGS Bus oe e DGS To VCM Bus Source Bus Lo Cal DGS ee Source VCMS Cal High Force M
4. F 000063 Figure 4 5 J750E calibration hardware block diagram Performance Verification Internal Internal Performance Verification is a test of the system against the design specifications To perform verification a Cal DIB is placed onto the tester instead of the normal customer DIB The Cal DIB contains two 2 passive relay switch matrix circuitry that connects the calibration circuitry and references on the CAL CUB to the tester hardware that is being calibrated Performance Verification Overview nternal Performance Verification is run to check the tester against the internal reference circuitry to guarantee that the internal hardware is at its maximum accuracy and to check the tester against the design specifications Internal Performance Verification must be performed when the following occur e The tester is installed or re installed Maintenance Software 4 17 e Previously calibrated hardware is changed e Extensive tester maintenance has been performed e Tester hardware or software is upgraded Successful External Calibration External Performance Verification and Calibration are required before Internal Performance Verification can be performed DC Performance Verification DC Performance Verification of the boards is performed with a Cal DIB installed This provides a relay switched Kelvin connection between the channel board under test and a CAL CUB The CAL CUB contains the precision reference calibration c
5. Memory F 000163 Figure 5 9 Channel board block diagram Channel Board Relay Boards Two relay boards are required for each channel board The lower board covers channels 0 to 31 and the upper board covers channels 32 to 63 Pogo_channel XX is the channel itself PE_PLIM is the positive limit and PE_NLIM is the negative limit for the fixed clamp diodes for the channel The negative clamp is approximately 2 2 volts and the positive is clamp is 7 7 volts HIV is the high voltage channel and is not protected by the fixed clamps 5 20 J750E 512 Pin Test System Service Reference Manual PPMU_ Guard is used to guard the Board Pin Measurement path and provides Pogo Guard AGND analog ground comes from the ground Mecca goes out to the DIB and returns as Device Ground Sense DGS BPMU_Force is common to both the high and low relay boards BPMU_Sense is separate for the low and high board Figure 5 10 provides a block diagram of the channel board relay board BPMU_Guard e gt Pogo Guard DGS th la Pogo DGS AGND AGND BPMU_Force A Pogo Force l BPMU_Sense 4 Pogo Sense BPMU_Common fi y BPMU_Sense m gt Pogo Ext Force SH gt Pogo Ext Sense Ep L PE_PLIM t m gt Pogo_ Channel 00 63 PE_NLIM D DUTPIN_ Channel 00 PPMU_DUT_ Channel 00 HIV Channel xx Drive_out a BPMU_Guard lr BPMU_Common Gu
6. Last WorkBook Ver V7 20 00 Starting APMU External Calibration slotS Last Run 9 28 01 3 43 22 PM Last Result PASSED APMU External Calibration Setup C Status Only HP3458A settings GPIB address is 22 Unload Program Guard switch is open Connect calibration cable to HP3458A and J5 of APMU NEE Start P pcANYWHERE SyBoards_and tests By Microsoft Word E 4750 Maintenane Test Program Out C pubiic on Silvio F 000696 Figure 4 23 External Calibration MUI and Test Program Output Window 21 Click OK The External Calibration program begins When complete the results display in the Test Program Output window 22 If required repeat the appropriate steps of this procedure for any additional APMU modules installed in the tester 23 Disconnect the APMU calibration reference cable from the meter and the APMU Mother Board 24 Reinstall the APMU Air Flow Shield onto the tester and tighten the four 4 thumbscrews to secure it to the tester 25 Run additional instrument external calibration procedures as outlined in section Optional Instrument Reference Calibration on page 4 57 for any additional instruments that are installed in the tester as applicable 26 If no additional instruments need to be calibrated select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Maintenance Software 4 73
7. Repair 8 33 Once the card cage has been replaced be sure to check all voltages at the card cage backplane before re installing any boards back into the tester Note Prior to installation check the rear side of the card cage assembly to ensure that the mating surfaces of the six 6 mounting bolts are free from dirt or debris that could cause vacuum problems Note Make sure that the connectors and as much of the cable as possible of any disconnected cables are properly secured on the outside of the tester housing prior to reinstalling the card cage to prevent damage while the card cage is being reinstalled Note The card cage assembly must be carefully reinstalled so that it seats on alignment pins and does not interfere with any cables Note Be sure to keep the card cage square in the housing when reinstalling it into the tester Failure to do so will cause the card cage to bind against the inside of the housing making it difficult to install 1 If not already done position the tester so that the DIB mounting surface faces the manipulator perpendicular to the floor the doors face out and the Power Switch faces up 2 For the J750E tester perform the following steps Gently slide the card cage into the tester housing so that it goes straight in and does not bind Reconnect the temperature sensor cable to the temperature sensor mounted in the center of the card cage 8 3
8. Option Explicit E SS J750Maint J750Main Microsoft Excel Objec Forms Modules 9 Class Modules 3 References E E Template Template 3 Microsoft Excel Objec 3 Forms 6 6 Modules Aan Private Const CubPin As Long TL_CAL_CHANNEL1 Private Const Cub3li As Long TL_CAL CHANNEL2 Private Const CubSlot As Long TL CAL CHANNEL TL_DIGITAL CHANNELS_PER_BOARD Private Const TimeSetl As Long 1 selects EdgeSetO or EdgeSeti Private Const TimeSet2 As Long 2 selects EdgeSet2 Private Const EdgeSetO As Long O disables all edges Private Const EdgeSet1 As Long 1 enables all edges disables RO Ri Private Const EdgeSet2 As Long 2 enables all edges Private Const FormatO O Private Const PeriodO As Long O Private Const cpp ds Long 1 Private Const DriveHi As Double 3 Private Const DriveLo As Double O Alphabetic Categorized Private Const Vt s Double DriveHi DriveLo 2 DriveLo Private Const ILoad Vt 50 unterminated current load Private Const ILoadHi As Double ILoad Private Const ILoadLo As Double ILoad Private SystemFrequency As Double Private SystemClock As Double F 000178 Figure 3 6 Visual Basic debug environment Following are brief descriptions of the IG XL Visual Basic functions Project Explorer Window The Project Explorer window is used to select a Visual Basic Code Module Form etc for the program that is being run
9. 1 2 3 24 volts l Utility Slave l 4 5 6 wm eee mm rm Ce i Part of 405 924 00 Part of 405 925 00 Part of 405 920 00 Part of 405 924 00 ld TM ee i ge Good 10 36 I aay God l r zq It 3 6 9 2 Lois 6 9 12 d 7 yU l Voltage l l 10 5 volts 2 11 2 5 8q l Master a Good l 5 volts 4 5 el nfo 1 4 71 H m 1a eg cl 5 at 4 Sense i it Sense l o 36 10 15 34 V Pin nia Y aia Inhibit cd EE TE di _ Ao Y E OO O AOO MMM lt L Pin 4 l 1 4 1 4 l 33 vol 33 volt 10 5 volts 3 volt S Slave l gas P Master l i nhi inhibit 3 6 a vl Lens Sense Sense eebe eh J Part of 405 920 00 Part of 405 325 00 F 001080A Figure 9 11 J750E tester power supply sequencing flow diagram IG XL Software Control Starting with IG XL version 3 30 06 the tester will automatically be shut down by IG XL if it can not read the Channel Board ID Prom Register This feature has been implemented in the event that the inner layer trace of the Channel Board shorts out and causes the 5 volt power supply fuse to blow If the 5 volt supply is missing IG XL can not read the Channel Board ID Prom Register when polling for the information in the configuration file because the prom is driven by the 5 volt supply 9 24 J750E 512 Pin Test System Service Reference Manual If this occurs the following message will be displayed in the Status Window of the Main
10. APMU Daughter APMU Daughter ie Ea pe sm inet E Card Card Extractor DEF APMU Mother Board F 000689 Figure 8 13 Proper position for APMU daughter card extractor 5 Using the extractor rock the card in a side to side manner while slightly pulling up 6 Remove the extractor and place it under the other end of the daughter card 7 Repeat step 4 through step 6 until the card has been removed from the motherboard 8 Place the card onto a proper anti static work surface with the component side facing up 8 52 J750E 512 Pin Test System Service Reference Manual 9 if applicable place connector covers onto the connectors of the daughter card then place the card into a proper storage container to prevent ESD and physical damage 10 Repeat step 3 through step 9 for each daughter card that needs to be removed 11 Proceed to section Reinstalling the Daughter Cards on page 8 53 as appropriate Reinstalling the Daughter Cards Perform the following steps to reinstall the daughter card onto the APMU motherboard Always wear a tested grounding strap while working on the J750E tester 1 If applicable remove the new daughter card form its storage container and place it onto a proper anti static work surface with the component side facing up 2 Remove any connector covers that are installed on the board 3 Position the daughter card on the motherboard so that the two 2 ASIC on the card are positioned toward the PCB s
11. 4 74 J750E 512 Pin Test System Service Reference Manual Hardware Description The Hardware Description chapter of this manual provides a detailed description of the following J750E hardware Computer Overview Personal Computer Interface PCI Board Calibration Clock Utility Board CAL CUB Test Computer Input Output TCIO Device Power Supply DPS Channel Board Calibration Device Interface Board Cal DIB Memory Test Option MTO Converter Test Option CTO Mixed Signal Option MSO Analog Parametric Measurement Unit APMU Radio Frequency Identification Option RFID 5 1 Computer Overview The J750E system utilizes a single central system computer This computer is a standard IBM personal computer PC type The computer provides the operating platform for the IG XL software system which includes program executables customer test programs and data sets IG XL program executables include the IG XL program itself and the Maintenance Environment diagnostics program Customer test programs are the specific test routines used by a customer to test a device or series of similar devices The computer utilizes a Microsoft operating system OS The current operating system is Microsoft Windows XP Professional Earlier systems used the Windows 2000 Professional operating system Either OS is acceptable Three recent models of Hewlett Packard HP computers have appeared on J750E systems e W8000 e xw6000
12. Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 9 Properly ground the MSO Calibration DIB 10 Place the DIB vacuum switch on the tester to the UNLOCK off position 11 Remove the MSO Calibration DIB from the tester and place it onto a proper anti static work surface 12 Remove the ground from the Cal DIB tester then remove the daughter card 13 Place the daughter cards and DIB into proper storage containers to prevent ESD and physical damage APMU The J750 Maintenance Software allows External APMU Calibration to be run from the standard Maintenance User Interface Running External APMU Calibration Always wear a tested grounding strap while working on the J750E tester Note Since External APMU Calibration does not log temperature and date performed It is a good practice to make note of these items at the top of the log file created as outlined in section Launching the Maintenance Interface on page 4 33 It is also good practice to list things like Engineer Technician name ambient system temperature as well as any other system specific information that might be useful for troubleshooting purposes Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded 4 68 J750E 512 Pin Test System Service Reference Manual Note Teradyne J750 Maintenance Software V7 20 02 mus
13. 1 Store the part in its antistatic packaging for example antistatic bag and shipping container until it is required for use Save the original packing materials used to ship the part from Teradyne 2 Ensure that personnel are adequately protected from static charge by requiring use of an antistatic ground strap when handling the part 3 When returning defective parts to a Teradyne GCS center place the part in the original antistatic bag and shipping container This will help ensure that parts are not damaged by electrostatic discharge or physically damaged when being returned to Teradyne For additional information about static protection precautions see the safety section of your test system service documentation Refer to Table 10 2 to find the nearest GCS defective parts return location in your region Replacement Parts 10 3 Table 10 1 Telephone numbers for GCS centers Sheet 1 of 6 Country Telephone Algeria Dial 63 32 341 7800 phone where is the international dial access code for Algeria International charges will apply No toll free access is available Argentina For toll free AT amp T Direct Access dial 0 800 288 5288 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Argentina International charges will apply Australia For toll free AT amp T Direct Access dial 1 800 881 001
14. Properties Window The Properties window is used to view and or edit the selected Object s properties Immediate Window The Immediate window is used to view DEBUG debug print information Editor Code Object Window The Editor window is used to view and or edit the selected Code Module or Object 3 10 J750E 512 Pin Test System Service Reference Manual J750 Maintenance Software The J750E tester provides a dialog box based Maintenance User Interface MUI to run the maintenance software From this dialog box the maintenance programs and their options are selected and the programs are run The user can select or deselect each physical slot in the tester as well as set parameters for individual portions of certain tests See Chapter 4 Maintenance Software for details on the maintenance software Other Software National Instruments GPIB Software for Windows The National Instruments GPIB Software for Windows is the driver software required to operate a GPIB Board For Windows NT this software is installed immediately after installing a GPIB Board into the computer For Windows 2000 this software is installed prior to installing a GPIB Board into the computer For the current J750E Windows environment the GPIB driver software is initially loaded at the factory and if the need arises to re install the GBIP driver software it is contained on the J750 Restore CD supplied with the tester Agilent HP 3458A Instrument Driver
15. Qe de 5 Volts Ae Ground Rear Fan D OK 6e 3 Left PS Fan OK iz Rol E ik 24 volts Ground HAS ebe Left Power Supply Jacket Fans 1A Circuit Breaker Right Power Supply Jacket Fans 24 volts Ground ka 3 Right PS Fan OK o 1A Circuit Breaker F 00679A Figure 9 9 Tester fan sensor to CAL CUB wiring Troubleshooting 9 21 Power Off Connector CALCUB Fan Fail Circuit FanFailDelay E Delay F 00963B Figure 9 10 CAL CUB Fan Sensor Control Circuit System Power Supply Failure The failure of any power supply in the tester will cause the CAL CUB to turn off the AC power in the tester This feature is inherent to the fan control circuit on the CAL CUB and uses the 5 volt 5 volt and the 3 3 volt power supplies If any of these power supplies fails the power control relay on the CAL CUB will drop out which in turn will shut off the tester AC power Note The 2 minute fan delay is not implemented when there is a power supply failure Along with the fan control circuit on the CAL CUB the tester employs power supply sequencing for proper initialization of its circuit boards on power up and to monitor the presence of the supplies If a power supply malfunctions all supplies from the defective power supply module to the end of the chain would drop to zero volts which will tur
16. Users can click individual boards in the graphical representation of the tester or click the and symbols on the display to select or deselect certain types of hardware Loop Setting Allows the selected program or programs to run in a loop The test runs the number of times entered in the window and the run time PASS and FAIL quantities are updated on the MUI The valid range for this field is 1 to 9999 The default value is 1 Tolerance Reduction Setting Allows the user to reduce parametric test limits by a selected percentage The number selected represents the reduction for the entire range so actual upper and lower limits are reduced by half of the selected number For example a setting of 30 reduces the upper and lower test limits by 15 each The valid range for this field is O 100 The default value is 0 Note This feature is typically only used by the factory to verify test limit margins Verbosity Setting Note Verbosity refers to the amount of information that is presented Allows the user to control what data is sent to the Test Program Output window The user can select from the following options e Failing Tests default Prints only failures e All Tests Prints all test results Selecting this option will result in a very verbose test output and will increase test execution time Debug Mode Allows the user to stop a test when certain criteria are met The Debug Mode Controls are not
17. 4 Unlock the PCB spring ejectors on all of the boards installed in the tester then back each board out of its slot in the card cage approximately 2 inches 5 08cm 5 Disconnect the 2 pin connector marked 234 825 00 OPER CTRL HARN TO PCB from the mating connector J3 on the CAL CUB 6 Short the 2 pin connector marked 234 825 00 OPER CTRL HARN TO PCB together using a paper clip or equivalent jumper wire 7 Measure each pin of the connector on the harness to ground One pin should read 24 VAC the other pin should read zero 8 If 24 VAC is not present on either pin of the connector the tester has an input power problem See Figure 6 3 to assist in troubleshooting 9 If 24 VAC is present press and hold the green Power On switch on the front of the tester to reapply power 9 26 J750E 512 Pin Test System Service Reference Manual Note Hold the Power On switch for 3 to 5 seconds when applying power to the tester If the switch is released before the 3 to 5 seconds have elapsed the tester will not initialize the power supplies properly If this happens turn power off wait 30 seconds then reapply power 10 If the tester turns off immediately proceed to section Power Supply Troubleshooting on page 9 27 11 If the tester stays on for approximately 2 minutes then shuts off wait approximately 3 minutes and reapply power Note If you cannot make all of your measurements before the tester shuts off again wait approximate
18. 7 Select or deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface 9 O Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired 9 Click Start Performance Verification starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run The board that is being tested is displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the Performance tab displays the date and time of the last test as well as the overall test results pass or fail 10 Once testing is complete select Save from the File pulldown menu in the Test Program Output window The log is saved to the file previously created Maintenance Software 4 55 11 Run additional Performance Verification as desired or proceed to the appropriate section of this chapter for the particular maintenance program you want to run 12 If no additional instruments need to
19. Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester 6 Click the Calibration tab in the maintenance interface 7 Select or deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired 9 Click the AC Calibration button in the Hardware Selection Deselection area of the maintenance interface 10 Click Start Calibration starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run The board that is being tested is displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the Calibration tab displays the date and time of the la
20. Verify that all of the needed disks in the set are present Each disk is labeled Disk x of y where x is the disk number and y is the total number of disks in the set Disconnect the Ethernet and SMC Ethernet connections from the customers network and the SMC module If you are rebuilding a replacement computer make sure you have requested a new IG XL license for that computer Licenses are issued based on the Host ID of the computer and are not transferable from another computer Procedure Set the Boot Order to CD ROM before Hard Drive On the xw6000 and xw8200 computer models used for these products use the BIOS setup to verify that the CD RW is first in the boot path To do this restart the computer and press lt F10 gt setup mode when the HP splash screen appears The system will boot into the BIOS setup mode in a few moments Select English as the language Point to the Storage menu and down to the Boot Order selection Set the IDE CDROM to first Press F10 to accept this entry Point to the File menu select Save Changes and Exit The system is now set to boot from the CD ROM drive first Install the Image Open the CD drawer and insert disk 1 of the CD set Restart the computer The system now will boot from the CD and begin to search for low level drivers for the SATA SCSI and or EIDE hard disk interfaces The generic restore software by default tries several different drivers sets until if locates the correct
21. ccccccccccceceeeeeeeeseeeeseeeeteesaaes 8 30 Card Cage Assembly Removal and Replacement AAA 8 31 Removing the Card Cage Assembly c is ccsscesssesctsnssgesssscnasscascpensnscs sense ovesiseessevasevnevs ARENS EE EE 32 Reinstalling the Card Cage Assembly ceececceeceeseeseeececseeseecaeceecesecescsesseceeseseseaeeseeeaecaaesaecaeseseneeeeseatees 33 Input Power Module Removal and Replacement ccccccccccncccnnnnncccnncccnnnnonononononcnnnnnnn 8 35 Removing Input Power Module Assembly oooooccnccnocccoconoccononononnconccnnoonc cono nonnnonn cnn nono roncnn non ncn nc ono conc cnnonncnnnns 36 Reinstalling Input Power Module Assembly cono nocnnonn cnn conc rncnn con non aran c cn non nnnnncnnnns 39 Fan Removal and Replacement AA 8 40 Fan Plate Assembly Fan Removal and Replacement ooooconcnnccnonnnonconnnonnonnnancnn non nono crono rncon non no conc nonnn ca nnnnncnnnns 40 Removing Fan Plate Assembly Fans 40 Reinstalling Fan Plate Assembly Fans 41 Power Supply Jacket Fan Repla cement non nonn non nc nnc cn non nero none cnn istme nan nran oracion nc rn nonneos 42 Removing Power Supply Jacket Fans 42 xiii Reinstalling Power Supply Jacket Fans 43 Vacuum Seal Removal and Heplacement 8 44 Channel Board Relay Board Removal and Replacement cccceeeeeeeeeesttteeees 8 46 Removing the Relay Bond cuota ni 46 Reinstalling the Relay Boards isseire esepte EEEEE eao EE RETo EE o oS ENEE 46 Memory Test Option MTO and Digital
22. Air Filter Maintenance ienee maaan ene needled ie alae ae 7 19 Pan E 19 AGC Power CHECKS EE 7 20 DC Power Supply Verification EEN 7 21 Measuring Power Supply Output Voltage 21 Adjusting the 3 3 Volt Power Supplies 24 Adjusting the J750E Tester 10 5 Volt and 24 Volt Utility Power Supplies 24 Adjusting the J750E Tester 10 5 Volt Power Supplies 24 Adjusting the J750E Tester 24 Volt Utility Power Supplies 24 Measuring Power Supply AC Ripple sssi spesse pensees rin esmenes heei EE EE aa SRE EAE SEE SHE ESSES RERS 25 Repair O A 8 2 ESPEC Uan 8 3 Preliminary Repair Procedures ses aida 8 4 Performing Preliminary Checks ccciocioiirociorragadoratarocbaf clero taria 8 4 Run Checkers and Save Data Log be os chactesney chsacestes EEN areor eotea r E tset 4 Copy Calibration and Configuration Files oooononiccnicnoccnonononinncnnnonnonnnonncononnnonn cnn non non nc nn con non aran n cnn cn enn cran cnn 5 xii J750E 512 Pin Test System Service Reference Manual Shutting Down the Computer System EE 8 7 Shutting Down the Tester and AC Power Vauht 8 7 Opening Ein EE 8 8 Opening the DIB Mounting Side of the Tester oooonnonnnnoninnnionoonncnnconocnnonnnnno nan nnnconn concern conc cn non E SRESER sne 8 Opening the Doors of the Tester issii e a R E on nono ARA OA aE AS EROI EESE conos 9 Repair Proced ra eege 8 10 Circuit Board Removal and Replacement ccccccccconononononononoonononnnnnnnnnnnnnnnnnnnninanannnns 8 10 Removing Ciruit
23. External Calibration is performed on the CAL CUB and if present the CTO board External Calibration of the CTO only calibrates the reference source and acquire measurement circuitry on the CTO External Calibration must be performed when the following occur e Recommended at initial system installation to establish a baseline calibration e There is a shift of greater than 5 C 9 F in the last calibrated temperature of the tester Note When External Calibration is run the temperature being monitored is that of the incoming air at the channel board installed in slot O of the tester e The CAL CUB has been replaced e ACTO has been replaced if present e You experience marginal failures running Calibration or Performance Verification Calibration requires the customer Device Interface Board DIB to be removed and replaced with a Calibration Device Interface Board Cal DIB 4 4 J750E 512 Pin Test System Service Reference Manual The purpose of the external calibration is to calibrate the CAL CUB reference circuitry against a known traceable standard The known standard is the Agilent HP 3458A multimeter The meter is connected to the CAL CUB through the Cal DIB The CAL CUB sources specific voltages and currents then the Agilent HP 3458A and the CAL CUB internal meter both measure the CAL CUB source Figure 4 2 shows a block diagram of the External Calibration circuitry GPIB BUS AgilenvHP 53181A Agilen
24. F 000221 iew DUT vi ion t identifica In 1 CTO board pi Figure 11 4 Printed Circuit Board Pin Identification Diagrams 11 5 Lou ved Lea ved vey ved Lea ved z aT E E r2 SZ LA oo fe zx 2 o 5 L LL gt 0 o DEI ER KG Ei a g jeuueyd jauueyd sng Aun pupy inaides ysdeo ideo gue usonois puev as puey inamdeo ysdeo iHdeo gew usonos puev iH0s pue puoy omn PUDV sian pue ogn s9a PUOV ges pupy namas pupy aunasl puoy s9a PuDV inas pupy ges puDy SWIADS pu gunn zunn pudv gn pusy Um puow puay giel usdeo unaordes pugy eme pel weus pudy o1deo vedecl geen pue emsl pudv usiHoas pudW puoy Lupp Div nl pue pn epg ema puoy zen aunl al am o Fo Ox 0 Oo nes SKS g G SKI KE e Eo SC EO S90 66 220 3 Sox voa To On eg Im5 3 EM s 2 gt 92 232 SCH ges c D 0 Jeuueyo euueyo sng Anna ss 99y gid UOUEIOUE pugy InaiHde9 ysdeo de pugy ySo791S pupy IH9IS pudgy LnaiHde9 ysdeo de pudgy yso79IS pugy IHS pugy ISO pu9y panesay Div pevesey DUT 4 IHICO soga pu9y 1ngo1us pugy gas pupy swags puoy soga pudy ANGIHS pue Lmgemms puDy sw9p9s pugy Ou PUDV Jeun pupy Peesey pudy sodieo PUDV pudy orde uysdeo unaordeo pel ops pel usiHos puy o1deg usdeo inaoide9 pue omel mue veuas
25. MOAY MVO MV9 S5a ASAI 3901 GND GND ZLdA vedA SINA SINA ON 9IYAL GND AND said Jald Dala ON Igdl GND SdA Z dA vedA SENA SENA NIOAHT ON 014719 001419 GND Said 99419 1Syd Ogal GND SdA veyA veYA GND GND Lv LO LO F 000220 Figure 11 2 CAL CUB board pin identification DUT view Printed Circuit Board Pin Identification Diagrams 11 3 Le ved veo ved FCM ved veo ved T v co 0 os ro 3 Ls 8 j zo Se Zu iL 25 DI N 2 5 HE GND 40 GND 960 GND 6 49 GND 2puo GND spud GND 894 GND L949 GND rou GND 2949 GND 0949 GND e940 GND omn LV Eu GND Seyo GND 8849 GND Lu GND PPU GND Z 49 GND 0SYD GND esuo an9 9949 GND 6549 GND 2940 GND up GND a GND ve4o GND Z849 GND oul AND EbUY GND 9949 GND 6t49 GND zsy9 GND s949 GND 8949 GND 1940 GND emn ano ain FO ex3 GND 8x3 GND amn ema Tonn vin LO D E Bau on Om n 100 9 31900 RANAS 1 O o N o co Zei 1 5 NO set So st ON st zt DI EN Go o Q x n lt NO 9 O de aie o E gt o DIAS A a Ok orot Sm Yo CODN NS ve Og Sorat Owu iy a oo a oo A D y 38 TT CDN oi T i Di lt GND
26. System Serial A EE iii de 29 AMAS POWER A a 2 29 AC Mali Se OM ON EE 2 29 System Input Power Requirements iii 2 29 AC Power Vault Input Power RequireMent cccccccccccccccccconncononncononononnnnnnnnnnnnnnnnnnnos 2 30 AG Power Vault Transformer Tapia oa i n 30 Electrical Code Requirements nn nn nro 2 31 SA E E 2 32 DA a alec 32 Man de TEE 2 32 AC Power Vault Emergency Off Gwitch 2 32 Tester Emergency Power Off Gwitch AE 2 32 Protective Barriers to Operators tt tc 2 33 Hazardous Internal Power Connections ooooocnnccococonononcnonnnnnnonnnnnnnnccncnnnnnananananano nono nooo 2 33 Power Control and Distobuton nn nan n nn cnn nn nono rn nnnn nn rra nn nn nnrnnnnnnnnnnns 33 iv J750E 512 Pin Test System Service Reference Manual Power Supplies EE 33 Personal Computer tr a diari des 34 Internal Protective DAMOS ata A dee 2 34 Special Internal Instructions AAA 2 34 Torque Specifications EE 34 Heavy Weight Removal InStructiONS ooomccccconnnnnnnnnoncccncnnncncncncnencnnnnnnnnnnnnnnnnnnnncnnnnnes 2 35 Fan Flate Assembly eeii dana ire ir ci 35 AG Power Vault O dr aous EEN ENEE EE EN 35 Special Hazard Warning Se ean aoe EE 35 External Hazardous Instrumentation Connections ccccccconcocccnncconnononcncnnonononenoncnononos 2 36 Power OUER ege ee E ed Ee IE AER 36 Other OPM POV ET OOU E a RS SB Ai os Eee 36 External Mechanical Er EEN 2 36 Movable Mechanical Assemblies essiens ienen ena eenkeer ennaii nene e a aani E
27. Deselect the CAL CUB as represented in the Hardware Selection Deselection area of the maintenance interface 4 56 J750E 512 Pin Test System Service Reference Manual 2 Select all of the CTO boards that are installed in the tester as represented in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected hardware is displayed white 3 Click Start The HP3458A Voltage Measurement Instrumentation Setup dialog box is displayed on the screen Figure 4 9 shows the dialog box 4 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in Figure 4 9 and click OK The voltage calibration portion of External CTO Calibration begins The CTOs displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred When complete the results display in the Test Program Output window 5 It is recommended that you proceed to section Running External Performance Verification on page 4 39 6 If External Performance Verification is not required proceed to the appropriate section of this chapter for the part
28. Pinmap Z QckTests A MckTests CalTest 4 Ready F 000177 Figure 3 3 IG XL Data Tool Workbook Data Tool Program Data Tool is a program that operates under Microsoft Excel The J750 Device Test Program is an Excel workbook that contains various sheets of information The workbook is used to hold the programming information for a single program or a family of related programs Data Tool Worksheets The various types of information required to program the tester are stored in a number of Excel sheets within the workbook The workbook contains all the information necessary for program execution with the exception of the Test Patterns The Test Patterns are managed through the Pattern Tool software The Data Tool worksheets contain the following information e Device Pin Name and Group Name definitions e Device Package Pin and Tester Channel mapping e DC voltage and current levels to be applied to the DUT e Parametric test values for the device e Timing values and pin formats e Functional tests e Test flow and binning e Datalogging Data collection 3 6 J750E 512 Pin Test System Service Reference Manual The user enters the program information into the Device Data Area of the worksheet The Device Data Area is present on all worksheets and consists of a block of rows and columns where the user enters data Depending on the requirements of the test program being developed multiple variations of a she
29. The RFID Option consists of the following components see Table 5 1 e RFID Main board AGO25 containing 16 RFID channels e RFID Daughter Boards AGO23 RFID channels 0 7 and AGO24 RFID channels 8 15 Hardware Description 5 53 e Channels e Channels Bis in E RE EES s 1911623 Rro reel al onanga 192 255 24 811 acozs 182 207 256 319 32 _39 AGo23f256 271 320 383 40 47 AGO24 320 s35 384 447 48 55 384 s99 448 511 56 el 448 a63 IE IS IS IS IS O O IS 512 575 64 71 mt 527 7 576 6391 72 79 Sal ST 6401 703 8087 AFID 6401 655 omansa Z04767 29 29 aGo2s zoa 719 el 831 eil AGO23 768 783 832 89s 104 111 wore 847 896 959 112 119 ee set eil Channels O 18 CAL CUB Ons cro L 15 DPS Table 5 1 Slotnumberto channel number mapping by board type 5 54 J750E 512 Pin Test System Service Reference Manual AC DC Power and Cooling The AC DC Power and Cooling chapter of this manual describes AC power distribution the DC power supplies system cooling and system grounding DC power supply specifications are also included as part of this chapter The following information is covered in this chapter e AC Power Distribution e DC Power Supplies e User Power Supplies e J750E System Power Protection e System Cooling e System Grounding 6 1 AC Power Distribution Facility power is co
30. The sheet lets you define the wiring of up to 32 parallel test sites Errors Sheet The Errors Sheet displays any errors found during validation with an active link to the sheet where the error occurred If there are no validation errors an Errors Sheet is not created Global Spec Sheet This sheet defines symbols for global often tester specific values The symbols are used by other sheets to create formulas AC or DC Spec Sheet These sheets define the spec symbols to be used to create formulas on other sheets Symbols from the AC Spec Sheet are used for timing values Symbols from the DC Spec Sheet are used for pin level values Pin Levels Sheet The Pin Levels Sheet defines the values for input and output voltages and current loads that are to be applied to the DUT This sheet allows the user to define the levels for device pins of type Input Output UO and Device Power Supply Time Sets Basic Sheet The Time Sets Basic Sheet is used to define named combinations of timing values and data formats to be used by particular pins or pin groups during the application of test vectors A Time Sets Basic Sheet can define up to 32 sets of timing edges for the DUT Software Description 3 7 Test Instances Sheet The Test Instances Sheet defines the tests to be applied to the DUT This sheet lets the user enter parameters for each test instance Time Sets Sheet The Time Sets Sheet defines up to 255 time sets Each sheet specifies a unique
31. expansion board use only F 000996 Figure 11 8 Upper backplane connector AG028 Channel Board Slots 0 2 4 6 Printed Circuit Board Pin Identification Diagrams 11 9 Col No Card Insert View Row A Row B Row C Row D Row E Row F Tester Rear k Fans a 3 4 5 po 33V 33V 6 po ssv 33v 7 s av 33v 33v 9 nR av TV 10 avr of aH V 11 24VR Tea osv 2 Ave i av E 13 fF 5V 24V DPS R 24V DPS 1 Cev 24V DPS R 24V DPS 5 VI 24V DPS R 24V DPS 16 CN TI 24V DPS R 24V DPS 17 18 19 3 3 R Sns 3 3 R Sns 20 Slot Slot LSB 21 Co MN E 22 23 A 24 A y 25 lp Gm 26 Gnd CTCLR Tester Front 27 C_SPARE Air Power 28 CTCB CTAS Flow Switch NOTES 1 Row A of the HDM power modules connects to Row B holes on the channel board daughter board 2 Dark border around signal group indicates a physical HDM connector module 3 Signals 24V DPS or 24V DPS R are for DPS expansion board use only 4 CAUTION SPARE 2 might have 34V on it in older systems 5 TCIO signals in grey colored cells are present only in slots 0 1 2 3 These are for DPS expansion board use only F 000997 Figure 11 9 Upper backplane connector AG028 Channel Board Slots 1 3 5 7 11 10 J750E 512 Pin Test System Service Reference Manual Col No Card Insert View Tester Rear Row A Row B Row C Row D Row E Row F Fans ajaja lt lt lt 5 V 5 Y Slot MSB Slot Slot Slot Sl
32. supply The 208 AC input of the 5 10 5 volt supply is connected to the 5 volt supply which is in turn connected to the 3 3 volt supplies The signal specifications used for sequencing are shown in Table 9 3 Figure 9 11 shows a diagram of the J750E tester power supply sequencing flow Note All power supplies should be verified by measuring the Output Voltage Good signal pin 3 this signal should measure a minimum of 4 5 volts Table 9 3 Power sequencing signal specifications Inhibit signal Logic LO lt 0 9 volts Power supply OFF Logic HI gt 2 volts Power supply ON Output Good signal Logic LO lt 0 9 volts When Vout deviates from 3 to 5 from the adjusted set point Logic HI gt 4 5 volts Power supply ON Internal pull up to 5 volts Troubleshooting 9 23 Power Supply interconnections for J750E 512 Sense Sequencing Harness with filter capacitors Part of 405 925 00 Part of 405 325 00 Part of 405 924 00 Part of 405 925 00 ee es ICI pe See Voltage Voltage Good Good 14 2 TH Ti 2 3 1 2 31 24 volts iii Utility Master ven cal 4 5 6 4 5 el i 4 5 eld Sense i a L V Share L Inhibit L inhibit Pind 1
33. usually displayed as part of the interface 4 26 J750E 512 Pin Test System Service Reference Manual Debug Mode is activated deactivated by clicking the Load Program button while holding down the Ctrl key prior to loading the program When activated the Debug Mode Controls appear in the lower right hand corner of the interface Figure 4 7 shows the Maintenance Interface with the Debug Mode activated and the controls displayed lol x 3750 Maintenance MUIS 01 No Program Loaded File Log Options Configuration Help QuickCheck ModuleCheck Status Window O Frese O ci O IT Loop ADO Tolerance Reduction Verbosity Ge Failing Tests C All Tests C Status Only Debug Mode None C Failures C AllTests C Matching Tests Debug Mode Controls F 000182 Figure 4 7 Typical MUI with Debug Mode activated The user can select from the following options e None e Failures e All Tests e Matching Tests If Failures is selected the test being performed stops at a failure and the failure displays in the Test Program Output window The Debug Mode dialog box is displayed on the screen Figure 4 8 shows the Test Program Output window and the Debug Mode dialog box Maintenance Software 4 27 WARNING Calcub is not calibrated FAIL Checking CUB System Ground FAIL Checking CUB 3 3 Volts FAIL Checking CUB 5 0 Walt yl Help Clear
34. 0 786 Slower Than Ether DI FIRE AND EXPLOSION HAZARD INFORMATION FLASH POINT AUTOIGNITIONTEMP LOWEREXPLOSIONLIMOT n UPPEREXPLOSIONLIMIT 53 F 11 7 C TCC Will Not Occur 25 NA EXTINGUISHINGMEDIA Foam X Alcohol Foam xX y i Water Spray SPECIALFIRE FIGHTING PROCEDURES Use water spray to cool containers and to prevent flammable vapor from escaping Water may be ineffective on direct flame but can be used to flush spills Som ignition or disperse vapor or cool containers UNUSUAL FIRE AND EXPLOSION HAZARDS Liquid is invisible and flammable vapors may travel m low areas to ignition source IV HEALTHHAZARD INFORMATION RECOMMENDED WORKPLACE EXPOSURELIMOTS 500 ppm STEL OSHA amp ACGIH OFOVEREXPOSU Inhalation May cause mild imitation to nose throat or above TLV headache Eya Contact Slight to moderate imitation may cause corneal injury Skin Contact Prolonged contact results in skin drying Ingestion May cause vomiting diarrhea drowsiness cramps EMERGENCY ANDFIRST AID PROCEDURES Inhalation Move subject to fesh air give artificial respiration if breathing has stopped call physician Eve or Skin Contact Flush with large amount of water Contact Physician Remove contaminated clothing and wash before reuse Ingestion If patient is conscious give two glasses of water milk and induce vomiting Get medical attention Safety Information 2 17 Isopropyl Alcohol Continued V REACTIVITY INFORMATION STABILITY CONDITIONS TOAVOD
35. 149 GND tyo GND 249 GND 0149 GND 149 GND 9149 GND 6149 AND 2240 AND sz49 GND 8349 GND 1849 GND 3204 LV 049 GND 49 GND 940 GND 649 GND 2140 GND SIYO AND 8449 GND 1340 UND Feu AND 249 GND 0849 GND soa ano d aNd z49 GND suo GND 849 GND LLUD GND vLUD GND 4449 AND 0240 GND z4o GND 9240 GND 6340 GND 4 xa ONS esues LO exg GND 2x3 GND S bal GND pino ano d F 000222 tion DUT view identifica In I Channel board pi Figure 11 3 11 4 J750E 512 Pin Test System Service Reference Manual vey ved veo ved E 5 To Ki D 23 ce cz D 3 S jj zo Sieg Lu L 25 UI 175 5 E ac Q jouueyuD jouueyD z jeuueuD ouueyo y jeuueyD G auueyo 9 euueyo Z auueyo al SOA SU GHA SOA 9SUSS ZJ JA SOA SU ZJ JA SOA SU ZEA SOA SU dain SOA SU dain SOA SU can SOA 9sues HOA GND 99104 184A GND 89104 LEIA GND 99104 HOA GND 99104 LEIA GND 89104 148 A GND 99404 H JA GND 989104 184A UND 89104 ONS ING NlY4 GND ind NB GND LNA _NidA GND LAG NLH4 GND IMA NBA GND LNG NLH4 GND tnd NLH4 GND LNG Nlea
36. 16 channels in the group Measurements can also be made between 2 channels within different groups Another feature of the AMPU is ganging of the channels By connecting a maximum of 8 channels in parallel the APMU can provide up to 400mA Ganged channels are limited to the APMU channels on a single rider board Some of the features of the APMU are e 4 Quadrant operation 35V 50 mA e Source DAC and Measure ADC per channel e Up to 64 APMU Voltage Current source per board 4 differential Voltmeters per board e Device Ground Sense DGS compensation for accuracy max four 4 DGSs on a board e Ganging available up to 8 channel 400mA e Pattern generator allows synchronous gate on off and measurement e Setup memory to store programmed parameters e Solid state ranging for V and ranges All solid state connection e Programmable voltage and current clamps 256 utility bits available e Multiple source and measurement modes e Hardware calibration to an external reference The APMU requires that the following Teradyne software be installed on the test system computer e IG XL V3 40 03 or later and J750 Maintenance Software V7 20 02 or later APMU Modes of Operation The APMU can operate in the following modes e Force Voltage Mode e Measure Voltage Mode e Force Current Mode e Measure Current Mode Hardware Description 5 35 The basic ranges and functions of the voltage and current modes are as follows e Voltage force and
37. 2 nsert one ball lock into each of the 2 mounting holes in the fixture with the locating bushings 3 Tighten the setscrew in each ball lock to 32 inch pounds using the adjustable torque wrench and 1 8 hex wrench bit 4 Insert the remaining two 2 ball locks into the two 2 remaining mounting holes in the fixture 5 Tighten the setscrew in the remaining ball locks to 32 inch pounds using the adjustable torque wrench and 1 8 hex wrench bit 6 Replace the vacuum activation switch bracket onto the tester and secure using two 2 8 32 x 3 8 long Phillips head screws with external tooth washers and 8 flat washers Tighten the screws to 10 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 7 Replace the vacuum hoses onto the two 2 fittings on the fixture 8 Slide the clamps down the hoses and position them back over the fittings 9 Tighten the screw on each clamp to 8 S inch pounds using the adjustable torque wrench and medium slotted screwdriver bit 1 4 10 Replace the airflow shield onto the DIB fixture on the tester 11 Replace the DIB cover onto the tester and secure using the six 6 8 32 x 3 8 long black Phillips head screws and 8 lock washers Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit Fan Plate Assembly Removal and Replacement This section provides instructions for removing and replacing the fan plate ass
38. 2 3 l 24 volts l Utility Slave l l 4 5 6 l mhibt i Part of 405 924 00 Part of 405 925 00 Part of 405 920 00 Part of 405 924 00 E TE TA i ge God 10 36 oa l God l ov 3 6 9 2 l l3 6 9 1 gd el l Voltage l 8 105 volts I Ije 5s e nfl e 2 1 5 volts Master F l l l l 4 5 i 1 4 7 4 1 4 7 10 6 i 0 T ES 1 yl 5 6 Sense j C gt Sense e 36 10 15 34 V Pin ER ESTE E NH da Se ee Pin 4 V Share E rb re e e rn Pin 4 Ee E 7 1 4 1 4 1 2 3 l l 33 volt 33 volt 10 5 volts Slave l gas We l Inhibit inhibit 4o 5 6 TE 6 3 s H Al Tring gt Inhibit Sense Sense L Pind T 1 L Part of 405 920 00 Part of 405 325 00 F 001080A Figure 6 10 J750E Tester Power Supply sequencing flow diagram Negative Power Supplies and the Logic Option Board The Power One power supplies used in the J750E can be positive or negative depending on which output terminal is referenced to ground If the minus negative terminal is referenced to ground then the supply is used as a positive supply If the positive plus terminal is referenced to ground then the supply is used as a negative supply The internal logic which is used for power supply sequencing is referenced to the minus side of the power supply When the supply is used as a minus supply the logic levels for the supply would not have the correct reference Power one installs a l
39. 200 16A 10 10 000 50 9 950 10 050 lt 200 10A 36 36 000 100 35 900 36 100 lt 200 4 6A 34 34 000 100 33 900 34 100 lt 200 20A 405 924 00 10 5 10 500 50 10 450 10 550 lt 200 Master 160A 5 5 000 50 4 950 5 050 lt 200 90A 24 24 000 100 23 900 24 100 lt 200 Utility 33A Master 24 Turn the Vadj pot fully CCW and measure the voltage at the Utility 33A Master Slave 405 920 00 5 5 000 50 4 950 5 050 lt 200 250A 10 5 Turn the Vadj pot fully CCW and measure the voltage at the Slave O 20A Master Table6 2 J750E tester DC power supply specifications AC DC Power and Cooling 6 13 User Power Supplies User power supply voltages are generated on the Calibration Clock Utility Board CAL CUB and are brought to the Device Interface Board DIB via the tester s pogo pins Table 6 3 lists the specifications for the user supplies Noise Voltage Source Protection Active Specification mv PP 5 System 5 3 amp fuse on CAL Relay switched on 4 900 5 050 lt 200 3A volts CUB CAL CUB 24 System 24 1 amp fuse on CAL Relay switched on 23 80 24 10 lt 200 1A volts CUB CAL CUB 15 DC to DC DC to DC internally DC to DC 14 80 15 20 lt 200 1A from 24 limited converter enabled Limited on CAL CUB 15 DC to DC DC to DC internally DC to DC 14 80 15 20 lt 200 1A from 24 limited converter enabled Limited on CAL CUB 12 DC to DC DC
40. 23 900 24 100 lt 200 Utility 33A Master 24 Turn the Vadj pot fully CCW and measure the voltage at the Utility 33A Master Slave 405 920 00 5 5 000 50 4 950 5 050 lt 200 250A 10 5 Turn the Vadj pot fully CCW and measure the voltage at the Slave 20A Master Table 7 8 J750E tester DC power supply specifications 1 Record and file all measurements for future reference 2 If the DC voltage of any supply is not correct adjust the appropriate voltage adjust potentiometer as necessary until the voltage is within specification Note The 3 3 volt power supplies are in parallel and can not be adjusted like the rest of the supplies Adjust the 3 3 volt supplies as outlined in section Adjusting the 3 3 Volt Power Supplies on page 7 25 Maintenance 7 23 Note The 10 5 volt and 24 volt Utility power supplies in the J750E tester are also in parallel and can not be adjusted like the rest of the supplies Adjust the 10 5 volt and 24 volt Utility supplies as outlined in section Adjusting the J750E Tester 10 5 Volt and 24 Volt Utility Power Supplies on page 7 25 Adjusting the 3 3 Volt Power Supplies This section provides instructions for adjusting the 3 3 volt power supplies in the tester The following items are needed to adjust the 3 3 volt power supplies e Small slotted screwdriver 1 8 Perform the following steps to adjust the 3 3 volt power supplies 1 Turn the voltage adjustment
41. 36 long Teradyne Part Number 811 064 00 quantity 2 2 Conductor Shielded Banana Patch Cable 36 long Teradyne Part Number 81 1 063 00 e Black banana to banana cable length as required quantity 2 e Red banana to banana cable length as required quantity 2 e GPIB cable 2 3 or 4 meter length as required quantity 2 Maintenance Software 4 59 Run External LMF Calibration as follows Note The following instructions were written for running External LMF Calibration using J750 Maintenance Software V7 23 10 Instructions for using a different version of the J750 Maintenance Software may vary 1 Apply power to the Fluke 5790 AC Measurement Standard and allow it to warm up for a minimum of S hour 2 Place the Guard button on the meter to the Open position and the Terminals button to the Front position 3 Run the following J750 Maintenance Programs in the order listed as previously outlined in this chapter Note Ensure a valid CALCUBCAL TXT file is present in the C Program Files Teradyne IG XL Vx xx xx Tester folder of the test system computer before running the maintenance programs Note Vx xx xx refers to any version of IG XL installed on the test system computer Quick Check Module Check Internal Calibration Internal Performance Verification When External Calibration is complete a dialog box is displayed prompting you to remove the Cal DIB and install the MSO Cal DIB Figure 4 12
42. 4 power supplies Additionally there is a single fan located at the rear of each of the four 4 power supply modules mounted inside the tester DIB Vacuum Pulldown System The J750E uses vacuum to hold the Device Interface Board DIB onto the pogo pins at the output of the system electronics Guide pins align the DIB to the vacuum pulldown assembly The vacuum is engaged by a toggle switch located on the top of the tester The vacuum is generated from compressed air by two vacuum pumps located inside the tester The vacuum on the tester is automatically engaged by the Kinematic Docking System H the tester is so equipped Pogo Block Assemblies The pogo pins inserted into the pogo blocks provide the interface to the customer s hardware They attach to the relay boards which are mounted to the channel boards The pogo blocks are aligned and sealed against the tester s DIB fixture J750E Calibration This section provides an overview of the J750E calibration strategy Actual calibration procedures can be found in Chapter 4 Maintenance Software Calibration Overview Understanding the basic architecture of the J750E is helpful to understanding calibration Additional information on the J750E hardware and architecture can be found in Chapter 5 Hardware Description Calibration of the different J750E instruments is very similar The calibration of the CAL CUB will be used as an example to explain the calibration process CAL CUB Cal
43. 5 4 provide block diagrams of the CAL CUB Hardware Description 5 7 PTAS E PTAD PTCLK sad F 000786 tq 3 3 volts Control DC to Enable DC DIB ID Prom Control e 5 volts From ITAS Power System Fan Rotation Fan Power EY Supply sg 5 volts Power 5V DC 24V DC ITAD Monitor l4 10 5 volts Supplies sense level CLK gt l 24 volt return 5 volt Fan Plate Assy pase Fans lq 12 volts From DIB _ DIB Power HY ITDCLK lq 15 volts Supplies ES lq 24 volt Di Fan ich Bowe TCIO Data Monitor Rig t Power Interface Fans Supply Jacket All Fan Temp Sense D j OK p Syspwr Off XT System24 volt NOIA VAC Control Left Power 5 volts Supply Jacket 24 volts Fan Rotation DIB 5V DC 15 volts Power sense level 15volts Supplies 12 volts Figure 5 3 CAL CUB miscellaneous functions block diagram 5 8 J750E 512 Pin Test System Service Reference Manual Drive TCIO Edge Set Calibration Calibration Timing Strobe Pattern TCIO Generator Delay Generator Local Edge CLK 100 A Leading SYNC Edge Edge Delay Variable Reference Edge TCIO Gate Bus Strobe and Edge S Drive Set Array Strobe Memory Drive Calibration Pin
44. 800 837 23963 for toll free access where is the international dial access code for Israel For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Israel International charges will apply Italy 800 837 23963 for toll free access where is the international dial access code for Italy For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Italy International charges will apply Japan For Teradyne parts services dial 81 3 3719 0175 For GenRad parts services dial 81 3 5807 5670 For technical services dial 81 3 3719 0172 Tokyo 81 6 6369 0818 Osaka and 81 96 292 1416 Kumamoto Korea For parts services dial 82 2 549 9888 ext 475 For technical services dial 82 2 549 9888 10 6 J750E 512 Pin Test System Service Reference Manual Table 10 1 Telephone numbers for GCS centers Sheet 4 of 6 Country Telephone Malaysia 1 800 80 1524 phone or 00 800 TERADYNE 837 23963 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Malaysia International charges will apply Malta For toll free AT amp T Direct Access dial 800 901 10 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is
45. Alignment Gauge read a minimum of 20 inHg 10 Once the pins have been checked place the DIB vacuum switch on the tester to the UNLOCK off position 11 Remove the Clear DIB assembly from the DIB fixture on the tester Checking for Loose Pogo Blocks This section provides information for checking for loose pogo blocks in the J750E tester Do not touch the pointed ends of the pogo pins with bare fingers Always use the recommended tools Note Be sure to check the pogo blocks on all of the boards installed in the tester INCLUDING the airflow control boards Troubleshooting 9 11 Perform the following steps to check for loose pogo blocks Always wear a tested grounding strap while working on the J750E tester 1 Prepare the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Grasp the pogo block by the middle of the base see previous Figure 9 3 and using light pressure attempt to move the block in a side to side manner A properly seated pogo block will not move Checking for Damaged or Compressed Pogo Block O rings Perform the steps outlined in section Pogo Block O ring Inspection and Cleaning on page 7 17 of Chapter 7 Maintenance to check for damaged or compressed pogo block o rings Checking for Damaged or Compress
46. Cal Rider Card into Slot 7 for AC Calibration F 001033 Figure 4 18 AC Calibration Daughter Card installation prompt dialog box 22 Disconnect the cables from the DC Meter Daughter Card then remove the daughter card from the MSO Calibration DIB Place the card into a proper storage container to prevent ESD and physical damage 4 64 J750E 512 Pin Test System Service Reference Manual 23 Place the MSO AC Amplitude Accuracy Calibration Daughter Card Assembly Teradyne Part Number 445 015 00 onto the appropriate connectors on the DIB that represent the slot where the LMF module is installed in the tester 24 Click OK in the dialog box The LMF Amplitude Accuracy hook up dialog box is displayed on the screen Figure 4 19 shows the dialog box LMF Amplitude Accuracy Hook up xj LMF Amplitude Accuracy Hook up x Connect Inputlon the Fluke 57904 to J3 Connect Inputlon the Fluke 57904 to J1 Connect Wideband on the Fluke 57904 to J4 Connect Wideband onthe Fluke 57904 to J2 Dialog box for Dialog box for Slots 0 3 Slots 4 7 F 001034 Figure 4 19 LMF Amplitude Accuracy hook up dialog box 25 Connect one end of one of the 50 ohm SMA to N type RG142BU Cables Part Number 811 064 00 to the J1 or J3 connector on the daughter card as appropriate Note Use J1 if the LMF is installed in slots 4 7 and use J3 if the LMF is installed in slots 0 3 26 Connect the other end of the cable to the IN
47. Chapter 8 Repair Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer Check to see that the pogo blocks on the CAL CUB are not loose as outlined in section Checking for Loose Pogo Blocks on page 9 11 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair Remove the CAL CUB from the tester as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair Place the board on a proper anti static work surface Ensure that the card cage connector at the bottom of the board is mounted so that the bottom edge of the connector is parallel with the bottom edge of the board Replace the CAL CUB as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair Troubleshooting 9 17 Checking Airflow Control Boards Pogo Block O rings Check the Airflow Control Board Pogo Block O rings as follows Always wear a tested grounding strap while working on the J750E tester wech Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Check to see that the pogo blocks on the air flow control boards are not loose as outlined in section Checki
48. DIB when installing or removing it from the DIB fixture on the tester as follows Insert the banana plug end of the clip lead into one of the wrist strap ground jacks on the tester Attach the EZ hook end of the clip lead to the modified ground location Place the Cal DIB onto the DIB fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks Remove the clip lead or test lead from the board and the tester Routine Maintenance Procedures Maintenance 7 11 Routine Maintenance Procedures This section of this manual details instructions for performing routine maintenance on the J750E 512 Pin Test System The following sections are included e Environmental Checks e Personal Computer Checks e PIB DIB Cleaning e J750E Tester Checks e Vacuum Seal Inspection and Cleaning e Pogo Block O ring Inspection and Cleaning e Pogo Pin Inspection e Mechanical Checks e AC Power Checks e DC Power Supply Verification Environmental Checks Environmental conditions can greatly affect the performance of the J750E so it is critical to ensure that the operating environment of the tester meets the required specifications This section outlines the environmental checks that should be made on the tester Temperature and Humidity Checks The J
49. Editor utilizes many of the features available in Microsoft Excel to provide the user with the ability to perform cut copy paste and other similar editing functions The Pattern Editor is spreadsheet based Pattern Debugger The Pattern Debugger provides the user with a number of commands to assist the user during debugging These commands are available from the Debug pulldown menu The executed pattern data is stored in HRAM on the channel board to provide the ability to view the pattern during debug Excel Based Tools Data Tools The Data Tools are used to define the different components of the test program or workbook They are based on device data such as pin names specifications etc versus test instrument oriented programming Microsoft Excel is the user interface for the Data Tools 3 4 J750E 512 Pin Test System Service Reference Manual Debug Display Test instrument based graphical tool used to display and modify tester setup The tools use low level instrument drivers to communicate with the tester hardware Test Templates The Test Templates are a library of predefined test techniques They are written in Microsoft Visual Basic The templates provide easy to use source level debugging and allow code changes to be made without recompiling Production Controls IG XL contains the following Production Controls e Production Interface Tools e Handler Prober Communication Drivers Each control has a default GUI and
50. Family under Product Support Included in the list are circuit boards power supplies AC components mechanical parts cables and other various parts 10 1 Ordering Replacement Parts If your order requires immediate attention please call Do not send email for rush orders To order a replacement part call or send email to customercare teradyne com to the nearest Teradyne GCS center Refer to Table 10 1 to find the nearest Teradyne GCS center in your region Make sure you have the following information when you order a replacement part e Customer name and Teradyne customer number e Complete Ship To address and Bill To address if the transaction is billable e Customer contact and telephone number System serial number and system type e Teradyne part number and type of service desired Quantity required 10 2 J750E 512 Pin Test System Service Reference Manual Handling and Returning Parts Note To prevent shipping and electrostatic discharge ESD damage follow the parts handling procedure as described in this section All parts shipped from Teradyne s GCS centers are packaged in materials that protect them during transit Part of this protection includes antistatic packaging Teradyne recommends that you use the following antistatic precautions when you handle any parts Note If the part is packaged in a vacuum sealed antistatic bag do not open the bag until the part is ready for use
51. Figure 9 4 Pogo blocks 8 If any of the pogo blocks are the old style replace the pogo block as outlined in section Pogo Block Removal and Replacement on page 8 53 of Chapter 8 Repair 9 Reinstall the boards as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair Note Ensure that each board is properly seated and that the PCB spring ejectors are properly locked 10 Close the tester and re check the pogo block to see that it is properly seated 11 Visually inspect that each pogo block on all of the boards installed in the tester is centered in its cutout in the DIB fixture There should be equal spacing between each side of the block and the edge of the fixture in both the side to side and top to bottom 12 If any pogo block is off center gently re position the pogo block using your fingers so it is centered in the fixture Do not touch the pointed ends of the pogo pins when re positioning the pogo blocks 9 6 J750E 512 Pin Test System Service Reference Manual 13 Re run the failing test and if the same channel s fail run Quick Check Relay Test on the failing board Note When running Quick Check select only the CAL CUB and the channel board relay boards to work with the simplest system configuration possible 14 If Quick Check Relay Test fails perform the following Remove the Calibration DIB and clean the contact surface as outlined in section PIB DIB Cl
52. He Nan Hei Long Jiang Ji Lin Liao Ning Nei Mong Gu Shan Don Shan Xi Tian Jin 10 800 650 8223 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for China International charges will apply China Southern Provinces Anhui Chongquin Guangxi Zhuangzu Guansu Guizhou Hainan Hubei Hunan Jiangsu Jiangxi Qinghai Shanghai Sichuan Xinjiang Uygur Xizang Tibet Yunnan Zhejiang 10 800 265 8223 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for China International charges will apply Colombia For toll free AT amp T Direct Access dial 01 800 911 0010 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Colombia International charges will apply 10 4 J750E 512 Pin Test System Service Reference Manual Table 10 1 Telephone numbers for GCS centers Sheet 2 of 6 Country Telephone Costa Rica For toll free AT amp T Direct Access dial 0 800 011 4114 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Costa Rica International charges will apply Croatia For toll free AT amp T Direct A
53. Installation of this back up media relieves the service engineer of the manual reloading process All base software operating system and drivers are loaded After imaging the system must be loaded with the users choice of G XL versions and a license file This process now takes about 25 minutes to load the software about 5 minutes to load IG XL and about 15 minutes to configure the system for the J750E products Restoring Your Computer Before you use the backup media set please be aware that several options exists for the backup and restoration of the J750E computer platform The best method and the one recommended here is for the customer s Information Technology IT department to create and maintain a current image of each system Such a restore image should be made at an operational point that includes test programs user ids network and license information Consult with Teradyne TAG IT and the local System Administrator to determine if your site implements this Most facilities will have a site backup policy When repairing or restoring a computer performing a restoration using an up to date customer provided restore image will result in the shortest service time as licensing network information and configuration steps will be bypassed An alternative method on Windows XP systems is to set and use the Windows XP System Restore feature This allows certain computer files and settings to be returned to an earlier state Some difficult
54. J750E tester The J750E tester uses and can generate high power and high voltage in both AC and DC This chapter of the manual should be read and understood before any operation or servicing is performed This chapter contains the following information e General Safety Information e Safety Precautions e Safety Symbols and Labels e Definition of Terms e Lockout Tagout e Safety Hazards Materials Handling Specific Product Safety Information 2 1 General Safety Information WARNING These service instructions are intended for qualified personnel only To avoid electrical shock or physical danger do not perform any service other than what is described in this manual unless you have been properly trained and are qualified to do so DANGER This instrument is capable of producing potentially hazardous voltages Extreme care must be taken to ensure the safety of the operators and the service personnel Please read all safety information before attempting operation service or maintenance procedures F 000200 2 2 J750E 512 Pin Test System Service Reference Manual Safety Precautions Numerous features are incorporated into the J750E Test System to provide a base level of safety such as Grounded and or non conductive system covers which require tools for removal Safety warnings and information labels on the system where appropriate Detailed installation checkout and service documentation Additiona
55. P N 835 566 04 F 000894B Note WARNING The warning with wording is used to identify a non immediate electrical hazard or instructions of actions required to avoid a potential electrical hazard DANGER The danger label with wording is used to identify an immediate electrical hazard or instructions of actions required to avoid an immediate electrical hazard INFORMATION Used to identify specific areas of the test system that have important service or operating requirements that are documented in this manual Information symbols may have a yellow or white background Labels may be stand alone symbols words or combinations of both as appropriate Figure 2 3 Safety labels sheet 2 of 2 Safety Information 2 7 Definition of Terms Table 2 1 is a listing of terms as defined in the requirements of SEMI S2 0703 for Semiconductor Manufacturing Equipment IEC 417 for internationally recognized labeling and OSHA 29 CFR 1920 for U S recognized labeling that are used in this manual and other Teradyne J750 Product Support documentation Table 2 1 Terms and definitions Term Definition DANGER Hazard Present Before proceeding the user should refer to the service manual to avoid personal injury and or damage to equipment or Hazard is not immediate but extremely hazardous if a barrier is removed WARNING Potential Hazard Indicates possible dangers which may cause loss of life or physical i
56. RFID option and is mainly used to support debugging work The sampling clock for the capture unit is derived from the Strobe Frequency Source The Capture Unit is triggered by the Pattern OpCode start_capture After capture is started the sampled data is store into an user specified area of the capture memory starting from the StartAddr and ending at the StopAdar There is no OpCode to stop the capturing process The capturing process is stopped automatically when the StopAdadr is reached After the capturing process is completed the capture memory can be read out for further evaluation To read out capture data from a specified area the StartAddr must be loaded into the capture memory address counter The size of the capture memory is 1K StartAddr 0 StopAddr 1023 The Capture Unit is controlled by the Pattern Generator OpCode start_capture Therefore if the user does not program the OpCode start_capture in his pattern the Capture Unit will never be activated In one Pattern burst the user can program only one start_capture Figure 5 31 shows an example of a captured waveform Hardware Description 5 49 w Teradyne IG XL Waveform Display Rfld Capture Channel 392 AbsFwdDiff Bisi E File Edit View Tools Axes 13 12 5 12 Amplitude ch 13 l l 0 1e 005 2e 005 3e 005 Time sec Figure 5 31 Captured waveform DUT Input Capacitance Measurement These antenna pins of the RFID device are conne
57. Sacchann 1 5 None None None 81 07 2 Propylene glyco 1 5 None None None 57 55 8 erry hydroperoxide 1 5 None None 1 pom 6 mg m Skin WEEL 1 WARNING CAUSES EYE IRRITATION MAY CAUSE ALLERGIC SKIN REACTION MAY CAUSE SKIN IRRITATION MAY CAUSE RESPIRATORY TRACT IRRITATION Relevant routes of exposure Skin inhalaton Eyes Potential Health Effects Inhalation May cause respiratory tract irritation Skin contact May cause allergic skin reaction May cause sion irntation Eye contact Contact with eyes will cause irritation Ingestion Not expected to be harmful by ingestion item No 21463 Product name Loctite R 222 Threadiocker Low Strength 10f5 Safety Information 2 21 Loctite 222 Continued Existing conditions aggravated by Eye skin and respiratory disorders See Section 11 for additional toxicological information 4 FIRST AID MEASURES Inhalation Remove to fresh air If symptoms develop and persist get medical attention Skin contact Wash with soap and water Remove contaminated clothing and shoes Wash clothing before reuse Get medical attention symptoms occur Eye contact Flush with copious amounts of water preferably lukewarm water for at least 15 minutes holding eyelids open all the time Get medical attention Ingestion Do not induce vomiting Keep individual calm Obtain medical attention Flash point Greater than 93 C 200 F Taglisbue closed cup Autoignition temperature Not av
58. Secure the block to the board using two 2 each 4 40 x 3 8 long Phillips head machine screws and 4 lock washers Tighten the screws using the no 1 Phillips screwdriver 13 Repeat step 2 through step 4 and step 11 and step 12 for the other pogo block on the board if applicable 14 Reinstall the circuit board into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 Pogo Block O ring Removal and Replacement This section provides instructions for replacing pogo block o rings on the circuit boards installed in the J750E tester Note The pogo block o rings should be replaced on an as needed basis The following items are required to replace the pogo block o rings e RTV 159 Teradyne Part Number 479 094 21 e Pogo block o rings Teradyne Part Number 234 615 00 e Isopropyl alcohol e Foam tip swab Perform the following steps to replace the pogo block o rings Always wear a tested grounding strap while working on the J750E tester 1 Remove the circuit board that needs the pogo block o rings replaced as outlined in section Removing Circuit Boards on page 8 11 2 If applicable remove the circuit board from its storage container and place it on a proper anti static work surface with the pogo block facing up Use extreme care not to damage the pogo block or the pogo pins when removing the o ring and adhesive from the pogo block Repair 8 55 3 Remove the old o ring and adhesive f
59. Selection Deselection area of the maintenance interface changes color as follows Blue Board is presently being tested Maintenance Software 4 53 Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the Performance tab displays the date and time of the last test as well as the overall test results pass or fail 11 Once testing is complete select Save from the File pulldown menu in the Test Program Output window The log is saved to the file previously created 12 Run additional Performance Verification as desired or proceed to the appropriate section of this chapter for the particular maintenance program you want to run 13 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 14 Place the DIB vacuum switch on the tester to the UNLOCK off position 15 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 16 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage 17 If no additional instruments need to be calibrated select Exit from th
60. Service Reference Manual Calibration and Performance Verification This section provides an overview of the hardware and software that are used to perform Calibration and Performance Verification of the J750E tester It also includes a basic functional description of the following individual procedures e External Calibration e External Performance Verification e Calibration Internal e Performance Verification Internal The calibration circuitry of the Calibration Clock Utility Board CAL CUB is described in Chapter 5 Hardware Description Introduction Tester calibration is performed to determine the correction factors for the tester hardware to ensure tester performance meets published specifications To perform calibration a Calibration DIB Cal DIB is placed onto the tester instead of the normal customer DIB The Cal DIB contains relay switch matrix circuitry that connects the calibration and measurement circuitry and references on the CAL CUB to the tester hardware that is being calibrated The circuitry required for calibration is located on the CAL CUB Cal DIB and the CTO The basic calibration principles are as follows The CAL CUB contains highly accurate reference circuitry that is used as a source orto measure the J750E hardware that is being calibrated The Cal DIB provides a path from the CAL CUB to the hardware in the tester that is being calibrated When a maintenance program is loaded all offsets are set to z
61. The Agilent HP 3458A Instrument Driver is used to operate the Agilent or HP multimeter model 3458A Agilent HP 3458A multimeter This software is installed after installing the National Instruments GPIB Software for Windows GPIB Board Driver and before using the Agilent HP 3458A multimeter The Agilent HP 3458A software must be installed to run the External Calibration maintenance program This driver has been incorporated into IG XL version V3 40 00 or greater so installation of the driver software is not required Agilent HP 53181A Instrument Driver The Agilent HP 53181A Instrument Driver is used to operate the Agilent or HP frequency counter model 53181A Agilent HP 53181A frequency counter This software is installed after installing the National Instruments GPIB Software for Windows GPIB Board Driver and before using the Agilent HP frequency counter The Agilent HP 53181A software must be installed to run the External Performance Verification maintenance program This driver has been incorporated into IG XL version V3 40 00 or greater so installation of the driver software is not required Software Description 3 11 PCIT Driver The PCI board is the interface between the PC and the J750E It interfaces between the local bus in the PC and the TCI bus on the CUB It is installed in the PC The current PCIT board is Teradyne part number 939 360 00 The 939 360 00 board started shipping in the xw8200 computer This new board is f
62. Voltage To minimize errors in measuring small currents a guard signal is supplied from a Guard Buffer The Guard Buffer circuit does not have a disconnect relay because it is not connected to the Device Under Test DUT It does have impedance in series with its output to protect it from fault conditions Device Ground Sense DGS Ground differentials can cause errors in the voltage applied to the DUT Device Ground Sense DGS is used to sense the ground potential at the DUT and is summed into the DPS programmed voltage to correct it for possible ground offsets Each channel in the tester has its own DGS Output Voltage Output voltage V out is set by a 12 bit Digital to Analog converter DAC Programmable Voltage Control The output voltage can be set to a primary voltage or to an alternate voltage The Alt Select line allows fast switching between the primary and the alternate voltage Data Acquisition A 12 bit Analog to Digital converter digitizes all data A 32 channel multiplexer brings in signals from all 8 channels TCIO Interface and Control The digital hardware includes a Test Computer Input Output TCIO interface and SRAM to store values for voltage current limits and other setup parameters Measured values status and board IDs are returned via the TCIO Parallel Configuration The DPS allows the user to connect up to 8 channels together in a parallel configuration to achieve higher output currents In the parall
63. ________ Master Clear Power OK lt Power OK Lu 3 3 valts to PCI SYNC1 8 DATA1 gt gt Local CLK50 e q gt el x SYNCO amp DATAO e FPGA TCIO 1 SYNC amp DATA gt 2x16 TCIO Clock gt FIFO lt d 1 TCIO 0 SYNC 8 DATA gt 2x16 gt gt gt FIFO lt g SYNCO amp DATAO cd CAL CUB F 000165 20 paths equal length to all Channel Boards and CTOs Equal length paths to all boards Lower Backplane Channel Boards and CTOs Called Bus A and B on CAL CUB and Lower Backplane Both TCIO busses 0 and 1 are distributed TCIO Clock is differential LVPECL SYNC and DATA change on the falling edge of TCIO Clock SYNC and DATA are single ended LVPECL RDATA is active LOW single ended GTL SYNC and DATA 222 Clock I m Upper Backplane DPSs Called Bus C and D on CAL CUB and Upper Backplane Only TCIO 0 is distributed TCIO Clock is differential LVPECL SYNC and DATA change on the rising edge of TCIO Clock SYNC and DATA are single ended LVPECL RDATA is active HIGH single ended GTL SYNC and DATA X X X Clock f EA Figure 5 6 TCIO CAL CUB signal path block diagram TCIO Distribution to the Backplanes Once the CAL CUB receives the two TCIO buses from the PCI it resynchronizes them to a local 50MHz clock using a synchronization FIFO located on the C
64. a a aise 36 ARES o era a EE AE 36 Other Safety and Regulatory Information ooonnnnnnncccnnnnnnnccccccnncnnnnananannncnonnnnnnccnnnnn 2 36 Prot ctive e 36 Electrostatic Discharge ESD aaa e Ea aa aa e aE e ieoor iapa aini 36 Electromagnetic and Radio Frequency Interference oooooconocnnnnconoonconnconocnonnnnnnonn conc conc rnncnn cnn non nc onn conc cnn coronan 37 Electrostatic Discharge ESD Damage Prevention and Control 2 37 Software Description NR le ea UG XL MM EE 3 2 Pattern TOS ias 3 3 Pattern Compilere soseen meea e oea a oE S S e E SEE EENE OE EEEN EAS A tutes cen hous aged ens 3 Patter Editor oseere ehee i e A e a aa e E 4 Pattern Debus ternura E AE ee a eI ce EEN 4 Excel Based Tod EE 3 4 Data Tols Xi A A Ai 4 Debug Display tit i 5 Test Templates is 5 Producto Rule e EE 3 5 Production Interface Tools 5 Handler Prober Communication Drivers 5 Device Program ee ee 3 5 Data Tool Proust id a 6 Data Tool Mores Te a a a a ieh 6 Home Sheet 7 Job List Sheet 7 Flow Table Sheet 7 Pin Map Sheet 7 Channel Map Sheet 7 Errors Sheet 7 Global Spec Sheet 7 AC or DC Spec Sheet 7 Pin Levels Sheet 7 Time Sets Basic Sheet 8 Test Instances Sheet 8 Time Sets Sheet 8 Edge Sets Sheet 8 Pattern Sets Sheet 8 Pattern Group Sheet 8 IG X1 Context Toolbar tdi Ee 8 Active Job 8 Active Channel Map 8 Active Part 8 Active Environment 8 Spec Category 9 Spec Selector 9 IG XL Debus Tools iaa egc 9 Visual BA a 9 Proj
65. and Calibration Schedule Checklist Every Every Every 6 Every Year As Month Quarter Months required Tester Checkers and Calibration Quick Check X Module Check X Calibration Internal Xx Performance Verification X Internal Instrument External Calibration and Performance Verification CAL CUB External Xx Calibration CAL CUB External X Performance Verification CTO External Calibration X CTO External X Perfomance Verification MSOExternal Calibration APMU External Calibration Maintenance 7 5 ESD Precautions The following ESD precautions should be taken whenever work is being performed on the J750E tester e Always wear a tested grounding strap while working on the J750E tester e Ground the Calibration DIB or Customer DIB to prevent from having to restart IG XL after installing or removing the DIB from the DIB fixture on the tester as follows Grounding Calibration and Customer DIBs Note This procedure requires the use of a custom constructed ground wire The following section outlines one way to construct the ground wire other methods may also be used Constructing the Ground Wire The following items are required to construct the ground wire e A piece of flexible insulated stranded wire between 2 feet 0 6 meters and 20 feet 6 meters long A male banana jack A clip lead or other similar device to connect to the DIB An option
66. apply Ukraine For toll free AT amp T Direct Access dial 8 100 11 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the Ukraine International charges will apply United Arab Emirates For toll free AT amp T Direct Access dial 800 121 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for United Arab Emirates International charges will apply 10 8 J750E 512 Pin Test System Service Reference Manual Table 10 1 Telephone numbers for GCS centers Sheet 6 of 6 Country Telephone United Kingdom 800 837 23963 for toll free access where is the international dial access code for the United Kingdom For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the United Kingdom International charges will apply United States 1 800 837 2396 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the United States International charges will apply Singapore 1 800 837 2396 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Singapore Inte
67. as needed Initially a splash screen will appear when the system is loaded for the first time instructing you to wait while Windows prepares to start Wait for about 1 one minute for the Windows XP logo screen to appear When the Welcome to Microsoft Windows prompt appears click Next Next displayed are the end user license agreements Read and if agreed check I accept for both Some systems require that the System Settings be updated If this is the case then set them as follows Region United States Language United States Keyboard US Time Zone Your local time zone End User License Agreements Read understand and if agreed check Yes accept for both of these Help Protect Your PC Select Not Right Now This allows you to manually install select patches and updates at your discretion Many customers may want leave automatic updates on however If unsure check with the site System Administrator for preferred settings Computer Name Enter the computer name and description Your System Administrator may have a specific name for this system Administrator Password On J750E systems enter 1Teradyne This should be preset on all J750E systems Network Connection Repair 8 61 The system will attempt to search for a Network connection With both network lines disconnected it should not find one You may press Skip to bypass this step Select Yes if prompted to enter whether the com
68. been created and saved proceed to section List of Software on page 9 32 Note Save the document to the same drive or directory location where the Windows Diagnostic Report and Event Logs were saved List of Software Create a text document that lists all of the software that is installed on the computer using Microsoft Word or Windows Notepad The list should contain e Software title and version or revision information Be sure to include tester specific and non tester specific software Note Save the document to the same drive or directory location where the Windows Diagnostic Report and Event Logs were saved 9 32 J750E 512 Pin Test System Service Reference Manual Replacement Parts The Replacement Parts chapter of this manual describes how to order handle and return replacement parts to the Teradyne Global Customer Services GCS centers Each GCS center covers a specific region To find the nearest Teradyne center in your region refer to Table 10 1 and Table 10 2 The following information is covered in this chapter e Ordering Replacement Parts e Handling and Returning Parts A list of Field Replaceable Units FRUs for the J750E 512 Pin Test System can be found in the Enhanced J750 512 Pin Test System Product Support Parts List Teradyne document number J7MD0012 available on the eKnowledge Technical Support web site you must be a registered user with password The document is located in the J750
69. can be confirmed to be greater than 20 inches of mercury at the vacuum gauges mounted outside the tester or the vacuum pumps inside the tester 3 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 4 Check that the pogo pins are not damaged bent broken or stuck and that they are free of debris 5 Verify that all of the pogo blocks are properly seated in the DIB fixture by attempting to move each one Do not touch the pointed ends of the pogo pins with bare fingers Always use the recommended tools 6 Grasp the block by the base see Figure 9 3 and using light pressure attempt to move the block in a side to side manner A properly seated pogo block will not move 9 4 J750E 512 Pin Test System Service Reference Manual Grasp the pogo block near the black base between the thumb and index finger Do nottouch the tips of the pogo pins FO00147A Figure 9 3 Properly holding the pogo block 7 If any of the pogo blocks move remove the board with the moving pogo block as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair and verify that all of the boards have the new style pogo blocks installed Figure 9 4 shows the difference between the old and new style pogo blocks Troubleshooting 9 5 Old Style New Style Pogo Block Pogo Block F 000893
70. clamp on the two 2 vacuum hoses using the medium slotted screwdriver 1 4 Slide the clamps up the hoses away from the fittings then remove the hose from each of the fittings Remove the two 2 8 32 x 3 8 long Phillips head screws with external tooth washers and 8 flat washers from the vacuum activation switch bracket using the no 2 Phillips screwdriver then remove the bracket from the tester Figure 8 2 shows the location of the bracket and mounting hardware 8 16 J750E 512 Pin Test System Service Reference Manual Setscrew Ball Lock 4 places Bracket Mounting Hardware Vacuum Activation Vacuum Activation Switch Bracket Switch F 000098 Note Vacuum activation switch and bracket configuration may be different from those shown Figure 8 2 DIB Fixture Assembly removal and replacement 7 Loosen the setscrew on the four 4 ball locks approximately 2 turns using the 1 8 hex wrench then remove the locks from the DIB fixture assembly Previous Figure 8 2 shows the location of the one of the ball locks and setscrew 8 Remove the DIB fixture assembly from the tester 9 Proceed to section Reinstalling DIB Fixture Assembly on page 8 17 as appropriate Reinstalling DIB Fixture Assembly Perform the following steps to reinstall the DIB fixture assembly onto the tester Always wear a tested grounding strap while working on the J750E tester Note Prior to installation check
71. clean the vacuum seals as follows Always wear a tested grounding strap while working on the J750E tester 1 Ensure that the tester is fully undocked and a sufficient distance from the mating equipment 2 Position the tester so that the DIB mounting surface faces up Always ground the Customer DIB or Calibration DIB when installing or removing it from the DIB fixture on the tester 3 Properly ground the Customer DIB or Calibration DIB Place the DIB vacuum switch on the tester to the UNLOCK off position 5 Remove the Customer DIB or Calibration DIB from the tester if necessary then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage 6 Visually inspect the vacuum seals on the DIB fixture assembly Ensure that the seals are not cut damaged or compressed at the DIB fixture assembly surface E Maintenance 7 15 A good seal sits higher off of the DIB fixture surface than a compressed or flatter one Figure 7 5 shows examples of a compressed or flatter seal and a good oval seal DIB Fixture Surface Compressed or Good Oval Flatter Seal Seal F 000317 Figure 7 5 Vacuum seal examples 7 If the seals are cut damaged or compressed replace them as outlined in section Vacuum Seal Removal and Replacement on page 8 45 of Chapter 8 Repair Use care to not damage or get alcohol on the pogo pins when cleaning the seal 8 Moisten a lint f
72. continuity test failures The following items are required to clean the interface boards Presaturated IPA Wipe Teradyne Part Number 361 160 00 or isopropyl alcohol and a clean dry lint free cloth Clean the interface boards as follows 1 Always wear a tested grounding strap while working on the J750E tester Do not use an eraser or any other abrasive cleaner to clean boards If applicable remove the interface board from the tester mating equipment or from its storage container 7 14 J750E 512 Pin Test System Service Reference Manual 2 Place the interface board contact side up on a proper anti static work surface Note Be sure to support the board so that any components mounted on the opposite side of the board do not get damaged 3 Clean the contact areas off the board using the IPA wipes or alcohol and a clean dry lint free wipe 4 Once the board has dried it may be returned to service or storage J750E Tester Checks Refer to Chapter 4 Maintenance Software for instructions on performing checks on the tester Vacuum Seal Inspection and Cleaning The vacuum seals on the DIB fixture assembly should be inspected and cleaned on a regular basis It is highly recommended that the seals be inspected weekly and be cleaned whenever a DIB is removed from the tester The following items are needed to inspect and clean the vacuum seal e Lint free cloth e Isopropyl alcohol Inspect and
73. copy of the CurrentConfig txt file is created 21 Right click the copy of the CurrentConfig txt icon in the file list The File Options pulldown menu is displayed 22 Select Rename from the menu The file name is highlighted in the file list 23 Rename the file as appropriate then press Enter Note Itis highly recommended that you save the file to the same directory using a name very similar to the original name That way the renamed file will be easy to find when you need to locate it 24 Close Windows Explorer 25 Proceed to section Shutting Down the Computer System on page 8 7 as appropriate 8 6 J750E 512 Pin Test System Service Reference Manual Shutting Down the Computer System Prior to performing any repairs on the tester H is highly recommended that you shut down the personal computer as follows 1 Close the Windows operating system Turn off power to the computer CPU and monitor Turn off the two 2 auxiliary circuit breakers CB3 and CB4 at the rear of the power vault H appropriate disconnect the power cables from the auxiliary outlets J2 and J3 at the rear of oa SS Go PP Close all open applications that are running on the test system computer the power vault H appropriate disconnect the cables from the rear of the computer Proceed to section Shutting Down the Tester and AC Power Vault on page 8 7 as appropriate Shutting Down the Tester and AC Power Vault Prior to pe
74. digital channel s comparator knowing the electrical length of the RF matrix to that channel Similarly we can use the master comparator to measure the digital channel s driver Pin Electronics Skew A digital channel s drive edge value is the sum of the programmed edge value the period residue and the format specific rise fall edge deskew value A digital channel s receive edge value is the sum of the programmed edge value the period residue the format specific rise fall edge deskew value and the round trip delay The period is set to multiples of 20ns zero residue as the SLI does not process residues the drive receive edge deskew registers and the round trip delay registers are set to zero and measurements are made to determine where an edge is relative to where it should be The difference of the measured value and the expected value for each edge transition is stored in the calibration data file 4 14 J750E 512 Pin Test System Service Reference Manual Drive Edge Skew The digital channel driver sends a signal through the RF matrix on the Cal DIB to the master comparator on the CAL CUB Digital channel drive edges TGO TG1 TG2 TG4 TG5 and TG6 are observed over two cycles in Normal timing mode for rising and falling edge transitions at 50 of 3 volt waveform The master comparator and SLI measure each digital channel s drive edge transition The digital channel s RF matrix delay value is subtracted from each measur
75. e xw8200 The W8000 has dual 1 7 or 2 2 GHz Pentium processors and either a single 18 GB Small Computer Standard Interface SCSI hard drive or 36 GB SCSI hard drive The xw6000 has dual 2 4 GHz Pentium processors and a single 36 GB Small Computer Standard Interface SCSI hard drive The current computer found on J750E systems is the Compaq xw8200 The xw8200 has dual 3 4 GHz Pentium Xeon processors and a single 74 GB Serial ATA SATA hard drive Field Replaceable Units FRUs All plug in boards memory storage drives motherboards and power supplies are field replaceable units FRUs See Figure 5 1 Certain chassis parts and the CPUs are not field replaceable units FRUs In the event that troubleshooting to the FRU level is not possible or is unsuccessful the entire computer is available as a FRU 5 2 J750E 512 Pin Test System Service Reference Manual Display Optical BE es Video Ser 55 o Floppy tono BA CALCUB PCIT Card am P p To External conja Devices CR GPIB Card aa fp To LAN Keyboard ao Ethernet Card o gt Adapter Mouse F 001167 Figure 5 1 Computer and peripherals The computer is essentially a self contained unit It has its own internal power supply that operates from 11
76. edge of the DIB fixture assembly Note Do not stretch the new seal before or during the installation process The seals can become easily deformed and cause vacuum problems 8 Orient the new vacuum seal so the joint on the seal is positioned along the flat side of the DIB fixture Figure 8 10 shows the seal joint properly positioned on the fixture Vacuum Seal Joint F 000712 Figure 8 10 Vacuum seal joint position 8 46 J750E 512 Pin Test System Service Reference Manual 9 Press the lip of the new seal into the groove in the outside edge of the DIB fixture assembly Note It is usually easier to start the seal at the corner of the fixture to ensure that the seal is properly positioned in the groove Note Ensure that the seal is fully seated into the groove of the DIB fixture along the entire length of the seal The seal will self seal when the vacuum is reapplied to the tester Channel Board Relay Board Removal and Replacement This section provides instructions for replacing the relay boards on a J750 channel board The following tools are required to replace the relay boards e 5 32 nutdriver Teradyne Part Number 361 553 00 Removing the Relay Board Perform the following steps to remove the relay board from the channel board Always wear a tested grounding strap while working on the J750E tester 1 Remove the channel board that needs the relay board replaced as outlined in sec
77. flat washers 5 16 split lock washers and 5 16 hex nuts onto the bus bar mounting bolts on the 3 3 volt power supplies Tighten the nuts to 156 inch pounds using the adjustable torque wrench and S socket 11 Recheck all wiring to ensure all of the connections are correct 12 Re secure the power supply wires and cables with tie wraps as appropriate then cut off the excess portion of the tie wrap using the side cutters 13 Reapply power to the tester and check all voltages of the replaced supply at the power supply sense lines Adjust any voltage that is out of specification as outlined in section DC Power Supply Verification on page 7 22 of Chapter 7 Maintenance before reinstalling any boards into the tester 14 Shut down the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 then reinstall the circuit boards as outlined in section Reinstalling Circuit Boards on page 8 14 15 Recheck the voltage of the replaced supply at the power supply sense lines Adjust any voltage that is out of specification as outlined in section DC Power Supply Verification on page 7 22 of Chapter 7 Maintenance 16 Close the doors of the tester replace the EMI Dust cover then position the tester so that the DIB mounting surface faces up Power Supply Module Removal and Replacement This section provides instructions for removing and replacing the individual power supply modules from the mounting straps and handle
78. for complying with and shall otherwise assume all liabilities that may be imposed in connection with any legal requirements adopted by any governmental authority related to Directive 2002 96 EC of the Euro pean Parliament and of the Council on Waste Electrical and Electronic Equipment dated January 27 2003 or otherwise mandating waste col lection treatment recovery disposal financing or related obligations in connection with the Products Customer shall defend indemnify and hold Teradyne harmless from any damage claim or liability relating thereto At the time Customer desires to dispose of the Products Customer shall refer to and comply with the specific waste management instructions and options set forth at http www teradyne com corp env_pol html as the same may be amended by Teradyne Credits and Trademarks TERADYNE logo is a registered trademark of Teradyne Inc Other product names mentioned in this document may be trademarks of their respective companies and they are mentioned here for identifica tion purposes only Table of Contents About This Manual Viewing This Manual Online E iii xvii Additional Documentation iii xvii Revision History System Overview AB A 8s tessiatads lam eiecettnaatt Ate saueas chat gal bduts tees ceet dnb ase nd ata Uda ta 1 2 Keel E 1 3 Card Cage Assemb Y EENS EENS ENEE EE 6 CAU Boards e do eae 6 DC Power Supplies ii is A A as 7 CooOlne sit iii 8 DIB Vacuum Pulldown Systemi sinne
79. gt TDR_1 VOL DAC gt Electronics CUB VOH DAC rk Relays Ranges VIL DAC FR VIH DAC P DGS DGS from BDGS Buffer CAL DIB mg SE EEN DIB Relay Select A D Converter D A Converter A DIBS Voltage Differential ene S i Voltmeter Resistor K T gt DIBF Gnd Ranges gt CALI Measurement Measurement High Low g Other Inputs F 000168 Figure 5 4 CAL CUB calibration block diagram Hardware Description 5 9 Test Computer Input Output TCIO The source of all TCIO communications is the Test Computer Interface TCI ASIC which is located on the PCI board TCIO Buses There are five TCIO serial buses available on the TCI chip The first serial bus TCIO_O is designated for control It has a single return data line For this reason it is sometimes referred to as Tcntl The remaining four buses TCIO_1 2 3 and 4 each have two return data lines sometimes referred to as TdataA TdataB These buses can be programmed to use one or both return data lines for reading data These four buses are useful for performing block data transfers from the tester back to the host computer because they have the ability to transmit data twice as fast as TCIO_O The J750E tester presently uses only two TCIO buses TCIO_O and TCIO_1 one for control TCIO_O and one for block transfers TCIO_1 which for now come only from the MTO Cable Connections The TCIO bus signals are sent from the PCI board in the test system computer to t
80. if a channel board is replaced in the tester In this instance a full AC Calibration must be performed as a minimum 10 Run additional Calibration as desired or proceed to the appropriate section of this chapter for the particular maintenance program you want to run 11 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 12 Place the DIB vacuum switch on the tester to the UNLOCK off position 13 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 14 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage AC Calibration Run AC Calibration as follows Always wear a tested grounding strap while working on the J750E tester Note Do not run Calibration on a tester that is not in known working condition Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded 1 Place the tester so that the DIB mounting surface faces up 2 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester 3 Place the DIB vacuum switch on the tester to the LOCK on position Maintenance Software 4 49
81. in the Hardware Selection Deselection area of the maintenance interface 9 Click Start Continuity Check starts and the test results display in the Test Program Output window Note The results are color coded as follows Red Test Failures Blue Suggested fixes for identified failures Note The window updates to display results of individual tests as they are run Once the testing is complete the ModuleCheck tab displays the date and time of the last test as well as the overall test results pass or fail 10 To run additional maintenance programs proceed to the appropriate section of this chapter for the particular maintenance program you want to run 11 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 12 Place the DIB vacuum switch on the tester to the UNLOCK off position 13 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 14 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage 4 42 J750E 512 Pin Test System Service Reference Manual Running Quick Check The following equipment is recommended to run Quick Check e J750 512 Calibration Device Interface Board Ca
82. measure 2V 5V 10V 35V e Current force 40uA 200uA 1mA 5mA 50mA e Current measure 2uUA 20uA 200UA 1mA 5mA 50mA e Resolution 16 bits e Programmable bandwidth Force 2 5kHz 25kHz Measure 20Khz 200KHz e Vforce l measure 50kHz sample rate e Measurement averaging capability Programmable periods and times Max 8K samples pin e Full 4 quadrant e Ganging capability Up to 400mA e Full solid state connection No mechanical relay Fast setup fast calibration fast checker e Low current measure 200nA range 0 2 2nA accuracy e Voltage measure 2V 5V 10V 35V e Voltage resolution 16 bits e Selectable bandwidth Pass or 20kHz LPF e Measurement averaging capability Programmable periods and times Max 8K samples pin e Per pin ADC for fast parallel measurement Figure 5 17 shows a schematic diagram of the Force Voltage Mode and Figure 5 18 shows a schematic diagram of the Measure Voltage Mode of the APMU channel e Voltage force and measure 2V 5V 10V 35V 5 36 J750E 512 Pin Test System Service Reference Manual R5 R6 Buffer 10 0K 40 0K V_IN R4 15 0K R3 e 2 50K FORCE V OUT R2 1 50K R1 1 00K F 000956 Figure 5 17 Force Voltage Mode schematic diagram Buffer V_Sense R9 250K R10 100K R11 50 0K R12 12 5K 40 0K BDGS Merl Measured V F 000857 Figure 5 18 Measure Voltage Mode schematic diagram Figure 5 19 shows a schematic diagram of the Force Current Mode o
83. meter must also be configured as an IEEE 488 interface to ensure proper communication between the meter and the personal computer 4 Check and set the meter interface configuration as follows e Press the Shift lt On Off keys to turn on the front panel menu e Press the lt key twice two times to access I O Menu selection e Press the v gt keys to access Interface selection e Press the v key to access the parameter level to set the address e Use the lt gt keys to change the interface configuration as required e Once the interface has been configured to IEEE 488 press the Auto Man Enter key to save the address and turn off the front panel menu 4 34 J750E 512 Pin Test System Service Reference Manual 5 Perform a self calibration of the meter by pressing the Auto Cal button then the Enter button on the front panel of the meter Note Self calibration takes about 12 minutes to complete 6 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 7 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester 8 Place the DIB vacuum switch on the tester to the LOCK on position 9 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 10 Remove the ground connection from th
84. module Screw Location 3 places F 000983 Figure 8 6 Input power module captive screw location 12 Disconnect the connector of the input power module from the connector on the operator control harnessFigure 8 7 shows the location of the connectors 8 38 J750E 512 Pin Test System Service Reference Manual Input Power Module Transformer Input Power Module Connector F 000665 Figure 8 7 Input power module operator control harness connectors 13 Unplug the two 2 9 pin Molex connectors from input power module from the mating connectors on the tester housing 14 Slide the power module up and out of the tester housing 15 Remove the 10 32 external tooth hex locknut attaching the two 2 ground wires to the input power module using the socket wrench and 3 8 socket then remove the ground wires attached to cover from module 16 Place the input power module on a proper anti static work surface and proceed to section Reinstalling Input Power Module Assembly on page 8 39 as appropriate Reinstalling Input Power Module Assembly Perform the following steps to reinstall the input power module assembly 1 Obtain a blank serial number label and record the data from the label on the old input power module onto the new label Figure 8 8 shows a factory created label MODEL J750 SERIAL 0006004 208 Ki 3 fs 50 60 ks MADE IN BOSTON MASS US A F 001000 Figure 8 8 J750E tester se
85. particular maintenance program you want to run 13 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window 14 Power down the Agilent or HP multimeter then disconnect it from the power source Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 15 Place the DIB vacuum switch on the tester to the UNLOCK off position 16 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 4 40 J750E 512 Pin Test System Service Reference Manual 17 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage Running Continuity Check If J750 Maintenance Software version V7 23 00 or greater is installed run Continuity Check as follows The following equipment is required to run Continuity Check e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate Run Continuity Check as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded Note Before running Continuit
86. potentiometer on the 3 3 volt Slave power supply fully counter clockwise Previous Figure 6 7 shows the location of the supply and the voltage adjustment potentiometer 2 While measuring the voltage at the sense lines on the 3 3 volt Master power supply as outlined in section Measuring Power Supply Output Voltage on page 7 22 adjust the voltage adjustment potentiometer on the Master supply until the voltage is within specification Previous Figure 6 7 shows the location of the supply and the voltage adjustment potentiometer Adjusting the J750E Tester 10 5 Volt and 24 Volt Utility Power Supplies This section provides instructions for adjusting the 10 5 volt and 24 volt Utility power supplies in the J750E tester The following items are needed to adjust the 10 5 volt and 24 volt Utility power supplies e Small slotted screwdriver 1 8 Adjusting the J750E Tester 10 5 Volt Power Supplies Perform the following steps to adjust the 10 5 volt power supplies in the J750E tester 1 Turn the voltage adjustment potentiometer on the 10 5 volt Slave power supply fully counterclockwise Previous Figure 6 5 shows the location of the supply and the voltage adjustment potentiometer 2 While measuring the voltage at the sense lines on the 10 5 volt Master power supply as outlined in section Measuring Power Supply Output Voltage on page 7 22 adjust the voltage adjustment potentiometer on the Master supply until the voltage is within specificatio
87. repair activity should be recycled in accordance with factory guidelines and local regulations whenever practical Test system packaging materials should be recycled in accordance with factory guidelines and local regulations whenever practical Safety Information 2 25 Specific Product Safety Information This section of the manual contains detailed product and safety information needed to properly identify turn on and service the J750E 512 Pin Test System as required by regulation and unique system characteristics System Identifiers Model Designation Located on a label attached to both the left and right sides of the tester System Serial Number Located on a label attached to the left of the input power cable at the rear of the tester AC Mains Power The J750E 512 Pin Test System has an input AC power label located at the main AC input which is located at rear of the J750E above the fan plate assembly AC power requirements out of the AC Power Vault e 208 VAC e 3 phase Wye and neutral e 15 5 KVA total maximum e 110 VAC AC power requirements into the AC Power Vault e 190 to 480 VAC 50 or 60Hz e 3 phase delta plus ground or 3 phase Wye plus ground and neutral e 18 KVA total maximum e 120 VAC 50 or 60Hz e Single phase 6 amps AC Mains Connection Teradyne recommends hard wiring the AC input cable using flexible conduit or Electro Magnetic Transmission EMT covering the cable System entry for the main inpu
88. revision A Calibration DIBs ground the board as follows Note This procedure requires the use of the clip lead with an EZ hook on one end and a banana plug on the other end e Insert the banana plug end of the clip lead into one of the wrist strap ground jacks on the tester e Attach the EZ hook end of the clip lead to the pin on the J3 header that is closest to the star patterned circuitry marked W3 on the board Figure 7 2 shows the location of the ground pin on the board Connect EZ Hook here W3 Star Ge Patterened Circuitry F 000064 Figure 7 2 Revision A Cal DIB ground pin location 7 8 J750E 512 Pin Test System Service Reference Manual 3 For revision C or greater Calibration DIBs ground the boards as follows Note This procedure requires the use of the banana to banana test lead Insert one end of the test lead into one of the wrist strap ground jacks on the tester Insert the other end of the test lead into the black banana jack on the DIB marked VOLTAGE Figure 7 3 shows the location of the VOLTAGE jack on the board EUR WW PIECI IS A ae wm END a a Ce LW Se we RR Dan San og ee i Adalid dhiii i F Dr Ip up mm Win E ach VOLTAGE Jack F 000104 Figure 7 3 Revision C or greater Cal DIB VOLTAGE jack location 4 Place the Cal DIB onto the DIB fixture on the tester 5 Place the DIB vacuum switch on the
89. scope with 20MHz bandwidth limiting e Two x10 probes with ground leads e Digital Volt Meter minimum 3 S digits Perform the following steps to measure the AC ripple Always wear a tested grounding strap while working on the J750E tester Note All AC ripple measurements should be made with the oscilloscope at the output studs of the power supply 1 Obtain access to the power supplies as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair 2 Perform DC output measurements as outlined in section Measuring Power Supply Output Voltage on page 7 22 3 Plug the oscilloscope into an appropriate AC power source 4 Twist the scope probes together 4 to 5 turns per foot and connect to channels 1 and 2 This will reduce the effect of environmental noise on the ripple measurement 5 Verify that the vertical amplifiers for both channel 1 and 2 are calibrated for gain and DC offset Maintenance 7 25 6 Verify the following scope settings Add mode Invert channel 2 AC input for both channels 1 and 2 Vertical input 50mv div 20MHz bandwidth on 7 Set the timebase for a suitable display start with 10usec 8 Connect the tip of both scope probes to the scope calibrator A straight line should appear 9 Connect the scope ground leads to the chassis of the J750E tester 10 Confirm the setup by connecting the scope probes together then touching them to the J750E chassis There should b
90. section Pogo Block Removal and Replacement on page 8 53 of Chapter 8 Repair Use care to not damage or get alcohol on the pogo pins when cleaning the o ring 5 Moisten a foam tip swab with isopropyl alcohol and gently clean the surface of the pogo block O rings 6 Once the alcohol has fully dried reinstall the circuit board into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair Maintenance 7 17 Pogo Pin Inspection Do not touch the pointed ends of the pogo pins with bare fingers Always use the recommended tools The pogo pins in the pogo block should be inspected on a regular basis Inspect the pins to see that they are not bent or stuck and that they allow full travel and rebound when compressed If a single pin is damaged it can be replaced as outlined in section Pogo Pin Removal and Replacement on page 8 56 of Chapter 8 Repair If more than one or two pins require replacement it is recommended that the entire pogo block be changed Pogo blocks can be replaced as outlined in section Pogo Block Removal and Replacement on page 8 53 of Chapter 8 Repair Mechanical Checks This section provides information that can be used to perform mechanical checks on the J750E tester Air Filter Maintenance The J750E air filter is located on the air intake side of the tester The filter is made of S 1 27 cm thick open cell polyester foam It is held in place by a
91. shown in Figure 6 16 The four fans on the Fan Plate Assembly at the rear of the system are called Fan A Fan B Fan C and Fan D The fans in the left and right power supply assemblies are called Fan Left PS and Fan Right PS 6 26 J750E 512 Pin Test System Service Reference Manual Ground 24 Volt Utility Power Supply 24 volts Cal CUB 43 5 Rear Fan B OK 1k 24 volts Ground 2A Circuit i Breaker pil Fana 0 1 Rear Fan A OK S LANL LUA A AN et 2 2 Rear Fan C OK IS LAS Sk Fan C Be 5 Volts l Ae Ground ji 8 i Rear Fan D OK i 6 7 e ik Fan Plate Assembly 235 750 34 1A Circuit L A Breaker CH Left PS Fan OK S k 24 volts Ground i 7 TV yw Hi HAS ASH Left Power Supply Jacket Fans Right Power Supply Jacket Fans Af ANA V V 24 volts Ground oa Right PS Fan OK E ES 1A Circuit Break F 00679A S or Figure 6 16 Tester fan sensor to CAL CUB wiring AC DC Power and Cooling 6 27 512 Air Flow All cooling air for the 512 channel J750E enters through the front filter and exits via the 4 rear fans The rear fans pull air in through the front filter Most of the air is used to cool the circuit boards This is shown in green in Figure 6 17 Auxiliary fans in the left and r
92. tape 16 Loosen the four 4 card cage alignment bolts approximately two 2 full turns using the 9 16 hex wrench 17 Remove the six 6 j 20 x 2 S long hex head mounting bolts that secure the card cage to the tester housing using the socket wrench and 7 16 socket 18 For the standard J750E tester perform the following steps Gently wiggle the card cage and start to remove it from the housing until you can access the temperature sensor mounted at the top of the card cage Disconnect the temperature sensor cable from the sensor then pull the card cage the rest of the way out of the housing 19 For the J750E tester perform the following steps Disconnect the temperature sensor cable from the temperature sensor mounted in the center of the card cage Gently wiggle the card cage while removing it from the tester housing 20 Proceed to section Reinstalling the Card Cage Assembly on page 8 33 as appropriate Reinstalling the Card Cage Assembly Perform the following steps to reinstall the card cage assembly Always wear a tested grounding strap while working on the J750E tester This procedure requires two people due to the size and weight of the card cage assembly When reinstalling the card cage confirm that all cables and wires are properly labeled prior to reconnecting them Check the labels on the cables and wires before and after connecting them to ensure they are properly connected
93. tester to the LOCK on position 6 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 7 Remove the clip lead or test lead from the DIB and the tester Grounding Customer DIBs Perform the following steps to ground the Customer DIB Always wear a tested grounding strap while working on the J750E tester Note This procedure only details the instructions for installing the DIB Maintenance 7 9 Note When installing the board it should remain attached to ground until vacuum has been applied to the tester and the board is seated When removing the board it should be properly grounded prior to releasing the vacuum from the tester Note This procedure requires the use of a clip lead with an EZ hook on one end anda banana plug on the other end 1 Identify and mark a proper digital signal ground on the Customer DIB 2 Modify the ground location to add a wire or connection pin so that an EZ hook type clip lead can be connected to the ground Figure 7 4 shows a connection pin added to the ground location on the Customer DIB ZE s Connection Pin added to Ground Location connected to Pin F 000066 Figure 7 4 Connection pin added to customer DIB 7 10 J750E 512 Pin Test System Service Reference Manual 3 Place the tester so that the DIB mounting surface faces up 4 Ground the Customer
94. that enable them to meet the electrical code requirements as understood by Teradyne Inc for the countries where the product may be sold Replacement of any of these parts should be done with equivalent and code acceptable parts only Consult your local Teradyne office for agency approved restrictions All AC power connections must be torqued to their defined specifications to avoid local heating and possible ignition or damage to the screw connections Use the torque specifications outlined in section Torque Specifications on page 2 31 unless otherwise specified 2 28 J750E 512 Pin Test System Service Reference Manual Switches On Off The Power Vault AC Main circuit breaker CB1 Power On and Power Off switches and Emergency Off Switch are located on the front of the AC Power Vault Figure 2 5 shows the location of the circuit breaker and other switches The J750E tester Emergency Power Off Power On and Power Off switches are located on the front of the J750E tester in the center of the air intake area Figure 2 8 shows the location of the switches The front panel of the tester also contains a connector for the Kinematic Control Pendant Main Power The tester s Power On and Power Off switches control the contactor located inside the tester s input power module The contactor enables or disables AC power applied to the J750E s power supplies The Power On switch must be pressed and held for 3 5 seconds for the test
95. that the noise won t trigger a shutdown Table 6 7 lists the signal specifications used for sequencing Figure 6 10 shows a diagram of the enhanced tester power supply sequencing flow AC DC Power and Cooling 6 19 Note All power supplies should be verified by measuring the Output Voltage Good signal pin 3 this signal should measure a minimum of 4 5 volts Inhibit signal Logic LO lt 0 9 volts Power supply OFF Logic HI gt 2 volts Power supply ON Voltage Good signal Logic LO lt 0 9 volts When Vout deviates from 3 to 5 from the adjusted set point Logic HI gt 4 5 volts Power supply ON Internal pull up to 5 volts Table6 7 Powersequencing signal specifications 6 20 J750E 512 Pin Test System Service Reference Manual Power Supply interconnections for J750E 512 Sense Sequencing Harness with filter capacitors Part of 405 925 00 Part of 405 325 00 Part of 405 924 00 Part of 405 925 00 SSS SSS SS SSS SS SS SS SSS we me 1 Votage Good Good CF 1 2 TH Ta 2 3 1 2 31 24 volts 34 volts Utility Master 15 volts 4 5 ETa 6 F 4 5 el 4 5 D Sense Sense l VShare L hibit l Lm e se I D I 1
96. the DIB fixture meet the tester housing Figure 9 7 shows the location to check Troubleshooting 9 13 rel e e ie Check Mating Surfaces 4 Places F 000121A Figure 9 7 DIB fixture Note Make sure to check the tester at all four mounting locations View each location from multiple angles to ensure a thorough visual inspection 5 Check to see that the 0 006 feeler gauge does not pass between the four surfaces where the DIB fixture meets the tester housing Checking the Seating of the Card Cage Assembly This section provides information for checking the seating of the card cage The following tools are required to check the seating of the card cage in the tester e No 2 Phillips screwdriver Large slotted screwdriver 5 16 e 0 006 feeler gauge e 9 16 hex wrench e Socket wrench e 7 16 socket e Adjustable torque wrench up to 57 inch pounds 9 14 J750E 512 Pin Test System Service Reference Manual Perform the following steps to check the seating of the card cage Always wear a tested grounding strap while working on the J750E tester Note Protect against the possibility of dropping hardware into the tester electronics or backplane al Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair Close IG XL the J750 Mainten
97. the back side of the DIB fixture assembly to ensure that all circuit card o ring mating surfaces and the DIB fixture mounting mating surfaces are free from dirt or debris that could cause vacuum problems Repair 8 17 1 Orient the new DIB fixture assembly so that the plunger alignment pins on the top of the fixture face the front of the tester and the four 4 ball lock mounting holes line up with the holes in the tester housing then place the fixture onto the tester housing Note The new DIB Fixture Assembly may not have the top and bottom DIB Stiffener Brackets If the customer requires an exact copy of the old DIB Fixture to be installed remove the 6 32 x 3 8 long Phillips head screws from each bracket installed on the old fixture using the no 2 Phillips screwdriver Remove the brackets and install them on the new fixture using the hardware that was previously removed prior to installing the new fixture Note If the new DIB Fixture Assembly has the top and bottom DIB Stiffener Brackets but the fixture does not sit flush on the tester housing remove the four 6 32 x 3 8 long Phillips head screws from both the old and new fixture using the no 2 Phillips screwdriver then remove the DIB Stiffener Brackets from the fixtures Replace the brackets on the new fixture with the ones removed from the old fixture Tighten the screws to 10 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit
98. the cable to the connector at the rear of the new board 10 Replace the computer s outside cover using the appropriate manufacturer s instructions 11 If the cables were previously disconnected reconnect them to the rear of the power vault and the computer 12 Turn on the two 2 auxiliary circuit breakers CB3 and CB4 at the rear of the power vault 13 Turn on power to the computer CPU and monitor 14 Once the computer is powered up and ready to use you may need to install and configure new device driver software Refer to the appropriate J750 Software Installation Manual as required Repair 8 57 Restoring the Operating System Software to Its Factory Image Use the following procedure to restore the J750E operating system software to its factory installed image Using the J750E Backup Media Revision History Date Comment 11 23 2004 Initial Document 1 11 2005 Revised per comments 3 15 2005 Updated added TP 005 00 Overview Restoring a computer to its factory shipped configuration has traditionally been a lengthy and involved process Original media of the proper revision levels must be located installed and configured all in the proper order This process typically takes an experienced user several hours to complete To reduce and simplify this process Teradyne will now provide a set of system backup media for each system This media includes a self installing image of a base J750E computer
99. the card cage slot Changing the plane of the board as it is being inserted into the tester may result in damage to the components on the board Carefully and slowly insert the board into the tester Always wear a tested grounding strap while working on the J750E tester Note If a circuit board requires an airflow control board to be installed in an adjacent slot you must install the circuit board prior to installing the airflow control board Failure to install the circuit board first may result in damage to the circuit board upon installation of the airflow control board Note If the circuit board rubs against a board installed in an adjacent slot as you attempt to install it you should remove the adjacent board and install the other board first Failure to remove the adjacent board and install the other board first may result in damage to the circuit board upon installation Note These instructions assume that the tester has already been opened and that a circuit board has already been removed 8 14 J750E 512 Pin Test System Service Reference Manual Figure 8 1 shows the location of the boards in the tester 1 H applicable remove the board from its storage container and onto a proper anti static work surface with the component side facing up 2 If applicable remove any connector covers that are installed on the board 3 Using the information listed in the configuration file carefu
100. the following steps to remove the power supply jacket fans Always wear a tested grounding strap while working on the J750E tester Note Make a note of fan rotation prior to removing it from the supply 1 Remove the power supplies from the tester as outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 2 Remove the card cage from the tester as outlined in section Card Cage Assembly Removal and Replacement on page 8 31 3 Remove the six 6 8 32 x 5 16 long shoulder screws and 8 flat washers from the appropriate power supply jacket using the 3 32 hex wrench Figure 8 9 shows the location of the mounting hardware Note It is not necessary to remove the blue grommets when removing the hardware Repair 8 43 8 32 x 5 16 Long Shoulder Screw and Flat Washer 6 places Figure 8 9 Power supply jacket mounting hardware location 1 Remove the power supply jacket from the card cage 2 Remove the two 2 4 40 external tooth locknuts and 4 flat washers from each of the two 2 deflectors using the j open end wrench 3 Remove the deflectors from the power supply jacket 4 Disconnect the appropriate fan cable connector J2 or J3 from the mating connector on the fan connector bracket 5 Remove the four 4 6 32 x 5 8 long Phillips head screws and 6 flat washers from the appropriate fan using the no 2 Phillips screwdriver then remove the fan 6 Proceed t
101. the international dial access code for Malta International charges will apply Mexico 800 837 2396 phone for toll free access where is the international dial access code for Mexico For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Mexico International charges will apply Morocco For toll free AT amp T Direct Access dial 00 211 0011 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Morocco International charges will apply Netherlands 800 837 23963 for toll free access where is the international dial access code for the Netherlands For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the Netherlands International charges will apply Pakistan For toll free AT amp T Direct Access dial 00 800 01 001 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Pakistan International charges will apply Philippines 800 1 651 0173 for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the Philippines International charges will apply Poland For toll free AT amp
102. the replaced supply at the power supply sense lines Adjust any voltage that is out of specification as outlined in section DC Power Supply Verification on page 7 22 of Chapter 7 Maintenance before reinstalling any boards into the tester 16 Shut down the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 then reinstall the circuit boards as outlined in section Reinstalling Circuit Boards on page 8 14 17 Recheck the voltage of the replaced supply at the power supply sense lines Adjust any voltage that is out of specification as outlined in section DC Power Supply Verification on page 7 22 of Chapter 7 Maintenance 18 Close the doors of the tester replace the EMI Dust cover then position the tester so that the DIB mounting surface faces up Reinstalling the 405 325 00 24 volt DPS and 3 3 volt and 405 925 00 15 volt 10 volt 36 volt and 34 volt Power Supplies Perform the following steps to reinstall the power supplies into the tester Figure 8 4 shows the location of the power supplies Always wear a tested grounding strap while working on the J750E tester When replacing a power supply be sure to check all voltages at the power supply sense lines before reinstalling the boards into the tester 8 28 J750E 512 Pin Test System Service Reference Manual The isolator bushings and flat washers on the power supply terminals are loose Use care when installing the pow
103. the tester The tester can not be restarted until the problem is resolved The sequencing is done using the signals that are present on the 6 pin or the 12 pin Molex connector on the supplies The signals and pin numbers of the connector are listed in Table 6 4 Table 6 5 and Table 6 6 Pin Function Sense Margin Remote Voltage Adjust Output Voltage Good Sense amp Logic Ground Current Shared Control oOo a AJOJN Inhibit Table 6 4 Power Supply 6 Pin Molex sense connector functions The signals and pin numbers of the 12 pin connector for the 405 925 00 are listed in Figure 6 5 AC DC Power and Cooling 6 17 Pin Function _ Not used Inhibit Not used Not used Not used Not used Not used Output Voltage Good O 0 NI oOo ay AJ OJN Not used 4 o GND _ Not used N Not used Table 6 5 Power Supply 12 Pin Molex sense connector functions The signals and pin numbers of the 12 pin connector for the 405 920 00 are listed in Table 6 7 Pin Function _ Inhibit Not used Not used Output Voltage Good Not used Not used Not used Not used O 0 rzdu oO ay AJ OJN Not used 4 o GND _ Not used N Not used Table 6 6 Power Supply 12 Pin Molex sense connector functions 6 18 J750E 512 Pin Te
104. then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Australia International charges will apply Austria 800 837 23963 for toll free access where is the international dial access code for Austria For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Austria International charges will apply Belgium 800 837 23963 for toll free access where is the international dial access code for Belgium For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Belgium International charges will apply Brazil For toll free AT amp T Direct Access dial 0 800 890 0288 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Brazil International charges will apply Bulgaria 63 32 341 7800 phone where is the international dial access code for Bulgaria International charges will apply No toll free access is available Canada 1 800 837 2396 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone or where is the international dial access code for Canada International charges will apply China Northern Provinces Beijing He Bei
105. to DC internally DC to DC 11 80 12 20 lt 200 1A from 24 limited converter enabled Limited on CAL CUB Note All specifications are typical as measured on the Device Interface Board DIB Table 6 3 User power supply specifications 6 14 J750E 512 Pin Test System Service Reference Manual J750E System Power Protection The J750E system is protected against a power supply failure by three methods one software method and two hardware methods All three can remove AC power from the J750E DC power supplies These methods are e G XL Software control which monitors Channel board ID Prom register e Fan Sensor Control Circuit which senses a loss of fan rotation e Power Sequencing which monitors the 5 volts 5 volts and the 3 3 volt power supplies during and after the power on process This functionality is implemented on the CAL CUB circuit board Teradyne Part Number 239 020 06 D and higher and by the power sequence process via sequence cable that monitors the signal level of the Output Voltage Good Inhibit of each sequenced power supply System Power On Sequence J750E systems have protection circuits on the CAL CUB board that are activated in the event of a power supply or cooling fan failure Figure 6 9 shows the CAL CUB Fan Fail circuit and its associated wiring This circuitry in conjunction with the power supply sequencing protects the system in the event of a power supply or cooling fan failure by removing
106. v key to access the parameter level to set the address Use the lt gt A v keys to change the address as required Once the address has been set to 22 press the Auto Man Enter key to save the address and turn off the front panel menu Note The meter must also be configured as an IEEE 488 interface to ensure proper communication between the meter and the personal computer 4 Check and set the meter interface configuration as follows Maintenance Software 4 69 Press the Shift lt On Off keys to turn on the front panel menu Press the lt key twice two times to access I O Menu selection Press the v gt keys to access Interface selection Press the v key to access the parameter level to set the address Use the lt gt keys to change the interface configuration as required Once the interface has been configured to IEEE 488 press the Auto Man Enter key to save the address and turn off the front panel menu 5 Perform a self calibration of the meter by pressing the Auto Cal button then the Enter button on the front panel of the meter Note Self calibration takes about 12 minutes to complete 6 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 7 Properly ground the APMU Calibration DIB then place it onto the DIB fixture on th
107. washers and j flat washers at the top bus bar mounting holes of the connection bars and tighten them to 57 inch pounds using the adjustable torque wrench and 7 16 socket Tighten the three 3 j 20 x 5 8 long bolts at the bottom bus bar mounting holes of the connection bars to 57 inch pounds using the adjustable torque wrench and 7 16 socket 10 Replace the four 4 5 16 flat washers 5 16 split lock washers and 5 16 hex nuts onto the bus bar mounting bolts on the 10 5 and 5 volt power supplies Tighten the nuts to 156 inch pounds using the adjustable torque wrench and S socket Repair 8 27 11 Replace the remaining 10 flat washer 10 split lock washer and 10 32 hex nut onto the bus bar mounting bolt on the 5 volt power supply Tighten the nuts to 26 inch pounds using the adjustable torque wrench and 3 8 socket 12 Replace the lugs of the 10 5 volt power jumpers onto the mounting tabs of the 10 5 and ground bus bars and secure using one 1 each 8 32 x 3 8 long Phillips head screw 8 split lock washer and 8 flat washer Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 13 Recheck all wiring to ensure all of the connections are correct 14 Re secure the power supply wires and cables with tie wraps as appropriate then cut off the excess portion of the tie wrap using the side cutters 15 Reapply power to the tester and check all voltages of
108. 0 PSI of clean dry air to generate vacuum for the vacuum pull down assembly The vacuum is generated by a venturi in the vacuum pump assembly There are two pumps located on either side of the inside of the tester Perform the following steps to check the vacuum system for proper operation 1 Confirm that the pressurized air source into the J750E is between 70 and 101 PSI 2 If an air filter assembly is attached to the supply line confirm that it is removing water oil and other contaminates by inspecting the filters If necessary replace the filters Inspect all air hoses for cracks or damage and replace if needed Inspect the air fittings at the factory air source and at the tester for leaks Check that the vacuum switch on the tester functions correctly If you Suspect a vacuum problem check to see that there is a minimum of 20 inches of mercury shown on either the vacuum gauges on each vacuum pump in the tester or on the external vacuum gauges mounted on the tester housing if installed Cooling Air Path Check It is important for proper cooling that both the intake path and the exhaust path for the cooling air are not restricted The entire path should be inspected oan SS Go Confirm that the tester intake is not blocked or covered The air temperature at the center of the intake should not exceed 30 C 86 F Table 7 5 shows the airflow output requirements of the tester Assembly Air Output Fan Pl
109. 0 VAC supplied by the power distribution unit PDU The test system is connected to the PCIT interface card in the computer via a high speed serial connection User input is collected from the keyboard and mouse and output information is presented on the video display unit The standard video adapter card supports dual display units For external connectivity two Ethernet interfaces are provided One Ethernet connection is available for the customer to configure and connect to their local area network Other interconnect options include the GPIB General Purpose Interface Board serial port and parallel port These connections can be used to interface with customer peripherals such as handlers and probers and additionally in the case of GPIB with external system calibration equipment Hardware Description 5 3 Personal Computer Interface PCI Board The Personal Computer Interface PCI board is the interface between the test system s personal computer PC and J750E tester The PCI can be located in any full size 32 bit PCI ISA combination slot of the test system computer The PCI is made up of the following three basic blocks e Local Bus Interface LBI e Timer block e Test Computer Input Output TCIO Bus Interface The LBI is the interface to the bus inside the PC Host Bus The LBI is the controller for the PCI board it requests and directs all activity The LBI initiates serial bus transfers through register read and write operati
110. 1 of 64 Channels Data 16 ADRS 3 3 V SRAM 512K x8 x8 Data Extended uCode Power SE 3 3 V 5 V 24 V 5V gt Rtn eeng F 000962 Figure 5 24 APMU digital control circuitry block diagram 5 42 J750E 512 Pin Test System Service Reference Manual Radio Frequency Identification Option RFID Introduction The RFID option consists of one main board and its 2 associated daughter boards It can be inserted in any slot of the J750E It can be used to test in parallel up to16 smart card devices chip cards with embedded RFID interface and used in contactless applications The RFID option can also test in parallel up to 16 RF identification devices Tags Each of the 16 channels of the RFID option has a sine wave generator for carrier generation with added data modulation capability as well as a receiver for amplitude demodulation The carrier unit generates accurate sine waves The modulation unit gets its digital data from the 4 Mbit pattern memory and the demodulation unit feeds the extracted demodulated digital data to its 4 Mbit pattern memory Each RFID channel consists of 2 pins which deliver complementary carrier signals to the device under test The J750 supports up to 2 RFID options enabling the user to test up to 32 devices in parallel The RFID Option hardware has the following major features Generation of a carrier frequency which is synchronous to the pattern generator of the VLSI test system Amplitude mod
111. 1910 format danger label with wording has a red or white and black background and is used to ELECTRIC AL identify an immediate electrical hazard or instructions of actions required to AE HAZARD N avoid an immediate hazard Old Style Label No Longer Used Replaced by 835 566 07 MECHANICAL HAZARD A Old Style Label No Longer Used Replaced by 835 566 04 ANTI STATIC The anti static label is used when special anti static or preventative measures must be taken to prevent hardware or equipment damage or malfunction DANGER The OSHA 1910 format danger label with wording has a red or white and black background and is used to identify an immediate mechanical hazard or instructions of actions required to avoid an immediate hazard ANTI STATIC The anti static label is used when a wrist strap must be worn to prevent hardware or equipment damage or 0002074 malfunction Note Labels may be stand alone symbols words or combinations of both as appropriate Figure 2 2 Safety labels sheet 1 of 2 2 6 J750E 512 Pin Test System Service Reference Manual HALLAR VOL T ALOE Corte men AA eme wand e wan Tart mo A CH 8 FF mem labs ri P N 835 566 07 A DANGER HAZARDOUS VOLTAGE Contact may cause electric shock or burn Turn off and lock out system power before servicing 1998 HCS Inc 800 748 0241 Reorder No H6010 81DHPK P N 835 566 10
112. 2 Pin Test System Service Reference Manual Pattern Tools Excel Based Tools F Production Pattern Compiler Data Tools Controls Pattern Editor Debug Display a Pattern Debugger Test Templates Instrument Drivers Resource Drivers A Tester Hardware Figure 3 1 IG XL block diagram F 000075 Pattern Tools IG XL contains the following Pattern Tools e Pattern Compiler e Pattern Editor e Pattern Debugger Pattern Compiler The Pattern Compiler provides a graphical tool that can be used to compile ASCII pattern files into binary pattern files The file is read into the pattern editor with separate columns for information on vectors pin maps pin names etc Figure 3 2 shows the Pattern Complier Software Description 3 3 Pattern Compiler Al ES Files r Commands Pattern Input File PO Browse Compile Pattern Output File 222222222225 Browse Exit Pinmap Workbook Browse Help Pinmap Sheet pp About Compiler Options Yes No Defaut I Save Comments Max Errors E EwendedMade C C C I Run Preprocessor LYM Size 4194304 SVM Only COCO Q Min Period 5 1e 008 Scan Parallel fe Preprocessor Detnitigns Import Undefineds C Ge Messages F 000179 Figure 3 2 IG XL Pattern Compiler Pattern Editor The Pattern
113. 37 23963 phone for toll free access where is the international dial access code for Hong Kong For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Hong Kong International charges will apply 800 837 23963 for toll free access where is the international dial access code for Hungary For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Hungary International charges will apply India For toll free AT amp T Direct Access dial 000 117 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for India International charges will apply Indonesia 001 803 65 7344 phone for toll free access For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Indonesia International charges will apply Iran 63 32 341 7800 phone where is the international dial access code for Iran International charges will apply No toll free access is available Ireland 800 837 23963 for toll free access where is the international dial access code for Ireland For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Ireland International charges will apply Israel
114. 4 9 The one line Kelvin matrix on the Cal DIB is connected via the channel pogo pins on the relay board to the CAL CUB to provide a DC source and to take a measurement Since the CAL CUB is used as the current source and to make the measurement this path must be closed once for each channel board under calibration The drive high low and on off controls are used at computer data rate to pre condition the pin electronics The high speed relay matrix on the Cal DIB is not used so it is electrically disconnected from the channels during DC calibration Drivers Vil Vih To check Vil Vih the channel output driver is connected to the Analog to Digital converter located on the CAL CUB The functional and BPMU relays on the channel board are closed the BPMU to External Matrix relays on the relay board are opened and the External Relays on the Cal DIB are closed The PPMU relay is then opened and minimum mid scale and full scale voltages are measured The voltage levels are driven through the BPMU relay to the CAL CUB through the external matrix Comparators Vol Voh To check Vol Voh the CAL CUB precision source supplies voltage to the channel board comparators The relays are closed in the same manner as in the Drivers test The system is put into Extended mode where it uses window comparators to measure the voltages The Expect Fixed Low signal from the channel board tests Vol and the Expect Fixed High signal tests Voh A burst is run wit
115. 4 J750E 512 Pin Test System Service Reference Manual 3 Reinstall the six 6 j 20 x 2 S long hex head mounting bolts to secure the card cage to the tester housing as follows Tighten the bolts approximately five 5 turns using the socket wrench and 7 16 socket Note Go around the six bolts tighten the center bolts first then tighten the remaining bolts in a cross pattern a few turns at a time Tighten the four 4 alignment bolts using the 9 16 hex wrench until there are two 2 threads exposed on each bolt Continue to tighten the six 6 card cage mounting bolts until the bolts have pulled the card cage assembly onto the seats but are not so they are completely tight Tighten the six 6 bolts to 30 inch pounds using the adjustable torque wrench and 7 16 socket Finally torque the six 6 bolts to 57 inch pounds using the adjustable torque wrench and 7 16 socket 4 Reinstall the power supply assemblies as outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 5 Reinstall the DIB fixture assembly as outlined in section Reinstalling DIB Fixture Assembly on page 8 17 6 Reapply power to the tester and check all voltages at the card cage backplane Adjust any power supply that is out of specification as outlined in section DC Power Supply Verification on page 7 22 of Chapter 7 Maintenance before reinstalling any boards into the tester 7 Reinstall the
116. 4 channels that are on that channel board The MTO requires that the following Teradyne software be installed on the test system computer e IG XL V3 20 06 or later and J750 Maintenance Software V7 00 05 or later or e IG XL V3 30 00 or later and J750 Maintenance Software V7 01 00 or later State Bus Interface The state bus is a 50MHz bus used to distribute the Pattern Generator state to the rest of the J750E system The state bus is brought up to the MTO rider board and terminated The MTO receives the subset of the state bus needed for sequencing through the MTO microcode that is stored in SVM memory The state bus signals used by the MTO are STB 4 0 STATE_NUMBER 11 0 QUAL CLRFL MASKA and SDAT The MTO generates FMTFAIL and sends it over the state bus The MTOs state bus interface consists of input registers decode logic SVM address generation and pattern load download logic Alternate Data Bus Interface The Alternate Data Bus ADB is a 24 bit bidirectional bus that operates at 50MHz The MTO supports both logical modes of ADB operation the 48 bit 25MHz mode and the 24 bit 50MHz mode The ADB interface is configured so that any bit of memory pattern data generated in the Memory Pattern Gate Array MPG can be driven on any ADB line and device data from the memory under test can be received from any ADB line Configuring the ADB is done statically Four configuration registers are provided for each ADB line One of the four confi
117. 58A LO terminal to the AG004 connector J3 pin 2 F 000072 Figure 4 9 HP3458A Voltage Measurement Instrumentation Setup 18 Connect the BNC to dual banana connector to the BNC to EZ hook cable 19 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in Figure 4 9 and click OK The voltage calibration portion of External Calibration begins When complete the HP3458A Current Measurement Instrumentation Setup dialog box is displayed on the screen Figure 4 10 shows the dialog box HP3458A Current Measurement Instrumentation Setup xi HP3458A O O 00 OO Connect HP3458A terminal to the AGO04 connector J4 pin 2 HP3458A LO terminal to the AGO04 connector J4 pin 1 F 000073 Figure 4 10 HP3458A Current Measurement Instrumentation Setup 20 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in the dialog box and click OK 4 36 J750E 512 Pin Test System Service Reference Manual The current calibration portion of External Calibration begins The CAL CUB displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test
118. 66 753 00 are required to run continuity check on probe test setups Note The probe continuity card Teradyne part number 234 281 00 only provides hardware checking for CTO O and 1and DPS 0 and 1 The ContactCheck continuity diagnostic version 4 1 1 will report that all channels fail for CTO 2 and 3 and DPS 2 and 2 These failures are false and should be disregarded because the continuity probe card has no support for these slots ContactCheck is implemented as an executable that can be started directly from the Windows Taskbar on the test system computer When launched the program looks to see if IG XL is already running on the test system computer and if it is it will load the existing workbook It also starts a hidden IG XL test program which speeds up the validation running TDR This workbook can only be viewed when the tool is in the Engineering Mode of operation For a more detailed description of the ContactCheck application refer to the Maintenance Release notes for the version of maintenance checkers being run on the tester Maintenance Software 4 19 J750 Maintenance Interface The J750E tester provides a Maintenance User Interface MUI to run the maintenance software From this interface the maintenance programs and their options are selected and the programs are run The user can select or deselect each physical slot in the tester as well as set parameters for individual portions of certain tests for debugging
119. 750E is designed to operate in a test floor environment The tester will operate best if it is not at the upper end of the environmental specifications or undergoing extreme changes within the range of the environmental specifications It is ideal if temperature and humidity are monitored on a continuous basis near the system If the environment is in question it should be measured close to the system Check to see that the operating environment of the tester meets the following specifications e Temperature 20 30 C 68 86 F e Relative humidity 40 to 60 non condensing Exhaust Air Temperature Requirements The J750E tester is equipped with a single temperature sensor located at the center of the card cage which measures the air temperature at the exhaust path of the tester If the temperature at the sensor reaches 65 3 C 149 5 F considered to be an over temperature condition the tester will shut down After emergency shutdown the temperature will continue to rise for a short period of time while the heat is dissipated from the tester s electronics The sensor will reset when its temperature drops below 30 C 86 F The temperature sensor in the J750E tester can be accessed by opening the doors of the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair 7 12 J750E 512 Pin Test System Service Reference Manual Pressurized Air and Vacuum Check The J750E requires a minimum of 7
120. 7954335854E 62 0 9999 2 96944716221765E 05 9 3 99537644931008 0 002 1 96622026883194E 03 6 9999 M 3 01382156240864E 06 0 3 95664926128384 0 0002 1 96523222632512E 04 0 9999 0 3 04438858620543E 07 0 0 Indicates 3 95294110068421 6 60602 1 96496922424849E 65 6 Current Readings 9999 3 0737310251327E 08 0 3 95129312631937 6 666002 1 964674076051198E 66 0 9999 3 68021466760365E 69 O 3 94346531629847 0 0000002 1 96447416909618E 67 6 2 99922180175781 3 000293289 2 98722800378429 1 8 999130249623438 6 9996389451 1 00301584864345 1 8 99674987792969 9 800213644 8 97377458647419 1 9999 0 000316 0 98 2 41477706228829E 62 1 8 99624633789063 8 999841482 8 98559574037904 1 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 9999 ROM Empty Space F 000313 Figure 4 3 Typical CALCUBCAL TXT file meter readings 4 6 J750E 512 Pin Test System Service Reference Manual External Calibration only calibrates the PPMU reference voltage and current ranges These calibration factors are then stored in the CAL CUB on board Flash Memory The contents of the Flash Memory can be viewed as part of the External Calibration file CALCUBCAL txt upon completion of the External Calibration The file can be found in the C Program Files Teradyne lG XL Vx xx xx tester folder of the test system computer Note Vx xx xx refers to any version of IG XL installed on the test system computer The CAL CU
121. 8 20 as appropriate Reinstalling Fan Plate Assembly Perform the following steps to reinstall the fan plate assembly Always wear a tested grounding strap while working on the J750E tester 1 Replace the fan plate assembly onto the tester 2 Tilt the top of the plate away from the tester then reconnect the 9 pin power harness connector to the connector on the fan plate assembly 3 The two 2 4 long screws should be installed in the holes at the bottom of the fan plate assembly 4 Place the fan plate assembly flush against the rear of the tester then secure the plate to the tester using the six 6 j 20 x S long black Phillips head panel screws and the two 2 j 20 x j long black Phillips head panel screws Tighten the screws to 41 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit Filter Frame and EMI Honeycomb Filter Removal and Replacement This section provides instructions for removing and replacing the filter frame and EMI honeycomb filter in the J750E tester The following tools are required to replace the filter frame and EMI honeycomb filter in the tester e No 2 Phillips screwdriver 7 16 nut driver Adjustable torque wrench up to 18 inch pounds 7 16 socket No 2 Phillips screwdriver bit Removing Filter Frame and EMI Honeycomb Filter Perform the following steps to remove the filter frame and EMI honeycomb filter Always wear a tested grounding strap while workin
122. A Inventory WHMIS Class B2 This product has been classified according to the hazard criteria of the CPR and the MSDS contains all of the information required by the CPR SECTION 16 OTHER INFORMATION Normal ventilation for standard manufacturing particular kegeger use of our products and their inappropriate combination with other products and substances may produce harmful results which cannot be anticipated Final determmation of the suitability of any material is the sole responsibility of the user Although certain hazards are described been we cannot guarentee that these are the oaly hazards that may exist 2 20 J750E 512 Pin Test System Service Reference Manual Loctite 222 LOGI y 7 E Material Safety Data Sheet Technologies Revision Date 01 25 2006 Issue date 02 03 2006 4 CHEMICAL PRODUCT AND COMPANY IDENTIFICATION Product name Loctite R 222 Threadlocker Low Strength Item No 21463 Product type Anaerobic Sealant Region United States address Contact Information Henke Corporation Telephone 880 571 5100 1001 Trout Brook Crossing Emergency telephone 860 571 5100 Rocky Hill Connecticut 06067 internet ww loctite com 2 COMPOSITION INFORMATION ON INGREDIENTS Hazardous components Ki ACGIH TLV OSHA PEL OTHER Polyglyco dimethacry ate 30 60 None None None 25852 47 5 Polyglyco oleate 30 60 None None None 2004 28 0 Silica amorphous treated 5 10 10 mg m inhal 20mppef 6 mgm 68909 20 6
123. A4AWS681 10 5 volts 5 volts Slave A4 module AW module Figure 6 5 J750E tester 5 and 10 5 volt power supply 405 920 00 AC DC Power and Cooling 6 9 RPM5CWDTD5D5S680 5509 1 3888 10 AC Input 24 volts 24 volts 5 volts 10 5 volts Utility Slave Utility Master DT module Master D5 module D5 module CW module F 001002 Figure 6 6 J750E tester 5 10 5 and 24 volt power supply 405 924 00 6 10 J750E 512 Pin Test System Service Reference Manual RPM5H7H7HD55463 AC Input 24 volts 3 3 volts 3 3 volts DPS Supply Master Slave D5 module H7 module H7 module F 000320 Figure 6 7 J750E tester 3 3 and 24 volt power supply 405 325 00 AC DC Power and Cooling 6 11 SPF3J8ESC1S686 AC Input 15 volts 10 volts 34 volts C1 module 36 volts J8 module ES module F 001003 Figure 6 8 J750E tester 10 15 34 and 36 volt power supply 405 925 00 6 12 J750E 512 Pin Test System Service Reference Manual Power S Voltage Ripple Nominal SC Supply Voltage Volitada Spec Limits Spec Notes Assembly 9 mv mv PP 405 325 00 24 24 000 100 23 900 24 100 lt 200 DPS 33A Supply 3 3 3 345 5 3 340 3 350 lt 200 Master 320A 3 3 Turn the Vadj pot fully CCW and measure the voltage at the Slave 320A Master 405 925 00 15 15 000 50 14 950 15 050 lt
124. AL CUB Coming out of the FIFO the TCIO buses get buffered and distributed to the upper and lower backplanes of the tester Figure 5 6 shows the major differences between the TCIO buses on each backplane TCIO Connections on the Lower Backplane The lower backplane connects to channel boards and CTO boards The channel boards require both TCIO buses so TCIOO and TCIO1 are distributed to all of the boards on the lower backplane The TCIO buses connect to Pattern Generator ASICs located on both the channel boards and CTO boards The Pattern Generator clocks SYNC and DATA on the rising edge of the TCIO clock so for timing reasons the CAL CUB clocks SYNC and DATA on the falling edge of the TCIO clock before sending these buses to the lower backplane The circuit board and backplane configuration of the J750E tester is shown in Figure 5 7 5 12 J750E 512 Pin Test System Service Reference Manual TCIO_0_SYNC_UL TCIO_0_DATA_UL TCIO_0 RDATA_UL TCIO_012_CLK_UL 2 signals TCIO_012_CLEAR_UL TCIO_0_SYNC_UR TCIO_0 DATA UR TCIO_0_RDATA_UR TCIO_012_CLK_UR 2 signals TCIO_012 CLEAR_UR Bus C Bus D Upper a EE ON gt O Backplane Slot C CO l C C IC IC h hft ha h Ih ai lata _la D PIP D la Ja tla Ja n nft nPnj Di IP PARP In mim ln ny niin tio PSSS let lei jn el lel le le j e lel le le Hy ry i fff HE WY qty l B B B B Upper BackplaneB B B B o
125. B software drivers then reference the calibration correcting factors providing an accurate traceable reference that is used to internally calibrate the J750E system The process is fully automated the Agilent HP 3458A is controlled via the GPIB card installed in the PC It should be noted that certain optional instruments also require their own external calibration The J750E tester is not dependent upon the External Calibration of any optional instrument These calibrations are for those specific instruments only CAL CUB Calibration The CAL CUB contains reference circuitry that is used to calibrate other hardware in the tester This reference circuitry requires periodic calibration using equipment that has been calibrated to a known standard The CAL CUB is connected to the external equipment via the Cal DIB for external voltage and current measurements using a dual banana jack cable and for external timing measurement using an SMA connector on the Cal DIB Once calibrated the calibration values are stored in flash memory on the CAL CUB The following parameters are calibrated on the CAL CUB using the external standard e Voltage Range Force at 2v 5v 10v and 24v e Current Range Force at 200na 2ua 20ua 200ua 2ma 20ma and 200ma e Master Clock at 100MHz CAL CUB Traceability CAL CUB calibration is traceable because it is performed using external standards that are traceable to the National Institute of Standard
126. Board Surreal cree EE N de 11 Reinstalling Circuit Boards comi isa 14 DIB Fixture Assembly Removal and ReplaceMent oooooocccccccccccccccccccnccccnnnnnnnnnnnnnn no nnnos 8 15 Removing DIB Fixture desser bloe aia 16 Reinstalling DIB Fixture Assembly c scs sccscciscescsescssnsssessccseesseasecsnesosecsvsceses suceesecvasovsotendsvensavasscenstveness 17 Fan Plate Assembly Removal and Replacement ooooocccccccccccccccccncnccnnnnnnnnnnannnnnnnnnnnnos 8 18 Removing Fan Plate Assembly reinir o ae EE lirica 19 Reinstalling Fan Plate Assembly insine siinsesse en E E E EE ETE T EET Ee E a ESSE 20 Filter Frame and EMI Honeycomb Filter Removal and Replacement AAA 8 20 Removing Filter Frame and EMI Honeycomb Pier 20 Reinstalling Filter Frame and EMI Honeycomb Filter 21 J750E Tester Power Supply Assembly Removal and Replacement cccccccccnccc 8 21 Removing the 405 924 00 10 5 volt 5 volt and 24 volt Utility and 405 920 00 5 volt and 10 5 volt Power Uli 23 Removing the 405 325 00 24 volt DPS and 3 3 volt and 405 925 00 15 volt 10 volt 36 volt and 34 volt LN ge De 24 Reinstalling the 405 924 00 10 5 volt 5 volt and 24 volt Utility and 405 920 00 5 volt and 10 5 volt Pow RS A an eana lack ec chee Ras sae eet Ad soca cot Gd OSE EEEO a EEE OE EEES 26 Reinstalling the 405 325 00 24 volt DPS and 3 3 volt and 405 925 00 15 volt 10 volt 36 volt and 34 Vol Power Supplies ci 28 Power Supply Module Removal and Replacement
127. E E EA IS 59 Install the Image 59 Post Installation Setup nnn e EEE EE E E E EE E EN E E ERS 60 Troubleshooting Eeer EE 9 2 Contact Problem Troubleshbooting un 9 4 Vacuum Leak Troublesbootnmg Abee 9 8 Checki g DIB MED ege ee Sa seth Nee AE Nae ate 9 10 Checking for Loose PogoBlocks int enden 9 11 Checking for Damaged or Compressed DIB Fixture Vacuum Seal cccccccccccncnnns 9 12 xiv J750E 512 Pin Test System Service Reference Manual Extending the Pogo Block for Improved Seating cceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeee 9 12 Checking the Seating of the DIB Fixture Assembhy 9 13 Checking the Seating of the Card Cage Assembly coocoococccccccocccococccccononanonononononanannnnnos 9 14 Checking for Loose CAL CUB Board AAA 9 17 Checking Airflow Control Boards Pogo Block O nmgs 9 17 Power Problem Troubleshooting ooooooocccccocononcccncncnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnn rre ranas 9 19 EE reegen ee ee 9 19 System Power SUI Ms ec 9 22 eo enee a o ea 9 24 Troubleshooting Procedures dd A A id 9 25 Problems Detected e e alae tte ass dea tee 25 Problems Detected by SEET 26 Power Supply Troubleshooting 27 Tester Communication Problem Troubleshooting ccceeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeeees 9 28 Windows and Software Troublesbootmg nnn 9 29 Windows Diagnostic Report Windows NIT 9 29 Windows Diagnostic Report Windows 20001 9 29 Windows Diagnostic Report Windows SP 9 30 Ev
128. J750 Test Systems lt INTEGRA gt J750E 512 Pin Test System Service Reference Manual Part Number 552 360 33 Revision 0622 MRP 001 a ERADY NE Limited Reproduction Rights This document may be reproduced by a Teradyne customer solely for internal use by the customer s employees whose responsibilities include Teradyne equipment Any copy of this document or portions thereof must contain the copyright and proprietary rights notice as stated on the original document Copyright O 2006 Teradyne Inc All rights reserved Printed in the U S A The material in this document is subject to change without notice Teradyne s liability for any errors in this document is limited to the correction of errors Teradyne WILL NOT BE RESPONSIBLE IN ANY EVENT FOR ERRORS IN THIS DOCUMENT OR FOR ANY DAMAGES INCIDEN TAL OR CONSEQUENTIAL INCLUDING MONETARY LOSSES that might arise from the use of this document or the information in it Restricted Rights Legend Use duplication or disclosure by the Government is subject to restrictions set forth in subdivision b 3 ii of the Rights in Technical Data and Computer Software clause of DFARS 52 227 7013 WEEE Directive Products covered by the WEEE directive have been labeled with the wheeled bin symbol with an X through it Customers with questions should contact the Teradyne Global Customer Services at 1 800 TERADYNE To the maximum extent permitted by law Customer shall be solely responsible
129. Memory pos ne atlas Bs El ES Acquire PPMUO_MOUT BDGS e a ai am Sv Range dl PPMU1 MOUT BDGS gt gt a re i Diff Amp PPMU1 DUT FET Sw Fixed OV Ref 3 ke BDGS Gnd F 000892 Figure 5 13 CTO block diagram Hardware Description 5 27 Mixed Signal Option MSO The Mixed Signal Option MSO provides the J750E tester with the ability to source capture and analyze analog signals as well as the digital representation of analog signals on mixed signal microcontrollers with embedded analog functionality on up to 32 sites in parallel The mixed signal option is comprised of the following two fully independent modules e Low to Mid Frequency Analog Source I O Module ASIO e Digital Source UO Module DSIO The MSO requires that the following Teradyne software be installed on the test system computer e G XL V3 40 00 or later and J750 Maintenance Software V7 10 00 or later Low to Mid Frequency Analog Source I O Module ASIO The ASIO circuitry is provided on a full size 16 x 20 40 6 cm x 50 8 cm channel board and the following daughter boards e ASIO Source Module e ASIO Capture Module e ASIO Relay Board e ASIO Calibration Rider Board The ASIO provides control clock distribution and calibration while the daughter boards provide four analog sources and four analog capture channels Each ASIO analog channel source or capture is fully independent and can be assigned to any test site Each ASIO module provides the fo
130. N INGREDIENTS Chemical Name CASs Wt Range Isopropanol 90 0 95 0 Deton zed water 5 0 10 0 SECTION 3 HAZARD IDENTIFICATION Emergency Overview White cotton cloth pad presaturated with isopropanol Liquid is fammable Liquid will imitate eyes and skin under repaated or prolonged exposure Breathing high concentrations of product vapor may produce drowsiness and a headache Boepal Health Effects Ee Liquid contents of this product are imitating and can cause pain tearing reddening and swelling accompanied by a stinging sensation i Prolonged contact with liquid contents may cause skin irritation Haapt if swallowed Imitating to mouth throat and stomach May cause vomiting Inhalation Harm il if inhaled High concentrations of liquid vapors in immediate area can displace oxygen and can cause dizziness unconsciousness and even death with longer exposure Keep people away from such vapors ml self contained breathing apparamas SECTION 4 FIRST AID MEASURES Eves Immediately fush with plenty of water After initial flushing remove ary contact lenses and continue dushing for at least 15 minutes Have eyes examined and tested by medical personne if imitation develops or persists Skin Wash skin with soap and water Remove contaminated clothing Get medical attention if imitation develops or persist Wash clothing separately before reuse Ingestion Swallowing less than an ounce will not cause significant harm For larger amounts do not in
131. OF REACH OF CHILDREN SECTION EXPOSURE CONTROLS PERSONAL PROTECTION Exposure Guidelines CHEMICAL NAME ACGIH TLV OSHA PEL ACGIH STEL Isopropanol 200 ppm 400 ppm 400ppm Work Hygienic Practices Good general ventilation should be sufficient to control airborne levels Local exhaust ventilation may be necessary to control ary air contaminants to within their TLVS during the use of this product If vapor concentration exceeds TLV use NIOSH approved organic vapor cartridee respirator Wear safety glasses with side shields or gozgies and rubber or other chemically resistant gloves when handling this material NEPA and HMIS Codes NFPA HMIS Health 1 1 Flammability 3 3 Reactivity 1 1 Personal Protection B Safety Information 2 19 Presaturated IPA Wipe Continued o CHEMTRONICS MSDS 1003 SECTION 9 PHYSICAL AND CHEMICAL PROPERTIES Physical State Premoistened cloth Solubility in Water Soluble GGquid only Odor Ethereal solvent Specific Grae Water 1 0 78 liquid only pH NA Exaporation Rate gt 1 Vapor Presas 33 mm Hg 75 F liquid Butyl acetate 1 Boiling Point 180 F om Wacom NA Vapor Density 2 07 75 F liquid Percent Volatile 100 Air 1 SECTION 10 STABILITY AND REACTIVITY Sub This product is stable Condinors to Avoid Do mot allie pad to come ba contact wilh open Shamas red hot surfaces or other sources of ignition Do not mix with powdered alkali and alkaline earth metals or strong oxad
132. Optional Size Optional Boards Instruments Instruments 5 10 5 and 24 E A E 20 3 3 and 24 Volt Power pal ER PORRA Volt Power Supply r SO i Supply Power Supply Power Supply Bus Bars Bus Bars p 5 10 5 Volt 10 15 34 and 36 Volt Power Supply Xi a Power Supply CAL CUB CTO Board CTO Boards Boards Front of Tester Power Switch End F 000134A Note J750E Tester shown Figure 1 3 Tester inside view System Overview 1 5 Looking down from the top of the tester you can see many of the J750E assemblies Located in the center is the card cage assembly and circuit boards On either side of the card cage assembly are the two power supply assemblies Also shown are the power supply bus bars that bring DC power to the backplane The power supplies and circuit boards are serviced from the top of the J750E At the front of the system is the Power On switch Kinematic Docking System Control Pendant connector and air intake filter At the rear of the J750E is the fan plate assembly which pulls the air through the front air filter past the circuit boards Card Cage Assembly The J750E card cage assembly has 17 slots In the center of the card cage are single width slots 4 slots for Device Power Supply Boards DPS 4 slots for the Converter Test Option Boards CTO and 1 slot for the Calibration Clock Utility Board CAL CUB On either side of the single width slots are 4 full width slots for a to
133. PUT 1 connector of the Fluke 5790 AC Measurement Standard 27 Connect one end of the other 50 ohm SMA to N type RG142BU Cables Part Number 811 064 00 to the J2 or J4 connector on the daughter card as appropriate Note Use J2 if the LMF is installed in slots 4 7 and use J4 if the LMF is installed in slots 0 3 Maintenance Software 4 65 28 Connect the other end of the cable to the WIDEBAND connector of the Fluke 5790 AC Measurement Standard 29 Connect one end of the second black banana to banana cables to the Green ground connector of the Fluke 5790 AC Measurement Standard Figure 4 20 shows the cables connected to the measurement standard T S gt THE AA From Daughter Card Assembly INPUT 2 J3 Connector E To 3458A Meter From Daughter Card Assembly J4 Connector F 0001035 Figure 4 20 Cables connected to AC measurement standard 30 Connect the other end of the black banana to banana cable to the 2 Sense Guard jack on the Agilent HP 3458A multimeter 31 Connect one end of the second GPIB cable to the GPIB cable already connected to the connector at the rear of the Agilent HP 3458A multimeter 32 Connect the other end to the connector at the rear of the AC Measurement Standard 33 Click OK in the dialog box The AC portion of External Calibration begins The LMF selected in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is bei
134. RFID board pin identification DUT view Upper backplane connector AGO28 Channel Board Slots 0 2 4 6 e Upper backplane connector AGO28 Channel Board Slots 1 3 5 7 e Lower backplane connector AGO27 Channel Board Slots O 2 4 6 8 10 12 14 Lower backplane connector AGO27 Channel Board Slots 1 3 5 7 9 11 13 15 11 1 FCM ved veo ved E e eo LD os ce 3 pa 5 5 i _ __ Co e E UL Ww Lo N n o Ze C FS 0 jauueYyd euueyo jouueyd jouueyd y jouueyd g jouueyd 9 jouueyd Z jauueyd sda pens asues ee peng esueg ep peny su s soq peny su s eo peng esuas ep peny asues ep pieng su s eo peny esues NON N LYs 82403 LNOW NLYS 89104 LNOW NLYS 89404 LNOW NLY 29 04 LAON NLYS 9909 LAON NLYa 99104 LNOW NLYS 89104 LAON NLYS 99104 NIN NLYS 99404 NLY NLH4 99 03 NIN NLH 89405 NLYIA NLH4 9904 NLEN NLH4 99404 NIN NL 99109 NLYW NYS 89104 NLYI NLH 99104 Sum Ip epg epg epg epg epg OV LW la 19 LO F 000219 iew DUT vi ion t identifica IN I DPS board pi Figure 11 1 11 2 J750E 512 Pin Test System Service Reference Manual vev ved veo ved T 3 Eg oO 2 ce cz 8 amp gz D e HI o lt os UL LL e 0 DI N E 0 05 E Fa OGAY GND ISA
135. S long Phillips head screws 6 split lock washer and 6 flat washers holding the fan and finger guard to the fan plenum from the fan to be removed using the no 2 Phillips screwdriver Note Make note of the location of the fan wires before removing them from the terminal block Repair 8 41 7 Loosen the screws at the appropriate locations of the terminal block using the medium slotted screwdriver 1 4 then remove the fan wires from the terminal block 8 Remove the fan and finger guard 9 Proceed to section Reinstalling Fan Plate Assembly Fans on page 8 42 as appropriate Reinstalling Fan Plate Assembly Fans Perform the following steps to reinstall the fans on the fan plate assembly Always wear a tested grounding strap while working on the J750E tester Note Be sure to install the new fan so the rotation will be the same as the fan that was removed 1 Place the fan and finger guard into the appropriate location on the fan plenum and secure using the four 4 6 32 x 2 S long Phillips head screws 6 split lock washer and 6 flat washers Tighten the screws to 7 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 2 Route the fan cable along the cables of the other fans to the appropriate location on the terminal block 3 Loosely install new tie wraps to the fan cables to hold them in place Note Do not tighten the tie wraps at this time 4 Cut the wires
136. Signal I O DSIO Option Removal and Replace HOI E E A 8 47 Removing the MTO uste E EE E EE EEEa EEE Ea SS 47 Reinstalling the MTO or DSIO Option 0 oe ee ee eeeeeeecseeseecnecenecaeceaesseseceeesseseaesaeesecaaesaecnecsaeeeseeseatees 47 APMU Motherboard Relay Board Removal and Replacement AAA 8 48 Removing the APMU Relay Boat divose resi nesnese pe a e o o En ea iria 48 Reinstalling the APMU Relay Board eseseeesseesseeeseereseesssresrsrereresesesseersstesesteststesrersretstentesreteeesensertresreees 49 APMU Daughter Card Removal and Replacement AA 8 50 Removing the Daughter Cards iii a a a ia i n 50 Reinstalling the Daughter Cards cioiicoicoipiocoociniscando contre ERAN a EE S AOSTA e ROEE iE Tieso ASEET REEE Enasi 52 Pogo Block Removal and Replacement AAA 8 52 Pogo Block O ring Removal and Replacement cooooccccccconocccocccccononanancnoncncnnnncncnnnnnnnnnns 8 54 Pogo Pin Removal and Replacement xiii ccnceceintetanusnnnertnentadedadedceubenaneavdelataaietinentiebs 8 55 Personal Computer PCI or GPIB Board Removal and Hepnlacement 8 55 Restoring the Operating System Software to lts Factory Image ssssssssesssssessreereeerrrrrnrrnnne 8 57 Using the J750E Backup Media scr ra a Reg ee 8 57 DU ee En 57 Restoring Your Computer tamara ira 57 KEDE CAPI EE EE 58 AvallabllY coli o o iia 58 Wand A A il S EES 58 Before Zou Been sseccncsssssscenescepasces raaa rea Eees Er ices copsess EE Ieir E SE EE TE EEEE E SETAE SEE aai 58 leggel AO hE H
137. T Direct Access dial 00 800 111 1111 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone or where is the international dial access code for Poland International charges will apply Portugal 800 837 23963 for toll free access where is the international dial access code for Portugal For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Portugal International charges will apply Romania For toll free AT amp T Direct Access dial 01 800 4288 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Romania International charges will apply Replacement Parts 10 7 Table 10 1 Telephone numbers for GCS centers Sheet 5 of 6 Country Telephone Russia Saudi Arabia For toll free AT amp T Direct Access from Moscow dial 755 5042 from St Petersburg dial 325 5042 from other cities dial 8 10 800 110 1011 Then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Russia International charges will apply For toll free AT amp T Direct Access dial 01 800 10 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 ph
138. TCIO clock This is the clock for return data PTCLK returns from the PCI to the CAL CUB and is used as ITCLK to clock data to the CAL CUB from the PCI and from the CAL CUB to the channel boards It is also used to clock sync to the channel boards DIB Power The 24 volt DIB power is fused at 1 amp and the 5 volt DIB power is fused at 3 amps Both are gated on off Three DC to DC converters generate 15 15 and 12 volts The DC to DC converters have internal limiting and provide 1 amp The raw supply for the DC to DC converters is 24 volts Both DC to DC converters have an enable pin controlled by the CAL CUB Power Supply Monitor An 8 bit Analog to Digital converter ADC is used to monitor system power supplies and the power that the CAL CUB provides to the DIB 5v 12v 15v 15v and 24v DIB power is monitored System power at 3 3v 5v 5v 10 5 24v 24R ground is monitored The 24 volt system utility supply is monitored since the DIB 24v is derived from it The output of the monitor circuit is only used for pass fail information and not to measure the accuracy of the system power supplies Fan Monitor and Safety Shutdown The eight 8 fans mounted in the fan plate assembly and power supply jackets of the tester are monitored using fan rotation sensors located on each fan If any fan slows or stops the ALLFANOK signal starts a 2 minute timer If after 2 minutes the fan monitor still shows a problem the SYSPWROFF signal opens the main
139. That the tester is fully undocked and a sufficient distance from the mating equipment That the Calibration DIB is installed on the tester That the problem has been isolated and a specific board has been identified for replacement That all software has been installed in the default directory locations Maintenance Software 4 47 1 Make a copy of the CalibrationData txt file renaming the file as appropriate Note This is done so that you will have a backup of your file in the event you need to revert back to the old file Note The file can be found in the C Program Files Teradyne IG XL Vx tester folder where Vx is a generic representation for any version of IG XL that may be installed 2 Remove and replace the identified board using the instructions outlined in Chapter 8 Repair 3 Reapply power to the tester then wait 5 minutes for the tester to warm up 4 While the tester is continuing to warm up run several loops of Quick Check and Module Check as outlined in section Running Quick Check on page 4 44 and section Running Module Check on page 4 45 to confirm that the replacement board is functional and allow it to come up to operating temperature Note It is recommended that you run a minimum of two 2 loops of Quick Check and Module Check or until the tester has run for a minimum of 30 minutes 5 Once the replacement board and the rest of the tester have warmed up for 30 minutes perform calibration o
140. US Canada Mexico and Brazil Teradyne Inc Federal Express Supply Chain Services 3835 Knight Road Memphis TN 38118 Attn Defective Return Depot Israel E amp M Engineering 6 Hachilazon Street Ramat Gan Israel 52522 South Asia including Singapore Thailand Malaysia Indonesia India and Australia Teradyne Singapore Limited c o Federal Express Pacific Inc 6 Changi South Street 2 06 00 Singapore 486349 Attn Defective Return Depot Japan Teradyne K K c o Federal Express Tokyo LDC Tokyo BEC Bldg 3 6 4 Rinkai cho Edogawaku 134 0086 Tokyo Japan Attn Defective Return Depot Taiwan Teradyne Taiwan Ltd c o DHL Taiwan Corp c o Amigo Logistics Corp No 18 Ding Hu 5th St Ta Kang Tsun Kuei Shan Hsiang Tao Yuan Hsien Taiwan 333 R O C Attn Defective Return Depot 10 10 J750E 512 Pin Test System Service Reference Manual Printed Circuit Board Pin Identification Diagrams The Printed Circuit Board Pin Identification Diagrams chapter of this manual provides J750E tester circuit boards pinout diagrams that may assist in performing system maintenance and repair The following diagrams are included in this chapter e DPS board pin identification DUT view e CAL CUB board pin identification DUT view e Channel board pin identification DUT view e CTO board pin identification DUT view e MSO ASIO board pin identification DUT view e APMU board pin identification DUT view e
141. Unless otherwise specified it is recommended that you run one pass of Quick Check Module Check Internal Calibration and Internal Performance Verification as outlined in section Running Maintenance Programs on page 4 32 of Chapter 4 Maintenance Software after any repairs are made Circuit Board Removal and Replacement This section provides instructions for removing and replacing circuit boards in the J750E tester The following tools are required to remove and replace circuit boards in the J750E tester e Large slotted screwdriver 5 16 Note If circuit boards are added or removed from the tester the 3 3 volt power supply should be checked and adjusted as required 8 10 J750E 512 Pin Test System Service Reference Manual Removing Circuit Boards Perform the following steps to remove the boards from the tester Always wear a tested grounding strap while working on the J750E tester When removing any board from the tester ensure the board is fully removed from the card cage slot before changing the plane of the board Failure to do so may result in damage to components on the board Carefully and slowly remove the board from the tester Note If a circuit board has an airflow control board installed in an adjacent slot you must remove the airflow control board prior to removing the circuit board Failure to remove the airflow control board first may result in damage to the circuit board upo
142. V GND SNWdV GND enWdv GND Ltd ONE bvinmdv GND indy GND jznwWdv ONE eenwdv ONE jsznwav ONG sznmav GND de GND plsya LO OS Xafs rapis Mapzs je eds ano zds ano LO F 000953 iew DUT vi ion t identifica In I APMU board pi Figure 11 6 Printed Circuit Board Pin Identification Diagrams 11 7 Air FLow e rz Roa anaa A A ode Kamd we foro wie kul we Ter we kaal w naa pde kaal wegl wg kal wow w und ww aro me forua pe Kul e Kul g soba pde ae pte ad wg Kusl g argd poe ad gr van pde pde pio LB uranio mde eo wg al pde ul pe vol e iaa ew ero e oul woll el pde pe pe SS E Ea Hr bp aD epog ab gt ER Y R D R E H H LI H l 1 H H ll H A 3 l g 1 e a mde foro we orob pde Test ge ooa we veel we oraal we ve we gd pe jo ge ku gw Log and me orao pe kand pte kan g kand wg ue pe and wg kKagi g oa poe od wg mn po al LB iio pde woo wg al pe foroo phe ioa e wi pe oo e forani ev el ewell SE EE E E SS FEH SS ESPE ER E AA A EA 8 CIE SE e Dreonnaloteteg m ngt s n ER E R D H E H D H 3 I 1 H H H DI H 3 l g 1 ee Wand pe aal pe kal we ooo we kond we lora pe kat pe Igel pe ag pte Ia we kou pde pe dl ve eo g kal re ob pee ef e wua e og e ug e gt pe get pte em pde pe po ode ao we aio pe foroa pte foray we Juge we Tarte pe ooo sm ug ww oo pte sio p
143. Verification after any repairs are made Note If any step fails stop and diagnose the problem The following information lists the maintenance programs and some tips for helping you determine what programs to run e External Calibration Only run as follows Recommended at initial system installation to establish a baseline calibration There is a shift of greater than 5 C 9 F in operating temperature of the tester The CAL CUB has been replaced A CTO has been replaced if present You experience marginal failures when running Calibration or Performance Verification e External Performance Verification Only run after External Calibration has been run e Continuity Check or DIB Continuity as applicable Run to help detect contact problems Maintenance Software 4 31 e Quick Check Can be run without running Calibration if the calibration file CalibrationData txt is reset first e Module Check Can be run without running Calibration if the calibration file CalibrationData txt is reset first e Calibration Internal Run if The tester is installed or re installed Previously calibrated hardware is changed Extensive tester maintenance has been performed Tester hardware or software is upgraded e Performance Verification Internal Run if The tester is installed or re installed Previously calibrated hardware is changed Extensive tester maintenance has been performed Tester hardware or software is
144. X Stable Unstable Keep away from ignition sources sparks heat and flame HAZARDOUS DECOMPOSITION PRODUCTS Will Not Occur TTERT OS May Occur XS Will Not Occur INCOMPATIBILITY Materials To Avoid Water AS Other Concentrated Nitric amp Sulfunc acids Oxidizers Aldehydes VI SPILL OR LEAK PROCEDURE INFORMATION STEPS TOBE TAKENIN CASE MATERIALIS RELEASED ORSPILLED Eliminate ignition sources Ground handling equipment to prevent sparking Wear respirator and protective clothing Dike and contain spill Suppress vapors with water fog Soak up residue with absorbent clay or sand Place in non leaking containers for disposal WASTE DISPOSAL METHODS Incinerate waste in accordance with Federal State and Local regulations VII SPECIAL PROTECTION INFORMATION ENTILATION TYPE Use local exhaust ventilation to prevent build up of explosive vapor concentrations and keep below TLV also see section IV RESPIRATORY PROTECTION MSHA NIOSH approved full facepiece respirator with organic vapor cartidge canister PROTECTIVEGLOVES EYEPROTECTION Natural Rubber Safety Glasses OTHERPROTECTIVE EQUIPMENT Eye Bath Safety Shower VIII STORAGE AND HANDLING INFORMATION STORAGE TEMPERATURE INDOOR HEATED REFRIGERATED OUTDOOR Ambient Ambient NA NA Ambient Drum containers should be grounded Keep container closed when not in use Avoid eye and skin contact Keep away from children Keep away from heat and flame Use with adequate ventilation Wash with soa
145. a Patch Cable to the Input Hi and Input Lo jacks on the Agilent HP 3458A multimeter Figure 4 17 shows the cable connected to the meter Note The portion of the 2 conductor plug with the tab should be connected to the Input Lo jack Maintenance Software 4 63 Terminals m Front Q Sense Input From Daughter Card Assembly From Tester Ground Connection F 000934 Figure 4 17 Cables connected to meter 18 Connect the other end of the black banana to banana cable to the Q Sense Guard jack on the meter 19 Connect the Green plug on the other end of the 2 Conductor Shielded Banana Patch Cable to the banana to banana cable connected to the Sense Guard jack on the meter 20 Click OK in the dialog box The DC portion of External Calibration begins The LMF selected in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicated that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred 21 Once the DC portion of the test is complete a dialog box is displayed prompting you to install the AC Calibration Daughter Card onto the MSO Calibration DIB Figure 4 18 shows the dialog box for an LMF installed in slot 7 of the tester Microsoft Excel xx Install LMF Cal DIB and insert AC
146. additional power conditioning should be considered An expert with local knowledge should be consulted to determine if additional power conditioning is needed AC power should be checked on a regular basis since the actual power that is available from the factory source can change as the factory expands or new buildings are built in the area Table 7 6 lists the AC power requirements Four Wire Delta Three 3 phases plus ground Five Wire Wye Three 3 phases plus ground and neutral Frequency 50 or 60Hz 2Hz Line Variations 5 Noise Transients Less than 300 volts not to exceed 8msec and 1 watt External RFI 10KHz 1 6MHz 1 6MHz 30MHz Table 7 6 AC power requirements Maintenance 7 19 Table 7 7 lists the input line current per phase for one 1 tester based on the number of channels in the tester The basic power vault is designed to power a single J750E tester An additional Output Power Module can be added to the vault so that it can power two 2 testers as long as the total power consumed by each tester does not exceed the 15 5KVA available from the vault The rating of the output power circuit breaker CB5 in the power vault is 32 amps 7 20 J750E 512 Pin Test System Service Reference Manual Customer Input Power 256 Channels 512 Channels 190 VAC 17 69 amps 27 02 amps 200 VAC 16 80 amps 25 67 amps 208 VAC 16 16 amps 24 68 amps 240 VAC 14 00 amps 21 39 a
147. adyne lG XL license license dat and the tester configuration files FLE products in the appropriate directories typically those in the C Program Files Teradyne lG XL lt your IG_XL version gt tester directory from your local storage Contact the System Administrator for installation of Anti virus software networking utilities user logins and other facility specific configurations if any are used Do NOT connect the system to the customer s local network without consulting the System Administrator Please review the latest tested and recommended SUDS patch list located in the Product Support folder of eSupport and advise the site System Administrator of the latest tested security patches that are recommended for use This completes the Back Up Media restoration process 8 62 J750E 512 Pin Test System Service Reference Manual Troubleshooting The Troubleshooting chapter of this manual contains procedures that can be used to troubleshoot and isolate failures in the tester The following information is covered in this chapter Pogo Pin Alignment Check Contact Problem Troubleshooting Vacuum Leak Troubleshooting Power Problem Troubleshooting Tester Communication Problem Troubleshooting Windows and Software Troubleshooting 9 1 Pogo Pin Alignment Check This section provides information for checking pogo pin alignment on the J750E tester The following tools are required to check the alignment of the pog
148. ailable Flammable Explosive limits lower Not avaiable Flammable Explosive fimits upper Not available Extinguishing media Foam dry chemical or carbon dioxide Special fire fighting procedures Wear self contained breathing apparatus and full protective clothing such as tum out gear Unusual fire or explosion hazards None Hazardous combustion products Oxides of carbon Oxudes of sulfur Oxides of nitrogen Irritating organic vapors 6 ACCIDENTAL RELEASE MEASURES Environmental precautions Prevent product from entering drains or open waters Clean up methods Soak up with inert absorbent Store in a partly filled closed container until disposal 7 HANDLING AND STORAGE Handling Avoid contact with eyes skin and clothing Avoid breathing vapor and mist Wash thoroughly after handling Use only with adequate ventilaton m torage For safe storage store at or below 38 C 100 F Keep in a cool well ventilated area away from heat Incompatible products Refer to Section 10 For information on product shelf life contact Henke Customer Service at 800 242 4874 8 EXPOSURE CONTROLS PERSONAL PROTECTION Engineering controls No specific ventilation requirements noted but forced ventilation may stil be required if concentrations exceed occupational exposure limts Respiratory protection Use NIOSH approved respirator if there is potential to exceed exposure imitis item No 21463 Product name Loctite R 222 Threadi
149. ain circuit breaker CB1 at the front of the AC Power Vault 4 Place a padlock or other suitable locking device through the hole in the mechanical lockout mechanism on the main circuit breaker of the vault A lockout tagout identification should also be placed on or next to the padlock Note Remove and retain the padlock key if applicable until service or repair has been completed 5 Once service and repair has been completed remove the padlock and re energize the test system as outlined in the J750k and J750 512 Pin Test System Installation and Disassembly Manual Safety Hazards This section identifies the safety hazards of the J750E 512 Pin Test System AC Power Vault AC power to the J750E is supplied through a self contained power transformer located in the AC Power Vault The transformer has a 3 phase plus earth ground 4 wire delta connected primary with various taps for 3 phase AC mains voltages of 190v to 480v Figure 2 5 identifies the safety controls and main components of the power vault 2 10 J750E 512 Pin Test System Service Reference Manual F 000326 Front View Rear View 1 Main Circuit Breaker CB1 Main System AIC 2 Key Operated Emergency Stop Switch S1 Disables all power beyond the master power controller 3a Power Off Switch S2 Disables all power to tester and peripherals 3b Power On Switch S3 Enables all power to the tester and peripherals 4 AC Mains Power Cable Must b
150. al resistor up to 1M ohm Shrink tubing Construct the ground wire as follows 1 Connect one end of the flexible insulated stranded wire to the banana jack 2 Connect the other end of the flexible insulated stranded wire to the clip lead Note If the optional resistor is being used perform steps 3 and 4 3 Cut the flexible insulated stranded wire approximately 3 7 5 cm from the end of the banana jack then slide the shrink tubing over the wire 4 Connect the resistor in series with the wire cover it with the shrink tubing then shrink the tubing in place Figure 7 1 shows a properly constructed ground wire with the optional resistor 7 6 J750E 512 Pin Test System Service Reference Manual Flexible Stranded Wire 1M ohm Resistor covered with Shrink Tubing F 000333 Figure 7 1 DIB ground wire with optional 1M ohm resistor Grounding Calibration DIBs Perform the following steps to ground the Calibration DIB Always wear a tested grounding strap while working on the J750E tester 1 Place the tester so that the DIB mounting surface faces up Note This procedure only details the instructions for installing the DIB Note When installing the board it should remain attached to ground until vacuum has been applied to the tester and the board is seated When removing the board it should be properly grounded prior to releasing the vacuum from the tester Maintenance 7 7 2 For
151. also contains a programming interface IG XL includes sample operator interfaces to illustrate how the Production Controls can be used Production Interface Tools The Production Interface Tools are GUI components that allow an operator to perform actions or view status such as a Start Test button or a display of the binning results Handler Prober Communication Drivers Handler and prober communications drivers are included as part of IG XL and are shipped in source code form so they can be used as a starting point for new driver development Device Program Workbook The Device Program Workbook is made up of the Data Tool Program and the Data Tool Worksheet Figure 3 3 shows a sample workbook Software Description 3 5 X Teradyne IG XL DataTool Tester Mode C Program Files T eradyne J 750 Bin J750Maint_xls 8 File Edit View Insert Format Tools Data IG XL Window Help JOS R SRY sBeS o BeSl 21 zl mea 100 DI arial yi piz u E Seles x 1858 te n IS Il QuickCheck Chansito leen meer EARED E B5 QuickCheck IG XL Debug Toolbar Job Name i AC Specs DCSpecs F QuickCheck_ Pinmap QckTests Flow ModuleCheck Pinmap MckTests Flow Calibration Pinmap CalTests Flow Performance Pinmap pyTests Flow ExternalCal Pinmap ExtCalTests Flow ExternalP Pinmap ExtPyTests Flow gt H Home Jobs Flow
152. ance Programs and any test applications that may be running on the test system computer Open the tester as outlined in section Opening the DIB Mounting Side of the Tester on page 8 8 of Chapter 8 Repair Remove the five 5 8 32 x 3 8 long Phillips head screws and star washers from the two 2 DIB EMI covers on the DIB fixture using the no 2 Phillips screwdriver then remove the covers from the tester Locate the six 6 j 20 x 2 S long hex head mounting bolts that secure the card cage to the tester housing Check to see that the 0 006 feeler gauge does not pass between the surface where the card cage meets the tester housing at the six 6 bolts Figure 9 8 shows the locations to check Troubleshooting 9 15 wn Si ge EE Y o KEE E i eg Check Mating E LE e Surfaces Li zs mmm 6 Places E j gt a me A oan Py Z2OUVWELENS 96 HOMO F 000122A Figure 9 8 Card cage mounting locations If gaps are present perform step 7 through step 13 7 Remove the circuit board as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair 8 Loosen four 4 card cage alignment bolts approximately two 2 full turns using the 9 16 hex wrench 9 Turn the tester so that the DIB mounting surface faces the floor 10 Loosen the six 6 j 20 x 2 S long hex head mounting bolts that secure the card cage to the tester housing 11 Gently wiggle the card cage while pressin
153. and loh to turn on the diode bridge on the Cal DIB The voltage out of the bridge is measured by the CAL CUB to determine Vcp Since the CAL CUB is used as the current source and to make the measurements only one channel may be tested at a time Pin PMU The CAL CUB provides a source voltage that is measured by the PPMU The PPMU then provides a source voltage that is measured by the CAL CUB The Pin PMU is connected to the CAL CUB through the analog matrix located on the Cal DIB The external matrix relays on the Cal DIB are connected to the channel board being tested are closed and the BPMU to matrix relays on the channel board are opened The PPMU and Board PMU relays on the channel board being tested are closed then the functional relay is opened The active load and driver to the board are turned off Pin PMU checks the following e 1 to 7 Force Voltage The channel board provides a source voltage between 1 and 7 volts and the CAL CUB measures the value at 1 3 and 7 e 1to 7 Measure The CAL CUB provides a source voltage between 1 and 7 volts and the channel board measures the value at 1 3 and 7 e 2ma range The channel board provides a 2ma source current which it measures at 2ma Oma 2ma e 200ua range The channel board provides a 200ua current which it measures at 200ua Oma 200ua e The integrating current measurement ranges are calibrated at 20ua and 2ua Board PMU The Board PMU does not have hardw
154. and shut off the tester Power can be restored but the tester will continue to turn off approximately every 2 minutes until the fan problem is repaired The fans used in the J750E tester are equipped with a rotation sensor and alarm circuit Each fan sensor monitors and detects if that fan is functional and sends a signal to the CAL CUB All of the fan sensors are wired to an 8 pin connector J2 located on the top edge of the CAL CUB using blue wires Additionally an Alarm Vcc 5 volts and ground are present at the connector Each sensor line should measure 4 5 volts to 5 volts when the fan is working properly The fan sensor wiring and signals are shown in Table 6 8 AC DC Power and Cooling 6 25 Fan Signal Wire Color Voltage Level Alarm Vcc Red wire 5 volts From CAL CUB Alarm ground Black wire From CAL CUB Alarm output Blue wire gt 4 5 volts To CAL CUB Fan OK HI N A 4 5 to 5 volts Fan speed gt 2000rpm Fan defective N A Low lt 4 0 volts Table 6 8 Fan sensor wiring The Fan Fail circuit of the CAL CUB and associated wiring are shown in the Figure 6 9 The CAL CUB Fan Fail Circuit is shown in Figure 6 15 The fan sensor to CAL CUB connections are shown in Figure 6 16 Power Off Connector CALCUB Fan Fail Circuit FanFailDelay bsy Nomina Delay 5V F 00963B Figure 6 15 CAL CUB Fan Fail circuit Fan Wiring The Fan Fail circuit to CAL CUB connections are
155. annel is available for sourcing Analog signals may be sourced and captured on each pin in one of several frequency bands For each frequency range analog signals are band limited for capture or reconstructed for sourcing by analog filters or a combination of analog and digital filtering After pattern microcode triggers the start of signal sourcing samples are provided to the D to A converter at a fixed rate Sample rate conversion software can be used to pre encode a desired signal into a high sample rate description The high sample rate data is then clocked out of the fixed sample rate DAC Capture samples are anti alias filtered and then digitized at a fixed rate The capture trigger microcode controls when sample capturing begins but cannot control the rate of sample capture Hardware and or software filtering and sample rate conversion then produces samples at the desired rate On most frequency ranges digital low pass filters perform much of the required anti alias filtering Sample rate conversion is often done on the DSP engine A filter bypass mode is provided to allow high frequency signals to be captured for undersampled or sourced for time domain applications A distributed pattern generator module is included on the analog channel board to synchronize the analog source and capture to the digital pattern The fail bus signals are also routed to the DSP processors to allow communication from the DSP processor on the digital chann
156. anout J d 64 127 anout KR Fore 10 ma Pa Int 4 128 192 N 0 anout ro al Be Utlity 1 n mm 255 a E Di g 1 Be Wim el i 1 Vilty3 ql anout 1 E ht th 320 383 1 Uility4 utili bg I a y anout 1 Ublity5 384 447 I O Dd anout View HS Chan 1 a Viliys 448 an 1 p i c I HIM Channel 0 I De H I Channel 1 Oand t 1 c T BPMU Force I Cl l a A Channel 2 amp 3 I BPMU Sense C 1 Se a R 0 7 i CL SEKR o CH D Chameld 7 ed 1 BPMU Guard On ay DI H l oc e Di 1 I ro ze e Channel 8 15 EXT F H D A 1 I a 6 Channel 16 31 I EXT_S R Fan ai D q i o Channel 32 63 e I D gt I A P I _ _ _ _ _ A F 000040 Figure 5 11 Cal DIB schematic Hardware Description 5 23 Memory Test Option MTO The Memory Test Option MTO provides the capability to test either standalone or embedded memories It is fully integrated with the J750E Test System allowing testing of a device s logic and memory blocks on the same test system The MTO also provides hardware to support specialized memory failure analysis tools The MTO is provided on a separate 10 x 4 25 4 cm x 10 2 cm printed circuit board that is mounted on a J750 chamnel board in place of the State Bus Terminator The MTO board includes the MTO ASIC memory and State bus termination resistors and GTL CMOS logic level translators The MTO output is connected to the waveform ASIC via the Alternate Data Bus and can be multiplexed to any or all of the 6
157. ansformer wire connections for the different input voltages 6 2 J750E 512 Pin Test System Service Reference Manual Input Voltage Wire Connections Main Lines 190 B1 to G1 to A2 to F2 B2 to G2 to A3 to F3 B3 to G3 to A1 to F1 G1 G2 G3 200 C1 to H1 to A2 to F2 C2 to H2 to A3 to F3 C3 to H3 to A1 to F1 H1 H2 H3 208 D1 to l1 to A2 to F2 D2 to 12 to A3 to F3 D3 to 13 to A1 to F1 11 12 I3 240 E1 to J1 to A2 to F2 E2 to J2 to A3 to F3 E3 to J3 to A1 to F1 J1 J2 J3 380 F1 to B1 F2 to B2 F3 to B3 G1 to A2 G2 to A3 G3 to A1 G1 G2 G3 400 F1 to C1 F2 to C2 F3 to C3 H1 to A2 H2 to A3 H3 to A1 H1 H2 H3 416 F1 to D1 F2 to D2 F3 to D3 11 to A2 12 to A3 13 to A1 11 12 13 480 E1 to F1 E2 to F2 E3 to F3 J1 to A2 J2 to A3 J3 to A1 J1 J2 J3 Table 6 1 Power vault transformer connections The low voltage transformer provides 24 volts AC for EMO and AC on off control With the contactor energized power is distributed to the AC Power Module circuit that controls AC power distribution to the individual J750E testers The vault can be powered on and tested for correct output voltage without the tester being connected Figure 6 1 shows a block diagram of the power distribution of the AC Power Vault Additional information on the power vault can be found in the J750 Test System Basler Electric 18KVA and 36KVA Po
158. ard Utility Bits X8 per 32 Channels gt Shielded by BPMU_Common Guard Shielded by BPMU_Guard Shielded by Analog Ground F 000170 Figure 5 10 Channel board relay board block diagram Channel 00 shown Hardware Description 5 21 Calibration Device Interface Board Cal DIB The Calibration DIB provides a path for calibrating the J750E hardware The path is made via a relay tree that allows calibration hardware to connect to the appropriate board channel boards DPS etc in the tester Figure 5 11 provides a schematic of the Cal DIB 5 22 J750E 512 Pin Test System Service Reference Manual A Current Calibration Cal I gt O y i 100 Mhzc e J6 Voltage H Wl calibration 100 Mhz CLK P ges Be e DB FORCE 4 DPS Force a DBS A DB SENSE Be i DPS Sense CH DB Guard Mout EE Ws de n i LO Oh DPS Fin 15 ies 15 12 A ogor gt CH Bis 10 OHM a S 10 watts 5 MW AW AW we er H 200mv D 1 e D n E SC pi 477 15 ANV UN ANN CTO Foroe DGS C di CTO Si View TORIO Be ge T From CUB g DUT Acquire 0 gt Chan 0 DPS CUB cro Be SM r 9 77 C anout Be VREF2 h 0 m O F
159. ardware into the power supplies tester electronics or backplane 1 Disconnect the AC line connector from the 24 volt DPS 3 3 volt power supply module by pushing in on the tabs at the ends of the connector with your thumb and first finger then pulling up on the connector of the wire harness at the same time 2 Remove the AC line connections for the 15 volt 10 volt 36 volt and 34 volt power supply module as follows Remove the yellow protective shield from the connector terminals Loosen the screws on the connector terminals a few turns then using the no 2 Phillips screwdriver remove the three 3 terminal lugs from the connector 3 Disconnect the sense line connectors by wiggling the connectors and pulling them up away from the supply Note The sense line connectors are white 6 pin or 12 pin connectors connected at the bottom of the power supplies There may not be a sense line connector attached to every module of the supplies 4 Remove two 2 each 10 32 hex nuts 10 split lock washers and 10 flat washers from the 24 volt DPS and 34 volt power supply terminals using the socket wrench and 3 8 socket then remove the terminal lugs from the supplies 5 Loosen the screws on the connector terminals of the 15 volt power supply a few turns using the no 2 Phillips screwdriver then remove the two 2 terminal lugs from the connector 6 Loosen the screws on the connector terminals of the 10 and 36 volt power su
160. are to support calibration The driver must call the calibration library to obtain the driven and measured Digital to Analog values The Kelvin port of the BPMU is connected to the precision references on the CAL CUB through Cal DIB For voltage measurement ranges of 2v 5v 10v and 24v the CAL CUB forces the voltage at full scale at Ov and with full scale Kelvin on the Cal DIB closed The BPMU measures voltage with the sense wire For voltage force ranges of 2v 5v 10v and 24v the BPMU forces the voltage with Kelvin on the Cal DIB closed The CAL CUB monitors the voltage on the sense wire The test is repeated for voltage clamps when the BPMU is in the force current mode For current measurement of 2ua 20ua 200ua 2ma 20ma 200ma full scale and zero current the CAL CUB supplies voltage through the series resistors with Kelvin on the CAL CUB closed The supply voltage is measured before the resistor and the load voltage is measured after the resistor The values are added and then divided by the resistance to obtain a value for the known forcing current This value is then compared with the BPMU measured current Maintenance Software 4 11 For current forcing current is driven into precision resistors on the channel board and the voltage is measured by the CAL CUB with Kelvin on the Cal DIB closed The process is repeated for current limits Temperature Measurements Temperature sensors on each channel board measure and stor
161. art Number 358 692 00 e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate Maintenance Software 4 33 Run External Calibration as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has already been launched 1 Connect the GPIB cable to the connector at the rear of the Agilent HP 3458A multimeter and the connector on the GPIB card at the rear of the personal computer of the tester 2 Apply power to the multimeter and allow it to warm up for a minimum of 2 hours Note The meter s GPIB address must be set to 22 to ensure proper communication between the meter and the personal computer The GPIB address 22 is the multimeter s default setting 3 Check and set the meter address as follows e Press the Shift lt On Off keys to turn on the front panel menu e Press the lt key twice two times to access UO Menu selection e Press the v key to access HP IB Addr selection e Press the v key to access the parameter level to set the address e Use the lt gt 1 M keys to change the address as required e Once the address has been set to 22 press the Auto Man Enter key to save the address and turn off the front panel menu Note The
162. assignment of edge sets to pins that can be used on a vector by vector basis The Time Sets Sheet is used in situations where the test program requires more than 32 edge sets for all pins in a burst Edge Sets Sheet The Edge Sets Sheet is used to define named combinations of timing values and data formats to be used by particular pins or pin groups during the application of test vectors The Edge Sets sheet is used in situations where the test program requires more than 32 edge sets for all pins in a burst Pattern Sets Sheet The Pattern Sets Sheet creates named lists of pattern files pat and pattern groups to be executed or used by a test instance Pattern Group Sheet The Pattern Group Sheet associates pattern files into named groups Pattern groups are treated as a contiguous burst of vectors IG XL Context Toolbar A Context Toolbar is added to Excel as part of IG XL The toolbar lets you quickly access different parts of the workbook by selecting items from convenient pulldown menus Figure 3 4 and Figure 3 5 show the toolbar I QuickCheck Chanslto X X X PCIT_TEST X F 000185 Figure 3 4 IG XL Context Toolbar The functions available from the toolbar are as follows Active Job The Active Job specifies the job as defined on the Job List sheet It also determines what Data Tool sheets make up the program to be validated and executed Active Channel Map The Active Channel Map selects the Channel Map sheet to be used for
163. at the Low to Mid Frequency Analog Source Input Output Module LMF listed above has been calibrated using the following external equipment Agilent HP Meter Model 3458A Serial Number Equipment Calibration Date Fluke Meter Model 57904 Serial Number Equipment Calibration Date While running the following software Teradyne IG XL Version Teradyne J750 Maintenance Software Version This certificate is valid for 6 months after which time re calibration is required Calibration Completed Next Calibration Due Date Performed By Teradyne Inc Semiconductor Test Division J750 Platform 500 Riverpark Drive North Reading MA 01864 System Overview 1 13 Certificate of Calibration APMU Part Number 517 400 00 APMU Serial Number Customer Name Teradyne certifies that the Analog Parametric Measurement Unit APMU listed above has been calibrated using the following extemal equipment Agilent HP Meter Model 3458A Serial Number Equipment Calibration Date While running the following software Teradyne IG XL Version Teradyne J750 Maintenance Software Version Tlus certificate is valid for 6 months after which time re calibration is required Calibration Completed Next Calibration Due Date Performed By TERA Teradyne Inc semiconductor Test Division J750 Platforrn 500 Riverpark Drive North Reading MA 01864 1 14 J750E 512 Pin Test System Service Reference Manual AC Power Vau
164. ate Assembly 4 fans 640 cfm total Left Power Supply Jacket 2 fans O 166 cfm total Right Power Supply Jacket 2 fans O 166 cfm total Total 8 fans O 972 cfm e cfm cubic feet minute Table 7 5 Tester airflow output requirements Personal Computer Checks Most personal computer manufactures have maintenance recommendations for their computers The documentation provided with the computer will give specific information for that particular computer model Maintenance 7 13 The following general recommendations may also be helpful when performing computer maintenance Confirm the AC line voltage is correct Confirm proper operation of the CPU cooling fan Confirm proper airflow around the PC ensure that the airflow is not blocked and clean the filter Check the DC power supplies Ensure that the CD ROM and floppy disk drives are clean according to the manufacturer s instructions Run any disk drive utilities that are installed on the computer Clean the keyboard by holding upside down and then shaking it Clean the monitor both the top surface and the screen Clean the mouse Check all cable and power cord connections Perform regular backups of all data Create an Emergency Repair Disk and update it regularly Delete any unnecessary files PIB DIB Cleaning Probe Interface Boards PIBs and Device Interface Boards DIBs should be cleaned as part of any preventative maintenance program to prevent
165. ator to its driver Optional Instruments Calibration Calibration of the optional instruments is not performed as part of the regular tester calibration The following optional instruments require their own separate reference calibration if they are installed into the J750E tester e Converter Test Option e Mixed Signal Option e Analog Parametric Measurement Unit Converter Test Option The Converter Test Option CTO has on board references and must be calibrated during normal operation as a value is programmed The CTO is NOT calibrated against the CAL CUB but against an external reference using the DC matrix on the Cal DIB The Performance Verification Test checks the CAL CUB against the CTO They use a similar reference so they are expected to have similar accuracy The following tests are performed to check the CTO e DC Measure The relays on the CTO are closed and a precision voltage is applied to the CTO from an internal reference DC Measure is checked at the following voltages Low Range 0 0v and 3 0v High Range 0 0v and 6 0v e DC Force The relays on the CTO are closed to provide a path to an analog difference circuit on the CAL CUB 0 0v is applied from an internal reference and the board PMU measures the difference after subtracting the ground value This is repeated for 3 0 and 6 0 volts Mixed Signal Option The Mixed Signal Option MSO has reference circuitry that must be calibrated to a traceable externa
166. atures and recommendations for this system are e The Main circuit breaker CB1 located on the front of the AC Power Vault has a mechanical lockout mechanism that can keep power off during service when it is secured with a lock or other suitable retaining device Itis recommended that you use this mechanism to lock power off when necessary for servicing the system A WARNING La When it is necessary to service the system power vault the lockout tagout mechanism at the facility branch service connection supplying power to the system AC mains power lines should be used This is the only way to ensure that power to the test system main power vault is totally disabled It is also recommended that acceptable lockout tagout warnings and identification forms be applied to the lockout mechanism when lockout tagout is used Figure 2 4 shows an example of a suitable warning form WARNING This equipment is locked out for service Before removing this lockout mechanism and applying power to the system contact Insert name of individual F 000203 Figure 2 4 Lockout tagout identification form Safety Information 2 9 Equipment Shutdown and Lockout Tagout Procedures Shut down and lock out and tag out the test system equipment as follows 1 Shut down the test system computer system as outlined in Chapter 8 Repair 2 Shut down the J750E tester and AC Power Vault as outlined in Chapter 8 Repair 3 Turn off the m
167. be calibrated select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 13 Properly ground the Calibration DIB 14 Place the DIB vacuum switch on the tester to the UNLOCK off position 15 Remove the Cal DIB from the DIB fixture on the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage Optional Instrument Reference Calibration This section of the manual describes how to run external calibration and external performance verification for the following optional instruments e Converter Test Option CTO e Mixed Signal Option Low to Mid Frequency Analog Source Input Output Module MSO LMF e Analog Parametric Measurement Unit APMU CTO The J750 Maintenance Software allows the following CTO Calibration and Performance Verification programs to be run from the standard Maintenance User Interface e External CTO Calibration e External CTO Performance Verification Running External CTO Calibration Run External CTO Calibration as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched the J750Maint xls job has been loaded and External Calibration has just been run 1
168. card positioned on the Calibration DIB for an LMF module installed in slot 1 LMF Calibration DIB P N 361 212 00 MSO DC Meter Calibration Daughter Card Assembly P N 445 016 00 F 000935 Figure 4 14 Daughter card assembly positioned in slot 1 location of MSO Calibration DIB Maintenance Software 4 61 13 Click OK in the dialog box The LMF DC Meter hook up dialog box is displayed on the screen Figure 4 15 shows the dialog box LMF DC Meter hook up x 3 H F 001032 Figure 4 15 LMF DC Meter hook up dialog box 14 Connect one end of the 2 Conductor Shielded Banana Patch Cable Part Number 811 046 00 to the appropriate jacks on the daughter card Figure 4 16 shows the cable connected to the card for an LMF module installed in slot 1 Note If the LMF being calibrated is installed in slots O to 3 use jacks J2 and J4 If the LMF being calibrated is installed in slots 4 to 7 use jacks J1 and J3 Note The portion of the 2 conductor plug with the tab should be connected to the appropriate black jack J3 or J4 4 62 J750E 512 Pin Test System Service Reference Manual F 000933 Figure 4 16 Cable connected to daughter card 15 Connect the Green plug of the cable to the J5 jack on the card 16 Connect one end of one of the black banana to banana cables to one of the Green ground jacks on the DIB mounting surface of the tester 17 Connect the other end of the 2 Conductor Shielded Banan
169. cation The CAL CUB board is equipped with a 200MHz Hermetic Sealed Hybrid Oscillator that is divided by 2 to generate the 100MHz system clock used to control the J750E tester timing This 100MHz is verified with the use of a Frequency Counter connected to the IEEE bus interface The Master Clock Specification e Frequency 100 MHz e Accuracy 15 ppm 5 ppm year 4 8 J750E 512 Pin Test System Service Reference Manual External Performance Verification is performed on the CAL CUB and if present the CTO board External Performance Verification of the CTO only checks the accuracy of the CTO board and not the overall tester A valid External Calibration file CALCUBCAL TXT must be present before External Performance Verification can be performed It is recommended that External Performance Verification be run after External Calibration has been performed Calibration Internal Calibration is performed to allow the user calibrate the tester against the reference circuitry located on the CAL CUB Calibration must be performed when the following occur e The tester is installed or re installed e Previously calibrated hardware is changed e Extensive tester maintenance has been performed e Tester hardware or software is upgraded A valid External Calibration file CALCUBCAL TXT must be present before Internal Calibration can be performed Channel Board DC Calibration The channel boards in the J750E require calibration to ensu
170. ccess dial 0 800 220 111 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Croatia International charges will apply Czech Republic For toll free AT amp T Direct Access dial 00 420 001 01 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the Czech Republic International charges will apply Denmark 800 837 23963 for toll free access where is the international dial access code for Denmark For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Denmark International charges will apply Dominican Republic For toll free AT amp T Direct Access dial 1 800 872 2881 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the Dominican Republic International charges will apply Egypt For toll free AT amp T Direct Access dial 02 510 0200 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Egypt International charges will apply Finland 800 837 23963 for toll free access where is the international dial access c
171. ce 13 Attempt to locate a leaking board by pressing down on each board in an area near the PCB spring ejectors to increase the force applied to the pogo block o rings 14 Check the pogo block o rings as outlined in the section Pogo Block O ring Inspection and Cleaning on page 7 17 section of the Chapter 7 Maintenance chapter of this manual to ensure the o rings are clean and free from damage 15 Check the PCB spring ejectors to ensure the ejectors are within tolerance 16 Replace any easily moved board with an airflow control board to see if it improves vacuum 17 Alternately replace all the boards with airflow control boards If the vacuum is good start replacing the boards one at a time in their original slots and record the vacuum readings at each step 18 If a board seems to have a vacuum leak try it in several different slot locations to see if the leak follows the board 19 Check for good seating of the o ring in the pogo block connector Checking DIB Vacuum This section provides information for checking vacuum at the DIB fixture of the tester The following tools are required to check the DIB vacuum e 512 Clear DIB Vacuum Alignment Gauge Teradyne Part Number 235 711 00 Part of 512 Clear DIB Field Kit Teradyne Part Number 235 721 00 Perform the following steps to check the DIB vacuum Always wear a tested grounding strap while working on the J750E tester 9 10 J750E 512 Pin Test System Service Refer
172. cement procedures follow Fan Plate Assembly Fan Removal and Replacement This section provides instructions for removing and replacing the fans in the fan plate assembly of the J750E tester 8 40 J750E 512 Pin Test System Service Reference Manual The following tools are required to replace the fans in the fan plate assembly in the tester e No 2 Phillips screwdriver e Medium slotted screwdriver 1 4 e 3 32 hex wrench e Adjustable torque wrench up to 15 inch pounds e No 2 Phillips screwdriver bit e 3 32 hex wrench bit e Medium slotted screwdriver bit 1 4 e Wire strippers e Side cutters or utility knife e Tie wraps Removing Fan Plate Assembly Fans Perform the following steps to remove the fans from the fan plate assembly Always wear a tested grounding strap while working on the J750E tester Note Make a note of fan rotation prior to removing the fan from the fan plate assembly 1 Remove the fan plate assembly from the tester as outlined in section Removing Fan Plate Assembly on page 8 19 2 Remove the four 4 8 32 x 5 16 long socket head screws from the fan plate cover using the 3 32 hex wrench 3 Disconnect the two 2 slip on lug connectors from the circuit breaker on the plate 4 Remove fan plate cover from the fan plate assembly 5 Using the side cutters remove any tie wraps securing the fan cable to the cables of the other fans 6 Remove the four 4 6 32 x 2
173. circuit boards as outlined in section Reinstalling Circuit Boards on page 8 14 8 Re secure the three 3 Calibration Clock Utility Board CAL CUB cables together using a tie wrap then cut off the excess portion of the tie wrap using the side cutters 9 Close the doors of the tester then position the tester so that the DIB mounting surface faces up 10 Replace the airflow shield onto the DIB fixture on the tester 11 Replace the DIB cover onto the tester and secure using the six 6 8 32 x 3 8 long black Phillips head screws and 8 lock washers Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit Input Power Module Removal and Replacement This section provides instructions for removing and replacing the input power module assembly in the J750E tester The following tools are required to replace the input power module assembly in the tester e No 1 Phillips screwdriver e No 2 Phillips screwdriver e Medium slotted screwdriver 1 4 e Socket wrench e 3 8 socket Repair 8 35 When removing the input power module confirm that all wires are properly labeled prior to disconnecting them If any wire is not identified make sure to do so prior to disconnecting it This will help to see that the wires are properly connected when the power module is reinstalled Always wear a tested grounding strap while working on the J750E tester When re
174. ck to the circuit board using the no 1 Phillips screwdriver 4 Grasp the block at the outside edges and while tilting the front edge down slightly pull the block away from the mating connector mounted to the board Note It is necessary to tilt the block down slightly at the front edge so that the guide pins at the rear of the block clear the alignment holes in the board 5 Determine if the circuit board has round or oblong mounting holes Figure 8 14 shows the two types of holes ie s y By Oblong Hole Le F 000125 Figure 8 14 Pogo block mounting holes 6 If the board has round mounting holes perform step 7 through step 10 if the board has oblong mounting holes perform step 11 through step 13 7 Remove the two 2 insert standoffs from the block 8 Assemble the new block to the mating connector on the board Note Ensure that the mounting surface of the block is flush with the board 9 Replace the two 2 Phillips head screws to secure the block to the board Tighten the screws using the no 1 Phillips screwdriver 8 54 J750E 512 Pin Test System Service Reference Manual 10 Repeat step 2 throug step 4 and step 7 through step 9 for the other pogo block on the board if applicable 11 Assemble the new block to the mating connector on the board Note Ensure that the mounting surface of the block is flush with the board and that the insert standoffs are properly seated in the holes 12
175. contactor in the tester shutting off system power This action prevents a major system failure due to an over temperature condition in the system electronics There are two 2 fans in each of the two 2 power supply jackets mounted to the card cage The fan sensors for each group are wired in parallel The fan monitor circuit will also shut down the tester in cases where one of the CAL CUB board supporting power supplies fails These supplies are the 3 3 and the 5 volts This protection circuit causes the power on switch to be held down for approximately three seconds before the system will remain powered on For more information see section AC DC Power and Cooling on page 6 1 Calibration The CAL CUB contains reference circuitry that is used to perform software calibration of the J750E The hardware includes calibration circuitry for the channel boards DPS CTO and other circuits on the CAL CUB itself The hardware to calibrate the channel boards includes a precision single channel slice with Pattern Generator Timing Generator Edge Set and circuitry to calibrate the channel edge characteristics Analog circuitry on the CAL CUB is used to calibrate voltage sources current sources current clamps voltage clamps voltmeters and ammeters The analog circuitry is used with the PMU and PPMU on the channel board the DPS and the CTO DIB ID Prom Readback The CAL CUB reads back the information stored in the DIB ID prom Figure 5 3 and Figure
176. cted externally to a coil called the antenna coil The values of the capacitance of the device and the inductance of the coil are such that they constitute a resonating circuit at the operating frequency for example 13 56MHz or 124KHz The number of the windings of the coil and their total length cannot be easily tweaked by the card manufacturer Therefore the capacitance value and its tolerance must be guaranteed by the IC manufacturer The RFID Option provides measurement capability for the input capacitance of the RFID device Measurement Methods Frequency Sweep In the frequency sweep method shown in Figure 5 32 an inductor is switched in parallel to the capacitance to be measured building a resonating circuit Out of the resonating frequency and the known value of the inductor the capacitance value can be calculated Using this method only one device can be measured at one prober position 5 50 J750E 512 Pin Test System Service Reference Manual Frequency sweep method M c Device underTest DSP clock Sampled Fak ne e EE data AOE Voltage sensing Sec ef seoses f d Weem E E C in Carrier clock a e Ed o a A uP op Current sensing 1 2T L Cin f Carrier frequency Figure 5 32 Frequency sweep measurement method Voltage Current Measurement Another method of the capacitance measurement is the Voltage Current measurement at the capacitance Out of the phase difference betw
177. ctronics assuming that the modulation is purely resistive in nature the resulting load modulation is a minute change in the amplitude of the carrier sine wave at its peak value about 60db If the load modulation is capacitive then the changes on the sine wave occur at a different phase of the RF cycle In the diagram below the periodicity of the sampling of the sine wave during cycles of non modulation and cycles of modulation is constant Therefore the small change in the value of the sine wave during a load modulation versus a non modulating cycle can be detected The DSP technique used for the demodulation is as follows see Figure 5 29 e The difference of 2 samples in user specified RF cycle containing OpCode freeze is built and frozen An average of Freeze Value over multiple cycles can be built if desirable e The absolute differences of two consecutive samples are determined and compared with two programmable limits relative to the frozen value e The output of the final comparison is a digital data used for the Pass Fail decision DSP technique used for demodulation DSP clock Absolute difference between freeze consecutiv samplg High limit Low limit Figure 5 29 DSP technique used for demodulation Hardware Description 5 47 The hardware of the demodulator is triggered several RF cycles prior to the expected load modulation During the time where there is no back scattering th
178. d or proceed to the appropriate section of this chapter for the particular maintenance program you want to run 11 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 12 Place the DIB vacuum switch on the tester to the UNLOCK off position 13 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 14 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage Running Performance Verification The J750 Maintenance Software allows the following Performance Verification programs to be run from the standard Maintenance User Interface e AC Performance Verification e AC DC Performance Verification The following equipment is required to run the various Performance Verification programs e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate AC Performance Verification Run AC Performance Verification as follows 4 52 J750E 512 Pin Test System Service Reference Manual Always wear a tested grounding strap while working on the J750E tester Note These inst
179. der the correct version for the computer you have Be aware that as newer versions are released these part numbers may change All sets consist of several CDs These CDs install Windows XP with the latest service pack SP2 Office XP with the latest service pack all currently approved software patches and updates as of the date of issue and all drivers needed including the GPIB and PCIT driver Availability This set is licensed software and is not available through GCS It can be obtained by ordering from the software administration group in Boston This is the same group that you request licenses and IG XL media from This disk sets can currently only be ordered in conjunction with an IG XL media order Warnings Installation of this image will delete ALL data from the hard drive Make backup copies of any customer data you wish to save to CD floppy disk or a remote location If the system is connected to a network all network information including anti virus programs must be restored and the system must be reinstalled on the network Check with the System Administrator for the site at which you are performing this restore for information regarding what network information will be needed after the restore is complete Your version of IG XL must be installed in conjunction with this image Make sure you have a copy of the IG XL version that will be used available This image is specific to the computer named on the disk Installation on ot
180. dows XP Perform the following steps to collect the Events Logs in Windows XP 1 Click Start on the Windows Taskbar select Settings Control Panel Administrative Tools then click Events Viewer The Events Viewer is displayed on the screen 2 Select System from the Event Viewer Local tree The System Events Log is displayed on the screen 3 Select Save Log File As from the Action pulldown menu The Save As dialog box is displayed on the screen Troubleshooting 9 31 4 Enter your choice of file name in the File Name window of the dialog box and click Save Note Save the log to the same drive or directory location where the Windows Diagnostic Report was saved The log is saved to the specified location 5 Repeat step 2 through step 4 for the Application and Security logs 6 When complete close the Events Viewer 7 Proceed to section Detailed Text Document on page 9 32 Detailed Text Document Create a text document that describes the issue using Microsoft Word or Windows Notepad The document should contain information such as When did the issue start What events preceded the issue that may have contributed to it What has been changed software test program etc What has been added software test program etc What has been removed software test program etc Note The more detailed information that is included in the document the easier it will be to troubleshoot the issue Once the document has
181. drive requirements in half and also shorten the trace lengths Both of these factors are critical in successfully meeting timing while reading data back from each board TCIO Connections on the Upper Backplane The upper backplane connects to the Device Power Supply DPS boards which only require simple Program Input Output PIO communications For this reason only TCIOO signals are sent to the upper backplane Also since the DPS circuitry clocks on board SYNC and DATA signals using the falling edge of the clock the boards expect the SYNC and DATA signals to be changing on the rising edge of the TCIO clock As shown in Figure 5 7 the upper backplane is not physically part of the lower backplane The two backplanes are connected by a cable that connects to the CAL CUB This cable allows the TCIO signals to be sent from the CAL CUB to the upper backplane as appropriate Figure 5 7 also shows four slots for DPS Boards The TCIO bus was extended to slots O 1 2 and 3 on the upper backplane for future expansion of the DPS board count but this enhancement was never implemented The TCIO and all DPS signals are still available on the backplane connectors in these slots The slots should not be populated with DPSs but TCIO and DPS signals may be monitored on these slots for troubleshooting purposes Two TCIO serial buses two copies of TCIO_0 are sent to the upper backplane from the CAL CUB Once on the upper backplane one TCIO bus is sent dow
182. duce vomiting but give one or two glasses of water to drink and get immediate medical attention Tobalation Remove to fresh air If not breathing give artificial respiration If breathing ts difficult give oxygen Get medical attention SECTION 5 FIRE FIGHTING MEASURES Elash Pout 61 F Liquid LELUEL 2 0 12 7 ec by volume in air for product liquid Use alcoho foam carbon dioxide or water spray when fighting fres mvolving this material Fire Fighting instructions As in any fire wear self contained breathing apparatus pressure demand MSHA NIOSH approved or equivalent and full protective gear SECTION 6 ACCIDENTAL RELEASE MEASURES Large Spills Shut off leak if possible and safe to do so Wear a self contamed breathing apparatus and appropriate personal protective equipment Absorb spilled liquid with inert material e g dry sand or earth then place in a chemical waste container for proper disposal Do not flush to sewer Avoid runof into storm sewers and arches which lead to waterways Absorb spilled liquid with inert material e z dry sand or earth then place in a chemical waste container for er dis Avoid prolonged or repeated contact with eyes skin and clothing Wash hands before eating Use with adequate ventilation Avoid breathing product vapor or mist Do not reuse this container Store in a cool dry place away from heat sparks and flame Keep container closed when not in use Do not store in direct sunlight KEEP OUT
183. dule Figure 6 3 shows a schematic diagram of the J750E tester Input Power Module Figure 6 4 shows power distribution from the power module to the DC power supplies for the J750E tester 6 4 J750E 512 Pin Test System Service Reference Manual To Power On and Corcom Filter Power Off Switches Phase and Grounds to Power Supplies 240 24 Volt Transformer F 000210 Figure 6 2 Input Power Module AC DC Power and Cooling 6 5 Phase 1 512 CALCUB Shutdown Right Power Supply Bay H 00 b O ON Supplies 7 3 8 208 Vac To 2 Left Power Supply Bay Power Supplies 9 Supplies Input from Phase 1 6 Power Vault Phase 2 1 Phase 3 4 PWR RTN 208 Vac SR Power Off Connector 4c o 70 1 3 9 1 8 Exhaust Air gt 5V 3VCoil K2 Ce i gem le Thermal Rear Fan AOK 3 3V c 2 Cutout Fan Fail Rear Fan B OK l Connector Rear Fan C OK Fan Sense i and Delay Rear Fan D OK SysPowerOft I Fan Left PS OK CALCUB Fan l Fan Right PS OK All Fan OK Fail Circuit l l l l l o AN Opens at 65 Degrees C Closes at 55 Degrees C 5 2 6 3 7 FanFailDelay Se Nominal 2 minute Delay F 00963A Figure 6 3 J750E tester CAL CUB and Input Power Module electrical schematic 6 6 J750E 512 Pin Test System Service Reference Manual From Input Power Module F 001001 on No oi ow No or 00 oo 00 oo 00 00 Phase 1 Phase 2 Phase 3 Pha
184. e the temperature of the boards during calibration as follows e The first temperature sensor measures Pin Electronics e The second temperature sensor measures out going air e The third measures incoming air e The fourth measures timing gate array When calibration is performed the incoming air temperature is measured on all of the channel boards The incoming temperature of the slot O channel board is used as the system reference temperature If a 5 C 9 F shift in the system reference temperature is detected an out of calibration message is sent to the IG XL window and if the tester is running in production mode testing is halted The temperature measurements are stored in the CalibrationData txt file The file can be found in the C Program Files Teradyne lG XL Vx xx xx tester folder Figure 4 4 shows the portion of the file where the temperature measurements are recorded Note Vx xx xx refers to any version of IG XL installed on the test system computer Note These instructions assume all software has been installed in the default directory locations 4 12 J750E 512 Pin Test System Service Reference Manual Pin Electronics Temperature Timing Gate Aray Temperature 8 CalibrationDa a Notepad File Edit Search Help 945031226 12 17 1999 15 46 al 1 1 1 1 1 1 Mie 1 1 4 NNNUNNNNNNNNNN KK SR AR REG WK SR S Out Going Air Temperature Incoming Air Temperature F 000311 Figure 4 4 Ty
185. e APMU motherboard into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 APMU Daughter Card Removal and Replacement This section provides instructions for removing and replacing the daughter cards on the APMU motherboards The following tools are required to replace the daughter cards e APMU daughter card extractor Teradyne Part Number 534 227 00 e No 1 Phillips screwdriver Removing the Daughter Cards Perform the following steps to remove the daughter boards from the APMU motherboard Always wear a tested grounding strap while working on the J750E tester 1 Remove the motherboards that need the daughter cards replaced as outlined in section Removing Circuit Boards on page 8 11 2 If applicable remove the motherboard from its storage container and place iton a proper anti static work surface with the component side facing up 3 Remove the two 2 Phillips head screws securing the cover of the daughter card to be removed using the no 1 Phillips screwdriver then remove the cover Figure 8 12 shows the channel assignments for each daughter card Repair 8 51 Channels Channels 56 63 40 47 24 f Channels Channels Channels Channels 148 55 32 39 16 23 0 7 F 000896 Figure 8 12 APMU daughter card channel assignment 4 Place the card extractor under one end of the daughter card to be removed Figure 8 13 shows the proper position for the extractor under the daughter card
186. e File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 18 Properly ground the Calibration DIB 19 Place the DIB vacuum switch on the tester to the UNLOCK off position 20 Remove the Cal DIB from the DIB fixture on the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage AC DC Performance Verification Run AC DC Performance Verification as follows Always wear a tested grounding strap while working on the J750E tester 4 54 J750E 512 Pin Test System Service Reference Manual Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded 1 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 2 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester Click the Performance tab in the maintenance interface
187. e OpCode freeze of the pattern triggers the following operation the sine wave voltage is sampled or captured twice during one RF cycle and the absolute value of their difference is built and stored in a register and considered as frozen The timing strobe clock of this sampling process is synchronous to the carrier sine wave and can be programmed in steps of few degrees During the cycles of load modulation the changes of voltage caused by a change in the current through the coupling resistor or sense resistor are continuously sampled or captured twice in every RF cycle Their difference is compared in real time with two programmable limits that can be relative to the frozen value on a cycle by cycle basis This is called LimitShift by Freeze Value The results of these comparisons are digital and appear as a continuous data stream that is used for the Pass Fail decision Receiver with Per Pin Synchronization The Sync Unit is a unique feature of the RFID Option This feature enables parallel testing of up to 32 RFID devices on a stored response test system even if their responses are asynchronous Figure 5 30 shows how the Sync Unit works Strobe cycle Sync Cycles max 512 gt gt Startsyn DUT O rr __ DUT 1 LAA DUT 2 PT DUT 3 TT T Syn onfig expect High state The timing shown assumes that the Pattern frequency is identical to the Strobe frequency How Sync Unit works Figure 5 30 How the Sync Unit
188. e and Histogram Controls may not display for every failure Status Window The status window is used to display IG XL program output errors Figure 4 7 shows the Status Window Load Program Unload Program Button This button loads or unloads the selected J750 Maintenance Program file Systemwide Tests Button This button starts the systemwide continuity check The test checks the continuity between the channel board pogo pins and Cal DIB and also runs TDR on all channel boards up to the point where the pins contact the Cal DIB Note Systemwide Continuity Check runs automatically runs as part of Module Check and can only be run manually as follows e Prior to running Module Check e By removing and reinstalling the Cal DIB on the tester if Module Check has already been run e Restarting the J750 Maintenance Programs if Module Check has already been run The Systemwide button is only available from the Module Check tab of the interface Maintenance Software 4 29 AC Calibration Button This button starts the AC Calibration program This test performs TDR and edge calibration on all channels and records the results in the CalibrationData txt file in the C Program Files Teradyne lG XL Vx xx xx tester folder on the test system computer Note Vx xx xx refers to any version of IG XL installed on the test system computer The AC Calibration button is only available from the Calibration tab of the interface AC Performance Butto
189. e board and the tester 11 Click the Load Program button in the interface The Open Existing IG XL Test Program dialog box is displayed on the screen 12 Click J750Maint xls in the file list The file name and path appear in the Open window of Open Existing IG XL Test Program dialog box 13 Click Open Once the file is loaded the following occur The Test Program Output window is displayed on the screen The Load Program Button in the J750 Maintenance Interface changes to Unload Program The boards that are installed in the tester are displayed in the Hardware Selection De selection area of the maintenance interface 14 Click the ExternalCal tab in the maintenance interface 15 Deselect all of the boards in the tester by clicking All in the graphical representation of the tester indicated in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected hardware is displayed white 16 Select the CAL CUB board in the tester as represented in the Hardware Selection Deselection area of the maintenance interface 17 Click Start The HP3458A Voltage Measurement Instrumentation Setup dialog box is displayed on the screen Figure 4 9 shows the dialog box Maintenance Software 4 35 HP3458A Voltage Measurement Instrumentation Setup x HP3458A O Orm O O 1o ow OO Connect HP3458A HI terminal to the AGO04 connector J3 pin 1 HP34
190. e condition of the Differential voltmeter connection and range All data is stored when the job is loaded and each setup condition is called from the Setup RAM when the program is started The TCIO is distributed locally on the board through the Pattern Generator to a FPGA which provides the interface to the analog functions and to a data buffer memory The TCIO is used to provide Direct Memory Access DMA DC Source and Acquire data to and from the Data Buffer Memory It also provides information to configure the modes of operation for the analog functions Hardware Description 5 41 3 3V ADRS 12 TCIO Backplane 8 LVM LK1000 6 E Ge T CNTRL SDRAM 12 SC x Um enerator 94 lt gt lt DATA gt 2M x 94 JTAG 5 6 Watts Utility Bits gt State Bus CMOS Local TCIO DMA channel S CAL 47 13 2 Circuit GND 3 3V ADRS 12 DGS _ Slot_ID gt DC MISC CNTRL 6 Setup FPGA pata 16 RAM ID PROM e lt gt Differential 6 Watts gt DC Control Voltmeter Gnpl Temp DGS lt _ State Bus EEPROM CMOS Local TCIO 1 of 4 Channels DMA channel 47 3 2 H gt gt Force JTAG 5 APMU Channel Control Source gt Sense 3 3V gt APMU kg A gt APMU Channel CLK50 6 FPGA To Other eme i x4 or x8 Lk Channels GND k gt DGS it gt CNTRL
191. e doors of the tester then replace the EMI Dust cover DIB Fixture Assembly Removal and Replacement This section provides instructions for removing and replacing the DIB fixture assembly in the J750E tester Note If the tester is equipped with Kinematic Docking Modules the module alignment must be checked as outlined in the J750 Test System Kinematic Docking System Manual after the DIB Fixture has been replaced Repair 8 15 The following tools are required to replace the DIB fixture assembly in the tester No 2 Phillips screwdriver Medium slotted screwdriver 1 4 1 8 hex wrench Adjustable torque wrench up to 32 inch pounds No 2 Phillips screwdriver bit 1 8 hex wrench bit Medium slotted screwdriver bit 1 4 Removing DIB Fixture Assembly Perform the following steps to remove the DIB fixture assembly from the tester Always wear a tested grounding strap while working on the J750E tester Note Protect against the possibility of dropping hardware into the tester electronics or backplane Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer Open the tester as outlined in section Opening the DIB Mounting Side of the Tester on page 8 8 Loosen the cable
192. e harmonized cable 20 feet long maximum Cable must be hard wired to branch service 5 Remote EMO Connector J1 Allows connection of a remote EMO switch 6 Tester Control Power Circuit Breaker CB6 Turns main tester power on or off as appropriate 7 AC Power Module 208 VAC 3 phase and 110 single phase outputs 7a AC Power Module Expansion Slot Provides the ability to add an additional AC Power Module J750E Tester power vault shown Figure 2 5 AC Power Vault safety control identification Satety Information 2 11 Input Power Module Figure 2 6 identifies the safety hazards of the input power module located inside the tester 1 Tester Power Control Assembly Danger Electrical Hazard Present 208 VAC 3 phase Whenever power is applied from Master Power Controller 2 AC distribution to power supplies 3 24 Volt Control Circuit Transformer Primary and secondary circuit breakers mounted on rear panel F 000205 Figure 2 6 Input Power Module safety identification 2 12 J750E 512 Pin Test System Service Reference Manual Circuit Boards and Power Supplies Figure 2 7 identifies the safety hazards of the circuit boards and power supplies located inside the tester i E El E a A 1 Circuit Boards All VO SELV less than 24 volts 2 Power Supplies All pose a low voltage high current A hazard equal or greater than 240 voltamps Remove rings bracelets necklaces etc Exercise caut
193. e integrated digital channel architecture provides complete per pin 100MHz testing at revolutionary economics and footprint The digital features of the tester include e 100MHZz full formatted un multiplexed drive and receive 4 Meg pattern depth per pin 8 Meg or 16 Meg optional software license enabled 500ps edge placement accuracy 325ps optional software license enabled Independent per pin levels and timing High Voltage High Current 24v 200ma PMU 6 edges per pin up to 50MHz and 4 edges per pin up to 100MHz 256 global time sets 32 per pin edge sets Period based on the fly timing period and format change Per Pin Parametric Measurement Units PPMUs Configurations of instruments to do true parallel test Hardware site enable per channel Asynchronous pattern generators Additional features of the J750E 512 Pin Test System include e Microsoft Windows based Personal Computer e Device Power supplies 1 amp at up to 10 volts 8 channels per board e Checkers based maintenance software e Optional Kinematic Docking System The typical J750E 512 Pin Test System consists of e AC Power Vault e Manipulator mounted main tester assembly e Microsoft Windows based Personal Computer Figure 1 1 shows a typical J750E 512 Pin Test System 1 2 J750E 512 Pin Test System Service Reference Manual F 000003 Figure 1 1 J750E Test System J750E Tester The J750E tester contains the backplane power supplies cooling fans AC distributi
194. e less than 15mv peak to peak noise Recheck the setup if there is greater that 15mv 11 Connect channel 1 to the POSITIVE power supply terminal and channel 2 to the NEGATIVE power supply terminal 12 Adjust the vertical scale make sure both channel 1 and 2 are on the same scale and time base for the best display 13 Measure the AC ripple voltages to verify that they are within specification as outlined in previous Table 7 8 14 Record and file all measurements for future reference 7 26 J750E 512 Pin Test System Service Reference Manual Repair The Repair chapter of this manual contains procedures that can be used to perform repairs that may be required on the tester Some of the procedures outlined in this chapter may also be used as part of the maintenance activities The procedures in this chapter are designed for use by trained maintenance personnel only The following information is covered in this chapter e Repair Overview e Preliminary Repair Procedures e Preliminary Repair Procedures e Repair Procedures e Restoring the Operating System Software to Its Factory Image 8 1 Repair Overview The procedures outlined in this chapter describe the common repairs that may need to be made on the J750E tester These procedures may also be used as part of the regularly scheduled maintenance activities Prior to performing any repairs on the J750E Test System familiarize yourself with the information outlined in C
195. e tester 8 Place the DIB vacuum switch on the tester to the LOCK on position 9 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 10 Remove the ground connection from the board and the tester 11 Run the following standard J750 Maintenance Programs as previously outlined in this chapter Note Ensure a valid CALCUBCAL TXT file is present in the C Program Files Teradyne IG XL Vx xx xx Tester folder of the test system computer before running the maintenance programs Note Vx xx xx refers to any version of IG XL installed on the test system computer Quick Check Module Check internal Calibration Internal Performance Verification 12 Properly ground the Calibration DIB 4 70 J750E 512 Pin Test System Service Reference Manual Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 13 Place the DIB vacuum switch on the tester to the UNLOCK off position 14 Remove the Cal DIB from the DIB fixture on the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage 15 Loosen the four 4 thumbscrews on the APMU airflow shield then remove the shield from the tester 16 Connect the white 6 pin connector on the APMU calibration reference cable to the connector J5 at the top of the APMU Mother Board Figure 4 21 sh
196. e tester and secure using the fourteen 14 8 32 x 1 j Phillips head screws and 8 lock washers that were previously removed Tighten the hardware to 10 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 2 Replace the control panel assembly onto the tester and secure it using the two 2 8 32 hex nuts that were previously removed Tighten the hex nuts to 18 inch pounds using the adjustable torque wrench and 11 32 socket 3 Replace the foam filter onto the tester by inserting it around the control panel assembly then back into place in the filter frame J750E Tester Power Supply Assembly Removal and Replacement This section provides instructions for removing and replacing the power supply assemblies in the J750E tester Make note of the routing of all cables and wires before disconnecting them Also make note of any tie wraps used to secure the cables and wires This will help to ensure that the wires and cables are properly routed and secured whent the power supplies are reinstalled Repair 8 21 When removing the power supply assemblies confirm that all cables and wires are properly labeled prior to disconnecting them If any cable or wire is not identified make sure to do so prior to disconnecting it This will help to see that the cables are properly connected when the power supplies are reinstalled When reinstalling the power supply assemblies confirm that all cables and wir
197. eaning on page 7 15 of Chapter 7 Maintenance Run Continuity Check as outlined in section Running Continuity Check on page 4 42 of Chapter 4 Maintenance Software 15 If Quick Check Relay test passes run Module Check as outlined in section Running Module Check on page 4 45 of Chapter 4 Maintenance Software 16 If Quick Check fails remove the channel board s as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair and replace the relay board s associated with the failure as outlined in section Channel Board Relay Board Removal and Replacement on page 8 47 of Chapter 8 Repair Channels 0 31 are located on the AG 012 relay board and channels 32 63 are located on the AG 009 relay board 17 Replace the board as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair then repeat step 13 except run Module Check 18 If Module Check fails there is a VERY good chance that the hardware is good 19 If the same channel s fail then replace the channel board s as outlined in section Circuit Board Removal and Replacement on page 8 10 of Chapter 8 Repair 20 Repeat step 13 and step 17 until all of the boards pass Troubleshooting 9 7 Vacuum Leak Troubleshooting This section outlines checks that can be made on the tester if vacuum leak problems are detected Figure 9 5 shows a flow diagram of the J750E tester s vacuum system Vacuum Toggle Switch a7
198. eas Bus Lo Meas Bus Hi Source Bus Hi To Cal Meter Cal High Source Cal Lo F Cal Lo S Differential Polarity Reverse F 000430 Differential Differential Bandpass Notch Filter Filter 10KHz 10KHz Figure 5 15 ASIO Relay block diagram Hardware Description 5 33 Pattern Generator MTO Not in present release State Bus F 000433 Digital 24 Alternate Data Bus TCIO IDL DSIO VF DSIO Capture Capture Source FPGA Micro code FPGA Capture MEM1 Capture MEM2 16M x 48 SDRAM 50MHz Figure 5 16 DSIO block diagram Source MEM SDRAM 50MHz Source MEM 16M x 48 16M x 48 SVM DSIO Rider Board 5 34 J750E 512 Pin Test System Service Reference Manual Analog Parametric Measurement Unit APMU The Analog Parametric Measurement Unit APMU option provides 64 analog channels per board It has complete 4 quadrant operation for voltage and current forcing measurement functions and provides 35V and 50mA Each APMU board consists of a Rider board and a Motherboard Each Rider board has 8 channels and up to 8 rider boards can reside on one Motherboard to provide a maximum of 64 channels Each one of the channels has an A to D converter for voltage or current measurement Also each group of 16 channels has 1 differential voltmeter which can be used to measure the difference between any 2 of the
199. ect Explorer Window 10 Properties Window 10 Immediate Window 10 Editor Code Object Window 10 J750 Maintenance Softwar e cccccccccccsssssssssssssssssssssssssseceeeeseseseeseseeeessesssssssaaaaaaaaaaceeeeeees 3 11 tg OWN Eeer 3 12 National Instruments GPIB Software for Windows 3 12 Agilent HP 3458A Instrument DIVER 0crt ia 3 12 Agilent HP 53181A Instrument Driver 3 12 A CN cree pas paves A O cage AEE 3 12 Maintenance Software Maintenance Programs OVeIVieW EE 4 2 ee le 4 2 QUEENS anat ee ee 4 2 Pos E E IIA 4 2 ia er ee In O II e 2 Calibration and Performance Verification cccccccccccceceeeeeseeeeeseeeeeesesneeeeeeseeeeeeeeeeeeees 4 3 Titre UCU Oi acetate tes tetas ee 3 Eyt mal EE 4 CAL CUB Calibration 7 vi J750E 512 Pin Test System Service Reference Manual CAL CUB Traceability 7 CAL CUB Calibration Process 7 External Performance Verificato sc eenn cs ivscbeet svucaivesdoogesiochescsoboaeessceveseessscuscs ce E A E h OEI EES 8 Voltage and Current Verification 8 Master Clock Frequency Verification 8 Calibration a a 9 Channel Board DC Calibration 9 High Speed Digital Channel Levels 9 Drivers Vil Vih 10 Comparators Vol Voh 10 Clamps Vel Vch 10 Tloads lol Ioh and Vt 10 Pin PMU 11 Board PMU 11 Temperature Measurements 12 Device Power Supply 13 13 Timing Calibration 13 Cal DIB Calibration 14 Pin Electronics Skew 14 Drive Edge Skew 14 Receive Edge Skew 15 Cu
200. ector F 000074 Figure 4 11 CLK100 Setup 7 Proceed to section Running External Performance Verification Frequency Check on page 4 40 Running External Performance Verification Frequency Check The following equipment is required to run External Performance Verification Frequency Check Agilent HP 53181A frequency counter must be calibrated to traceable standard SMA Male to BNC Male cable Teradyne Part Number 901 249 01 SMA Probe to SMT Receptacle Converter Teradyne Part Number 359 780 00 GPIB cable 2 3 or 4 meter length as required Run External Performance Verification Frequency Check as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched the J750Maint xls job has been loaded and External Performance Verification has just been run 1 Connect the GPIB cable to the back of the GPIB cable already connected to the connector at the rear of the Agilent HP 3458A multimeter and to the connector at the rear of the Agilent HP 53181A frequency counter 2 Apply power to the frequency counter and allow it to warm up for a minimum of 30 minutes Maintenance Software 4 39 Note The frequency counter s IEEE address must be set to 5 to ensure proper communication between the counter and the personal computer The IEEE address 5 is the counter s default setting 3 Check and set the cou
201. ed DIB Fixture Vacuum Seal Perform the steps outlined in the Vacuum Seal Inspection and Cleaning section of the Maintenance chapter of this manual to check for damaged or compressed vacuum seals Extending the Pogo Block for Improved Seating This section provides information for extending the pogo blocks The following tools are required to extend the pogo blocks e No 1 Phillips screwdriver e Large slotted screwdriver 5 16 Perform the following steps to extend the pogo blocks Always wear a tested grounding strap while working on the J750E tester wech Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair 4 Remove the board as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair 5 Place the board onto a proper anti static work surface 9 12 J750E 512 Pin Test System Service Reference Manual 6 Loosen the two 2 Phillips head screws holding the block to the circuit board using the no 1 Phillips screwdriver 7 Grasp the block at the outside edges and pull the block away from the mating connector mounted to the circuit board 8 While h
202. ed edge value to remove the RF matrix path length differences from the measured edge value The difference of this value and the expected value is stored in the calibration data file as the drive edge offset value The drive edges are aligned to each other by delaying all drive edge transitions to the slowest drive edge transition This is accomplished by subtracting each drive edge offset value from the largest drive edge offset value slowest drive edge and applying this value to the drive edge deskew register The drive edges are now aligned to each other near the channel board relay in preparation for user DIB calibration Receive Edge Skew The master driver on the CAL CUB sends a signal through the RF matrix on the Cal DIB to the comparator on the digital channel The SLI remains attached to the master comparator and is set to zero Digital channel receive edges TG3 and TG7 are observed in two cycles in Normal timing mode for rising and falling edge transitions at 50 of 3 volt waveform The comparator on the digital channel measures each receive edge transition The RF matrix delay value is subtracted from each measured value to remove the RF matrix path length differences from the measured value The difference of this value and the expected value is stored in the calibration data file as a receive edge offset value The receive edges are aligned to each other by subtracting the smallest receive edge offset value fastest receive edge f
203. ed fixed gain differential amp The value of this sense is small so that it does not need to be clamped The remaining current measuring ranges are selected for value and gain and the sense resistor is clamped There are five ranges available Limiting Current The current limit is user programmable and uses the relationship between voltage and current in the Gm stage The input voltage of the Gm stage is clamped to a programmed value A comparator is used to sense the polarity of voltage across the clamp diode to generate a current limit flag When the DPS is used in current limit mode it becomes a current source Kelvin Safety The DPS has a Force and Sense Kelvin connection If the user separates the Force terminal from the Sense terminal the DPS voltage control loop remains connected through a Kelvin Safety resistor and the supply remains stable Kelvin Test Current The Kelvin test current checks the continuity of the connection between the Force and Sense lines The test current is enabled then the Force and Sense relays are opened and closed while the change in the output voltage is measured The magnitude of the change in output voltage is equal to the value of the test current 10ma nominal multiplied by the value of the Kelvin safety resistor 10 ohms or about 100mv If the correct change in the output voltage is measured the Kelvin test passes If there is no change detected the test fails Hardware Description 5 15 Guard
204. ed that the entire pogo block be changed Refer to section Pogo Block Removal and Replacement on page 8 53 to replace the pogo block Personal Computer PCI or GPIB Board Removal and Replacement This section provides instructions for removing and replacing the PCI or GPIB boards installed in the Personal Computer portion of the J750E 512 Pin Test System The following tools are required to replace the boards in the computer e No T15 torx screwdriver or an appropriate sized slotted screwdriver 8 56 J750E 512 Pin Test System Service Reference Manual Perform the following steps to replace the boards in the computer 8 9 Always wear a tested grounding strap while working on the computer Shut down the computer as outlined in section Shutting Down the Computer System on page 8 7 Remove the computer s outside cover using the appropriate manufacturer s instructions Locate either the PCI or the GPIB board installed in the computer as appropriate Disconnect the cable attached to the connector at the back of the board to be removed from the computer Remove the screw securing the board to the computer s chassis using the no T15 torx screwdriver Remove the board from the slot in the backplane insert the new board into the computer carefully seating it into the computer s backplane connector Secure the board to the computer s chassis using the no T15 torx screwdriver Reconnect
205. een the voltage and the current the capacitance value can be calculated Unlike the Frequency Sweep method this method allows the Capacitance measurement of all devices Slot Assignments The RFID Option is designed to be inserted into any available channel board slot slot O slot 15 The position of the slots in the J750 test head is shown in Figure 5 33 Hardware Description 5 51 ST 10IS el JIS TT 01S 6 1015 vz 1018 ez OI TE 1018 IZ 91S Top View R D uN v N D Oc 1015 61 1015 81 1018 LT 1018 91 1015 OT 1015 cI 1015 vI 1015 ts ignmen Slot assi Figure 5 33 5 52 J750E 512 Pin Test System Service Reference Manual Figure 5 34 shows the channel assignment digital and or RFID channel in each slot Generally the starting channel number of an RFID board in each slot is identical to the starting channel number of a digital channel board in the same slot The only difference is that the RFID board contains only 16 channels Example Digital channel board Slots 0 1 2 3 channels 0 255 RFID board Slot 6 RFID channels 384 399 Slot 4 RFID channels 256 271 MSO board Slot 7 CTO board Slot 16 MIO 1lo MTO digital channels w o 64 digital channels w 64 E e D is o a iL D le 16 RFID channels Figure 5 34 Channel assignments for the slots Channel Mapping
206. efined Refer to the J750k and J750 512 Pin Test System Site Preparation Guide for more information on input power requirements AC Power Vault Transformer Taps The AC Power Vault may need to be rewired to produce the 208 VAC required to power the tester if a line voltage other than 208 VAC is used Table 2 3 lists the appropriate power vault transformer wire connections for the various input line voltages that may be used to power the test system Safety Information 2 27 Table 2 3 Power vault transformer connections Input Voltage Wire Connections Main Lines 190 B1 to G1 to A2 to F2 G1 G2 G3 B2 to G2 to A3 to F3 B3 to G3 to A1 to F1 200 C1 to H1 to A2 to F2 H1 H2 H3 C2 to H2 to A3 to F3 C3 to H3 to A1 to F1 208 D1 to l1 to A2 to F2 11 12 13 D2 to 12 to A3 to F3 D3 to 13 to A1 to F1 240 E1 to J1 to A2 to F2 J1 J2 J3 E2 to J2 to A3 to F3 E3 to J3 to A1 to F1 380 F1 to B1 F2 to B2 F3 to B3 G1 G2 G3 G1 to A2 G2 to A3 G3 to A1 400 F1 to C1 F2 to C2 F3 to C3 H1 H2 H3 H1 to A2 H2 to A3 H3 to A1 416 F1 to D1 F2 to D2 F3 to D3 11 12 I3 11 to A2 12 to A3 13 to A1 480 E1 to F1 E2 to F2 E3 to F3 J1 J2 J3 J1 to A2 J2 to A3 J3 to Al Electrical Code Requirements All input parts connected to an AC main service must meet electrical code requirements The cables circuit breakers contactors and transformers selected as part of this system have defined qualities
207. einstall the MTO or DSIO option onto the channel board Always wear a tested grounding strap while working on the J750E tester 1 If applicable remove the MTO or DSIO from its storage container and place it onto a proper anti static work surface with the component side facing up 2 Place the replacement MTO or DSIO onto the channel board Note Ensure that the connectors on each board are properly mated 3 Secure the MTO or DSIO to the channel board using the screws previously removed Tighten the screw s using the no 1 Phillips screwdriver 4 Reinstall the channel board into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 APMU Motherboard Relay Board Removal and Replacement This section provides instructions for removing and replacing the relay board on an APMU motherboard The following tools are required to replace the relay boards e 5 32 nutdriver Teradyne Part Number 361 553 00 Removing the APMU Relay Board Perform the following steps to remove the relay board from the APMU motherboard Always wear a tested grounding strap while working on the J750E tester 1 Remove the motherboard that needs the relay board replaced as outlined in section Removing Circuit Boards on page 8 11 2 If applicable remove the motherboard from its storage container and place iton a proper anti static work surface with the component side facing up 3 Remove the two 2 nuts securing
208. el boards Each section source and capture are run at a fixed sample rate derived from the 100MHz system clock The clocks also have a single step mode controlled by the pattern generator microcode to aid fast DC testing of devices like Sample amp Holds A Pin Parametric Measurement Unit PPMU is available on all analog pins for performing leakage and continuity tests Hardware Description 5 29 The analog section has been configured to closely mirror the pin driver receiver of the digital section of the tester The PPMU is the standard unit used in the Digital Channels of the tester It provides a convenient means of open short and leakage testing of DUT pins There is a PPMU on both pogo pin connections Digital Source UO Module DSIO The DSIO module circuitry is provided on a separate 10 x 4 25 4 cm x 10 2 cm printed circuit board that is mounted on a standard J750 channel board in place of the state bus terminator or Memory Test Option MTO There can be one DISO in the tester for each channel board that is installed Each DSIO module provides two digital source and two digital capture channels with the following functions e Two digital source channels provide serial or parallel data e 1 x 24 bit serial or up to 22 bit parallel source at 50MHz e 2 x 48 bit serial or up to 44 bit parallel source at 25MHz e Two digital capture channels provide serial or parallel capture e One capture channel provides serial capt
209. el boards and the Converter Test Option CTO boards One is generated from Data O and the other is generated from Data 1 Data 0 is also used to generate ITAD a bus used internally on the CAL CUB ITAD goes to the Gate Array The Gate Array then generates another AB bus for the DPS boards DIB and circuitry internal to the CAL CUB Data is sent back to the PCI from the channel boards and CTO via two busses which go to Data 0 and Data 1 of the PCI Additional data returns to Data O from the DIB DPS boards channel boards CTO boards and circuitry to the CAL CUB Sync The CAL CUB generates sync signals A amp B sync signals are used to generate two AB sync signals for the channel boards and CTO boards ITAS a sync signal internal to the CAL CUB goes to the Gate Array and is used to generate sync signals for the DIB and Device Power Supply DPS boards Master Clock and Clock Distribution The master clock is derived from a 200MHz crystal oscillator that is divided by two to generate the 100MHz master clock A single fanout chip is used to distribute the clock to the lower backplane channel boards and to the DIB The clocks to the lower backplane are sent using equal length runs An additional equal length run C118 returns back to the CAL CUB is divided by 2 then is renamed as ITRCLK ITRCLK is then buffered and sent to the PCI as PTRCLK to 5 6 J750E 512 Pin Test System Service Reference Manual the DIB as DIBTCLK and to the DPS as
210. el configuration the Gm stages the slave channels are in parallel and are controlled by one control amplifier Each parallel supply must be connected to its control amp or to the one next to it The parallel supplies must be adjacent to each other There are two methods of measuring current in the parallel configuration In one method the current is separately measured in each of the parallel channels and then summed by software In the second method greater accuracy can be achieved by opening the Force and Sense relays on the slave channels in the parallel set just after the current to the DUT has changed from drawing Idd to drawing Iddq Then Iddq can be measured with the accuracy of the single master channel Figure 5 8 shows a block diagram of the DPS 5 16 J750E 512 Pin Test System Service Reference Manual TCIO Interface Programmed Current Limit bo Lim_Flag measure Kelvin BDGS Gain_Sel All other _m easure Ranges Lim_Flag 1 Amp Range Guard Sense Kelvin Safety Sense Disc Force F 000161 Figure 5 8 DPS block diagram Hardware Description 5 17 Channel Board The channel board is a complete digital subsystem on a single board Each board contains 64 digital channels Some of the features of the channel board include 64 channels 8 x 8 e Timing Generator per pin e Parametric Measurement Unit PMU per pin e Pin electronics drive and compare for each pi
211. emblies electrical power should be disabled atthe AC Power Vault If necessary disconnect the vault at the circuit breaker distribution box of the AC main service Ensure that the lockout tagout procedures outlined in section Lockout Tagout on page 2 9 are followed as appropriate Be aware of and exercise caution against all electrical hazards which include e DC voltages equal to or greater than 60 volts e AC voltages equal to or greater than 30 volts RMS e 24 volt pulses e 240 volt amp power combination e 10 joules of reactive energy Safety Information 2 3 The following safety practices are recommended e Operation and service personnel should be trained as to the locations and nature of potentially lethal hazards of this system e Test department management should be informed of the hazard potential of this system and they should institute safe work practices and controls Safety Symbols and Labels The symbols and labels used on the test system and in this manual are derived from the requirements of SEMI S2 0703 for Semiconductor Manufacturing Equipment IEC 417 for internationally recognized labeling and OSHA 29 CFR 1920 for U S recognized labeling Special agency defined labels may also be included Figure 2 1 Figure 2 3 and Figure 2 4 show examples of the symbols and labels 2 4 J750E 512 Pin Test System Service Reference Manual PEE Ore F 000201 PROTECTIVE GROUND Used to identify any connecti
212. embly in the J750E tester 8 18 J750E 512 Pin Test System Service Reference Manual The following tools are required to replace the fan plate assembly in the tester e No 2 Phillips screwdriver e Adjustable torque wrench up to 41 inch pounds e No 2 Phillips screwdriver bit Removing Fan Plate Assembly Perform the following steps to remove the fan plate assembly Always wear a tested grounding strap while working on the J750E 1 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Position the tester so that the DIB mounting surface faces the floor 4 Remove the six 6 j 20 x S long black Phillips head panel screws and the two 2 j 20 x j long black Phillips head panel screws from the fan plate assembly using the no 2 Phillips screwdriver 5 Once the fan plate assembly is loose tilt the top of the plate away from the tester Figure 8 3 shows the fan plate assembly F 000114 Figure 8 3 Fan plate assembly Repair 8 19 6 Disconnect 9 pin power harness connector from the connector on the fan plate assembly Previous Figure 8 3 shows the location of the connector 7 Remove the fan plate assembly from the tester 8 Proceed to section Reinstalling Fan Plate Assembly on page
213. emoval and Replacement on page 8 21 Vacuum Seal Removal and Replacement The vacuum seal on the DIB fixture assembly should be replaced on a regular basis The seal is designed for six months of use in normal service This section provides instructions for replacing the vacuum seal on the DIB fixture assembly of the J750E tester Perform the following steps to replace the vacuum seal Always wear a tested grounding strap while working on the J750E tester Note No sealant or tools are required to replace the vacuum seal 1 Power down the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 2 Ensure that the tester is fully undocked and a sufficient distance from the mating equipment 3 Position the tester so that the DIB mounting surface faces up Always ground the Customer DIB or Calibration DIB when installing or removing it from the DIB fixture on the tester 4 Properly ground the Customer DIB or Calibration DIB as previously outlined in section Grounding Calibration and Customer DIBs on page 7 7 of Chapter 7 Maintenance 5 Place the DIB vacuum switch on the tester to the UNLOCK off position Repair 8 45 6 Remove the Customer DIB or Calibration DIB from the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage 7 Remove the old seal by pulling it away from the groove in the outside
214. ence Manual 1 Confirm that the pressurized air source connected to the tester is between 70 PSI and 101 PSI 2 Confirm the pressure reading on the system vacuum gauges Each gauge has a RED and a GREEN zone A vacuum reading on either one or both gauges that only reaches the red zone 0 to 20 inHg indicates a vacuum leak or marginal seal in the system A reading that measures in the green zone 20 inHg to 30 inHg indicates proper vacuum in the J750E test system 3 If one or both of the gauges indicate a low vacuum reading in the RED zone or a loud audible sound of leaking air is detected prepare the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 4 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 5 Place the 512 Clear DIB Vacuum Alignment Gauge onto the DIB fixture on the tester 6 Place the DIB vacuum switch on the tester to the LOCK on position 7 Press down on the Clear DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 8 Confirm that the Clear DIB pulls down and seats firmly on the ISO pin spacers black buttons on the DIB fixture when the vacuum switch is turned on Note Ensure that the Clear DIB pulls down at all slots on the DIB fixture especially the outermost slots 9 Verify that the vacuum gauges on the Clear DIB Vacuum
215. ent Logs WiIndOWSN Diao AAA recline ies 9 30 Event Logs Windows 20001 9 30 Event Logs Windows XP i 9 31 Detailed Text Document s snien A AA Ar EELEE Ee Ea 9 32 ETSI SOWA O iain thina a eE T EE A A AE E 9 32 Replacement Parts Ordering Replacement Parts aio ororrssaonaai aire reas 10 2 Handling and Returning o AA NA A AAA AAA 10 3 Printed Circuit Board Pin Identification Diagrams Mangers 12 1 XV xvi J750E 512 Pin Test System Service Reference Manual About This Manual This manual provides the technical information required to understand maintain and repair the J750E 512 Pin Test System and its related subsystems These instructions are intended for trained maintenance personnel The local Teradyne Service office can assist with any additional questions you may have about the J750E Test System We welcome any comments or feedback you have about this manual or the J750E Test System Please send feedback to Teradyne eKnowledge Technical Support at customercare teradyne com For your convenience we have also included a Manual Comment Form at the end of this document Viewing This Manual Online When viewing this manual online you may click any hyperlink cross reference or page number to jump to that topic Additional Documentation The following Teradyne documents may provide additional information when using this manual J750k and J750 512 Pin Test System Installation and Disassembly Manual Teradyne Document N
216. er Off Connector 1 l 1 4c ER 9 H 8 Exhaust Air 3V Coll Ce i mem le Thermal Rear Fan AOK 3 3V C 2 Cutout Rear Fan B OK Rear Fan C OK Fan Sense Opens at 65 Degrees C Closes at 55 Degrees C Rear Fan D OK and Delay SysPowerOff Fan Left PS OK M Fan Right PS OK All Fan OK Fail Circuit FanFailDelay CALCUB Fan Nominal 2 minute Delay F 00963 Figure 6 9 CAL CUB Fan Fail circuit and associated wiring Power Supply Sequencing Along with the fan control circuit on the CAL CUB the tester employs power supply sequencing for proper initialization of its circuit boards on power up and to monitor the presence of the supplies In the case of a power supply output failure the output good signal low signal of the failed sequenced power supply will cause the next sequenced supply to turn off and eventually 6 16 J750E 512 Pin Test System Service Reference Manual cause the CAL CUB to shut down the system This sequencing occurs in an order defined by how the supplies are wired the output good signal pin of one supply is wired to the inhibit signal pin of the next supply This starts from the 34 volt power supply in the J750E tester and ends at the 3 3 volt supply Figure 6 10 is the sequence wire diagram for the J750E tester Note If either the 5 volt 5 volt or the 3 3 volt power supply fails or if any supply before the stated 5 volt or 3 3 volt power supplies fail the CAL CUB will turn off
217. er of Slot Number and Defaults Instrument ae Boards In Order of Priority MTO 8 0 7 MSO LMF 4 7 6 5 4 MSO DSIO 4 0 1 2 3 APMU 2 5 4 RFID 2 Any available channel slot 1 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Shut down the tester and vault as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 8 12 J750E 512 Pin Test System Service Reference Manual 4 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 Note lt may be easier to remove the circuit boards if the tester is positioned so that the doors are at a forward facing angle of approximately 45 5 Disconnect the cables from the J1 J3 connectors on the Calibration Clock Utility Board CAL CUB 6 Using the information listed in the configuration file identify which slot the circuit board to be removed is installed in 7 Unlock the PCB spring ejectors on the board that needs to be removed from the tester 8 Carefully and slowly slide the circuit board out of the card cage slot to remove it from the tester Place the board onto a proper anti static work surface with the component side facing up Note Remove channel boards or full size optional instruments as follows Unlock the PCB spring ejectors on the b
218. er supply into the tester so these items do not fall off of the terminals Note Protect against the possibility of dropping hardware into the power supplies tester electronics or backplane 1 While holding the power supplies by the two 2 handles carefully slide them back down into the tester 2 Secure the power supplies to the card cage using the four 4 8 32 x S long Phillips head screws with external star washer Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit Note Ensure the isolator bushings and flat washers are on the power supply terminals before replacing the bus bars Note Protect against the possibility of dropping hardware into the power supplies 3 Replace the four 4 terminal lugs onto the connector terminals of the 10 and 36 volt power supplies Tighten the screws to 26 inch pounds using the adjustable torque wrench and using the no 2 Phillips screwdriver bit 4 Replace the two 2 terminal lugs onto the connector terminals of the 15 volt power supply Tighten the screws to 26 inch pounds using the adjustable torque wrench and using the no 2 Phillips screwdriver bit 5 Replace the terminal lugs onto the terminals of the 24 volt DPS and 34 volt power supplies then replace the two 2 10 flat washers 10 split lock washers and 10 32 hex nuts on each supply Tighten the nuts to 26 inch pounds using the adjustable torque w
219. er to turn on and properly initialize The personal computer PC portion of the system receives its power from the AC Power Vault There are two 2 110 VAC outlets located at the rear of the vault for each AC Power Module installed in the vault Proper system operation and safety certification require that the computer and monitor receive power from the AC Power Vault AC Power Vault Emergency Off Switch The Key Operated Emergency Off Switch 1 is located on the front of the AC Power Vault Figure 2 5 shows the location of the switch Activating the switch by pressing it in will instantly disable all AC power to the entire J750E 512 Pin Test System by deactivating the test system contactor K1 inside the vault If multiple test systems are connected to a single AC Power Vault activating the Emergency Off switch will disable the power to each system Once the Emergency Off switch has been activated the key is required to restore power to the test system Safety Information 2 29 Tester Emergency Power Off Switch An Emergency Power Off switch is also located on the front of the J750E tester Figure 2 8 shows the location of the switch Activating the switch by pressing the round black button will instantly disable all AC power to the tester power supplies by opening the contactor inside the input power module A voltage of 208 Vac will still be present in the input power module 24 Vac will be present at the Po
220. ero and all gains are set to 1 0 If a previously run calibration file is available for the loaded test program and conditions such as temperatures or system hardware have not changed that calibration file is loaded and used If conditions have changed calibration must be run and a new calibration file created to be used with the test program The user can run the new calibration from the J750 Maintenance Interface Calibration software consists of the following two major components e J750 Maintenance Calibration e Calibration Data File The calibration job plan measures the values required to calibrate the system and is run in place of a user test program The correction value library stores the correction values for the individual hardware in the tester These values are stored in a calibration data file and are loaded into the appropriate hardware or memory when a user job is loaded Calibration is performed to ensure that the tester will perform at the highest accuracy possible Figure 4 1 shows a block diagram of the internal calibration process Maintenance Software 4 3 ch Calibration Reference Fixture SSES Circuitry Calibration Fixture CAL CUB DIB Value Hardware Measurement Needing C H Calibration Value Correction f Library Channel Boards Calibration DPS Etc Software F 000891 Figure 4 1 J750E internal calibration process block diagram External Calibration
221. es are reinstalled in the proper location Check the labels on the cables and wires before connecting them to ensure they are properly placed The following tools are required to remove and replace the power supply assemblies in the tester No 2 Phillips screwdriver Large slotted screwdriver 5 16 Socket wrench S socket 3 8 socket 7 16 open end wrench Adjustable torque wrench up to 156 inch pounds No 2 Phillips screwdriver bit 7 16 socket Side cutters or utility knife Tie wraps Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 Remove all of the boards installed in the tester as outlined in section Removing Circuit Boards on page 8 11 Proceed to the appropriate procedure for the power supply that needs to be removed 8 22 J750E 512 Pin Test System Service Reference Manual Removing the 405 924 00 10 5 volt 5 volt and 24 volt Utility and 405 920 00 5 volt and 10 5 volt Power Supplies Perform the following steps to remove the power supplies from the tester Figure 8 4 shows the location of the power supplies in the tester Tester Rear
222. et type may exist within the same workbook This allows a family of related programs to reside in the same workbook Combinations of sheets are selected to create an executable test program for a specific device A brief description of the various worksheets available as part of the workbook follows Home Sheet The Home Sheet provides an overview of the contents of the workbook organized by job It also provides active links to each item used in each job Each row of the sheet lists one component of the job either a sheet as specified on the Job List sheet or a test instance as specified on the Test Instances sheet for the job Each of these items is an active link to the actual sheet or test Job List Sheet The Job List Sheet lets you specify combinations of sheets to be used in creating a test program Each named combination defines one job This sheet helps maintain several job variants within the workbook Flow Table Sheet This sheet defines the order in which the tests are executed It can also define the binning rules that are to be used to categorize tested devices Pin Map Sheet The Pin Map Sheet defines device pin names to be used in the test program It also defines pin group names and their constituent pins and utility bits that are programmed Channel Map Sheet This sheet establishes how the Device Under Test DUT is connected to the tester It maps individual device pin names to specific tester channels and power supplies
223. f Red Strobe Area Green Strobe Area Red Strobe Area w Checking CUB System Giaind Bisi ES Go to VB FP Persistance T Histogram Lo KC Continuous Next Test Exit Debug Sta PASS 0 FAIL 1 F 000183 Figure 4 8 Typical Test Program Output window and Debug Mode dialog box If Matching Tests is selected the user is required to enter a text string in the window Debug Mode Dialog Box The Debug Mode dialog box is equipped with the following controls that allow the user to manage the debug environment Go to VB Loop Once Loop Continuous Proceed Next Failure Proceed Next Test Exit Debug Strobe Bar Persistence Histogram A short description of each control follows 4 28 J750E 512 Pin Test System Service Reference Manual Go to VB Open the maintenance program in Visual Basic at the first stop point after the failing test Loop Once Loop the failing test one time Loop Continuous Loop the failing test continuously Proceed Next Failure Continue to run the maintenance program until the next failure Proceed Next Test Continue to run the maintenance program until the next test in the sequence Exit Debug Exit from the Visual Basic Debugger Strobe Bar Shows the failure in a bar type display Persistence Change the intensity of the dialog box strobe bar Histogram Displays a frequency distribution of the failing or passing tests Note The Strobe Bar Persistenc
224. f the Measure Voltage Mode of the APMU channel e Current force 40uA 200uA 1mA 5mA 50mA Hardware Description 5 37 U1 R15 Shunt Resistors 10 0K R17 VIN o gt AA AMP_OUT Sei FORGE S1 Buffer de Ammeter Differential Translator R16 C_METER_OUT F 000957 10 0K Figure 5 19 Force Current Mode schematic diagram Figure 5 20 shows a schematic diagram of the Measure Current Mode of the APMU channel e Current measure 2uA 20uA 200uA 1mA 5mA 50mA Shunt Resistors R17 AMP_OUT 10 0K Current MN R15 Ammeter Differential Translator MEASURED_ C_METER_OUT Floating Buffer Amp F 000958 Figure 5 20 Measure Current Mode schematic diagram APMU Differential Voltmeter The differential voltmeter measures the differential voltage between two different APMU channels There is one differential voltmeter per 16 APMU channels Parallel differential measurement can be done as long as the measurement is on a different group of 16 channels The measurable differential voltage is limited to 10V The voltmeter has a low pass filter to reject the high frequency noise 5 38 J750E 512 Pin Test System Service Reference Manual The basic ranges of the differential voltmeter are as follows e Differential input ranges 10V 1V 0 1V 35V common mode range e Very High CMRR gt 100dB DC e Measurements averaging capability e Programmable peri
225. fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester Click the Calibration tab in the maintenance interface 7 Select or deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface CA O Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired Maintenance Software 4 51 9 Click Start Calibration starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run The board that is being tested is displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the Calibration tab displays the date and time of the last test as well as the overall test results pass or fail 10 Run additional Calibration as desire
226. following extemal equipment Agilent HP Meter Model 3458A Serial Number Equipment Calibration Date Agilent HP Frequency Counter Model 531814 Serial Number Equipment Calibration Date While running the following software Teradyne IG XL Version Teradyne J750 Maintenance Software version Thus certificate is valid for 3 months after which time re calibration is required Calibration Completed Next Calibration Due Date Performed By ERAS Teradyne Inc semiconductor Test Division J750 Platform 500 Riverpark Drive North Reading MA 01664 System Overview 1 11 Certificate of Calibration CTO Part Number 239 029 01 CTO Serial Number Customer Name Teradyne certifies that the Converter Test Option CTO listed above has been calibrated using the following extemal equipment AgilenvHP Meter Model 3458A Serial Number Equipment Calibration Date While running the following software Teradyne IG XL Version Teradyne J750 Maintenance Software Version This certificate is valid for 3 months after which time re calibration is required Calibration Completed Next Calibration Due Date Performed By Teradyne Inc Semiconductor Test Division J750 Platform 500 Riverpark Drive North Reading MA 01664 1 12 J750E 512 Pin Test System Service Reference Manual Certificate of Calibration LMF Part Number 239 046 93 LMF Serial Number Customer Name Teradyne certifies th
227. for looping test this indicates that at least one failure has occurred When complete the results display in the Test Program Output window The results of the External Calibration are stored in the CALCUBCAL TXT file that is created whenever External Calibration is run The file can be found in the C Program Files Teradyne lG XL Vx xx xx tester folder Figure 4 10 shows the portion of the file where the internal and external meter readings are recorded Note Vx xx xx refers to any version of IG XL installed on the test system computer Note These instructions assume all software has been installed in the default directory locations Note Pay special attention when reading the data in the file as some values may display as exponents 21 If CTOs are present in the tester it is recommended that you proceed to section Running External CTO Calibration on page 4 57 22 If CTOs are not present in the tester it is recommended that you proceed to section Running External Performance Verification on page 4 39 23 If External Performance Verification is not required proceed to the appropriate section of this chapter for the particular maintenance program you want to run 24 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window 25 Disconnect the cables from the Agilent or HP multimeter and the Cal
228. g down to reseat it 12 Turn the tester so that the DIB mounting surface faces front perpendicular to the floor 9 16 J750E 512 Pin Test System Service Reference Manual 13 Tighten the six 6 j 20 x 2 S long hex head mounting bolts to secure the card cage to the tester housing as follows Tighten the bolts approximately five 5 turns using the socket wrench and 7 16 socket Note Go around the six bolts tighten the center bolts first then tighten the remaining bolts in a cross pattern a few turns at a time Tighten the four 4 alignment bolts using the 9 16 hex wrench until there are two 2 threads exposed on each bolt Continue to tighten the six 6 card cage mounting bolts until the bolts have pulled the card cage assembly onto the seats but are not so they are completely tight Tighten the six 6 bolts to 30 inch pounds using the adjustable torque wrench and 7 16 socket Finally torque the six 6 bolts to 57 inch pounds using the adjustable torque wrench and 7 16 socket Checking for Loose CAL CUB Board This section provides information for checking for a loose CAL CUB Check for a loose CAL CUB board as follows 2 3 4 5 Always wear a tested grounding strap while working on the J750E tester Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of
229. g on the J750E tester 1 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 8 20 J750E 512 Pin Test System Service Reference Manual 3 Remove the foam filter at the front of the tester by carefully pulling it out of the filter frame and away from the control panel assembly located in the center of the tester 4 Remove the two 2 8 32 hex nuts from the control panel assembly at the front of the tester using the 11 32 nut driver then remove the control panel from the tester 5 Disconnect the connectors of the control panel from the connectors on the operator control harness and K Dock pendant harness 6 Remove the fourteen 14 8 32 x 1 j Phillips head screws and 8 lock washers from the filter frame using the no 2 Phillips screwdriver then remove the filter frame and EMI honeycomb filter from the front of the tester 7 Proceed to section Reinstalling Filter Frame and EMI Honeycomb Filter on page 8 21 as appropriate Reinstalling Filter Frame and EMI Honeycomb Filter Perform the following steps to reinstall the filter frame and EMI honeycomb filter Always wear a tested grounding strap while working on the J750E tester 1 Replace the EMI honeycomb filter and filter frame onto the front of th
230. g the no 2 Phillips screwdriver then remove the cover from the tester Remove the airflow shield from the DIB fixture on the tester Opening the Doors of the Tester The following tools are required to open the doors of the tester 5 16 T handle hex wrench Teradyne Part Number 234 826 00 Large slotted screwdriver 5 16 Always wear a tested grounding strap while working on the J750E tester Perform the following steps to open the doors of the tester Note These instructions assume that tester power has already been shut down 1 2 3 4 5 Oo ON O Ensure that the tester is fully undocked and a sufficient distance from the mating equipment Position the tester so that the DIB mounting surface faces up Always ground the Customer DIB or Calibration DIB when installing or removing it from the DIB fixture on the tester Properly ground the Customer DIB or Calibration DIB as previously outlined in section Grounding Calibration and Customer DIBs on page 7 7 of Chapter 7 Maintenance Place the DIB vacuum switch on the tester to the UNLOCK off position Remove the Customer DIB or Calibration DIB from the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage Position the tester so that the DIB mounting surface faces the floor Remove the EMI Dust cover from the top doors of the tester Unlock the top doors of t
231. ghterboard that resides on a J750E Digital Channel Board It is capable of source and capture of digital data concurrently through the Alternate Data Bus ADB to the Digital channels on the channel boards RFID The Radio Frequency Identification option provides the J750E tester with the ability to test devices used as tracking tags and contactless smart cards It provides 16 bi directional channels including transmitter and receiver paths with synchronization and DSP units and can support the testing of up to 32 sites DC Power Supplies There are two 2 power supply assemblies in the J750E Each assembly contains two multi output power supply modules Both assemblies are connected to the backplane by bus bars where the voltages are distributed Improved power supplies that provide built in power sequencing and increase the system power capacity have been incorporated into all J750E testers These supplies also contain a logic board to ensure correct system power up sequencing System Overview 1 7 Cooling System The J750E circuit boards are cooled by four 4 fans that are located at the rear of the tester These fans pull air in through the front filter across the boards and out through the rear There are also four 4 auxiliary fans located inside the tester that are used to remove hot air from the power supply assemblies Two 2 auxiliary fans are located inside each of the two 2 power supply jackets which hold the four
232. gram of the timing system Timing system of the hardware Timing system added to RFID hardware p RF Carrier Clock Carrier Frequency Generator Strobe Clock for DSP Filter p and synchronization of multiple devices Strobe Frequency Generator Digital patterns for amplitude modulation gt and for detection of load modulation Figure 5 25 Timing system of the hardware RFID Pin Electronics RFID Driver The magnetic coupling between the reader and the device in a real application is simulated in the test environment by several selectable resistors R A large resistor simulates a weak field distance a small resistor simulates a strong field proximity The following resistor values can be selected e 20 Ohms e 50 Ohms 500 Ohms e 5kOhms As shown in Figure 5 26 two sine wave drivers whose outputs are exactly 180 degrees out of phase produce the RF energy This builds up an RFID differential pin pair 5 44 J750E 512 Pin Test System Service Reference Manual RFID Option RFID Device Pattern Control A bes ChHi Se I d CG l gt PinHi j R C CG i 20R Suen Resistor St AC DC DUT requency ee Source Coupling 500R Coupling Connect SC 5K A l gt ChLo L TERN Pinto R c d Pattern Control RFID Driver Functional Block Diagram Figure 5 26 RFID driver functional block diagram The Pattern Generator selects between the High and Low level using the Pattern bit to perform modula
233. guration registers can be selected under microcode control The selected configuration register is used to control the multiplexer that allows any pattern data bit to be driven out on the ADB line By programming the configurations differently different address and data patterns can be time multiplexed over the same ADB line for devices that have multiplexed address and data pins In addition the ADB interface contains shifters that can shift pattern data left or right under microcode control This allows the ability to serialize pattern data and facilitates the test of devices that only provide a serial interface to embedded memory 5 24 J750E 512 Pin Test System Service Reference Manual The MTO provides the following functions e Algorithmic Address Generation Sixteen bit X and Y address generator e Independent Data Generation Sixteen bit data generator e Capture Memory 8 Meg 48 bit memory Figure 5 12 provides a block diagram of the MTO Capture Memory 4M x 96 Map RAM 256K x 16 Scramble Scramble clock RAM RAM reset 64K x16 64K x16 sdat id_enable AAA ARA 6y test tristate test_id_en 161162 46 16 y MTO ASIC 341 Signal I Os Y Y MPG Memory X Addr Y Addr gt 22 State Microcode Ca
234. h digital channel in the tester Additional hardware on the CAL CUB provides the capability to calibrate analog circuitry on the digital channel boards and the device power supplies Figure 1 5 shows a block diagram of the hardware used for calibration CAL CUB Calibration Fixture DIB Precision Digital Channel _ d Slice Master Precision Pin Pat Gen ATG Edge Set E Electronics gt Drive amp Levels Set Comparator Voh Vol Vih and Vi l l Rel Analog Source amp Measure l ae Voltage Ref Source Current and gt 100 MHz Master Clock J750 Hardware Needing Calibration gt F 000063 Figure 1 5 J750E calibration hardware block diagram System Overview 1 9 J750E Maintenance Procedures Calibration is only one element of a total maintenance program Itis important that the recommended maintenance procedures described in Figure 7 1 and Figure 7 3 of Chapter 4 Maintenance Software are followed The system should be fully functional before any calibration is run CAL CUB Calibration Review The J750E hardware specifications are achieved by e Calibrating the CAL CUB reference hardware to external equipment e Calibrating other J750E hardware to the CAL CUB reference hardware e Verification of hardware by running J750 Maintenance Programs e Calibration at the specified interval is critical to keeping the system at specification Figure 1 6 shows a flow diagram of the pr
235. h step 4 for the Application and Security logs 6 When complete close the Events Viewer 7 Proceed to section Detailed Text Document on page 9 32 of chapter 9 30 J750E 512 Pin Test System Service Reference Manual Event Logs Windows 2000 Perform the following steps to collect the Events Logs in Windows 2000 1 Click Start on the Windows Taskbar select Settings then click Control Panel The Windows Control Panel is displayed on the screen 2 Double click the Administrative Tools icon The Administrative Tools window is displayed on the screen 3 Double click the Event Viewer icon The Event Viewer window is displayed on the screen 4 Select the System Log icon from the Event Viewer Local icon in the Tree portion of the left side of the window The System Log is displayed in the right side of the window 5 Select Save Log File As from the Action pulldown menu The Save System Log As dialog box is displayed on the screen Note Save the log to the same drive or directory location where the Windows Diagnostic Report was saved 6 Complete the Save in windows as appropriate enter System in the File name window of the dialog box then click Save The log is saved to the specified location Repeat step 4 through step 6 for the Application and Security logs 7 When complete close the Event Viewer and Administrative Tools windows 8 Proceed to section Detailed Text Document on page 9 32 Event Logs Win
236. h the CAL CUB voltage source and then the comparator levels are adjusted to find the actual threshold Clamps Vcl Vch To check Vcl Vch the CAL CUB generates a source current into the clamp The corresponding voltage is measured by the CAL CUB s meter The relays are closed in the same manner as in the Drivers test The driver and active load are turned off and the BPMU to matrix relays are turned off The CAL CUB provides a 10ma source current to turn on the clamp diode and the voltage drop is measured The series resistance of the path adds a small voltage drop but it is insignificant when compared with the drop across the clamp Since the CAL CUB is used as the current source and to make the measurement only one channel may be calibrated at a time lloads lol loh and Vt The lload provides the source current into the precision resistors on the CAL CUB The CAL CUB then measures the voltage drop across the resistor to determine the current The relays are closed in the same manner as in the Drivers test The driver is turned off and the active load is turned on 4 10 J750E 512 Pin Test System Service Reference Manual To measure lol a voltage 2v more negative than Vt is forced into lol and the current is measured at 2ma 10ma and 50ma A linear fit is then computed from the measurements The process is then repeated for loh using a voltage that is 2v more positive than Vt To measure Vt 10ma is programmed into lol
237. hapter 2 Safety Information The instructions outlined in Chapter 2 Safety Information should be followed whenever repair procedures are being performed All hazardous materials used in any repair activity should be handled and disposed of as outlined in Chapter 2 Safety Information 8 2 J750E 512 Pin Test System Service Reference Manual ESD Precautions The following ESD precautions should be taken whenever work is being performed on the J750E tester e Always wear a tested grounding strap while working on the J750E tester e Ground the Calibration DIB or Customer DIB when installing or removing it from the DIB fixture on the tester as outlined previously in section Grounding Calibration and Customer DIBs on page 7 7 of Chapter 7 Maintenance Repair 8 3 Preliminary Repair Procedures Prior to performing any repairs on the tester it is important to properly prepare and shut down the major components of the J750E 512 Pin Test System This section provides instructions to prepare and shut down the system The following sections are included e Performing Preliminary Checks e Shutting Down the Computer System e Shutting Down the Tester and AC Power Vault e Opening the Tester Performing Preliminary Checks Prior to performing any repairs on the tester H is highly recommended that you perform the following e Run Checkers and Save Data Log File e Copy Calibration and Configuration Files The
238. hardware configuration file The following information is shown for each board Slot location e Type e Part numbers e Serial number e Revision level Save Configuration As This command is not active Help About J750 Maintenance This command displays a dialog box listing the currently installed e J750 Maintenance Version e Workbook Version e IG XL Version It also provides information indicating if the test program has been modified View Software Compatibility This command displays the J750Maint IG XL Software Compatibility Matrix dialog box The matrix lists the compatibility of the different versions of J750 Maintenance Software and IG XL The matrix can also be printed from the dialog box Maintenance Controls The interface is also equipped with the following controls that allow the user to manage the maintenance environment e Selection Tab e Hardware Selection Deselection e Loop Setting e Tolerance Reduction Setting e Verbosity Setting e Debug Mode e Status Window e Load Program Unload Program Button e Systemwide Tests Button e AC Calibration Button e AC Performance Button Maintenance Software 4 25 A short description of each control follows Selection Tab Allows the user to select the desired maintenance program to run e Quick Check Module Check etc Hardware Selection Deselection Allows the user to select the desired hardware within the tester to be checked for debugging purposes
239. hasized for servicing these areas e All rings watches necklaces and other conductive ornaments or jewelry should not be worn when accessing or servicing these areas of the tester e Extreme caution should be used when working with conductive tools The current levels of the system are adequate to cause severe sparking and or welding if conductive parts bridge components of different potentials 2 30 J750E 512 Pin Test System Service Reference Manual Personal Computer e Caution is urged when accessing or servicing any internal parts of the tester s personal computer system Hazardous voltages may be present on power supply connections power buses and monitor Refer to the computer manufacturer s safety information for additional details Internal Protective Barriers The tester is equipped with locking doors that are intended to act as protective barriers and prohibit non authorized people from accessing the inside of the tester The following protective measures have been implemented inside the tester e Warning labels and strategic tester design and layout are used to provide the primary protection to service personnel e Special hazard areas such as the input power module and the AC Power Vault may also be equipped with additional mechanical barriers e All conductive framing has been electrically connected to protective ground by green with yellow stripe ground wires or electrically conductive joints Special Internal Instructio
240. he DIB Mounting Side of the Tester on page 8 8 of Chapter 8 Repair By pass the Vacuum Activation Switch on the DIB fixture to verify that it is not plugged Check all of the hose connections on the pressure and vacuum sides of the tester for leaks Seal both sides of the DIB fixture using a Clear DIB or another such flat surface such as an airflow control board Be sure to leave the space between the two halves of the DIB fixture open so that you can access the boards installed in the tester Figure 9 6 shows an example of sealing the DIB fixture Allow space to provide access to boards installed in tester F 001082 Figure 9 6 Sealing DIB fixture Troubleshooting 9 9 10 Reach down between the two sealed vacuum areas and check to see if any of the boards installed in the tester move easily from side to side with vacuum applied to the tester You should not see the pogo blocks move when you hold a board and move it from side to side 11 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair 12 Reseat all of the boards installed in the tester as follows Unlock the PCB spring ejectors on the board then back the board out of its slot in the card cage no more than 1 inch 2 54 cm Note Do not remove the board from the system Reinstall the board then lock the PCB spring ejectors to ensure that the board is properly seated and locked in pla
241. he ExternalPV Tab in the maintenance interface 2 Select Options on the menu bar of the maintenance interface select MSO Options Tools then select Field Performance Verification Test 3 Select the LMF to be tested then click Start Field Performance verification begins The LMF selected in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicated that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the test is complete the Test Program Output window displays the overall test results pass or fail 4 If required repeat the appropriate steps of this procedure for any additional LMF modules installed in the tester Maintenance Software 4 67 5 Run additional instrument external calibration procedures as outlined in section Optional Instrument Reference Calibration on page 4 57 for any additional instruments that are installed in the tester as applicable 6 If no additional instruments need to be calibrated select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window 7 Disconnect the cables from the meter measurement standard and the daughter card 8 Power down the meter and measurement standard from the power source
242. he tester Power can be restored but the tester will continue to turn off approximately every 2 minutes until the fan problem is repaired The fans used in the J750E tester are equipped with a rotation sensor and alarm circuit Each fan sensor monitors and detects if that fan is functional and sends a signal to the CAL CUB All of the fan sensors are wired to an 8 pin connector J2 located on the top edge of the CAL CUB using blue wires Additionally an Alarm Vcc 5 volts and ground are present at the connector Each sensor line should measure 4 5 volts to 5 volts when the fan is working properly The fan sensor wiring and signals are shown in Table 9 1 Troubleshooting 9 19 Fan Signal Wire Color Voltage Level Alarm Vcc Red wire 5 volts From CAL CUB Alarm ground Black wire From CAL CUB Alarm output Blue wire gt 4 5 volts To CAL CUB Fan OK HI N A 4 5 to 5 volts Fan speed gt 2000rpm Fan defective N A Low lt 4 0 volts Table 9 1 Fan sensor wiring The fan sensor to CAL CUB connections are shown in Figure 9 9 The fan control circuit of the CAL CUB is shown in Figure 9 10 9 20 J750E 512 Pin Test System Service Reference Manual Ground 24 Volt Utility Power Supply 24 volts Cal CUB J3 Rear Fan B OK Be g S k 24 volts Ground 2A Circuit Breaker Fan A Rear Fan A OK Rear Fan C OK
243. he tester over a cable that connects to the Calibration Clock Utility Board CAL CUB This cable must be connected for the software to recognize the tester otherwise the test system computer will function as a standalone computer Calibration Clock Utility Board The CAL CUB generates all of the clocks for the J750E tester and it is also responsible for distributing the TCIO buses received from the PCI board to the rest of the system The System Master Clock is derived from a 200MHz crystal oscillator that is then divided by 2 to create the 100MHz distributed Master Clock This 100MHz clock is then divided by 2 again to produce the 50MHz clock that is cabled over to the PCI interface board This 100MHz clock is then appropriately delayed and distributed to each slot Each slot receives the clock at the same time regardless of the connector location in the system backplane Figure 5 5 and Figure 5 6 show the TCIO bus distribution scheme for the J750E tester 5 10 J750E 512 Pin Test System Service Reference Manual DPS up to 2 Mass Termination Channel Board up to 4 f Channel Board up to 4 CLOCK CLEAR TCIO_0 SYNC DATA RDATA TCIO_1 SYNC DATA RDATA 1 0 F 000169 Figure 5 5 TCIO bus distribution Hardware Description 5 11 PCICLK ivi 50 MHz lt Divide by 2 8 Master Clock CLK Enable _ gt 100 MHz Clear _
244. he tester using the 5 16 T handle hex wrench then open the doors Loosen the four 4 retaining screws on the air control cover assembly using the large slotted screwdriver 5 16 then remove the assembly from the tester Repair 8 9 Repair Procedures This section of this manual provides instructions for performing common repairs on the J750E tester The following sections are included e Circuit Board Removal and Replacement e DIB Fixture Assembly Removal and Replacement e Fan Plate Assembly Removal and Replacement e Filter Frame and EMI Honeycomb Filter Removal and Replacement e J750E Tester Power Supply Assembly Removal and Replacement e Power Supply Module Removal and Replacement e Card Cage Assembly Removal and Replacement e Input Power Module Removal and Replacement e Fan Removal and Replacement e Vacuum Seal Removal and Replacement e Channel Board Relay Board Removal and Replacement e Memory Test Option MTO and Digital Signal UO DSIO Option Removal and Replacement e APMU Motherboard Relay Board Removal and Replacement e APMU Daughter Card Removal and Replacement e Pogo Block Removal and Replacement e Pogo Block O ring Removal and Replacement e Pogo Pin Removal and Replacement e Personal Computer PCI or GPIB Board Removal and Replacement All repair instructions assume that all of the components of the test system have been properly shut down and prepared for repair Note
245. her Health Effects Item No 21463 Product name Loctite R 222 Threadiocker Low Strength 305 Satety Information 2 23 Loctite 222 Continued SE 852 47 5 eeh ES p004 96 0 EE ee No Target Organs No Target Organs Allergen Central nervous system Corrosive Imtant Mutagen 12 ECOLOGICAL INFORMATION Ecological information Not available 13 DISPOSAL CONSIDERATIONS Information provided is for unused product only Recommended method of disposal Dispose of according to Federal State and local governmental regulations Proper shipping name Unrestri Hazard class or division None Identification number None Packing group None Z i ae i Identification number Packing group Marine pollutant E E On dd d No 21463 Product name Loctite R 222 Threadiocker Low Strength 2 24 J750E 512 Pin Test System Service Reference Manual Loctite 222 Continued United States l Information TSCA 8 b Inventory Status All components are sted or are exempt from listing on the Toxic Substances Control Act inventory TSCA 12 b Export Notification 4 Methoxyphenol 150 76 5 CERCLA SARA Section 302 EHS Nome above reporting de minimus CERCLA SARA Section 311 312 immediate Heath Hazard Delayed Heath Hazard CERCLA SARA 313 Cumene hydroperoxide CAS 80 15 28 California Proposition 65 This product contains a chemical known to the State of California to cause cancer and birth defects or
246. her older computers including the W8000 AP500 and AP550 is not possible These older systems must be reloaded manually with original media Before You Begin Locate and record the Microsoft Windows XP product key located on a sticker affixed to the computer housing This key will be needed in the registration process for some models Repair 8 59 Make a backup copy either to floppy disk CD or remote network location of the customers license file tester configuration files and any customer data you wish to keep These files are located in C Program Files Teradyne lGXL license license dat and C Program Files Teradyne lG XL lt your IG_XL version gt tester TesterConfig txt by default Please note that all data on the system hard drive will be erased in this process Arrange with the local system administrator to rename and reinstall the system on the Local Area Network if applicable The local administrator will also need to reinstall any user accounts and anti virus software on the machine Make sure you have a copy of the customers desired version of IG XL available It will need to be installed immediately after restoration and is a licensing requirement Read and understand all license terms agreements and End User License Agreements EULAs printed on this software and displayed during the installation process It is illegal to make copies of this media or to use it in any manner inconsistent with these license agreements
247. ibration DIB 26 Power down the Agilent or HP multimeter then disconnect it from the power source Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 27 Place the DIB vacuum switch on the tester to the UNLOCK off position 28 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester Maintenance Software 4 37 29 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage Running External Performance Verification Run External Performance Verification as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched the J750Maint xls job has been loaded and External Calibration has just been run 1 Click the ExternalPV Tab in the maintenance interface 2 Deselect all of the boards in the tester by clicking All in the graphical representation of the tester indicated in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected hardware is displayed white 3 Select the CAL CUB board in the tester as represented in the Hardware Selection Deselection area of the maintenance interface 4 Click Start The HP3458A Voltage Measurement Instrumentation Setup dialog box is displayed on the screen Fig
248. ibration The CAL CUB contains reference circuitry that is used to calibrate other hardware in the J750E tester First the reference circuitry on the CAL CUB must be calibrated to traceable external equipment An Agilent or HP multimeter model 3458A Agilent HP 3458A multimeter and an Agilent or HP frequency counter model 53181A Agilen HP 53181A frequency counter with calibration traceability are required to perform this external calibration Once the CAL CUB is externally calibrated to the traceable multimeter and frequency counter the CAL CUB is used to calibrate other hardware in the tester Maintenance calibration software connects the CAL CUB hardware to other tester hardware via the Calibration DIB The values measured during calibration are stored in correction libraries and used during other maintenance programs Figure 1 4 shows a block diagram of the calibration process 1 8 J750E 512 Pin Test System Service Reference Manual External e Calibration Traceable e deeg Fixture Equipment SS Circuitry CAL CUB Calibration Fixture Value Hardware Measurement Needing Qe Calibration Value Correction mm Library Channel Boards Calibration DPS Etc Software F 000030 Figure 1 4 J750E calibration process block diagram The CAL CUB contains a Precision Digital Channel with the hardware necessary to calibrate both timing and levels for eac
249. ic report in Windows NT 1 Click Start on the Windows Taskbar then click Programs Administrative Tools Common and Windows NT Diagnostics The Windows NT Diagnostics dialog box is displayed on the screen 2 Select Save Report from the File pulldown menu The Create Report Diagnostics dialog box is displayed on the screen 3 Complete the dialog box as follows Scope Select All tabs Detail Level Select Complete Destination Select File 4 Click OK The Save WinMSD Report Diagnostics dialog box is displayed on the screen 5 Complete the File Name window of the dialog box and click Save 6 The report is generated and saved to the specified location 7 Click OK to close the Windows NT Diagnostics dialog box 8 Proceed to section Event Logs Windows NT on page 9 30 Windows Diagnostic Report Windows 2000 Perform the following steps to collect a Windows Diagnostic report in Windows 2000 1 Click Start on the Windows Taskbar then click Run The Run dialog box is displayed on the screen 2 Type winmsd in the Open window of the dialog box 3 Click OK The System Information window is displayed on the screen 4 Select Save As System Information File from the Action pulldown menu The Save As dialog box is displayed on the screen Troubleshooting 9 29 5 Complete the Save in and File name windows of the dialog box then click Save The report is generated and saved to the specified location 6 Close the System Inf
250. icular maintenance program you want to run Running External CTO Performance Verification Run External CTO Performance Verification as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched the J750Maint xls job has been loaded and that External Performance Verification has just been run on the tester 1 Deselect the CAL CUB as represented in the Hardware Selection Deselection area of the maintenance interface 2 Select all of the CTO boards that are installed in the tester as represented in the Hardware Selection Deselection area of the maintenance interface Maintenance Software 4 57 Note Selected hardware is displayed gray and deselected hardware is displayed white 3 Click Start The HP3458A Voltage Measurement Instrumentation Setup dialog box is displayed on the screen Figure 4 9 shows the dialog box 4 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in the dialog box and click OK The voltage calibration portion of External CTO Performance Verification begins The CTOs displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicates tha
251. igation tree expands to show the contents of the Vx xx xx folder Note Vx xx xx is a generic representation for any version of IG XL that may be installed 9 Double click the tester folder The contents of the tester folder are displayed Repair 8 5 10 Right click the CalibrationData txt icon in the file list The File Options pulldown menu is displayed 11 Select Copy from the menu The file name is highlighted in the file list 12 Right click in a blank portion of the Name section of the Explorer window The File Options pulldown menu is displayed 13 Select Paste from the menu A copy of the CalibrationData txt file is created 14 Right click the copy of the CalibrationData txt icon in the file list The File Options pulldown menu is displayed 15 Select Rename from the menu The file name is highlighted in the file list 16 Rename the file as appropriate then press Enter Note Itis highly recommended that you save the file to the same directory using a name very similar to the original name That way the renamed file will be easy to find when you need to locate it 17 Right click the CurrentConfig txt icon in the file list The File Options pulldown menu is displayed 18 Select Copy from the menu The file name is highlighted in the file list 19 Right click in a blank portion of the Name section of the Explorer window The File Options pulldown menu is displayed 20 Select Paste from the menu A
252. ight power supply assembly provide air to cool the Power One power supplies The air is provided to the rear of the Power One supplies where a fan that is part of the supply pushes the air through the supply and out the top of the supply near the bus bars The heated air exiting the Power One supplies exits the rear of the system along with the air that cools the circuit boards The airflow for the power supplies is shown in blue in Figure 6 17 Figure 6 17 512 cooling air flow Filter Fan Locations and Function The main cooling fans are mounted on the Fan Plate assembly located at the rear of the system The cooling fans for the power supply assembly are shown in Figure 6 18 The rear fans are shown in Figure 6 19 6 28 J750E 512 Pin Test System Service Reference Manual View of cooling fans for power supply assembly looking into the assembly F 000133B Figure 6 18 Power Supply auxiliary cooling fans AC DC Power and Cooling 6 29 Fan Plate Assembly Rear View F 0001 33A Figure 6 19 Main cooling fans 6 30 J750E 512 Pin Test System Service Reference Manual System Grounding Facility ground AC ground connects to the AC Power Vault via the AC power cable AC ground is then connected to the Input Power Module AC ground connects to the test head chassis in the Input Power Module AC ground is distributed to the input of the DC power supply modules The output of the DC power supplies distribute
253. in the system Performing timing calibration requires the following e Measure the time delay between the CAL CUB s comparator and driver and measure the delay through the RF matrix on the Cal DIB for each digital channel e Align the drive edges on all digital channel boards to a common reference point e Align the receive edges on all digital channel boards to a common reference point e Adjust the drive and receive edges on all digital channel boards due to differences in path lengths to the Device Under Test DUT e Align each channel s driver and comparator Cal DIB Calibration The CAL CUB and the Cal DIB must be calibrated together before use to ensure signal integrity even though there are no specific components on the Cal DIB that actually get calibrated For timing the Super Linear Interpolator SLI is checked against the 100MHz crystal clock in the system to find the offset and slope of its timing values Once calibrated the SLI provides a fine timing adjustment that may be connected to the CAL CUB driver or comparator The electrical length of the Cal DIB is calibrated to an open circuit by Time Domain Reflectometry TDR All digital channel relays are opened and the master driver and comparator are used to drive and measure the time it takes the signal to complete the cycle The time of the reflection is halved to find the one way delay through the RF matrix on the Cal DIB Finally the master driver is used to measure a
254. ing In Warranty At end of 20 minutes Warranty By Teradyne Post Warranty Yearly By Customer Pressurized air and Vacuum Quarterly By Customer 5 minutes Pogo pins Check whenever a problem is suspect Environmental Checks Tempurature Quarterly By Customer 5 minutes Humidity Pressurized air Quarterly By Customer 5 minutes Cooling path Quarterly By Customer 5 minutes 7 2 J750E 512 Pin Test System Service Reference Manual Table 7 1 J750E Maintenance Schedule Continued Frequency Time Required Notes ACPower Check whenever a problem is suspect Vacuum Seal Checks Vacuum Seals Quarterly By Customer 5 minutes May also be check whenever a problem is suspect Pogo Block O Rings Quarterly By Customer 5 minutes May also be check whenever a problem is suspect Computer Checks Routine computer maintenance Follow manufacturers recommendation Table 7 2 J750E Maintenance Schedule Checklist get GE GT Evely vear aie Power Supply Checks Power Supplies Xx System Checks Air Filter cleaning or replacement X Fan inspection and cleaning X Pressurized air and Vacuum X Pogo pins X Environmental Checks Temperature X Humidity Pressurized air X Cooling path X AC Power X Vacuum Seal Checks Vacuum seals X Pogo block O Rings X Xx Computer Checks Routine compu
255. installing the input power module confirm that all wires are reinstalled in the proper location Check the labels on the wires before connecting them to ensure they are properly placed J750 512 Pin DIB shipping cover Teradyne Part Number 234 408 00 1 20 x 1 s long nyloc cap socket head screws Teradyne Part Number 470 533 08 quantity 4 3 16 hex wrench Blank serial number label Teradyne Part Number 429 570 00 Chassis ground label Teradyne Part Number 416 638 01 Adjustable torque wrench up to 26 inch pounds Medium slotted screwdriver bit 1 4 No 1 Phillips screwdriver bit No 2 Phillips screwdriver bit Side cutters or utility knife Tie wraps Removing Input Power Module Assembly Perform the following steps to remove the input power module assembly 1 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 8 36 J750E 512 Pin Test System Service Reference Manual 3 Place the DIB shipping cover onto the DIB fixture and secure using four 4 j 20 x 1 s long nyloc cap socket head screws Loosely tighten the screws using the 3 16 hex wrench 4 Open the tester as outlined in section Opening the DIB Mounting Side of the Tester on page 8 8 Note Ensure that the tester po
256. ion using metallic tools when servicing these areas F NNNONRA Note J750E Tester shown Figure 2 7 Circuit Boards and Power Supply safety identification Safety Information 2 13 Tester Front Figure 2 8 identifies the safety controls located on the front of the tester A 1 Emergency Power Off Switch A 2 Power On Switch Enables tester power 3 Kinematic Docking Pendant Connector Input connection for Kinematic Docking System Control Pendant AN 4 Power Off Switch Disables tester power F 000208 Note J750E Tester shown Note The Emergency Power Off switch is a safety feature The switch design is larger in size than the Power Off switch which makes it easier for an operator to locate and press whenever power to the system needs to be removed in an emergency Activating the switch by pressing the round black button will instantly disable all AC power to the tester power supplies by opening the contactor inside the input power module A voltage of 208 Vac will still be present in the input power module and 24 Vac will be present at the Power On Off switch at the front of the tester and J3 connector of the CAL CUB PCB Figure 2 8 Tester front safety control identification 2 14 J750E 512 Pin Test System Service Reference Manual Tester Rear Figure 2 9 identifies the safety hazards at the rear of the tester Pl del 12 F 000207 Note 1 Kinematic Docking System Modu
257. ircuitry needed to test the channel board Each calibration value is re tested against the system specifications at the calibration points Calibrated Circuitry The externally calibrated DC circuitry and timing circuitry are verified in the J750E during Performance Verification The following circuitry is checked during verification Channel Board Edge timing Edge placement accuracy Vih and Vil Voh and Vol Vt loh and lol PPMU Board PMU VCL VCH High Voltage e DPS Device Power Supplies Forcing voltage Current limit Current measurement e CAL CUB Power Supply Measurement e CTO Source VRefi and VRef2 ContactCheck A graphical based ContactCheck tool has been incorporated into the J750 Maintenance Software starting with version V7 23 10 The tool uses a similar MUI as the standard J750 Maintenance Software interface From this interface the test mode and options are selected and the program is run 4 18 J750E 512 Pin Test System Service Reference Manual The ContactCheck tool can be used to make TDR measurements or run Continuity Checks Once the test is completed a new IG XL workbook is displayed on the screen to display the test results The test results are displayed in the form of an Excel graph and numerical data for each channel tested Note A special probe continuity card Teradyne part number 234 281 00 and probe card debug tool Teradyne part number 8
258. izing agents Products of Decomposition Thermal decomposition may release carbon monoxide carbon dioxide and incompletely bumed hydrocarbons Hazardous Polymerization Will not occur Condicions to Avoid NA ame 11 TOXICOLOGICAL INFORMATION Ingestion Se Rats LC50 12 000 ppm S hrs Isopropanol Rats LD50 5 800 mgkg Tsopropanol Rabbits MLD Tsopropanol Rabbit 100 mz MLD MOD Cancer Information No ingredients listed as human carcinogens by NTP or IARC Reproductive effects none Teratogenic effects none Mutagenic effects Lone SECTION 12 ECOLOGICAL INFORMATION Avoid runoff into storm sewers and ditches which lead to waterways Water runoff can cause environmental damage REPORTING US regulations require reporting spills of this material that could reach any surface waters The toll free number for the US Coast Guard National Response Center is 1 800 424 8802 SECTION 13 DISPOSAL CONSIDERATIONS Dispose of im accordance with all federal state and local regulations SECTION 14 TRANSPORTATION INFORMATION Proper Shipping Name Air md Ground Not ted SEC TION a REGULATORY INFORMATION This product contains no toxic chemicals subject to the reporting requirements of Section 313 of the Emergency Planning and Commumity Right To Know Act of 1986 40 CFR 372 This information should be included on all MSDSs copied and distibuted for this material TOXIC SUBSTANCES CONTROL ACT TSCA All ingredients of this product are Ested on the TSC
259. l gue am pPudv pamesey pue 07120 mue SIHIBO en puoy ema pugy SomeO PUDV ppm pugy Di la LO LO Di la LO LO F 000796 iew DUT vi ion t identifica In I MSO ASIO board pi Figure 11 5 11 6 J750E 512 Pin Test System Service Reference Manual vev ved veo ved FC ved veo ved T o ED O 23 5 5 E AAA A A A A AA AAA x 2 E L TE Lo Ny y v E ro UND tenway ONE 1 9EDWdg ONE 6enwWdv GND ZbNMdVY ONE senwdv GND genwdv OND isnwav ONE kenne ONE zsnwdv ONE oenmdv GND jesnwav GND vds LV enWdv ONE BenWdv GND BenWdv GND EbnWav GND penidy GND Vrntdg ONS josnidv ONE fesndv ONE Send AND snwdv ONG Candy GND osda UND a ONE penwWdv GND ZenWdv GND DEDWdN GND Et d GND Benway GND Erd GND zsnway GND ssnWdv ONE gend ONE isnwdv GND sds GND eysoa LO EES gte yxa 8rS xass oa Hm N asn pros nvas n LG a CO 55 30 eo O i je Zo oO D eS eS c gt oA oA O lt O lt x GND Lady ON bNINdV GND ZNANdY GND pinay ONE End ONE Bund GND Et d ONE eznwdv GND senwdv GND eenwdv ONS ng GND ods LV ONWdv GND ENNAV GND j9nWdv GND 6NWdv GND jztnwdy GND Et d ONE BinWdy ONE ng GND renwdv ONG znmdv GND joenway GND 0S9DA UND 1a GND ENNA
260. l DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate Run Quick Check as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded Note If Calibration has not just been run you must rename or reset the calibration file CalibrationData txt prior to running Quick Check 1 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 2 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester Note The Calibration DIB is not required to run Quick Check but is recommended 3 Place the DIB vacuum switch on the tester to the LOCK on position 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester 6 Click the QuickCheck tab in the maintenance interface Maintenance Software 4 43 7 Select or deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected ha
261. l lo lo llo I o lo jo lo a al fa la TCIO Ribbon a al ja ja r rl lr H cable r vil r d jd ld d i d dj d ld ol lol lolo Lower Backplane ol lo rl qe riilr I r r dey r C ALO UAN 23 000 pl pipe fciejilicic pi Dip pi MA tin it i ui il fi Ji ooidonpi if fil ln Lol toto dol dt UL Jl lol lol lol lols n jn jn jn B n min In Lower 14 12 10 8 6 4 2 0 1617181920 1 3 5 7 9 11 13 15 Backplane Slot Bus A TCIO_0_SYNC_LL TCIO_1_SYNC_LL TCIO_0 DATA LL TCIO_1_DATA LL TCIO_0_RDATA_LL TCIO_1_RDATA LL 1 0 TCIO_012_CLK_LL 2 signals TCIO_012_CLEAR_LL TCIO_0 SYNC_LR TCIO_1_SYNC_LR TCIO_0_DATA_LR TCIO_1_DATA_LR TCIO_0 RDATA_LR TCIO_1_RDATA_LR 1 0 TCIO_012_CLK_LR 2 signals TCIO_012_CLEAR_LR F 000332A Figure 5 7 Board and backplane configuration Hardware Description 5 13 The CAL CUB is located in the center of the card cage on the lower backplane in slot 18 As is shown in Figure 5 7 there are four TCIO buses driven across the lower backplane two copies of TCIO_0 and TCIO_1 Half of these buses are distributed to the left side of the backplane and the other half are distributed to the right side of the backplane Each side of the backplane connects two TCIO buses to eight channel board slots and two CTO slots The reason that the backplane is split into two sections is to cut the signal
262. l provides an overview of the software and programming environment of the J750E tester The following information is covered in this chapter e Teradyne IG XL Software e J750 Maintenance Software e Other Software 3 1 Teradyne IG XL Software The Teradyne IG XL software takes advantage of existing PC based software platforms to provide the user with a set of tools that are easy to learn and use IG XL is built on three existing software packages e Microsoft Windows e Microsoft Excel Part of Microsoft Office e Microsoft Visual Basic IG XL provides the user with many features such as e Offline stations can run on Microsoft Windows 95 or greater e Familiar office software tools e Device data oriented programming and debugging e Code based programming and debugging e Aflexible interface to design and test data e A flexible production software interface e Test templates are written in Visual Basic within Excel e Simplified software installation and updating From the user s perspective IG XL is comprised of three basic areas e Pattern Tools e Excel Based Tools e Production Controls The Pattern Tools include e Pattern Compiler e Pattern Editor e Pattern Debugger The Excel Based Tools include e Data Tool e Debug Display e Test Templates The Production Controls include e Production Interface tools e Handler Prober communication drivers Figure 3 1 shows a block diagram of the IG XL software 3 2 J750E 51
263. l reference standard During External Calibration the Source Digital to Analog converters DACs and Capture Analog to Digital converters ADCs are calibrated for AC amplitude accuracy correction During Internal Calibration the Source DACs and Capture ADCs are calibrated for DC correction gain offset and linearity 4 16 J750E 512 Pin Test System Service Reference Manual Analog Parametric Measurement Unit The Analog Parametric Measurement Unit APMU has on board references that are very similar to the Channel Boards PPMUs APMU External Calibration allows the user to calibrate the reference circuitry on the APMU to a traceable external reference standard After External Calibration has been performed the calibrated reference circuitry is used to perform Internal Calibration where the calibrated data is used to take measurements and make adjustments during other testing Calibration Hardware Calibration circuitry for the tester is located on both the CAL CUB and the Cal DIB Figure 4 5 shows a block diagram of the calibration hardware of the tester CAL CUB Calibration Fixture DIB Precision Digital Channel o Slice Master Precision Pin Pat Gen ATG Edge Set Electronics gt Drive 8 Levels Set Comparator Voh Vol Vih and Vil m gt Analog Source 8 Measure dl Voltage Ref Source Current and 100 MHz Master Clock J750 Hardware Needing Calibration gt
264. ld be reset or renamed prior to running Module Check Note Vx xx xx refers to any version of IG XL installed on the test system computer Continuity Check As part of J750 Maintenance Software version V7 23 00 or greater a system wide continuity check can also be performed when running Module Check Continuity Check is automatically run when Module Check is first run each time power is applied or re applied to the tester The continuity check program can be used as a troubleshooting tool or to provide increased confidence in the DIB to pogo connections of the J750E tester This program checks the continuity TDR and communication paths between the CAL CUB Cal DIB and the Channel Board Relay Board Pin Electronics PE drivers It checks for proper pogo pin contact resistance and checks relay contact resistance and leakage Maintenance Software 4 21 Calibration Internal Calibration allows the user to calibrate the tester against the externally calibrated reference circuitry located on the CAL CUB If Calibration is not performed the tester specifications may not be met Internal Calibration stores the calibrated values and the temperature at calibration time in the CalibrationData txt file which is located in the in the C Program Files Teradyne IG XL Vx xx xx tester folder of the test system computer Note Vx xx xx refers to any version of IG XL installed on the test system computer DC Calibration can be ru
265. le See the J750 Test System Kinematic Docking System Manual for additional information 2 Air Source Supply Line Connector Refer to the J750k and J750 512 Pin Test System Site Preparation Guide for additional Information 3 AC Mains Cable to Tester 208 VAC 3 phase connects to AC Power Vault Maximum cable length not to exceed 20 feet 4 PCIT Cable Connects tester to test system personal computer 5 Circuit Breakers 24 volt control transformer primary and secondary 6 ESD Wrist Strap Connection Point J750E Tester shown Figure 2 9 Tester rear safety identification Safety Information 2 15 Materials Handling Hazardous Materials This section of the manual contains safety information needed to properly handle hazardous materials used to maintain and repair the test system or for handling any solid waste created as a result of maintenance and repair activities It also contains Material Safety Data Sheets MSDS for any hazardous materials used to maintain and repair the test system Handling of Hazardous Materials Hazardous materials used in any maintenance or repair activities alcohol IPA wipes should be handled and disposed of in accordance with facility guidelines and local regulations The test system is not used in hazardous material environments so no special handling is required for decommissioning Handling of Solid Waste Materials that become solid waste as a result of any maintenance o
266. lected signal to the appropriate pin e DPS The Device Power Supply DPS board is a single quadrant power supply that contains 8 channels on each board 1 6 J750E 512 Pin Test System Service Reference Manual e Optional Instruments MTO The Memory Test Option MTO provides the J750E with the capability to test standalone or embedded memory devices It also provides hardware to support specialized memory failure and analysis tools The MTO is an option and may not be present in all tester configurations CTO The Converter Test Option CTO is an 8 channel high accuracy DC source and measurement board Each channel consists of a DC Source a DC Acquire Input and two programmable references The CTO is an option and may not be present in all tester configurations MSO The Mixed Signal Option MSO provides the J750E with the ability to source capture and analyze analog signals as well as the digital representation of analog signals on mixed signal microcontrollers with embedded analog functionality The MSO is an option and may not be present in all tester configurations APMU The Analog Parametric Measurement Unit APMU provides the J750E with 64 analog channels per board It has complete 4 quadrant operation for voltage and current forcing measurement functions and provides 35V and 50mA The APMU is an option and may not be present in all tester configurations DSIO The Digital Signal I O option for the MSO is a dau
267. llowing functions e Analog sources Four 4 independent differential arbitrary waveform outputs Per Pin Measurement Units PPMU for parallel parametric testing Selectable source bandwidth Source memory and digital signal processing DSP per channel e Analog capture Four 4 independent differential digitizers PPMU for parallel parametric testing Selectable capture bandwidth Dual ported capture memory and DSP per channel e Per ASIO Sixteen 16 pattern controlled relay drivers and sixteen 16 utility bits On board 24 bit DC meter On board sequencer one per ASIO 5 28 J750E 512 Pin Test System Service Reference Manual The support circuitry on the ASIO main board provides e Control circuitry e Pattern control e LVM memory e DSP memory e Temperature sensors e Correction circuitry e Board ID e Relay drivers e PPMUs x 2 e DACs for source and capture The ASIO accomplishes source and capture of analog signals Each analog channel board contains four 4 differential sources and 4 differential digitizers both with DC baseline for connection to a total of up to 16 device pins Each analog pin has PPMU support for normal parametric testing The analog channel provides high quality connections to the device pin using differential signal paths to and from the Device Interface Board A Device Ground Sense DGS input per channel is available for capture and another DGS per ch
268. lly the following safety practices which are controlled by the system user are recommended Only qualified personnel should be allowed to operate maintain or service the system Safety glasses and safety shoes should be worn when service requires the removal or installation of heavy items such as power supplies Visitors to the test area where the system is installed should have qualified supervision Tools food liquids and other miscellaneous items should not be placed on the top surfaces of the tester or any other part of the test system Operators and service personnel should remove or cover conductive items that they may be wearing such as rings and watches before using or servicing the system Adequate workspace should be provided for operators and service personnel in the test area where the system is installed Refer to the J750k and J750 512 Pin Test System Site Preparation Guide for J750 Test System floor plan recommendations When operating or servicing the tester exercise electrostatic discharge ESD control measures refer to section Electrostatic Discharge ESD Damage Prevention and Control on page 2 34 for additional information on ESD control measures It is highly recommended to have an assistant present when working on high voltage or high power portions of the systems As a minimum notify someone in the area of your actions before and upon completion of service When replacing or repairing modules or subass
269. lly and slowly reinstall the board into the appropriate location in the tester 4 Ensure that the board is properly seated and that the PCB spring ejectors are properly locked in place 5 Repeat step 1 and step 4 for each board that need to be reinstalled Note Install channel boards or full size optional instruments as follows e H applicable remove the board from its storage container and place it onto a proper anti static work surface with the component side facing up e H applicable remove any connector covers that are installed on the board e Holding the board approximately in the middle and using the information in the configuration file carefully and slowly slide the board into the card cage slot until it is approximately half way in e Letthe board rest on the bottom rail of the card cage to help stabilize it while you reposition your hands e While keeping one hand on the board at all times slide your hands to the circuit board locking clamps at the top of the board e Carefully and slowly slide the board the rest of the way into the card cage slot e Ensure that the board is properly seated and that the PCB spring ejectors are properly locked in place 6 Reconnect the cables to the J1 J3 connectors on the Calibration Clock Utility Board CAL CUB as appropriate 7 Replace the air control cover assembly and secure the four 4 retaining screws using the large slotted screwdriver 5 16 8 Close th
270. lt The AC Power Vault contains a multiple tap 3 phase 18KVA step down transformer that is used to isolate the J750E tester and to convert the available facility power to 208 VAC 3 phase Wye and neutral that is required by the tester The AC Power Vault can be tapped to convert most available types of 3 phase 50 or 60Hz Delta or Wye and neutral input power The AC Power Vault also provides 110 VAC 50 60Hz through RFI filters to power the PC and monitor an emergency off switch for system shutdown and main and auxiliary circuit breakers The AC Power Vault is connected to the tester s input power module where the power is distributed to the DC power supplies Additional information on tapping the AC Power Vault is contained in the Chapter 6 AC DC Power and Cooling Manipulator The J750E is available with various types of manipulators The manipulators allow the J750E to be oriented as required by the testing application The manipulators are available TUV certified Manipulator mounting locations are positioned on the side of the J750E tester Personal Computer The Personal Computer consists of a Microsoft Windows based workstation monitor mouse and keyboard A computer cart is included with the test system System Overview 1 15 Overall System Block Diagram A block diagram of the system is shown in figure J750E system block diagram on page 16 It shows the boards and the basic functions performed by each one Data Buse
271. ly 3 minutes before turning the tester back on to continue troubleshooting 12 Using previous Figure 9 9 measure the fan sensor inputs at the cable marked 234 818 00 FAN MON PWR J3 connected to the 8 pin connector J2 on the CAL CUB The signal should read a minimum of 4 5 volts 13 If a fan is found to be defective remove and replace it using the appropriate instructions outlined in section Fan Removal and Replacement on page 8 40 of Chapter 8 Repair 14 If a defective fan can not be identified check the fan sensor circuit on the CAL CUB Previous Figure 9 10 shows the circuit Power Supply Troubleshooting 1 1 Once power has been reapplied measure between the Force and Sense lines of each power supply to see if the supply is operating at the proper voltage 2 Measure the Output Good signal at pin 3 of each power supply connector The signal should read a minimum of 4 5 volts 3 If a power supply is found to be defective remove and replace it using the appropriate instructions outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 of Chapter 8 Repair 4 If a defective power supply can not be identified check the connections at the power supply terminals or backplane Troubleshooting 9 27 Tester Communication Problem Troubleshooting Operation of the J750E tester relies on constant communication with the test system computer Communication problems can generally be traced to
272. m the Notepad File pulldown menu The data log is saved to the file created in step 4 7 Close Notepad 8 Close the J750 Maintenance Interface 9 Proceed to section Copy Calibration and Configuration Files on page 8 5 Copy Calibration and Configuration Files Note These instructions assume all software has been installed in the default directory locations Perform the following steps to copy the tester calibration and configuration files 1 Click Start on the Windows Taskbar 2 Select Programs then click Windows NT Explorer or Explorer in the program list as applicable Windows Explorer is launched and displayed on the screen 3 Expand the My Computer icon by clicking the symbol to the left of the computer icon The symbol changes to a symbol and the navigation tree expands to show the contents of the computer 4 Expand the C drive icon by clicking the symbol The navigation tree expands to show the contents of the C drive 5 Expand the Program Files folder by clicking the symbol The navigation tree expands to show the contents of the Program Files folder 6 Expand the Teradyne folder by clicking the symbol The navigation tree expands to show the contents of the Teradyne folder 7 Expand the IG XL folder by clicking the symbol The navigation tree expands to show the contents of the IG XL folder 8 Expand the Vx xx xx folder by clicking the symbol if applicable The nav
273. mmed I O operations are targeted directly at one of the TCIO serial buses Only one Programmed I O may occur at a time There are three timers on the PCI board The two re triggerable timers and one free running timer begin decrementing when a value is loaded via the internal bus from the LBI They run on a 2usec clock and can time intervals between 2usec and 36 minutes The current value can be read back at any time The low value timer register is latched when the high register is read The free running timer is a 48 bit counter that can be written or read via the internal bus It runs on a 200nsec clock that increments every 200nsec for up to 15 days It rolls over when it reaches full count and continues counting System initialization is accomplished via the PCI board This keeps all distributed TCIO clocks in phase and sync The initialization sequence is as follows 1 The PCI interface disables the clock on the CAL CUB 2 The clear lines to all the TCIO buses are enabled 3 The clear lines are disabled 4 The clock on the CAL CUB is enabled by the PCI Interface 5 4 J750E 512 Pin Test System Service Reference Manual The Power Cycle Detection signal sets a status bit read by the LBI when 3 3 volts is removed The voltage is sensed on the CAL CUB and provided to the PCI board as the signal Power OK If the tester power is off this signal is checked on the PCI and forces the software to issue an initialize tester command This bit i
274. module Signals 24V DPS or 24V DPS R are for DPS expansion board use only CAUTION SPARE 2 might have 34V on it in older systems TCIO signals in grey colored cells are present only in slots 0 1 2 3 These are for DPS expansion board use only oR WP F 000999 Figure 11 11 Lower backplane connector AG027 Channel Board Slots 1 3 5 7 9 11 13 15 11 12 J750E 512 Pin Test System Service Reference Manual Manual Comment Form We appreciate your feedback Your comments are a valuable source of information for continuous improvement in our documentation effort Please return this form together with a copy of the pages of concern from the manual marked with your comments to the address at the end of this form Manual Name Document number Revision number and date Sender Name Company Job title Address 1 Briefly in the space below how would you describe this manual 2 How do you use this manual ily __ read it from beginning to end only read the sections that pertain to my immediate needs only read the sections that pertain to my job use this manual for training purposes __ use this manual for reference purposes 3 When you need to find information in this manual where is the first place that you look __ Table of Contents Thumb through the pages until find what am looking for 4 How easily can you find info
275. mps 380 VAC 8 85 amps 13 51 amps 400 VAC 8 40 amps 12 84 amps 416 VAC 8 08 amps 12 34 amps 480 VAC 7 00 amps 10 70 amps Max Power Consumption 5 97 KVA 9 19 KVA Table 7 7 Inputline current per phase by channel count The maximum inrush current can be as high as 550 amps for a period of 1 2 cycle This current will taper off to zero over approximately 4 cycles DC Power Supply Verification Note If circuit boards are added or removed from the tester the 3 3 volt power supply should be checked and adjusted as required This section provides information to verify the specifications on the DC power supplies installed in the J750E The Calibration Clock Utility Board CAL CUB has an Analog to Digital converter ADC to take and make measurements on the 3 3 5 10 5 and 24 volt power supplies and on the 24 ground line These measurements are used to monitor the system power supplies but not at the same accuracy as an external DVM It is recommended that system level power supplies be verified to be within specification limits both DC output and AC ripple using external equipment Measuring Power Supply Output Voltage The DC output voltage for each power supply should be measured at the sense lines of the power supply connector unless otherwise noted The following items are required to measure the power supply DC output e Digital Volt Meter minimum 3 S digits Perform the following steps to measure the DC ou
276. n This button starts the AC Performance Verification program The test is used to compare edge placement between different channels The AC Performance button is only available from the Performance Verification tab of the interface 4 30 J750E 512 Pin Test System Service Reference Manual Running Maintenance Programs All of the maintenance programs are run from the common Maintenance User Interface that is included as part of the tester software Figure 4 6 shows the interface Maintenance programs are usually run as part of scheduled maintenance as outlined in Figure 7 3 of Chapter 4 Maintenance Software or because the system is suspect This section of the manual provides instructions for running all of the J750 maintenance programs Note These instructions were written for running J750 Maintenance Program version 7 23 10 or greater Instructions for running other versions may vary Programs can be run in any combination or sequence as deemed appropriate for any particular situation Please consider the following when trying to determine what sequence is best for your particular situation e Quick Check and Module Check require a valid calibration unless the calibration file is reset before they are run e Internal Calibration requires a valid External Calibration Note Unless otherwise specified it is recommended that you run one pass of Quick Check Module Check Internal Calibration and Internal Performance
277. n Previous Figure 6 6 shows the location of the supply and the voltage adjustment potentiometer 7 24 J750E 512 Pin Test System Service Reference Manual Adjusting the J750E Tester 24 Volt Utility Power Supplies Perform the following steps to adjust the 24 volt Utility power supplies in the J750E tester 1 Turn the voltage adjustment potentiometer on the 24 volt Utility Slave power supply fully counterclockwise Previous Figure 6 6 shows the location of the supply and the voltage adjustment potentiometer 2 While measuring the voltage at the sense lines on the 24 volt Utility Master power supply as outlined in section Measuring Power Supply Output Voltage on page 7 22 adjust the voltage adjustment potentiometer on the Master supply until the voltage is within specification Previous Figure 6 6 shows the location of the supply and the voltage adjustment potentiometer Measuring Power Supply AC Ripple The section provides information and procedures to measure the AC ripple specifications of the power supplies Use of a digital scope to make analog measurements is not recommended and will result in incorrect measurements The procedure outlined in this section has been developed to find power supplies where ripple has increased over time It is recommended that you record all power supply measurements for future reference The following items are required to measure the power supply AC ripple e Tektronix 485 oscilloscope or equivalent
278. n e High Accuracy Source and Digitizer per pin e 4 high voltage HV drive pins e 8 Utility Bits with true readback e Relay drivers e 4 temperature sensors per board e 4 Meg pattern depth per pin 8 Meg or 16 Meg software enabled e 500ps edge placement accuracy 325ps optional software enabled e High Voltage option for 4 out of the 64 channels e Single BPMU 4 quadrant source e Memory Test Option MTO e Mixed Signal Option MSO Digital Signal Input Output DSIO The channel board contains 64 channels divided into 8 groups of 8 channels The channels connect to the Device Interface Board DIB through relay boards Each channel contains 4 Meg by 6 bits of data timing generators pin electronics and a parametric measurement unit The channels get their address timing information and control over the State Bus from the Pattern Generator Each channel can also receive data over the Alternate Data Bus ADB from the auxiliary generator located on the MTO Information on the state bus determines whether each channel receives its data from vector memory or the Alternate Data Bus An 8 Meg or 16 Meg per pin pattern depth can be software enabled but if mixed depth channel boards are installed in a test system the pattern depth for the entire system will be set based on the channel board with the lowest value Pattern Generator The Pattern Generator provides the control signals to drive the Auxiliary Timing Generators ATGs There i
279. n off the AC power in the tester This sequencing occurs in a chronological order starting from the 34 volt power supply in the J750E tester and ending with the 3 3 volt supply Note If either the 5 volt 5 volt or the 3 3 volt power supply fails or if any supply before the stated 5 volt or 3 3 volt power supplies fail the CAL CUB will turn off the tester The tester can not be restarted until the problem is resolved The sequencing is done using the signals that are present on the 6 pin Molex connector on each supply The signals and pin numbers of the connector are listed in Table 9 2 9 22 J750E 512 Pin Test System Service Reference Manual Table 9 2 Power Supply 6 pin Molex Sense Connector Functions Pin Function 1 Sense Margin Remote Voltage Adjust Output Voltage Good Sense 8 Logic Ground Current Shared Control Oo a AJ OJN Inhibit Power supply sequencing for the J750E tester works as follows Starting from the 34 volt supply the Output Voltage Good signal pin 3 is connected to the Inhibit signal pin 6 of the 24 volt DPS supply Likewise the 24 volt DPS supply is connected to the 24 volt Utility supplies The 24 volt Utility Master is connected to the 15 volt supply which is connected to the 10 5 volt supplies The 10 5 volt Master supply is connected to the 208 AC input of the 15 10 36 34 volt supply which is connected to the 208 AC input of the 5 10 5 volt
280. n on a single board for troubleshooting purposes but you cannot run a single board during AC calibration To ensure a valid calibration all boards must be calibrated at the same time Performance Verification Internal Performance Verification checks the hardware against the design specifications Calibration must be run or a current calibration file CalibrationData txt must be present in the C Program Files Teradyne IlG XL Vx xx xx tester folder of the test system computer before running Performance Verification Note Vx xx xx refers to any version of IG XL installed on the test system computer External Calibration Allows the user to calibrate the voltage ranges current ranges and metering reference circuitry on the CAL CUB CTO LMF and APMU voltage references to a known standard to provide traceability External Performance Verification Allows the user to check all points between the calibrated ranges on the CAL CUB reference circuitry using an Agilent HP 3458A multimeter as well as the 100MHz oscillator which is derived from a 200MHz master clock reference crystal on the CAL CUB using an Agilent HP 53181A frequency counter The accuracy of the CTOs can also be verified using the Agilent HP 3458A while the LMFs can be verified using the Fluke 5790A AC Measurement Standard ContactCheck A graphical based ContactCheck tool has been incorporated into the J750 Maintenance Software starting with version V7 23 00 The tool u
281. n removal Note If the circuit board rubs against a board installed in an adjacent slot as you attempt to remove it remove the adjacent board first Failure to remove the adjacent board first may result in damage to the circuit board upon removal Figure 8 1 shows the general location of the boards in the tester Repair 8 11 Power Supply Slot 7 Channel Board Channels 448 511 or Optional Instrument Slot5 Channel Board Channels 320 383 or Optional Instrument Slot 3 Channel Board Channels 192 255 or Optional Instrument Slot 1 Channel Board Channels 064 127 or Optional Instrument Slot 20 CTO Channels 24 31 Slot 24 DPS Channels 24 31 Slot 19 CTO Channels 08 15 Slot 18 CAL CUB Slot 17 CTO Channels 00 07 Slot 16 CTO Channels16 23 Slot 21 DPS Channels 16 23 Slot 0 Channel Board Channels 000 063 or Optional Instrument Slot 2 Channel Board Channels 128 191 or Optional Instrument Slot 4 Channel Board Channels 256 319 or Optional Instrument Slot6 Channel Board Channels 384 447 or Optional Instrument Slot 23 DPS Channels 08 15 Slot 22 DPS Channels 00 07 Power Supply Air Flow F 000067A Figure 8 1 Circuit board slot assignments Table 8 1 shows the acceptable slot locations for the test system s optional instruments Table 8 1 Testsystem optional instrument slot locations Maximum Numb
282. n the connector terminals of the 10 5 volt power supply a few turns using the no 2 Phillips screwdriver then remove the four 4 terminal lugs from the connector 9 Remove the remaining 10 32 hex nut 10 split lock washer and 10 flat washer from the positive terminal of the 5 volt power supply terminal using the socket wrench and 3 8 socket then remove the terminal lug from the supply 10 Remove the two 2 10 32 hex nuts 10 split lock washers and 10 flat washers from the terminals of each of the 24 volt Utility power supplies using the socket wrench and 3 8 socket then remove the terminal lugs from the supply 11 Remove the four 4 8 32 x S long Phillips head screws with external star washer securing the power supplies to the card cage using the no 2 Phillips screwdriver 12 Grasp the two 2 handles on the power supplies then lift the power supplies out of the tester Place the supplies in a safe storage location until it is time to reinstall them into the tester 8 24 J750E 512 Pin Test System Service Reference Manual Removing the 405 325 00 24 volt DPS and 3 3 volt and 405 925 00 15 volt 10 volt 36 volt and 34 volt Power Supplies Perform the following steps to remove the power supplies from the tester Previous Figure 8 4 shows the location of the power supplies in the tester Always wear a tested grounding strap while working on the J750E tester Note Protect against the possibility of dropping h
283. n the left half of the backplane and the other TCIO bus is sent down the right half of the backplane Each side of the backplane connects one TCIO bus to two DPS board slots and two channel board or utility board slots The reason for splitting the upper backplane in half is the same as the lower backplane to minimize drive and signal trace length In all there are twelve TCIO signals traveling over the cable from the lower backplane to the upper backplane 5 14 J750E 512 Pin Test System Service Reference Manual Device Power Supply DPS The Device Power Supply DPS is a single quadrant power supply with 8 channels on each board lts features include e Upto 1 amp of current from O to 10 volts e Programmable current limit e 5 current measurement ranges e Voltage measurement from 0 to 6 volts e Force and Ground Kelvin to DIB e Kelvin safety Kelvin test voltage e Supplies can be used in parallel configurations e Driven guard e Contain multiplexed Analog to Digital converter ADC Basic Design The basic DPS is made up of a control amplifier and a transconductance Gm stage A Gm stage is a voltage controlled current source voltage in current out This allows the current of the output delivered to the load to be measured since the sense resistor is in series with the output Measuring Current Current is measured with a set of user selectable sense resistors and differential amplifiers The highest range has a dedicat
284. n the replacement board as outlined in section Running Calibration on page 4 47 and confirm it passes 6 Run AC Calibration on the entire system as follows Click the Calibration Tab on the Maintenance Interface Click the AC Calibration button on the Maintenance Interface Click Start AC Calibration starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run 7 The board that is being tested is displayed in the Hardware Selection Deselection area of the dialog box changes color as follows Blue Board is presently being tested Green Board has passed test for looping test this indicated that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the Calibration Tab displays the date and time of the last test as well as the overall test results pass or fail 4 48 J750E 512 Pin Test System Service Reference Manual 8 Run Performance Verification on the replacement board as outlined in section Running Performance Verification on page 4 53 and confirm it passes 9 Rerun Quick Check and Module Check as outlined in section Running Quick Check on page 4 44 and section Running Module Check on page 4 45 and confirm they pass Note Single Board Calibration should only be used for troubleshooting purposes and can not be used
285. nched and a warning dialog box is displayed on the screen questioning if you want to create the new file Click Yes 4 Proceed to the appropriate section of this chapter for the particular maintenance program you want to run Running External Calibration Note Prior to running External Calibration ensure that the tester has had power applied for a minimum of S hour and that one full loop of Quick Check and Module Check have been run Note External Calibration does not log temperature and date performed Itis a good practice to make note of these items at the top of the log file created as outlined in section Launching the Maintenance Interface on page 4 33 It is also good practice to list things like Engineer Technician name ambient system temperature as well as any other system specific information that might be useful for troubleshooting purposes Note It is strongly recommended that the External Calibration file CALCUBCAL txt be copied to a separate location for future use once External Calibration has been run The original file will be deleted if External Calibration is re run or if IG XL Maintenance Software is reloaded The following equipment is required to run External Calibration e Agilent HP 3458A multimeter must be calibrated to traceable standard e GPIB cable 2 3 or 4 meter length as required e BNC to test clips Teradyne Part Number 358 746 48 e BNC to dual banana connector Teradyne P
286. nd from the Cal DIB then place the DIB into a proper storage container to pre vent ESD and physical damage Running Module Check The following equipment is required to run Module Check e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate 4 44 J750E 512 Pin Test System Service Reference Manual Run Module Check as follows Always wear a tested grounding strap while working on the J750E tester Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded Note If Calibration has not just been run you must rename or reset the calibration file CalibrationData txt prior to running Module Check 1 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 2 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester Click the ModuleCheck tab in the maintenance interface 7 Select o
287. ned system downtime Maintenance outlined in Table 7 1 and Table 7 3 provides guidelines or a starting point for the development of a user defined maintenance program for the J750E tester Additionally Maintenance Checklists based on these guidelines are provided in Table 7 2 and Table 7 4 The user defined schedule should start with the schedules outlined in the tables These schedules should then be adjusted based on actual system use and operating environment A 24 hour per day 7 day per week operating environment usually requires more frequent maintenance while a system with light usage may allow some maintenance times to be extended Procedures for performing routine maintenance on the J750E tester can be found in section Routine Maintenance Procedures on page 7 13 Prior to performing any maintenance on the J750E Test System familiarize yourself with the information outlined in Chapter 2 Safety Information The instructions outlined in Chapter 7 Maintenance should be followed whenever maintenance procedures are being performed All hazardous materials used in any maintenance activity should be handled and disposed of as outlined in Chapter 7 Maintenance Table 7 1 J750E Maintenance Schedule Frequency Time Required Notes Power Supply Checks Power Supplies Quarterly By Customer 15 minutes System Checks Air Filter cleaning or replacement Quarterly By Customer 15 minutes Fan inspection and clean
288. ng run Blue Board is presently being tested Green Board has passed test for looping test this indicated that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the AC portion is complete the Test Program Output window displays the overall test results pass or fail 34 Proceed to section Running External LMF Field Performance Verification on page 4 68 Running External LMF Field Performance Verification 4 66 J750E 512 Pin Test System Service Reference Manual Always wear a tested grounding strap while working on the J750E tester Note External LMF Calibration should be run prior to running External LMF Field Performance Verification Note These instructions assume that the J750 Maintenance Interface has been launched the J750Maint xls job has been loaded and that External LMF Calibration has just been run on the tester Note Teradyne IG XL V3 40 09 and J750 Maintenance Software V7 23 10 must be installed on the test system computer prior to running External LMF Field Performance Verification Run External LMF Field Performance Verification Calibration as follows Note The following instructions were written for running External LMF Field Performance Verification using J750 Maintenance Software V7 23 10 Instructions for using a different version of the J750 Maintenance Software may vary 1 Click t
289. ng for Loose Pogo Blocks on page 9 11 4 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair 5 Remove the airflow control boards from the tester as outlined in section Pogo Block O ring Inspection and Cleaning on page 7 17 Chapter 7 Maintenance and inspect them for damage 6 Ensure that the o rings are not stuck to the mating surface of the DIB fixture 7 Replace the airflow control board as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair 9 18 J750E 512 Pin Test System Service Reference Manual Power Problem Troubleshooting The Calibration Clock Utility Board CAL CUB revision 06 or later can shut off the AC power of the J750E tester in the event of one of the following failures e System fan failures e System power supply failures e IG XL not able to read Channel Board Prom Register This section provides information and procedures for troubleshooting these power problems in the J750E tester System Fan Failure All eight 8 fans in the J750E tester Fan Plate Assembly and Power Supply Jackets are monitored by the CAL CUB If any fan slow stops or malfunctions the ALLFANOK signal generated by the CAL CUB starts a 2 minute timer If after approximately 2 minutes the fan monitor still shows a problem the Cal CUB generates the SYSPWROFF signal to open a relay on the CAL CUB that controls 24 VAC to the main contactor and shut off t
290. ng it from the DIB fixture on the tester 12 Place the DIB vacuum switch on the tester to the UNLOCK off position 13 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 14 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage Running Calibration The J750 Maintenance Software allows the following Calibration programs to be run from the standard Maintenance User Interface e Single Board Calibration e AC Calibration e AC DC Calibration The following equipment is required to run the various Calibration programs e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 or J750 512 APMU Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 02 as appropriate Single Board Calibration Run Single Board Calibration as follows Always wear a tested grounding strap while working on the J750E tester 4 46 J750E 512 Pin Test System Service Reference Manual Note Do not run Calibration on a tester that is not in known working condition Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded Note IG XL V3 30 03 and Maintenance Software V7 02 02 or greater are both required to run Single Board Calibration Refer to Product Support Bulletin Number PSB20003701 for a detailed explanati
291. njury CAUTION Potential Hazard Indicates possible damage to equipment or test system NOTE Indicates additional information such as recommendations or tips Regulatory Defined Terms AC Mains Is a universal generic term used to describe the AC input service of an appliance connected to a facility s AC service outlet or fused disconnect AC mains also describes all the parts of an appliance s AC input which can have the input voltage applied to them AC mains parts include e AC plugs e AC cords e AC circuit breakers switches and fuses used to disconnect and protect the AC main s path e Other components which are connected to the AC service input such as RFI filters surge suppressors and isolation transformer primaries Note Certain terms used in this manual are specifically defined by regulatory and standards agencies 2 8 J750E 512 Pin Test System Service Reference Manual Lockout Tagout OSHA requirements for electrical machinery require that for installation maintenance and service there be a means and instructions provided for a power lockout tagout ability where the main power to the machine can be de energized and secured in that mode until the installation maintenance or service can be completed OSHA 29 cfr 1910 331 335 requires that installation and service personnel be protected from electrical hazards by means of a lockout tagout provision The following lockout tagout fe
292. ns Torque Specifications The AC and DC power connections of the tester have specifically defined torque requirements These requirements are critical for proper system operation and safety Most of the connections use a general torque requirement Table 2 4 lists the general torque specifications Satety Information 2 31 Table 2 4 AC and DC power connection torque specifications SE Steel Brass Aluminum cm kg in lb cm kg in lb cm kg in lb 1 56 2 6 2 25 2 0 1 8 2 6 2 25 4 40 75 6 5 4 5 3 9 7 5 6 5 6 32 13 8 12 0 8 3 7 2 13 8 12 0 8 32 21 9 19 0 17 25 15 0 21 9 19 0 10 32 32 2 28 0 275 23 8 32 2 28 0 20 1 4 74 7 65 0 67 0 58 0 74 7 65 0 18 5 16 148 0 129 0 124 0 108 0 148 0 129 0 16 3 8 243 8 212 0 221 0 192 0 243 8 212 0 13 1 2 534 7 465 0 460 0 400 0 534 7 465 0 Note Some applications may require different torque specifications The specific torque requirements for these applications will be identified as required Heavy Weight Removal Instructions Removable assemblies exceeding 45 pounds 20 7 kilograms require special handling It is highly recommended that any tasks associated with these assemblies generally be performed by at least two 2 people Fan Plate Assembly Disconnect the power cable before attempting to remove the fan plate assembly AC Power Vault Transformer The Power Vault AC transformer weighs approximately 600 pound
293. ns require lubrication or cleaning The four 4 fans in the fan plate assembly can be inspected by removing the assembly from the tester Refer to section Removing Fan Plate Assembly on page 8 19 of Chapter 8 Repair for instructions on removing the fan plate assembly Visually examine all four 4 fans for rotation and replace any fans that are suspect Refer to section Fan Plate Assembly Removal and Replacement on page 8 18 of Chapter 8 Repair for instructions on replacing the fans The two 2 fans in each of the power supply jackets can be inspected by removal of the card cage assembly Refer to section Card Cage Assembly Removal and Replacement on page 8 31 of Chapter 8 Repair for instructions on removing the card cage to access the fans Visually examine the fans for rotation and replace any that are suspect Refer to section Power Supply Jacket Fan Replacement on page 8 43of Chapter 8 Repair for instructions on replacing the fans The fans at the rear of each power supply module are part of the individual power supply modules and are not field replaceable AC Power Checks The J750E tester is designed to operate over the stated range of input voltages provided the AC Power Vault is connected to a clean AC source with a high quality ground line If past experience has shown that the area or facility where the system will be installed is susceptible to AC line fluctuations line noise power interruptions or lightning strikes
294. nstruction is complete a synchronization indication is provided by the DSP For captured signals the DSP engine receives an indication when a complete waveform segment has been captured The DSP then analyzes the signal according to previously downloaded instructions and possibly activates a fail indication if appropriate The DSP also may issue a synchronization indication in the event that portions of the test program are waiting for an analysis result 5 30 J750E 512 Pin Test System Service Reference Manual Each source capture has 4M x 48 bits 24MByte of memory Relay Board Description e Provides loopback capability to connect source to capture e Provides connection of Capture In to PPMU Capture Channel or Measure Bus e Provides connection of Source to PPMU Source Bus or VCM Bus e Provides connection of sources for internal or external calibration Figure 5 14 shows a block diagram of the ASIO Figure 5 15 shows a block diagram of the ASIO relay board Figure 5 16 shows a block diagram of the DSIO Hardware Description 5 31
295. nter address as follows Press and hold the Recall Utility Menu key then press the Power key Press the Recall key to access IEEE Bus Address selection Use the f Y keys to change the address as required Once the address has been set to 5 press the Enter key to save the address Press the Power key to complete the address set up and turn off the counter 4 Connect the SMA end of the SMA Male to BNC Male cable to the SMA end of the SMA Probe to SMT Receptacle Converter 5 Connect the BNC connector of the SMA Male to BNC Male cable to the connector on the front of the Agilent HP 53181A frequency counter as shown in Figure 4 11 6 Connect the SMT connector of the SMA Probe to SMT Receptacle Converter to the Calibration DIB as shown in Figure 4 11 and click OK The clock frequency displays on the meter Note Adjustments to the frequency clock cannot be made 7 When all testing is complete the results display in the Test Program Output window 8 Disconnect the cables from the frequency counter and the Calibration DIB 9 Disconnect the GPIB cable from the frequency counter and the multimeter 10 Power down the frequency counter then disconnect it from the power source 11 If CTOs are present in the tester it is recommended that you proceed to section Running External CTO Performance Verification on page 4 58 12 If CTOs are not present in the tester proceed to the appropriate section of this chapter for the
296. nverted by the AC Power Vault to the 3 phase power required by the J750E The AC Power Vault connects to the Input Power Module in the J750E test head The Input Power Module distributes AC power to the DC power supplies The AC power distribution is described in the following sections e AC Power Vault e Input Power Module AC Power Vault The AC Power Vault is the primary control for AC distribution to the J750E Test System The Power Vault contains a 3 phase step down isolation transformer and a step down low voltage transformer The power vault can be configured for two different voltage ranges One operates from 190 to 240 volts AC the other from 380 to 480 volts AC Kits are available to convert between the two ranges The basic power vault is designed to power a single J750E tester An additional AC Power Module can be added to the vault so that it can power two 2 testers Actual power capabilities depend on the configuration or the power consumed by each J750E but can not exceed the 15 5KVA available from the vault The isolation transformer inside the vault converts the facility power Delta or Wye to 208 3 phase Wye and neutral It can be tapped to accommodate different input voltages and provide a secondary voltage of 208 volts AC phase to phase The output of the isolation transformer is controlled by a three pole contactor that is energized by the Power On Switch S3 located on the front of the vault Table 6 1 shows the isolation tr
297. o pins e 512 Clear DIB Field Kit Teradyne Part Number 235 721 00 e 512 Clear DIB Vacuum Alignment Gauge Teradyne Part Number 235 711 00 e Magnifying Light Teradyne Part Number 234 714 00 Perform the following steps to check the alignment of the pogo pins Always wear a tested grounding strap while working on the J750E tester 1 Prepare the tester as outlined in section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Place the 512 Clear DIB Vacuum Alignment Gauge onto the DIB fixture of the tester Place the DIB vacuum switch on the tester to the LOCK on position 5 Press down on the Clear DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks aN Note Ensure that proper vacuum is being applied to the DIB vacuum can be confirmed to be greater than 20 inches of mercury at the vacuum gauges mounted outside the tester or the vacuum pumps inside the tester 6 Using the magnifying light check to see that the pogo pins are inside the circles on the Clear DIB Pins that are touching the edges of the circle are considered to be in alignment Figure 9 1 shows a pin that is in alignment and a pin that is out of alignment 9 2 J750E 512 Pin Test System Service Reference Manual d y Pogo Pin in Pogo Pin ou
298. o provide a reasonable confidence level that the system is working It is not required for the tester to be calibrated prior to running Quick Check Quick Check can be run with or without a Calibration Device Interface Board Cal DIB installed To perform a thorough Quick Check which also tests the relay boards it is recommended that the test be run with a Cal DIB installed Certain tester options such as the Memory Test Option MTO are tested entirely in Quick Check Module Check Module Check performs a thorough test of the tester hardware and verifies that each circuit in the tester is functioning properly The Cal DIB must be installed to run Module Check completely The tester must pass External Calibration and External Performance Verification prior to running Module Check Continuity Check Introduced as part of the J750 Maintenance Software and starting with version 7 23 00 a systemwide continuity check can also be performed when running Module Check The Continuity Check tests the continuity and communication paths between the CAL CUB Cal DIB and the pin electronics drivers for proper pogo pin relay contact resistance and leakage Continuity Check is run by deselecting all boards and selecting Systemwide Tests under Module Check The Cal DIB must be installed to run Continuity Check completely It is not required for the tester to be calibrated prior to running Continuity Check 4 2 J750E 512 Pin Test System
299. o section Reinstalling Power Supply Jacket Fans on page 8 44 as appropriate Reinstalling Power Supply Jacket Fans Perform the following steps to reinstall the power supply jacket fan Always wear a tested grounding strap while working on the J750E tester Note Be sure to install the new fan in the same orientation as the fan that was removed 8 44 J750E 512 Pin Test System Service Reference Manual 1 Place the new fan into the appropriate location in the power supply jacket and secure using the four 4 6 32 x 5 8 long Phillips head screws and 6 flat washers Tighten the screws to 7 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 2 Connect the fan cable connector to the mating connector on the fan connector bracket 3 Replace the deflectors and secure using two 2 4 40 external tooth locknuts and 4 flat washers for each deflector Tighten the locknuts to 4 inch pounds using the adjustable torque wrench and j socket 4 Reinstall the power supply jacket into the card cage and secure using the six 6 8 32 x 5 16 long shoulder screws and 8 flat washers Tighten the screws to 15 inch pounds using the adjustable torque wrench and 3 32 hex wrench bit 5 Reinstall the card cage into the tester as outlined in section Card Cage Assembly Removal and Replacement on page 8 31 6 Replace the power supplies into the tester as outlined in section J750E Tester Power Supply Assembly R
300. oard Carefully and slowly slide the board out of the card cage slot until it is approximately half way out Let the board rest on the bottom rail of the card cage to help stabilize it while you reposition your hands While keeping one hand on the board at all times slide your hands to the middle of the board Keep the board straight and do not allow it to tip until the relay boards have been fully removed from the tester Carefully and slowly slide the board the rest of the way out of the card cage Place the board onto a proper anti static work surface with the component side facing up 9 If applicable place connector covers onto the connectors of the board then place the board into a proper storage container to prevent ESD and physical damage 10 Identify the container with the board information that is listed in the configuration file 11 Repeat steps 6 10 for each board in the tester that needs to be removed 12 Proceed to section Reinstalling Circuit Boards on page 8 14 as appropriate Repair 8 13 Reinstalling Circuit Boards Perform the following steps to reinstall the boards into the tester When replacing circuit boards after replacing the card cage or a power supply be sure to check all voltages at the card cage backplane and power supply sense lines before re installing any board back into the tester When installing any board into the tester ensure the board is inserted straight into
301. ocess External Calibration Internal Calibration Verification 750 hardware calor o a RI ences by External Equipment y 9 hardware pass F 000888 Figure 1 6 J750E calibration process flow Traceability Traceability of the J750E hardware is achieved by using external equipment that is calibrated and traceable to a National Standard During the final test process at the factory the J750E is calibrated using external equipment Documents shipped with the system record the meters used during the factory process It is the responsibility of the user to provide the equipment with the required traceability records to maintain this path Figure 1 7 shows the traceability path back to a National Standard National Calibration External Standard lt Lab md Equipment CAL CUB zz J750 Hardware F 000889 Figure 1 7 Traceability path The equipment used for calibration must be recorded See Calibration Certificate Examples on page 11 for examples of Calibration Certificates used to record the calibration of the different instruments 1 10 J750E 512 Pin Test System Service Reference Manual Calibration Certificate Examples Certificate of Calibration Cal CUB Part Number 239 020 06 Cal CUB Serial Number Customer Name Teradyne certifies that the Calibration Clock Utility Board Cal CUB listed above has been calibrated using the
302. ocker Low Strength 20f5 2 22 J750E 512 Pin Test System Service Reference Manual Loctite 222 Continued Skin protection Use mpermeable gloves and protective clothing as necessary to prevent skin contact Neoprene gloves Butyl rubber gloves Natural rubber gloves Eyelface protection Safety goggles or safety glasses with side shields See Section 2 for exposure limits 9 PHYSICAL AND CHEMICAL PROPERTIES Physical state Liquid Color Purple Odor Mild Vapor pressure Less than 5 mm Hg at 27 C 80 F pH Not applicable Boiling point range Greater than 149 C 300 F Melting point range Not available Specific gravity 1 08 at 20 C 68 F Vapor density Not available Evaporation rate Not available Solubility in water Slight Partition coefficient n octanoliwater Not available VOC content 0 6653 6 53 grams liter Stability Stable Hazardous polymerization Will not occur Hazardous decomposition products Odes of carbon Oxudes of sulfur Oxides of nitrogen Imitating organic vapors Incompatability Strong oxidizers Conditions to avoid See Handling and Storage Section 7 and incompatabilty Section 10 Product toxicity data Acute oral LD50 greater than 10 000 mg kg rat Acute dermal LD50 greater than 5000 mg kg rabbit SE EAS SES Eed p004 96 0 a B2909 20 8 pacchann B1 07 2 Propylene glyco 67 55 60 umene hydroperoxid B0 15 9 Literature Referenced Target Organ Ot
303. ode for Finland For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Finland International charges will apply France 800 837 23963 for toll free access where is the international dial access code for France For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for France International charges will apply Germany 800 837 23963 for toll free access where is the international dial access code for Germany For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Germany International charges will apply Great Britain 800 837 23963 for toll free access where is the international dial access code for Great Britain For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Great Britain International charges will apply Greece For toll free AT amp T Direct Access dial 00 800 1311 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Greece International charges will apply Replacement Parts 10 5 Table 10 1 Telephone numbers for GCS centers Sheet 3 of 6 Country Telephone Hong Kong Hungary 800 930 890 phone or 800 8
304. ods and times Max 8K samples pin Figure 5 21 shows a block diagram of the voltmeter Ch 1 Site 0 Voltage Differential Translator Ch 16 Buffer O o gt 5 Site 1 Ch 17 Voltage Differential Ch 18 Translator a Ch 32 F 000959 Figure 5 21 APMU Differential Voltmeter block diagram Gang Mode Gang mode allows the APMUs to be set up in parallel to provide more current than what can be delivered by a single channel Hardware Description 5 39 Force Voltage FV Gang Mode In Force Voltage FV Gang Mode an APMU is set to become the master to force a voltage and the ganged APMUs are set to become slaves to force additional current at the programmed voltage level Figure 5 22 shows a schematic diagram of the Force Voltage Gang Mode Prog V DAC gt AWN TA gt N A P A NVV Master 4 To AM Te MW Ammeter gt To N V To ANN Ammeter Prog 0 DAC ANN l NA PA AM Slave 4 Te WI Te MW Ammeter Prog 0 Er lt DAC AVV l Slave P A NW 4 e NW To ANAM Ammeter F 000859 Figure 5 22 Force Voltage Gang Mode schematic diagram Force Current Fl Gang Mode In the Force Current Fl Gang Mode all APMUs are set to the Fl mode If four 4 APMUs are ganged the current forced by each APMU will be 1 4 of the
305. ogic option board in the power supply to provide logic levels that are ground referenced AC DC Power and Cooling 6 21 The logic option board is required when we use a supply as a negative supply as in the 405 920 00 5V and include it in the power supply sequence The sense ground and logic ground are connected together in the supplies Using the supply as a negative supply ties the plus side to ground instead of the minus to ground The output good signal is not at the correct voltage level needed to enable disable the inhibit of the next supply in the sequence The logic option board isolates the negative supply so that the inhibit and output good signals are at the same logic levels as the positive power supplies The Logic Option Board outputs are tied to system ground and not the ground of that particular supply The logic option board output good signals and inhibit now follow the same rules as the output good signal in each of the module in the positive power supplies Power Supply Sequencing Inhibit Line Filter The sequencing cable for the Voltage Good Inhibit can pick up radiated 250 KHz power supply switching noise A 1uF capacitor between Inhibit line and ground reduces this noise The 1uF capacitor filters 250 KHz power supply noise that could cause a false trigger of the Inhibit line The negative supplies have ground on pin 10 so the capacitors are between the inhibit line and pin 10 There are two variations in the 12
306. olding the block in the pulled up position tighten the screws Note Do not allow the block to slip back down while tightening the screws Note There will not be an obvious difference in the block once the block is extended 9 Repeat step 6 through step 8 for the other pogo block on the board 10 Repeat step 4 through step 9 for any other boards that need the pogo blocks extended 11 Replace the board s as outlined in section Reinstalling Circuit Boards on page 8 14 of Chapter 8 Repair Checking the Seating of the DIB Fixture Assembly This section provides information for checking the seating of the DIB fixture assembly The following tools are required to check the seating of the DIB fixture in the tester e Large slotted screwdriver 5 16 e 0 006 feeler gauge Perform the following steps to check the DIB fixture Always wear a tested grounding strap while working on the J750E tester Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Open the tester as outlined in section Opening the DIB Mounting Side of the Tester on page 8 8 of Chapter 8 Repair 4 Visually inspect the DIB fixture to ensure that there are no gaps where the four mounting feet of
307. on pogo assemblies and circuit boards used to perform tests on the Device Under Test DUT It is the main interface between the DUT and the test application running on the test system personal computer e Figure 1 2 shows the main external components of the tester e Figure 1 3 shows the main internal components of the tester System Overview 1 3 Emergency Power Off Switch Air Intake Vacuum Pulldown Vacuum Activation Filter Assembly Switch Power On Switch gt PA Fan Plate Kinematic Docking Assembly Pendant Connector Front View Rear View F 000133 Note J750E Tester shown The Emergency Power Off switch is a safety feature The switch design is larger in size than the Power Off switch which makes it easier for an operator to locate and press whenever power to the system needs to be removed in an emergency Activating the switch by pressing the round black button will instantly disable all AC power to the tester power supplies by opening the contactor inside the input power module A voltage of 208 Vac will still be present in the input power module and 24 Vac will be present at the Power On Off switch at the front of the tester and J3 connector of the CAL CUB PCB Figure 1 2 Tester front and rear views 1 4 J750E 512 Pin Test System Service Reference Manual Rear of Tester Fan Plate Assembly End Channel Channel Boards or Full DPS Boards or Full Size
308. on of Single Board Calibration The following section is an excerpt from PSB20003701 To take full advantage of Single Board Calibration the following is recommended e Ensure that there is a stable operating environment for the system Do not use Single Board Calibration if the temperature has shifted more than 3 C from the temperature recorded at the last calibration During operation of the tester IG XL looks at each channel board to determine if the temperature of the board has changed more than 5 C from the last full calibration If it has IG XL will provide a warning that the CalibrationData txt file is invalid and a complete system calibration is required e It may be beneficial to calibrate the entire system rather than run Single Board Calibration if several boards have been changed This will reset the calibration temperature baseline and provide the tester with the maximum allowable temperature variation e When a board is replaced be sure to wait at the recommended amount of time before running calibration This allows the replacement board and the rest of the tester to stabilize and ensures that valid calibration data is recorded Using Single Board Calibration To use Single Board Calibration perform the following steps once a problem is isolated and a board is identified for replacement Always wear a tested grounding strap while working on the J750 tester Note These instructions assume the following
309. on point where a safety wire is added to the hardware The symbol enclosed within a circle indicates the entrance point of the safety ground wire of the AC mains input EARTH GROUND Used to identify any conductive point referenced to the AC mains input The symbol without a circle indicates that the point of the ground wire is not part of the main AC service wiring CHASSIS GROUND Used to identify where a wire is connected to a chassis point for a ground reference or for some other connection such as static discharge INFORMATION Used to identify specific areas of the test system that have important service or operating requirements that are documented in this manual Information symbols may have a yellow or white background INSTRUMENT GROUND Used to identify any connection point where instrumentation may be connected remotely to ground Instrumentation grounds may reference various grounds such as protective chassis signal etc This symbol will typically be located near coax connections etc FUSE REPLACEMENT Used to indicate that the fuse must be replaced by a fuse with the same type and rating for safe and proper operation Figure 2 1 Safety symbols Safety Information 2 5 CAUTION The yellow caution label with wording is used to identify a non immediate hazard or instructions of actions required to avoid a potential hazard Old Style Label No Longer Used Replaced by 835 566 10 DANGER The OSHA
310. one where is the international dial access code for Saudi Arabia International charges will apply Spain Sweden 800 837 23963 for toll free access where is the international dial access code for Spain For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Spain International charges will apply 800 837 23963 for toll free access where is the international dial access code for Sweden For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Sweden International charges will apply Switzerland 800 837 23963 for toll free access where is the international dial access code for Switzerland For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Switzerland International charges will apply Taiwan 00801 65 1319 for toll free access Thailand 001 800 65 6209 phone for toll free access Tunisia 63 32 341 7800 phone where is the international dial access code for Tunisia International charges will apply No toll free access is available Turkey For toll free AT amp T Direct Access dial 00 800 122 77 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Turkey International charges will
311. one of the following problems e Disconnected or defective external TCIO cable e Defective internal TCIO cable e Defective PCIT card in the test system computer e Defective card cage e Defective TCIO backplane cable e Defective backplane If problems are isolated to the internal or external TCIO cable PCIT card or card cage these items can be replaced in the field If problems are isolated to the TCIO backplane cable or the backplane the card cage must be replaced as these items are not considered field replaceable Additional information on TCIO functionality can be found in section Test Computer Input Output TCIO on page 5 10 of Chapter 5 Hardware Description 9 28 J750E 512 Pin Test System Service Reference Manual Windows and Software Troubleshooting If Windows or general software issues are encountered during operation of the test system collecting the following information will assist in troubleshooting and problem resolution e Windows Diagnostic Report e System and Application Event Logs Security log if it contains any entries Detailed text document that outlines the exact nature of the issue A list of all software including version information that is installed on the system This should also include any non tester software The procedures that follow provide details on how to gather the required information Windows Diagnostic Report Windows NT Perform the following steps to collect a Windows Diagnost
312. ones Because of this it is normal for several drivers and adapters to report failure and or error messages A series of three warning screens appear in sequence you may abort the installation at any time from any of these screens by pressing lt CTRL C gt Any other key will allow you to continue with the installation 8 60 J750E 512 Pin Test System Service Reference Manual The installation software will begin to load The core installation software is Symantec Ghost When loaded the Symantec Ghost install screen appears Please note that the Time Remaining and Progress Indicator percent bars are estimates and may change during the installation process When the contents of the first disk are completely transferred a message box appears Span Volume 1 Done or Symantec Ghost needs to open the next part of the image Please insert next disk Atthis message insert the next CD in the set and click OK An additional message box Span Volume n Done os Symantec Ghost needs for each remaining disk in the set will be displayed when each CD is finished loading When the final CD is loaded a C DOS prompt will be displayed on the screen Eject and remove the last disk from the CD drive Close the CD drive and power cycle the computer Post Installation Setup After restarting the computer a series of screens will be displayed to assist you in setting up the system Follow the prompts and enter the requested information
313. ons The LBI is also responsible for loading and unloading the FIFOs located on the PCI board as data transfers progress and for sending status information to the Tester Control Interface TCI local bus as transfers complete The TCIO Serial Bus Interface controls the serial buses inside the J750E tester It controls serial bus operations under the direction of the LBI The TCIO performs two types of data transfers Programmed I O and Block The TCIO bus interface consists of five identical blocks Currently only two are used in the J750E TCIO 0 is primarily used to control all of the J750E electronics and is referred to as the control bus TCIO 1 is used to read back output from all MTO and capture memories within the tester Within each TCIO block is a FIFO and a Serial Bus Interface The FIFO interfaces data between the LBI and the TCIO There is also a Local Bus Bridge LBB that is part of the interface between the LBI and the TCIO The TCIO bus synchronizes and converts between the local bus and the serial bus The LBI is clocked at 33MHZ from the TCI bus in the PC The TCIO is clocked at 50MHZ from the Calibration Clock Utility Board CAL CUB The FIFO de couples the difference in data transfer times The transfer of data is controlled by data status bits between the LBI and the Test System Bus Interface TSBI The FIFO is only used to transfer blocks of data both read and write The FIFO is not used for Programmed I O operations Progra
314. onverter converts the analog level produced by the PPMU or the Pin Measurement Unit PMU The source selection and A D is controlled by DC control Board Pin Measurement Unit BPMU The Board Pin Measurement Unit BPMU is a programmable four quadrant power supply that can force and measure both current and voltage The voltage source measure operates over 24 volts on four ranges and the current source operates over 30ma on four ranges There are seven current measurement ranges The voltage source can be switched between two values under control of the Pattern Generator High Voltage Pins Four channels in the tester 1 4 32 and 36 can provide a higher voltage than the other 60 standard channels They are capable of providing between 0 and 16 volts at a current of 100ma ID Prom The Board ID Prom is used to record the serial number and revision of each channel board Utility Bits Eight 8 Utility bits are sent to the Device Interface Board DIB to control user provided functions Figure 5 9 provides a block diagram of the channel board Hardware Description 5 19 Temp Sensors Utility Bits x8 Pattern Generator HV Drive PPMU x4 Control 16 v 100ma DG Force Control BPMU 24v AD 200ma TCIO TCIO Bus Pin Electronics Fail Bus State Bus ATG PE_PLIM PE_NLIM Relay Drivers AGND TCIO ATG
315. original file opened in step 1 Troubleshooting 9 25 7 If the new configuration file shows that only one circuit board is missing turn off tester power and troubleshoot to determine the defective board 8 If the configuration files match restart IG XL 9 If the new configuration file is missing more then one circuit board turn off tester power and verify that the TCIO cable is properly connected at both the tester and test system computer 10 Close the window that contains the CurrentConfig txt file then turn reapply power to the tester 11 Repeat step 6 12 If the new configuration file still shows missing boards turn off tester power and troubleshoot as outlined in section Problems Detected by the CAL CUB on page 9 26 to find the problem with the 5 volt supply Problems Detected by the CAL CUB If the CAL CUB shuts down the tester perform the following steps to determine the cause 1 Prepare the tester as outlined in section Performing Preliminary Checks on page 8 4 and section Shutting Down the Tester and AC Power Vault on page 8 7 of Chapter 8 Repair 2 Close IG XL the J750 Maintenance Programs and any test applications that may be running on the test system computer 3 Open the tester as outlined in section Opening the Doors of the Tester on page 8 9 of Chapter 8 Repair Note Position the tester so that the boards do not slide back into the card cage slots when the PCB spring ejectors are unlocked
316. ormation window 7 Proceed to section Event Logs Windows 2000 on page 9 31 Windows Diagnostic Report Windows XP Perform the following steps to collect a Windows Diagnostic report in Windows XP 1 Click Start on the Windows Taskbar then click Run The Run dialog box is displayed on the screen 2 Type winmsd in the Open window of the dialog box 3 Click OK The System Information window is displayed on the screen 4 Select Save from the File pulldown menu The Save As dialog box is displayed on the screen 5 Complete the Save in and File name windows of the dialog box then click Save The report is generated and saved to the specified location 6 Close the System Information window 7 Proceed to section Event Logs Windows XP on page 9 31 Event Logs Windows NT Perform the following steps to collect the Events Logs in Windows NT 1 Click Start on the Windows Taskbar select Programs Administrative Tools Common then click Events Viewer The Events Viewer is displayed on the screen 2 Select System from the Log pulldown menu The System Events Log is displayed on the screen 3 Select Save As from the Log pulldown menu The Save As dialog box is displayed on the screen 4 Enter System in the File Name window of the dialog box and click Save Note Save the log to the same drive or directory location where the Windows Diagnostic Report was saved The log is saved to the specified location 5 Repeat step 2 throug
317. otLSB Gnd Gnd Gnd Gnd FAIL22 Gnd FAIL19 Gnd FAIL18 Gnd Gnd Gnd FAIL13 Gnd Gnd Gnd FAIL8 Gnd Gnd Gnd FAIL3 Gnd Gnd Gnd ATCB Gnd Gnd Gnd ATAD ATCLR Gnd Gnd F Tester Front Air Power Flow Switch NOTES 1 RowA of the HDM power modules connects to Row B holes on the channel board daughter board Dark border around signal group indicates a physical HDM connector module Signals 24V DPS or 24V DPS R are for DPS expansion board use only CAUTION SPARE 2 might have 34V on it in older systems TCIO signals in grey colored cells are present only in slots 0 1 2 3 These are for DPS expansion board use only oR WP F 000998 Figure 11 10 Lower backplane connector AG027 Channel Board Slots 0 2 4 6 8 10 12 14 Printed Circuit Board Pin Identification Diagrams 11 11 Col No Card Insert View Tester R Row A Row B Row C Row D Row E Row F ester hear RAYA TO TATTOO Fans aa TO os sv aa osv sv 7 eav osv 5v Slot MSB Slot LSB C ca PAUS St FAA Ga aer Gnd LEAST Cd Aa f oa f oa TC FAILTS Png o oae o BER ca ce Ca Fame KAREN Y EE gy ECK PO esv S gyv 2avR po BV S gyv ECKER VV Cea T TG 6 gt Ga Gm Tester Front Co dT Gm Gm ar Power 6 a GA o Switch NOTES 1 Row A of the HDM power modules connects to Row B holes on the channel board daughter board Dark border around signal group indicates a physical HDM connector
318. other reproductive harm Canada Regulatory Information CEPA DSL NDSL Status All components are isted on or are exempt from listing on the Domestic Substances List WHMIS hazard class 0 2 8 This material safety data sheet contains changes from the previous version in sections 9 Prepared by Kyra Kozak Woods Product Safety and Regulatory Affairs Specialist DISCLAIMER The data contained herein are furnished for information only and are believed to be reliable However Henkel Corporation does not assume responsibility for any results obtained by persons over whose methods Henkel Corporation has no control It is the user s responsibility to determine the suitability of Henkel s a or any production methods mentioned herein for a particular purpose and to adopt such precautions as may be advisable for the protection of property and persons against any hazards that may be involved in the handling and use of any of Henkel Corporation s products In light of the foregoing Henkel Corporation specifically disclaims all warranties express or implied including warranties of merchantability and fitness for a particular purpose arising from sale or use of Henkel Corporation s products Henkel Corporation further disclaims any liability for consequential or incidental damages of any kind including lost profits Item No 21463 Product name Loctite R 222 Threadiocker Low Strength Material Recycling Any part of the test system removed as part of a
319. ow to Mid Frequency Analog Source I O Module ASIO occccccccccccinnccccnccccnononos 5 28 Digital Source I O Module DO 5 30 RG lay E E 31 Analog Parametric Measurement Unit APDMUI 5 34 APMU Modes of Opera naaa os 5 34 APMU Differential VOlMMETO 000000 0 a a a ci 5 37 Gang AA uo ROO Dai ian eA Enna ENA ENENGE DT 5 38 Force Voltage FV A de ad anann 39 Force C rrent FI Gang EE 39 APMU Digital Circuit Deeg ee 5 40 Radio Frequency Identification Option RFID oooocccccnoniciconononononnnonononononccnonononanananananr nn nnnnns 5 42 a DEE 5 42 x J750E 512 Pin Test System Service Reference Manual Carrier Generation and Timing System EE 5 42 REID Pin TE de e 5 43 RED Div e a e steed cen Ee eebe 43 RFID Receiver nono EE EEE TAE E 44 Demodulation with Per Pin Dh 5 46 Receiver with Per Pin Synchronization AANEREN 5 47 Cap UI EE 5 48 DUT Input Capacitance Measurement ccconcnnnnnocooooonooonnnnnnnnnnnnnnnnnnnnnnnncnnnnnnnnnnnn nro nnnnnns 5 49 Measurement Methode 49 Frequency Sweep 49 Voltage Current Measurement 50 See SEN ate ORE RISE Teas ae A oS a RE AEE 5 50 SSL PSS ICIS E 5 50 COM BUTEA e ee EE 5 51 AC DC Power and Cooling AG Ee RTE ed la A SAA leap aa 6 2 AS Ee 6 2 Input Seel 6 4 DE Ge ee 6 8 USO ee 6 14 J750E SET RIERA e et 6 15 System Power On Sequence icceicecectencsasesnanterseenyionteseseseteeesscteaeiesnsnanarviaespeesseteceneses 6 15 System Power Supply Detail EE 6 15 Powe
320. ows the cable connected to the board APMU Calibration Reference Cable Connector APMU Mother Board Connector F 000855 Figure 4 21 APMU calibration reference cable connected to board 17 Connect the five 5 banana jacks on the APMU calibration reference cable to the connectors at the front of the meter as follows Yellow to Sense Hi Green to Sense Lo Black to Sense Guard Red to Input Hi Blue to Input Lo Figure 4 22 shows the cable connected to the meter Maintenance Software 4 71 1A 250V SO A All Term 1000Vpk Max A A q F 000856 Figure 4 22 APMU calibration reference cable connected to meter 18 Click the ExternalCal Tab in the Maintenance Interface 19 Select the APMU board in the tester to be calibrated as indicated in the Hardware Selection Deselection area of the Maintenance Interface Note Selected hardware is displayed gray and deselected hardware is displayed white 20 Click Start The APMU External Calibration Setup dialog box is displayed on the screen Figure 4 23 shows the dialog box 4 72 J750E 512 Pin Test System Service Reference Manual J750 Maintenance Tester Mode MUIS 00 WorkBook V7 20 00 m Test Program Output Eile Log Options Configuration Help File Edit 8 QuickCheck ModuleCheck Calibration Beginning APMU test on slot 5 at 2 35 36 PM on 10 3 01 o rkbook Rev 7 20 00 ExteralCal Peng IG XL Version 3 40 01 DIB 1EA67B Rev 9924A
321. p and water after use IX TOXICITY INFORMATION SARA Title III Acute Health Yes Sudden release of pressure No TSCA Regulatory This material or it s Chronic Health No Reportable quantity RQ NE components are listed in the TSCA inventory Fire Yes 313 Toxic Chemical ves X MISCELLANEOUS INFORMATION Isopropanol 3 UN1219 PG II NA Not Available KEY DATEOFISSUE SUPERSEDES NE Non Established IPA99 01 05 4 1 01 The information contamed herem is based on data considered JNJ accepts no responsibility for any personal injury property accurate However no warranty is expressed or implied regarding damage or other type of loss due to negligence or otherwise resulting the accuracy of these data or the results to be obtained from the use from the use or handling of this material Manufacturer s Liability i of the material limited to the net purchase price of the product or at manufacturer s option to the replacement of the product upon its retum to us 2 18 J750E 512 Pin Test System Service Reference Manual Presaturated IPA Wipe o CHEMTRONICS MSDS 1003 SECTION 1 CHEMICAL PRODUCT AND COMPANY IDENTIFICATION Company Address 8125 Cobb Center Drive Kennesaw GA 30152 Product Information 800 TECE 401 Emergency Chemtrec 800 424 9300 Customer Service 800 645 5244 Revision Date December 15 20 Product Identification CHEMPAD PRESATURATED WIPE Il Product Code CP400 SECTION 2 COMPOSITION INFORMATION O
322. pi e ron non cnn non conan on no non on none coronan onn A S Orek 8 PogoBlock AssembliEiii iia iia 8 REENEN 8 Calibration Overview 8 CAL CUB Calibration 8 J750E Maintenance Procedures 10 CAL CUB Calibration Review 10 Traceability 10 Calibration Certificate Examples 11 AC POWER SAS SR 1 15 Ell e EE 1 15 Personal COMPU li 1 15 Overall System Block Diagram rta 1 16 Safety Information EE HEEN Elie re ln EE 2 2 Safety is es UOC A q 2 3 Safety Symbols and RETTEN 2 5 Ein leie OD EE 2 9 CockouUt ad EE 2 10 Equipment Shutdown and Lockout Tagout Procedures c oooooocoooooooocccccnccnccncnonnncninanannns 2 11 ENT ON 2 12 AC POWER Val A AAA Az 2 12 Input Power Module casona did tareas 2 14 Circuit Boards and Power Supplies cccccccccccecceeeseeeeeeeseeeeeeneeeeeeeeeeeeeeeeeeeeeeeeseeeess 2 15 KT e EE 2 16 TORA Ni 2 17 Materials Hand ricino o E Ve A iii 2 19 Hazardous Material Sine sicissvenvsesntsazaceceevesnsenseastnaxsveasaedeecenectuanenessersuseiesatnedeiaxeeanseenecensts 2 19 Handling of Hazardous Material iia oi ia da 19 Handling of Solid Waste cintia id ia toe 19 Material Safety Data Sheets MSDS occcccccccccnonononananncccononononononononononnnnaccanaranano cono nooo 2 19 IsopropylFAlcoboleritotii iaa 20 Presaturated EPA WIPE eri e Nee OE NEESS AANER 22 Loc Di A a A A ii tease 24 Mater arre crol a SS NN EA 2 28 Specific Product Safety Information AAA 2 29 System E TE 2 29 Model Designan ENEE SEENEN ee 29
323. pical CalibrationData txt file temperature readings Device Power Supply e Force Voltage The CAL CUB calibrates the Device Power Supply DPS voltage for offset and gain at Ov and 10v The DPS is connected to the CAL CUB through the Cal DIB and the voltage is measured by Analog to Digital converters on the CAL CUB The difference between the source and measured value is stored in a correction table and called by the driver when needed to perform a measurement e Current Measure Current measurement is calibrated by connecting the DPS to the resistors on the CAL CUB and the Cal DIB with the CAL CUB buffer set to a ground reference instead of 34v A resistor is selected and the DPS voltage is forced into the resistor on the CAL CUB where the voltage is measured on each end of the resistor The voltage measurements are summed then divided by the resistance to calculate the current The difference between the source and measured value is stored in a lookup table The DPS Current is measured at full current for 50ua 10ma 1ma and 1 amp Maintenance Software 4 13 Timing Calibration The timing system has several correctable error components e Interpolator Fine Vernier e Pin Electronics Skew e Round trip delay including user s DIB When used together the Cal DIB and CAL CUB have a master driver and comparator a precision interpolator and a RF matrix that can be used to deliver or receive signals to and from each of the digital channels
324. pin connectors that have slightly different pin outs The Inhibit input is either on pin 1 or 2 and the Voltage Good output is on pin 4 or 8 This is shown in Figure 6 11 for the power supply 12 pin connectors tul Voltage Good Figure 6 11 Power Supply sequencing Inhibit line filter The positive supplies use a 6 pin output connector Pin 6 is the Inhibit line The capacitor is between pin 6 and pin 4 Pin 4 in Sense which ties to ground at the backplane bus bar This is shown in Figure 6 12 for the power supply 6 pin connector 6 22 J750E 512 Pin Test System Service Reference Manual Voltage Good 4 5 6 1uF Inhibit Sense Sense Note Sense connects to ground at backplane Figure 6 12 Inhibit filter The 6 pin cable is shown in Figure 6 13 and the 12 pin cable is shown in Figure 6 14 6 Pin Cable GO Pr A doo 129 Connection Chart P2 Figure 6 13 6 Pin Inhibit filter cable AC DC Power and Cooling 6 23 12 Pin Cable Figure 6 14 12 Pin Inhibit filter cable 6 24 J750E 512 Pin Test System Service Reference Manual System Cooling The four 4 main fans at the rear of the test head cool the J750E 512 system There are also four 4 auxiliary fans two 2 in both the left and right power supply assemblies that remove air from the power supply assembly jacket The four main fans and the fans in the left and right power supply assemblies are powered from the 24 volt utilit
325. power from the Input Power Module contactor which in turn removes AC power from the power supplies The circuit works this way A transformer in the Input Power Module generates 24 VAC when the J750E is plugged into the power vault supplying power to the tester The 24 VAC goes to pin 1 on the connector to the Power On Off switch assembly The EMO a normally closed switch provides 24 VAC to the Power On and Power Off switches When the Power On switch normally open closes 24 VAC is applied to the coil of the contactor The contactor coil is energized and closes the contactor Once the contactor closes three phases of AC power are provided to the power supplies and the 24VAC is provided to the J3 connector on the CUB through the auxiliary connection of the contactor The power supplies now power up since they have 208 VAC input power With the 5v 3 3v and 5v power supplies up to nominal output Q15 in the Fan Sensor Control circuit will turn on which closes the normally open contacts of relay K2 The Power On switch can now be released after pressing and holding it for 3 to 5 seconds and 24 VAC through K2 will continue to keep the contactor coil energized The entire power up process takes a few seconds That is why it is recommended that you press and hold the Power On switch for only 3 to 5 seconds To power down press the Power Off switch The normally closed contacts of the Power Off switch will open interrupting the 24 VAC to the con
326. pplies The isolator bushings and flat washers on the power supply terminals are loose Use care when installing the power supply into the tester so these items do not fall off of the terminals When replacing a power supply be sure to check all voltages at the power supply sense lines before reinstalling the boards into the tester Always wear a tested grounding strap while working on the J750E tester Note Protect against the possibility of dropping hardware into the power supplies tester electronics or backplane 8 26 J750E 512 Pin Test System Service Reference Manual 1 While holding the power supplies by the two 2 handles carefully slide them back down into the tester 2 Secure the power supplies to the card cage using the four 4 8 32 x S long Phillips head screws with external star washer Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 3 Reconnect the sense line connectors to the power supplies Note Ensure the isolator bushings and flat washers are on the power supply terminals before replacing the bus bars Note Protect against the possibility of dropping hardware into the power supplies 4 Replace the terminal lug onto the positive terminal of the 5 volt power supply then replace the 10 flat washer 10 split lock washer and 10 32 hex nut Tighten the nut to 26 inch pounds using the adjustable torq
327. pplies a few turns using the no 2 Phillips screwdriver then remove the four 4 terminal lugs from the connector Note Do not remove the jumper between terminals 4 and 5 of the 36 volt power supply Repair 8 25 7 Remove the four 4 5 16 hex nuts 5 16 split lock washers and 5 16 flat washers that connect the bus bars to the 3 3 volt power supplies using the socket wrench and S socket 8 Remove the two 2 bus bars from the backplane connection bars as follows Remove the j 20 x 5 8 long bolt j split lock washers and j flat washer at the top of the connection bars using the 7 16 open end wrench Loosen the j 20 x 5 8 long bolt at the bottom of the connection bars using the 7 16 open end wrench Pull the bus bars up to remove them from the supplies and the backplane connection bars 9 Remove the four 4 8 32 x S long Phillips head screws with external star washer securing the power supplies to the card cage using the no 2 Phillips screwdriver 10 Grasp the two 2 handles on the power supplies then lift the power supplies out of the tester Place the supplies in a safe storage location until it is time to reinstall them into the tester Reinstalling the 405 924 00 10 5 volt 5 volt and 24 volt Utility and 405 920 00 5 volt and 10 5 volt Power Supplies Perform the following steps to reinstall the power supplies into the tester Previous Figure 8 4 shows the location of the power su
328. pring ejectors on the board and so the two 2 connectors on the back of the board are mated up with the connectors on the motherboard 4 Gently press the daughter card onto the motherboard until the two 2 connectors are fully seated Note Make sure that the daughter card is even with the other cards installed on the motherboard 5 Place the cover onto the daughter card and secure using the two 2 Phillips head screws previously removed Tighten the screws using the no 1 Phillips screwdriver 6 Repeat step 1 through step 5 for each daughter card that needs to be installed 7 Re install the APMU motherboard into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 Pogo Block Removal and Replacement This section provides instructions for replacing pogo blocks on the circuit boards installed in the J750E tester The following tools are required to replace the pogo blocks e No 1 Phillips screwdriver Perform the following steps to replace the pogo blocks Always wear a tested grounding strap while working on the J750E tester Repair 8 53 1 Remove the circuit board that needs the pogo block replaced as outlined in section Removing Circuit Boards on page 8 11 2 If applicable remove the circuit board from its storage container and place it on a proper anti static work surface with the pogo block mounting screws facing up 3 Remove the two 2 Phillips head screws holding the blo
329. pture Data State Bus gt Bus LK E Pattern S gt Capture 4 gt D E Interface Generator Za p Memory 4 gt SE SI Controller S ale A Ss qual stb E 5 ee di 16 mto_fmtfail SRC Data t gt Device Data 3 MapData p Map MUT SRC Memory Addi Dat ADB Se Device Data Controller 18 TCIO JTAG Microcode 41 gt Interface Controller 2227 ADB Bus Interface i E A ji i tcio_0_sync tcio_0_data 7 5 2 24 24 tcio_0_rdata 1 0 tck tdi tdo y y tcio_1_sync tms trst GTL CMOS Transducer tcio_1_data x tcio_1_rdata y ADB Bus F 000171 Figure 5 12 MTO block diagram Map RAM 256K x 16 Hardware Description 5 25 Converter Test Option CTO The Converter Test Option CTO contains 8 high accuracy channels on one board Each channel has the following features e Source with O to 6 volts and 0 to 3 volt ranges e DC Acquire input with O to 6 volts and O to 3 volt ranges e Two programmable references e 14 bit accuracy with 16 bit resolution e 2 Parametric Measurement Units PPMU e Device Ground Sense DGS The CTO contains 8 analog channels The channels are controlled by a digital interface that includes a Pattern Generator with Large Vector Memory LVM a custom ASIC and Data Buffer Memory The CTO requires that the following Teradyne software be installed on the test system computer e IG XL V3 10 05 or later and J750 Maintenance Software V6 00 00 or later or e IG XL V3 20 00 or late
330. purposes The J750 Maintenance Interface section of this manual details the following information e Tester Maintenance Programs e Menu Bar e Maintenance Controls Figure 4 6 shows the J750 Maintenance User Interface i J750 Maintenance MUI8 01 No Program Loaded Bele 5 J750 Maintenance Tester Mode MUI8 01 WorkBook 7 20 02 ol x File Log Options Configuration Help File Log Options Configuration Help ExtemalCal ExtemalPy ExtemalCal ExtemalPY QuickCheck ModuleCheck Calbration 9 Performance QuickCheck ModuleCheck Calbration 9 Performance Last WorkBook Ver 47 20 02 Last WorkBook Ver 47 20 02 Last Run 7 18 02 9 23 41 AM Last Result PASSED Last Run 7 18 02 9 23 41 AM Last Result PASSED Running Exec Interpose Function On Tester Initialized a STA pes Exec Interpose Function On Program Loaded Start sexe i OQ Aset O aH _ x 27 O s T Loop I Loop r Tolerance r Tolerance Reduction Reduction Verbosity Verbosity Failing Tests Failing Tests C AllTests C AllTests C Status Only C Status Only Load Program Unload Program Maintenance Interface without Maintenance Interface with J750 Maintenance Program Loaded J750 Maintenance Program Loaded F 000071 Figure 4 6 J750 Maintenance User Interface Tester Maintenance Programs The maintenance programs provide the ability to test and calibrate the hardware in the tes
331. put Output Clair di 5 10 TADO BUS rad a iria seeds 5 10 AAA A Paar Eae 10 Calibration Clock Utility Board 5 10 TCIO Distribution to the Backplanes eege dd 12 TCIO Connections on the EE 12 TCIO Connections on the Upper Backplane een 14 Device Power Supply DPS Add ee Seege SE canter eege 5 15 Basic Deet geiergert Seege iaa 5 15 M a s ring Ur EN 5 15 Limiting CUTE risinn ninine adena enni n a a oi ei aaa ia E daa 5 15 MEET EI AAA AE A EAA eege 5 15 Kevin RRE ER 5 15 G ard Voltage ro 5 16 Device Ground Senso DGS E 5 16 OQutpu t ee 5 16 Programmable Voltage CONTO SA A at aalaernaiee 5 16 Data AC IT e TE 5 16 TCIO Interface and Control EE 5 16 Eelere AER 5 16 Channel Boda AA AAA A 5 18 Pattern COSA A Pu IA 5 18 Auxiliary Timing Generator ii a See 5 19 Per Pin Measurement Unit RR aii e acceda 5 19 Analog to Digital Converter os 5 19 Board Pin Measurement Unit AE ee deiere Ee Eege E an ain eee 5 19 High Voltage PINS E 5 19 ID RTO a E rig ge ae a ce erect a mall alan we eater ee ita 5 19 te WE 5 19 Channel Board Relay BOS uo 5 20 Calibration Device Interface Board CaDID non nn nnnnnnnnonnnnnnos 5 22 Memory Test Option MTO und AA 5 24 State Bus Interact a AAA aA PR AR te te eter 5 24 Alternate Data BUS Interface s czisccsciseceveacsc cessndeeasssrievecizacteseeteacsdesedessevadsteieveterseazaverees 5 24 Converter Test Option CTO EE 5 26 A RAN 5 26 A ada lod CA da 5 26 Mixed Signal Option Ms Ot id 5 28 L
332. puter will connect to the internet directly Register or Activate with Microsoft Select not right now You should register your software when the system is networked Select Finish to complete the installation process The system will restart Windows XP and the login screen appears Two default accounts have been setup for you The Administrator account has the password 1Teradyne without the quotes This account can be used to administer the machine The Teradyne account is a user permissions level account and has a password of Service This account can be used to run checkers but not to install or to remove software The local System Administrator may want to add or remove these or other accounts as a part of the final setup process Log in to the Admin istrator account A message balloon will appear advising you the Windows Update is turned off It will also advise you of the status of the firewall if any and your anti virus software This warning is a part of the enhanced security features of Windows XP Service Pack 2 It may be disabled from the Microsoft Security Center console if desired From the Start gt Settings gt Control Panel gt Display menu select Desktop Select the J750 or other wallpaper as desired This sets the screen display background to the Teradyne logo for the product being used Following the instructions for the IG XL version desired install IG XL Re install the license dat in C Program Files Ter
333. r Supply Sequencing cccccccecsesssseseesssssssssssesssasssececeeececeeeeeeesessesssesesseaeaeaaes 6 16 Power Supply Sequencing Description for the J750E Tester 18 Negative Power Supplies and the Logic Option Board 6 20 Power Supply Sequencing Inhibit Line Eiter 6 21 SEM COON EEN 6 24 System Cooling Fan Delia 6 24 S stem Fam lt 6 24 Fan ln e EE 6 25 A A eclectic inc es a ate calc aia ear neler he 6 27 Fan Locations and FUN CHOM siicciscssacnsecrencerenssandenstacadesectaastnacyadecevasstanananeey ee Enin 6 27 SEENEN 6 30 xi Maintenance Maintenance OV aaa 7 2 ESD A EE 7 7 Grounding Calibration and Customer DIBS eee eeeeeeeaeeeeeeeeeeeneeeeeeeete 7 7 Constructing the Ground Wire eto ee EE 7 Grounding Calibration E 8 A Customer DMB styacg ete att cine waned eee tae ed Kees eee 10 Routine Maintenance Procedures ooooooonccnnccnnccccccccccnnnnncccnnannannncnnnnncnnnnnnnnnnnnnnnnnnnnnncnnnnnnnnnennns 7 13 Environmental eeler 7 13 Temperature and A a do do e 13 Exhaust Air Temperature Requirement ccccsssssssesssssssessseesssccsnscssscessecssscssssssuecesecsssessseesascessccssecssecesneeses 13 Pressurized Air and Vacuum E E 14 Cooling Air Path E 14 Personal Computer CHECK al 7 14 PIB DIB CIGANING BEE 7 15 J750E Tester ENE iS eeh 7 16 Vacuum Seal Inspection and Cleamimg cnn nanannnnnos 7 16 Pogo Block O ring Inspection and Cleanimg 7 17 POO Pi INS POCO Mia EEN 7 18 Mechanical ege eecht 7 19
334. r and J750 Maintenance Software V6 00 00 or later Digital Interface The Pattern Generator provides the control signals to keep the CTO in sync with the Digital Channels The Pattern Generator serves as the distribution point forthe TCIO on the CTO The TCIO is a serial bus that is interfaced to the Test Computers bus and is distributed to all of the boards in the test system The CTO custom ASIC controls the analog channels The multiple pattern generators on the CTOs synchronize themselves using a combination of the TCIO and the Fail Bus signals Analog Channel The basic function is to simultaneously source and acquire DC voltages with 60 PPM accuracy Each analog channel consists of two PPMUs precision source A to D converter and the required support circuitry The A to D converter can measure an acquired voltage or verify references DGS source and PPMUs Figure 5 13 provides a block diagram of the CTO 5 26 J750E 512 Pin Test System Service Reference Manual ens Vref PPMUO_Out EE PPMUO_DUT l parallel DAC PPMU 0 PPMUO_MOUT BDGS BDGS to Acquire Select 12 bit PPMU1 DUT gt l parallel DA PEMD 1 PPMU1_MOUT BDGS BDGS to Acquire Select K6 Sense IN W Sense Te e 64kSource CS Force Memory i es SE s WS PPMU1_Out z 3v a 16 bit Low serial DAC Pass PPMU1_DUT d 6v LLA Acquire Acquire Sense IN N Fixed 6V Ref w 64k Capture Fixed 6V Ref a Fixed 3V Ref
335. r deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface CA O Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired 9 Click Start Module Check starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run Maintenance Software 4 45 The board that is being tested is displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows BlueBoard is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the ModuleCheck tab displays the date and time of the last test as well as the overall test results pass or fail 10 To run additional maintenance programs proceed to the appropriate section of this chapter for the particular maintenance program you want to run 11 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removi
336. r repair activities wipes cotton or foam tip swabs should be handled and disposed of in accordance with facility guidelines and local regulations whenever practical No part of the test system is considered solid waste when removed as part of a repair activity Test system components may be disposed of in accordance with factory guidelines and local regulations whenever practical Material Safety Data Sheets MSDS This section contains MSDS information for the following chemicals e Isopropyl Alcohol e Presaturated IPA Wipe e Loctite 222 2 16 J750E 512 Pin Test System Service Reference Manual Isopropyl Alcohol JNJ Industries Inc HAZARD RATING 290 Beaver Street 4 Extreme Fire 3 High TAE KG Franklin MA 02038 AGN Toxicity S2 gt Reactivity Phone 508 553 0529 Fax 508 553 9973 1 Non Toxic Slight Web Site www jnj industries com E Mail sales jnj imdusties com J 0 Insignificant Special MATERIAL GlobalTech CODE KEY HAZARDCLASS Isopropyl Alcohol 99 PASS Flammable Liquid FORMULA DATEISSUED CHEMICALNAMEORSYNONYMS NA 2 Propanol I APPROXIMATE COMPOSITIONAL INFORMATION l PHYSICALPROPERTY INFORMATION APPEARANCE ODOR pH VISCOSITY Water Clear Liquid pH 7 NA 20 fy 33 MELTING FREEZINGPOINT BOILINGPOINT VAPOR DENSITY Air 1 88 5 C FP 179 F 82 C SOLUBILITYINWATER VOLATILE By Weight VAPORPRESSURE mm He Complete 100 SPECIFIC GRAVITY Water 1 EVAPORATION RATE Butyl Acetate 1
337. rdware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired 9 Click Start Quick Check starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run The board that is being tested is displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred Once the testing is complete the QuickCheck tab displays the date and time of the last test as well as the overall test results pass or fail 10 To run additional maintenance programs proceed to the appropriate section of this chapter for the particular maintenance program you want to run 11 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 12 Place the DIB vacuum switch on the tester to the UNLOCK off position 12 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 12 Remove the grou
338. re that they perform at the highest accuracy possible The channel board is calibrated by circuitry located on the CAL CUB and Cal DIB The CAL CUB contains a single precision channel which is used a reference to calibrate all channel boards in the tester The Cal DIB contains an RF relay matrix that is used to deliver hi speed signals to each channel under test The matrix is used to connect the channel that is being calibrated to the CAL CUB which contains a master driver and detector and a precision interpolator The path for timing calibration is a high integrity 50 ohm path and for DC calibration a Kelvin connection is used Critical paths are guarded during calibration The DC level calibration hardware has offset and slope corrections for all of the Digital to Analog converters located on the channel boards The Pin Parametric Measurement Unit PPMU has three corrections depending upon current range and operating mode High Speed Digital Channel Levels The High Speed Digital channel calibration is performed as follows Pin levels are calibrated by closing the functional and Board Parametric Measurement Unit BPMU pins of the external relay matrix on the Cal DIB The resistance between the pin electronics and the actual pins is not compensated for since the driver voltages are measured at zero current The current sources lol and loh are measured at a point that is isolated from the Vt commutation point Maintenance Software
339. ree cloth with isopropyl alcohol and gently clean the surface of the vacuum seals 9 Once the alcohol has fully dried the Cal DIB or Customer DIB can be replaced onto the tester Pogo Block O ring Inspection and Cleaning The pogo block o rings should be inspected and cleaned on a regular basis It is highly recommended that the o rings be inspected and cleaned whenever a board is removed from the tester The following items are needed to inspect and clean the pogo block o rings e Foam tip swab e Isopropyl alcohol Inspect and clean the pogo block o rings as follows Always wear a tested grounding strap while working on the J750E tester 1 Ensure that the tester is fully undocked and a sufficient distance from the mating equipment 7 16 J750E 512 Pin Test System Service Reference Manual 2 Remove the circuit board from the tester as outlined in section Removing Circuit Boards on page 8 11 of Chapter 8 Repair 3 Visually inspectthe o rings on the pogo blocks Ensure that the o rings are not cut damaged or compressed at the mating surface of the DIB fixture A good oval o ring sits higher off of the pogo block surface than a compressed or flatter one Figure 7 6 shows examples of a compressed or flatter o ring and a good oval o ring Pogo Block Surface Compressed or Good Oval Flatter O Ring O Ring F 000124 Figure 7 6 O ring examples 4 If the o rings are cut damaged or compressed replace them as outlined in
340. relay board to each connector using the 5 32 nutdriver Figure 8 11 shows the location of the nuts Repair 8 49 Nuts and Washers 2 places F 000690 Figure 8 11 APMU relay board connector nut location 4 Slide the relay board away from the motherboard 5 Place the relay board onto a proper anti static work surface with the component side facing up 6 If applicable place connector covers onto the connectors of the relay board then place the board into a proper storage container to prevent ESD and physical damage 7 Proceed to section Reinstalling the APMU Relay Board on page 8 50 as appropriate Reinstalling the APMU Relay Board Perform the following steps to reinstall the relay board onto the APMU motherboard Always wear a tested grounding strap while working on the J750E tester 1 If applicable remove the new relay board form its storage container and place it onto a proper anti static work surface with the component side facing up 2 Remove any connector covers that are installed on the board 3 Position the relay board so that the connectors line up with the connectors on the APMU motherboard 8 50 J750E 512 Pin Test System Service Reference Manual 4 Install the relay board by pushing it onto the motherboard until it is fully seated on both connectors 5 Secure the relay board to motherboard using two 2 nuts on each connector Tighten the nuts using the 5 32 nutdriver 6 Reinstall th
341. reliability Preventive measures should be implemented and monitored The following control measures and static prevention techniques can reduce the occurrence of electrostatic damage 1 Educate operators and maintenance personnel about electrostatic charge phenomena discharge damage and methods to prevent problems 2 Eliminate any offending materials from the test area or work area Plastic and foam cups Food containers and wrappers Cellophane and paper tapes Foam packing materials 3 Maintain humidity in the area where the J750E is installed between 40 and 60 non condensing 4 Create a static controlled work area that includes static conducting floors and tables Use anti static sprays if needed 5 Prevent ESD by being properly grounded during The packing or unpacking of circuit boards or any other replacement parts The removal or replacement of any circuit board or other part in the system Any troubleshooting or other maintenance activities The removal or replacement of the Calibration or Customer Device Interface Board DIB from the tester 6 Caution other personnel that may not be aware of proper ESD procedures and ensure that they follow proper ESD precautions 7 Wear an anti static coat and other clothing as required 8 Consult an ESD control specialist for further recommendations 2 34 J750E 512 Pin Test System Service Reference Manual Software Description The Software Description chapter of this manua
342. rench and 3 8 socket 6 Reconnect the sense line connectors to the power supplies 7 Reconnect the AC line connections for the 15 volt 10 volt 36 volt and 34 volt and 36 volt power supply module as follows Replace the three 3 terminal lugs onto the connector terminals of the supply then tighten the screws to 26 inch pounds using the adjustable torque wrench and using the no 2 Phillips screwdriver bit Replace the yellow protective shields back over the connector terminals Repair 8 29 8 Reconnect the AC line connector to the 24 volt DPS 3 3 volt power supply module by placing the connector of the wire harness onto the connector of the power supply and pushing down until it snaps into place 9 Reconnect the two 2 bus bars to the backplane connection bars as follows Place the bus bars over the mounting bolts on the 3 3 volt power supplies and over the three 3 j 20 x 5 8 long bolts at the bottom bus bar mounting holes of the backplane connection bars Reinstall the three 3 j 20 x 5 8 long bolts j split lock washers and j flat washers at the top bus bar mounting holes of the connection bars and tighten them to 57 inch pounds using the adjustable torque wrench and 7 16 socket Tighten the three 3 j 20 x 5 8 long bolts at the bottom bus bar mounting holes of the connection bars to 57 inch pounds using the adjustable torque wrench and 7 16 socket 10 Replace the four 4 5 16
343. rews to 10 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 11 Reconnect the flat gray PCIT cable to the connector at the rear of the tester 12 Replace the PCIT cable clamp over the cable and attach the clamp to the strain relief bracket using the two 2 10 32 x 5 8 long Phillips head screws Tighten the screws using the no 2 Phillips screwdriver 13 Remove the four 4 j 20 x 1 s long nyloc cap socket head screws using the 3 16 hex wrench then remove the DIB shipping cover from the tester 14 Replace the airflow shield onto the DIB fixture on the tester 15 Replace the DIB cover onto the tester and secure using the six 6 8 32 x 3 8 long black Phillips head screws and 8 lock washers Tighten the screws to 15 inch pounds using the adjustable torque wrench and no 2 Phillips screwdriver bit 16 Plug the tester power cable back into the outlet receptacle J4 at the rear of the power vault Fan Removal and Replacement The fans in the J750E have an expected life of 5 years The fans in the J750E can be replaced individually after a failure or together during a preventative maintenance procedure Replaceable fans are used in 2 separate areas of the tester e As part of the fan plate assembly located at the rear of the tester e As part of the power supply jackets located inside the tester The fans in each area require different procedures for removal and replacement Fan removal and repla
344. rforming any repairs on the tester it is highly recommended that you shut down the tester and AC Power Vault as follows wech N Always wear a tested grounding strap while working on the J750E tester Ensure that the tester is fully undocked and a sufficient distance from the mating equipment Position the tester so that the DIB mounting surface faces up Always ground the Customer DIB or Calibration DIB when installing or removing it from the DIB fixture on the tester Properly ground the Customer DIB or Calibration DIB as previously outlined in section Grounding Calibration and Customer DIBs on page 7 7 of Chapter 7 Maintenance Place the DIB vacuum switch on the tester to the UNLOCK off position Remove the Customer DIB or Calibration DIB from the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage Push the red Power Off switch on the front of the tester to turn off power Push the red Power Off switch S2 on the front of the AC Power Vault to turn off power Turn off the Tester Power circuit breaker CB5 at the rear of the power vault Repair 8 7 9 If appropriate disconnect the tester power cable from the outlet receptacle J4 at the rear of the power vault 10 If appropriate disconnect the air source supply line from the connector on the back of the tester Opening the Tester The following information pro
345. rial number label 2 Place the serial number label and a chassis ground label onto the new module in the same place they are located on the old module Repair 8 39 3 Reassemble the two 2 ground wires to the threaded stud on the inside of the input power module and secure using the 10 32 external tooth hex locknut Tighten the nut to 26 inch pounds using the adjustable torque wrench and 3 8 socket 4 Slide the power module back into the tester housing 5 Reconnect the two 2 9 pin Molex connectors from input power module to the mating connectors on the tester housing 6 Reconnect the connector of the input power module to the connector on the operator control harness 7 Tighten the three 3 captive screws at the bottom of the input power module to 10 inch pounds using the adjustable torque wrench and medium slotted screwdriver bit 1 4 to secure the module into the tester housing 8 Replace the TCIO cable connector to the input power module and secure using the two 2 M2 5 x 45 long Phillips head screws Tighten the screws to 3 S inch pounds using the adjustable torque wrench and no 1 Phillips screwdriver bit 9 Apply two 2 tie wraps to secure the TCIO cable to the input power module wires Cut the ends of the tie wraps using the side cutters 10 Replace the cover onto the input power module and secure using the fourteen 14 8 32 x 3 8 long Phillips head screws with external tooth washers Tighten the sc
346. rmation in this manual 1 2 3 4 5 Not easily Very easy 5 How clear is the information in this manual 1 2 3 4 5 Not clear Very clear continued on next page Document Number 552 360 33 Revision 0622 6 When you actually try instructions in this manual how easily can you follow them 1 2 3 4 5 Not easily Very easily 7 How well did you understand the product before reading this manual 1 2 3 4 5 Not at all Very well 8 After 1 2 3 4 5 Not at all Very well 9 Was all of the information you needed included in this manual Yes __ No If not what was missing 10 The best aspect of this manual is 11 If you could change one aspect of this manual what would it be Other comments Return to Teradyne Inc 500 Riverpark Drive North Reading MA 01864 USA Attn J750 Product Support FAX 978 370 8292 Email customercare teradyne com Document Number 552 360 33 Revision 0622
347. rnational charges will apply Slovak Republic 63 32 341 7800 phone where is the international dial access code for the Slovak Republic International charges will apply No toll free access is available Slovenia 63 32 341 7800 phone where is the international dial access code for Slovenia International charges will apply No toll free access is available South Africa For toll free AT amp T Direct Access dial 0 800 99 0123 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for South Africa International charges will apply Venezuela For toll free AT amp T Direct Access dial 0 800 225 5288 then after the tone dial 1 800 837 2396 For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for Venezuela International charges will apply Other For locations without toll free access dial 63 32 341 7800 phone where is the international dial access code for the country from which you are dialing International charges will apply Replacement Parts 10 9 Table 10 2 Customer Location Repair locations for returns Defective Part Return Location Europe Africa Middle East excluding Israel Teradyne Netherlands Fellenoord 130 5611 ZB Eindhoven The Netherlands Attn Defective Return Depot Americas including
348. rom each receive edge offset value and applying this value to the receive edge deskew register The receive edges are now aligned to each other near the channel board relay in preparation for the user DIB calibration Customer DIB Calibration While all drive edges are aligned to each other and all receive edges are aligned to each other the drivers are not aligned to the comparators and differences in path lengths to the DUT have not been accounted for Once the customer DIB and all interconnections to the DUT are completed a TDR measurement into an open DUT fixture is performed for each digital channel used by the job This determines the electrical length from the driver to the DUT and back to the comparator The result of this measurement is the Round Trip Delay RTD value for each digital channel This value is used to realign the drive edges to each other the receive edges to each other as well as to align each digital channel s driver and comparator Maintenance Software 4 15 All drive and receive edges are realigned by e Determining the path delay one half the RTD value for each channel e Finding the largest path delay value for all channels e Subtracting each channel s path delay value from the largest path delay value and adding this value to the existing drive receive edge deskew values for each channel The RTD value for each digital channel is applied to that channel s comparator to align the channel s compar
349. rom the groove in the pogo block Note If necessary the pogo block groove can be cleaned using the stick end of a foam tip swab or a similar nonmetallic tool 4 Place a new o ring onto a disposable work surface then using a foam tip swab place a small bead of RTV 159 onto the surface of the o ring that will be placed into the groove in the pogo block Note The RTV should be applied in a smooth even bead that will ensure a good seal and a flat o ring surface 5 Place the o ring into the groove in the pogo block then gently press it down into the groove to ensure it is properly seated around the full surface of the block 6 Wipe off any excess adhesive from the o ring and the pogo block using a foam tip swab moistened with isopropyl alcohol 7 Repeat step 3 to step 6 for the other pogo block on the board if applicable 8 Once the RTV has fully dried minimum 24 hours reinstall the board into the tester as outlined in section Reinstalling Circuit Boards on page 8 14 Pogo Pin Removal and Replacement Do not touch the pointed ends of the pogo pins with bare fingers Always use the recommended tools Individual pogo pins can be replaced by pulling the damaged pin out of the pogo block using needle nose pliers or tweezers Once the damaged pin has been removed a new pin can be carefully inserted in place of the damaged one Note If more than one or two pins require replacement it is recommend
350. rque wrench and no 1 Phillips screwdriver bit Replace the mounting strap onto one side of the power supply assembly and secure using the four 4 8 32 x j long flat head Phillips screws Tighten the screws to 5 inch pounds using the adjustable torque wrench and no 1 Phillips screwdriver bit Repeat step 8 for the mounting strap on the other side of the assembly 10 Reinstall the power supply assembly into the tester as outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 Card Cage Assembly Removal and Replacement This section provides instructions for removing and replacing the card cage assembly in the tester in the rare instance that it needs to be replaced to correct a problem Note Removal of the card cage assembly should only be performed when absolutely necessary The following tools are required to replace the card cage assembly No 2 Phillips screwdriver 9 16 hex wrench Socket wrench 7 16 socket No 2 Phillips screwdriver bit Adjustable torque wrench up to 57 inch pounds Masking tape Side cutters or utility knife Tie wraps Repair 8 31 Removing the Card Cage Assembly Perform the following steps to remove the card cage assembly This procedure requires two people due to the size and weight of the card cage assembly Always wear a tested grounding strap while working on the J750E tester When removing the card cage confirm tha
351. ructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded and that Calibration has just been run 1 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 2 Properly ground the Calibration DIB then place it onto the DIB fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester Click the Performance tab in the maintenance interface 7 Select or deselect the hardware to be tested as represented in the Hardware Selection Deselection area of the maintenance interface CO O Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Select the Loop Tolerance Reduction and Verbosity areas of the maintenance interface as desired 9 Click the AC Performance button in the Hardware Selection Deselection area of the maintenance interface 10 Click Start Performance Verification starts and the test results display in the Test Program Output window Note The window updates to display results of individual tests as they are run The board that is being tested is displayed in the Hardware
352. s The following tools are required to replace the power supplies No 1 Phillips screwdriver No 1 Phillips screwdriver bit Adjustable torque wrench up to 5 inch pounds Perform the following steps to remove and replace the power supplies 1 Remove the defective power supply assembly from the tester as outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 2 If not already done place the defective power supply assembly on a proper work surface 8 30 J750E 512 Pin Test System Service Reference Manual 9 Always wear a tested grounding strap while working on the J750E tester If the defective power supply has a jumper installed remove the jumper and install it in the same location on the new power supply Remove the four 4 8 32 x j long flat head Phillips screws from the mounting strap on one side of the supplies using the no 1 Phillips screwdriver then remove the strap Repeat step 4 for the mounting strap other side of the supplies The two 2 individual supplies are now separated from each other Remove the two 2 8 32 x j long Phillips head screws from the handle attached to the defective supply using the no 1 Phillips screwdriver then remove the handle Replace the handle removed in step 6 onto the new power supply and secure using the two 2 8 32 x j Phillips head screws Tighten the screws to 5 inch pounds using the adjustable to
353. s po po pe LL O ft S ft Janjan e o 51240 usd age mg mig wg gus E R D H E H 3 1 31 d 1 H H Il 0 H H l 4 1 1 pe Wand PP ww Toy dl we oa g al vg and vg Wmd pte wua vg Wan vg ag wg ant wg age pte ug go ee Tee we Woo pde fora pe losas ge emol we ve ww jaa w kand vw el aw Igel pe Tool ween OOOO oO To To S Jo So A S S Jo J TU Tee Uewe Tag awe Tue Te 100 Qu poepen oyag odin op ORC bry ng F 001166 iew DUT vi ion t ica in identi RFID board pi 7 11 Figure 11 8 J750E 512 Pin Test System Service Reference Manual Col No Card Insert View Row A Row B Row C Row D Row E Row F Tester Rear 1 Coa Gn 7 Fans 2 Toi l coa n 3 n _ Eng 4 Eese coa o 5 EECH EE Sc SC 6 f osy f Sasy NEEN 7 pay Loan 383v 8 Cy tl sv VY 9 nn T TEEN w0 ave avi HV u Pava av OV 2 u RV VT 3 ev av PSS CV OPS wu ax i av PSR 2a DPS 5 sv wose favors 6 Cey asr LEES 17 18 19 20 Tester Front Air Power Flow Switch NOTES 1 Row A of the HDM power modules connects to Row B holes on the channel board daughter board 2 Dark border around signal group indicates a physical HDM connector module 3 Signals 24V DPS or 24V DPS R are for DPS expansion board use only 4 CAUTION SPARE 2 might have 34V on it in older systems 5 TCIO signals in grey colored cells are present only in slots 0 1 2 3 These are for DPS
354. s 273 kilograms Consult Teradyne for replacement instructions Special Hazard Warnings Information Symbols Electrical Hazard Warnings or other appropriate warnings have been placed in close proximity to potential hazards to warn a knowledgeable service person 2 32 J750E 512 Pin Test System Service Reference Manual External Hazardous Instrumentation Connections Power Sources Special AC or DC power sources when used may pose electrical hazards Other OEM Power Source Other OEM Original Equipment Manufacturers and miscellaneous power sources and or instrumentation may pose electrical hazards at the test station area External Mechanical Hazards Movable Mechanical Assemblies The test system s computer equipment cart and some optional external assemblies are movable Caution should be used when in proximity to these assemblies to prevent bodily injury and damage to the equipment Fixtures Some fixtures that are used with the J750E 512 Pin Test System may be heavy exceeding 45 pounds 20 7 kilograms These fixtures may require special handling such as e At least two people are required to lift or position the assembly e Special mechanical equipment may be required to lift or place the fixtures into position Other Safety and Regulatory Information Protective Grounding e Parts of the system that are fabricated of conductive metal are connected to protective ground that is brought into the system by the AC main
355. s sense connector pin 3 voltage good is connected to the 15v supply Teradyne Part Number 405 925 00 sense connector pin 6 inhibit The 15v supply sense connector pin 3 voltage good is connected to the 10 5V A B supplies Teradyne Part Number 405 924 00 sense connector pin 6 inhibit of each supply Next the 10 5V A master supply sense connector pin 3 voltage good is connected to the 208v supply module monitoring the 36V and 10V supplies Teradyne Part Number 405 925 00 sense connector pin 2 inhibit Next the 208V supply module Teradyne Part Number 405 925 00 sense connector pin 8 voltage good is connected to the 208v supply module monitoring the 5V and 10 5V Teradyne Part Number 405 920 00 sense connector pin 1 inhibit Next the 208V supply module sense connector pin 4 voltage good is connected to the 5v supply Teradyne Part Number 405 924 00 sense connector pin 6 inhibit Lastly the 5v supply sense connector pin 3 voltage good is connected to the 3 3v A B supplies master and slave sense connector pin 6 inhibit of both supplies As described above the voltage good output signal of gt 4 50V from pin 3 of a sense connector will enable the next supply in the sequence Conversely an inhibit input signal lt 0 9v to pin 6 of a sense connector will disable that particular supply and prevent the J750E tester from powering ON The capacitors on the inhibit lines filter 250KHz switching noise so
356. s and Technology Standards NIST There are two instruments required to perform the External Calibration and External Performance Verification on the J750E tester These instruments are e Agilent HP 3458A multimeter e Agilent HP 53181A frequency counter These instruments are used during both the External Calibration and External Performance Verification and must be certified as calibrated to NIST specifications Maintenance Software 4 7 The instruments used during the External Calibration and External Performance Verification on any J750E tester should be checked for this certification to be current by the Test Engineer who is performing the Calibration Since the instruments are calibrated to the NIST standard and are traceable all measurements made using the accuracy of these instruments are now traceable to the NIST standard CAL CUB Calibration Process This section describes the CAL CUB external calibration process The CAL CUB is used as the central reference standard for the entire system lts calibration circuitry accurately sources and measures voltages and currents After External Calibration the CAL CUB voltage source current source and metering circuits are distributed via the Cal DIB to all channels and provides parametric measurement for all options in the J750E tester and this is how Internal Calibration is performed Also located on the CAL CUB board is the SLI Super Linear Integrator circuit which is a super acc
357. s are shown in gray and clocks are shown in blue ET E E E AA EE T i PC Mother Board l i PCI Slots PCIT I I 1 p 1 GPIB Local Bus Serial Bus Interface Interface I lt gt i I l I I l ae 50MHz Clock Power OK CAL CUB TCIO Main amp Master Clock Data Power DB Ext DB amp System Buses Supply Power Calibration Power Supply Aux Fan Supplies Circuitry Monitor Monitors 100MHz Cl TCIO 0 Channel Board Pattern MTO W s ASIO APMU Generator Option 2 gt Option Option or ol Timing DSIO ale Pattern PPMU Patten 4 Quadrant Generator Option al Generator e Generator Channel ul DPS Calibration Calibration Differential E ircuil lon J Measure Grof DSP Circuitry VM p Measure APMU Channels Measure Pin W Utility LF and MF Source Max 64 Channels Elect x4 Bits and Capture x4 y 8 Single per Source amp Quadrant 9 2 References Supplies Relay Board Relay Board Relay Board Pogo Pins Pogo Pins Pogo Pins Pogo Pins Pogo Pins DIB F 000955A Figure 1 8 J750E system block diagram 1 16 J750E 512 Pin Test System Service Reference Manual Safety Information The Safety Information chapter of this manual provides information that can be used to identify the potential operation and service hazards of the
358. s cable or by some other defined ground connection e All external assemblies that are attached to the system should have their conductive supports or coverings connected to the system protective ground Use of 12 AWG through 8 AWG green with yellow stripe jacketed wire is recommended Electrostatic Discharge ESD The J750E 512 Pin Test System is designed to withstand a 6kv electrostatic discharge to the frame or covering without damage or malfunction Always wear a tested grounding strap that is properly connected to one of the ground strap connection points while working on the J750E tester The circuit boards inside the tester are very static sensitive For additional information refer to section Electrostatic Discharge ESD Damage Prevention and Control on page 2 34 Safety Information 2 33 Electromagnetic and Radio Frequency Interference The J750E 512 Pin Test System is designed to minimize conducted electromagnetic interference EMI to acceptable levels The system must be provided with a quality low impedance ground line through the AC main service Electrostatic Discharge ESD Damage Prevention and Control This equipment contains semiconductors which by composition are susceptible to damage from electrostatic discharge ESD The results of ESD are e Hard failures such as open or fused semiconductor junctions e Partial failure caused by stressed devices degrading performance and decreasing
359. s cleared during a clock cycle but remains set if the power has cycled The J750E power is monitored by the TCIO bus on the CAL CUB Figure 5 2 shows a block diagram of the PCI board Internal local Power Cycle Programmed Serial Bus Detect LBB Interface TCIO Bus 0 50MHz Clock Return Local Bus 50MHz Clock Interface E CLK Enable to CAL CUB LBI Power OK Retriggerable Serial Bus TCIO Bus 1 Timer x2 Interface 2usec 36 min Free Running Timer 200ns F 000164 Figure 5 2 PCI block diagram Hardware Description 5 5 Calibration Clock Utility Board CAL CUB The Calibration Clock Utility Board CAL CUB performs a number of functions in the J750E tester Distribution and control of J750E TCIO data buses Sync signals for data transfer Generates and distributes master clock Provides switched power to the Device Interface Board DIB Monitors system power supplies 3 3v 5v 5v 10 5v and 24R ground Monitors DIB power supplies 5v 12v 15v 15v and 24v Monitors the fans and opens the main contactor e Reads back DIB ID prom information e Contains calibration circuitry Voltage and Current Source References Metering Circuit Master Clock Reference SLI TDR Pulse Data Distribution Two data buses Data 0 and Data 1 are generated by the PCI board and sent to the CAL CUB The CAL CUB generates two AB data buses to send data to the chann
360. s one Pattern Generator per board The Pattern Generator contains Small Vector Memory SVM and has Large Vector Memory LVM attached These generate SVM and LVM addresses that are sent over the State Bus to the digital channels The Pattern Generator serves as the distribution point for the Test Computer Input Output TCIO The TCIO bus is a serial bus that is interfaced to the Test Computers bus and is distributed to all of the boards in the tester There can be multiple Pattern Generators in the system but only one of these uses the TCIO directly from the personal computer The remaining Pattern Generators pick up their TCIO signal from the backplane The multiple Pattern Generators synchronize themselves using a combination of the TCIO and the Fail Bus 5 18 J750E 512 Pin Test System Service Reference Manual Auxiliary Timing Generator The Auxiliary Timing Generators ATGs have Small Vector Memory SVM and Large Vector Memory LVM memory controllers formatting and timing to drive waveforms They also contain the compare logic The pin electronics adds the levels to the waveform The ATG interfaces to the State Bus Auxiliary Bus and ATG TCIO Bus and it outputs to the to the Fail Bus Per Pin Measurement Unit PPMU The Per Pin Measurement Unit PPMU can force and measure voltage or current The voltage range is from 2 to 7 volts The current ranges are from 200na to 2ma Analog to Digital Converter The Analog to Digital c
361. s to bus bars in the backplane The ground bus bar connects back to AC ground at the back plane Figure 6 20 shows a block diagram of the system grounding See A ss Sed Input Power AC Power Vault Module ges Digital Facility l Channel dad Power Board 1 r WY Ta one l CR or Wye i ER GS Power Supbly l CTO Harness gt l DGS Wye Ground Bus l Facility L BES a Ground l CA CUB Tied to DGS Chassis Ret I l AC Ground to Power Supplies F 000215A Figure 6 20 J750E Test System grounding block diagram AC DC Power and Cooling 6 31 6 32 J750E 512 Pin Test System Service Reference Manual Maintenance The Maintenance chapter of this manual describes the maintenance activities that should be performed as part of a regularly scheduled maintenance program Some of the procedures outlined in Chapter 8 Repair may also be used as part of the maintenance activities The procedures in this chapter are designed for use by trained maintenance personnel only The following information is covered in this chapter e Maintenance Overview e ESD Precautions e Routine Maintenance Procedures 7 1 Maintenance Overview A regular maintenance program is important to help achieve maximum system availability and uptime Proactive maintenance programs can help reduce unplan
362. se 1 Phase 2 Phase 3 Ground 10 5 volts 20 Amps AW Module 5 volts 220 Amps A4 Module P N 405 920 00 24 volts 33 Amps x2 System Utility Supply D5 Module 5 volts 90 Amps DT Module 10 5 volts 160 Amps CW Module P N 405 924 00 3 3 volts 320 Amps x2 2 H7 Module outputs in parallel 24 volts 33 Amps DPS Supply D5 Module P N 405 325 00 15 volts 16 Amps C1 Module 10 volts 15 Amps and 36 volts 5 Amps ES Module 34 volts 20 Amps J8 Module P N 405 925 00 Figure 6 4 J750E tester Input Power Module to DC power supply power distribution AC DC Power and Cooling 6 7 DC Power Supplies The tester has two main power supply assemblies each containing two 2 multi supply power supply modules which supply DC power for the system electronics fans and the DC to DC converters that power the user s supplies The supplies are distributed to the backplane through bus bars from the supplies to the backplane The 405 920 00 and 405 925 00 power supplies contain a logic board to ensure correct system power up sequencing Figure 6 5 Figure 6 6 Figure 6 7 and Figure 6 8 show the layouts of each of the four 4 power supply modules of the J750E tester Table 6 2 lists the DC power supply voltages and specifications 6 8 J750E 512 Pin Test System Service Reference Manual E 1 888 10 AC Input F 001004 SPF3
363. se steps will provide valuable information and set a baseline status for the tester prior to performing repairs This baseline information will be very useful if issues are encountered after the repairs are completed Run Checkers and Save Data Log File Open the J750 Maintenance User Interface run Checkers and save the data log file as follows 1 Close any test applications that may be running on the test system computer 2 Click Start on the Windows Taskbar 3 Select Programs select Teradyne J750 Checkers then click J750Maint in the program list The J750 Maintenance Interface is displayed on the screen 4 Create a data log file as follows Select Open Log from the Log pulldown menu The Read Log File dialog box is displayed on the screen Complete the File Name window of the dialog box as appropriate then click Open Note It is recommended that you save the file to the default directory location Notepad is launched and a warning dialog box is displayed on the screen questioning if you want to create the new file Click Yes Note Ensure that the tester has had power applied for a minimum of one half hour prior to running Checkers 8 4 J750E 512 Pin Test System Service Reference Manual 5 Run the following Checkers as outlined in section Running Maintenance Programs on page 4 32 of Chapter 4 Maintenance Software Quick Check Module Check 6 When Checkers is complete select Save fro
364. sed by a per pin DSP or stored directly into the Capture Unit RFID Option RFID Device Pattern Control i MeasHi gt To Measure VoltDropPinHi Range EE 3 MeasLo E Selection AltLow gt ei b PESSE l ChHi 8 A 4 i EN mm Il gt PinHi gt R C Carrier lt a 20R _ o To Measure LATA Resistor F Range j yf 50R ItDiff 8 Frequency Ay Coupling 400R Volt ae Source Hoi gt Ma 5K Y ChLo C J gt me 1 Loy PinLo gt SEH R C f AC DC Coupling E MeasLo gt To Measure VoltDropPinLo Range 11 Selection MeasHi Pattern Control RFID Receiver Measurement Configuration Figure 5 27 RFID receiver measurement configuration Computer MeasHi Range 16Vpp Select 4Vpp Measurement Backend Figure 5 28 Measurement back end MeasLo Strobe Frequen Source 5 46 J750E 512 Pin Test System Service Reference Manual Demodulation with Per Pin DSP Once the device receives a command transmitted from the tester using for example the method of amplitude modulation it starts to work on the response It then sends a command back to the tester by modulation of a load causing a change in the magnetic field in short time slots This load modulation also called back scattering is accomplished by switching a load either a resistor R or a capacitor C between the antenna pins At the pin ele
365. ses the standard J750 Maintenance Software interface From this interface the test mode and options are selected and a TDR or Continuity program can be run 4 22 J750E 512 Pin Test System Service Reference Manual Menu Bar The interface contains a menu bar with following menu selections e File e Log e Options e Configuration e Help Each menu bar selection activates a pulldown menu with menu commands that pertain to all of the different maintenance programs A short description of each menu and its associated commands follow File Exit This command allows the user to close the Maintenance User Interface Log Allows the user to log data to one of the following text files SPC Log On This command creates a Statistical Process Control SPC log file and a Statistical Test Data File STDF file which contains parametric test data Note This option is typically used only in the factory to ensure hardware reliability Test Log On This command lets the user create a new log file of the data of the test results when the testis run This log contains the same information as the output window Open Log This command launches Windows Notepad for viewing the data of an existing log file Options Test Flow Options This comand launches a dialog box where the user can select the following test options e Maximum Number of Failures Allows the user to select the maximum number of failures that can occur in a test If the selec
366. shows the dialog box Microsoft Excel x Remove J750 Cal DIB Install LMF Cal DIB F 001030 Figure 4 12 DIB change prompt dialog box 4 Properly ground the Calibration DIB 5 Place the DIB vacuum switch on the tester to the UNLOCK off position 6 Remove the Calibration DIB from the tester Place the DIB into a proper storage container to prevent ESD and physical damage 4 60 J750E 512 Pin Test System Service Reference Manual 7 Properly ground the MSO Calibration DIB Part Number 361 212 00 then place it onto the DIB fixture on the tester 8 Place the DIB vacuum switch on the tester to the LOCK on position 9 Press down on the DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 10 Remove the ground connection from the DIB and the tester 11 Click OK in the dialog box A dialog box is displayed prompting you to install the DC Meter Daughter Card onto the MSO Calibration DIB Figure 4 13 shows the dialog box for an LMF installed in slot 7 of the tester Microsoft Excel xj Install LMF Cal DIB and insert DC Meter Rider Card into Slot 7 for DC Meter Calibration F 001031 Figure 4 13 DC Meter Daughter Card installation prompt dialog box 12 Place the MSO DC Meter Calibration Daughter Card Assembly 445 016 00 onto the appropriate connectors on the DIB that represent the slot where the LMF module is installed in the tester Figure 4 14 shows the daughter
367. st System Service Reference Manual Power Supply Sequencing Description for the J750E Tester Pressing the green On Off switch of the tester starts the power on sequence Holding the switch in for 3 5 seconds will close the contactor in the Input Power Module providing 208VAC to each DC power supply As the system powers on the power supply sequencing becomes active Refer to Figure 6 10 for the J750E tester power supply sequencing flow Note The output good and inhibit connections detailed on Figure 6 10 indicate a single connection between one power supply and the next A high level gt 4 50V DC enables the next supply Conversely a low level 0 9V DC will inhibit the next power supply in the sequence The 34V PS Teradyne Part Number 405 925 00 is the first supply in the sequence Once the supply has reached its output of 34 volts the voltage good signal on the sense connector is 4 50V DC or greater The voltage good signal connects to the next supply inhibit input Because the level is high the next supply is enabled Referring ahead to Figure 6 10 the 34V output good signal is connected to the 24V DPS supply Teradyne Part Number 405 325 00 sense connector pin 6 inhibit and the 24V Utility A B supplies Teradyne Part Number 405 924 00 sense connectors pin 6 inhibit There is no output good signal pin 3 from the 24V DPS power supply It is not part of the sequence Next the 24v Utility A B supplie
368. st test as well as the overall test results pass or fail 11 Run additional Calibration as desired or proceed to the appropriate section of this chapter for the particular maintenance program you want to run 12 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 4 50 J750E 512 Pin Test System Service Reference Manual 13 Place the DIB vacuum switch on the tester to the UNLOCK off position 14 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 15 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage AC DC Calibration Run AC DC Calibration as follows Always wear a tested grounding strap while working on the J750E tester Note Do not run Calibration on a tester that is not in known working condition Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded 1 Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester as follows 2 Properly ground the Calibration DIB then place it onto the DIB
369. sted grounding strap while working on the J750E tester Note Since External LMF Calibration does not log temperature and date performed Itis a good practice to make note of these items at the top of the log file created as outlined in section Launching the Maintenance Interface on page 4 33 It is also good practice to list things like Engineer Technician name ambient system temperature as well as any other system specific information that might be useful for troubleshooting purposes Note These instructions assume that the J750 Maintenance Interface has been launched and the J750Maint xls job has been loaded Note Teradyne IG XL V3 40 09 and J750 Maintenance Software V7 23 10 or greater must be installed on the test system computer prior to running External LMF Calibration The following items are required to run External LMF Calibration e Agilent HP 3458A multimeter must be calibrated to traceable standard e Fluke 5790 AC Measurement Standard must be calibrated to traceable standard e J750 512 Calibration Device Interface Board Cal DIB Teradyne Part Number 239 004 01 e MSO Calibration Assembly Kit Teradyne Part Number IT 110 00 MSO Calibration DIB Teradyne Part Number 361 212 00 MSO AC Amplitude Accuracy Calibration Daughter Card Assembly Teradyne Part Number 445 015 00 MSO DC Meter Calibration Daughter Card Assembly Teradyne Part Number 445 016 00 50 ohm SMA to N type RG142BU Cable
370. stomer DIB Calibration 15 Optional Instruments Calibration oooncnicninonocinononnnonononononononan cnn nonn crono nn concen no onn Eske eroe Ee rE ar REES conan 16 Converter Test Option 16 Mixed Signal Option 16 Analog Parametric Measurement Unit 16 Calibration Hada is 16 Performance V erification lata end oia 17 Performance Verification Overview 17 DC Performance Verification 18 Calibrated Circuitry 18 COMM ACL O ee 4 18 J750 Maintenance nl ne 4 20 Tester Maintenance Programs ias is 4 20 Quick Check a A a ated 21 Modus NEE 21 Continuity CHECK ooo odo 21 Calibration intemal coto do e Att edd eegen 22 Performance Verification Internal aariaa ea a a A a eaa 22 External Calibracion ie ee 22 External Performance Verification 1 ee cnica nica ds E AAE EE E cacao 22 COMTACICHECK eternal diri li direc 22 vii Menu CL 4 23 O NN 23 LOBA iii 23 Options gt pitt EES Ee 23 VE EE 25 TR 25 Maintenance CONTO EE 4 25 Selection A tae os Levant ave ade e e rer R bee oa ah dees ei a E ie el ENEE 26 Hardware Selection Dese le IO A Aes ee ee Se ee 26 A NN 26 Tolerance Reduction Setting inenen nono nnc on non non recono nn AE E nan eran rencor nc nacen enn IANS S E 26 K lege LEE 26 Debug Mode cocos coseno co sotts shoo E EE E EE 26 Debug Mode Dialog Box 28 Status Wind EE 29 Load Program Unload Program Burton 29 Systemwide Tests Button gece A E Se EI NV ERa NEEE O AEn OEE a eE Ee 29 E Calibration Bt A ai 29 AC Performance B
371. surrounding frame and fan airflow The filter can be removed by carefully pulling it out of the outside frame and away from the control panel assembly located in the center of the tester The filter can be washed with mild soap and water and then dried before replacing it on the tester It is replaced by inserting it around the switch assembly then back in the surrounding frame Additional filters maybe purchased to speed up the maintenance process or to replace damaged filters Note Different filter material should not be substituted as this may change or restrict airflow The material used in the filter is 20 Pores Per Inch PPI open cell foam Fan Maintenance There are four 4 fans in the fan plate assembly installed at the rear of the tester There are also two 2 auxiliary fans inside each of the two 2 power supply jackets located inside the tester All of the fans have sensors that are read back by the circuitry on the CAL CUB The sensor output is normally high but if any fan slows or stops the sensor output goes low and the ALLFANOK circuit or signal starts a 2 minute timer If after 2 minutes the fan monitor still shows a problem the SYSPWROFF circuit or signal opens the main tester contactor shutting off system power 7 18 J750E 512 Pin Test System Service Reference Manual Additionally there is a single fan located at the rear of each of the four 4 power supply modules mounted inside the tester None of the fa
372. t Alignment of Alignment F 000126 Figure 9 1 Pogo pin alignment examples Note Be sure to look straight down on the pins Viewing the pins at angle may provide for false registration of the pin in the circle Figure 9 2 shows the proper viewing angle Proper Viewing Improper Viewing Angle Angle 512 Clear DIB Vacuum Alignment Gauge Part Number 235 711 00 F 000881 Figure 9 2 Pogo pin viewing angle 7 Once all of the pins have been checked place the DIB vacuum switch on the tester to the UNLOCK off position 8 Remove the Clear DIB from the DIB fixture of the tester 9 If the pins of any of the pogo blocks are out of alignment proceed to step 4 of section Contact Problem Troubleshooting on page 9 4 Troubleshooting 9 3 Contact Problem Troubleshooting This section provides information for troubleshooting contact problems in the J750E tester Perform the following steps to determine if DIB contact is a problem Always wear a tested grounding strap while working on the J750E tester 1 Confirm that the pressurized air source connected to the tester is between 70 101 PSI 2 Confirm that the DIB pulls down and seats firmly on the ISO pin spacers black buttons on the DIB fixture when the vacuum switch is turned on Note Ensure that the DIB pulls down at all slots on the DIB fixture especially the outermost slots Note To ensure that proper vacuum is being applied to the DIB vacuum
373. t all cables and wires are properly labeled prior to disconnecting them If any cable or wire is not identified make sure to do so prior to disconnecting it This will help to see that the cables are properly connected when the card cage is reinstalled Make note of the routing of all cables and wires before disconnecting them Also make note of any tie wraps used to secure the cables and wires This will help to ensure that the wires and cables are properly routed and secured when the power supplies are reinstalled Remove the circuit boards installed in the tester as outlined in section Removing Circuit Boards on page 8 11 11 Close the doors of the tester then remove the DIB fixture assembly as outlined in section Removing DIB Fixture Assembly on page 8 16 12 Remove the power supply assemblies as outlined in section J750E Tester Power Supply Assembly Removal and Replacement on page 8 21 13 Position the tester so that the DIB mounting surface faces the manipulator perpendicular to the floor the doors face out and the Power Switch faces up 8 32 J750E 512 Pin Test System Service Reference Manual 14 Cut and remove the cable ties from the three 3 Calibration Clock Utility Board CAL CUB cables using the side cutters 15 Position any disconnected cables so that the connectors are on the outside of the tester housing out of the way of the card cage Secure the connectors to the outside of the housing using masking
374. t be installed on the test system computer prior to running External APMU Calibration Run External LMF Calibration as follows Note The following instructions were written for running External APMU Calibration using J750 Maintenance Software V7 23 10 Instructions for using a different version of the J750 Maintenance Software may vary The following items are required to run External APMU Calibration e Agilent HP 3458A multimeter must be calibrated to traceable standard e GPIB cable 2 3 or 4 meter length as required e APMU calibration reference cable Teradyne Part Number 535 085 00 e J750 512 APMU Calibration Device Board Interface Board Cal DIB Teradyne Part Number 239 004 02 Run External APMU Calibration as follows 1 Connect the GPIB cable to the connector at the rear of the Agilent HP 3458A multimeter and the connector on the GPIB card at the rear of the personal computer of the tester 2 Apply power to the multimeter and allow it to warm up for a minimum of 2 hours Note The meter s GPIB address must be set to 22 to ensure proper communication between the meter and the personal computer The GPIB address 22 is the multimeter s default setting 3 Check and set the meter address as follows Press the Shift lt On Off keys to turn on the front panel menu Press the lt key twice two times to access I O Menu selection Press the v key to access HP IB Addr selection Press the
375. t cable is for a PG48 strain relief System Input Power Requirements The input power requirements for a 512 channel J750E Test System with all available options installed are e Input voltage ranges 208 VAC 5 e Input current 32A phase e Frequency 50 or 60Hz 2Hz e Phase Type 3 phase delta 2 26 J750E 512 Pin Test System Service Reference Manual AC Power Vault Input Power Requirement The input power requirements for the AC Power Vault are shown in Table 2 2 Table 2 2 AC Power Vault input power requirements Input Voltage Ranges 190 VAC 5 200 VAC 5 208 VAC 5 240 VAC 5 380 VAC 5 416 VAC 5 440 VAC 5 480 VAC 5 Frequency 50 or 60Hz 2 Hz Phase Type 3 phase delta The customer must have the power connection to the AC Power Vault completed by a licensed electrician familiar with all relevant local and national building electrical codes It is the responsibility of the customer to connect the power cable of the AC Power Vault to the power source of the factory facilities The connection should be made to a circuit breaker distribution box that satisfies all of the relevant electrical code requirements of the customer s geographical area All other system AC cables and power cords should be connected to defined system outlets unless an option specifically requires a separate branch service connection and is specifically d
376. t no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred When complete the results display in the Test Program Output window 5 To run additional maintenance programs proceed to the appropriate section of this chapter for the particular maintenance program you want to run 6 If no additional maintenance programs need to be run select Exit from the File Menu in the J750 Maintenance Interface to close the interface and the Test Program Output window 7 Disconnect the cables from the Agilent or HP multimeter and the Calibration DIB 8 Power down the Agilent or HP multimeter then disconnect it from the power source Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester 9 Place the DIB vacuum switch on the tester to the UNLOCK off position 10 Ground the Cal DIB then remove the Cal DIB from the DIB fixture on the tester 11 Remove the ground from the Cal DIB then place the DIB into a proper storage container to prevent ESD and physical damage MSO LMF The J750 Maintenance Software allows the following MSO LMF Calibration and Performance Verification programs to be run from the standard Maintenance User Interface e External LMF Calibration e External LMF Field Performance Verification Running External LMF Calibration 4 58 J750E 512 Pin Test System Service Reference Manual Always wear a te
377. tactor and causing it to open The contactor opening will remove power to the system power supplies essentially turning off the tester System Power Supply Detail If a power supply fails and either its output voltage does not rise to its rated output during power on or after power on drops below its rated output the CAL CUB Fan Fail circuit will activate and remove AC power from the tester The CAL CUB Fan Fail circuit monitors the 5V 5V and 3 3V power supplies since they power the circuitry When powering on the J750E if one of these supplies is not present the tester will not stay powered on After you release the Power On switch the system will shut down In the case of the system powered on again the loss of AC DC Power and Cooling 6 15 one of these supplies will activate the Fan Fail circuit In either case the loss of one of these supplies will turn off Q15 then K2 will open shutting down the system Both a fan failure and a power supply failure will turn off Q15 and open K2 Additional information on power supply sequencing follows Note The 2 minute fan delay is not implemented when there is a power supply failure The system will shut down immediately Input from Power Vault Fan Fail Connector Phase 1 512 CALCUB Shutdown Right Power Supply Bay Supplies e 00 MO On Left Power Supply Bay gt Supplies Phase 1 Phase 2 Phase 3 Ground 2 o enowJ PWR RTN 24 Vac L Pow
378. tain to all of the different maintenance programs A short description of each menu and its associated commands follows e File Load Settings This command allows the user to load a previously saved job Save Setting This command allows the user to save a job Exit This command allows the user to close the dialog box e Help Batch Mode This command launches the Batch Mode On line Help window Batch Mode can also be enabled in a command line mode Once the dialog box is launched the following test options are available e Job Queue e Slots e Test e Iteration e Logs e Test Log e Spc Log e Options After the dialog box is completed with the appropriate job information the job can be saved or run as appropriate Detailed instructions for using the Batch Mode option can be found in the on line help MSO Options Tools With the exception of the Field Performance Verification Tests selection the MSO Options Tools commands are for factory use only and are not intended for field use 4 24 J750E 512 Pin Test System Service Reference Manual e Field Performance Verification Tests This command sets the software to allow the user to run External LMF Field Performance Verification If not selected the test runs in the factory mode Targeted Checker Options This command is for factory use only and is not intended for field use Configuration View Configuration This command launches a Windows Notepad listing of the tester
379. tal of 8 slots for channel boards or other full size instruments Circuit Boards The basic J750E board set consists of a PC Interface Calibration Clock Utility Board Channel Boards Relay Boards and Device Power Supply boards Optional instruments are also available These include a Converter Test Option a Memory Test Option a Mixed Signal Option and an Analog Parametric Measurement Unit Detailed information on the J750E boards is available in Chapter 5 Hardware Description A general overview of the boards follows e PCI The Personal Computer Interface PCI board is the interface between the PC portion of the system and the tester It interfaces between the local bus in the PC and the Tester Control Input Output TCIO bus on the CAL CUB The PCI is installed in the test system s personal computer e CAL CUB The Calibration Clock Utility Board CAL CUB provides a number of utility functions in the tester The CAL CUB interfaces the PCI data buses to the other boards in the tester generates and distributes the master clock provides switched power to the Device Interface Board DIB and monitors the fans and DC power supplies It also contains the TDR and DC source and measure circuitry that is used to calibrate the tester e Channel Board The channel board is a high speed digital subsystem on a single board Each channel board has 64 channels and contains utility bits and relay drivers e Relay Boards The relay boards switch the se
380. ted number is exceeded when the test is run the test is aborted Setting this value to zero disables this function The valid range for this field is O to 32767 The default value is 200 e Reset Calibration for Module Check and Quick Check This command lets the user clear existing calibration data before running Quick Check and Module Check The reset option does not modify the calibration data file CalibrationData txt but nulls out the use of the file The calibration data remains cleared until a new Calibration is run or the workbook is loaded e Enable Thermal Warmup When selected this command heats up all of the channel boards in the tester for approximately 30 minutes to ensure that the tester is at a stable temperature before running Calibration Maintenance Software 4 23 The Thermal Warmup function should not be used e Format Output Window Text to Window Size When selected the text in the Test Output Window wraps as appropriate to fit the size of the window e Once the dialog box is completed as desired click OK to close the box and save the settings Batch Mode This command launches a dialog box where the user can run multiple jobs in succession of each other Batch Mode also allows a series of jobs to be saved to a file and loaded back into the interface at a later time The dialog box has its own Menu Bar with a File and Help selection Each menu bar selection activates a pulldown menu with menu commands that per
381. tenance User Interface MUI YN WARNING La Communication has been lost with the channel board in slot X This indicates a serious situation Be ready to troubleshoot this event prior to turning tester power back on Troubleshooting Procedures Troubleshooting power problems can be divided into two distinctive types of failures e Problems Detected by IG XL e Problems Detected by the CAL CUB The procedure outlined in this section will help you isolate a failure of both types Always wear a tested ground strap while working on the J750E tester Problems Detected by IG XL If the IG XL Software Control error message is displayed in the Status Window of the MUI perform the following steps 1 Open the file C Program Files Teradyne lG XL Vx xx xx tester CurrentConfig txt Note Vx xx xx refers to any version of IG XL installed on the test system computer Note Do not close the window once it has opened 2 If the Maintenance User Interface MUI is running ensure that the appropriate Checker workbook is loaded If the MUI is not loaded launch the J750 Maintenance Software and load the maintenance program 3 Reapply power to the tester 4 If you are in the Engineering Mode of IG XL restart the DataTool If you are in the Service Mode click the Reset button on the MUI window 5 Open the new CurrentConfig txt file that was just created by powering up the tester 6 Compare the new file with the
382. ter This section provides a brief description of the following programs e Quick Check e Module Check e Continuity Check 4 20 J750E 512 Pin Test System Service Reference Manual Calibration Internal e Performance Verification Internal External Calibration External Performance Verification ContactCheck Quick Check Quick Check verifies communications to each board in the system and performs a basic functional check on the boards The checks are performed on a subset of the hardware on each board to provide a reasonable confidence level that the system is working Quick Check does not require internal calibration but if a valid calibration file CalibrationData txt is present in the C Program Files Teradyne IlG XL Vx xx xx tester folder of the test system computer Quick Check will reference it Therefore the calibration file should be reset or renamed prior to running Quick Check Note Vx xx xx refers to any version of IG XL installed on the test system computer Modue Check Module Check performs a thorough test of the tester s analog and digital hardware and verifies that each circuit in the tester is functioning properly to specification Module Check does not require internal calibration but if a valid calibration file CalibrationData txt is present in the C Program Files Teradyne IlG XL Vx xx xx tester folder of the test system computer Module Check will reference it Therefore the calibration file shou
383. ter Updated figures and tables where appropriate Updated GCS parts ordering information xix xx J750E 512 Pin Test System Service Reference Manual System Overview The System Overview chapter of this manual provides a general description of the J750E 512 Pin Test System Included in this chapter is a list of system features a description of the major assemblies of the system and the location and basic description of smaller sub assemblies that are also a part of the J750E Test System Detailed information on the circuit boards and other J750E Test System assemblies is available in other chapters of this manual The following information is covered in this chapter e System Description e Overall System Block Diagram System Description The J750E 512 Pin Test System provides the functionality and flexibility needed to test a wide variety of sophisticated Very Large Scale Integration VLSI devices from microcontrollers to ASICs and is built on a platform that will grow with the customers testing needs The J750E tester integrates an entire digital sub system onto a single 64 pin channel board This means that an entire 512 pin tester can be made up from 8 channel boards plus several support boards This integrated design greatly reduces the complexity and size of the tester resulting in a test head only system that can sit on top of a prober The J750E 512 Pin Test System is a full featured 100MHz VLSI tester Th
384. ter maintenance Xx Maintenance 7 3 Table 7 3 J750E Checker and Calibration Schedule Frequency Time Required Notes Tester Checkers and Calibration Quick Check Monthly By Customer 1 minute Note 1 Increase frequency as required Module Check Monthly By Customer 5 5 minutes Note 1 Increase frequency as required Calibration Internal Quarterly By Customer 5 5 minutes Note 1 Performance Verification Quarterly By Customer 9 minutes Note 1 Increase frequency as Internal required Instrument External Calibration and Performance Verification CAL CUB External Quarterly By Customer 10 minutes Note 2 Calibration CAL CUB External Quarterly By Customer 10 minute Note 2 Performance Verification CTO External Calibration Quarterly By Customer 5 minutes Note 2 CTO External Quarterly By Customer 5 minutes Note 2 Performance Verification MSO External Every 6 Months By 30 90 minutes Note 2 Calibration Customer APMU External Every 6 Months By 30 60 minutes Note 2 Calibration Customer Notes 1 Time per channel board time dependant on system configuration IG XL and Maintenance Software version and Test System Computer model 2 Requires external equipment calibrated to traceable standard Also requires Certificate of Calibration to be completed 7 4 J750E 512 Pin Test System Service Reference Manual Table 7 4 J750E Checker
385. tion Removing Circuit Boards on page 8 11 2 If applicable remove the channel board from its storage container and place it on a proper anti static work surface with the relay board mounting screws facing up 3 Remove the two 2 nuts securing the relay board to the connector using the 5 32 nutdriver 4 Slide the relay board away from the channel board 5 Place the relay board onto a proper anti static work surface with the component side facing up 6 If applicable place connector covers onto the connectors of the relay board then place the board into a proper storage container to prevent ESD and physical damage 7 Proceed to section Reinstalling the Relay Board on page 8 47 as appropriate Reinstalling the Relay Board Perform the following steps to reinstall the relay board onto the channel board 1 If applicable remove the new relay board form its storage container and place it onto a proper anti static work surface with the component side facing up 2 Remove any connector covers that are installed on the board Repair 8 47 Always wear a tested grounding strap while working on the J750E tester Position the relay board so that the connectors line up with the connectors on the channel board Install the relay board by pushing it onto the channel board until it is fully seated on both connectors Secure the relay board to channel board connector using two 2 nuts previously removed Tighten the nu
386. tion for the input waveform Data bit 1 selects High level and data bit O selects Low level Note that there is only one single data bit for a RFID differential pin pair An Alternate Level Set can also be selected by the Pattern Generator using Pattern OpCode start_alt_level stop_alt_level in place of the Main Level Set to simulate over and undershoot conditions The Carrier frequency is adjustable from O to 15 MHz The connection to the device under test is either through a capacitor C AC coupling or direct DC coupling This is activated for a RFID differential pin pair In the default position of the DUT connect relay each DUT pin PinHi or PinLo can be connected individually to a digital channel from a different channel board that provides PinPMU or BoardPMU capability for standard parametric measurements RFID Receiver The Receiver can be configured to measure the following voltages see Figure 5 27 and Figure 5 28 e Voltage difference between PinHi and PinLo of the RFID differential pin pair e Voltage drop across the coupling resistor of the PinHi e Voltage drop across the coupling resistor of the PinLo Hardware Description 5 45 The voltage value is then fed to the input of the Measurement Unit of the RFID Option that contains various voltage ranges 16V 8V 2V The input voltage range of the 12 bit ADC that is clocked by the Strobe Frequency Source is 2V The output of the ADC can be either proces
387. to the correct length using the side cutters then strip off approximately 3 8 0 95 cm of insulation 5 Insert the fan wires into the appropriate locations in the terminal block matching colors to assure the correct connection Tighten the terminal block screws to 4 inch pounds using the adjustable torque wrench and medium slotted screwdriver bit 1 4 6 Tighten the tie wraps then cut the ends of the tie wraps using the side cutters 7 Replace the fan plate cover onto the fan plate assembly and reconnect the two lugs to the circuit breaker 8 Reinstall the four 4 8 32 x 5 16 long socket head screws into the mounts to secure the cover to the fan plate assembly Tighten the screws to 15 inch pounds using the adjustable torque wrench and 3 32 hex wrench bit 9 Replace the fan plate assembly onto the tester as outlined in section Reinstalling Fan Plate Assembly on page 8 20 8 42 J750E 512 Pin Test System Service Reference Manual Power Supply Jacket Fan Replacement This section provides instructions for removing and replacing the fans in the power supply jackets mounted to the card cage of the J750E tester The following tools are required to replace the power supply jacket fans e No 2 Phillips screwdriver 3 32 hex wrench e 1 open end wrench Adjustable torque wrench up to 15 inch pounds No 2 Phillips screwdriver bit 3 32 hex wrench bit e 1 socket Removing Power Supply Jacket Fans Perform
388. tor of the wire harness at the same time 3 Disconnect the sense line connectors by wiggling the connectors and pulling them up away from the supply Note The sense line connectors are white 6 pin or 12 pin connectors connected at the bottom of the power supplies There may not be a sense line connector attached to every module of the supplies 4 Remove the two 2 8 32 x 3 8 long Phillips head screws 8 split lock washers and 8 flat washers that connect the 10 5 volt power jumpers to the bus bars using the no 2 Phillips screwdriver then remove the power jumpers 5 Remove the 10 32 hex nuts 10 split lock washer and 10 flat washer securing the bus bar to the negative terminal of the 5 volt power supply terminal using the socket wrench and 3 8 socket 6 Remove the four 4 5 16 hex nuts 5 16 split lock washers and 5 16 flat washers that connect the bus bars to the 10 5 volt and 5 volt power supplies using the socket wrench and S socket 7 Remove the three 3 bus bars from the backplane connection bars as follows Remove the three 3 j 20 x 5 8 long bolts j split lock washers and j flat washers at the top of connection bars using the 7 16 open end wrench Loosen the three 3 j 20 x 5 8 long bolts at the bottom of the connection bars using the 7 16 open end wrench Pull the bus bars up to remove them from the supplies and the backplane connection bars 8 Loosen the screws o
389. total current forced Figure 5 23 shows a schematic diagram of the Force Current Gang Mode 5 40 J750E 512 Pin Test System Service Reference Manual APMU eege i 1 4 1 APMU 1 41 APMU gt 1 41 APMU 1 41 l lt F 000858 Figure 5 23 Force Current Gang Mode schematic diagram APMU Digital Circuit Description The APMU digital interface consists of e Pattern Generator with LVM memory e Eight 8 APMU FPGAs with Data Buffer Memory e Custom DC FPGA The Pattern Generator keeps the APMU in sync with the Digital Channels in the rest of the system Figure 5 24 shows a block diagram of the APMU digital control circuitry The APMU FPGA controls the functions of the APMU Source and Acquire circuitry while the Data Buffer Memory stores analog Source and Acquire data The custom DC FPGA controls the Differential voltmeter and CAL circuitry The setup memory stores the setup condition of each Differential voltmeter to reduce test time There is one DC FPGA per channel board and it controls the Differential Voltmeter Calibration Circuit and initiates the numbering process for both the APMU FPGA and the PG The DC FPGA also provides the necessary interface to read write the channel board s ID PROM the EEPROM which stores the calibration factor the temperature sensor circuit and the DIB utility bits The DC FPGA also provides the interface to the Setup RAM The Setup RAM stores th
390. tput Maintenance 7 21 Always wear a tested grounding strap while working on the J750E tester Note All DC output measurements should be made with the meter at the sense lines of the power supply connectors Figure 7 7 shows the proper location for measuring DC output voltage Measure DC output at sense lines Yellow is high on supplies Black is high on supplies F 000216 Figure 7 7 DC output voltage sense lines 1 Obtain access to the power supplies as outlined in section Opening the Doors of the Tester on page 8 9 section of Chapter 8 Repair 2 Measure the DC voltages to verify that they are within specification as outlined in Table 7 8 7 22 J750E 512 Pin Test System Service Reference Manual Power Voltage Ripple Nominal ee Supply Voltage Voltage Spec Limits Spec Notes Assembly 9 mv mv PP 405 325 00 24 24 000 100 23 900 24 100 lt 200 DPS 33A Supply 3 3 3 345 5 3 340 3 350 lt 200 Master 320A 3 3 Turn the Vadj pot fully CCW and measure the voltage at the Slave 320A Master 405 925 00 15 15 000 50 14 950 15 050 lt 200 16A 10 10 000 50 9 950 10 050 lt 200 10A 36 36 000 100 35 900 36 100 lt 200 4 6A 34 34 000 100 33 900 34 100 lt 200 20A 405 924 00 10 5 10 500 50 10 450 10 550 lt 200 Master 160A 5 5 000 50 4 950 5 050 lt 200 90A 24 24 000 100
391. ts using the 5 32 nutdriver Re install the channel board into tester as outlined in section Reinstalling Circuit Boards on page 8 14 Memory Test Option MTO and Digital Signal I O DSIO Option Removal and Replacement This section provides instructions for replacing the Memory Test Option MTO or a Digital Signal I O DSIO option on a J750E channel board The following tools are required to replace the MTO and DSIO No 1 Phillips screwdriver Removing the MTO Perform the following steps to remove the MTO or DSIO option from the channel board 1 2 3 Always wear a tested grounding strap while working on the J750E tester Remove the channel board that needs the MTO or DSIO replaced as outlined in section Reinstalling Circuit Boards on page 8 14 If applicable remove the channel board from its storage container and place it on a proper anti static work surface with the MTO or DSIO facing up Remove the screws holding the MTO or DSIO to the channel board using the no 1 Phillips screwdriver Remove the MTO or DSIO from the channel board by disconnecting the mating connectors on the two boards Place the MTO or DSIO into a proper storage container to prevent ESD and physical damage Proceed to section Reinstalling the MTO or DSIO Option on page 8 49 as appropriate 8 48 J750E 512 Pin Test System Service Reference Manual Reinstalling the MTO or DSIO Option Perform the following steps to r
392. ue wrench and 3 8 socket 5 Replace the terminal lugs onto the terminals of the 24 volt Utility power supplies then replace two 2 each 10 flat washers 10 split lock washers and 10 32 hex nuts on each supply Tighten the nuts to 26 inch pounds using the adjustable torque wrench and 3 8 socket 6 Replace the four 4 terminal lugs onto the connector terminals of the 10 5 volt power supply Tighten the screws to 26 inch pounds using the adjustable torque wrench and using the no 2 Phillips screwdriver bit 7 Reconnect the AC line connector to the 10 5 and 5 volt and power supply module as follows Replace the three 3 terminal lugs onto the connector terminals of the supply then tighten the screws to 26 inch pounds using the adjustable torque wrench and using the no 2 Phillips screwdriver bit Replace the yellow protective shields back over the connector terminals 8 Reconnect the AC line connections for the 10 5 volt 5 volt and 24 volt Utility power supply module by placing the connector of the wire harness onto the connector of the power supply and pushing down until it snaps into place 9 Reconnect the three 3 bus bars to the backplane connection bars as follows Place the bus bars over the mounting bolts on the power supplies and over the three 3 j 20 x 5 8 long bolts at the bottom bus bar mounting holes of the backplane connection bars Reinstall the three 3 j 20 x 5 8 long bolts j split lock
393. ulation of the carrier and emulation of the magnetic field through selectable resistive coupling Demodulation of the data transmitted by the device under test on a cycle by cycle basis RF cycles that is derived from a new DSP based technique Synchronization of the demodulated data of multiple devices based on a new digital concept which allows testing multiple devices in parallel DUT input capacitance measurement capability Carrier Generation and Timing System The carrier frequency for the generation of RF energy is generated by the carrier frequency source In the J750E tester the system main clock serves as input clock for the carrier frequency source The resolution of the carrier frequency is approximately 24 mHz A second frequency generator is also clocked by the system main clock and produces the timing for the all the DSP engines as well as for all the synchronization circuits discussed later This clock is referred to as Strobe Clock The phase of the Carrier waveform in relation to the Strobe Clock can be programmed to a resolution of approximately 11 degrees The main system clock also clocks the period generator and every timing generator of all the digital channels of the VLSI tester By using the same clock source both for the carrier system as well as for the digital channels the synchronicity of digital patterns and the RF carrier clock is guaranteed Hardware Description 5 43 Figure 5 25 shows a block dia
394. umber J7SMO001 J750k and J750 512 Pin Test System Site Preparation Guide Teradyne Document Number J75G0001 Enhanced J750 512 Pin Test System Product Support Parts List Teradyne Document Number J7MD0012 J750 Test System Kinematic Docking System Manual Teradyne Document Number J7SM0009 J750 Test System Basler Electric 18KVA and 36KVA Power Vault Service Manual Teradyne Document Number 552 360 41 J750 Test System Contact Check Program User Manual Teradyne Document Number J7SMO0021 vi J750E 512 Pin Test System Service Reference Manual Revision History Revision Number Description of Revision 9827 Initial revision 9844 Updated information in External Calibration section updated Replacement Parts List added cable drawings to Manufacturing Information section 9902 Updated Safety section Added MTO to J750 System Block Diagram Updated Power Vault Tap Chart in AC DC Power section Added pogo pin identification drawings to Routine Maintenance section 0018 Rewrote document and updated to latest format 0150 Updated technical content 0314 Incorporate SEMI audit observations and updated technical content 0622 Updated technical content Removed references to standard J750 test system Added information for the MSO and RFID options Added sections for a computer overview and for restoring the operat ing system to its factory installed image Revised the AC DC Power and Cooling chap
395. unctionally equivalent to and directly replaces the previous version PCIT board Teradyne part number 239 002 01 A new PCIT driver Version 3 0 has also been introduced in conjunction with this part change It is available for download on the eKnowledge portal This driver is functionally identical to the version 2 1 driver however it contains a different ini file that displays the updated driver version in the Windows Device Manager 3 12 J750E 512 Pin Test System Service Reference Manual Maintenance Software The Maintenance Software chapter of this manual provides an overview of the maintenance software that is available as part of the J750E tester It also provides detailed instructions for running the various maintenance programs The following information is covered in this chapter e Maintenance Programs Overview e J750 Maintenance Interface e Running Maintenance Programs 4 1 Maintenance Programs Overview This section ofthe manual provides overview information about the J750 Maintenance Programs and can be used to provide a basic understanding of the software Checkers This section provides a brief overview of the following checker programs that are used in the J750E tester e Quick Check e Module Check Quick Check Quick Check verifies communications to each board in the system and performs a basic functional check on the boards The checks are performed on a subset of the hardware of each board t
396. upgraded e External CTO Calibration Only run if CTO is present It is recommended that External CTO Calibration be run immediately after External Calibration but it is not required e External CTO Performance Verification Only run if CTO is present It is recommended that External CTO Performance Verification be run immediately after External Performance Verification but it is not required e External LMF Calibration Only run if LMF is present and when Zener reference calibration is due e External LMF Field Performance Verification Only run if LMF is present and after External LMF Calibration has been run e External APMU Calibration Only run if APMU is present Launching the Maintenance Interface Open the J750 Maintenance Interface as follows Note These instructions assume that the test system computer is already powered up running 1 Click Start on the Windows Taskbar 2 Select Programs select Teradyne J750 Checkers then click J750Maint in the program list The J750 Maintenance User Interface is displayed on the screen 4 32 J750E 512 Pin Test System Service Reference Manual 3 Create a log file as follows Select Open Log from the Log pulldown menu The Read Log File dialog box is displayed on the screen Complete the File Name window of the dialog box and click Open Note It is recommended that you save the file to the default directory location Notepad is lau
397. urate programmable TDR pulse generator that is used via the Cal DIB for the purpose of Calibrating all PE channel edges to be within the hardware published specification This is referred to as AC calibration and is performed within the Internal Calibration External Performance Verification External Performance Verification is run to verify the CAL CUB internal reference circuitry against the external references to guarantee that the internal hardware is at its maximum accuracy and to check the tester against the design specifications External Performance Verification performs the following two tests e Voltage and Current Verification e Master Clock Frequency Verification Voltage and Current Verification External Performance Verification uses the same instrumentation set up as the External Calibration External Performance Verification is used to verify all points within each calibrated voltage and current range and metering circuit using the Calibration correction factors stored in the flash memory But the values read by the meter is only compared to its limit specification for pass or fail test After the completion of the Voltage and Current Verification the checker goes directly to the Master Clock Frequency Verification part of the checker This requires connecting a cable from the Cal DIB to the frequency counter and then running the program The meter output is then compared to the program limits Master Clock Frequency Verifi
398. ure e 1 x 24 bit serial or up to 22 bit parallel capture at 50MHz e 2 x 48 bit serial or up to 44 bit parallel capture at 25MHz The DSIO module is used to source and capture digital signals using the auxiliary pattern generator on the module and a standard J750 digital channel board Each module has four digital signal sources and four digital signal captures all of which can operate simultaneously All signal sources captures share the alternate data bus ADB for routing their signal bits to the digital channels Each digital source capture component consists of a signal memory a DSIO ASIC for memory control and test computer interface and a digital signal processor DSP The signal memory contains the signal samples for both source and capture The ASIC memory controller clocks out source samples and clocks in capture patterns under pattern microcode control The memory controller under pattern control also handles serialization and parallelization Components of the memory controller are programmed by the test computer at various times in the test program execution so that signal memory bits are routed to appropriate ADB lines when the pattern requests a sample bit or bits The embedded DSP engine supports various tasks For general sourced signals only signal parameters are downloaded at program load time and the DSP engine reconstructs the desired signal samples into the appropriate portion of the signal memory When signal reco
399. ure 4 9 shows the dialog box 5 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in Figure 4 9 and click OK The voltage calibration portion of External Performance Verification begins When complete the HP3458A Current Measurement Instrumentation Setup dialog box is displayed on the screen 6 Connect the dual banana connector to the front of the Agilent HP 3458A multimeter and the EZ hooks to the Calibration DIB as shown in Figure 4 10 and click OK The current calibration portion of External Performance Calibration begins The CAL CUB displayed in the Hardware Selection Deselection area of the maintenance interface changes color as follows as the test is being run Blue Board is presently being tested Green Board has passed test for looping test this indicates that no failure has occurred yet Red Board has failed test for looping test this indicates that at least one failure has occurred When complete the results appear in the Test Program Output window and the CLK100 Setup dialog box is displayed Figure 4 11 shows the dialog box 4 38 J750E 512 Pin Test System Service Reference Manual CLK100 Setup x HP 531814 AG 004 FULL REV A COMPONENT SIDE TERADYNE Connect the the HP53181A CHANNEL 1 input jack to the CalDIB J5 conn
400. uttoM csi 30 Running Maintenance POS a de A aia 4 31 Launching the Maintenance Interface EEN 4 32 Running External WT ON o 4 33 Running External Performance Vertfcaton nono 4 38 Running External Performance Verification Frequency Check 4 39 Running COMUMUMY CHECK src rea 4 41 Ue CHECK A O O eege 4 43 R n ning Module e e e dE 4 44 Running Calibr ON EE 4 46 Single Board Calibre ia 46 Using Single Board Calibration 47 AG Calibration ee Ee 49 ACIDE Calibre ee es 51 Running Performance Verification aiii 4 52 AC Performance Vet AM A AS 52 AC DC Performance Verification sserrep nesa eee e a Ee nono n nr non nn E e ron rn a E ie 54 Optional Instrument Reference Calibration cccccooncnnnnnoconoooooonncnnnnnnnnnnnnnnnnnnnnnnnnns 4 56 CTO ia 56 Running External CTO Calibration 56 viii J750E 512 Pin Test System Service Reference Manual Running External CTO Performance Verification 57 MS O s EME acia a Ad 58 Running External LMF Field Performance Verification 66 ENER aii cs 68 Running External APMU Calibration 68 Hardware Description COMPU e 5 2 Field Replaceable Unts PRUSIA as 5 2 Personal Computer Interface PCI Board 5 4 Calibration Clock Utility Board CAL CU 5 6 DRAMAS iros 5 6 E eebe 5 6 Master Clock and Clock Distrbutton nono nn nnnnnnos 5 6 Eege 5 7 Power Supply Monito AA AAN is aaa cake 5 7 Fan Monitor and Safety Shutdown enk 5 7 AIN Eegen 5 7 DIB AD Prom READ EEN 5 7 Test Computer In
401. vHP 3458A TCIO BUS C DPS CALCUB CALDIB eeeeeeeeeeeeeeeeeel F 000758A Figure 4 2 External Calibration diagram Maintenance Software 4 5 This method yields three calibration factors for each voltage or current point e Programmed source value First column of display table e Externally measured value Second column of display table e Internally measured value Third column of display table Figure 4 3 shows the location of these values in the CALCUBCAL txt file Traceable IEEE Meter Reading External Meter CAL CUB Meter Reading Internal Meter after calibrating Programmed Value of the voltage forced by the CAL CUB E CALCNBCAL Notepad File Edi Search Help 8 6975089765625E B84 6 0003533640852 5 51359790337841E 03 1 1 9996337890625 2 000367146 1 98970906323435 1 4 99839782714844 5 000134004 4 98239225058748 1 6 99757385253906 7 000386394 6 97852212210455 1 9 99468994140625 10 00014234 9 95081274605545 1 23 9868621826172 24 00038155 23 919845642268 1 1 99913024902344 1 999881944 2 60105694181646 1 4 99789428710938 4 999929354 4 99469621684926 1 997 0703125 6 999688226 6 98964111186561 1 9 99542236328125 9 999712755 16 0003337961974 1 23 9896545410156 23 99976558 23 9 677829447309 1 9999 6 3 005171102 272E 03 8 1 Indicates Voltage Readings 0 772144659997929 0 2 6 196296147584861 0 9999 6 3 00620806032919E 04 6 2 272488005872 6 02 1 9767
402. validation and execution Active Part Active Part selects the part to be tested The control lists all of the parts listed in the Gate Part column Active Environment Active Environment specifies what categories are to be used on the AC and DC Spec sheets Spec Category Spec Category selects a set of values Typical Minimum and Maximum for the spec symbols from the currently active AC and DC Spec sheets If the Spec Category control specifies a test instance the Spec Selector control is disabled 3 8 J750E 512 Pin Test System Service Reference Manual Spec Selector The Spec Selector determines whether the Typical Minimum or Maximum value is to be used for each spec symbol IG XL Debug Toolbar A Debug Toolbar is also added to Excel as part of IG XL The toolbar displays when the Data Tools are invoked Tool buttons exist for the most common IG XL functions An IG XL Data Tool On line Help button is also provided as part of the toolbar Figure 3 3 and Figure 3 5 show the toolbar ea aaa RODAR oy a HBL EE F 000184 Figure 3 5 IG XL Debug Toolbar Visual Basic IG XL uses the Microsoft Visual Basic environment to develop test templates Figure 3 6 shows the Visual Basic environment Software Description 3 9 3 Microsoft Visual Basic J750Maint xls break acCalChanDeskew Code I Ele Edt view Insert Format Debug Run Tools Window Help x a qbo co 1 LINES EN
403. vides instructions for opening the tester to perform repairs or maintenance Opening the DIB Mounting Side of the Tester The following tools are required to open the DIB mounting side of the tester e No 2 Phillips screwdriver Always wear a tested grounding strap while working on the J750E tester Perform the following steps to open the DIB mounting side of the tester Note These instructions assume that tester power has already been shut down Note Protect against the possibility of dropping hardware into the tester electronics or backplane 1 Ensure that the tester is fully undocked and a sufficient distance from the mating equipment 2 Position the tester so that the DIB mounting surface faces up Always ground the Customer DIB or Calibration DIB when installing or removing it from the DIB fixture on the tester 3 Properly ground the Customer DIB or Calibration DIB as previously outlined in section Grounding Calibration and Customer DIBs on page 7 7 of Chapter 7 Maintenance 4 Place the DIB vacuum switch on the tester to the UNLOCK off position 5 Remove the Customer DIB or Calibration DIB from the tester then remove the ground connection Place the DIB into a proper storage container to prevent ESD and physical damage 8 8 J750E 512 Pin Test System Service Reference Manual 6 7 Remove the six 6 8 32 x 3 8 long black Phillips head screws and 8 lock washers from the DIB cover usin
404. wer On Off switch at the front of the tester Once the Emergency Power Off switch has been activated power can be restored to the tester by pressing and holding the green Power On switch on the front of the tester for 3 to 5 seconds Protective Barriers to Operators The system is equipped with safety interlocks to impede operator access to service or electrical hazard areas Warning labels also identify these hazardous areas Warning labels identify areas where electrical hazards may exist at operator accessible parts Hazardous Internal Power Connections This section outlines the internal power connections of the J750E tester that may present safety hazards All internal areas of the J750E Test System must be accessed and serviced by trained and qualified personnel ONLY Power Control and Distribution e All power connections that are located inside the AC Power Vault and the J750E tester and the distribution between of power between these assemblies are extremely hazardous and are potentially lethal e Extreme caution must be used when servicing these areas Only trained and qualified personnel should access and service these areas e Allinternal AC plug type connections in the tester are hazardous and should also be handled with extreme care Power Supplies e Most of the power supply terminals and backplane buses located within the tester present a high voltage or high current power hazard e Extra caution must be emp
405. wer Vault Service Manual AC DC Power and Cooling 6 3 AC Power Vault 110 volts AC Personal Computer 110 volts AC 2 E Factory AC eee PC Monitor rower 208 volts AC S phase J750 Tester 208 volts as AC input 110 volts AC Personal Computer 110 volts AC aoe PC Monitor 208 volts AC__ J750 Tester F 000316 Figure 6 1 AC Power Vault power distribution block diagram Input Power Module The Input Power Module is located at the rear of the tester The power cable from the power vault enters the tester at the power module The input power module is equipped with a Corcom Power Filter 24 volt transformer and a contactor relay The Corcom Filter is a 50 amp 120 250 volt AC three wire power line filter that receives AC power from the output of the AC Power Vault Module The input is filtered and distributed to the Power On Off contactor and the 24 volt AC transformer inside the tester The 24 volt control bus is distributed to the Calibration Clock Utility Board CAL CUB for fan rotation control It is also distributed to the two 2 temperature sensors located in the exhaust air cavity of the tester and then to the Test System Power On Off and EMO Switch Module If the fans and the temperature sensors are OK then pressing and holding the tester s Power On Switch for 3 5 seconds closes the contactor and powers both sets of DC power supplies inside the tester Figure 6 2 shows a picture of the Input Power Mo
406. wer cable has been disconnected from the outlet receptacle J4 at the rear of the power vault 5 Remove the two 2 10 32 x 5 8 long Phillips head screws from the PCIT cable clamp on the strain relief bracket at the back of the tester using the no 2 Phillips screwdriver Figure 8 5 shows the clamp attached to the bracket V k Strain Relief Gei Bracket F 000099 Figure 8 5 PCIT strain relief bracket and clamp 6 Disconnect the flat gray PCIT cable from the connector at the rear of the tester 7 Remove the fourteen 14 8 32 x 3 8 long Phillips head screws with external tooth washers from the input power module cover using the no 2 Phillips screwdriver Note The cover is wired to the module and cannot immediately be fully removed Be careful not to damage the ground wires attached to the inside surface of the cover 8 Flip the cover over and onto the DIB fixture 9 Cut any tie wraps fastening the TCIO cable to the input power module using the side cutters 10 Remove the two 2 M2 5 x 45 long Phillips head screws from TCIO cable connector on the outside of the input power module using the no 1 Phillips screwdriver then remove the cable from the module Repair 8 37 11 Loosen the three 3 captive screws at the bottom of the input power module using the medium slotted screwdriver 1 4 Figure 8 6 shows the location of the screws Note The captive screws are located toward the front of the
407. works The Sync Unit is designed to synchronize DUT responses before sending them to the comparator of the test system The user can specify a time at which the Sync Unit is activated This is done by programming an Opcode start_sync in the Pattern After the Sync Unit becomes active it will wait for an event whose state is specified by the user The Sync event state can be set by programming the Sync Config that can be High Low or Midband This event can be asynchronous from device to device but they must be all detected before the time out arrives 5 48 J750E 512 Pin Test System Service Reference Manual The user specifies the Sync Cycles a number of cycles after which all DUT responses are sent to the comparator synchronously when they are detected The number of Sync cycles is counted from the time at which the Pattern Opcode start_sync is issued The unit for this number of cycles is Strobe cycles 512 Strobe cycles that is normally of double frequency as the RF frequency therefore 256 Carrier cycles The Pattern cycles in which the expect data is programmed must take this Sync Cycles into account The user usually programs some dummy cycles before to match the Sync Cycles The Sync Unit is controlled by the Pattern Generator OpCode start_sync Therefore if the user does not program the OpCode start_sync in his pattern the Sync Unit will never be activated Capture Unit The Capture Unit is a per pin resource in the
408. y Check the existing Calibration file CalibrationData txt should be renamed because it will be reset or overwritten when Continuity Check is run Note Systemwide Continuity Check runs automatically as part of Module Check and can only be run manually as outlined in these instructions as follows e Prior to running Module Check e By removing and reinstalling the Cal DIB on the tester if Module Check has already been run Restarting the J750 Maintenance Programs if Module Check has already been run Place the tester so that the DIB mounting surface faces up Always ground the Calibration DIB when installing or removing it from the DIB fixture on the tester N Properly ground the Calibration DIB then place it onto the DIB fixture on the tester Place the DIB vacuum switch on the tester to the LOCK on position CA Maintenance Software 4 41 4 Press down on the Cal DIB to ensure it seats properly Apply pressure to the DIB in the area directly above the pogo blocks 5 Remove the ground connection from the board and the tester 6 Click the ModuleCheck tab in the maintenance interface 7 Deselect all of the boards in the tester by clicking All in the graphical representation of the tester indicated in the Hardware Selection Deselection area of the maintenance interface Note Selected hardware is displayed gray and deselected hardware is displayed white 8 Click the Systemwide Tests button on
409. y may be encountered using this feature as not all files such as user documents and vis test programs are reverted Further installed programs such as IG XL are not deleted when the reversion occurs so residual files may remain Use the Windows Add Remove software feature to remove unneeded software before the reversion process Refer to the 8 58 J750E 512 Pin Test System Service Reference Manual instructions in the Windows on line help files for use information Generally the System Restore feature is useful when a driver or other piece of software is installed and causes a failure As it does not create a full restore image it is not a substitute for a backup or customer image restoration The third method is the use of the appropriate Teradyne back up disk set for the system you are working on This method outlined in this document results in considerable additional work after the backup including network administration licensing and user program installation It is also a destructive image process where customer data may be lost As such it should be used only when the situation warrants Again it is stressed that the preferred backup solution is the customer provided system image Restore Points or Teradyne Back up image should not be used as a primary system recovery tool Kit Description The back up media set for the J750E xw6000 computer model is TP 001 00 The xw8200 J750E computer uses TP 005 00 Make sure to or
410. y power supply There are also fans that are part of the individual powers supplies They are not monitored by the CAL CUB and they are power from the power supply itself The fans our powered from the auxiliary 24 volt supply The fan rotation is monitored by the CAL CUB System Cooling Fan Detail Eight 8 cooling fans in the J750E system are monitored for rotation Initial power up of the 24 VDC utility power supplies start the system fans rotating The rotating fans send a DC level signal of gt 4 50 VDC to the CAL CUB Fan Sensor control circuit Refer to the Figure 6 14 If this circuit senses the loss of a fan rotating via the FAN OK signal lt 2 5 VDC note does not include cooling fans mounted on power supplies and it does not clear in 2 minutes the signal SysPowerOff will go low turning off Q15 This will open the K2 relay and remove the 24VAC from the contactor coil and power down the system Refer to Chapter 7 Maintenance for additional information regarding maintenance and replacement of the cooling fans System Fan Failure All eight 8 fans in the J750E tester Fan Plate Assembly and Power Supply Jackets are monitored by the CAL CUB If any fan slow stops or malfunctions the ALLFANOK signal generated by the CAL CUB starts a 2 minute timer If after approximately two minutes the fan monitor still shows a problem the Cal CUB generates the SYSPWROFF signal to open a relay on the CAL CUB that controls 24 VAC to the main contactor

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