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RT-DAC/USB2

1. 37 5 8 ENCODER d 39 5 8 1 ATA ME P 40 5 8 2 TO KA CHIVES ows 40 5 8 3 Idi LEE 41 5 8 4 RC 41 5 8 5 EQ 4I 5 9 FREQUENCY METER UN 43 5 9 1 EN QDIEBIO 44 5 9 2 SwHwGateStartFlag eerte 44 5 9 3 WS LOT INEA 45 5 9 4 45 5 9 5 ESEE 45 5 9 6 au Jm O M 45 3 9 7 Moni X 46 RT DAC USB2 User s Manual page 1 v InTeCo 5 9 8 GOLEM OE EE E 46 5 9 9 PIDE 46 S910 MOJE asza oett ier iT Le M 47 5 9 11 T 47 9 9012 READ I ERE 47 5 9 13 Una t 48 S914 48 2 945 Example isst o tese Gwda 48 5 10 CHRONOMETER 2 eec eer E E Ep 51 3 104 En bleBlock iei E SEEN NNI RN 52 3102 JIfiggerMoue iioii rego D er Mom Irc
2. eerte itus teris 53 3 1035 Enable GAL iiss ciini E Nen HT 53 3404 as e rere E ter fece te Cr i ster echt 53 UNI EMiAU ZI CETT 29 5 70 06 54 5 707 1 ness owa enia a Ya A eani 54 5 10 8 NextMeasurement E sese sese sese sese sese eese eese een 54 90 07 Armed RR 55 5 10 10 DII MEC 55 5 10 11 A AN AO M Ue 55 5 10 12 NOBIA 55 5 10 13 BT aw mu 56 5 10 14 Result e oP 56 5 10 15 EXAMPDIE a 57 OVI A D EONVERSION E IM UE 59 SWANK 11 59 SEED MEC CI AE 59 ciae noii eden redi Use SEIEN 60 5 12 GONNA 62 IA MEOUPACUuETITE r 62 Deb NEN CIJJ CE ERR 63 6 TEST APPLICATIQONS ee eoco ce eere tenebo oce eua do orae eo ta Deoa ro Fe rese to neos oda Coe Vea eoa dca Qu PEE de 64 6 1 IBI NBA LOI uqu 64 6 2 TIMER COUNTER TEST posad t Pe EUER SEHE O E EE THREE ERE EE
3. sAux Enc2 counter String Format 0 D MessageBox Show sAux RT DAC USB2 User s Manual Encoder example EncoderiClass IdxInvertState Off EncoderlIClass ResetState On reset signal EncoderiClass ResetState Off brd Encoderl 2 Counter MessageBoxButtons OK page 42 W InTeCo 5 9 Frequency meter The RT DAC USB2 board includes eight frequency meter blocks The blocks are applied to measure number of external pulses within a given counting period The operation principle is presented in Fig 5 12 A measurement can be started by a program or by an external input The measurements can be gated by an external signal Reference frequency Counting period Lo LQ Input signal LU Counted impulses Result 12 Fig 5 12 Principle of the frequency operating mode Each block uses three external input signals x is a number from 0 to 7 and means the number of the block FrxI input signal the block counts pulses from this input FrxSt external start counting signal FrxG external gate signal The algorithm of the frequency meter block can be described as follow 1 NIE tn the block operates only if the Enable parameter is 1 if this parameter is 0 the Ready and the Pending flags are set to low The Pending flag is an intern
4. RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Timer counter Tmr cnt channel 0 C Counter Reset Counter 227552582 Fig 6 2 The Timer Counter test window Table 6 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given RT DAC USB2 User s Manual page 65 wv InTeCo Table 6 Fields of the Timer Counter application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name of the board Name Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Section 5 3 1 Reset state of the selected channel Synthesis date Logic version Reset Section 5 6 2 Mode Operation mode of the selected channel Section 5 6 1 Counter value of the selected channel Counter Section 5 6 3 6 3 PWM test The screen of this testing program is shown in Fig 6 3 The parameters of the PWM channels are visible within the PWM frame One can select the channel mode prescaler and width The list box at the top of the application allows to select the board if more then one board is connected to the computer RT DAC USB2 PWM Manufacturer Product Serial Vendor ID Product ID InTeCo RT DAC USB2 000001 0 0404 0x8613 2
5. int CommandRead 0103 int Idx RTDACUSB2BufferType pBufferToRead DESCRIPTION The function reads a data buffer from the RT DAC USB2 device After the read operation the buffer contains the current state of the board ARGUMENTS Idx the handler to the RT DAC USB2 unit applied to read the data buffer The handler is returned by the USB20pen or USB2OpenBySerialNo functions pBufferToSend pointer to the structure that contains the data read from the RT DAC USB2 board The pointer points to the structure of the RTDACUSB2BufferType type RETURNED VALUE If successful then the zero value is returned Otherwise it returns a negative error code RT DAC USB2 User s Manual page 19 InTeCo int USB2LastError void DESCRIPTION The function returns an error code of the last operation ARGUMENTS None RETURNED VALUE Returns an error code The codes are given in the following table Table 2 Error codes Error code value Description 0 Successful operation 1 Too many opened RT DAC USB2 devices Can not find any RT DAC USB2 device 3 Invalid board index Can not access USB transfer endpoint Can not access USB NULL endpoint Endpoint are not closed Invalid device pointer Invalid synchronous OUT transfer Invalid synchronous IN transfer Invalid synchronous JTAG OUT transfer Invalid synchronous JTAG IN transfer 12 Can not find de
6. 5 5 1 Direction C interface unsigned int CN1Direction NET interface UInt32 DigitalIO CN1Direction Simulink interface CN1Direction output of the read S function SetCN1Direction input of the send S function DESCRIPTION The field sets means a direction of the digital I O signals If a bit is set to zero it means the pin is defined as the output If a bit is equal to 1 the corresponding pin is defined as the input line This feature of the board is coded as 32 bit double word but only 26 bits are used as it is shown in the following tables Bit No 7 6 5 4 3 2 1 0 DIO7 DIO6 DIO5 DIO4 DIO3 DIO2 DIO1 DIOO Bit No 15 14 13 12 11 10 9 8 DIO15 DIO14 DIO13 DIO12 DIO11 DIO10 DIO9 DIO8 Bit No 23 22 21 20 19 18 17 16 DIO23 DIO22 DIO21 DIO20 DIO19 DIO18 DIO17 DIO16 Bit No 31 30 29 28 27 26 25 24 DIO25 DIO24 RT DAC USB2 User s Manual page 27 Ww InTeCo 5 5 2 Input C interface unsigned int CN1Input NET interface UInt32 DigitalIO CNlInput Simulink interface CN1Input output of the read S function DESCRIPTION The field contains values of signals at the CN1 connector It is a read only value For input signals it reads the digital inputs For output signals it reads the real signal values present at the CN1 connector If a pin is configured as a PWM output the respective bit relates to the output state of the PWM block This feature of the board is c
7. 002 PWMO ENCOI FrOI ChOStSt 0104 005 DIOS ENCTI Fr1I Ch1StSt 01013 01014 DIOT4 ENC4l Fr4l Ch4StSt aa 01015 a 0016 01017 DIO17 ENCSV FrSI Ch58tSt c 01018 6 01019 c c 6 0106 0107 0108 DIOB ENC2I Fr2U Ch28tSt DIO9 01010 01011 01012 eee 2 ee 0020 DIO20 ENCGI Fr6ChGSISt 01021 mozuencrwrerchro 0022 DIO23 DIO23 ENCTI FI l Ch7StSt 0024 01025 we e ww P e WIE 1 3 G o amp o c G 229929995 3 Fig 6 6 Parameters of digital I O signals Then set the parameters of the PWMO channel as given in the Fig 6 7 RT DAC USB2 PWM Manufacturer Product Serial no Vendor ID Product ID inr eCo RT DAC USB2 000001 0 0404 0 8613 RTDAC2 Synthesis date 2010 03 16 Logic version 0103 PWM Channel 0 gt Mode Prescaller 0 C 12bit 104 40 8 Fig 6 7 Parameters of the PWMO output Finally set the parameters of the frequency meter channel as shown in Fig 6 5 and switch the Software START flag ON and OFF The last operation starts the continuous measurement of PWM pu
8. RT DAC USB2 000001 040404 0x8613 v Name RTDAC2 Synthesis date 2010 03 16 Logic version 0103 Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Encoder Encoder Channel 4 zi Counter 0 Channel 5 xj Counter 4234367295 Reset Index active Index invert Reset Index active Index invert Off t Off Off C On On Close Close Fig 6 4 The Encoder test windows Table 8 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 8 Fields of the Encoder application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name of the board Name Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Section 5 3 1 State of the reset signal Section 5 8 1 State of the index active signal Section 5 8 2 State of the index invert signal Section 5 8 3 Value of the encoder conter Section 5 8 4 Synthesis date Logic version Reset Index active Index invert Counter 6 5 Frequency meter test The application presented in Fig 6 5 sets the parameters of the frequency meter channels and presents the results of the frequency measurements The duration of the measurement window given in the Window field
9. int NoOfDetectedUSBDevices int BoardIdx RTDACUSB2BufferType RIDACUSBBuffer int BoardIdx unsigned int Input Boardldx USB2OpenBySerialNo 14 if BoardIdx lt 0 printf Can not open the given RI DAC USB2 device n return if CommandRead 0103 BoardIdx 4RIDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 deviceln return Set all lines as general purpose inputs outputs RTDACUSBBuffer CN1PinMode 0 Set directions RTDACUSBBuffer CN1Direction Ox3FF0000 Set outputs RIDACUSBBuffer CNl1Output OxFFFF if CommandSend 0103 BoardIdx amp RIDACUSBBuffer lt 0 printf Can not send data to the RT DAC USB2 device n return wait if CommandRead 0103 BoardIdx amp RIDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return Input RTDACUSBBuffer CNlInput Input Input gt gt 16 amp USB2Close BoardIdx RT DAC USB2 User s Manual page 29 Ww InTeCo CH language RTDACUSB2 0103 brd new RTDACUSB2_0103 if brd OpenBySerialNumber 14 0 MessageBox Show Can not open the device DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return if brd ReadUSBFrame 0 MessageBox Show Can not read data frame DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return Set all lines as general purpose inputs outputs brd Dig
10. respectively In NET the On value indicates ready to read data The Off value informs that data are not ready jet RT DAC USB2 User s Manual page 47 Ww InTeCo 5 9 13 Counter C interface unsigned int Counter DESCRIPTION 32 bit counter that contains the number of currently counted pulses The field is read only 5 9 14 Result C interface unsigned int Result NET interface uint Result Simulink interface FreqMResult output of the read S function DESCRIPTION 32 bit result of the last measurement The field is read only The field contains valid data only when the Ready flag is set 5 9 15 Example Apply the PWMO output as the inputs signal for the frequency meter channel 0 Fr0 signal Both signals PWMO and Fr0I are located at the same pin of the CN1 connector pin number 5 see Table 1 This pin is shared with the DIO2 general purpose digital signal To run the test the following steps have to be performed e set parameters of the PWMO block e set the mode of DIO2 to allow the PWMO generation at the output e set the direction of DIO2 as the output e set parameters of the F70 block Start a measurement and read the result C language RTDACUSB2BufferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf Can not detect any RI DAC USB2 device n return USB2Open if B
11. signals excite the specialized block see Fig 4 3 If the shared general purpose I O signals are configured to be outputs their states can be set by the software and simultaneously the signals excite the specialized block see Fig 4 4 This operating mode can be applied for testing of the specialized blocks for example the encoder can be excited and read in a software manner This testing strategy is not significant during common device applications It may be very useful when one wants to design and test his own FPGA blocks see USB Device XILINX Programming Guide FPGA Pin ENCO A DIOO Read encoder Encoder Block Read digital input Fig 4 3 The shared FPGA pin configured as the input RT DAC USB2 User s Manual page 12 v InTeCo FPGA Pin ENCO A DIOO Read encoder Encoder Block Set digital output Fig 4 4 The shared FPGA pin configured as the output RT DAC USB2 User s Manual page 13 Ww InTeCo 5 USB ACCESS FUNCTIONS The software for the RT DAC USB2 device is developed as e C language procedures Cft properties and methods e Simulink blocks and S functions Test applications for the functions of the RT DAC USB2 device are available as well The applications are described in section 6 5 1 General description of software interfaces The software platforms applied to access the RT DAC USB2 I Os apply some basic items used by the interface functi
12. DIO20 and DIO23 are controlled by the PWM6 and PWM7 blocks Table 5 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 5 Fields of the Digital I O application Element of the test Description application window Section where the field property is described Name of the board Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Section 5 3 1 Pin mode of the digital I O signals Section 5 4 Direction of the digital I O signals Section 5 5 1 Output state of the digital I O signals Section 5 5 3 Input states at the digital I O inputs Section 5 5 2 Name Synthesis date Logic version Mode column Direction column Output column Input column 6 2 Timer Counter test After calling the program the screen shown in Fig 6 2 appears The parameters of the timer counter block can be selected within the Timer counter frame One can select the channel set state of the Reset signal select the operating mode and observe the value of the counter The list box at the top of the application allows to select the board if more then one board is connected to the computer RT DAC USB2 Timer Counter Manufacturer Product Serial no Vendor ID 7 Product ID InTeCo RT DAC USB2 000001 0x0404 0 8613 Status
13. If the Gate signal is inverted its low state gates measurements In C and Simulink the 0 and 1 values are available The 1 value inverts the Gate signal In the NET interface the On and Off values are available The On value inverts the Gate signal RT DAC USB2 User s Manual page 45 W InTeCo 5 9 7 InputInv C interface NET interface Simulink interface unsigned int InputInv InputInvState InputInv FregMInputInv output of the read S function SetFreqMInputInv input of the send S function DESCRIPTION The field is applied to invert input Frx signal If the signal is inverted the block counts falling edges of the Frx input In C and Simulink the 0 and 1 values are available The 1 value inverts the Frx signal In NET the On and Off values are available The ON value inverts Frx signal 5 9 8 GateMode C interface NET interface unsigned int GateMode GateModeState GateMode Simulink interface FreqMGateMode output of the read S function SetFreqMGateMode input of the send S function DESCRIPTION Selects the gating mode Two modes are available e when the Gate is active only the input signals are not counted The timer counter operates until a counting period terminates when the Gate is active the input signals are not counted and as well the timer counter stops In C and Simulink the 0 and 1 values are available The 0 value stops counting of the Frx i
14. InputInvState Off brd FregM 0 Timer 400000 Send setups and generate rising edge of the software START brd FreqM 0 SwStart FreqMClass SwStartState Off brd SendUSBF rame brd FreqM 0 SwStart FreqgMClass SwStartState On brd SendUSBFrame Wait for the rumination of the measurement for 7 brd ReaduSBFrame if brd FreqM 0 Ready FregMClass ReadyState On break String sAux sAux Result 1 String Format 0 D brd FreqM 0 Result MessageBox Show sAux Frequency meter example MessageBoxButtons OK Change PWM frequency and restart the measurement brd PWM 0 Prescaler 7 brd FreqM 0 SwStart brd SenduSBFrame brd FreqM 0 SwStart FregMClass SwStartState On brd SendUSBFrame FregMClass SwStartState Off for brd ReadUSBFrame if brd FreqM 0 Ready FregMClass ReadyState On break sAux Result 2 String Format 0 D brd FreqM 0 Result MessageBox Show sAux Frequency meter example MessageBoxButtons OK RT DAC USB2 User s Manual page 50 Ww InTeCo 5 10 Chronometer The chronometer block counts the time span between the start and stop conditions The resolution of the time measurement is 25 ns The block contains two main 32 bit registers Counter and Result The Counter register counts 25ns pulses between the start and stop conditions This register value changes when the measurement is pending When the stop condit
15. RTDACUSBBuffer AD 2 Result printf Input of the third A D2 channel Result if Result gt 2047 Result Result 4096 AnalogSignal 10 Result 2048 V printf Input of the A D2 channel in V f n float AnalogSignal USB2Close BoardIdx RT DAC USB2 User s Manual page 60 Ww InTeCo CH language RTDACUSB2 0103 brd new RTDACUSB2_0103 if brd Open lt 0 MessageBox Show Can not open the device Encoder example MessageBoxButtons OK MessageBoxIcon Exclamation return brd ReadUSBFrame Set the gain of the third A D channel to 1 brd AD 2 ADGain ADClass GainState xl brd SendUSBFrame brd ReadUSBFrame String sAux sAux Input of the third A D 2 channel String Format 0 D brd AD 2 ADValue in Input of the A D 2 channel in V brd AD 2 ADVoltage ToString MessageBox Show sAux A D example MessageBoxButtons OK RT DAC USB2 User s Manual page 61 wv InTeCo 5 12 D A conversion The board contains four 12 bits D A converter channels connected to the A O 0 A O 1 A O 2 and A O 3 pins All channels can be hardware configured to operate in the 10V mode Each analog output channel can sink up to 10 mA The D A conversion functions are not active in the digital version of the board In the C language interface the D A channels are controlled by the array unsigned int DA 4 In the NET interface the state
16. Result counter does not count pulses of the Fr I input if the GateMode parameter is set to 1 and the Gate signal is equal to 1 also the counter which determines the counting period is stopped Fig 5 13 illustrates the influence of the Gate signal when the GateMode parameter is set to 0 RT DAC USB2 User s Manual page 43 Ww InTeCo Reference frequency Counting period JEE H ELTE TEE FLOEE E FTP TTL Input signal Gate signal Active high Counted impulses Result 4 Fig 5 13 Principle of the gate signal In the C language interface the features of the frequency meter channels are controlled by the FreqMType structure The main structure of the RTDACUSB2BufferType type contains the array FreqMType FreqM 8 7 that is applied to communicate with the blocks In the NET interface the state of the frequency meter blocks are described in the FreqMClass class 5 9 1 EnableBlock C interface unsigned int EnableBlock NET interface EnableState Enable Simulink interface FreqMEnable output of the read S function SetFreqMEnable input of the send S function DESCRIPTION The field sets means the enable state of the block The block operates responds to inputs and parameters if it is enabled In disable state the frequency meter block does not react to inputs In the C and Simulink interfaces 1 value enables the block If t
17. as the digital inputs and simultaneously they excite the respective counter block If the signals are set to be outputs their states are determined by software typically as the digital outputs and simultaneously they excite the respective counter block this operating mode can be applied to test the blocks in a programming manner The configuration of the timer counter block is shown below The Mode flag selects between counter and time modes The Reset flag is applied to reset the counter 32 bit counter stores a number of the internal clock periods or a number of the external pulses the rising edges of the pulses are counted Reset Counter pa Cnt Internal Clock Mode I O signal Parameter Fig 5 8 Configuration of the timer counter block In the C language interface the features of the channels are controlled by the TmrCnt Type structure The main structure contains the array TmrCntType TmrCnt 2 that is applied to communicate with the timer counter blocks In the NET interface the state of the timer counter blocks are described in the dedicated TmrCntClass class 5 6 1 Mode C interface unsigned int Mode NET interface TmrCntClass ModeState Mode Simulink interface TmrCntMode output of the read S function SetTmrCntMode input of the send S function DESCRIPTION The field sets means the operating mode of the timer counter In the C and Simulink
18. is enabled In disable state the chronometer block does not react to inputs and timer pulses In the C and Simulink interfaces the value of 1 enables the block If this integer value is equal to 0 the block is disabled In the NET interfaces the value equal to On indicates enable state Off disables the block RT DAC USB2 User s Manual page 52 W InTeCo 5 10 2 TriggerMode C interface unsigned int TriggerMode NET interface TriggerModeState TriggerMode Simulink interface ChronoTriggerMode output of the read S function SetChronoTriggerMode input of the send S function DESCRIPTION 2 bit field that determines the operating condition that starts and terminates the measurement cycle In the C and Simulink interfaces the values of the operating modes are given in Table 4 In the NET interfaces the values of this field can be set to StartStop StartStop RigingEdges and StartStop Stop RisingEdges that reflect respectively to values 00 01 and 10 from Table 4 5 10 3 EnableGate C interface unsigned int EnableGate NET interface EnableGateState EnableGate Simulink interface ChronoEnableGate output of the read S function SetChronoEnableGate input of the send S function DESCRIPTION Flag that enables disables gate signal If the flag is set and the ChxG signal is 1 the block does not count reference clock pulses In the C and Simulink interfaces the value of 1 enables gating If this integer value is equal to
19. testing programs Digital I O test Timer Counter test PWM test Encoder test Frequency Meter test Chronometer test A D test and D A test The usage of these programs is self explained simple and fully intuitive However a short operating instruction may be needed It is assumed that a user is familiarised with the previous sections of this manual that describe the features of the I O channels 6 1 Digital IO test The screen view of the program is given in Fig 6 1 Information about the states of all digital input outputs lines is placed in the screen Also one can choose a direction of each line independently marking the appropriate checkbox The Mode column contains buttons which change the mode of the output pins shared between general purpose digital outputs and the outputs of the specialised PWM blocks Only the buttons associated with the signals shared between the general purpose I Os and PWM outputs are active As it has been described in the section 5 5 the digital input output lines named DIO2 PWMO DIO5 PWM1 DIO8 PWM2 DIO11 PWM3 DIO14 PWM4 DIO17 PWMS5 DIO20 PWM6 and DIO23 PWM7 are shared with outputs of the PWM blocks The radio buttons in the column Output allow to set the state of line if it works as the output The column read only shows the state of the input lines The column Direction allows to set the direction of the line The list box in the left upper corner of the application allows to selec
20. to 1 the StartStop signal is inverted If the StopInv parameter is set to 1 the Stop input is inverted If the GateInv parameter flag is set to 1 the Gate signal is inverted 2 ifthe Enable input flag is set to 0 the block moves to Disabled state and remains in this state until the Enable flag is set to 1 In the Disabled state the Counter and the Result registers are set to zero The block changes the state from Disabled to ReadyToArm when the Enable flag changes to 1 3 the block remains in the ReadyToArm state until the Arm flag is set to 1 4 in Armed state the block waits for the start measurement condition In all measurement modes the rising edge of the StartStop signal generates start measurement action if the StartStopInv parameter is set in fact the falling edge of StartStop input starts the measurement cycle In the Armed state the Counter register is cleared When the start measurement event occurs the block is moved to the Counting state 5 inthe Counting state the block counts 25ns pulses until the stop measurement condition occurs The number of counted pulses is stored in the Counter register The counting may be gated If the Gate signal is 1 the block does not count reference clock pulses 6 when the stop measurement condition occurs the state of the block changes to the Terminated and the Counter register is stored in the Result register This register can be read to determine the time span betwe
21. to On indicates that the flag is set Off clears the flag 5 10 8 NextMeasurement C interface unsigned int NextMeasurement NET interface NextMeasurementState NextMeasurement Simulink interface ChronoNextMeasurement output of the read S function SetChronoNextMeasurement input of the send S function DESCRIPTION The state of the NextMeasurement flag When a measurement terminates and the NextMeasurement flag is set the state of the block immediately changes to ReadyToArm If also the ArmMeasurement flag is set a new measurement is armed automatically If both flags ArmMeasurement and NextMeasurement are set the measurements are rearmed automatically In the and Simulink interfaces the 1 value sets the flag The 0 value clears the flag In the NET interfaces the value equal to On indicates that the flag is set Off clears the flag RT DAC USB2 User s Manual page 54 wv InTeCo 5 10 9 Armed C interface unsigned int BlockState Armed NET interface BlockStatusState BlockStatus Simulink interface ChronoStateArmed output of the read S function DESCRIPTION The flag that indicates that the block remains in the Armed state The field is read only In the C and Simulink interfaces the 1 value indicates the Armed state of the block The 0 value indicates other states In the NET interfaces the BlockStatus property value equal to Armed indicates the Armed state of the block 5 10 10 Pending C interface
22. 0 the GATE signal is disabled In the NET interfaces the value equal to On indicates enable state Off disables gating 5 10 4 InvertStartStop C interface unsigned int InvertStartStop NET interface InvertStartStopState InvertStartStop Simulink interface ChronoInvertStartStop output of the read S function SetChronoInvertStartStop input of the send S function DESCRIPTION Flag that allows to invert the ChxStSt input If the flag is active the ChxStSt signal is inverted at the input of the chronometer block It evokes the block to start and terminate measurements as a reaction on falling edges of the ChxStSt signal In the C and Simulink interfaces the value of 1 inverts the signal The value of 0 does not change the level of the input signal In the NET interfaces the value equal to On indicates inverting of the input Off disables inverting 5 10 5 InvertStop C interface unsigned int InvertStop NET interface InvertStopState InvertStop Simulink interface ChronoInvertStop output of the read S function SetChronoInvertStop input of the send S function DESCRIPTION RT DAC USB2 User s Manual page 53 wv InTeCo The flag that allows to invert the ChxSt input If the flag is active the ChxSt signal is inverted at the input of the chronometer block It evokes the block terminate measurements as a reaction on falling edges of the ChxSt signal In the C and Simulink interfaces the 1 value inverts the signal The
23. 0 value does not change the level of the input signal In the NET interfaces the value equal to On indicates inverting of the input Off disables inverting 5 10 6 InvertGate C interface unsigned int InvertGate NET interface InvertGateState InvertGate Simulink interface ChronoInvertGate output of the read S function SetChronoInvertGate input of the send S function DESCRIPTION The flag that allows to invert the ChxG input If the flag is active the ChxG signal is inverted at the input of the chronometer block If the flag is set and the ChxG signal is 0 the block does not count reference clock pulses In the C and Simulink interfaces the 1 value inverts the signal The 0 value does not change the level of the input signal In the NET interfaces the value equal to On indicates to invert the input Off disables inverting 5 10 7 ArmMeasurement C interface unsigned int ArmMeasurement NET interface ArmMeasurementState ArmMeasurement Simulink interface ChronoArmMeasurement output of the read S function Set ChronoArmMeasurement input of the send S function DESCRIPTION The state of the ArmMeasurement flag If the block remains in the ReadyToArm state and the flag is set the state of the block is changed to Armed In the Armed state the block waits for the start measurement trigger signal In the and Simulink interfaces the 1 value sets the flag The 0 value clears the flag In the NET interfaces the value equal
24. Buffer PWM 0 Prescaler 7 RIDACUSBBuffer FregM 0 SwStart 0 CommandSend 0103 BoardIdx amp RTDACUSBBuffer RTDACUSBBuffer FregM 0 SwStart 1 CommandSend 0103 BoardIdx amp RTDACUSBBuffer for CommandRead 0103 BoardIdx amp RTDACUSBBuffer if RTDACUSBBuffer FreqM 0 Ready break printf Result dln RIDACUSBBuffer FreqM 0 Result USB2Close BoardIdx CH language RTDACUSB2 0103 brd new RTDACUSB2_0103 if brd Open 0 MessageBox Show Can not open the device Encoder example MessageBoxButtons OK MessageBoxIcon Exclamation return brd ReadUSBFrame Set PWMO parameters brd PWM 0 Mode PWMClass PWMMode PWM8BitMode brd PWM 0 Prescaler 3 brd PWM 0 Width 64 Set pin mode and direction to allow PWMO output RT DAC USB2 User s Manual page 49 wv InTeCo brd DigitalIO CN1PinMode 0x00000004 brd DigitallO CNiDirection amp Setups of the brd FreqM 0 Enable FregMClass EnableState On brd FreqM 0 Mode FreqMClass ModeState Single brd FregM 0 lInfiniteFlag FregMClass InfiniteFlagState Off brd FreqM 0 StartInv FreqMClass StartInvState Off brd FreqM 0 GateInv FreqMClass GatelnvState Off brd FreqM 0 SwGate FregMClass SwGateState Off brd FregM 0 SwHwGateStart FreqMClass SwHwGateStartState Software brd FreqM 0 GateMode FreqMClass GateModeState Input brd FreqM 0 InputInv FreqMClass
25. DIO23 DIO20 DIO17 PWM6 PWM5 7 No 31 30 29 28 27 26 25 24 RT DAC USB2 User s Manual page 26 Ww InTeCo 5 5 Digital VO The RT DAC USB2 board contains 26 general purpose digital input output lines named as DIOO DIO2 DIO25 The digital I O lines are connected to pins of the CN1 connector digital I O signals are shared with inputs or outputs of PWM encoder counter frequency meter and chronometer blocks To use digital signals as general purpose I Os the respective pin mode bit see section 5 4 has to be set to 0 The general purpose digital I O signals can be individually configured to become either inputs or outputs The direction of each line can be set independently using the field Direction The configuration of the general purpose digital I Os is shown in the following figure Each signal is associated with the dedicated tri state buffer If a pin at the CN1 connector is configured to be input its state can be read by a program If a pin is an output its state can be set As well a program can read the state of the output signals Such a read operations allow to verify if the states assigned to the output I Os are really present as the board outputs m CNlInput CN1 CN10utput MF utpu CN1Direction Fig 5 7 Interfaces to a general purpose digital I O signal In the NET interface the direction and state of the I Os are stored in dedicated DigitallOClass class
26. Idx Set pin mod RTDACUSBBuffer CNiPinMode Can not detect any RT DAC USB2 device n Can not open the RT DAC USB2 device n amp RTDACUSBBuffer as general purpose for all signals 0 Set direction of the Ch0StSt to be output RTDACUSBBuffer CNiDirection Setups of the RTDACUSBBuffer Chrono 0 RTDACUSBBuffer Chrono 0 RTDACUSBBuffer Chrono 0 RTDACUSBBuffer Chrono 0 RTDACUSBBuffer Chrono 0 Duration of RTDACUSBBuffer RTDACUSBBuffer RTDACUSBBuffer RTDACUSBBuffer Chrono 0 Generate the puls RIDACUSBBuffer CNl1Output amp CommandSend 0103 BoardIdx RTDACUSBBuffer CN1lOutput CommandSend 0103 BoardIdx RIDACUSBBuffer CNl1Output amp CommandSend 0103 BoardIdx CommandRead 0103 BoardIdx printf Result USB2Close BoardIdx RT DAC USB2 User s Manual EnableBlock InvertStartStop InvertStop InvertGate EnableGate the H state at the ChO0StSt TriggerMode Chrono 0 ArmMeasurement Chrono 0 NextMeasurement Chrono 0 ClkDivider amp OXOFFFFFFB moe 0 0 0 0 0 1 1 0 Maximum resolution OxOFFFFFFB Set DIO2 to L amp RTDACUSBBuffer 0x00000004 Set DIO2 to H amp RTDACUSBBuffer OxOFFFFFFB Set DIO2 to L amp RTDACUSBBuffer amp RTDACUSBBuffer RTDACUSBBuffer Chrono 0 Result page 57 Ww InTeCo CH language RTDACUSB2 0103 brd new RTDACUSB2_0103 if brd O
27. NC5 A ENC5_B and 5 I for the sixth encoder NC6 A ENC6 and ENCSO I for the seventh encoder and NC7 A ENC7_B and ENC7 I for the eighth encoder tr Ei pri rn Ei p tj n the pins used by the encoder signals are also used by the general purpose digital I Os If the encoder signals are defined to be inputs their states can be read typically as the digital inputs and simultaneously they excite the respective encoder block If the signals are set to be outputs their states are determined by the software typically as the digital outputs and simultaneously they excite the respective encoder block this operating mode can be applied to test the blocks in a programming manner encoder channels are assigned to the pins at the CN1 connector and are shared with the general purpose digital input output signals see Fig 4 1 If the direction of DI O s are set to be the output the appropriate RT DAC USB2 User s Manual page 39 Ww InTeCo pins operate as the digital outputs Usually the encoder works if the shared pins are set to be inputs In such a case they excite the encoder inputs and can be read simultaneously as the digital inputs In the C language interface the features of the encoder channels are controlled by the EncoderType structure The main structure of the RTDACUSB2BufferType type contains the array EncoderType Encoder 8 that is applied to communicate with the encoder blo
28. ND GND GND GND GND GND GND GND GND GND GND Fig 4 2 RT DAC USB2 I O CN2 connector The RT DAC USB2 board is equipped with 16 multiplexed analog inputs located at the CN2 connector They are named from 0 down to 15 The output of the analog multiplexer is connected to the input of the digital programmable analog amplifier The board is also equipped with four 12 bit D A converters These outputs are named from A O 0 down to 3 Only 26 pins at the CN1 connector are used as general purpose digital I O signals DIOO to DIO25 The remaining pins are the ground and power GND 5V 3 3V The general purpose digital I O signals can be individually configured to be either the input or output As the number of general purpose digital I O signals is limited all of them are shared with the signals of the specialized blocks The specialized blocks are implemented as the modules in the on board FPGA structure RT DAC USB2 User s Manual page 11 W InTeCo It means that the functions of the specialized block are hardware implemented The specialized blocks are PWM generators there are eight PWM blocks The outputs are marked PWMI PWM2 PWM3 PWM4 PWM5 PWM6 and PWM7 incremental encoders the device contains eight incremental encoder channels Each channel requires three input signals wave A named from ENCO A down to ENC7 A wave B from B to 7 B and index from ENCO It
29. NET the On and Off values are available A change from On to Off starts a measurement 5 9 4 StartInv C interface unsigned int StartInv NET interface StartInvState StartInv Simulink interface FregMStartInv output of the read S function SetFreqMStartInv input of the send S function DESCRIPTION The field is applied to invert Start signal either software or hardware If the Start signal is inverted its falling edge starts the measurement In C and Simulink the 0 and 1 values are available The 1 value inverts the Start signal In NET the On and Off values are available The value On inverts the Start signal 5 9 5 SwGate C interface unsigned int SwGate NET interface SwGateState SwGate Simulink interface FreqMSwGate output of the read S function SetFreqMSwGate input of the send S function DESCRIPTION The field sets the software Gate signal If there is selected the software source of the Gate signal then this signal gates measurements In C and Simulink the 0 and 1 values are available The 1 value gates measurements In NET the On and Off values are available The On value may be applied to gate measurements 5 9 6 GateInv C interface unsigned int GateInv NET interface GateInvState GateInv Simulink interface FreqMGateInv output of the read S function SetFreqMGateInv input of the send S function DESCRIPTION The field is applied to invert Gate signal either software and hardware
30. NV INTECO v Krakow POLAND inteco kki krakow pl www inteco com pl RT DAC USB2 I O Board Board version 1 03 User s Manual Krak w 2010 Revision History Version Date Resp Description 1 0 2010 09 30 KK First release 1 1 2010 10 25 KK Text improvements Ww InTeCo Table of contents 1 GENERAL 4 1 1 SPECIFICATION C 4 1 2 BOARD ARCHITECT RE 5 5 rre O W W HIE EUER TREE REED E EO EE ERI ter EFE eret 6 2 BOARDINSTALELAT QN swoi EA eoe e oe vaca ees 7 3 DRIVER INSTALDA TION e ei esce ioo eoe eto oa eeu o Fo uw ga co eo ob 8 4 CONNECTOR PIN ASSIGNMENT ee ee eo aeos ooa eno ea aso ea appa Fa ae e PER ose o eon o Se es to aae Peor ao e aan 10 5 USB ACCESS FUNCTIONS co esos seco eet seo eo sb sane Da ase edt boot Gada d fere e eed uo od de rose e ape eU UO deae 14 5 1 GENERAL DESCRIPTION OF SOFTWARE INTERFACES nnns seen 14 5 1 1 C g pr E 14 5 1 2 NET interfQCe ve 15 5 1 3 MATEAB Simulink interface ito
31. OWE supply The CNI connector is not visible at the Fig 2 1 because it is placed below CN2 connector The digital version of the board is equipped with the CN1 connector only The CN2 connector contains pins connected to A D inputs and D A outputs only The Power signalling LED is emitting light when the On Off switch is on Ready LED indicates that the communication between the RT DAC USB2 board and computer is running and Programming Enable LED is emitting light when the board is ready to be programmed To install the board e install driver for the board see below or CD DRIVER readme txt install RT DAC USB2 testing applications optionally install the RT CON package connect the board to the computer using the included USB cable connect the national version of the DC 9V 12V stabilised power supply not included 9V DC voltage is recommended e test the board see section 6 RT DAC USB2 User s Manual page 7 W InTeCo 3 DRIVER INSTALLATION The driver for RT DAC USB2 board has to be installed The user with administrator privileges must install the drivers for Windows 2000 and Windows XP Windows 2000 XP installation 1 Start Microsoft Windows 2000 XP 2 Connect the RT DAC USB2 device and turn power ON 3 System detects a new USB device 4 Select the file CD driver w2k_xp cyusb inf and then press OK If the driver is not installed and the RT DAC USB2 device is connected to the PC it appears as unknown d
32. PR A CEN 65 6 3 PWM TEST ER E tU 66 6 4 ENCODER TEST D 67 6 5 FREQUENCY METER TEST rr a s O WE EE ss WWR 67 6 6 CHRONOMETER TEST ve O epe er ecoute ts ee tdi eue cR re Eie e AW 69 6 7 AID CONVERSION TES HER TC L 71 6 8 D A CONVERSION TEST A A AW IU RE OMA 72 RT DAC USB2 User s Manual page 2 wv InTeCo NOTES MATLAB Simulink RTW and RTWT are registered trademarks of The MathWorks Inc Windows 95 98 NT 2000 XP are registered trademarks of Microsoft Corporation Copyright INTECO 2010 All rights reserved RT DAC USB2 User s Manual page 3 InTeCo W 1 GENERAL INFORMATION The RT DAC USB2 is a multifunction analog and digital I O board dedicated to real time data acquisition and control in the Windows 95 98 NT 2000 XP environments The board contains a Xilinx FPGA chip boards are built as the OMNI version It means the boards can be reconfigured to introduce a new functionality of all inputs and outputs without any hardware modification The default configuration of the FPGA chip accepts signals from incremental encoders and generates PWM outputs typical for mechatronic control applications and is equipped with the general purpose digital input outputs GPIO A D and D A converters timers counters frequency meters and chronometers The RT DAC USB2 board is distributed in two versions e analog
33. RTDAC2 Synthesis date 2010 09 16 Logic version 0103 PwM Channel 12 Mode Prescaller 12 C 12bit 100 1228 30 0 Close Fig 6 3 The PWM test window Table 6 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 7 Fields of the PWM application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name of the board Name Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Section 5 3 1 8 bit 12 bit generation mode Section 5 7 1 Synthesis date Logic version Mode RT DAC USB2 User s Manual page 66 Ww InTeCo Prescaler of the block determines the Prescaler frequency Section 5 7 2 Duration of the H state of the PWM periods Section 5 7 3 Width 6 4 Encoder test The screens of this testing program are shown in Fig 6 4 The windows present states of the ENC4 and ENCS channels The parameters of the encoder channels are given in the Encoder frames ua RT DAC USB2 Encoder RT DAC USB2 Encoder Manufacturer Product Serial no Vendor ID Product ID Manufacturer Product Serial no Vendor ID Product ID InreCo RT DAC USB2 000001 050404 0x8613 v InTeCo
34. StSt 29 DIO18 ENC6A Fr6G Ch6G 30 DIO19 ENC6B Fr6St Ch6St 31 01020 PWM6 ENCOI Fr l Ch6StSt 32 DIO21 ENC7A Fr7G Ch7G 33 DIO22 ENC7B Fr7St Ch7St 34 DIO23 PWM7 7 Fr7I Ch7StSt 35 DIO24 CNT 0 36 DIO25 CNT 1 37 GND 38 GND 39 5 0 V 40 3 3 V RT DAC USB2 User s Manual page 10 NV InTeCo Digital Counter PWM Encoder Frequency meter Chronometer Y Power 000 FroG Ch0G 001 ENCOB FrOSt ChOSt DIO2 PWMO ENCOI Frol ChOStSt DIO3 1 004 ENC1B FriSt ChiSt DIO5 PWM1 Fril ChiStSt DIO6 ENC2A Fr2G Ch2G DIO7 ENC2B Fr2St Ch2St DIO8 PWM2 21 Fra Ch2StSt DIO9 ENC3A Fr3G Ch3G DIO10 Fr3St Ch3St Ch3StSt ENC3I PWM3 DIO11 01012 ENC4A Fr G Ch4G Ch4St Fr4St ENC4B DIO13 0014 PWM4 ENCAI 41 Ch4StSt Ch5G Fr5G DIO15 0016 ENC5B Fr5St Ch5St Ch5StSt Fr5l 5 PWM5 DIO17 DIO18 ENC6A FreG Ch6G Ch6St FreSt ENC6B DIO19 0020 PWM6 ENCE6I Fr6l CheStSt Ch7G ENC7A DIO21 0022 ENC7B Fr7St Ch7St Ch7StSt Fr7l ENC7I PWM7 0023 0024 CNT1 01025 GND 45V Fig 4 1 RT DAC USB2 I O CNI connector The analog and digital version of the RT DAC USB2 board is equipped additionally with the CN2 40 pin connector The pin assignment of the connector is shown in Fig 4 2 A O 0 1 A O 2 A O3 gt NOO ROD Oo Analog output Analog input Ground W GND GND GND GND GND GND GND GND GND G
35. USB2 Fig 5 1 NET class diagram The RTDACUSB2 0103 class derives from RTDACUSB2 The RTDACUSB2 class is responsible for transferring data over the USB link The RTDACUSB2 class derives from the RTDACBoard class This class manages the features of the I O channels of the board Each I O channel type contains his own class definition see Fig 5 2 The properties of the classes from Fig 5 2 are described in the following sections ConfigurationClass Y DigitalIOClass Y Class Class EncoderIClass Y PWMClass Y Class Class TmrCntClass Class FreqMClass E ChronoClass Y Class Class ADClass DAClass Class Class Fig 5 2 Class types encapsulated in the RTDACBoard class RT DAC USB2 User s Manual page 15 W InTeCo 5 1 3 MATLAB Simulink interface A data frame is send to or read from the RT DAC USB2 board by the Simulink interface C source code S functions and respective mex files The S function block that read data from the board is shown in Fig 5 3 It contains 46 outputs most of them are vector lines The first output contains the status code of the read data frame operation The remaining outputs contain all configuration data setups and measurements from all I O channels read from the board The details of the output ports are described in the following sections ridacusb2 read 0103 Fig 5 3 ol Read S function block The S function block that sends data to th
36. able 10 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 10 Fields of the Chronometer application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Kasie Name of the board Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Logic version Section 5 3 1 Enable status of the block Enable block Section 5 10 1 Enable GATE State of the enable GATE signal Section Invert STARTSTOP State of the invert STARTSTOP signal Section Invert GATE State of the invert GATE signal Section State of the arm signal Section Measurement mode Measurement operation mode Section Invert STOP State of the invert STOP signal Section Mode Start stop mode Section CIk divider Value of the clock divider Section Measurement status Status RT DAC USB2 User s Manual page 70 W InTeCo Value of counter Counter Section Result of the last measurement Result Section 6 7 A D conversion test The application shown in Fig 6 9 illustrates the levels of the analog signals at the analog inputs of the board The levels are presented as values read from the A D converters and as voltage values Al
37. al parameter of the block and can not be accessible from outside if the SwHwGateStart flag is set to 0 the Start and Gate signals are equal to SwStart and SwGate parameters respectively it means that the software is the source of the SwStart and SwGate signals if the SwHwGateStart flag is set to 1 the Start and Gate signals are equal to Frx St inputs if the GateInv parameter is set to 1 the Gate signal is inverted if the StartInv parameter is set to 1 the Start signal is inverted if the InputInv parameter is set to 1 the Fr input signal is inverted if the block detects a rising edge of the Start signal the following actions are performed the Ready parameter is set to 0 the Pending flag is set to 1 the Timer input parameter is used to determine the duration of the counting period The resolution of the counting period is 25 ns the rising edges of the signal or falling edges when the nputlnv is set are counted only when the Pending flag is 1 or if InfiniteFlag parameter is set to 1 the number of pulses is stored in the Result counter the Pending flag is set to 0 when the counting period terminates it indicates the termination of the measurement cycle the Gate input signal can be applied to stop the counting of the pulses of the input signal as well as to stop the counting of the counting period If the Gate signal is equal to 1 the
38. and digital RT DAC USB2 and e digital only RT DAC USB2 D This manual contains description for the both versions In the case if any facility of the board relates to one version only this fact is clearly marked 1 1 Specification Analog section not available in the RT DAC USB2 D version Analog Inputs Channels 16 single ended multiplexed Resolution 12 bit Input ranges 10V programmable gain x1 x2 x4 x8 x16 Conversion time 5 4 us Trigger all the A D channels are scanned automatically when USB host requires data Reference voltage on board Analog Outputs Channels 4 Resolution 12 bit 14 bit Output range 10 5 Settling time 10 to 0 0196 Reference voltage on board Digital section version 1 03 Digital Input Output Channels 26 bi directional direction setting 8 channels shared with PWM outputs some inputs shared with counter timer chronometer and frequency meter inputs Direction bi directional individually software programmable Digital Input voltage Vin 2 0V 3 6V Vy 0 5V 0 8V Output voltage 24V min 0 4 max Output current 2mA per channel Standard LVTTL Timer Counter 32 bit timer counter 2 channels counts internal clock signal or external impulses External pulse duration min 50ns RT DAC USB2 U
39. cks In the NET interface the state of the encoder blocks are described in EncoderIClass class dedicated to be an interface to quadrature encoders equipped with the index signal 5 8 1 Reset C interface unsigned int Reset NET interface ResetState Reset Simulink interface EncoderReset output of the read S function SetEncoderReset input of the send S function DESCRIPTION The field sets means the reset state of the block If the block remains in the reset state the counter is equal to zero In the C and Simulink interfaces the value equal to 1 indicates reset of the block counter If this integer value is equal to 0 the block traces the A and B inputs and changes the counter value In the NET interface the value equal to On indicates reset state O f indicates that the block counts impulses 5 8 2 IdxActive C interface unsigned int IdxAvtive NET interface IdxActiveState IdxActive Simulink interface EncoderIdxActive output of the read S function SetEncodeIdxActive input of the send S function DESCRIPTION This flag activates the encoder index signal When the index signal is active the active level of the external ENCx I signal resets the encoder counter In the C and Simulink interfaces the value equal to 1 activates the index input signal If this integer value is equal to 0 the external ENCx I signal is not applied to reset the encoder counter In the NET interface the value equal to On indicates active index
40. device Mn return Boardldx USB2Open if BoardIdx lt 0 printf Can not open the RT DAC USB2 device n return if CommandRead 0103 Boardldx amp RTDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return Activate index and reset the encoder counter RTDACUSBBuffer Encoder 2 IdxActive 1 RT DAC USB2 User s Manual page 41 W InTeCo RTDACUSBBuffer Encoder 2 RTDACUSBBuffer Encoder 2 CommandSend 0103 BoardIdx Start counting disable RTDACUSBBuffer Encoder 2 CommandSend 0103 BoardIdx wait CommandRead 0103 BoardIdx Result printf Encoder value USB2Close BoardIdx C language RTDACUSB2 0103 brd if brd Open lt 0 1 MessageBox Show Can not open the device IdxlInvert 0 Reset 1 amp RTDACUSBBuffer reset signal Reset 0 amp RTDACUSBBuffer amp RTDACUSBBuffer RTDACUSBBuffer Encoder 2 Counter Result new RTDACUSB2 0103 m d Encoder example MessageBoxButtons OK MessageBoxIcon Exclamation return brd ReadUSBFrame Activate index and reset the encoder counter brd Encoderl 2 lIdxActive EncoderIClass IdxActiveState On brd EncoderI 2 IdxInvert brd EncoderI 2 Reset brad SendUSBF rame Start counting disable brd Encoderl 2 Reset brd SendUSBFrame wait brd ReadUSBFrame String sAux
41. e board is shown in Fig 5 4 It contains single output and 35 inputs Most of the inputs are vector lines The output contains the status code of the send operation The remaining inputs contain all setups send to the board The details of the input ports are described in the following sections I iii TULIT le Fig 5 4 Send S function block ii w caf cof cof ol cof cof o of o co USB2 Send rdacusb2 send 0103 gt a RT DAC USB2 User s Manual page 16 Wy InTeCo The parameters of the S function USB Read and USB Send blocks are shown in Fig 5 5 The windows contain the names of the S functions and two parameters The first parameter is a serial number of the RT DAC USB2 board the block communicates with The serial number is assigned to each RT DAC USB2 device during the assembling process and is unique for each RT DAC USB device The serial numbers are applied to select a board in the case when more than one RT DAC USB2 is connected to the computer The serial numbers are positive integer values If the first parameter is negative 1 value in Fig 5 5 it means that only a single RT DAC USB2 board is connected to the computer and the serial numbers are not applied to distinguish the boards The second parameter is the sampling period of the block Source Block Parameters USB2 Read E Function Bl
42. e divided The 30 bit Divider register contains the division factor The reference frequency is divided by the Divider 1 value zero Divider value means no division RT DAC USB2 User s Manual page 55 Ww InTeCo 5 10 13 Counter C interface unsigned int Counter NET interface uint Counter DESCRIPTION The 32 bit Counter register counts 25ns pulses between the start and stop conditions The value of this register changes when the measurement is pending When the stop condition occurs the value of the Counter register is stored into the Result register The field is read only 5 10 14 Result C interface unsigned int Result NET interface uint Result Simulink interface ChronoResult output of the read S function DESCRIPTION 32 bit register The result of the last measurement cycle The result is ready to read when the Ready flag is set see section 5 10 11 The field is read only RT DAC USB2 User s Manual page 56 W InTeCo 5 10 15 Example Generate a pulse of the H logical state at the DIO2 output The DIO2 signal is shared with ChOStSt Measure the duration of the generated pulse at the CAO chronometer C language RTDACUSB2BufferType int NoOfDetectedUSBDevices int BoardIdx NoOfDetectedUSBDevices RTDACUSBBuffer USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf return Boardldx USB2Open if BoardIdx lt 0 printf return CommandRead 0103 Board
43. e publisher of this driver software z Windows has successfully updated your driver software gt Don t install this driver software Windows has finished installing the driver software for this device You should check your manufacturer s website for updated driver software for your sen InTeCo RT DAC USB2 gt Install this driver software anyway Only install driver software obtained from your manufacturer s website or disc Unsigned software from other sources may harm your computer or steal information gt See detais Fig 3 5 Windows security warning Fig 3 6 Confirmation of the successful installation The 64 bit versions of Windows require that all drivers are digitally certified which the driver for the RT DAC USB2 is not A user needs to reboot the Windows PC and press F8 to show the boot option list The loading installing unsigned drivers option has to be selected to allow installation of the driver When the RT DAC USB2 is properly installed it is visible in the Device Manager at the list of devices in the Universal Serial Bus controllers category as the InTeCo RT DAC USB2 entry see Fig 3 7 Device Manager A Di xj File Action View Help egt Hs S65 Monitors a Network adapters Processors 4 Sound video and game controllers lt gt Storage controllers System devices 9 Universal Serial Bus controllers Generic USB Hub Generic USB Hub InTeCo RT DAC USB2 9 Intel R 5 Series 3400 Seri
44. eCo int Open DESCRIPTION The method of the RTDACUSB2 0103 class Opens the communication with the RT DAC USB2 board Can be called when only a single board is connected to the computer ARGUMENTS None RETURNED VALUE If successful the method returns zero The 2 value indicates that any RT DAC USB2 unit connected to the computer can not be found int ReadUSBFrame DESCRIPTION The method of the RTDACUSB2 0103 class Reads a single frame from the RT DAC USB2 board Data from the frame are applied to update the values of the properties of the RTDACUSBZ 0103 class After this method is called the properties contain up to date values of setups and measurements ARGUMENTS None RETURNED VALUE If successful the method returns zero A negative value indicates an error int SendUSBFrame DESCRIPTION The method of the RTDACUSB2 0103 class The properties of the RTDACUSB2 0103 class are packed into a data frame sent to the RT DAC USB2 board ARGUMENTS None RETURNED VALUE If successful the method returns zero negative value indicates an error RT DAC USB2 User s Manual page 22 Ww InTeCo 5 3 Version management The RT DAC USB2 devices contain some data applied to distinguish the configurations of the on board FPGA chips The data are version of the FPGA configuration name of the FPGA configuration synthesis date of the FPGA configuration and the numbers of I O channels implemented in FPGA The data a
45. elect the 8 bit operating mode set the frequency to 300 Hz and set the duty cycle to 2596 the state lasts 2596 of the period For the second PWM channel select the 12 bit operating mode set the frequency to 10 Hz and set the duty cycle to 7596 C language RTDACUSB2BufferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf Can not detect any RI DAC USB2 device n return Boardldx USB2Open if BoardIdx lt 0 printf Can not open the RT DAC USB2 device n return if CommandRead 0103 BoardIdx amp RIDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return Switch pin mode to allow PWM outputs for PWMO and 1 RTDACUSBBuffer CN1PinMode 0x0000024 Set respective pins to be outputs RTDACUSBBuffer CN1Direction OXOFFFFFDB RTDACUSBBuffer PWM 0 Mode 0 8 bit PWM mode RTDACUSBBuffer PWM 1 Mode 1 12 bit PWM mode The prescaler value of 522 defines the 300Hz frequency The width equal to 64 means 25 duty cycle 64 is 25 of 256 RTDACUSBBuffer PWM 0 Prescaler 522 RTDACUSBBuffer PWM 0 Width 64 The prescaler value of 60 defines the 10Hz frequency The width equal to 3072 means 75 duty cycle 3072 is 75 of 4096 RTDACUSBBuffer PWM 1 Prescaler 60 RTDACUSBBuffer PWM 1 Width 3072 Start PWM ou
46. en the start and stop conditions 7 when the NextMeasurement flag is set the state immediately changes to ReadyToArm If also the Arm flag is set a new measurement is armed automatically In the basic mode the block counts the pulses of the reference signal which period is equal to 25ns To allow measurements of longer time periods the reference frequency can be divided The 30 bit Divider register contains the division factor The reference frequency is divided by the Divider 1 value zero Divider value means no division The board contains eight chronometer blocks Each block uses three external input signals x is a number from 0 to 7 and means the number of the block e ChxG gating signal e ChxSt external Start signal e ChxStSt external Start Stop signal In the C language interface the features of the chronometer channels are controlled by the ChronoType structure The main structure of the RTDACUSB2BufferType type contains the array ChronoType Chrono 8 1 that is applied to communicate with the blocks In the NET interface the state of chronometers are described in the ChronoClass class 5 10 1 EnableBlock C interface unsigned int EnableBlock NET interface EnableState Enable Simulink interface ChronoEnable output of the read S function SetChronoEnable input of the send S function DESCRIPTION The field sets means the enable state of the block The block operates responds to inputs and parameters if it
47. er software and select the driver location as given in Fig 3 3and Fig 3 4 W Update Driver Software Unknown Device C 1 update Driver Software Unknown Device W Update Driver Software Unknown Device update Driver Software Unknown Device How do you want to search for driver software gt Search automatically for updated driver software s EAZA ABAK eun device unless you ve disabled this feature in your device installation settings gt Browse my computer for driver software Locate and install driver software manually Browse for driver software on your computer Search for driver software in this location pm Include subfolders gt Let me pick from a list of device drivers my computer This list will show installed driver software compatible with the device and all driver software in the same category as the device Fig 3 3 Browse the computer option cone Fig 3 4 Select the driver Windows displays the security warning caused by the uncertified driver Please force the driver to be installed see Fig 3 5 Finally the confirmation of the successful driver installation is given as presented in Fig 3 6 RT DAC USB2 User s Manual page 8 InTeCo windows Security Update Driver Software Rr Dacjusgz gt Update Driver Software InTeCo RT DAC USB2 Windows can t verify th
48. es Chipset Family USB Enhanced Host Controller Intel R 5 Series 3400 Series Chipset Family USB Enhanced Host Controller 3834 H NEC Electronics USB 3 0 Host Controller NEC Electronics USB 3 0 Root Hub USB Composite Device USB Root Hub USB Root Hub Fig 3 7 RT DAC USB2 device at the list of installed devices RT DAC USB2 User s Manual page 9 W InTeCo 4 CONNECTOR PIN ASSIGNMENT The digital version the RT DAC USB2D board is equipped with one 40 pin I O connector CN1 The pin assignment of the connector is shown in Table 1 and Fig 4 1 Table 1 RT DAC USB2 I O pin assignment RO da iw Counter PWM Encoder gt Chronometer 1 0100 ENCOA Fr0G Ch0G 2 GND 3 DIOI ENCOB FrOSt ChOSt 4 GND 5 DIO2 PWMO ENCOI FrOI ChOStSt 6 GND 7 DIO3 ENCIA FrlG Ch1G 8 GND 9 0104 ENCIB FrlSt Ch1St 10 GND 11 DIOS PWMI ENCII Ch1StSt 12 GND 13 DIO6 ENC2A Fr2G Ch2G 14 GND 15 DIO7 ENC2B Fr2St Ch2St 16 GND 17 DIO8 PWM2 ENC2I Fr2I Ch2StSt 18 GND 19 DIO9 ENC3A Fr3G Ch3G 20 GND 21 0010 ENC3B Fr3St Ch3St 22 DIO11 PWM3 ENC3I Fr3I Ch3StSt 23 DIO12 ENC4A Fr4G Ch4G 24 DIO13 ENC4B Fr4St Ch4St 25 DIO14 PWMA ENCAI Fr4l Ch4StSt 26 01015 ENC5A Fr5G Ch5G 277 DIO16 ENCSB Fr5St Ch5St 28 DIO17 PWM5 ENCSI Fr5I Ch5
49. evice at the list of the devices in the Device Manager see Fig 3 1 Action View Action View Heb ga LET a C NE 12 15 B Bluetooth Radios 19 888 Computer Disk drives 9 Display adapters 3 DVD CD ROM drives 9 08 Human Interface Devices 4g ATA ATAPI controllers 19 25 Imaging devices 9 22 Keyboards 9 14 Mice and other pointing devices 89 14 Monitors 8 E Network adapters E b devices Bl BD paces 89 4 Sound video and game controllers 89 5 Storage controllers H qll System devices 9 Universal Serial Bus controllers Bluetooth Radios Computer Disk drives 43 DVD CD ROM drives Bt Human Interface Devices IDE ATA ATAPI controllers Imaging devices 9 25 Keyboards B A Mice and other pointing devices 09 100 Monitors Network adapters li Other devices Update Driver Software lin 2 n Processors 89 4 Sound video and Disable E Storage controller Uninstall H glli System devices Universal Serial sme nes ee nm Fig 3 1 Device list with an unknown device Properties Launches the Update Driver zara tort Fig 3 2 Update driver option Press the right mouse button at the Unknown device item and select the Update Driver Software item see Fig 3 2 Select the Browse my computer for driver software option DO NOT select the Search automatically for updated driv
50. fferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf Can not detect any RI DAC USB2 device Mn return USB20Open if BoardIdx lt 0 printf Can not open the RT DAC USB2 device n return if CommandRead 0103 BoardIdx 6RIDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return Set the levels of the D A2 and D A3 RTDACUSBBuffer DA 2 0 75 16384 RTDACUSBBuffer DA 3 0 25 16384 CommandSend 0103 BoardIdx amp RTDACUSBBuffer USB2Close BoardIdx C language RTDACUSB2 0103 brd new RTDACUSB2_0103 if brd Open lt 0 f MessageBox Show Can not open the device Encoder example MessageBoxButtons OK MessageBoxIcon Exclamation return brd ReadUSBFrame Set the levels of the D A2 and D AS3 brd DA 2 DAValue uint 0 75 16384 brd DA 3 DAValue uint 0 25 16384 brd SendUSBFrame RT DAC USB2 User s Manual page 63 InTeCo 6 TEST APPLICATIONS The software included to the RT DAC USB2 board contains eight short programs which allow to test all the functions of the board More than one program can be run simultaneously to perform more advanced tests For example the outputs of the PWM waves can be observed by the program used to test digital I O signals There are the following
51. ge 25 W InTeCo 5 4 Operating mode of the shared output signals Some pins are shared between the digital I O lines and outputs of the PWM blocks When a shared pin works as an output it must exist a method to determine whether the pin is controlled by a general purpose digital I O or by a PWM block For this reason the CN PinMode field is applied The field sets the operation mode of the shared pins In the NET interface the pin mode data are stored in the dedicated DigitalIOClass class C interface NET interface Simulink interface SetCN1PinMode DESCRIPTION unsigned int CN1PinMode UInt32 DigitalIO CN1PinMode CN1PinMode output of the read S function input of the send S function The field sets means a mode of the shared pins Data determine the source of the output signals DIO8 PWM2 DIOII PWMG DIO14 PWM4 DIOI7 PWMS DIO20 PWM6 and DIO23 PWM7 If a bit is set to zero it means the pin is defined as the output of the general purpose digital I O If a bit is equal to 1 the corresponding pin is defined as the output DIO2 PWMO DIOS PWMI of a PWM block This feature of the board is coded as 32 bit double word but only eight bits are used as it is shown in the following tables Bit No 7 6 5 4 3 2 1 0 _ _ DIOS _ _ DIO2 PWMI PWMO Bit No 15 14 13 12 11 10 9 8 _ 1014 _ _ DIO11 _ _ DIO8 PWM4 PWM3 PWM2 Bit No 23 22 21 20 19 18 17 16
52. gister is stored in the Result register so the Result register contains the result of the measurement e the Start trigger start a series of measurements When a measurement cycle terminates a new measurement is started immediately The Result register always contain the result of the last measurement In and Simulink values of 0 and 1 are available The value of 0 allows to start a single measurement The value of 1 prepares a block to start a series of measurements In NET the Single and Continous values are available which start a single of a series of measurements respectively 5 9 11 Timer C interface unsigned int Timer NET interface uint Timer Simulink interface FregMTimer output of the read S function DESCRIPTION The 30 bit value that determines the duration of the counting period The duration of the period is given as the number of 25ns pulses This field is read only 5 9 12 Ready C interface unsigned int Ready NET interface ReadyState Ready Simulink interface FreqMReady output of the read S function SetFreqMReady input of the send S function DESCRIPTION Determines if the Result register contains the result of the measurements In single mode it informs that register is ready to read In multiple measurements mode it informs that result register contains a ready to read result of a last measurement In C and Simulink values of 0 and 1 indicate not ready to read and ready to read states
53. he direction register and the mode configuration register The direction register must set the PWM signals to become the outputs The pin mode configuration register determines whether the signals are associated with the specialized PWM blocks or operate as the general purpose digital IOs In the first case the states of the outputs are constructed by the PWM block In the second case the state of the outputs are defined by the software The basic PWM period and the period of the state width of each channel are selected independently The operating principle of the PWM channels is illustrated in Fig 5 9 The input basic frequency of the PWM channels is set to the default 20MHz value This frequency is divided by the counter called the prescaler which creates the PWM basic period The basic period wave excites the 8 or 12 bit counter The output of the counter is compared to the 8 or 12 bit width of the state The valid prescaler value is a number taken from the range 0 65535 The PWM counters and the state duration registers can operate in either 8 or 12 bit modes The 8 bit mode allows PWM to operate in a high speed and the 12 bit mode allows to achieve higher accuracy of the output p Prescaler Width init Mod255 ma PWM p Divider ESA Internal Clock Mod 4095 Mode Nn I O signal Parameter Fig 5 9 Block diagra
54. his integer value is equal to 0 the block is disabled In the NET interface the value equal to On indicates enable state Off disables the block 5 9 2 SwHwGateStartFlag C interface unsigned int SwHwGateStartFlag NET interface SwHwGateStartState SwHwGateStart Simulink interface SwHwGateStartFlag output of the read S function SetSwHwGateStartFlag input of the send S function DESCRIPTION The field sets the source of the Start and Gate signals The signals can come from the hardware inputs FRxSt and FrxG or can be set by the software as the SwStart and SwGate parameters In the C and Simulink interfaces the value of 0 indicates the software signal sources If this integer value is equal to 1 the block takes the signal from hardware inputs at CN1 connector In the NET interfaces the value equal to Software indicates the software source Hardware indicates the hardware signal sources RT DAC USB2 User s Manual page 44 W InTeCo 5 9 3 SwStart C interface unsigned int SwStart NET interface SwStartState SwStart Simulink interface FreqMSwStart output of the read S function SetFreqMSwStart input of the send S function DESCRIPTION The field sets the software Start signal If there is selected the software source of the Start signal then the rising edge of this parameter starts a measurement In C and Simulink the 0 and 1 values are available A change from 0 to 1 starts a measurement In
55. input O f indicates that the index input is deactivated RT DAC USB2 User s Manual page 40 Ww InTeCo 5 8 3 IdxInvert C interface unsigned int IdxInvert NET interface IdxActiveState IdxInvert Simulink interface EncoderIdxInvert output of the read S function SetEncodeIdxInvert input of the send S function DESCRIPTION This flag determines the active level of the index input In the C and Simulink interfaces the value equal to 0 determines that the 1 level of the index signal is active If this integer value is equal to 1 the active level of the ENCx signal is 0 In the NET interface the value equal to On indicates that the active level of the ENCx I signal is 0 Off indicates that 1 level is active In fact the reset signal generated from the index input is always 1 and the dxlnvert is applied to invert the input see Fig 5 11 5 8 4 Counter C interface long int Counter NET interface uint Counter Simulink interface EncoderCounter output of the read S function DESCRIPTION 32 bit value of the encoder counter This field is read only 5 8 5 Example Reset the ENC2 encoder activate the index input start counting and read the encoder counter C language RTDACUSB2BufferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx int Result NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf Can not detect any RT DAC USB2
56. interfaces the value equal to 0 sets means the counter mode the value equal to 1 means the timer mode In the NET interface the value equal to CounterMode sets means the counter mode TimerMode means that the block operates as a timer RT DAC USB2 User s Manual page 31 wv InTeCo 5 6 2 Reset C interface unsigned int Reset NET interface TmrCntClass ResetState Reset Simulink interface TmrCntReset output of the read S function SetTmrCntReset input of the send S function DESCRIPTION In the C and Simulink interfaces the value equal to 1 sets means that the counter remains in reset state 0 means the working mode In the NET interface the value On sets means that the counter is reset Off means the working mode The Counter field remains equal to 0 until the Reset field is equal to 1 5 6 3 Counter C interface unsigned int Counter NET interface uint Counter Simulink interface TmrCntCounter output of the read S function DESCRIPTION 32 bit unsigned integer value of the counter The field is read only RT DAC USB2 User s Manual page 32 Ww InTeCo 5 6 4 Example Set the first channel as the timer and the second channel as the counter Reset both channels start counting and read the values of both channels C language RTDACUSBZBufferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices lt 1 printf Can not detect an
57. ion occurs the Counter register value is stored into the Result register The value of the Result register remains constant until the next measurement terminates The chronometer block is implemented as a Finite State Machine FSM The FSM contains five states Disabled ReadyToArm Armed Counting and Terminated The state flow is shown below Enable 0 Enable 0 Counter lt 0 Result lt 0 Enable 1 ReadyToArm ArmMeasurement Trigger 0 NextMeasurement 1 Counter lt 0 Counting Terminated Next 0 Result lt Counter Fig 5 14 State machine of the chronometer block There are three operating modes of the block determined by the 2 bit Mode parameter They are described in the following table Table 4 Operating modes of the chronometer block Value of the ue Start measurement condition Stop measurement condition Mode parameter 00 Rising edge of the StartStop signal Falling edge of the StartStop signal 01 Rising edge of the StartStop signal Rising edge of the StartStop signal 10 Rising edge of the StartStop signal Rising edge of the Stop signal 11 Not used Not used The operation algorithm of the chronometer block can be described as follow RT DAC USB2 User s Manual page 51 Ww InTeCo 1 there are three input signals of the chronometer block StartStop Stop and Gate If the StartStopInv parameter is set
58. is presented in 25ns units RT DAC USB2 User s Manual page 67 W InTeCo uu RT DAC USB2 Frequencymeter Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000002 0 0404 0x8613 gt Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Frequencymeter Channel 10 Enable block C Off Invert START Off On Invert GATE Off On Mode Software START Infinite measurements C Singe Off Off Continuous C On C On Software GATE GATE START source Off Software C On C Hardware Window 400000 Invert INPUT mode Ready n Result 1568 Off C Input C On Time amp Input Fig 6 5 The Frequency meter test window Table 9 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 9 Fields of the Frequency meter application Element of the test application window Description Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name Name of the board Section 5 3 2 Synthesis date Synthesis date of the FPGA configuration Section 5 3 3 Logic version Logic version of the FPGA configuration Section 5 3 1 Enable block State of the enable block flag Section 5 9 1 Mode State of the mode flag Section 5 9 10 Software START S
59. italIO CN1PinMode 0 Set directions brd DigitallO CNiDirection Ox3FF0000 Set outputs brd DigitalIO CN1Output OxFFFF if brd SenduSBFrame lt 0 MessageBox Show Can not send data frame DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return Wait if brd ReadUSBFrame lt 0 MessageBox Show Can not read data frame DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return UInt32 Input brd DigitalIO CNlInput Input Input gt gt 16 amp Ox3FF RT DAC USB2 User s Manual page 30 Ww InTeCo 5 6 Counter timer RT DAC USB2 contains two 32 bit timer counter channels Both counter timer channels can operate either in the counter or timer modes In the timer mode the timer counter channels count pulses of the internal board clock The frequency of the clock corresponds to the board version 20 MHz is the default frequency value In the counter mode the timer counter channels count external pulses respectively from CNTO and CNT1 inputs In the timer mode the blocks does not use any external signals In the counter mode the counter inputs are named DIO24 CNTO and DIO25 CNT1 and are located at the connector at pins 35 and 36 The inputs of the counters CTNO and CNT are shared with the general purpose digital I Os DIO24 and DIO25 If the DIO24 CNTO or DIO25 CNTI signals are defined to be the inputs their states can be read typically
60. lses generated within the measurement window To change the result value one has to change the frequency of the PWM wave it is done by entering a new value in the Prescaler field As well changing the PWM mode from 8 bit to 12 bit changes the frequency 6 6 Chronometer test The application presented in Fig 6 8 sets the parameters of the chronometer channels and presents the results of the measurement The mode is selected as STARTSTOP is H so the block performed a single measurement of the duration of the H state at the ChOStSt input RT DAC USB2 User s Manual page 69 InTeCo W 1 RTDACUSB2 Chrono Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000002 0 0404 0x8613 Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Chronometer Channel 0 gt Enable block C Of On Invert GATE Off On Invert STOP Enable GATE Off On Am C Off On Mode Invert STARTSTOP Off divider Status Counter Result EntTerminated 124 Off On STARTSTOP rising edges STARTSTOP starts STOP terminates Close Fig 6 8 The Chronometer test window The ChxStSt and PWMx signals are located at the same pins of the CNI connector It allows to apply the PWM outputs to test the behaviour of the chronometer blocks See previous section for more detailed description of a test scenario T
61. lt NET interface GainState ADGain Simulink interface ADResult output of the read S function DESCRIPTION The A D conversion result This field is read only In C and Simulink the result of the A D conversion given in the form of a 12 bit U2 coded number The number stored in Result can be transferred to voltage value following the formula if Result gt 2047 Result Result 4096 Voltage 10 Result 2046 1 V The calculated voltage has to be multiplied by the number defined as the Gain property In NET the ADResult field gives a voltage value at the analog input RT DAC USB2 User s Manual page 59 Ww InTeCo 5 11 3 Example Set the gain of the third A D2 input channel to 1 and read the conversion result C language RTDACUSB2BufferType RTDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx int Result double AnalogSignal NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices lt 1 printf Can not detect any RT DAC USB2 device Mn return Boardldx USB2Open if Boardldx lt 0 printf Can not open the RT DAC USB2 device n return if CommandRead_0103 BoardIdx amp RTDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return Set the gain of the third A D channel to 1 RTDACUSBBuffer AD 2 Gain 0 CommandSend_0103 BoardIdx amp RTDACUSBBuffer CommandRead_0103 BoardIdx amp RTDACUSBBuffer Result
62. m of the PWM generator In the 12 bit mode a single PWM period contains 4095 impulses of the output prescaler counter The duration of the state is set by a number from 0 to 4095 In the 8 bit mode PWM period contains 255 impulses of the output prescaler The duration of the H state is set by a number from 0 to 255 The frequency of the PWM wave is given by the formulas doas sa for 8 bit mode fown prescaler 1 255 Ina P isi for 12 bit mode prescaler 1 4095 where equals to 20MHz In the C language interface the features of the PWM channels are controlled by the PWMType structure The main structure of the RTDACUSB2BufferType type contains the array PWMType PWM 8 that is applied to communicate with the PWM blocks In the NET interface the state of the PWM blocks are described in the dedicated class RT DAC USB2 User s Manual page 35 W InTeCo AAA 5 7 1 Mode C interface unsigned int Mode NET interface PWMClass PWMMode Mode Simulink interface PWMMode output of the read S function SetPWMMode input of the send S function DESCRIPTION The field sets means the operating mode of the timer counter In the C and Simulink interfaces the value equals to 0 indicates the 8 bit PWM mode If this integer value is equal to 1 then the 12 bit PWM mode is selected In the NET interface the value equal to PWM8BitMode indicates 8 bit mode PWM12BitMode indicates that the bl
63. mputer identified by the serial number The serial number is a positive integer value assigned to each RT DAC USB2 device ARGUMENTS SerialNo serial number of the RT DAC USB2 device RETURNED VALUE IF successful the function returns the handler to the opened RT DAC USB2 device The handler is a non negative integer value In the case of an error it returns a negative error code int USB2Close int Idx DESCRIPTION The function closes the connected RT DAC USB2 device It is called when all operations with the device are finished ARGUMENTS Idx the handler to the RT DAC USB2 unit The handler is returned by the USB2Open USB2OpenBySerialNo functions RETURNED VALUE If successful then the zero value is returned Otherwise it returns a negative error code int CommandSend 0103 int Idx RTDACUSB2BufferType pBufferToSend DESCRIPTION The function sends the data buffer to RT DAC USB2 device When the buffer is sent the new values of the board outputs and set ups are immediately applied ARGUMENTS the handler to the RT DAC USB2 unit to which new data are sent The handler is returned by the USB2Open or USB2OpenBySerialNo functions pBufferToSend pointer to the structure that contains the new data sent to the RT DAC USB2 board The pointer points to the structure of the RTDACUSB2BufferType type RETURNED VALUE If successful then the zero value is returned Otherwise it returns a negative error code
64. mrCntClass ModeState CounterMode Reset both channels brd TmrCnt 0 Reset TmrCntClass ResetState On brd TmrCnt 1 Reset TmrCntClass ResetState On if MessageBox Show Can not send data frame brd SendUSBFrame O0 Tmr Cnt example MessageBoxButtons OK MessageBoxIcon Exclamation return Start counting brd TmrCnt 0 Reset TmrCntClass ResetState Off brd TmrCnt 1 Reset TmrCntClass ResetState Off if brd SendUSBFrame lt 0 MessageBox Show Can not send data frame Tmr Cnt MessageBoxButtons OK MessageBoxIcon return wait if MessageBox Show Can not read data frame Tmr Cnt MessageBoxButtons OK MessageBoxIcon brd ReadUSBFrame 0 return String sAux sAux Timer 4 String Format 0 D brd TmrCnt 0 Counter Counter String Format 0 MessageBox Show sAux Tmr Cnt brd TmrCnt 1 Counter xample RT DAC USB2 User s Manual example Exclamation example Exclamation MessageBoxButtons OK page 34 Ww InTeCo 5 7 PWM The RT DAC USB2 board includes eight output PWM channels named PWMO PWMI PWM2 PWM3 PWM4 PWM5 PWM6 and PWM 7 located at the CN1 connector at pins 5 11 17 22 25 28 31 and 34 These pins are shared between PWM outputs and eight general purpose digital I Os The PWM operating mode is determined by the contents of t
65. ndRead 0103 BoardIdx amp RIDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return printf Number of detected RT DAC USB2 devices Logic version 04X s NoOfDetectedUSBDevices RIDACUSBBuffer LogicVersion RTDACUSBBuffer ApplicationName Close the device RT DAC USB2 User s Manual page 24 InTeCo USB2Close BoardIdx CH language RTDACUSBZ 0103 brd new RTDACUSB2 0103 Detect the number of connected RT DAC USB2 devices if brd NumOfDevices 1 MessageBox Show Can not find any RT DAC USB2 device DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return Open the RT DAC USB2 device if brd Open lt 0 m MessageBox Show Can not open the device DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return Read the data buffer if brd ReadUSBFrame 0 MessageBox Show Can not read data frame DI O example MessageBoxButtons OK MessageBoxIcon Exclamation return String sAux sAux Number of detected RT DAC USB2 devices String Format 0 D brd NumOfDevices in Logic version String Format 0 X brd LogicVersion brd ApplicationName MessageBox Show sAux DI O example MessageBoxButtons OK Closing not necessary Done automatically when the object destroyed RT DAC USB2 User s Manual pa
66. nput signal If 1 is selected both the input signal and timer pulses are gated In NET the and TimeAndInput values are available The Input value gates only FrxI signal The TimeAnd nput value gates the Frx and timer signals 5 9 9 InfiniteFlag C interface unsigned int InfiniteFlag NET interface InfiniteFlagState InfiniteFlag Simulink interface FregMInfiniteFlag output of the read S function SetFreqMInfiniteFlag input of the send S function DESCRIPTION The counting of the input Frx signal is usually terminated when a counting period terminates If the InfiniteFlag is selected the counting of the input signal edges operates in continuous mode In C and Simulink the 0 and 1 values are available The 1 value switches on the continuous counting In NET the On and Off values are available The On value switches on the continuous counting RT DAC USB2 User s Manual page 46 Ww InTeCo 5 9 10 Mode C interface unsigned int Mode NET interface ModeState Mode Simulink interface FreqMMode output of the read S function SetFreqMMode input of the send S function DESCRIPTION There are available two measurement modes e when Start trigger edge appears a single measurement is started During a measurement period the Result register remains equal to zero and the Counting register shows the current number of counted pulses When the measurement terminates it means when Ready flag is active the Counter re
67. o ENC7 counters there are two counters available The input signals are marked CNTO and CNTI respectively frequency meters RT DAC USB2 contains eight such blocks The signals are named from Fr0_G FrO St and Ito Fr7 G Fr7 St and Fr7 I eight chronometer blocks the signals are named from G St StSt down to Ch7 Ch7 St and Ch7 StSt There are two kinds of specialized blocks the first kind of the specialized blocks contains digital output signals PWM blocks In this case the appropriate pins of the CN1 connector can operate as the general purpose digital I O signals or as the output of the specialized block The operating mode is determined by a mode configuration register CN1 Pin Mode Register If they operate as general purpose digital I Os their directions and states are determined by the software If they operate as the outputs of the specialized blocks the state of the output is controlled by the PWM block The states of the output signals can be read by the software the software can check the PWM output the second kind of the specialized blocks contains only the digital input signals the incremental encoders counters frequency meters and chronometers In this case it is not necessary to select the operating mode of the block signals If the appropriate general purpose I O signals are configured to be the inputs then their states can be read by the software and simultaneously the
68. oardIdx lt 0 printf Can not open the RT DAC USB2 device n return CommandRead_0103 BoardIdx amp RTDACUSBBuffer Set PWMO parameters RTDACUSBBuffer PWM 0 Mode 0 8 bit PWM mode RTDACUSBBuffer PWM 0 Prescaler 3 RTDACUSBBuffer PWM 0 Width 64 Set pin mode and direction to allow PWMO output RTDACUSBBuffer CNiPinMode 0x00000004 RTDACUSBBuffer CN1Direction OXOFFFFFFB RT DAC USB2 User s Manual page 48 InTeCo Setups of the RTDACUSBBuffer FregM 0 EnableBlock 1 RTDACUSBBuffer FregM 0 Mode 0 Single measurement RIDACUSBBuffer FregM 0 InfiniteFlag 0 RTDACUSBBuffer FregM 0 StartInv 0 RTDACUSBBuffer FreqM 0 GateInv 0 RTDACUSBBuffer FreqM 0 SwGate 0 RTDACUSBBuffer FreqM 0 SwHwGateStartFlag 0 Software START source RTDACUSBBuffer FreqM 0 GateMode 0 RTDACUSBBuffer FreqM 0 InputInv 0 RTDACUSBBuffer FregM 0 Timer 400000 Send setups and generate rising edge of the software START RTDACUSBBuffer FreqM 0 SwStart 0 CommandSend_0103 BoardIdx amp RTDACUSBBuffer RTDACUSBBuffer FregM 0 SwStart 1 CommandSend 0103 BoardIdx amp RTDACUSBBuffer Wait for the rumination of the measurement for 1 CommandRead 0103 BoardIdx amp RTDACUSBBuffer if RTDACUSBBuffer FreqM 0 Ready break printf Result dln RIDACUSBBuffer FregM 0 Result Change PWM frequency and restart the measurement RTDACUSB
69. ock Parameters USB2 Send S Function S Function User definable block Blocks can be written in C M level 1 Fortran and and User definable block Blocks can be written in C M level 1 Fortran and Ada and must conform to S function standards The variables t x u and flag are must conform to S function standards The variables t x u and flag are automatically passed to the S function by Simulink Y ou can specify additional automatically passed to the S function by Simulink You can specify additional parameters in the S function parameters field If the S function block requires parameters in the S function parameters field If the S function block requires additional source files for the Real Time Workshop build process specify the additional source files for the Real Time Workshop build process specify the filenames in the S function modules field Enter the filenames only do not use filenames in the S function modules field Enter the filenames only do not use extensions or full pathnames e g enter src 1 not src c 1 extensions or full pathnames e g enter src src not src c src1 c Parameters Parameters S function name irtdacusb2 read dd S function name tdacusb2 send dd S function parameters 1 0 01 S function parameters A 0 01 S function modules S function modules OK OK Apply Fig 5 5 In
70. ock operates in 12 bit mode 5 7 2 Prescaler C interface unsigned int Prescaler NET interface uint Prescaler Simulink interface PWMPrescaler output of the read S function SetPWMPrescaler input of the send S function DESCRIPTION 16 bit value that defines the prescaler parameter The internal clock reference is divided by prescaler 1 to generate the basic PWM period The maximum frequency of the PWM output is approximately equal to 156kHz and is generated in the 8 bit mode when the prescaler is equal to 0 The minimum frequency of the PWM output is approximately equal to 0 15Hz and is generated in the 12 bit mode when the prescaler is equal to 65535 5 7 3 Width C interface unsigned int Width NET interface uint Width Simulink interface PWMWidth output of the read S function SetPWMWidth input of the send S function SetPWMWidthTerminate input of the send S function DESCRIPTION The 12 bit unsigned value sets the duration of the state in each period When the channel operates in the 8 bit mode only the least significant 8 bits are applied In the Simulink there are two inputs of the S functions applied to set the duration of the state in each PWM period The first one Set PWMWidth is applied during each sampling period The second input Set PWMWidthTerminate is used when the simulation terminates RT DAC USB2 User s Manual page 36 Ww InTeCo 5 7 4 Example For the first PWM channel s
71. oded as 32 bit double word but only 26 bits are used in the same order as in the case of direction bits see section 5 5 1 5 5 3 Output C interface unsigned int CNl1Output NET interface UInt32 DigitalIO CNlOutput Simulink interface CN10utput output of the read S function SetCNlOutput input of the send S function SetCNlOutputTerminate input of the send S function DESCRIPTION The field contains values applied to excite output buffers If a pin is defined to be an output the respective bit from the CN1Output register appears at the CN1 connector This feature of the board is coded as 32 bit double word but only 26 bits are used in the same order as in the case of direction bits see section 5 5 1 In Simulink interface in the send S function there are two inputs related with the digital outputs SetCNlOutput and SetCNlOutputTerminate The first one is applied during each sampling period to update the state of the digital outputs The second input is used only once when the simulation terminates The value at the SetCN1OutputTerminate are send to the digital outputs when the execution of the Simulink model terminates RT DAC USB2 User s Manual page 28 Ww InTeCo 5 5 4 Example Open the RT DAC USB2 device which serial number is 14 Set the DIOO DIOIS lines as outputs Set DIO16 DIO17 DIO25 as the inputs Set all output lines to logic state 1 and read all 10 inputs C language RTDACUSB2BufferType RIDACUSBBuffer
72. oett ater ete TED Gro 16 5 2 USB FUNCTIONS aa dwa ER D 18 5 2 1 O 18 3 2 2 tec 21 5 3 VERSION MANAGEMENT RET 23 5 3 1 Logic VErSION MT 23 23 3 2 Application TT 23 9 3 3 23 5 3 4 Number Of CHANNELS 24 5 3 5 24 5 4 OPERATING MODE OF THE SHARED OUTPUT SIGNALS cessere enne nennen nennen nennen nnns 26 5 5 IDIGITAU VO aa DEM deemed MEI ME INIM IMEEM 27 5 5 1 kostete bia bote ZEK 27 2 9 2 JD 28 5 5 3 07 7 m 28 5 5 4 TENN le sieve En 29 5 6 COUNTER TIMER A 31 5 6 1 EEE 31 5 6 2 RESE 32 5 6 3 Quid 32 5 6 4 eun 22 5 7 lan mE M 35 5 7 1 MMOD 36 5 7 2 PPPS COMET I EET 36 5 7 3 vu te 36 3 74 TEN ATIC errn
73. of the frequency meter blocks are described in the DAC1ass class 5 12 1 D A control C interface unsigned int DA 4 NET interface uint DAValue double DAVoltage Simulink interface DA output of the read S function SetDA input of the send S function SetDAterminate input of the send S function DESCRIPTION The field sets a value to the selected D A channel In the C interface the value written to the field is a 14 bit number in the natural binary code and two least significant bits of the number are neglected The value of the output signal Vout expressed in volts corresponds to the number sent to the D A converter The voltage value is calculated by the formula Vout 10 20 DA 16384 V In the NET interface the DAValue property corresponds to a binary number applied to control the D A converter The DAVoltage property corresponds to the output voltages In Simulink the inputs to the send S function are in the range 10 0 to 10 0 and correspond to the output voltages In the Simulink send S functions there are two inputs applied to set the D A outputs The first one SetDA is applied during each sampling period The second input SetDATerminate is used when the simulation terminates to set safe voltages at the analog outputs RT DAC USB2 User s Manual page 62 Ww InTeCo 5 12 2 Example Set the output of the third A D channel to 5V and set the output of the fourth A D channel to 5V C language RTDACUSB2Bu
74. ommunication buffer is visible as a sequence of the words however the communication functions access the buffer as a nested structure of C language The data type definition applied to communicate with the device has the following form typedef struct unsigned int LogicVersion char ApplicationName 7 unsigned long LogicDate unsigned int NoOfChannels 12 unsigned int CN1PinMode unsigned int CNiDirection unsigned int CNiOutput unsigned int CNiInput PWMType PWM NO OF PWM EncoderType Encoder NO OF ENCODER TmrCntType TmrCnt NO OF TMRCNT GeneratorType Generator NO GENERATOR ChronoType Chrono NO OF CHRONO FreqMType FreqM ADType AD NO OF AD unsigned int DA NO OF DA RTDACUSB2BufferType RT DAC USB2 User s Manual page 14 wv InTeCo The name of the data type is RTDACUSB2BufferType The type contains some fields The detailed description of the fields is given in the following sections 5 1 2 NET interface The class diagram of the NET interface is given in Fig 5 1 The main class is RTDACUSB2 0103 It creates interface to version 1 03 of the RT DAC USB2 device The class contains one constructor and two methods one for reading and one for sending data over the USB link The names of the methods are ReadUSBFrame and SendUSBFrame respectively RTDACBoard Class RTDACUSB2 Class RTDACBoard RTDACUSB2 0103 Class URTDAC
75. on 5 11 2 RT DAC USB2 User s Manual page 71 InTeCo 6 8 D A conversion test The screen snapshot of this testing program is shown in Fig 6 10 Four sliders allow to set the voltage levels at the D A outputs The application presents the values applied to control the D A converters as well as the levels of the signals at the analog outputs RT DAC USB2 D A Conversion Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000001 0x0404 0x8613 z Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 D A outputs Value Voltage 10 0 100 D A 0 3277 D A 1 65 D A2 Fig 6 10 The D A test window Table 12 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 12 Fields of the D A convertion application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name of the board Name Section 5 3 2 Synthesis date of the FPGA configuration Section 5 3 3 Logic version of the FPGA configuration Section 5 3 1 Output of the D A channels bit value and voltage Section 5 12 1 Synthesis date Logic version D A outputs RT DAC USB2 User s Manual page 72
76. ons This section contains the general description of the common items The detailed description is presented in the following subsections related to the different types of I O channels Communication with the board is performed by transferring a data frame A dedicated binary buffer placed at the board in the FPGA chip contains all information of the board In this buffer are kept measurements and all settings of the board The FPGA logic manages the binary buffer The data stored in the buffer can be read from the buffer as well as data can be written to the buffer by transferring data frames over USB link The API functions hide the details of the structure of the binary buffer and allow easy access to the features of the RT DAC USB2 device The communication with the board is realized by two main functions e the first reads binary buffer from USB board e the second writes data to the binary buffer at USB board Using these two functions one can maintain all features of the USB board 5 1 1 C interface The RT DAC USB2 access functions are defined in the rtdacusb2 c and the rtdacusb2 h files These files contain the API macro definitions and C API functions referred to the description of the board functions In programs which use API functions the cyapi h file is applied To build an executable the cyapi lib library has to be linked Both the cyapi h and cyapi lib files come from the Cypress Semiconductor company From the computer side the c
77. pen lt 0 MessageBox Show Can not open the device Encoder example MessageBoxButtons OK MessageBoxIcon Exclamation return brd ReadUSBFrame Set pin mode as general purpose for all signals brd DigitalIO CN1PinMode 0 Set direction of the Ch0StSt to be output brd DigitalIO CN1Direction amp OxOFFFFFFB Setups of the brd Chrono 0 Enable ChronoClass EnableState On brd Chrono 0 InvertStartStop ChronoClass InvertStartStopState Off brd Chrono 0 InvertStop ChronoClass InvertStopState Off brd Chrono 0 InvertGate ChronoClass InvertGateState Off brd Chrono 0 EnableGate ChronoClass EnableGateState Off brd Chrono 0 TriggerMode ChronoClass TriggerModeState StartStop ISH brd Chrono 0 Arm ChronoClass ArmState On brd Chrono 0 Next ChronoClass NextState On brd Chrono 0 Divider 0 Maximum resolution Generate the puls brd DigitalIO CNlOutput OxOFFFFFFB Set 0102 to L brd SendUSBF rame brd DigitalIO CN1Output 0x00000004 Set 0102 to H brd SendUSBF rame brd DigitalIO CNlOutput amp OxOFFFFFFB Set DIO2 to L brd SendUSBFrame brd ReadUSBFrame String sAux sAux Result String Format 0 D brd Chrono 0 Result MessageBox Show sAux Chronometer example MessageBoxButtons OK RT DAC USB2 User s Manual page 58 Ww InTeCo 5 11 A D conversion The RT DAC USB2 board is equipped with the 12 bit successive ap
78. proximation A D converter that gives the 5 mV resolution within input range 10V A finer resolution can be achieved by the gain definition using the analog amplifier The A D conversion time of the RT DAC USB2 board is equal to 5 4 us The board logic automatically starts the A D conversions from all analog inputs when the PC host requires data from the RT DAC USB2 device There is possible to select individually the analog gain for each analog input channel The A D conversion functions are not active in the digital version of the board In the C language interface the features of the frequency meter channels are controlled by the ADType structure The main structure of the RTDACUSB2BufferType type contains the array ADType AD 16 that is applied to communicate with the A D converters and the gain amplifier In the NET interface the state of A D conversion channels are described in the ADClass class 5 11 1 Gain C interface unsigned int Gain NET interface GainState ADGain Simulink interface ADGain output of the read S function SetADGain input of the send S function DESCRIPTION The field defines the gain of the analog inputs The amplifications of 1 2 4 8 and 16 are available In and Simulink the Gain is a 3 bit number The values of 0 1 2 3 and 4 define the gains of 1 2 4 8 and 16 respectively In the NET values of x x2 x4 x6 and x16 define the gains of 1 2 4 8 and 16 5 11 2 Result C interface unsigned int Resu
79. ration NoOfPWM uint Configuration NoOfTmrCnt uint Configuration NoOfEncoderI uint Configuration NoOfChrono uint Configuration NoOfFreqM Simulink interface Not available DESCRIPTION The field contains the number of available I O channels In C interface the elements of the NoO Channels array contain the following data NoOfChannels 0 number of PWM blocks NoOfChannels 2 number of encoder blocks NoOfChannels 5 number of timer counter blocks NoOfChannels 7 number of frequency meter blocks NoOfChannels 8 number of chronometer blocks The remaining elements of the NoOfChannels array are reserved for future use In the NET interface the number of channels are stored as respected properties 5 3 5 Example Check if an RT DAC USB2 board is connected Open the board and read some configuration data It is assumed that only a single RT DAC USB2 is connected so the open operation does not require as the argument the serial number of the board C language RTDACUSB2BufferType RIDACUSBBuffer int NoOfDetectedUSBDevices int BoardIdx Detect the number of connected RT DAC USB2 devices NoOfDetectedUSBDevices USB2NumOfDevices if NoOfDetectedUSBDevices 1 printf Can not detect any RT DAC USB2 device n return Open the RT DAC USB2 device USB20Open if BoardIdx lt 0 printf Can not open an RT DAC USB2 device n return Read the data buffer if Comma
80. re accessible after a successful read operation In C language the CommandRead 0103 function has to be called Data are included in a variable of RTDACUSB2BufferType type In NET environment the ReadUSBFrame method has to be activated Data are visible as properties of an object of 5 2 0103 type In Simulink a block that contains the read S function block has to be run Data are accessible at the outputs of the Simulink read S function block the version management fields are read only 5 3 1 Logic version C interface unsigned int LogicVersion NET interface uint LogicVersion Simulink interface Version DESCRIPTION The field contains a number of the logic version applied in the FPGA chip The version is coded as hexadecimal 16 bit number 5 3 2 Application name C interface char ApplicationName 7 NET interface string ApplicationName Simulink interface Not available DESCRIPTION The field contains a string that describes the application type of the RT DAC USB2 board The string contains 6 characters 5 3 3 Synthesis date C interface unsigned int LogicDate NET interface string SynthesisDate Simulink interface Date DESCRIPTION The field contains the synthesis date of the FPGA configuration The date is coded as hexadecimal 32 bit number in the form YYY YMMDD RT DAC USB2 User s Manual page 23 Ww InTeCo 5 3 4 Number of channels C interface unsigned int NoOfChannels 12 NET interface uint Configu
81. rters that give the 5 mV resolution within the input range 10 A finer resolution can be achieved by the gain definition using digitally programmable analog amplifier The A D conversion time of the RT DAC USB2 board is equal to 5 4 us The board contains four 12 bits D A converters connected to four analog output channels optionally 14 bit D A converters are available The output voltage of the channels is 10V Each analog output channel can sink up to 10 mA Reprogramming the XILINX FPGA chip at the boards can change functions of the board The information and specification how to reprogram XILINX FPGA is not included in this guide Please relate to RTDAC USB2 FPGA Programming Guide distributed by INTECO separately RT DAC USB2 User s Manual page 6 Ww InTeCo 2 BOARD INSTALLATION The RT DAC USB2 setup contains RT DAC USB2 board Two 40 pin ribbon cables only one cable when the digital version is distributed USB cable CD containing a software and e manuals terminal wiring board optional 9V 12V DC 4W stabilised power supply optional The plug dimensions are given in Fig 2 2 The layout of the RT DAC USB2 board is presented in Fig 2 1 RT DAC USB2 USB socket LI Power socket CN2 and CNI metal part LEDs 40 pins connectors C Power CNI not visible Programming enable 5 5 mm J q Ready min 13 mm i On Off Fig 2 1 The layout of the RT DAC USB2 board Pug oF de POP
82. ser s Manual page 4 W InTeCo PWM Outputs Channels 4 Resolution 8 12 bits software selected Base frequency programmable initial 16 bits divider Incremental encoders Channels 4 Output 32 bit counter Index Software configured 2 modes with and without index selectable active level of the index signal USB features USB 2 0 hi speed specification compliant RT DAC USB2 User s Manual page 5 v InTeCo 1 2 Board architecture The block diagram of the RT DAC USB2 board is shown in Fig 1 1 The block diagram of the digital version is presented in Fig 1 2 Clock reference digital I O 4 signal PWM we Mk oem a FPGA FPGA gt timer counter bridge frequency meter meme Configuration A D converter Programmable gain USB Interface EEPROM 16 channels D A converters H D A buffers L gt USB Bus Fig 1 1 General block diagram of the RT DAC USB2 board Clock reference digital I O signal E PWM i encoders gt frequency meter chronometer XILINX FPGA USB FPGA bridge Configuration USB Interface EEPROM USB Bus Fig 1 2 General block diagram of the RT DAC USB2 D board The board is equipped with the 12 bit successive approximation A D conve
83. so one can set gains individually for each A D channel RT DAC USB2 A D Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000002 0 0404 0x8613 v Name RTDAC Synthesis date 2010 09 16 Logic version 0103 i A D inputs Value Voltage Gain Value Voltage AID1 AID2 AID3 04 AIDS AID 08 3 862 x M 3305 3305 3304 3304 3 850 x 3 862 x 3 850 x 3 867 x M 3 855 3 867 x MN EE ES ES EZ EM EG mS m 3 855 3304 3304 3 867 3304 3303 3303 3 867 3304 3 867 3303 3304 3 867 E E E mu mm 3 872 3 872 3 867 3 872 517 EN 3304 Close Fig 6 9 The A D Conversion test window Table 11 presents the elements of the test application and the numbers of sections where the detailed description of the fields is given Table 11 Fields of the A D convertion application Element of the test Description application window Section where the field property is described Status Status of the last USB operation Section 5 2 1 Name of the board Name Section 5 3 2 Synthesis date Synthesis date of the FPGA configuration Section 5 3 3 Logic version Logic version of the FPGA configuration Section 5 3 1 Gain Gain of the A D channels Section 5 11 1 Value and voltage Bit value and voltage at the A D inputs Secti
84. t the board if more then one board is connected to the computer RT DAC USB2 Digital 1 0 Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000001 0x0404 048613 Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Mode Direction Output Input Mode Direction Output Input 0 0 013 f hast IG O17 DIO17 ENCSIFTSI Ch5StSt 01018 BIE T 024 1 025 7 7 z 001 DIO2 DIO ENCOWFrOVChOStSt DIO4 t t OJ 4 gt DIOD I O 5 Oj O D s O O DIOS DIOSIENC1FrIUChisist 0106 ae 007 oaa 01011 DIO11 ENC3l Fr3l Ch3StSt DIO12 JE O J 9 OWO O O O OJ O CAE ONE GE IR ME NE IE O 4 O Fig 6 1 The Digital I O test window RT DAC USB2 User s Manual page 64 Ww InTeCo The analysis of the presented screen will help us to understand the idea of the testing program In the case illustrated in the figure all the digital I O signals except DIO20 and DIO23 are the general purpose I Os The signals are configured to be the outputs except DIO16 DIO19 DIO21 DIO22 DIO24 and DIO25 which are the inputs The outputs from DIOO to DIO15 are set to high The remaining outputs are set to low The states of
85. tate of the software START signal Section 5 9 3 Infinite measurements Value of the infinite measurement flag Section 5 9 9 Invert START State of the START invert flag Section 5 9 4 Software GATE State of the software GATE signal Section 5 9 5 GATE START source State of the GATE START source flag Section 5 9 2 State of the GATE invert signal ide Section 5 9 6 State of the INPUT invert flag AA Section 5 9 7 GATE mode State of the GATE mode flag Section 5 9 8 RT DAC USB2 User s Manual page 68 InTeCo Window Value of the measurement window Section 5 9 11 State of the measurement ready flag Ready Section 5 9 12 Result Result of the measurement Section 5 9 14 To simplify the channel test the PWM output can be applied to measure the number of pulses within the measurement window The output of the PWMO channel and the inputs signal of the frequency meter channel 0 are located at the same pin It is pin number 5 of the CN1 connector see Table 1 Please set the digital I O parameters as given in Fig 6 6 Note that the direction and mode of DIO2 are set to the output and PWMO respectively RT DAC USB2 Digital 1 0 Manufacturer Product Serial no Vendor ID Product ID InTeCo RT DAC USB2 000001 0x0404 0x8613 xl Name RTDAC2 Synthesis date 2010 09 16 Logic version 0103 Mode Direction Mode Direction Output Input 0 0
86. terfaces to the read and send S function blocks The S function blocks shown in Fig 5 3 and Fig 5 4 contain a lot of inputs and outputs The most frequently used features of the board are as follows general purpose digital I Os encoders PWM outputs D A and A D converters simplified version of the read and send S functions can be also applied see Fig 5 6 Tidacusb2 simple read 0403 Pdacusb2 simple send 0103 p USB2 Read Simple USB2 Send Simple Fig 5 6 Simplified read and send S function blocks RT DAC USB2 User s Manual page 17 W InTeCo 5 2 USB functions There is a common sequence of operations required to communicate with the RT DAC USB2 board e the first one has to open the communication channel The RT DAC USB2 devices are distinguished by its serial number Usually the device serial number is the argument of the open functions The device serial number is not necessary only when a single RT DAC USB2 device is connected to the computer e contents of the data buffer is read It gives access to the current context of the device Reading of the buffer allows to get measurements and set ups e if ones requires to change the state of the RT DAC USB2 then the appropriate elements of the buffer are set Each element of the buffer corresponds to a certain function of the board usually only a few of them are changed Writing to the buffer sets a new state of
87. the command RTDACUSB2 0103 brd new RTDACUSB2 0103 The command creates brd object of RTDACUSB2 0103 type int NumOfDevices DESCRIPTION The method of the RTDACUSB2 0103 class Returns the number of RT DAC USB2 devices connected to the computer The method can be called before opening a communication channel with any RT DAC USB2 unit ARGUMENTS None RETURNED VALUE A number of the RT DAC USB2 devices connected to the computer is returned int OpenBySerialNumber int SerialNumber DESCRIPTION The method of the RTDACUSB2 0103 class Opens the communication with the RT DAC USB2 with the serial number given by the input argument ARGUMENTS Serial number of the RT DAC USB2 device given as the integer number Each RT DAC USB2 board contains his own unique positive integer serial number The serial number are applied to distinguish the boards if multiple boards are used simultaneously The SerialNumber argument can be negative in the case when only a single board is connected to the computer In such a case the methods opens the communication regardless the real serial number of the connected RT DAC USBZ2 unit RETURNED VALUE If successful the method returns zero A negative value indicates an error The following error codes are available 2 can not find any RT DAC USB2 unit connected to the computer 12 can not find an RT DAC USB2 with the given serial number RT DAC USB2 User s Manual page 21 Ww InT
88. the device e closing the USB communication finishes the current session Each function returns an integer value If the value is negative it means that the function failed Zero or positive returned value indicates a successful function execution 5 2 1 C interface The C interface contains the following functions int USB2NumOfDevices void DESCRIPTION The function returns the number of the RT DAC USB2 devices connected to the computer ARGUMENTS None RETURNED VALUE If successful the function returns the number of the RT DAC USB2 device connected to the computer It returns zero if none RT DAC USB2 can be found In the case of an error it returns a negative error code int USB2Open void DESCRIPTION The function opens the RT DAC USB2 device connected to the computer The function opens the first device from the list of devices connected to the computer As it can not distinguish RT DAC USB2 devices it should be called if only a single RT DAC USB2 is applied ARGUMENTS None RETURNED VALUE If successful the function returns the handler to the opened RT DAC USB2 device The handler is a non negative integer value The handler is the first argument of the RT DAC USB2 communication functions In the case of an error it returns a negative error code RT DAC USB2 User s Manual page 18 v InTeCo int USB2OpenBySerialNo int SerialNo DESCRIPTION The function opens the RT DAC USB2 device connected to the co
89. tput generation CommandSend 0103 BoardIdx amp RTDACUSBBuffer USB2Close BoardIdx RT DAC USB2 User s Manual page 37 Ww InTeCo CH language RTDACUSBZ 0103 brd new RTDACUSB2 0103 if brd Open 0 1 MessageBox Show Can not open the device example MessageBoxButtons OK MessageBoxIcon Exclamation return if brd ReadUSBFrame 0 1 MessageBox Show Can not read data frame example MessageBoxButtons OK MessageBoxIcon Exclamation return Switch pin mode to allow PWM outputs for PWMO and PWM1 brd DigitalIO CN1PinMode 0x0000024 Set respective pins to be outputs brd DigitalIO CN1Direction brd PWM 0 Mode PWMClass PWMMode PWM8BitMode brd PWM 1 Mode PWMClass PWMMode PWM12BitMode The prescaler value of 522 defines the 300Hz frequency The width equal to 64 means 25 duty cycle 64 is 25 of 256 brd PWM 0 Prescaler 522 brd PWM 0 Width 64 The prescaler value of 60 defines the 10Hz frequency The width equal to 3072 means 75 duty cycle 3072 is 75 of 4096 brd PWM 1 Prescaler 60 brd PWM 1 Width 3072 Start PWM output generation if brd SendUSBFrame 0 1 MessageBox Show Can not send data frame example MessageBoxButtons OK MessageBoxIcon Exclamation return RT DAC USB2 User s Manual page 38 wv InTeCo 5 8 Encoder RT DAC USB2 includes eight 32 bit incremental quadra
90. ture encoder channels Each channel counts the changes of two input waves and optionally applies the input index signal to reset the encoder counter The relation between the changes of the A and B waves and the changes of the counter value are illustrated in Fig 5 10 Wave M Wave B rn Egg imi im vv vv vv Y Counter Change 41 41 41 1 1 1 1 1 1 1 1 1 1 1 Fig 5 10 Operation of the quadrature encoder counter The initial value of each encoder counter can be set to zero in a programmable way or using the active index signal Encoders can work in two modes with or without index signal The software activates and deactivates the index signals and sets the active levels of the index signals as well The structure of the encoder blocks is given in Fig 5 11 Pulse Enc_A m Encoder Interface Direction Counter pa Enc_B __ mni C Reset Enc gt ldxActive O ldxinvert I O signal Parameter Fig 5 11 Structure of the quadrature encoder blocks Each encoder channel contains three inputs wave A wave B and index I The respective signals are marked as A ENCO B and ENCO I for the first encoder NC1_A and ENCI I for the second encoder NC2 A ENC2 B and ENC2 I for the third encoder NC3 A ENC3 B and ENC3 I for the fourth encoder NC4_A ENCA B and ENCA I for the fifth encoder
91. unsigned int BlockState Pending NET interface BlockStatusState BlockStatus Simulink interface ChronoStatePending output of the read S function DESCRIPTION The flag that indicates that the block remains in the Counting state The field is read only In the C and Simulink interfaces the 1 value indicates the Counting state of the block The 0 value indicates other states In the NET interfaces the BlockStatus property value equal to Counting indicates the Counting state of the block 5 10 11 Ready C interface unsigned int BlockState Ready NET interface BlockStatusState BlockStatus Simulink interface ChronoStateReady output of the read S function DESCRIPTION The flag that indicates that the block remains in the Counting Terminated state The field is read only In the C and Simulink interfaces the 1 value indicates the Counting Terminated state of the block The 0 value indicates other states In the NET interfaces the BlockStatus property value equal to Cnt Terminated indicates the Counting Terminated state of the block 5 10 12 ClkDivider C interface unsigned int ClkDivider NET interface uint Divider Simulink interface ChronoClkDivider output of the read S function SetChronoClkDivider input of the send S function DESCRIPTION In the basic mode the block counts the pulses of the reference signal which period is equal to 25ns To allow measurements of longer time periods the reference frequency can b
92. vice serial number char USB2LastErrorMsg void DESCRIPTION The function returns the pointer to a string that describes the status of the last operation ARGUMENTS None RETURNED VALUE Returns the pointer to a string The error codes and the strings pointed by the pointer and returned by the function are given in the following table Table 3 Error codes and respective strings Error code value Description 0 RTDAC 1 RTDAC TOO MANY USB DEVICES 2 RTDAC_CAN_NOT_FIND_USB_DEVICE 3 RTDAC_TOO_HIGH_BOARD_INDEX 4 RTDAC_CAN_NOT_ACCESS_ENDPOINTS 5 RTDAC_CAN_NOT_ACCESS_NULL_ENDPOINT 6 RTDAC_ENDPOINTS_NOT_CLOSED 7 RTDAC_INVALIED_DEVICE_POINTER 8 RTDAC_INVALIED_SYNCHRONOUS_OUT_TRANSFER 9 RTDAC_INVALIED_SYNCHRONOUS_IN_TRANSFER 10 RTDAC_INVALIED_SYNCHR_JTAG_OUT_TRANSFER 11 RTDAC_INVALIED_SYNCHR_JTAG_IN_TRANSFER 12 RTDAC_CAN_NOT_FIND_SERIAL_NUMBER RT DAC USB2 User s Manual page 20 Ww InTeCo 5 2 2 NET interface The NET interface consists of the definition of the RTDACUSB2 0103 class The class contains a simple constructor and a few methods RTDACUSB2 0103 class DESCRIPTION The class RTDACUSB2 0103 creates the main interface to the RT DAC USB2 board equipped with FPGA configuration number 103 It contains a simple constructor and a few methods CONSTRUCTOR The constructior does not require any input arguments and is activated by
93. y RT DAC USB2 device n return Boardldx USB2Open if BoardIdx lt 0 printf Can not open the RT DAC USB2 device n return if CommandRead 0103 Boardldx amp RTDACUSBBuffer lt 0 printf Can not read the RT DAC USB2 device n return RTDACUSBBuffer TmrCnt 0 Mode 1 First channel as timer RTDACUSBBuffer TmrCnt 1 Mode 0 Second channel as counter Reset both channels RTDACUSBBuffer TmrCnt 0 Reset RIDACUSBBuffer TmrCnt 1 Reset 1 CommandSend 0103 BoardIdx amp RTDACUSBBuffer Start counting RTDACUSBBuffer TmrCnt 0 Reset RTDACUSBBuffer TmrCnt 1 Reset 0 CommandSend 0103 BoardIdx amp RTDACUSBBuffer wait CommandRead 0103 BoardIdx amp RTDACUSBBuffer printf Timer d Counter RTDACUSBBuffer TmrCnt 0 Counter RTDACUSBBuffer TmrCnt 1 Counter USB2Close BoardIdx RT DAC USB2 User s Manual page 33 W InTeCo CH language RTDACUSB2 0103 brd if brd Open 0 new RTDACUSB2_0103 MessageBox Show Can not open the devic Tmr Cnt MessageBoxButtons OK MessageBoxIcon return if brd ReadUSBFrame lt 0 MessageBox Show Can not read data frame Tmr Cnt example Exclamation example MessageBoxButtons OK MessageBoxIcon Exclamation return Set modes brd TmrCnt 0 Mode TmrCntClass ModeState TimerMode brd TmrCnt 1 Mode T

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