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CME-965 User Manual - Diamond Systems Corporation

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1. 20 4 1 7 Power and System Management ssssssssesesseseeese enne entente nnns sn erns entente sinn sistens 20 4 1 8 LVDS Flat Pane 21 41 9 EPO mE 21 41 10 A alog VGA GRD earned 22 QV DTE 22 4142 Miscellaneous Signals 29 4 2 COM Express C D 24 4 2 1 IDE PATA ccc 26 42 2 POI ined Ene IIa Rp aL eaaa iaiia eed ARR La Fue acp haad a Ave Ea 27 4 2 3 PCI Express x16 Graphics PEG bus nennen nnne en nennen snnt internen 28 5 APPENDIX SYSTEM RESOURCES REFERENCE sese intente nnn snnt en renis 28 5 1 BIOS Memory Mapping ccceeceeececeeeeeceeeeeeeeceeeeeceaeeeeaaeeeeaee ceases cage eecaaeseeeeeseaeeeseaesseaeeseeeeescaeeesaeeeeneeee 28 52 VO Port Address sanetaduadedages Ge oda aiandid 29 5 8 Interrupt Request IRQ Lines 20 2 2 eeeccecececeeeeeeeeeeeeeeeeeee ceca aes eaee ee eeeeeeaeeeaae sense saeeesaaeseeaeeeeeeesaeeeeeaeseeneeee 30 BA BIOS Beep Codes
2. 31 5 4 1 Boot Block Beep Codes csie indosiar a eene estne en tentes aA AEAEE aeaee 31 5 4 2 Post BIOS Beep Codes sssssssssssssesssesesnene enne nns trtr en nen renis si trts entente nnns nnns intr nnns 32 5 43 Troubleshooting Post BIOS Beep Codes sse nennen nennen 32 5 4 4 Boot Block Initialization Code Checkpoint sssssssssseseeeeeneneen nennen nennen 33 5 4 5 Boot Block Recovery Code Checkpoint sse ener nnne ens 34 5 4 6 POST Code Checkpoint essessssssssssseseseeeeee ener innen enr inttr entente nnns nnns nennen ns 35 5 4 7 DIM Code Checkpoint ssssssssssssseseseen enne nnne nhnr en nennen inttr sn rens inns nn sn trenes 38 5 4 8 ACPI Runtime Checkpoint sssssssssssseseseeeene enne nnneen nennen inttr sn renr ernst nnne nennen ns 39 CME 965 User Manual 1 2 www diamondsystems com Page 2 DIAMOND SYSTEMS IMPORTANT SAFE HANDLING INFORMATION WARNING ESD Sensitive Electronic Equipment Observe ESD safe handling procedures when working with this product Always use this product in a properly grounded work area and wear appropriate ESD preventive clothing and or accessories Always store this product in ESD protective packaging when not in use Safe Handling Precautions The CME 965 contains numerous I O connectors that connect to sensitive electronic components Thi
3. 1 Memory refresh timer error 2 Parity error in base memory first 64KB block 3 Base memory read write test error 4 Motherboard timer not operational 5 Processor error 6 8042 Gate A20 test error cannot switch to protected mode 7 General exception error processor exception interrupt error 8 Display memory error system video adapter 9 AMIBIOS ROM checksum error 10 CMOS shutdown register read write error 5 43 Troubleshooting Post BIOS Beep Codes Number of Beeps Description 1 20r3 Reseat the memory or replace with known good modules 4 7 9 11 Fatal error indicating a serious problem with the system 8 System video adapter failure CME 965 User Manual 1 2 www diamondsystems com Page 32 DIAMOND SYSTEMS 5 44 Boot Block Initialization Code Checkpoints Checkpoint Description Before DO If boot block debugger is enabled CPU cache as RAM functionality is enabled at this point Stack will be enabled from this point DO Early Boot Strap Processor BSP initialization like microcode update frequency and other CPU critical initialization Early chipset initialization is done D1 Early super I O initialization is done including RTC and keyboard controller Serial port is enabled at this point if needed for debugging NMI is disabled Perform keyboard controller BAT test Save power on CPUID value in scratch CMOS Go to flat mode with 4GB li
4. AC 97 link audio 8 bit GPIO Gigabit Ethernet o c U o ovomoz u xm Figure 1 Functional Block Diagram CME 965 User Manual 1 2 www diamondsystems com Page 6 DIAMOND SYSTEMS 2 2 Board Dimensions Mounting Holes and Connectors The two diagrams below show the mechanical dimensions of the CME 965 s board outline and five mounting holes as well as the position of all connectors on both the top and bottom sides of the board 43 28 CPU 95 00 41 00 Unit mm Figure 2 Board Layout Top CME 965 User Manual 1 2 www diamondsystems com Page 7 piamono SYSTEMS D110 7HUHHHU 0 uti 7m D 1 C110 C 1 B110 C 31 B1 9 S A 1 Figure 3 Board Layout Bottom CME 965 User Manual 1 2 www diamondsystems com Page 8 DIAMOND SYSTEMS 2 3 Bus and Interface Connector Summary The CME 965 has two 2x110 pin interface connectors as listed in the tables below which are defined in accordance with the PICMG COM Express Specification Signal functions relati
5. GND IDE D7 IDE D6 IDE D3 IDE D15 IDE D8 IDE D9 IDE D2 IDE D13 IDE D1 GND IDE D14 IDE IORDY IDE IOR PCI PME PCI GNT24 PCI REQ 2 PCI GNT1 amp PCI REQ14 PCI GNTO GND PCI REQO PCI RESET PCI ADO PCI AD2 PCI AD4 PCI AD6 PCI AD8 PCI AD10 PCI AD12 GND PCI AD14 PCI C BE14 PCI PERR PCI LOCK amp PCI FRAME PCI AD16 PCI AD18 PCI AD20 PCI AD22 GND PCI AD24 PCI AD26 PCI AD28 PCI AD30 PCI IRQC PCI IRQD PCI CLKRUN PCI M66EN PCI CLK GND PEG TX0 PEG PEG LANE RV PEG_TX1 PEG TX1 TYPE2 PEG_TX2 PEG_TX2 GND PEG_TX3 PEG_TX3 RESERVED RESERVED PEG_TX4 PEG_TX4 GND PEG_TX5 PEG_TX5 GND www diamondsystems com D36 C36 D37 C37 D38 C38 D39 C39 D40 C40 D41 C41 D42 C42 D43 C43 D44 C44 D45 C45 D46 C46 D47 C47 D48 C48 D49 C49 D50 C50 D51 C51 D52 C52 D53 C53 D54 054 D55 C55 D56 C56 D57 C57 D58 C58 D59 C59 D60 C60 D61 C61 D62 C62 D63 C63 D64 C64 D65 C65 D66 C66 D67 C67 D68 C68 D69 C69 D70 GO PCI DEVSEL PCI PCI 24 PCI AD17 PCI AD19 GND PCI AD21 PCI AD23 PCI_C BE3 PCI AD25 PCI AD27 PCI AD29 PCI AD31 PCI IRQA PCI_IRQB GND FIXED PEG_RX0 PEG RXO TYPEO PEG_RX1 PEG_RX1 TYPE1 PEG_RX2 PEG RX2 GND PEG 8
6. These pins carry video and timing data for graphical display on a TV device as indicated Signal Name Signal Function Direction VGA RED Red for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load Green for monitor Analog DAC output designed to drivea 37 5 Ohm equivalent load VGA BLU Blue for monitor Analog DAC output designed to drive a 37 5 Ohm equivalent load HSYNC Horizontal sync output to VGA monitor VSYNC Vertical sync output to VGA monitor 126 DDC clock line 12C port dedicated to identify VGA monitor O capabilities VGA I2C DAT DDC data line 4 1 11 TV Out These pins carry the composite video output signals Signal Name TV DAC A Signal Function Direction TVDAC Channel A Output supports the following Composite video CVBS Component video Chrominance Pb analog signal S Video not used TV DAC B TVDAC Channel B Output supports the following Composite video not used Component video Luminance Y analog signal S Video Luminance analog signal TV DAC C TVDAC Channel C Output supports the following Composite video not used Component Chrominance Pr analog signal S Video Chrominance analog signal CME 965 User Manual 1 2 www diamondsystems com Page 22 DIAMOND SYSTEMS 4 1 12 Miscellaneous Signals These pins carry a number of utility signals Signal Name Signal Function Di
7. LVDS_BO LVDS BO LVDS B1 LVDS B1 LVDS_B2 LVDS_B2 LVDS_B3 LVDS B3 LVDS_BKLT_EN GND LVDS B CK LVDS B CK LVDS CTRL SBY 5 SBY SBY RESERVED VGA RED GND B71 A71 B72 A72 B73 A73 B74 A74 B75 A75 B76 A76 B77 A77 B78 A78 B79 A79 B80 A80 B81 A81 B82 A82 B83 A83 B84 A84 B85 A85 B86 A86 B87 A87 B88 A88 B89 A89 B90 A90 CME 965 User Manual 1 2 LVDS_A0 LVDS_A0 LVDS_A1 LVDS_A1 LVDS_A2 LVDS_A2 LVDS_VDD_EN LVDS_A3 LVDS_A3 GND LVDS A CK LVDS A CK LVDS 120 CK LVDS 120 DAT GPI3 KBD_RST KBD_A20GATE PCIE_CLK_REF PCIE_CLK_REF GND VGA_GRN VGA_BLU VGA HSYNC VGA VSYNC I2C CK 1260 DAT TV DAC A TV DAC B TV DAC C GND 12V 12V 12V VCC 12V VCC 12V 12V 12V 12V 12V GND www diamondsystems com DIAMOND SYSTEMS B91 A91 RESERVED B92 A92 RESERVED B93 A93 GPOO B94 A94 RESERVED B95 A95 RESERVED B96 A96 GND B97 A97 12V B98 A98 12V B99 A99 12V B100 A100 GND B101 A101 VCC 12V B102 A102 VCC 12V B103 A103 VCC 12V B104 A104 VCC 12V B105 A105 VCC 12V B106 A106 VCC 12V B107 A107 VCC 12V B108
8. A108 VCC 12V B109 A109 VCC 12V B110 A110 GND Page 17 4 1 4 USB signals DIAMOND SYSTEMS These pins provide connections to the board s eight USB channels For further information regarding the functions of the USB signals listed above refer to the USB 2 0 Specification available from the USB Implementers Forum http www usb org Signal Name Signal Function Direction USB 0 7 USB differential pairs data channels 0 through 7 O USB 0 7 USB_0_1_OC USB over current sense USB channels 0 and 1 USB 2 3 OC USB over current sense USB channels 2 and 3 USB 4 5 OC USB over current sense USB channels 4 and 5 USB 6 7 OCft USB over current sense USB channels 6 and 7 4 1 2 Gigabit Ethernet LAN These pins provide connections to the GigE LAN interface Signal Name Signal Function Direction GBEO_MDI 0 3 Gigabit Ethernet Controller 0 Media Dependent Interface GBEO MDI 0 3 Differential Pairs 0 1 2 3 GBEO_ACT Gigabit Ethernet Controller 0 activity indicator GBEO LINK Gigabit Ethernet Controller 0 link indicator GBEO_LINK100 Gigabit Ethernet Controller 0 100Mbsp link indicator GBEO_LINK1000 Gigabit Ethernet Controller 0 1000Mbps link indicator GBEO CTREF Reference voltage for carrier board Ethernet channel 0 REF magnetics center tap 4 1 9 AC 97 Audio High Definition Audio These pins provide connections to the high definition audio i
9. DIAMOND SYSTEMS CORPORATION CME 965 COM Express Computer On Module Based on Intel Core 2 Duo LV CPU Revision Date Comment 1 0 03 30 10 Initial release 1 1 05 24 10 Update to block diagram 1 2 11 29 10 Minor updates FOR TECHNICAL SUPPORT PLEASE CONTACT support diamondsystems com Copyright 2010 Diamond Systems Corporation 1255 Terra Bella Ave Mountain View CA 94043 USA Tel 1 650 810 2500 Fax 1 650 810 2525 www diamondsystems com DIAMOND SYSTEMS CONTENTS IMPORTANT SAFE HANDLING INFORMATION sese nnnr innert inns nnns sn tene innen nri i nrnr enne 3 DAE mi 4 Ti ACCU rS 4 2 M ee ieuzs ids VWB n 6 2 1 Block DIagram iuter epe Dre ERI TI PED pM 6 2 2 Board Dimensions Mounting Holes and Connectors sssssssssesssees eene 7 2 3 Bus and Interface Connector Summary ssssssssssssssseseeeen neret nennen entree erred tnr innen nnns 9 2 4 COM Express Bus Connectors sssssssssssssssssssses entente nnnm sn nrnr iiaiai anaiai anaia naiai sinn snnt nent 9 3 GETTING START ED srs 10 3 4 COM Express Development Kits cccccccseeeceeneeceeeeeeaeeeeaee scenes eene nnneen nennen snnt sn nene tnr n nsn tnn innen 11 3 2 Preparing the Hardware senses i
10. 4 DIAMOND SYSTEMS This set of pins drives a PCI Express x16 link which may be used with an external high performance PCI Express Graphics subsystem or other function that interfaces via a PCI Express x16 link Signal Name Signal Function Direction PEG RX 0 15 PCI Express Graphics receive differential pairs PEG RX 0 15 PEG_TX 0 15 PCI Express Graphics transmit differential pairs O PEG_TX 0 15 PCIE_CLK_REF Reference clock output for all PCI Express and PCI O PCIE CLK REF Express Graphics lanes PEG LANE RV PCI Express Graphics lane reversal input strap Pull lowon the carrier board to reverse lane order PEG ENABLE PEG Enable function Strap to enable PCI Express x16 external graphics interface Pull low to disable internal graphics and enable the x16 interface SDVO 126 CLK 20 based control signal clock for SDVO device 126 DATA 20 based control signal data for SDVO device O 5 APPENDIX SYSTEM RESOURCES REFERENCE 5 1 BIOS Memory Mapping Address Device Description 00000h 9FFFFh DOS Kernel Area A0000h BFFFFh EGA and VGA Video Buffer 128KB C0000h CFFFFh EGA VGA ROM D0000h DFFFFh Adaptor ROM E0000h FFFFFh System BIOS CME 965 User Manual 1 2 www diamondsystems com Page 28 DIAMOND SYSTEMS 5 2 I O Port Address Map Each peripheral device in the system is assigned a set of I O port addresses which also becomes the identity of the device The fol
11. IDE devices e Keyboard mouse USB keyboard mouse devices supported e Other o PC speaker interface o Watchdog timer with 1 255 levels reset o 8 0 programmable digital I O port o SMBus serial buses e Three system expansion buses o PCI Express 1 x16 link and 4 x1 links o 432 bit PCI bus masters o LPC bus e Power o 412VDC main power 5VDC standby power o Power requirement 12W idle 24W loaded e Operating environment o Operating temperature 40 C to 85 C o Operating humidity 0 to 90 non condensing CME 965 User Manual 1 2 www diamondsystems com Page 4 DIAMOND SYSTEMS e Dimensions o COM Express Basic form factor with Type 2 bus o 49x3 inches 125 x 95 mm e Weight 2 8 oz 79 g e Software o BIOS AMI PnP flash BIOS o Operating systems supported Windows XP and Linux 2 6 contact Diamond for others Note The COM Express specification is available from the PICMG organization http www picmg org The COM Express Tutorial and COM Express Design Guide are available for download from the PICMG organization COM Express website located at http www picmg org v2internal COMExpress htm CME 965 User Manual 1 2 www diamondsystems com Page 5 piamono SYSTEMS 2 FUNCTIONAL OVERVIEW 2 1 Block Diagram Figure 1 shows the CME 965 functional blocks bus and peripheral interface signals Intel Core 2 Duo LV CPU 800MHz FSB Dual SO DIMM SDRAM zoo
12. PEG RX3 RESERVED RESERVED PEG RX44 PEG RX4 RESERVED PEG RX54 PEG RX5 GND Page 24 PEG TX6 PEG TX6 SDVO 120 CLK PEG TX7 PEG TX7 GND IDE CBLID PEG TX8 PEG TX8 GND PEG TX9 PEG TX9 RESERVED GND PEG TX10 PEG TX10 GND PEG TX11 PEG TX11 GND D71 C71 D72 C72 D73 C73 D74 C74 D75 C75 D76 C76 D77 C77 D78 C78 D79 C79 D80 C80 D81 081 D82 082 D83 C83 D84 C84 D85 C85 D86 C86 D87 C87 D88 C88 D89 C89 D90 C90 CME 965 User Manual 1 2 PEG RX6 PEG RX6 SDVO 120 DATA PEG RX7 PEG RX7 GND RESERVED PEG RX8 PEG RX8 GND PEG RX9 PEG RX9 RESERVED GND PEG RX10 PEG RX10 GND PEG_RX11 PEG_RX11 GND PEG_TX12 PEG_TX12 GND PEG_TX13 PEG_TX13 GND PEG_ENABLE PEG_TX14 PEG_TX14 GND PEG_TX15 PEG_TX15 GND VCC_12V VCC_12V VCC 12V VCC 12V VCC 12V VCC 12V GND www diamondsystems com D91 C91 D92 C92 D93 C93 D94 C94 D95 C95 D96 C96 D97 C97 D98 C98 D99 C99 D100 C100 D101 C101 D102 C102 D103 C103 D104 C104 D105 C105 D106 C106 D107 C107 D108 C108 D109 C109 D110 C110 SYSTEMS PEG
13. Parallel ports serial ports and Coprocessor in CPU etc successfully installed in the system and update the BDA EBDA etc 52 Updates CMOS memory size from memory found in memory test Allocates memory for Extended BIOS Data Area from base memory Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if needed 60 Initializes NUM LOCK status and programs the KBD typematic rate 75 Initialize Int 13 and prepare for IPL detection 78 Initializes IPL devices controlled by BIOS and option ROMs 7C Generate and write contents of ESCD in NVRAM 84 Log errors encountered during POST 85 Display errors to the user and gets the user response for error 87 Execute BIOS setup if needed requested Check boot password if installed 8C Late POST initialization of chipset registers 8D Build ACPI tables if ACPI is supported 8E Program the peripheral parameters Enable Disable NMI as selected 90 Initialization of system management interrupt by invoking all handlers A1 Line up work needed before booting to OS CME 965 User Manual 1 2 www diamondsystems com Page 36 DIAMOND SYSTEMS A2 Takes care of runtime image preparation for different BIOS modules Fill the free area in segment with OFFh Initializes the Microsoft IRQ Routing Table Prepares the runtime language module Disables the system configuration display if needed A4 Initialize runtime langu
14. RX124 PEG RX12 GND PEG RX134 PEG RX13 GND RESERVED PEG RX144 PEG RX14 GND PEG RX154 PEG RX15 GND 12V 12V 12V 12V 12V 12V GND Page 25 DIAMOND SYSTEMS 42 1 IDE PATA Bus This set of pins implements the module s IDE bus which provide a single channel IDE interface supporting two standard IDE hard drives Signal Name Signal Function Direction IDE D 0 15 Bidirectional data to from IDE device IDE A 0 2 Address lines to IDE device O IDE IOW I O write line to IDE device Data latched on trailing rising edge IDE I O read line to IDE device O IDE_REQ IDE Device DMA Request It is asserted by the IDE device to request a data transfer IDE ACK IDE Device DMA Acknowledge O IDE 0514 IDE Device Chip Select for 1FOh to 1FFh range O IDE_CS3 IDE Device Chip Select for 3FOh to 3FFh range IDE IORDY IDE device I O ready input IDE RESET Reset output to IDE device IDE IRQ Interrupt request from IDE device IDE CBLID 2 Input from off module hardware indicating the type of IDE cable being used High indicates a 40 pin cable used for legacy IDE modes Low indicates that an 80 pin cable with interleaved grounds is used Such a cable is required for Ultra DMA 66 100 and 133 modes CME 965 User Manual 1 2 www diamondsystems com Page 26 4 2 PCI Bus Interface DIAMOND SYSTEMS This set of pins im
15. mouse monitor and mass storage devices to the appropriate connectors on the baseboard Refer to the baseboard s User Manual for peripheral compatibility and interface cabling considerations CME 965 User Manual 1 2 www diamondsystems com Page 11 DIAMOND SYSTEMS 3 3 Booting the System Power up the display and then power up the system power supply The CME 965 module should begin its boot up sequence immediately as evidenced by BIOS messages on the connected display You can use the BIOS Setup utility and install an operating system on the boot drive just as you would on a normal desktop PC 3 4 BIOS Setup Utility The BIOS Setup utility program is used for specifying the system configurations and settings The BIOS ROM of the system stores the Setup utility When you turn on the computer the BIOS is immediately activated The following menus options are available Main Setup Menu Advanced Setup Menu PCI PnP Setup Menu Boot Setup Menu Security Setup Menu Chipset Setup Menu Exit Use the left right arrow keys to highlight a particular configuration screen from the top menu bar or use the down arrow key to access and configure the information in the menus which are described below 3 44 Main Setup Menu This menu allows you to select configuration options for the following e System Time System Date 3 42 Advanced Setup Menu This menu allows you to select configuration options for the following e CPU Configur
16. the recovery file F3 Start reading the recovery file cluster by cluster F5 Disable L1 cache FA Check the validity of the recovery file configuration to the current configuration of the flash part FB Make flash write enabled through chipset and OEM specific method Detect proper flash part Verify that the found flash part size equals the recovery file size F4 The recovery file size does not equal the found flash part size FC Erase the flash part FD Program the flash part FF The flash has been updated successfully Make flash write disabled Disable ATAPI hardware Restore CPUID value back into register Give control to F000 ROM at F000 FFFOh CME 965 User Manual 1 2 www diamondsystems com Page 34 DIAMOND SYSTEMS 5 4 6 POST Code Checkpoints The POST code checkpoints are the largest set of checkpoints during the BIOS pre boot process The following table describes the type of checkpoints that may occur during the POST portion of the BIOS Checkpoint Description 03 Disable NMI Parity video for EGA and DMA controllers Initialize BIOS POST Runtime data area Also initialize BIOS modules on POST entry and GPNV area Initialized CMOS as mentioned in the Kernel Variable wCMOSFlags 04 Check CMOS diagnostic byte to determine if battery power is OK and CMOS checksum is OK Verify CMOS checksum manually by reading storage area If the CMOS checksum is bad update CMOS with power on default values and clear pa
17. 2 6 if required are included on the Software and Documentation CD that is provided along with the CME 965 or in its Development Kit To locate the CME 965 module s software drivers on the CD view the index html file in the CD s root directory locate Computer on Modules and then click on CME 965 This software is also available for download from Diamond s website 3 6 BIOS Beep Sounds List Post BIOS Beep Codes Number of Beeps Description 1 Memory refresh timer error 2 Parity error in base memory first 64KB block 3 Base memory read write test error 4 Motherboard timer not operational 5 Processor error 6 8042 Gate A20 test error cannot switch to protected mode 7 General exception error processor exception interrupt error 8 Display memory error system video adapter 9 AMIBIOS ROM checksum error 10 CMOS shutdown register read write error More BIOS information is included in the Appendix CME 965 User Manual 1 2 www diamondsystems com Page 14 DIAMOND SYSTEMS 4 INTERFACE CONNECTOR DETAILS This section describes the functions available on the COM Express A B and C D interface connectors Note The COM Express specification is available from the PICMG organization http www picmg org The COM Express Tutorial and COM Express Design Guide are available for download from the PICMG organization COM Express website located at http www picmg org v2internal COMExpress ht
18. 48 A48 EXCDO PERST SMB DAT B14 A14 GBEO CTREF SYS_RESET B49 A49 CPPE SMB ALERT B15 A15 SUS 584 CB RESET4 B50 A50 LPC_SERIRQ SATA1_TX B16 A16 SATAO TX GND B51 A51 GND SATA1 TX B17 A17 SATAO TX PCIE RX5 B52 A52 PCIE_TX5 SUS_STAT B18 A18 SUS 544 PCIE RX5 B53 A53 PCIE TX5 RX B19 A19 SATAO_RX GPO1 B54 A54 GPIO SATA1 RX B20 A20 RX PCIE RX4 B55 A55 PCIE TX4 GND B21 A21 GND PCIE RX4 B56 A56 PCIE TX4 NC B22 A22 SATA2_TX GPO2 B57 A57 GND NC B23 A28 SATA2_TX PCIE RX3 B58 A58 PCIE_TX3 PWR OK B24 A24 SUS 554 PCIE RX3 B59 A59 PCIE TX3 NC B25 A25 SATA2_RX GND B60 A60 GND NC B26 A26 SATA2_RX PCIE RX2 B61 A61 PCIE TX2 WDT B27 A27 BATLOW PCIE RX2 B62 A62 PCIE TX2 SDIN2 B28 A28 SATA ACT amp GPO3 B63 A63 SDIN1 B29 A29 SYNC PCIE RX1 B64 A64 PCIE_TX1 AC SDINO B30 A30 AC_RST PCIE RX1 B65 A65 PCIE TX1 GND B31 A31 GND WAKEO B66 A66 GND SPKR B32 A32 AC BITCLK WAKE1 B67 A67 GPI2 2 CK B33 A33 AC_SDOUT PCIE 0 B68 A68 PCIE_TX0 I2C DAT B34 A34 BIOS DISABLE PCIE B69 A69 PCIE TXO THRM B35 A35 THRMTRIP GND B70 A70 GND CME 965 User Manual 1 2 www diamondsystems com Page 16
19. PnP PCI or AGP video devices Initialize different buses and perform the following functions Boot Input Device Initialization function 3 IPL Device Initialization function 4 General Device Initialization function 5 Function 3 searches for and configures PCI input devices and detects if system has standard keyboard controller Function 4 searches for and configures all PnP and PCI boot devices Function 5 configures all onboard peripherals that are set to an automatic configuration and configures all remaining PnP and PCI devices While control is in the different functions additional checkpoints are output to port 80h as a word value to identify the routines under execution The low byte value indicates the main POST Code Checkpoint The high byte is divided into two nibbles and contains two fields The details of the high byte of these checkpoints are as follows HIGH BYTE XY The upper nibble indicates the function number that is being executed X can be from 0 to 7 0 func 0 disable all devices on the BUS concerned 2 func 2 output device initialization on the BUS concerned 3 funcz3 input device initialization on the BUS concerned 4 func 4 IPL device initialization on the BUS concerned 5 func 5 general device initialization on the BUS concerned 6 func 6 error reporting for the BUS concerned 7 func 7 add on ROM initialization for all buses CME 965 User Manual 1 2 www diamondsyst
20. age module Display boot option popup menu A7 Displays the system configuration screen if enabled Initialize the CPU s before boot which includes the programming of the MTRR s A9 Wait for user input at config display if needed AA Uninstall POST INT1Ch vector and INTO9h vector AB Prepare BBS for Int 19 boot Init MP tables AC End of POST initialization of chipset registers De initializes the ADM module B1 Save system context for ACPI Prepare CPU for OS boot including final MTRR values 00 Passes control to OS Loader typically INT19h CME 965 User Manual 1 2 www diamondsystems com Page 37 DIAMOND SYSTEMS 5 4 7 DIM Code Checkpoints The Device Initialization Manager DIM gets control at various times during BIOS POST to initialize different system buses The following table describes the main checkpoints where the DIM module is accessed Checkpoint Description 2A Initialize different buses and perform the following functions Reset Detect and Disable function 0 Static Device Initialization function Boot Output Device Initialization function 2 Function 0 disables all device nodes PCI devices and PnP ISA cards It also assigns PCI bus numbers Function 1 initializes all static devices that include manual configured onboard peripherals memory and I O decode windows in PCI PCI bridges and noncompliant PCI devices Static resources are also reserved Function 2 searches for and initializes any
21. ation Settings for Hardware Prefetcher Adjacent Cache Line Prefetch Cache L1 amp L2 Max CPUID Value Limit Vanderpool Technology Core Multi Processing and Intel SpeedStep Technology IDE Configuration Settings for hard drives Primary Secondary Third IDE Master Slave Floppy Configuration Settings for the type of floppy drive installed on the system e Super lO Configuration Settings for Onboard Floppy Controller Serial Porti Port2 Address Serial Port2 Mode Parallel Port Address Parallel Port Mode Parallel Port IRQ Restore on AC Power Loss by e Hardware Health Configuration Settings for System CPU Temperature 1 CPU System Fan Speed Vcore CPU voltage 5 0V 3 3V 412 0V 5Vsb VBAT standby and battery voltage e ACPI Configuration Settings for Suspend mode e AHCI Configuration Settings for AHCI Ports e APM Configuration Settings for Power Management APM Video Power Down Mode Hard Disks Power Down Mode Suspend Time Out Keyboard amp PS 2 Mouse Power Button Mode Advanced Resume Event Controls Resume on PME Resume on RTC Alarm CME 965 User Manual 1 2 www diamondsystems com Page 12 3 4 3 DIAMOND SYSTEMS MPS Configuration Settings for MPS Revision multi processor version control USB Configuration Settings for Legacy USB Support USB 2 0 Controller Mode BIOS EHCI Hand Off USB Mass Storage Reset Delay Emulation Type floppy hard drive Re
22. cit entes A A enne eee 11 XC Booting the Systemi 12 24 BIOS Setup 12 3 4 1 Tes TIRE EE 12 3 4 2 Advanced Setup Menuires naiai aaea nnne entente iai iaaa aiaa nensis nnns sn aia 12 345 POl PnP Settings Menu nacti eee iiia edi a diii a iiaia 13 3 4 4 Boot Settings a 19 3 4 5 Security Settings Menu eiiieaen enne sten nsn tn taste nnt n sss tn nass nnns entes nsns a 13 34 Chipset Settings Ment 13 vim 13 3 5 Operating System DEIVers Creed ent etr aca cbs bed nasa tax pu ene 14 3 6 5 86 45 18 14 4 INTERFACE CONNECTOR DETAILS ctetuer reet aperui patet eo enace rtl Lxx aaa ete edo 15 41 GOM a P ex aud 16 4 1 1 WS BSI A 18 41 22 Gigabit Ethernet LAN deo eene 18 41 35 AC 97 Audio High Definition Audio eeeeeeeeeeeeeeeeeeeeeee eene eene 18 114 19 DOR MEE V a A 19 4 1 6 General Purpose Inputs and Outputs
23. ems com Page 38 DIAMOND SYSTEMS 8 func 8 BBS ROM initialization for all BUSes The lower nibble Y indicates the BUS on which the different routines are being executed Y can be from 0 to 5 0 Generic DIM Device Initialization Manager 1 On board System devices 2 ISA devices 3 EISA devices 4 ISA PnP devices 5 PCI devices 5 4 8 ACPI Runtime Checkpoints ACPI checkpoints are displayed when an ACPI capable operating system either enters or leaves a sleep state The following table describes the type of checkpoints that may occur during ACPI sleep or wake events Checkpoint Description AC First ASL check point Indicates the system is running in ACPI mode AA System is running in APIC mode 01 02 03 04 05 Entering sleep state 91 S2 S3 S4 or 99 10 20 30 40 50 Waking from sleep state S1 S2 S3 S4 or S5 Note Checkpoints may differ between different platforms based on system configuration Checkpoints may change due to vendor requirements system chipset or option ROMs from add in PCI devices CME 965 User Manual 1 2 www diamondsystems com Page 39
24. ituations A third cause of failure is when a metal screwdriver tip slips or a screw drops onto the board while it is powered on causing a short between a power pin and a signal pin on a component This can cause overvoltage power supply problems described below To avoid this type of failure only perform assembly operations when the System is powered off Sometimes boards are stored in racks with slots that grip the edge of the board This is a common practice for board manufacturers However our boards are generally very dense and if the board has components very close to the board edge they can be damaged or even knocked off the board when the board tilts back in the rack Diamond recommends that all our boards be stored only in individual ESD safe packaging If multiple boards are stored together they should be contained in bins with dividers between boards Do not pile boards on top of each other or cram too many boards into a small location This can cause damage to connector pins or fragile components Power supply wired backwards Our power supplies and boards are not designed to withstand a reverse power supply connection This will destroy each IC that is connected to the power supply In this case the board will most likely will be unrepairable and must be replaced A chip destroyed by reverse power or by excessive power will often have a visible hole on the top or show some deformation on the top surface due to vaporization inside
25. ive differential pair SATA1 RX SATA2_TX SATA Channel 2 transmit differential pair O SATA2_TX SATA2_RX SATA Channel 2 receive differential pair SATA2 RX SATA SATA activity indicator LED O CME 965 User Manual 1 2 www diamondsystems com Page 19 DIAMOND SYSTEMS 4 1 6 General Purpose Inputs and Outputs GPIO These pins carry four general purpose input lines and four general purpose outputs Signal Name Signal Function Direction GPO 0 3 General purpose output pins GPI 0 3 General purpose input pins 4 17 Power and System Management These pins support various power management and control functions Signal Name Signal Function Direction PWRBTN Power button to bring system out of S5 soft off active on rising edge SYS_RESET Reset button input CB_RESET Reset output from module to carrier board Power OK from main power supply SUS_STAT Indicates imminent suspend operation used to notify LPC devices SUS_S3 Indicates system is in Suspend to RAM state SUS 548 Indicates system is in Suspend to Disk state SUS 558 Indicates system is in Soft Off state Also known as O PS ON and can be used to control an ATX power supply WAKE0 PCI Express wakeup signal WAKE1 General purpose wakeup signal BATLOW Indicates that external battery is low THRM Input from off module temp sensor indicating an over temp sit
26. llowing table shows the IRQ used by the devices on board IRQ Level Function IRQ 00 System Timer IRQ 01 Standard 101 102 Key or Microsoft Natural PS 2 Keyboard IRQ 02 VGA and Link to Secondary PIC IRQ 03 Communications Port COM2 IRQ 04 Communications Port COM1 IRQ 05 PCI Device IRQ 06 Standard floppy disk controller IRQ 07 Parallel Port IRQ 08 System CMOS real time clock IRQ 09 Microsoft ACPI Compliant System IRQ 10 PCI Device IRQ 11 PCI Device IRQ 12 PS 2 Compatible Mouse IRQ 13 PFY exception IRQ 14 Primary IDE Channel IRQ 15 PCI Device CME 965 User Manual 1 2 www diamondsystems com Page 30 5 4 BIOS Beep Codes DIAMOND SYSTEMS This section contains BIOS codes and troubleshooting information 5 41 Boot Block Beep Codes Number of Beeps 1 Description Insert diskette in floppy drive A 2 AMIBOOT ROM file not found in root directory of diskette in A Insert next diskette if multiple diskettes are used for recovery Flash Programming successful Floppy read error Keyboard controller BAT command failed No Flash EPROM detected Floppy controller failure Boot Block BIOS checksum error Flash Erase error Flash Program error AMIBOOT ROM file size error CME 965 User Manual 1 2 www diamondsystems com Page 31 4 DIAMOND SYSTEMS 5 4 2 Post BIOS Beep Codes Number of Beeps Description
27. lowing table lists the I O port addresses used Note IDE currently is not supported on the CME 965 Address 0000h 0000Fh Device Description DMA Controller 0080h 009Fh DMA Controller 00COh 00DFh DMA Controller 0020h 0021h Programmable Interrupt Controller 00 00A1h Programmable Interrupt Controller 0040h 0043h System Timer 0044h 0047h System Timer 0060h 0064h Keyboard Controller 0070h 0073h System CMOS Real Time Clock OOFOh OOFFh Math Co Processor 01FOh 01F7h Primary IDE 0274h 0277h ISAPNP Read Data Port 0279h 0A79h ISAPnP Configuration 02F8h 02FFh COM_2 If use 0378h 037Ah Parallel Port If use 03 0 03 MDA MGA 03COh 03CFh EGA VGA 03D4h 03D9h CGA CRT register O03FOh 03F7h Floppy Diskette O3F6h 03F6h Primary IDE O3F8h 03FFh COM_1 If use 0400h 041F South Bridge SMB 04D0h 04D1h IRQ Edge level control ports 0500h 053Fh South Bridge GPIO 0800h 087Fh ACPI 0A00h 0A07h PME CME 965 User Manual 1 2 www diamondsystems com Page 29 DIAMOND SYSTEMS 0A10h 0A17h Hardware Monitor OCF8h PCI Configuration address OCFCh PCI Configuration Data 5 3 Interrupt Request IRQ Lines Peripheral devices use interrupt request lines to notify CPU for the service required The fo
28. ly POST initialization of chipset registers 20 Relocate System Management Interrupt vector for all CPU in the system 24 Uncompress and initialize any platform specific BIOS modules GPNV is initialized at this checkpoint CME 965 User Manual 1 2 www diamondsystems com Page 35 DIAMOND SYSTEMS 2A Initializes different devices through DIM See DIM Code Checkpoints section of document for more information 2C Initializes different devices Detects and initializes the video adapter installed in the system that have optional ROMs 2bE Initializes all the output devices 31 Allocate memory for ADM module and uncompress it Give control to ADM module for initialization Initialize language and font modules for ADM Activate ADM module 33 Initializes the silent boot module Set the window for displaying text information 37 Displaying sign on message CPU information setup key message and any OEM specific information 38 Initializes different devices through DIM See DIM Code Checkpoints section of document for more information USB controllers are initialized at this point 39 Initializes DMAC 1 amp DMAC 2 3A Initialize RTC date time 3B Test for total memory installed in the system Also Check for DEL keys to limit memory test Display total memory in the system 3C Mid POST initialization of chipset registers 40 Detect different devices
29. m CME 965 User Manual 1 2 www diamondsystems com Page 15 DIAMOND SYSTEMS 4 1 COM Express A B Connector The 2x110 pin high density COM Express A B connector implements the board s USB PCI Express SATA LVDS LPC AC 97 audio VGA CRT LAN power and ground interfaces and system and power management as indicated in the table below Further information regarding each of these signal groups follows the table Note Pins designated NC should be left unconnected GND B1 A1 GND USB7 B36 A36 USB6 GBEO_ACT B2 A2 GBEO_MDI3 USB7 B37 A37 USB6 LPC_FRAME B3 A3 GBEO_MDI3 USB 4 5 OC B38 A38 USB 6 7 OC LPC ADO 4 A4 GBEO_LINK100 USB5 B39 A39 USB4 AD1 A5 GBEO_LINK1000 USB5 B40 A40 USB4 AD2 B6 GBEO MDI2 GND B41 A41 GND LPC AD3 B7 A7 GBEO_MDI2 USB3 B42 A42 USB2 LPC_DRQo B8 A8 GBEO_LINK USB3 B43 A43 USB2 LPC_DRQ1 B9 A9 GBEO MDIt USB_0_1_OC B44 A44 USB 2 3 OC LPC_CLK B10 A10 GBEO_MDI1 USB1 B45 A45 USBO GND B11 A11 GND USB1 B46 A46 USBO PWRBTN B12 A12 GBEO MDIO EXCD1_PERST B47 A47 VCC_RTC SMB CK B13 A13 GBEO_MDIO EXCD1_CPPE B
30. mit and GA20 enabled D2 Verify the boot block checksum System will hang here if checksum is bad D3 Disable cache before memory detection Execute full memory sizing module If memory sizing module not executed start memory refresh and do memory sizing in boot block code Do additional chipset initialization Re enable cache Verify that flat mode is enabled D4 Test base 512KB memory Adjust policies and cache first 8MB Set stack D5 Boot block code is copied from ROM to lower system memory and control is given to it BIOS now executes out of RAM Copies compressed boot block code to memory in right segments Copies BIOS from ROM to RAM for faster access Performs main BIOS checksum and updates recovery status accordingly D6 Both key sequence and OEM specific method is checked to determine if BIOS recovery is forced If BIOS recovery is necessary control flows to checkpoint See Boot Block Recovery Code Checkpoints section of document for more information D7 Restore CPUID value back into register The Boot Block Runtime interface module is moved to system memory and control is given to it Determine whether in memory D8 The Runtime module is uncompressed into memory CPUID information is stored in memory D9 Store the Uncompressed pointer for future use in PMM Copying Main BIOS into memory Leaves all RAM below 1MB Read Write including E000 and F000 shadow areas but closing SMRAM DA Restore CPUID value back into register Give con
31. mote Access Configuration Settings for Remote Access Serial port number Base Address IRQ PCI PnP Settings Menu This menu allows you to select configuration options for the following 3 4 4 Clear NVRAM Plug amp Play O S PCI Latency Timer Allocate IRQ to PCI VGA IRQ3 IRQ15 DMA Channel 0 DMA Channel 7 Reserved Memory Size Boot Settings Menu This menu allows you to select configuration options for the following 3 4 5 Boot Device Priority Hard Disk Drives Removable Drives Quick Boot Bootup Num Lock LAN Boot Function Security Settings Menu This menu allows you to select configuration options for the following 3 4 6 Supervisor Password amp User Password Boot Sector Virus Protection Chipset Settings Menu This menu allows you to select configuration options for the following 3 4 7 North Bridge Chipset Configuration Settings for Boots Graphic Adapter Priority Internal Graphic Mode Select Video Function Configuration DVMT Mode and Memory Boot Display CRT LVDS Flat Panel Type TV Standard Spread Spectrum Clock South Bridge Chipset Configuration Settings for USB Function active ports USB 2 0 Controller HDA Controller SLP 948 Min Assertion Width Onboard LAN1 Exit This selection saves changes and exits the BIOS Setup Utility CME 965 User Manual 1 2 www diamondsystems com Page 13 DIAMOND SYSTEMS 3 5 Operating System Drivers Drivers for Windows XP and Linux
32. ng to all of the module s interface connectors are discussed in greater detail in Section 4 of this document 2 4 COM Express Bus Connectors Connector Location Pins Function USB gigabit Ethernet PCI Express AC 97 audio SATA Bottom 2x110 LVDS LPC VGA CRT LAN TV Out power and ground interfaces and system and power management COM Express A B bus COM Express Bottom 2x110 PCI bus IDE PATA bus PCI Express x16 Graphics C D bus PEG and power and ground signals CME 965 User Manual 1 2 www diamondsystems com Page 9 4 DIAMOND SYSTEMS 3 GETTING STARTED This section of the CME 965 User Manual covers basic hardware setup power connection system boot up and initial software configuration First time CME 965 users normally receive the product in conjunction with one of Diamond s Development Kits which provide everything needed to ensure rapid application development Important Safe Handling Information WARNING ESD Sensitive Electronic Equipment Observe ESD safe handling procedures when working with this product Always use this product in a properly grounded work area and wear appropriate ESD preventive clothing and or accessories Always store this product in ESD protective packaging when not in use Please refer to page 3 of this manual Important Safe Handling Information for further details CME 965 User Manual 1 2 www diamondsystems com Page 10 piamono SYSTEMS 3 1 COM Express De
33. nterface Signal Name Signal Function Direction AC_RST Reset output to AC 97 CODEC O AC_SYNC 48KHz fixed rate sample synchronization signal to the CODEC s BITCLK 12 228MHz serial data clock generated by the external CODEC s AC SDOUT Serial TDM data output to the CODEC SDIN 0 2 Serial TDM data inputs from up to 3 CODECs CME 965 User Manual 1 2 www diamondsystems com Page 18 DIAMOND SYSTEMS 4 14 PCI Express These pins provide four PCI Express bus x1 links plus several other PCI Express related signals Signal Name Signal Function Direction PCIE TX 0 3 PCI Express Differential Transmit Pairs 0 through 3 O PCIE_TX 0 3 PCIE_RX 0 3 PCI Express Differential Receive Pairs 0 through 3 PCIE RX 0 3 PCIE CLK REF Reference clock output for all PCI Express and PCI Express Graphics lanes EXCD 0 1 CPPE PCI Express Card capable card request active low one per card EXCD 0 1 PERST PCI Express Card reset active low one per card O PCI_RESET PCI Reset output active low O WAKEO PCI Express wakeup signal 4 1 5 SATA These pins carry signals for the three Serial ATA SATA ports Signal Name Signal Function Direction SATAO_TX SATA Channel 0 transmit differential pair O SATAO TX SATAO_RX SATA Channel 0 receive differential pair SATAO RX SATA1_TX SATA Channel 1 transmit differential pair O SATA1_TX SATA1_RX SATA Channel 1 rece
34. plements the module s PCI expansion bus For further information regarding the functions of the PCI bus signals refer to the PCI Bus Specification available from the PCI Special Interest Group http www pcisig com specifications Signal Name Signal Function Direction PCI AD 0 31 PCI bus multiplexed address and data lines y o PCI C BE 0 3 4 PCI bus byte enable lines active low PCI 4 PCI bus Device Select PCI FRAME PCI bus Frame control line PCI PCI bus Initiator Ready control line y o PCI TRDY PCI bus Target Ready control line y o PCI STOP PCI bus STOP control line PCI bus parity y o PCI PERR Parity Error y o PCI REQ 0 3 PCI bus master request input lines PCI GNT 0 3 PCI bus master grant output lines O PCI RESET PCI Reset output PCI _LOCK PCI Lock control line O PCI SERR System Error SERR may be pulsed active by any PCI O device that detects a system error condition PCI_PME PCI Power Management Event PCI peripherals drive PME to wake system from low power states 51 55 PCI CLKRUN Z Bidirectional pin used to support PCI clock run protocol for mobile systems PCI IRQ A D PCI interrupt request lines PCI CLK PCI 33MHz clock output Pull down strap CME 965 User Manual 1 2 www diamondsystems com Page 27 4 2 9 PCI Express x16 Graphics PEG bus
35. rection SPKR Output for audio enunciator the speaker in PC AT systems BIOS DISABLE 2 Module BIOS disable input WDT Output indicating that a watchdog time out event has occurred KBD RST Input to module from optional external keyboard controller that can force a reset KBD A20GATE Input to module from optional external keyboard controller CME 965 User Manual 1 2 www diamondsystems com Page 23 4 2 COM Express C D Connector DIAMOND SYSTEMS The 210 pin high density COM Express C D connector implements the IDE PATA bus PCI bus PCI Express x16 Graphics PEG bus and power and ground signals as indicated in the table below GND IDE D5 IDE D10 IDE D11 IDE D12 IDE D4 IDE DO IDE REQ IDE IOWs IDE ACK amp GND IDE IRQ IDE AO IDE A1 IDE A2 IDE 814 IDE CS34 IDE RESET PCI GNT3 PCI REQ3 GND PCI AD1 PCI AD3 PCI AD5 PCI AD7 PCI PCI AD9 PCI AD11 PCI AD13 PCI AD15 GND PCI PAR PCI SERR PCI STOP PCI 4 CME 965 User Manual 1 2 D1 C1 D2 02 D3 C3 D4 C4 D5 C5 D6 C6 D7 C7 D8 C8 D9 C9 D10 C10 D11 C11 D12 C12 D13 C13 D14 C14 D15 C15 D16 C16 D17 C17 D18 C18 D19 C19 D20 C20 D21 C21 D22 C22 D23 C23 D24 C24 D25 C25 D26 C26 D27 C27 D28 C28 D29 C29 D30 C30 D31 C31 D32 C32 D33 C33 D34 C34 D35 C35
36. s creates many opportunities for accidental damage during handling installation and connection to other equipment The list here describes common causes of failure found on boards returned to Diamond Systems for repair This information is provided as a source of advice to help you prevent damaging your Diamond or any vendor s embedded computer boards ESD damage This type of damage is almost impossible to detect because there is no visual sign of failure or damage The symptom is that the board simply stops working because some component becomes defective Usually the failure can be identified and the chip can be replaced To prevent ESD damage always follow proper ESD prevention practices when handling computer boards Damage during handling or storage On some boards we have noticed physical damage from mishandling A common observation is that a screwdriver slipped while installing the board causing a gouge in the PCB surface and cutting signal traces or damaging components Another common observation is damaged board corners indicating the board was dropped This may or may not cause damage to the circuitry depending on what is near the corner Most of our boards are designed with at least 25 mils clearance between the board edge and any component pad and ground power planes are at least 20 mils from the edge to avoid possible shorting from this type of damage However these design rules are not sufficient to prevent damage in all s
37. sswords Initialize status register A Initializes data variables that are based on CMOS setup questions Initializes both the 8259 compatible PICs in the system 05 Initializes the interrupt controlling hardware generally PIC and interrupt vector table 06 Do R W test to CH 2 count reg Initialize CH 0 as system timer Install the POSTINT1Ch handler Enable IRQ 0 in PIC for system timer interrupt Traps INT1Ch vector to POSTINT1ChHandlerBlock 07 Fixes CPU POST interface calling pointer 07 Fixes CPU POST interface calling pointer 08 Initializes the CPU The BAT test is being done on KBC Program the keyboard controller command byte is being done after Auto detection of KB MS using AMI KB 5 CO Early CPU Init Start Disable Cache Init Local APIC C1 Set up boot strap processor Information C2 Set up boot strap processor for POST 05 Enumerate and set up application processors C6 Re enable cache for boot strap processor C7 Early CPU Init Exit 0A Initializes the 8042 compatible Key Board Controller 0B Detects the presence of PS 2 mouse 0C Detects the presence of Keyboard in KBC port OE Testing and initialization of different Input Devices Also update the Kernel Variables Traps the INTO9h vector so that the POST INTO9h handler gets control for IRQ1 Uncompress all available language BIOS logo and Silent logo modules 13 Ear
38. the package Check twice before applying power CME 965 User Manual 1 2 www diamondsystems com Page 3 DIAMOND SYSTEMS 1 INTRODUCTION The CME 965 is a highly integrated computer on module COM based on the low power high performance Intel amp Core 2 Duo LV processor clocked at up to 1 6GHz The module is equipped with up to 4GB of DDR2 SDRAM and provides interfaces for high resolution CRTs and LVDS interfaced LCDs PCI Express x16 Graphics PEG gigabit Ethernet SATA drives IDE USB peripherals and audio Additionally the CME 965 offers a high degree of system expansion flexibility via the presence of both PCI Express and PCI buses on its COM Express Type 2 compliant baseboard interface connectors 1 1 Features e Processor o 1 6GHz Intel Core 2 Duo LV o 800MHz front side bus o 4MB 2 cache e Chipset Intel 965GME with Intel ICH8M 2200 pin SO DIMM sockets for up to 4GB DDR2 SDRAM 533 667 MHz e Graphics o Chipset Integrated Intel Graphics Media Accelerator x3100 o Provides three display interfaces Analog VGA RGB support up to 2048 x 1536 resolution TV out support NTSC PAL up to HDTV 1080P LCD Dual Channel 24 bit LVDS Audio o AC 97 link o Mic in line in out signals e USB interfaces 8 USB 2 0 ports Networking 10 100 1000Mbps Ethernet Realtek RTL8111B PCle Gigabit Ethernet controller e Mass storage interface o 3 SATA ports with 150MB s maximum data rate o 1 PATA supports 2
39. trol to BIOS POS ExecutePOSTKernel See POST Code Checkpoints section of document for more information DC System is waking from S3 state E1 E8 OEM memory detection configuration error This range is reserved for chipset vendors EC EE and system manufacturers The error associated with this value may be different from one platform to be next CME 965 User Manual 1 2 www diamondsystems com Page 33 5 4 5 DIAMOND SYSTEMS Boot Block Recovery Code Checkpoints The boot block recovery code gets control when the BIOS determines that a BIOS recovery needs to occur because the user has forced the update or the BIOS checksum is corrupt The following table describes the type of checkpoints that may occur during the boot block recovery portion of the BIOS Checkpoint Description EO Initialize the floppy controller in the super I O Some interrupt vectors are initialized DMA controller is initialized 8259 interrupt controller is initialized L2 cache is enabled E9 Set up floppy controller and data Attempt to read from floppy EA Enable ATAPI hardware Attempt to read from ARMD and ATAPI CDROM EB Disable ATAPI hardware Jump back to checkpoint E9 EF Read error occurred on media Jump back to checkpoint EB FO Search for pre defined recovery file name in root directory F1 Recovery file not found F2 Start reading FAT table and analyze FAT to find the clusters occ