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1. Figure 3 3 HEW Start Up Window without toolchain 18 Renesas System Solutions Asia Pte Ltd Select 38024F CPU Board as the target by selecting o CPU Series SLP Super Low Power o CPU Type 38024F Which CPU da you want to use for this project SLP Super Low Power CPU 3900 3801 3902 3822 3823 3824 3825 382b 4827 lt Back Finish Cancel COLE UU UU CH EC BOE OS UA BR BH CODE UU NUS CE E M UN GA C CA CU U UO UN UN OE E UR UG UA E UN
2. 1 FIGURE 1 2 CPU BOARD FUNCTIONAL BLOCKS 3 FIGURE 1 3 CPUBD SS02AI PACKAGE 5 FIGURE 2 1 NAMES OF PARTS ON CPU BOARD 7 FIGURE 2 2 SERIAL COMMUNICATION CONNECTIONS 8 FIGURE 2 3 POWER CONNECTOR DC PLUG 9 FIGURE 24 RUN DIALOGUE EEEE 12 FIGURE 2 5 HEW FOR INSTALLER WELCOME 5 12 FIGURE 2 6 UPDATE INFORMATION README DIALOGUE BOX 13 FIGURE 2 7 SELECT DESTINATION DIRECTORY SCREEN 13 FIGURE 2 8 SELECT COMPONENTS SCREEN u a s ari u ci nt E LEE DL 14 FIGURE 2 0 DIRECTORY CONFIRMATION SCREEN 15 J lili jO a u 15 FIGURE 2 11 COMPLETION SCREEN 16 FIGURE 3 1 HEW PURE DEBUGGER CPUBD ICON 17 FIGURE 3 2 SELECT PLATFORM DIALOGUE
3. 18 FIGURE 3 3 START UP WINDOW WITHOUT TOOLCHAIN ccccceseccescccscceseccessseessceessseeeceeeeees 18 id LLL uu Cr ene 19 FIGURE 3 5 DEBUGGER SETTING SUMMARY WINDOW 19 FIGURE 3 6 SELECT PLATFORM DIALOGUE BOX 20 FIGURE 4 1 HIGH PERFORMANCE EMBEDDED WORKSHOP WINDOW 21 FIGURE 4 2 TOOLBAR SHOWING THE SESSION AND CONFIGURATION 23 FIGURE 4 3 TOOLBAR SHOWING THE SESSIONS AND CONFIGURATIONS 23 HGURE AA OPTION EMULATOR 26 FIGURE4 5 TARGET CONFIGURATION DIALOGUE BOX 26 FIGURE 4 6 ENABLING STANDALONE FLASH OPTION 27 FIGURE 4 7 DIALOGUE BOX FOR DOWNLOADING USER TARGET 27 FIGURE 4 8 DIALOGUE BOX FOR RUNNING USER TARGET PROGRAM 28 FIGURE 4 9 MEMORY MAPPING 2 000000000000000 29 FIGURE 4 10 TARGET MEMORY CONFIGUR
4. OE NUR EUN UR GG CUN LU CH DUNS CR OUS CEDE DEO UR GE UU UN CR US PEU UA UA UN GU CU CUN UR Label Address 00000300 Power N Reset 00000414 INT IBQO 00000416 INT 01 00000418 _ _ 0000041 INT H n nonalc INT 0000041 _ _ _ 00000420 INT Timer 00000422 _INT Counter 00000424 INT Timerc 00000426 INT TimerFL 00000428 INT TimerFH 00000424 INT 0000042 _ _8 13 Figure 4 21 Label NOTE When a label value matches an operand the corresponding instruction s operand is replaced by the label If two or more labels have the same value the earlier label alphabetical order will be displayed 37 Renesas System Solutions Asia Pte Ltd 4 7 4 6 Watch User will have to add the variables into the watch window 209990008 9990000 ee a 4 A y Watcha Watcha A Matcha Figure 4 22 Watch NOTE The variables can be displayed only if debug information is included in the absolute file abs
5. uqu u x e 54 73 MONITOR SOFTWARE REQUIREMENTS 54 Ti A II 55 7 59 u u u So PE TE OIN a OIN ED ad 56 7 6 INTERRUPTS USED BY THE MONITOR 56 FN EE BREA ETE EON 57 SECTIONS FLASH PROGRAMLMIING 58 8 1 FLASH PROGRAMMING THE 58 8 1 1 58 8 1 2 TTO 711081 59 8 2 OPERATION DURING PROGRAMMING KERNEL EXECUTION 59 SECTION 9 TUTORIAL 300L 2552 55 2 5 8 CE Ceo va 61 INIRODUCTION uu 61 Renesas System Solutions Asia Pte Ltd vill 61 __________________ 8__ 64 9 3 1 Downloading ihe tutorial Program 64 9 3 2 iher ronroni LIN 67 AV SUING DR APO TS a E 69 9 4 1 Setting a Program Count 69 9 4 2 EE 70 9 4 3 R
6. 73 OPEN MEMORY WINDOW 74 NIEMORYSWIN DOW 74 INSTANT WATCH DIALOGUE BOX u u u uq ua a 75 WATCH WINDOW L l atska 75 ADD WATCH DIALOGUE BOX 76 WARA NIDO o sess bess tes 76 DISPLAYING INDIVIDUAL ELEMENTS IN AN ARRAY 76 EXECUIINGUPTO 77 Bere iE Vy TINO uu 78 DISPLAYING INDIVIDUAL ELEMENTS IN AN 78 TTS TIUN R __ 9 POWER SUPPLY SELECTION JUMPERS FOR MCU 10 BOOT MODE SELECTION JUMPERS 10 USER MODE STANDALONE SELECTION JUMPERS DEFAULT 10 USER MODE INTERFACE WITH APPLICATION BOARD SELECTION JUMPERS 11 E10T E7 EMULATION SELECTION JUMPERS 11 TYPES OF BREAKS ENCOUNTERED DURING EMULATION 40 1 Renesas System Solutions Asia Pte Ltd 5 5 Section 1 Introduction H8 38024F CPU board CPUBD 38024F is a low cost
7. 6 7 2 PARTS ON CPU BOARD 7 22 8 2 3 8 2 4 POWER SUPPLY FOR CPU 1 9 P OPTION E 9 Zod Power Supply Selection Jumpers for MCU 10 BOO Mode 10 2 3 3 User Mode Standalone Selection Jumpers Default 10 2 5 4 User Mode Interface with Application Board Selection 11 22 2 1 E7 Emulation Selection 11 2 6 INSTALLATION PURE DEBUGGER FOR CPU BOARD 12 SECTION 3 SETUP OF PURE DEBUGGER FOR CPU 17 3 1 RUNNING PURE DEBUGGER FOR CPU BOARD 17 5 GREATING A NEW WORKSPACE 18 3 3 SELECTING THE TARGET DEBUG 5 5 2 0 hse se sese enses enne 20
8. E10T o o 15 31000 040 Interface lo o lo o p Eu HE ool 05 Boot LED 9 50 Jl uc s io io 5 RST SH i le o leo ex E 580 060 590060 CONI CON2 JP9 Boot Mode D1 Power LED 51 Reset Switch 1 2 External User Enable Interface 14222222222222222222232212242122222222222224222222224241724421224224224224234242224224224241224242222242242242342223242242232412234242242242244242344232324224223241224242242242244223422233422422324123224224242244242344233242242232412322242222242224222422323222223241232232122222422442224422222222322 12322242242422242232442322422422324123242324422242244222242 2222323 3222 32 22 2 482 2222 42242 42 222 2 4 2 2D 2 2 2 4 A 36 Figure 2 1 Names of Parts on CPU Board 7 Renesas System Solutions Asia tENESAS 22 Installing the CPU Board Installing the CPUBD requires power and serial connection to a host computer The serial communication cable for connecting the CPUBD to a host computer is supplied The serial connection cable uses a 1 1 connectivity The diagram below shows how to connect the CPUBD to a host machine or notebook computer equipped with a DB 9P connector HOST PC CPUBD OOOOO 2 TXD RXD 2 TXD 3 3 RXD GND
9. S4 UN UN M4 G4 GS HD SU M 4H N NE UN CU M SS UE LR EM 4 UN 4L UN E UN 4 GCaAGHW S uU SUE GS GEURB NH UNU NC UU GU S GL UN GE UU NGA S C E US CR CR A 4 4 6 Figure 4 28 Debug Functions 4 9 1 Reset CPU When RESET CPU command is activated the following actions will take place PC Power on Reset vector value 7 H FF7E ERO 6 H 00000000 CCR H 00 The microcomputer is reset i e all internal peripherals registers will be at default state 43 Renesas System Solutions Asia Pte Ltd tENESAS 4 9 2 Go Reset Go Goto Cursor Set PC to Cursor Run Near Real time execution Debug by the MCU based on the user setting These commands will cause the HEW Debugger to steal a cycle from the running chip in order to probe a response from the MCU to verify that the communication link between the PC and CPUBD is still active NOTE Go To Cursor will not halt if the running program never executes the code at the cursor Stopping of the execution is possible via ESC key pressing the RESET switch on the CPUBD or STOP button of HEW 44 Renesas System Solutions Asia Pte Ltd tENESAS 4 9 3 Step Functions There are four types of Step Functions Step In Step Out amp Step Over Step Step Mode Auto Assembly and Source Single Step executes the instruction at the current program counter If an int
10. F gm 00000808 1911 SUB W Rl R1 2900 00 FLOO RO 5528 BSR sort 00000810 6960 00000812 0800 ADDS W 1 00000814 F 00000816 79010001 HOV W 0001 0000081 2900 00 HOV W FLOO 0000081 5518 BSR sort 00000820 6960 00000822 0800 ADDS V 1 00000824 F 0000082 6 79010002 HOV W FH 0002 2 2900 00 FLOO RO 2 5508 BSR sort Figure 4 12 Disassembly Window 32 Renesas System Solutions Asia Pte Ltd 5 5 4 7 MCU related information User can be monitor amp control the MCU information under the view menu File Edit Project Options Build Debug Memory Tools Window Help Command Line Xt TCL Toolkit imi Workspace output Disassembly Registers Symbol k Memory Code 4 IO Ctrl I kal Status Ctrl U Figure 4 13 View CPU 4 7 1 Registers User can access these registers directly through the Register windows during break mode only 700000000 9990000 32 22 22 2 222 ERE RE x Register Value 0 54 H oc64 0000 0000 0
11. OG CU UG UG CO CU UN DG CU GA Figure 4 17 Status memory window 35 Renesas System Solutions Asia Pte Ltd 5 5 4 7 4 2 Status Platform This platform tab shows the current emulation condition Target device CPU Run Status Break Cause Connected To 802 Board 300 Bun Status Read reak Cause User Break Figure 4 18 Status Platform window 4 7 4 3 Status Events The events tab shows the usage of PC Breakpoints 9909008 2008 ol Events Figure 4 19 Status Events window 36 Renesas System Solutions Asia Pte Ltd tENESAS 4 7 4 4 Symbol This enables easy monitoring of declared variables in the assembly or C files If debug information is not included the Watch and Locals sub menus will not appeared File Edit Project Options Build Debug Memory Tools Window Help Command Line xt TCL Toolkit Ctrl Shift L imi Workspace Px output Disassembly CPU ShiFt Ctr A Code k watch Chr Fal Locals ShiFt Ctrl w Figure 4 20 View Symbol 4 7 4 5 Label When debu g information is included detail of alllabels will be displayed in the Label window User can add new label into the window for simple reference too ee NUR GE CUL GE CE CE URS COLS CE COLE USUS
12. 5888 7777 331 gous 34 1011 1011 AGE sort sectionl 0 00000838 void sortflist struct namelist list 1 Figure 9 5 Source window 3001 tut c If necessary choose Format Views from the Tools menu to select font size suitable for your computer The above source window has it font change to Courier New 8 point font NOTE If change of font or size did not take place in the window close the window and re open the file again 68 Renesas System Solutions Asia Pte Ltd tENESAS 9 4 Using Breakpoints The simplest debugging aid is the program breakpoint or PC breakpoint it causes execution to stop when a particular point in the program is reached You can then examine the state of the MCU and memory at that point in the program 9 4 1 Setting a Program Count PC Breakpoint The program window provides a very simple way of setting a program breakpoint For example set a breakpoint at address H 00000808 as follows Click once on the line containing address H 00000808 and right click for the pop up menu and select Toggle Breakpoint OR Click once on the line containing address H 00000808 and press F9 A red dot will be displayed there to indicate that a program breakpoint is set at that address int
13. SCI Interrupt Break Figure 7 1 Mode Transition Diagram 55 Renesas System Solutions Asia Pte Ltd tENESAS 7 5 Using Monitor software The monitor software is used with the CPUBD A manual is supplied in PDF format on a CD ROM covering installation and basic usage of the HEW All monitor software functions are accessed through the HEW graphical user interface and they are not accessible by user commands via the serial interface The following functions are supported by monitor software Q Program Supported file formats are Download Elf Dwarf2 e Motorola S Record SYSROF format Breakpoint Only ONE breakpoint is allowed at a time when executing with the monitor software a Types of Execution Three execution modes RUN mode SIOP e Single Step Memory Memory Write Read Write Memory Read Fill Memory Q Register Read CPU Register Read Write e Write CPU Register Q Others Mapping e Read or Write I O registers I O windows 7 6 Interrupts used by the Monitor The monitor uses several interrupts to communicate with the host PC and control user program execution The Following lists the interrupts reserved by the monitor and their purpose Exception Source Vector Number Vector address Reset 0000 to 0001 SCI channel 3 H 0024 to H 0025 H 0002 to H 0003 56 Renesas System Solutions Asia Pte Ltd tENESAS
14. 0 const int Dumb 1 void sort malni 00000800 0 00000804 count 0 0 00000836 J4 0 00000808 1011 0 00000810 countt 0 00000816 zort section AGE 0 00000820 countt 0 00000926 1011 ID 0 00000830 0000008939 void sortflist key etruct namelizst list short 00000842 short 1 1 min Figure 9 6 Setting a Breakpoint 69 Renesas System Solutions Asia Pte Ltd tENESAS 9 4 2 Executing the Program To run the program from reset Choose Reset Go from the Debug menu or click the Reset Go button in the toolbar icon The yellow arrow will appear on the read dot indicating that the program is executed up to the breakpoint you have inserted Kyoko E int count l const int Dumb 1 void sorti 0 00000800 0 00000804 count 0 O 00000836 For jd 0 00000808 zortizectionl 0 00000810 0 00000816 eort zgzectionl AGE 0 00000820 00000926 1 1 0000008930 0 00000838 void 2 1121 key etruct namelizt list short 0 00000842 short 1 1 min Figure 9 7 Program Break 70 Renesas System Solutions Asia Pte Ltd tENESAS The message Break PC Break is displayed in the status bar to show the caus
15. Figure 2 2 Serial Communication connections 23 Communication Port Baud Rate The baud rate utilized by the CPUBD is FIXED at 38 400bps 8 Renesas System Solutions Asia Pte Ltd tENESAS 24 Power Supply for CPU Board The CPUBD requires a D C power supply from 5 VDC 9 VDC at approximately 100mA supplied to the 1 connector Prepare the D C power supply separately The power cable is included with this product Since total power consumption can vary widely due to external connections use a power supply capable of providing at least 250mA at 5V DC 5 When power is supplied to the CPUBD a PWR LED D1 is lit otherwise check the power connection for polarity reversal Figure 2 3 and Figure 2 4 show the specification of the power connector and the DC plug respectively Electrode VE Electrode VE NES Figure 2 3 Power Connector amp DC Plug 25 Jumpers Options The CPUBD has several jumpers to allow various settings for the user Designator Jumper Jumper Descriptions 2 VOCSRL NEM m hoa preme eee x S JP BOOTMODEEN Select either BOOT or USER mode or P95 Table 2 1 List of Jumpers 9 Renesas System Solutions Asia Pte Ltd tENESAS 2 5 1 Power Supply Selection Jumpers for MCU This is the jumper switch to select the power supply to the MCU As shown in Table 2 1 below any setting not listed in Table 2 1 is
16. Programming User LEDs Interface with E10T E7 Emulator _ Interface with Target system Power Supply for CPU board Environmental Copy Search Fill Load and Save memory functions Modifies and displays memory content Break Function breakpoint max 256 Step In Step Out Step Over Support on board programming Boot mode and User mode Supports two user s LEDs Supports emulation on a target system DC 0 Volt to 9 0 Volt supplied from external input 10 C to 35 Humidity 30 to 85 No condensation No corrosive gas 6 Renesas System Solutions Asia Pte Ltd 5 5 Section 2 Installation 2 1 Label of Parts on CPU Board Figure 2 1 shows the name of each part of the CPUBD JP8 User LED Selec CONI CON2 D3 User LED Application Board D4 User LED N J2 VCC Select Interface Connector CAUTION Dont t Change Mode When POWER 15 ON O 0092 JP8 JP3 JP4 External User ooo 93 EN 13 3 4 6 1 2 Interface el v9 DI O uoc GND LJ e GOO UUCC 1 2 oe a ie slo oo slo oq 1 RS 232 Serial i ol bus i I I Interface Connector ES ups o 99 19 0 99 1910 O 20 ee 7o JP9 Boot Mode 2 00 30 29 0 O30 Enable 3 e E 9
17. Download Modules Offset Address Add Remove Down Figure 3 6 Select Platform Dialogue Box Select 38024F CPU Board and click OK to continue A warning message will pop up Click OK to proceed NOTE User can change the target platform at any time by choosing Debug Settings from the Options menu Under the Download Modules User can also define the Download Module s for Debugging When the emulator has been successfully setup the HEW Pure Debugger for CPUBD desktop window will be displayed A message Connected is displayed in the Output Window 20 Renesas System Solutions Asia Pte Ltd 5 5 Section 4 Performing Emulation 41 High performance Embedded Workshop The following shows a snap shot of the HEW Pure Debugger desktop Window button High performance Embedded Workshop new c 18 3 File Edit View Project Options Build Debug Memory Tools Window Help bar s uga se ARA Toolbars 5 new Workspace 1 39 C source file FILE Memor 21 DATE Tue Jan 06 2004 Flash setprg c DESCRIPTION Main Program button sbrk c CPU TYPE 8 38004 W i Program E a This file generate
18. E OUO S Figure 3 4 Select Target Complete the workspace setup by clicking on Finish button Project PROJECT GENERATOR PROJECT MEM PROJECT DIRECTOR CPU SERIES SLP Super Low Power CPL 38024F TOOLCHAIN Hitachi 5 Standard TOOLCHAIN VERSION 5 0 0 GENERATION FILES HewS NE WN EW ydbsct c Setting of B R Section WANE Ww Program of sbrk E odefine Definition of Register S N EWAN Ew Interrupt Program SNE WAN EW resetpng c Reset Program k Generate Readme tst as summary file in the project directory Cancel Click to generate the project or Cancel to abort Figure 3 5 Debugger Setting Summary Window Asummary window shows the project files that will be generated Click OK to proceed 19 Renesas System Solutions Asia Pte Ltd 5 5 3 3 Selecting the Target Debug Settings HEW Pure Debugger for CPUBD can be extended to support multiple target emulators or platforms if the system is setup for more than one platform user will have to choose a platform for the session from Debug Settings in the Options menu Debug Settings EB A Debug session Target Options Target 38024F CPU Board
19. 11 Renesas System Solutions Asia Pte Ltd 24 NE S AS 2 6 Installation of HEW Pure Debugger for CPU Board To install the HEW Pure Debugger for CPUBD from the installation disk proceed as follows Insert the HEW Pure Debugger for CPUBD installation CD Run Windows if it is not already running Close all other applications that are running Choose from the Program Manager File menu Type Setup and click OK 054 the of a program Folder document ar Internet resource and Windows will open Far vau Open D setup exe Cancel Browse Figure 2 4 Run Dialogue This runs the HEW Pure Debugger for CPUBD installer and the following Welcome Screen is displayed High pertormance Embers mtm TinyNsLP Series compiler Package with 38024F CPU Board Debugger eleamr bn the hield izasd HR Sees CIC auk aye with AMAF GPU Debugger The hel de worn voll Tra LP Sanai compiler Package with Broad on pour compute To connus Figure 2 5 HEW for CPUBD Installer Welcome Screen Click Next to proceed with the installation 12 Renesas System Solutions Asia Pte Ltd tENESAS Check the License Agreement concerning installation and then click Yes to proceed PTOI re eet eo g High performance Embedded W
20. 5 11 13 15 17 19 OFP 80A 21 23 25 27 29 31 33 35 37 39 80 41 43 45 47 49 51 53 55 57 59 80 61 63 65 67 69 71 73 75 77 79 Descriptions AVCC P14 IRO4 ADTRG D17 IRO2 TMIF X2 OSC2 TEST P50 WKP0 SEG1 P52 WKP2 SEG3 P54 WKP4 SEG5 P56 WKP6 SEG7 Descriptions P60 SEG9 P62 SEG11 P64 SEG13 P66 SEG15 P70 SEG17 P72 SEG19 P74 SEG21 P76 SEG23 P80 SEG25 P82 SEG27 Descriptions P84 SEG29 P86 SEG31 PA3 COM4 1 2 1 VSS P91 PWM2 P93 P95 Descriptions P30 UD P32 TMOFHd P64 SEG13 P66 SEG15 P70 SEG17 P72 SEG19 P74 SEG21 P76 SEG23 P80 SEG25 P82 SEG27 E 3 5 86 Descriptions P13 TMIG P16 X1 A VSS OSC1 RES P51 WKP1 SEG2 P53 WKP3 SEG4 P55 WKP5 SEG6 _ P57 WKP7 SEG8 Descriptions P61 SEG10 P63 SEG12 P65 SEG14 P67 SEG16 P71 SEG18 P73 SEG20 P75 SEG22 P77 SEG24 P81 SEG26 P83 SEG28 Descriptions P85 SEG30 P87 SEG32 PA2 COM3 2 P90 PWM1 P92 94 Descriptions P31 TMOFL P63 SEG12 P65 SEG14 P67 SEG16 P71 SEG18 P73 SEG20 P75 SEG22 P77 SEG24 P81 SEG26 P83 SEG28 __ 8 2 4 10 12 14 16 18 20 80 22 24 26 28 30 32 34 36 38 40 OFP 80A _ __ Renesas System Solutions Asia Pte Ltd RENESAS AppendixD Pin Assignment for CON1 amp CON2 Signal Name 1 Signal
21. Yes 13 1 Hardware Components The hardware components included in the package are listed below 1x H8 38024F CPU Board 1x RS 232 Serial cable 1x DC Power Input Jack free end cable 1x 7x2pin connector not assembled 2x 30x2pin connectors not assembled 1 3 2 Software Components 1 x CD ROM containing HEW installer User s Manual Tutorial program Source code Schematic drawings Before proceeding user has to check that all the items listed in the packing list Please contact the relevant Renesas Technology sales office in Asia if any item is missing 5 Renesas System Solutions Asia Pte Ltd 14 Summary of CPUBD 38024F functions Supported Specifications 9 8304M Hz System clock 32 768KHz Sub clock 3 3 Volts only Operating Voltage Host Machine Host Interface Supported File Format Interface Software Emulation Functions Manan Pentium processor Recommended 128Mbytes and 100Mbytes hard disk space Microsoft Windows 98 Windows Me Windows NT 40 x Windows 2000 or Windows XP Serial port RS 232 Serial Baud rate 6 38400 bps Motorola 8 type ELF Dwarf2 HEW pure debugger C source level ee 9 instant Modify and display MCU registers Perform real time emulation of a target program Memory Functions
22. 7 7 Breakpoints The CPUBD allows multiple breakpoints to be assigned at a time when executing with the monitor software The breakpoint is controlled through software means the line of code where the breakpoint is placed is NOT executed and the program stops at the same instruction where the breakpoint is set NOTE Q When user inserts breakpoints always use the Disassembly window Beware of instruction pre fetches after branch instructions A breakpoint inserted on a branch instruction halt on the line of code where the instruction branches A breakpoint inserted on a line of code after a conditional branch such as BNE may never be triggered because the line of code may always be pre fetched and thus not seen by the break control 57 Renesas System Solutions Asia Pte Ltd tENESAS Section 8 FLASH Programming For programming of the FLASH ROM FLASH Kernel software is developed This FLASH Kernel is downloaded together with the monitor software to the FLASH ROM at power on It performs Write or Erase control program operation in Boot mode and User mode The MCU s serial communication port SCI3 is used for flash programming and S Record file format is used during flash programming Please refer to specific device manual to enter boot mode 8 1 FLASH Programming the CPUBD There are several methods to flash the CPUBD 38024 pure debugger FDT version 2 1 1 10 7 emulator for H8 3
23. The variables have not been excluded after the complier optimization The variables are not cleared as macro 38 Renesas System Solutions Asia Pte Ltd tENESAS 4 7 4 7 Local The Local variables will appear in the Locals window when user code has break stop at a sub routine NOTE Local variables are temporary data stored in stack Therefore it can only be viewed when execution stops within a routine mi Mot available now Hot available now 8 k Mot available now min Mot available now Ox0000 2 1 char id worklist struct namelist 5 Figure 4 23 Locals Tooltip watch place the cursor at the variable and the general information of the variable will appear 00000838 void sorti list key struct namelist list short key 00000842 1 short 1 1 long min char name struct namelist worklist 000084 000008 for 1 list i name icd 00000670 name list i name 00000 1 000008 8 2 for 1 1 1 list j name 35 11 000000696 if trcmp ilist jJ nam name lt 014 00000899 name 11 0 00 0 000008 k 1 0 000008 0 worklist lis
24. 5 5 9 5 2 Watching Variables It is useful to be able to watch the values of variables as the program is being stepped For example set a watch on the structure STRUCT variable section1 which is declared at the beginning of the program using the following procedure Scroll up in the program window until you see the line sort section1 ID In the Program windows position the cursor the word section1 and perform a right mouse button click to display a pop up menu Choose Instant Watch The Instant Watch dialogue box will be displayed Instant Watch x Figure 9 15 Instant Watch Dialogue Box Click Add button to add the variable to the Watch Window watch section i struct namelist 5 4 gt Watcha Matcha Figure 9 16 Watch Window A variable watch can be added to the Watch Window by specifying its name Use this method to add a Watch on the variable count as follows Click with the right mouse button within the Watch window and choose Add Watch from the pop up menu 75 Renesas System Solutions Asia Pte The Add Watch dialogue box appears POI te tr expression coun Cancel Figure 9 17 Add Watch Dialogue Type the variable count and click OK The Watch Window will show the content of the variable label count NOTE You might be getting d
25. 6 h 4 CONNECTOR DB9 X P N XC 05181 0 Crystal 9 8304MHz PE 260 Using Direct HC49 U S 5 Tia a NULL Modem 06709 0 xA 57 lt Serial Cable i i I ITA i i O SAG ROA D76 M clc MM G P80 85232 Driver E E ai O a Receiver Po VCC ii e amp UF 53232 0 20 A A m EUER Enable 5 Boot Mode Enable n T E 2 I LED Enable I Block lt 9 Block I TI D e GND R5C NE N N N T 5 5 i5 amp iB HEADER 30 2 HEADER 30 2 VSS L lt gt l1 o VCC LO HEADER 7 2 2 JP9 T P VCC 3 5 Normal Mode E10T EN _ 1 3 Boot Mode TP3 I zs pae HN i Caution Do not change when power is 2 4 LED D4 EN 4 6 P92 EN Trib i 9510 P35 6 5 0 577 Renesas System Solutions Asia Pte Ltd Singapore Design Centre 3 5 10 EN 1 3 P34 do 10 ii 4 6 E10T EN 2 4 P35 EN ii HEADER 3X2 ros X Document Number Doc riday september 05 89 Renesas System Solutions Asia Pte Ltd Appe
26. Pure Debugger for CPUBD L User has to be familiar with the architecture and instruction set of the H8 300L Series MCU For more information please refer to the H8 300L Series Programming Manual and H8 38024F Series Hardware Manual Refer to 85 H8 300 Series High Performance Embedded Workshop in your installed directory install directory Manuals Renesas PDFS EH8HTU36 pdf for more detailed information on using HEW 92 Overview This program is an infinite loop that sort elements based on NAME in the alphabetical order and AGE and ID in the numerical ascending order The 3001 tut workspace is provided on the installation CD A compiled version of the 3001 tut is provided in Motorola S Record in the file 3001 tut mot 61 Renesas System Solutions Asia Pte Ltd How the 3001 tut Program Works The first part of the program includes a series of header files fincluide include string h define NAME define AGE define ID Shore 2 define LENGTH 8 struct namelist char name LENGTH idcode J struct namelist sectionl Naoko 17 1234 Midori 22 89095 19 577 Eri 20 9999 Kyoko 26 3333 mu Us 0 Count void sort count 0 for 4 Sort sectionl NAME count sort Sectionl AGE count t t sort sectionl ID count t t 62 Renesas System Solutions Asia Pte Ltd i void sort list
27. The H8 38024F does not have any interface to external memory it could only be used in single chip mode The chip has 32Kbytes of FLASH ROM and 1Kbytes of RAM for user If debugging by user is necessary a monitor software would be downloaded together with the user program A total of 6 Kbytes of FLASH ROM and 1 Kbytes of RAM must be reserved for the monitor software 6 7 LEDs There are two Red LEDs on the CPUBD available to user LED D3 can be driven by port 9 bit 3 of the H8 38024F This can be selected by a jumper selection of the JP8 header see section 2 5 3 The second LED D4 can be driven by port 9 bit 2 of the H8 38024F This can be selected by a jumper selection of JP8 header see section 2 5 3 Note that a LOW output level from H8 38024F will set the LED ON and a HIGH output level would set the LED OFF 6 8 Boot Mode Enable Boot Mode is necessary to flash the FLASH Kernel software and monitor software or user program if required into the FLASH ROM when the CPUBD is placed into Boot mode This is done via the Boot Mode Enable jumper selection JP9 Boot mode is required at the Power On stage only For the jumper selection see section 2 5 2 6 9 10 E7 Interface Interface the CPUBD to E10T E7 emulator is only allowed when the E10T E7 Enable jumper selection JP9 amp JP10 on the CPUBD are set See section 2 5 5 This interface allows user to extend the debugging function of the CPUBD if an E10T E7 emulator is availab
28. Thus these steps will not be fully illustrated in this section Before downloading a program to the CPUBD check the following items and user target program Download Module to be debugged Device type Memory map NOTE Refer to Section 4 5 for these emulation settings 9 3 1 Downloading the tutorial Program Once the emulation settings of the CPUBD have been setup user can download the object program for debugging First load the object file as follows Open the Debug Settings window by choosing Options menu and Debug Settings Q Select Elf Dwarf2 for the Default Debug Format 64 Renesas System Solutions Asia Pte Ltd Prete Debug Settings 2 Debug session Target Options Target 38024 CPU Board e 3001 tut Default Debug Format Download Modules Offset Address Add Figure 9 1 Debug Settings with Load Object File Dialogue Click on the Add button Select the download Format to be the ELF DWARF2 Click the Browse button and select the file 3001 tut abs Click OK to exit from Download Module window and click OK again to exit the Debug Settings Download Module 21 00000000 Cancel Format Filename NHewa 200 tu DebugN3DDI tut abs Browse Access SIZE 1 Download debug information only Perfor memory verify during download Figure 9
29. co Jad Joo 0 1u 0 01 hh p p n bPbbJu Jp p Jp p p n TP RD CO o oco r XO LO sri A 4 Poo P83 57 lt DA 28 V C V V 2 3 3V P50 V 590 5 DO DO DO DOA gt 5 LOO H8 38024 d H gt PBO P30 P31 Po P60 61 66 PWRLED i 564 56 Only Diode Zener 266 me P40 2 Q Socket DC BZV55C3V9 1 2 ai a Jack 2 1mm P N DZ 45503 9 O so PCB Mt P N code i 5850 52 DEE Q 99503 0 P8 aM lt H8 38024 F ZTAT HEADER 10X2 x HEADER 10X2 9 lois 40 t lig lo ko bs FP 80A PN 82641380242 E C5 I i 0 1 0 1u Serial Comm a Crystal Oscillator Block Block E Interface Block a a Yi E 7 X1 2 G x iu lA gt O lt 2 lt 32 768KHz R R OSCH GND Se E C8 15p C9 15p 9 8304MHz 7 ND AV C10 C11 UV V2 ii ND ND ND OV 12p 12p ii Q 57 540 ii P13 2 L h SEX P17 16 Crystal 32 7680KHz 254 i 11 2
30. key struct namelist list short key Short long min char name struct namelist worklist Switch key case NAME for i 0 list i name name list i name i for J 1 gt 8145 mame if strcmp 1152 3 name 1152 k 9 worklist list il list i list k list k worklist break case AGE for 1 0 list i l age min list i age i J mL 2 if list jl age lt min list j age 3 worklist 11 1 list i list k list k worklist break case ID for 1 0 list i 2 min list i idcode 1 tor J 2 if list jJ 1dcode lt mn min list j idcode k J worklist 1156 1 list i list k list worklrist break 63 tENESAS Jor lt 0 Joy d 1 4 Jer Renesas System Solutions Asia Pte Ltd tENESAS 9 3 Tutorial Setup Open tutorial workspace in install directory N Tools Renesas DebugComp N Platform Emulator Evb38024F 3001_tut NOTE On a first time loading of the tutorial a dialogue box prompting the move of workspace from previous installed directory is displayed Please click YES and the workspace would be configured to the current installed directory permanently The setup of HEW is detailed in section 3
31. 2 SSCS ay 7 fi 738024 FP 80R Hitachi 3 BA6100 0 Rubber Foot Stick 505008 _________ 33 S B0050 RSC 57 04 320840 r 1 71 36 RniSttcBa foAccesoies 3 BhbeFam j 15 38 j 39 ______ _____ ________ 1 in CR ROM format wLabel 8 L 1 C Optional Items WLe4040 SwpyCabeAssmbyRevioO T 42 64004 Serial CabeWM o 91 Renesas System Solutions Asia Pte Ltd tENESAS Renesas Technology Asia Sales Offices URL http www renesas com URL http www sg renesas com sales ASIA HEADQUARTERS amp TECHNICAL SUPPORT South Asia Headquarters Singapore Technical Support Renesas Technology Singapore Pte Ltd Renesas System Solutions Asia Pte Ltd 1 HarbourFront Avenue 1 Harbourfront Avenue 06 10 Keppel Bay Tower 06 06 Keppel Bay Tower Singapore 098632 Singapore 098632 65 6213 0200 65 6213 0333 6387 2839 65 6278 8001 65 6278 1226 Email contact singapore renesas com North Asia Headquarters Hong Kong Renesas Technology Hong Kong Lid 7 F North Tower World Finance Centre Harbour City Canton Road Hong Kong Tel 852 2265
32. 38024F CPU board shall term as CPUBD Operation using the HEW pure debugger is also detailed in the manual 1 Introduction Gives an introduction about the CPU board package specification and functions Installation Explains how to install the hardware and accompanied software to a host computer Setup of HEW Pure Debugger for CPU Board Describes the setup steps before embarking on a new project development Performing Emulation Describes the various functions available in HEW Usage Constraints Highlights the various constraints that may encounter by user when operating the CPU board Hardware Explains the various hardware blocks in the CPU board Monitor software Explains the purpose of the monitor software the implementation requirements and how to use the monitor software Flash Programming Explains the difference between two programming modes and how CPU board operates in these modes Tutorial Provides a step by step guide in using the CPU board to perform debugging 10 Demonstration Program Provides two demonstration programs for user to have hands on experience with the CPU board Renesas System Solutions Asia Pte Ltd tENESAS 11 Trouble Shooting Advises on some basic fault finding methods and commonly make mistakes Appendix A CPUBD 38024F Board Layout Appendix B H8 38024F Memory Map Appendix Pin Assignment for JP1 JP4 Appendix D Pin assignment
33. Renesas Electronics does not warrant that such information is error free Renesas Electronics assumes no liability whatsoever for any damages incurred by you resulting from errors in or omissions from the information included herein Renesas Electronics products are classified according to the following three quality grades Standard High Quality and Specific The recommended applications for each Renesas Electronics product depends on the product s quality grade as indicated below You must check the quality grade of each Renesas Electronics product before using it in a particular application You may not use any Renesas Electronics product for any application categorized as Specific without the prior written consent of Renesas Electronics Further you may not use any Renesas Electronics product for any application for which it is not intended without the prior written consent of Renesas Electronics Renesas Electronics shall not be in any way liable for any damages or losses incurred by you or third parties arising from the use of any Renesas Electronics product for an application categorized as Specific or for which the product is not intended where you have failed to obtain the prior written consent of Renesas Electronics The quality grade of each Renesas Electronics product is Standard unless otherwise expressly specified in a Renesas Electronics data sheets or data books etc Standard Computers office
34. Window 72 Renesas System Solutions Asia Pte Ltd 5 5 9 44 Examining MCU Registers While the program is halted you can examine the contents of the MCU registers These are displayed in the Registers Window Choose CPU Registers from the View menu or click the Registers Window button in the toolbar wt Register Ioj x Register Value RO 0000 0000 0000 0004 H FF54 H FE 4 H 0608 EL Figure 911 CPU Registers Window As expected the value of the program counter PC is the same as the position of the yellow arrow H 00000808 The registers values can be changed from the Registers window by double clicking on respective registers in the Registers window The Register PC dialogue box allows you to edit the value HURERREREERERREEREREEEEREEEREREREEEEREEEEEEEREEEEREREEREREEEEEREEEEREREEEEEEREEREREREEREREEEEEREEREEEREEEEEEREEEREREEEREEEEEEEREEREEEREEEDEEREREREREEREREEEEEREEEREEEREEEEEEEEEEREREEREREEEEEREEREREREEEEEEEEEEEREEEEREREEREEUREEREEEREEREDEEREEEREEEEREEEEEREREEEEREREEEEEEEEREREEEERREEREREEEEEEREREEEEEEEEDEREEEERREEEEREREEEEREREEEEEEREEEREEEERREREEEREEEEEEREREEEERERER Set As Cancel whole Register Figure 9 12 Changing Register Value 73 Renesas System Solutions Asia Pte Ltd CENESAS 9 5 Examining Memory and Variables The behavior of a program can be monitored by examining the contents of an area of memory or by displaying
35. Window Displays the various outputs from For example build details results of find files Status Bar Displays the status of the CPUBD For example progress information about downloads Help Button Activates context sensitive help about any feature of the HEW Pure Debugger for CPUBD software Memory Flash Flash contents of the memory window for on chip ROM area into the MCU Button User is required to press this button when he she manually updates the contents of the memory window for on chip area This 15 not required for RAM area NOTE Please refer to the Appendix B H8 38024F Memory Map for the on chip ROM and RAM areas The major topics are highlighted as follows Menu General Description Emulation Setting Debug Settings Target Selection Emulator View memory mapping and Configure Platform Register memory Status I O Symbol 2 MCU related information Disassembly View disassembly window Breakpoints 3 Memory FM manipulation Refresh 0 2 s sih 4 Debug Execution of Code seans Set PC to Cursor Run Step In Over Out Step initialize p 22 Renesas System Solutions Asia Pte Ltd tENESAS 4 2 Compiler Configuration amp Debugger Session In HEW compiler every setting is stored in a configuration Session is not directly related to a configuration This means that multip
36. current PC will be executed The disassembly window will pop up if the current window is a C source window 46 Renesas System Solutions Asia Pte Ltd tENESAS 4 10 C source Level Debugging If user compiles and links the code when a toolchain is used with the Debug option enabled the 2 abs file with the debugging information is generated This enables user to debug the code in C source level i e Display code in C source level Step in out amp over code in C source level View label Go To label address View local Instant add watches local and user defined Stack Trace In other words C source Level debugging is only available when ELF DWARF2 abs file is downloaded User would not be able to perform debugging if other file formats like S Record Intel Hex and Binary are used 47 Renesas System Solutions Asia Pte Ltd tENESAS Section 5 Usage Precautions Users may need to observe several constraints while operating the CPUBD They are described as below 51 Corruption of Monitor Software The monitor software occupies predefined locations in the flash memory area as the user program Due to unforeseen reason user might access to this area and corrupt the monitor code As a result debugging on the CPUBD could not performed and loss of communication between HEW and CPUBD Please refer to the Appendix B H8 38024F Memory Map to take note of the area occupies b
37. equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots High Quality Transportation equipment automobiles trains ships etc traffic control systems anti disaster systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems medical equipment or systems for life support e g artificial life support devices or systems surgical implantations or healthcare intervention e g excision etc and any other applications or purposes that pose a direct threat to human life You should use the Renesas Electronics products described in this document within the range specified by Renesas Electronics especially with respect to the maximum rating operating supply voltage range movement power voltage range heat radiation characteristics installation and other product characteristics Renesas Electronics shall have no liability for malfunctions or damages arising out of the use of Renesas Electronics products beyond such specified ranges Although Renesas Electronics endeavors to improve the quality and reliability of its products semiconductor products have specific characteristics such as the occurrence of failure at a certain rate and malfunctions under ce
38. generated output xxx abs in the simulator environment NOTE The path name defined in the Options Debug Setting must be relative to CONFIGDIR PROJECTNAME abs Otherwise when the session is switch the download module will not be able to switch correctly 24 Renesas System Solutions Asia Pte Ltd tENESAS 4 3 Debug Settings The Debug Settings in Options Debug Settings is to set the environment for a session In HEW Pure Debugger with a toolchain users have been provided with two sessions Debug Session Release Session In each session users are to set Target 38024F Simulator Default Debug Format Elf Dwaf2 S record IntelHex Download module CONFIGDIR PROJECTNAME abs In each session users can set a list of command chain to be executed at the option tab At connecting the emulator Immediately before downloading Immediately after downloading 4 4 Connecting amp Disconnecting with the Emulator The open activation or close exit of the HEW and or workspace will determine the emulator and HEW connectivity The alternative method is to use the session control In HEW Pure Debugger environment with a toolchain user is provided with two sessions Debug Session linking with emulator Release Session no target Thus by switching between the sessions the emulator can be connected amp disconnected from the HEW 25 Renesas System Solutions Asia P
39. not allowed Connect to Jumper Jumper Jumper Selection Descriptions Name Designator Board Not vec SEL n Short Pin 2 to Pin 3 Power of MCU supplied Connected Default from the CPUBD x Do not short Pin 1 to Pin 2 Operating voltage 3 3V Connected Short Pin 1 to Pin 2 Power of MCU is supplied Do not short Pin 2 to Pin 3 from an application board 5 0V max Table 2 2 Power Supply Selection Jumpers for MCU 2 5 2 Boot Mode Selection Jumpers This is the jumper switch to place the CPUBD into the boot mode This is necessary for flashing the kernel software and monitor software into the FLASH ROM of the H8 38024F microcomputer J Designator Selection Descriptions p3 P95 Short Pin 1 to Pin 3 place CPUBD into Boot mode JP10 P34 1 Short Pin 3 to Pin 5 Table 2 3 Boot Mode Selection Jumpers 2 5 3 User Mode Standalone Selection Jumpers Default This is the jumper switch to place the CPUBD into the user mode for standalone operation This is necessary for flashing of the user software into the FLASH ROM of the H8 38024F w
40. operation the operation will not be completed as the MCU has been reset This will result in a timeout in HEW 5 5 Software Breakpoint User shall not set a software breakpoint in the following address An area other than the flash memory or RAM Anarea of address H 6A00 to H 7FFF Monitor code resident Anarea of address 780 to H FB7F Monitor work area User shall not set any breakpoints in the interrupt service routines When execution resumes from the breakpoint address single step execution is performed before execution resumes 5 6 Step Step function step in step out and step over is a simulated operation in the CPBD It is not implemented by the conventional hardware break mechanism No interrupts will be serviced during stepping Do not step into interrupt service routines as interrupts will be masked and HEW cannot communicate with the CPUBD Stepping of SLEEP instructions are not allowed HEW User needs to use Go to cursor in order to proceed to the next instruction 49 Renesas System Solutions Asia Pte Ltd tENESAS 5 7 Power Down Modes User must not place the MCU in any of the following power down modes when performing debugging operation Watch Mode LI Sub active Mode Subsleep Mode Software Standby Mode Serial Communication function is disabled reset in these modes hence HEW is unable to communicate with the CPUBD 5 8 5 If debug
41. ops PUED mo Ur nod 7007 Normal mode NE Table 2 4 User Mode Standalone Selection Jumpers Default 10 Renesas System Solutions Asia Pte Ltd tENESAS 2 5 4 User Mode Interface with Application Board Selection Jumpers This is the jumper switch to place the CPUBD into the user mode and allow debugging operation with Application board IPs P92 gt CONI Short Pin 3 to Pin 5 To enable debugging with Application board gt 2 2 S in User Mode 199 P33 gt gt CONI Short Pin 2 to Pin 4 BE dini Short Pin3 toPin5 34 gt CONI Short Pin 1 to Pin 3 35 gt CONI Short Pin 2 to Pin 4 eet ete etter ete eet terete etter terete treet Table 2 5 User Mode interface with Application Board Selection Jumpers 2 5 5 10 E7 Emulation Selection Jumpers This is the jumper switch to allow CPUBD to debug with an E10T E7emulator J P8 sn t Care support RENESAS TECHNOLOGY E10T E7 Emulator P33 gt E10T Short Pin4toPin6 T NETTEN qm ___ Table 2 6 E10T 7 7 Emulation Selection Jumpers
42. the function sort section1 NAME e The yellow arrow will point to the first instruction in the function sort section1 ID void sort maini j 0 00000800 0 00000804 count 0 0 000008935 tor ovo os 1 0000080 sorttsectionl 0 00000810 count t 0 00000816 eort zsectionl AGE 0 00000820 count t 000008926 zort i section 0 00000830 count t 00000838 m pid sort list key etruct namelist list short key 0 00000842 short 1 1 long min char name struct namelist worklist 000084 1 00000865 for 1 list i name 0 1311 00000870 name list i name Figure 9 20 Executing up to a Function Call Issue another Step In command to execute the next instruction User can also single step the assembly codes by selecting Step Mode Assembly in Debug menu NOTE After performing several Step In there will be a time when the Code window will be displayed showing the assembled codes These codes are included into the user target program to handle certain tasks such as saving or restoring CPU registers etc C Compiler generates these codes automatically 77 Renesas System Solutions Asia Pte tENESAS 9 7 Watching Local Variables The localized variables within a function can be viewed using the Locals Window For example in order to examine the local
43. the values of variables used in the program 9 5 1 Viewing Memory The contents of a block of memory can be viewed in the Memory Window For example to view the memory corresponding to the array section in ASCII Choose CPU Memory from View menu or click the Memory Window button in the toolbar Enter _section1 a label valid only after downloading of Download Module abs file in the Begin Address field and ffff in the End field and keep the Format as Byte x1 Cancel End rti Format Byte 1 Figure 913 Open Memory window Click OK to open the Memory window showing the specified memory area memory 0 1 2 3 ta 5 6 7 9 t 0000 0 4E 61 6B 00 00 00 00 11 00 00 0 0000 10 64 72 69 00 00 00 16 00 00 22 Sz 0000 00 00 00 00 00 13 00 00 1E 45 72 63 0000 0 00 00 00 14 oo 00 27 4B 79 0 0000 40 00 1 00 00 05 00 00 00 00 00 00 0 0000 50 oo 00 00 00 00 00 FB 80 FF FF FF OxOO00FC TO FF FF FF FF FF FF FF FF FF FF FF FF 4 k A Figure 9 14 Memory window Leave the Memory window open so that you can monitor the contents of the array label _section1 74 Renesas System Solutions Asia Pte Ltd
44. the write control program being transferred to the MCU s internal RAM and the application program Monitor program or user program received from the host machine is written to the flash memory 8 1 2 User Program Mode User Program mode is used only when the monitor program is resident in the flash memory Most of the time user program mode is used to download user program and modify Flash memory content The advantage of using user program mode is no jumper setting needed and the range of writing or erasing can be defined independently for each program block reduce programming time When monitor program is started host machine sends flash memory command to MCU The monitor program copies the write erase control program into internal RAM this is followed by having execution transferred to write erase control program HEW sends address that needs to be programmed and the entire flash memory block is erased The MCU starts receiving program data from HEW and write to the flash memory After completing the flash programming write erase control program returns the execution control to the monitor program waiting for debugging command from HEW 8 2 Operation during Programming Kernel Execution machine Host machine Host machine Application program Application program Write control program Write control program F ZTAT microcomputer F ZTAT microcomputer F ZTAT microcomputer E j J Boot program 3 Boot pro
45. variables in the function sort performs the following Open the Locals window by choosing Symbol Local from the View menu or clicking the Locals Window button in the toolbar a NOTE The Local Window will be empty if there is no local variable declared or local variables have not yet been entered In another words user target program execution should halt within a function with local variables to show any variables within Locals Window In this 3001 tut once when the execution halts within the function sort the local variables within function sort will be shown in Locals Window Mame NM i 0000790 Ss ED key 0000 R1 short Bin i Mot available now T Not available now k Hot available now a min Hot available now ii name 00000 82 char work list struct namelist Figure 9 21 Locals Window Double click on the symbol in front of the variable list in the Locals window to display the individual elements of the array list Locals ee Value Type 2 El list OxfeD struct namelist pe 00 struct ps name Naoko f 00 1 char 8 age 0011 05208 short ideode 00000492 1 1 long key 0000 A1 short i Hot available now Hot available now k Mat available now Mat available now Figure 9 22 Displaying Individual E
46. 000 0000 0000 0808 04 Figure 414 Register 33 Renesas System Solutions Asia Pte Ltd CENESAS 4 7 2 Memory Users will have to set a pre defined address range to be monitored before user can access the memory through the memory windows The memory window will not refresh constantly by itself The access methodology is different when emulation is in different mode Run or Break More memory functions are explained in Memory manipulation TT 14 00000800 Cancel End 00000 Format Byte 1 000000890 Display Value As ANSI character Bytes Count Far Une Line 16 Byte Figure 4 15 Set Memory 4 7 3 The IO window provides an easy access to MCU IO registers The Address amp Data values of respective peripherals amp MCU control registers are displayed in the IO window Serial P Ctl Reg3 0000 91 Serial Mode Reg 0000 00 Bit Rate Reg 000 03 Serial Ctrl Reg 0000 H 70 Timer Timer LCD Controller Driver Converter I 0 Ports 10 11 Pulse Width 10 Eit Pulse Width Watch Dog Timer System Ctrl Figure 4 16 Input and Output Register 34 Renesas System Solutions Asia Pte Ltd tENESAS 4 7 4 Status The status window uses three different tabs to monitor the emulator setting 4 7 4 1 Status Memory The memory
47. 2 Configure Load Object File Dialogue A new folder Download Modules with the 3001 tut abs file is created in the workspace window 65 Renesas System Solutions Asia Pte Ltd 5 5 Download the file into the memory as follows Right click on the 300I_tut abs in the workspace window and select Download module der 3001 tut High performance Embedded Workshop 3001 Eut c woe Edit View Project Options Build Debug Memory Tools Window Help az esse d amp s sim void 1131 struct namelist E 3001 tut tut EE E 3 source file f 300 2 od Em dbsct c pne char name struct PU resetprg c a sbrk c switch kev FS Downoad modules case for Download module debug data only se Unload module Configure View m Allow Docking 1 Figure 9 3 Download the Selected Object File When the file has been downloaded the Status window Memory Tab will show the downloaded Memory Address NOTE All the code should lie within the on chip ROM 66 Renesas System Solutions Asia Pte Ltd 5 5 9 3 2 Displaying the Program Listing HEW Pure Debugger for CPUBD allows user to debug a program at source level so that a listing of the program can be seen alongside the disassembled code To do this user n
48. 3 1 HEW Debugger for CPUBD Icon Documents Search Help Run Shut Down 17 Renesas System Solutions Asia Pte Ltd tENESAS 3 2 Creating a New Workspace This step is to create a workspace to inform the HEW environment what type of tool is to be used This will enable user to have the same setup workspace at the following activation of the tool Click on Create a new project workspace Options Create a new project workspace Cancel Open recent project workspace Administration 6b m amp Dm Browse to another project workspace Figure 3 2 Select Platform Dialogue Box Select a directory and key the workspace name as required 209990000 0990000 22 22 22 ERE GRE Mew Project Workspace x Projects Workspace Assembly Application Empty Applicati Project Name Library Directory AWS Browse family 85 300 Tool chain Hitachi 5 300 Standard Properties
49. 6688 Fax 852 2375 6836 Email contact hongkong renesas com ASIA SALES OFFICES China Renesas Technology Hong Kong Ltd Shenzhen Representative Office Unit 1511 12 Shun Hing Square Di Wang Commercial Centre 5002 Shennan Road East Shenzhen City 518008 China Tel 86 755 8246 1711 Fax 86 755 8246 1728 Email contact china renesas com URL http Awww cn renesas com Renesas Technology Shanghai Co Ltd 26 F Ruijin Building No 205 Maoming Road S Shanghai 200020 China Tel 86 21 6472 1001 Fax 86 21 6415 2952 Email contact china renesas com URL http Awww cn renesas com Renesas Technology Shanghai Co Ltd Beijing Office Room 1654 Office Building New Century Hotel No 6 Southern Rd Capital GYM Beijing 100044 China Telex 210509 HTCBJ CN Tel 86 10 6849 2430 Fax 86 10 6849 2819 Email contact china renesas com URL http Awww cn renesas com Taipei Renesas Technology Taiwan Co Ltd effective July 1 2003 FL 10 99 Fu Hsing N Rd Taipei Taiwan Tel 886 2 2715 2888 Fax 886 2 2713 2999 Email contact taiwan renesas com URL http www tw renesas com Renesas System Solutions Asia Pte Ltd CPUBD 38024F 434 NE SAS Renesas System Solutions Asia Pte Ltd
50. 8024F While we had included in this manual about some 3 parties tools to flash the CPUBD however correct operation of the CPUBD with these 3 party tools is limited to the software version mentioned in this manual In this context only HEW is discussed for other software please refer to respective user manual Flash programming is performed in the HEW under the following modes Boot mode the writing or erasing is performed in batches User program mode the range of writing or erasing can be defined independently for each program block 8 1 1 Boot Mode Boot Mode is necessary under the following operation Upgrade or Recovery of monitor software Stand alone flash operation of user program Hardware jumpers are required to be set accordingly to trigger MCU to enter boot mode For jumper settings please refer to section 2 5 2 Boot Mode Selection Jumpers The sequence to trigger MCU into boot mode is described below Short JP9 1 3 and short JP10 3 5 default Power on the CPU Board Press RST SW to put MCU in the boot mode The boot program then start to transfers the write control program received from the host machine to the MCU internal ram When the write control program has been received the entire internal flash memory area is erased 58 Renesas System Solutions Asia Pte Ltd tENESAS After entire flash memory has been erased the execution transferred from the boot program to
51. ATION 0 30 tii SOURCE u k E eee 31 FIGURE 4 12 DISASSEMBLY 32 MA TE 33 PGR AR GIG 33 l5 SEITIVIENIDRY 34 FIGURE 4 16 INPUTAND OUTPUT REGISTER 34 FIGURE 4 17 STATUS MEMORY WINDOW ccccccssccscccscccssccsceesccesccusscusscesscenseescseuscesscesceusseusseusseuscss 35 FIGURE 4 18 STATUS PLATFORM WINDOW 36 FIGURE 4 19 STATUS EVENTS WINDOW ccccscccsscsscessccssccesccesscesccusscusscesscesscesscenscesscesscensseusseesseesses 36 2 20 VEN 37 37 MER E uio m 38 FIGURE 22 LOCAT RR _____ ______ 39 TOOL 39 FIGURE 25 VIEW GD u uuu Rm 40 l i SPA RA uuu 41 FIGURE 4 27 MEMORY FUNCTIONS 42 Renesas System Solutions Asia Pte Ltd FIGURE 4 28 FIGURE 4 29 FIGURE 4 30 FIGURE 5 1 FIGURE 7 1 FIGURE 8 1 FIGURE 8 2 FIGURE 9 1 FIGURE 9 2 FIGURE 9 3 FIGURE 9 4 FIGURE 9 5 FIGURE 9 6 FIGURE 9 7 FIGURE 9 8 FIGURE 9 9 FIGURE 9 10 FIGURE 9 11 FIGURE 9 12 FIGURE 9 13 FIGU
52. Name OSC1 1 2 AVCC GND 3 4 AVSS X1 5 6 UVCC GND 7 8 GND P11 9 10 P10 P13 11 12 P12 P15 13 14 P14 P17 15 16 P16 NC 17 18 NC NC 19 20 NC NC 21 22 NC NC 23 24 NC P31 TMOFL 25 26 P30 P33 27 28 P32 TMOFH P35 29 30 P34 P37 AEVL 31 32 P36 AEVH RES_N 33 34 GND IRQAEC 35 36 NC P81 SEG26 37 38 P80 SEG25 P83 SEG28 39 40 P82 SEG27 P85 SEG30 41 42 P84 SEG29 P87 SEG32 43 44 P86 SEG31 P91 PWM2 45 46 P90 PWM1 P93 47 48 P92 P95 49 50 P94 NC 51 92 NC PA1 COM2 53 54 PA0 COM1 PA3 COM4 55 56 PA2 COM3 NC 57 58 NC NC 59 60 87 Renesas System Solutions Asia Pte Ltd 24 NE SAS Signal Name CON2 Signal Name GND 1 2 GND V1 3 4 NC V3 5 6 V2 GND 7 8 UVCC P41 RXD32 9 10 P40 SCK32 11 12 P42 TXD32 P51 SEG2 13 14 P50 SEGI P53 SEG4 15 16 P52 SEG3 P55 SEG6 17 18 54 5 5 57 5 19 20 P56 SEG7 P61 SEG10 21 22 P60 SEG9 P63 SEG12 23 24 P62 SEG11 P65 SEG14 25 26 P64 SEG13 P67 SEG16 27 28 66 5 15 P71 SEG18 29 30 P70 SEG17 P73 SEG20 31 32 P72 SEG19 P75 SEG22 33 34 P74 SEG21 P77 SEG24 35 36 P76 SEG23 NC 37 38 NC 1 1 39 40 PBO ANO PB3 AN3 41 42 PB2 AN2 PB5 43 44 PB4 PB7 45 46 PB6 NC 47 48 NC NC 49 50 NC NC 51 52 53 54 55 56 57 58 GND 59 60 GND 88 Renesas System Solutions Asia Pte Ltd AppendixE CPUBD 38024F Schematic Drawings J2 HEADER 3 Micon Block gt Pel R TP4 1 C2 Co p f eo lt lt lt oo
53. RE 9 14 FIGURE 9 15 FIGURE 9 16 FIGURE 9 17 FIGURE 9 18 FIGURE 9 19 FIGURE 9 20 FIGURE 9 21 FIGURE 9 22 TABLE 2 1 TABLE 2 2 TABLE 2 3 TABLE 2 4 TABLE 2 5 TABLE 2 6 TABLE 4 1 43 STEP PRO ee S 45 9 46 FIMING DIA RAM OF HEW Em 48 MODE TRANSITION 55 OVERVIEW OF BOOT MODE uuu u u qud 59 OVERVIEW OF USER PROGRAM 1 0 60 DEBUG SETTINGS WITH LOAD OBJECT FILE DIALOGUE 65 CONFIGURE LOAD OBJECT FILE DIALOGUE 65 DOWNLOAD THE SELECTED OBJECT FILE 66 SOURCE WINDOW RESETPRG C 67 SOURCE WINDOW SOQ TUT u een Co vut esame eee qst dU 68 SEFIING BREAKPOINT 69 xu 70 SYSTEM STATUS WINDOW 71 BEET TORII ODIO 72 POPUP IN BREAK POINTS WINDOW 12 CPU 73 CHANGING REGISTER VALUE
54. SECTION 4 PERFORMING EMULATION 21 4 1 HIGH PERFORMANCE EMBEDDED 0 22 0 2 00 6 se sese tese eser 21 4 2 COMPILER CONFIGURATION amp DEBUGGER 5 55 2 2 23 Ax DEBUG 25 4 4 CONNECTING amp DISCONNECTING WITH THE EMULATOR 25 26 4 5 1 26 4 5 2 72708 971 17 29 VIENI Or PPO ORAM C 31 4 1 31 4 6 2 K 32 427 MCU RELATED INFORMATION Fue niue pa do eu ted 33 4 7 1 F 5 MH ________ HT 33 4 7 2 ____ ____ 34 Renesas System Solutions Asia Pte Ltd 4 7 3 34 4 7 4 gt ____ __ ___6_6_6 6_6_6_6_ __ _ 35 4 7 5 Break 40 4 7 6 41 4 3 MCU MEMORY MANIPULATION 42 49 EX e OUO EOS 43 4 9 1 sau A 43 4 9 2 Go Reset Go Goto Cursor Set PC to Cursor 44 4 9 3 DD COT 45 4 10 C SOURCE LE
55. To our customers Old Company Name in Catalogs and Other Documents On April 17 2010 NEC Electronics Corporation merged with Renesas Technology Corporation and Renesas Electronics Corporation took over all the business of both companies Therefore although the old company name remains in this document it is a valid Renesas Electronics document We appreciate your understanding Renesas Electronics website http www renesas com April 1 2010 Renesas Electronics Corporation Issued by Renesas Electronics Corporation http www renesas com Send any inquiries to http www renesas com inquiry 24 NE S AS 10 11 12 All information included in this document is current as of the date this document is issued Such information however is subject to change without any prior notice Before purchasing or using any Renesas Electronics products listed herein please confirm the latest product information with a Renesas Electronics sales office Also please pay regular and careful attention to additional and different information to be disclosed by Renesas Electronics such as that disclosed through our website Renesas Electronics does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of Renesas Electronics products or technical information described in this document No license express implied or otherwise is gran
56. VEL DEBUGGING E aE qhu 47 SECTION 5 USAGE PRECAUTION S 48 5 1 CORRUPTION OF MONITOR SOFTWARE 2 1 2 2 48 s mmm 48 5 3 48 5 4 49 5 5 49 5 6 49 5 7 ER DOWN ORT 50 50 235 INIDI II X u a 50 5 10 III CONS AD U x 50 SECTION 6 HARDWARE 51 6 1 8 38024 MICRO CONTROLLER 51 02 POWER BIP 51 05 EUMD 51 du I TI 51 6 5 SERIAL COMMUNICATION BLOCK VIA 5 52 S K NL 52 aaa 52 65 BOOT 32 PIOVE INIER ACE 52 6 10 EXI FRNAL USER INTERFACE u uuu l beste 53 SECTION 7 MONITOR SOFTWAERE 54 7 1 INTRODUCTION TO MONITOR SOFTWARE 0 0 00 0 60 0000 ee ee 54 72
57. abnormal store condition incorrect use accidental misuse abuse neglect corruption misapplication addition or modification or by the use with other hardware or software as the case may be with which the product is incompatible No warranty of fitness for a particular purpose is offered The user assumes the entire risk of using the product Any liability of Renesas is limited exclusively to the replacement of defective materials or workmanship DISCLAIMER RENESAS MAKES NO WARRANTIES EITHER EXPRESS OR IMPLED ORAL OR WRITTEN EXCEPT AS PROVIDED HEREIN INCLUDING WITHOUT LIMITATION THEREOF WARRANTIES AS TO MARKETABILITY MECRCHANTABILITY FITNESS FOR ANY PARTICULAR PURPOSE OR USE OR AGAINST INFRINGEMENT OF ANY PATENT IN NO EVENT SHALL RENESAS BE LIABLE FOR ANY DIRECT INCIDENTAL CONSEQUENTIAL DAMAGES OF ANY NATURE OR LOSSES OR EXPENSES RESULTING FROM ANY DEFECTIVE EMULATOR PRODUCT THE USE OF ANY EMULATOR PRODUCT OR ITS DOCUMENTATION EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES EXCEPT AS EXPRESSLY STATED OTHERWISE IN THIS WARRANTY THIS EMULATOR PRODUCT IS SOLD AS IS AND YOU MUST ASSUME ALL RISK FOR THE USE AND RESULTS OBTAINED FROM THE EMULATOR PRODUCT Renesas System Solutions Asia Pte Ltd 111 tENESAS State Law Some states do not allow the exclusion or limitation of implied warranty or liability for incidental or consequential damages so the above limitation or exclusion may not apply to you This wa
58. and then rework accordingly as 82 If Power supply failure measure 2 8v to 3 7v a PWR LED broken Typical number of write cycle 10 000 times Measure low resistance between with respect to the ground Renesas System Solutions Asia Pte Ltd lt N S lt AS 10 2 Running LEDs Initialisation of ports 9 register Set 0 to Port 92 Turn On LED P92 Delay Loop Set T to Port 92 Turn Off LED P92 Set O to Port 93 Turn On LED P93 Delay Loop Set T to Port 93 Turn Off LED P93 81 Renesas System Solutions Asia Pte Ltd tENESAS Appendix 8 38024 Memory Memory Map Memory Map Monitor Code H8 38024F I A I A ector Area 002 Free FLASH H 002A for User code Free FLASH 26Kbytes for User code 32Kbytes H 69FF 6 00 Monitor Code H 7FFF Do NE E H 7FFF Internal Register Internal Register Not Used LCD RAM 780 Internal for Monitor Work Area 80 Internal RAM for User Code 1 Kbytes H FF7F Internal I O Registers Not Used LCD RAM H F780 Internal RAM for FLASH Programming H FB7E Work Area 1Kbytes H FB80 Internal RAM for User code 1 Kbytes Internal I O Registers Renesas System Solutions Asia Pte Ltd Appendix tENESAS Pin Assignment for JP1 JP4 __ 8 1 3
59. d by Hitachi Project Generator Ver 2 1 WI nd OW Z 3 9 9 9 9 9 ifdef cplusplus Pomme 4 endi Source Address d Output l onnecte window Status bar 4 gt Debug Find in Files Version 7 Ready Read write 9 31 74 Figure 4 1 High Performance Embedded Workshop Window The key features of HEW Pure Debugger for CPUBD are described in the following sections Title Bar Displays name of the currently open workspace project and file Menu Bar Give you access to HEW Pure Debugger for CPUBD debugging commands for controlling CPUBD Toolbars Provides convenient buttons as shortcuts for the most frequently used menu commands The tool bar can be docked or floated It can be created modified and removed Program Window Displays the source code of the program being debugged as well as source address 21 Renesas System Solutions Asia Pte Ltd tENESAS Workspace Display the detail of current workspace and provide quick amp easy mean of navigation Output
60. e of the break This can be viewed under Break Cause of the last break in the System Status window LJ From the View menu choose CPU then Status or click the Status Window button in the toolbar Connected To 38074F Board 3001 Bun Status Ready Cause FC Break Figure 9 8 System Status Window The cause of last break line shows that the break was a User PC Break 71 Renesas System Solutions Asia Pte Ltd tENESAS 9 4 3 Reviewing the Breakpoints The list of all the breakpoints set in the program can be viewed in the Breakpoints window Choose Source Breakpoints from the Edit menu or click the Breakpoint Window button in the toolbar Break E x Enable Type Condition Action Enable BP 00000508 3001 tut c 45 Break Enable lt 0000087 3001 tut c 67 Break Enable 00000924 3001 tut c 8l Break Enable 000009406 3001 tut c 85 Break Enable PC H OO000404 3001 tut crga Break Figure 9 9 Breakpoints Window The Breakpoints window also allows user to perform the following e Define new breakpoints e Delete existing breakpoints e Disable existing breakpoints Right mouse click on a breakpoint the Breakpoint window to show the following pop up Add Edit Enable Disable Delete Delete All Eo Source lose File Glase All Files Allow Docking Hide Figure 9 10 Popup in Breakpoints
61. eader pins Figure 1 2 CPU Board Functional Blocks The boot mode circuitry is necessary to place the CPUBD into Boot mode for programming the FLASH To enter into Boot mode respective jumper headers on the CPUBD must be shorted SCI3 is used to program the board s on chip flash memory using the flash programming software built into the HEW pure debugger If the user is not using the serial port for flash programming the CPUBD or debugging this serial port is available to user 3 Renesas System Solutions Asia Pte Ltd tENESAS The HEW with pure debugger software combined with the monitor software programmed into the device provides high level debugging via SCI3 When connecting external analogue signals it is important that CPUBD is configured properly with respect to analogue voltage supply and reference There are two user LEDs on board that can be used by user for their evaluation and are driven directly by the MCU All the signals are being tracked out to four 20 way straight header connectors for user access as well as to two 60 way sockets to allow connection to a target board These I O signals are available to user if either flash programming or debugging is not used 4 Renesas System Solutions Asia Pte Ltd lt 1 3 Package ST yu The Tex Lp 5 Figure 1 3 CPUBD 38024F Package
62. eeds to read in a copy of the source program from which the object file is compiled Choose Reset CPU from the Debug menu User will be prompted for Resetprg c source file corresponding to the loaded object file if HEW could not automatically locate the required file section 0 00000400 _ 0 void PowerON Reset 7019 l 0 00000404 ccr 1 0 00000406 _IHITSCT _CALL Remove comment ABIT Remove comment errna l Remove comment 1 Remove comment _slptr NULL remove comment HardwareSetupl Remove comment 0 00000402 imazk 01 0 0000040 5 maini Y Remove comment CALL EHD 1 Remove comment 0 00000410 1 000000412 Figure 9 4 Source window Resetprg c Run the program until Address H 0000040c Set breakpoint at H 0000040c and select Reset Go see section 9 4 Single step see section 9 6 for Single Step again to Jump into 3001 tut c main program window 67 Renesas System Solutions Asia Pte Ltd int count l void sorti main 0 00000800 0 00000804 000000636 count 0 for Hidori 22 Fig 1 EFI 4 20 26 M 0 const int Dumb 1 0 00000808 0 00000810 0 00000816 0 00000820 Ox00000826 0 00000830
63. errupt is asserted the interrupt service routine will not be serviced unless Go command 15 issued Step In will execute a single instruction only For C source file a single step will execute a single C source code whereas for an assembly tile a single step will execute a single assembly instruction code Step Out executes till it has branched out of the current routine It is used to perform stepping to exit from the subroutine Instructions in the subroutine function will be executed and PC will be set to the line of code after the subroutine return instruction RTS Step Over executes a function call and any function call called by the function and halt at the next instruction Step will execute multiple Step in as specified by the user The delay enables a visual view of the code running sequence Sheps Delay seconds 2 5 seconds Step Over Calls Source Level Step Cancel Figure 4 29 Step program 45 Renesas System Solutions Asia Pte Ltd Assembly STOR Halt Program Est Source Figure 4 30 Step Mode Auto The execution mode will depend on the active window i e when step instruction is activated in a C Source window a C source level step will be invoked Source When Step instruction is executed user will see a C source level step i e a series of assembly code is run in the background Assembly When step is executed the current assembly code located at
64. eviewing the BreakpOllls wie 72 9 4 4 S a 73 9 5 EXAMINING MEMORY AND VARIABLES 74 9 5 1 _____4_ _ _______6____ _ 74 9 5 2 E 75 OG A PROGRAM u uu 77 WATCHING LOCAL 78 __ ___________ _ _ __ 79 79 SECTION 10 DEMONSTRATION PROGRAN 80 10 1 ri I C TID c _ ___ __ _______ 80 10 2 EEDS 81 SECTION 11 IROUBEE SHOOTING 82 APPENDIX A CPUBD 38024F BOARD LAYOUT 83 APPENDIX B H855024E MEMORY 85 APPENDIX PIN ASSIGNMENT FOR JP1 JP4 86 APPENDIX D PIN ASSIGNMENT FOR CONI amp CON2 87 APPENDIX E CPUBD 38024F SCHEMATIC DRAWINGS 89 APPENDIX F BPILLOF MATERIALS 91 Renesas System Solutions Asia Pte Ltd lt N S lt AS Figures amp Tables FIGURE 1 1 H8 38024F CPU BOARD CPUBD 38024F
65. following folder To install to this folder click To install to different folder click Browse and select another folder Destination Folder Browse InstallShield lt Back Cancel Figure 2 7 Select Destination Directory Screen 13 Renesas System Solutions Asia Pte Ltd CENESAS Click Next to install into the default directory C HEW3 or C Program Files Hew3 or specify an alternative directory by clicking on Browse button User may install this HEW debugger in the same directory as the previously setup HEW toolchain Make sure both are in the same version User may install the debugger into another directory and register this component into the other HEW tool administration menu Do not install a HEW toolchain over in the same directory the HEW debugger A new Toolchain can be installed if it is installed to another directory different from the toolchain directory and register either component to the respective HEW tool administration menu High performance Embedded Workshop Setup Select Components Select the components you want to install and deselect the components you nat want to install All Components 38h byte T aalchains 39024 Board Debugger Online Manuals Select All Clear All Back Cancel Installs Figure 2 8 Select Components Screen Select the components to be installed Ensure each selecti
66. for CON1 amp CON2 Appendix Schematic drawings Appendix Bill of Materials Technical Support The CPUBD is a product for evaluation purposes only We do NOT supply the same level of support as for the development tools however you may contact the sales offices for downloads and documents Related Manuals 85 H8 300 series C C Compiler Assembler Optimizing Linkage Editor User s Manual H8 38024 Series H8 38024F ZTAT Series Hardware Manual Renesas System Solutions Asia Pte Ltd vl lt N S lt AS Table of Contents SECTION 1 INTRODUCTIONN 1 E swe nes sw ss 2 1 1 1 I 2 1D AA ee est PC 2 1 1 3 JR E 2 1 1 4 M __4_ _ _ ___ ____ _ _______ 2 1 1 5 Interface With Application 1 1 6 Interface wth osse tese ete 2 IVE OTOP SOV 2 1 2 C PUBD ON COAT 3 o A 5 2 4 Hardware Components 5 7 2 2 Sol OImnIpOl Is 5 1 4 SUMMARY OF CPUBD 38024F FUNCTIONS
67. ging operation is required user is not allowed to make use of SCI3 in his her program because SCI3 is used by HEW to communicate with the CPUBD 5 9 E10T E7 Interface When interfacing with E10T E7 the following limitations have to be observed The Port 9 pin 5 is not available for use because it is dedicated to E10T E7 The Port 3 pin3 Port 3 pin 4 and Port3 pin 5 are also not available for use To use these pins additional hardware is required on the user s board When 10 E7 emulator is used the Port 9 pin 5 is designated as I O the Port 3 pin and Port 3 pin 4 pins are designated as input and the Port 3 pin 5 is designated as output L User is prohibited from accessing the address regions 7000 to H 7FFF because E10T E7 emulator uses them Access to address regions 780 to H FB7F is prohibited 5 10 Other Constraints When viewing memory content HEW user may access to memory area above the available memory area on H8 38024F MCU This is because the H8 38024F MCU has only 64K address space so the top bits of any address above 16 bits are ignored This results in address error if data is written to these wrong addresses User must be aware that they are not allowed to place the MCU into hardware standby mode as this condition is exited by reset interrupt only This would restart the monitor software and DESTROYS the current context of the user target program Sleep mode and software standb
68. gram Boot program Start Flash memory E 4 Flash memory rase entire flash memory Write control Application area program proaram Reset canceled Reset canceled Reset status Figure 8 1 Overview of Boot Mode 59 Renesas System Solutions Asia Pte Ltd Host machine Host machine Host machine Application program HEVV2 38024F CPU BD Debugger F ZTAT microcomputer F ZTAT microcomputer Write erase RAM transfer control program program Monitor program Monitor program Monitor program Figure 8 2 Overview of User Program Mode 60 Renesas System Solutions Asia Pte Ltd tENESAS Section 9 Tutorial 3001 tut The following describes a simple debugging session designed to introduce the main features of the CPUBD used in conjunction with the HEW Pure Debugger for CPUBD software The tutorial is designed to run in the CPUBD s Flash memory so that it can be used without connecting the CPUBD to any external user system User has to setup the CPUBD as stated in section 2 before the tutorial can begin 9 1 Introduction The 3001 tut is based on a simple Assembler C program located in your installed directory Tools Renesas DebugComp Platform Emulator Eob38024F 3001 tut Before reading this chapter ensure the followings would certainly ease the learning process Setup the CPUBD and verify that it is working correctly with software
69. ics products or if you have any other inquiries Note 1 Renesas Electronics as used in this document means Renesas Electronics Corporation and also includes its majority owned subsidiaries Note 2 Renesas Electronics product s means any product developed or manufactured or for Renesas Electronics 424 NE S AS Microcomputer Development Environment System D lt A gt s Renesas System Solutions Asia Pte Ltd 2004 01 www rss renesas com tENESAS CPUBD 38024F CPU Board for H8 300L Super Low Power Series Microcomputer User s Manual Published by Renesas System Solutions Asia Pte Ltd Date January 74 2004 Version 2 0 Copyright C Renesas System Solutions Asia Pte Ltd All rights reserved Trademarks a General All brand or product names used in this manual are trademarks or registered trademarks of their respective companies or organizations b Specific Microsoft MS and MS DOS is registered trademark Windows and Windows NT are trademarks of Microsoft Corporation Pentium is a registered trademark of Intel Renesas System Solutions Asia Pte Ltd tENESAS IMPORTANT INFORMATION e READ this user s manual before using this emulator product e KEEP the user s manual handy for future reference Do not attempt to use the product until you fully understand its mechanism CPUBD Throughout this document the term CPUBD shall be def
70. ifferent result of count PTI rr tt et co Type section i struct namelist 5 count 0000 1 054 int 4 4 Water Watcha Watcha A Matcha Figure 9 18 Watch Window You can double click on the symbol to the left of any symbol in the Watch window to expand it and display the individual elements in the array El section 1 struct namelist 5 m 0 057500 struct namelist ee i 1 struct namelist RH name Midori NE age H 0016 16 short idcode 00002258 Dsfc18 long m 2 Oxfele struct namelist E 3 i 2 struct namelist E 4 1 Uxfc38 struct namelist m 5 1 struct namelist count 0000 1 Usfcb4 int 4 A A S Water Watcha Matcha Figure 9 19 Displaying Individual Elements an Array 76 Renesas System Solutions Asia Pte Ltd tENESAS 9 6 Stepping Through a Program The CPUBD provides a range of options for stepping through a program Step In Step Out and Step Over executing an instruction or statement Execute up to the breakpoint from the current position by choosing Go from the Debug menu clicking the Go button in the toolbar E Issue one Step In from the Debug menu or click on the Step In button in the toolbar command to execute into
71. ined as the H8 300L Super Low Power Series Low cost CPU Board CPUBD 38024F produced only by Renesas System Solutions Asia Pte Ltd excludes all subsidiary products The user system or a host computer is not included in this definition Purpose of the Product This product is a development supporting unit for use as training and evaluation tool The product must only be used for the above purpose Improvement Policy Renesas System Solutions Asia Pte Ltd hereafter collectively referred to as Renesas pursues a policy of continuing improvement in design performance and safety of the emulator product Renesas reserves the right to change wholly or partially the specifications design user s manual and other documentation at any time without notice Target User of the Product This product should only be used by those who have carefully read and thoroughly understood the information as well as restrictions contained in the user s manual Do not attempt to use the product until you fully understand its mechanism It is highly recommended that first time users Be instructed by users that are well versed in the operation of emulator product Renesas System Solutions Asia Pte Ltd tENESAS LIMITED WARRANTY Renesas warrants its products to be manufactured in accordance with published specifications and free from defects in material and or workmanship The foregoing warranty does not cover damage caused by fair wear and tear
72. le 52 Renesas System Solutions Asia Pte Ltd tENESAS 6 10 External User Interface The external user interface makes all H8 38024F signals available to user These signals are connected to the following connectors Four 2x10 pin connector JP1 JP4 Two 2x30 pin socket connector CON1 CON2 The four 2x10 pin connectors JP1 JP4 are placed closed to the H8 38024F QFP 80A on the CPUBD The two 2x30 pin socket connector CON1 is placed to the edge of the CPUBD for ease of connection to an external system These connectors should be mounted on the solder side Both connector types use commonly available 2 54mm 0 100inch pitch male header and female socket with 0 635mm 0 025inch square posts These connectors are all connected to the H8 38024F 80 and can be used to access the pins of the chip and labeled with reference to the actual chip QFP 80A pin out In addition jumper selection must also be made see section 2 5 4 See appendix C appendix D for the pin assignment for JP1 JP4 and CON1 CON2 NOTE External interface should be powered by an independent power supply 53 Renesas System Solutions Asia Pte Ltd tENESAS Section 7 Monitor Software 7 1 Introduction to Monitor software The Monitor Software is a FLASH resident debugging program hosted on the CPUBD Monitor software may be used to download run and debug programs developed on PC The monitor software provides all the neces
73. le sessions can share the same download module and avoid unnecessary program rebuilds Users can create new configuration amp session under the Options Build Configuration and Options Debug Session pull down menu respectively Figure 4 2 Toolbar Showing the Session and Configuration At the HEW Pure Debugger environment with a toolchain a default debugger Session Debug is created to store information of Target platform Downloadable program Window positioning Registers value settings Figure 4 3 Toolbar Showing the Sessions and Configurations Available Generally the HEW organized the configuration amp session of a workspace as follows Root Directory Workspace directory Files Configuration directory Files xxx hws Debug DIR Release DIR Configuration Information amp Output abs lst Configuration Information amp Output abs lst Default Session hsf Release Session hsf amp header files 23 Renesas System Solutions Asia Pte Ltd tENESAS Example of usage User may use Debug Session to link to CPUBD amp Debug configuration setting to debug on the project output file xxx abs store in the Debug sub directory User may switch the configuration to Release and debug on the new setting e g optimization on On the other hand user may add sessions and may switch the configuration from Release to Debug so as to debug on the
74. lements an Array 78 Renesas System Solutions Asia Pte Ltd tENESAS 9 8 Saves the Session Before exiting it is good practice to save the session so that debugging work can be resumed instantly with the same configuration at the next debugging session Choose Save Session from the File menu Choose Exit from the File menu to exit from HEW Pure Debugger for CPUBD 9 9 What Next This 3001 tut has introduced the key features of the CPUBD and their use in conjunction with the HEW Pure Debugger for CPUBD By combining the debugging tools provided in the CPUBD user can perform basic debugging to trace for any hardware and software problems by identifying the conditions under which they occur 79 Renesas System Solutions Asia Pte Ltd tENESAS Section 10 Demonstration Program There are two demonstration programs provided for user to have hands on experience with the CPUBD Use the search key in the Windows OS under the installed directory to search for the keyword install directory Tools Renesas DebugComp Platform Emulator Evb38024 Sample Blinking LED and install directory Tools Renesas DebugComp Platform Emulator Evb38024 Sample Running LED You may select to change the ON OFF speed of the LEDs by changing the value in the delay routine I nitialisation of ports 9 register Set O to Port 92 amp 93 Tum On LED P92 amp LED P93 Delay Loop Set 1
75. logue box for running user target program NOTE After pressing the reset switch when jumper JP9 is the User Mode position the user target program will run in standalone mode that is no connection to is required to run user target program no debugging is available to user 28 Renesas System Solutions Asia Pte Ltd CENESAS 4 5 2 Memory Mapping Once the device and operating mode are selected the default memory mapping will be set The main objective of memory mapping is to ensure that the emulator has the correct internal memory Internal ROM RAM IO access To display the current memory mapping From the Options menu choose Emulator Memory resource or click the Open memory mapping button in the toolbar The memory mapping is shown in the following figure Type Memory Mapping 00000 On Chip Read only 08000 On Chip Guarded DFD2B On Chip Head vwrite meee OFUZC OF FSF On Chip Guarded OF 40 On Chip Read uurite OFY50 Chip Guarded Add OF SU On Chip Head vrite Reset Figure 4 9 Memory Mapping Dialogue 29 Renesas System Solutions Asia Pte Ltd tENESAS Alternatively the CPU memory map can be viewed from the status window From the View menu choose CPU then Status or click the View Status button in the toolbar Select the Memor
76. m during debugging These are 5 13 Port for communication to PC running HEW JO Port 3 Pin 4 JO Port 9 Pin 5 54 Renesas System Solutions Asia Pte Ltd tENESAS 7 4 Transition The CPUBRD operates in two modes Boot Mode and User Mode In Boot Mode user can either download the monitor program or user target program for Stand alone flash operation In User Mode monitor program is being executed User target program can be downloaded for debugging purposes in User Mode The MCU loops in the Break Mode of the monitor program while waiting for commands from HEW To execute the downloaded user target program user can either Run at current program counter Reset Go or perform Step functions Step In Step Over and Step Out This will cause it to operate in the User Target Mode To terminate the User Run state a break condition has to be asserted to bring the MCU to the Break Mode This can either be a preset condition e g PC Break Event Break or a force break condition Hit ESC key or press STOP button The MCU also returns to Break Mode automatically after completing Step functions Figure 5 1 illustrates the mode transition diagram Legend X Don t care DOWNLOAD MONITOR BREAK Monitor Program MODE x OR User Target Program II 2 i SCI Interrupt Others k d Command CMM 1 Processor
77. merely to indicate the characteristics and performance of Renesas Technology s semiconductor products Renesas assumes no responsibility for any intellectual property claims or other problems that may result from applications based on the examples described herein 2 No license is granted by implication or otherwise under any patents or other rights of any third party or Renesas 3 MEDICAL APPLICATIONS Renesas Technology s products are not authorized for use in MEDICAL APPLICATIONS without the written consent of the appropriate officer of Renesas Technology Asia Sales company Such use includes but is not limited to use in life support systems Buyers of Renesas Technology s products are requested to notify the relevant Renesas Technology Asia Sales offices when planning to use the products in MEDICAL APPLICATIONS Figures Some figures in this user s manual may show items different from your actual system Limited Anticipation of Danger Renesas cannot anticipate every possible circumstance that might involve a potential hazard The warnings in this user s manual and on the emulator product are therefore not all inclusive Therefore you must use the emulator product safely at your own risk Renesas System Solutions Asia Pte Ltd tENESAS PREFACE About this manual This manual explains how to install and setup the H8 38024F CPU board for evaluating the performance of the H8 38024F microcomputer Hereafter the H8
78. ndixF Bill of Materials Designator P N Code Part Description AA 02129 2 PCB CPU Board Ver 1 1 C10 CA 70121 6 Capacitor SMD 0805 12pF 50V 5 C9 70151 6 Capacitor SMD 0805 15pF 50V 5 CA 73101 3 Capacitor SMD 0805 10 50V 10 C6 C16 C17 CA 74101 3 Capacitor SMD 0805 100nF 50V 10 Q Q 5 G gt TI 9 c 2 2 08 08 4 2 5 5 14105 1 Capacitor GSS R 100nF 50V 7 C7 C12 C14 C15 Capacitor Ele GSS R 1uF 50V Capacitor Ele GSS R 10uF 50V Diode Zener BZV55C3V9 1 2W Header Pin 0 100 1x3 Way Gold Cc 8 JP10 KH 20153 1 Header Pin 0 100 2x3 Way Gold 3 4 1 JP4 KH 20160 1 eader Pin 0 100 2x10 Way Gold 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 _ 2 4 9 1 T 3 U Connector DC Jack 2 1 PCB Mt 1 AUK FW 1 _ 3 EE L LT UJ 9 En O cO 03 PO ackaging 7 290610359 9950150 Connector DC Jack 21mm POB M 3 Qi 08 02847 1 Transistor BC8478 4 R3 66102 0 Resistor SMD 1206 1 44 2 100 ______ 50150
79. on is selected in turn to confirm the correct directory it is installing into If user chooses Next the following dialogue box will confirm each installation directory you selected Note Always ensure that all components are installed in the same required directory 14 Renesas System Solutions Asia Pte Ltd High performance Embedded Workshop Setup Start Copying Files Review settings before copying Setup has enough information to start copying the program files IF you want review change any settings click Back If you are satisfied with the settings click to begin copying files Current Settings Component gt High performance Embedded workshop E 5Hewr3 Toolchains Renesas 36024 CPU Board Debugger 3 ools Renesas Lu lt Back Cancel Installs meld Figure 2 9 Directory Confirmation Screen Click Next to begin installation The installer then copies the HEW Pure Debugger for CPUBD files to the specified directory High prrlnirmanrr Frobedeire Workshop HS Tiny sLP Series C C Compiler Package with 380241 CPU Board Debueper Installer Coping HEW Program Fiet E Weck TCL disini Figure 2 10 Installing Screen The installation will complete with the Completion screen 15 Renesas System Solutions Asia Pte Ltd High performance Embedded Workshop Setup InstallShield Wi
80. orkshop Setup License Agreement Please read the following license agreement carefully Press the PAGE DOWN key to see the rest of the agreement IF you use the enclosed software product and any related software products hereafter referred ta as before exporting ar taking such PRODUCT to other counties states must comply with applicable export control laws and regulations of Japan and other counties with jurisdiction and the applicable states and provinces within Japan and such other countries 2 Please be advised that Renesas Technology Corp neither warrants nor grants licenses of any rights to the patents copyrights vau accept the terms of the preceding License Agreement If you select the setup will clase To install HB SLF Series compiler Package with 38024F CPU Board Debugger vou must accept this agreement InstallShield lt Back Figure 2 6 Update Information Readme Dialogue Box The following dialogue box enables the selection of directory in which user can install the HEW Pure Debugger for CPUBD Ensure each selection is selected in turn to confirm the correct directory it is installing into High performance Embedded Workshop Setup Choose Destination Location Select folder where setup will install files Setup will install LP Senes C C Compiler Package with 38024F CPU Board Debugger in the
81. per selection between the system power supply or from a target system 6 3 Clock Circuitry The clock circuitry comprises of a quartz crystal of 9 8304MHz system clock oscillator and a system clock divider The system clock divider halved the input clock from the quartz crystal via OSC1 amp OSC2 A sub clock is also provided by a quartz crystal of 32 768KHz on the CPUBD 6 4 Reset Circuitry The reset circuitry comprises of RC circuit and a push button 51 also known as the RST SW During power on the RC circuit asserts a reset signal to MCU to reset the MCU If the RST SW S1 is pressed a reset signal of approximately 20msec duration is generated to allow proper reset to be performed 51 Renesas System Solutions Asia Pte Ltd tENESAS 6 5 Serial Communication Block via SCI3 The CPUBD supports a three wire serial channel using the on chip serial communication channel SCI3 on the H8 38024F SCI3 is used both to flash the device using a flash programming software and to connect to HEW If neither flashing nor debugging with HEW is required then the serial channel is available to user The SCI3 port provides transmit and receive signals to the 53232 transceiver device on the board The transmit and receive signals from the transceiver device is then connected to the 9 pin D type connector P1 on the CPUBD The RS3232 transceiver device translates the 5232 signals to logic levels and vice versa 6 6 FLASH ROM amp RAM
82. rranty gives you specific legal rights and you may have other rights which may varies from state to state The Warranty is Void in the Following Cases Renesas shall have no liability or legal responsibility for any problems caused by misuse abuse misapplication neglect improper handling installation repair or modifications of the emulator product without Renesas s prior written consent or any problems caused by the user system Restrictions 1 Earthing applies only to manual for Renesas hardware products This hardware is designed for use with equipment that is fully earthed Ensure that all equipments used are appropriately earthed Failure to do so could lead to danger for the operator or damaged to equipments 2 Electrostatic Discharge Precautions applies only to manuals for Renesas hardware products This hardware contains devices that are sensitive to electrostatic discharge Ensure appropriate precautions are observed during handling and accessing connections Failure to do so could result in damage to the equipment All Right Reserved This user s manual and emulator product are copyrighted and all rights are reserved by Renesas No part of this user s manual all or part any be reproduced or duplicated in any form in hardcopy or machine readable form by any means available without Renesas s prior written consent Other Important Things to Keep in Mind 1 Circuitry and other examples described herein are meant
83. rtain use conditions Further Renesas Electronics products are not subject to radiation resistance design Please be sure to implement safety measures to guard them against the possibility of physical injury and injury or damage caused by fire in the event of the failure of a Renesas Electronics product such as safety design for hardware and software including but not limited to redundancy fire control and malfunction prevention appropriate treatment for aging degradation or any other appropriate measures Because the evaluation of microcomputer software alone is very difficult please evaluate the safety of the final products or system manufactured by you Please contact a Renesas Electronics sales office for details as to environmental matters such as the environmental compatibility of each Renesas Electronics product Please use Renesas Electronics products in compliance with all applicable laws and regulations that regulate the inclusion or use of controlled substances including without limitation the EU RoHS Directive Renesas Electronics assumes no liability for damages or losses occurring as a result of your noncompliance with applicable laws and regulations This document may not be reproduced or duplicated in any form in whole or in part without prior written consent of Renesas Electronics Please contact a Renesas Electronics sales office if you have any questions regarding the information contained in this document or Renesas Electron
84. sary control and communications to operate under the HEW This allows users to perform high level C debugging on the CPUBD Using the powerful debugging features of HEW user may explore features of the H8 38024F micro controller and the CPUBD by directly running sample programs The CPUBD comprises of limited RAM and is also a single chip micro controller To debug the user program both the user code and the monitor software must be programmed into the FLASH ROM The monitor software is built separately from the user program into S record format Without the monitor software flashed into the FLASH ROM of the micro controller no debug can be performed with the HEW software 7 2 Program Development The tutorial program which accompanied the CPUBD contain examples you may use as a basic reference code to explore and evaluate the architecture of the H8 38024F micro controller When you install the High Performance Embedded Workshop HEW with free Tiny SLP tool chain user obtain faster turn around time for a complete design cycle from Code Entry gt Compile gt Linkage gt Download S record file to MCU gt Execute User Program gt Debug User Program within an integrated environment HEW with 38024F pure debugger 7 3 Monitor software Requirements The monitor software makes use of the following peripheral function and input output pins of H8 38024F micro controller which cannot be used by user progra
85. supported functions are fill refresh Memory Data display format can be in Byte x1 Word x2 Long x4 Double x8 Memory value display format can be in ANSI character unsigned char signed char File Edit View Project Options Build Debug Memory Tools Window Help Search Fill Test Refresh Overlay ag 0999080 Figure 4 27 Memory Functions 42 Renesas System Solutions Asia Pte Ltd tENESAS 4 9 Execution of MCU Code The MCU executes the user code either in RUN or STEP modes Edit View Project Options Build Debug Memory Tools Window Help Sf Reset CPU Go F5 Reset Go Shift F5 bo I Set PC Cursor Run Step In Fil P Step Over F10 Step Gut Shift F11 Step Step Mode IM Auto Assembly a Halt Program Est SOuUrce Initialize M Disconnect Download Modules k Unload Modules d Foe oon ee aaa R GGG UN CA UU M G4 GO UM MG GN UN GA A NO CE NU S 4 UN UU M GN ZG SN UN SUUS HU ESO UNS S M SN SG UN G4 SUO NH EB UN US G E NOE E G4 S UH UNDE SN S
86. t i nnnnnndz listli list Figure 4 24 Tooltip 39 Renesas System Solutions Asia Pte Ltd 4 7 5 Break Functions Various breakpoints setting are discussed as follows File Edit view Project Options Build Debug Memory Tools Window Help Command Line TCL Toolkit Ctrl ShiFt L ji workspace Px Output Disassembly CPU 4 Breakpoints ShiFE Ctr B Stack Trace Figure 4 25 View Code Breaks are events used to intercept the normal program execution when a specific condition is matched There are two types of break in the CPUBD hardware and software break For Hardware Event break the preset break condition will cause the break event to occur after an instruction is executed For Software PC break the break condition causes the break event to occur before the break condition A break occurs at the program address specified by PC Break window The instruction at this address is replaced with a system instruction before the execution of code If a PC breakpoint is detected the emulation stops at the specified address before executing the subsequent PC Break Software Break instruction There are 3 scenarios when a hardware break occurs User Break Pressing the ESC key of the host PC Hardware Break Pressing STOP button of HEW Pressing reset switch of CPUBD Table 4 1 Types of Breaks Encountered During Emulation 40 Renesas System Solu
87. tab display the available memory setting for the selected target device amp mode the address range where the User Target Program is loaded Memory Address Range amp 00000000 00007 On Chip Read only 00008000 0000 01 On Chip Guarded OOOOFOZ0 OO00F0ZB On Chip Read write 000 0 0000 On Chip Guarded OOOOF T40 OO00F74F On Chip Read write 000 50 0000 On Chip Guarded 000 80 000 On Chip Read write 00 000 On Chip Read write Name Memory Loaded Area Debug 3001 tut abs 00000000 00000001 tibebug3001 tur abs 00000008 00000013 tiDbebugi3001 tut abs 00000016 00000021 Debug 3001 tut abs 00000024 00000029 Debug 3001 000003400 00000431 ti Debug 3001 abs 00000800 H DODCEF A Memory Events an GU BUDE CO
88. te Ltd tENESAS 45 Emulator Setting The emulator setting which consists of the system configuration amp memory mapping has to done before any emulation File Edit View Project Options Build Debug Memory Tools Window Help Build Phases Build Configurations Debug Sessions Debug Settings Radix k th system Memory Resource Figure 4 4 Option Emulator 4 5 1 Configure Platform The configure platform enables the user to set their target device and mode at startup To setup the system configuration From the Options menu choose Emulator System or click on the following icon on the Toolbar The following Configure Platform dialogue will appear Configure Platform x CPU Device 8 38024 Mode 32Kbyte ROM 1024byte RAM Clock 9 8304 2 Control Standalone Flash Driver Seral Driver Figure 4 5 Target Configuration Dialogue Box The user has the option of using standalone flashing by enabling the Standalone Flash in the Control option 26 Renesas System Solutions Asia Pte Ltd tENESAS 4 5 1 1 Standalone Flash Standalone Flashing downloads the user target program directly into the memory Monitor program would not reside in the memory and hence no debugging is available if this option is used This option should only be used when the user has finalized his her user target program and
89. ted hereby under any patents copyrights or other intellectual property rights of Renesas Electronics or others You should not alter modify copy or otherwise misappropriate any Renesas Electronics product whether in whole or in part Descriptions of circuits software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples You are fully responsible for the incorporation of these circuits software and information in the design of your equipment Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits software or information When exporting the products or technology described in this document you should comply with the applicable export control laws and regulations and follow the procedures required by such laws and regulations You should not use Renesas Electronics products or the technology described in this document for any purpose relating to military applications or use by the military including but not limited to the development of weapons of mass destruction Renesas Electronics products and technology may not be used for or incorporated into any products or systems whose manufacture use or sale is prohibited under any applicable domestic or foreign laws or regulations Renesas Electronics has used reasonable care in preparing the information included in this document but
90. that address values have appeared in the source address column of the source file NOTE When a break condition occurred during a running program HEW will open up the source code or disassembly window 1 If the source code information is not available the disassembly window will be opened 2 If the downloaded project is a Elf Dwarf2 based file and the project has been moved from its original path the source file may not be automatically found In this case HEW will open a source file browser dialogue box to allow user to manually locate the file mairt 0 00000800 0 00000804 count 0 00000836 tor i H 00000606 sortisectionl 000000610 countt 000000616 sortisectionl AGE 000008 20 countt 000000626 sortisectionl 000000630 count 0 00000838 void sort list struct namelist list short key 00000842 short 1 1 long min char name struct namelizst worklist Figure 4 11 Source Level Information available Corresponding address for source file gt PC location Bookmark Breakpoint 31 Renesas System Solutions Asia Pte Ltd CENESAS 4 6 2 Disassembly level User can open the disassembly window Choose Disassembly from the View Menu or right click on the source window and select Goto Disassembly Disassembly Ioj x main 305FC54 H FC54 R6 00000804 1900 SUB W F 00000606
91. tilizes Serial Communication Interface 3 5 232 DB 9F socket and RS 232 transceiver chip Supports communication at a baud rate of 38 400bps non configurable during debugging 1 1 3 Power Input Accept dual DC power supply at 5 0 volt 9 0 volt only Ripple Rejection ratio more then 60dbm 1 1 4 Memory If the CPUBD is to be used with debugger a section in the memory area is reserved for monitor software See Appendix B for memory map diagrams 1 15 Interface with Application Board tis designed to interface with any application board via two 30x2pin connector sockets It can be interfaced with H8 3800 application board APPBD 3800 for immediate evaluation For information about H8 3800 application board APPBD 3800 please contact the sales office 1 1 6 Interface with E10T E7 emulator Supports E10T and E7 emulator 1 1 7 Monitor software A FLASH resident debugging monitor software hosted on the CPUBD for performing debugging operations 2 Renesas System Solutions Asia Pte Ltd tENESAS 1 2 CPUBD Functional Blocks The CPUBD comprises of a H8 38024F microcomputer serial port and boot mode control and user interface _ UART Interface FLASH Control Power ON Straight Header Test points Ports except 47 P34 P95 Interface Connector to External Board NOTE 1 All signals from MCU are brought out to 2x60 ways straight h
92. tions Asia Pte tENESAS 4 7 6 Stack Trace The Stack Trace window can be selected if only debug information has been supplied Stack Trace window shows the function call history i822222222222222222222212222422222222222423242224224224221724424222224224223234242222242222412442422422422422423424222422422224122421222224224324234242224224222241224342142422224322342423324224222241242244242242243223424233422422224212422442422224 32222424232422422224212422442422224 322324224224223224212242324242224224 3232 2423422422424424432 3242424224444 4442 4 242 422 4842 94 222 2 42 222 2 22 2 z 4 4 0 StackTrace Kind Hame Value prt struct namelizt zhort 1 0 0 E list 1 fstruct namelist E 0000 R1 Y hort ib 1 0005 1 R4 short L 1 L L min 0 name 000 R2 ichar L worklist f xff 2a b istruct namelist F i 0 0810 Figure 4 26 Stack Trace The following items can be displayed Kind Indicate the symbol type F Function P Function parameter L Local variable Name Indicate the symbol name Value Indicate the value address and symbol type At default the function parameter and local variable are not displayed To enable all the items right click in the Stack Trace window and select View Setting 41 Renesas System Solutions Asia Pte tENESAS 4 8 memory manipulation General
93. to Port 92 amp 93 Turn Off LED P92 amp LED P93 10 1 Blinking LEDs 80 Renesas System Solutions Asia Pte Ltd 10 2 Running LEDs I nitialisation of ports 9 register Set 0 to Port 92 Turn On LED P92 Delay Loop Set T to Port 92 Turn Off LED P92 Set O to Port 93 Turn On LED P93 Delay Loop Set T to Port 93 Turn Off LED P93 81 Renesas System Solutions Asia Pte Ltd Section 11 Trouble Shooting tENESAS Common Failures Actions Remarks 1 Wrong Settings of Q Check the manual and set Jumpers and Switches them accordingly 2 Power LED off 3 Unable to detect CPUBD in USER MODE 4 Unable detect CPUBD in BOOT MODE 5 Flashing failure 6 Current Current draws than 0 05 Memory Overdrawn more Q Check DC input voltage 5 0V 9 0V Check voltage across zener diode D2 3 9v Check PWR LED D1 Check JP9 3 5 short Check J2 2 3 short No monitor program at Flash Memory Check other software using communication port Serial cable connects to COMM 1 4 Check U2 pin 12 for serial data Check 2 9 8304 2 for clock oscillation Check JP9 1 3 short Check J2 2 3 short Check other software using communication port Serial cable connects to COMM 1 4 Check U2 pin 12 for serial data Check Y2 9 8304M HZ for clock oscillation lime to change a new IC U1 H8 38024F Identify short traces
94. training and MCU performance evaluation tool for the H8 300L Super Low Power family series of microcomputers It is also implemented with flash programming feature for the H8 38024 F ZTAT microcomputer It contains a QFP 80A package H8 38024F microcomputer on the board The H8 38024F CPU board adopts the common HEW that also contains a pure debugger as the user interface The diagram below shows the H8 38024F CPU Board Us 4g 1 2 1 L pk h gr 4 T ET 11 AE Med E mo f 3 CAR E 50 Mie Aa m ed us ack le Jolie 42 9 1 im Es zi Figure 1 1 8 38024 CPU Board CPUBD 38024F 1 Renesas System Solutions Asia Pte Ltd tENESAS 1 1 Specification 1 1 1 General 8 38024 microcomputer using HD64F38024H FP 80A device 32Kbytes of FLASH memory Monitor software uses approx 6Kbytes 1Kbytes of on chip RAM Monitor software work area uses 1 Kbytes Two user LED indicators One push button for reset control One boot mode LED indicator One Power LED indicator Input Output signals are being pulled out for user connection CON1 amp CON2 1 1 2 Serial Communication U
95. wants to run it on the CPU Board Configure Platform E CPU Device H8 38024 Mode 32Kbyte ROM 1024byte Clock 3 8304MHz Control Standalone Flash Diver Serial Driver Change Cancel Figure 4 6 Enabling Standalone Flash option Click on the check box and click OK to enable standalone flashing When user downloads the selected object file the following dialogue box would appear prompting the user to switch to Boot Mode to download the user target program Download User Target Program in BOOT MODE Do the following steps 1 Set Jumper ta BOOT MODE position 2 Press 51 RST Sw Once 3 ies Press Close for other Downloads m 2 Figure 4 7 Dialogue box for downloading user target program After downloading the user target program the dialogue box would prompt the user to switch to User Program Mode to run the user target program The user can either click YES to exit HEW or click NO to re download the user target program or Flash monitor Program 27 Renesas System Solutions Asia Pte User Target Program Download Completed the following steps 1 Set Jumper JPS to USER MODE position Press 81 AST SW once to run Standalone Click on res to quit and I me IPS Click on No other options a 47 4 8007 2 yB 24 Figure 4 8 Dia
96. y mode may be entered but may not be exited by the use of the reset interrupt for the same reason mentioned When SLEEP instruction is executed the MCU is unable to stay in SLEEP mode will send data via SCI3 and wake up the MCU 50 Renesas System Solutions Asia Pte Ltd tENESAS Section 6 Hardware The CPUBD comprises of the following blocks 18 38024F Micro controller Power Supply circuitry Clock circuitry Reset circuitry Serial Communication block via SCI3 LEDs Boot Mode Enable E10T E7 Emulator Interface External User Interface 6 1 H8 38024F Micro controller The H8 38024F series has a system on chip architecture that includes peripheral functions and can be used as embedded microcomputer in application systems Its on chip ROM offers flexibility as it can be reprogrammed in no time to cope with all situations from early stages of mass production to full scale mass production Users reconfiguring processor I O ports are cautioned that pull up resistors may be needed for proper operation in some configurations 6 2 Power Supply Circuitry The power supply circuitry supplies the DC power to the CPUBD from an external power supply This is also known as the system DC power The CPUBD either accepts 5V DC or 9V DC voltage This power input is further stepped down to 3 3V DC that is acceptable by the MCU In addition user can select the source of power supply to the MCU via jum
97. y tab in Status window to show the Memory Mapping configured PTO et eo Status CPU Memory Address Range 5 Type 0 0000000 0000 On Chip Read only 00008000 0 000 01 On Chip Guarded OOOO0FOZ0 O0000F0ZE On Chip Read write OOOO0FOZC OO000F73F On Chip Guarded On Chip Read write On Chip Guarded On Chip Read write OOOOFFSO OO00FFFF On Chip Read write Program Memory Loaded Area 4 4 gt Memory Platform Events Figure 4 10 Target Memory Configuration Dialogue NOTE CPUBD Memory Map is for display and information purpose user cannot configure it The following explains the target memory configuration dialogue CPU Memory Map Display the memory configuration of the specific target device selected Program Name Display the Downloaded Module s name User Target Program and the memory space that it has occupied 30 Renesas System Solutions Asia Pte Ltd tENESAS 4 6 Viewing of Program Programs can be viewed as Source Code level C or assembly language Disassembly level assembly language 4 6 1 Source Code level Users may double click on the file located in the workspace window to open and view the source code However this is merely in editor point of view Users have to download the code to the emulator Once the code is downloaded user can observe
98. y the monitor code 5 2 Interrupt Users who want to perform debugging operation on the CPUBD must enable the interrupt The example provided below would result in a loss of communication between HEW and CPUBD Referring to the following code after single stepping the line set_imask_ccr 1 I bit is set to 1 disabling interrupts Therefore if another single step is performed SCI3 interrupt would not occur and HEW will timeout and a dialogue box Error in communication will be displayed as follow Set imask ccr 1 light LED 5 3 Timing Issues Execution time to complete an interrupt subroutine must not be longer than 3sec else HEW will timeout and a dialogue box Error in communication will be displayed If the frequency of interrupts generated is less than 300msec MCU will not be able to respond to the SCI3 interrupt sent by HEW This will also cause HEW to timeout The following shows the timing diagram when using HEW gt gt lt Available to User gt lt gt Available to User gt Monitor Monitor Figure 5 1 Timing diagram of HEW HEW 48 Renesas System Solutions Asia Pte Ltd tENESAS 5 4 Watchdog timer Watchdog timer must not be used to generate an internal reset when performing debugging operation This is because when counter in watchdog timer overflows a signal is generated resetting the MCU At this instance if HEW performs a debug
99. zard Complete Setup has finished instalingH S Tiny Senes C C Compiler Package with S8024F CPU Board Debugger on your camputer In using a Compiler Assembler and an Optimization Linkage Editar DOS prompt please execute the batch 5 to setup lt Back Figure 2 11 Completion Screen At the end of the installation icons for HEW Pure Debugger CPUBD will be created into the Start Menu and ready for execution 16 Renesas System Solutions Asia Pte Ltd tENESAS Section 3 Setup of HEW Pure Debugger for CPU Board In this section the focus is to highlight the basic steps for any initial setup for a project On subsequent HEW activation user will just be required to select the desired workspace session and the setup will be done automatically Ensure that the CPUBD is linked up i e the serial cable is linked between the CPUBD and PC and the CPUBD is powered up 3 1 Running HEW Pure Debugger for CPU Board Execute HEW Pure Debugger CPUBD by selecting HEW Programs Accessories k ActiveState ActiveTcl 3 4 1 0 23 Hitachi Settings Microsoft Excel Renesas High performance Embedded Workshop F Evb38024 User Manual Y Evb38024F Read Me High performance Embedded Workshop Help F High performance Embedded Workshop Read der High performance Embedded workshop Manual oration Figure

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