NANO-5050 User`s Manual
Contents
1. GND GND PWR BIN J21 SM BUS PIN No Signal Description SM CLK SM DATA NANO 5050 User s Manual 2 8 Hardware Gonfiguration 22 Coin Battery PIN No Signal Description 23 Panel back light A 2 CA CT 5 BACKLIGH ENVENZ J24 PCIe x 1 Signal Description Signal Description SMBCLK 12V 12V 12V 12V 12V GND GND DF_PCIE_TXP2 DE PCIE CLKP DE PCIE TXN2 DE PCIE CLKN2 DE PCIE RXP2 GND DE PCIE RXN2 t3 3V t3 3V CLKREQ2 3 3V 3 3V_AUX RST PCIE_WAKE GND SMBDATA DF PCIE CLKPT GND DF PCIE CLKNI DF PCIE TXPT GND DF PCIE TXNI DF PCIE RXPI GND DF PCIE RXNI CLKREO1 GND 25 CF SATA PIN No Signal Description HIN No Signal Description GND D3 D4 D5 D6 D7 CSO GND O CO do OT HB OM KA ATASEL NANO 5050 User s Manual 2 9 Hardware Gonfiguration SATA TX SATA_TX GND VCC 14 GND 39 CSEL 15 SATA_RX 40 VS2H 16 SATA_RX 41 RESET 17 GND 42 IORDY 18 A2 43 DMARO 19 Al 44 DMACK 20 AO 45 DASP 21 DO 46 PDIAG 22 D1 47 D8 23 D2 48 D9 24 IOCS16 49 D10 25 CD2 50 GND JP1 Clean RTC PIN No Function JP2 Panel Power Level P3 Backlight enable signal type PIN No Process Selection High enable NANO 5050 User s2. 1st FLOPPY DRICE Disabled NANO 5050 User s Manual 4 21 BIOS Setup Information 4 6 Exit This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with or without changes Exit Saving Changes Equal to F10 save all changes of all menus then exit setup configure driver Finally resets the system automatically Exit Discarding Changes Equal to ESC never save changes than exit setup configure driver Load Setup Defaults Equal to F9 Load standard default values Discard Changes Load the original value of this boot time Not the default Setup value Save Changes Save all changes of all menus but do not reset system options NANO 5050 User s Manual 4 22 Troubleshooting Chapter 5 Troubleshooting This chapter provides a few useful tips to quickly get NANO 5050 running with success As basic hardware installation has been addressed in Chapter 2 this chapter will be focusing on system integration issues in terms of BIOS setting and OS diagnostics 5 1 Hardware Quick Installation There are two methods to connect the power of NANO 5050 which are 12V DC Jack amp 4 Pins 12V DC input It s able to be chosen either one for NANO 5050 Can be referred as the picture shows blew 4 Pin 12V DC input J13 DEA ES ri 12V DC Jack input JI NANO 5050 User s Manual 5 1 Troubleshooting Please also make sure every other neces
3. Enabled Wake System With Fixed Time Enable or disable System wake on alarm event When enabled System will wake on the hr min sec specified Choices Enabled Disabled Wake up By Ring Enable or disable Ring to wake the system Choices Enabled Disabled NANO 5050 User s Manual 4 7 BIOS Setup Information CPU Configuration Hyper threading Enabled for Windows XP and Linux OS optimized for Hyper Threading Technology and Disabled for other OS OS not optimized for Hyper Threading Technology When Disabled only one Choices Enabled Disabled Active Processor Cores Select the number of physical cores to enable in each processor package Choices 1 All Execute Disable Bit Enable Execute Disabled functionality Also known as Data Execution Prevention DEP Local x2APIC Enable Local x2APIC Some OSes do not support this Choices Enabled Disabled NANO 5050 User s Manual 4 8 BIOS Setup Information LAN Configuration UNO LAN Control LAN Control Enabled Disabled Choices Enabled Disabled Wake on LAN Enable or disable integrated LAN to wake the system Choices Enabled Disabled LAN Boot ROM Enable or disable integrated LAN Boot ROM PXE function Choices Enabled Disabled NANO 5050 User s Manual 4 9 BIOS Setup Information Chipset Configuration pio VT d Check to enable VT d function on MCH Choices Enabled Disabled Azalia Control Detection of the Az
4. OxF1 0x0F printf Read GP1 4 tmpData get_CFG OxF1 printi data OxYoX tmpData if tmpData OxFF printf PASS n else printf FAIL n printf Set GP5 8 LOW set CEG OxFI 0x00 printf Read GP1 4 tmpData get_CFG OxF1 printf data 0x X tmpData if tmpData 0x00 printf PASS n else printf FAIL n printt Set GP1 4 to OUTPUT GP5 8 to INPUT n set_CFG 0xF0 0x0F H printi Set GP1 4 to HIGH n set_CFG 0xF1 0xF0 printf Read GP5 8 tmpData get_CFG OxF1 printi data 0x X tmpData if tmpData OxFF printf PASS n else printf FAIL n H printf Set GP1 4 LOW n set_CFG 0xF1 0x00 printf Read GP5 8 tmpData get_CFG 0xF1 printi data OxYoX tmpData if tmpData 0x00 printf PASS n else printf FAIL n getchar j NANO 5050 User s Manual BIOS Setup Information Chapter 4 BIOS Setup Information NANO 5050 equipped with the Phoenix BIOS stored in SPI Flash BIOS has built in setup program that allows users to adjust the basic system configuration This type of information is stored in CMOS RAM that it is retained even if power off periods When system turns on NANO 5050 communicates with peripheral devices and checks its hardware resources referring to the configuration information stored in CMOS memory If any error occurs or CMOS parameters need to be defined the diagnostic
5. and answers to frequently asked questions will be shown on the following web site http www portwell com tw System Overvievv Chapter 1 System Overvievv 1 1 Introduction Portwell Inc a world leading innovator in the Industrial PC IPC market and a member of the Intel Communications Alliance has launched its new NANO ITX form factor based NANO 5050 for embedded system board ESB that offers a smaller footprint lower power consumption robust computing power and with longevity support The NANO 5050 is specifically designed to operate at very low power consumption and low heat so it can be a truly fanless configuration and battery operated Base on Intel System Controller Hub NM10 the NANO 5050 supports one DDR3 SODIMM socket up to 4GB system memory and comes with one SATA II one Mini PCle socket triple independent display by VGA DP and 18 24 bit LVDS dual display at the same time one gigabit Ethernet one CF SATA socket and Six USB 2 0 ports two ports are on rear IO It also built with DC 12V or ATX 12V input Base on leading Intel Atom solution NANO 5050 is a compact and low power dissipation board for Digital Signage Digital Security Surveillance DSS and Medical applications etc 1 2 Check List The NANO 5050 package should cover the following basic items One NANO 5050 NANO ITX Main Board One passive Heatsink One Installation Resources CD Title One SATA cable NN If any of these items is dama
6. 0 m I DU a LJ H CH O mgp alo Zoos Poo Uno oo O IM Doo 0000 9 pss a ooooo OO a a 290 R Th OA 00000 Ba k di OOOO oo 3 Figure 2 2 NANO 5050 Jumper and Connector Locations Bottom 2 2 Connectors I O peripheral devices are connected to the interface connectors p I2V DC adapter D Line Out o B Mir hM Display Port 770 CRIdipay A J JUB o LOU AN jl J2 JS J4 Jo J6 JZ NANO 5050 User s Manual 2 2 Hardware Gonfiguration J8 J9 J10 8 bits GPIO DI J12 J13 J14 J15 J16 J17 J18 J19 J20 J21 J22 J23 J24 J25 JP1 JP2 JP3 Pin Assignments of Connectors 1 reserve for 12V DC adapter J2 Line Out PIN No Signal Description GND 3 LimeOuR 000000 NANO 5050 User s Manual 2 3 Hardware Gonfiguration 3 Laned net gr a E AAA Lane2 8 an ans 11 GND LI Lane J5 CRT Display un UI R 000 n RED O RED a Dik 3 GREEN Li AGround 5 BLUE 6 DDCDATA 7 VSYNC a DGrud 9 HSYNC 10 DDCVCC oz NANO 5050 User s Manual 2 4 Hardware Gonfiguration J6 USB A1 5V B1 5V A2 USBDO 1N B2 USBDO 1N A3 USBDO 1P B3 USBDO 1P A4 Ground B4 Ground 7 LAN RJ45 Signal Description L1 MDIPO PIN No 6 L
7. 1_MDIN1 A MIDI 3 UMON 18 19 reserve USB 10 1 7 5 USBD 6 USD 7 GND 8 GND OS pd PN N 110 8 bits GPIO 10 mn PIN No Signal Description PIN No Signal Description GPIO0 GPIO4 GPIO1 GPIO5 1 3 7 EH 3 5 ero Jm 7 8 GPIO3 GPIO7 pen w vee NANO 5050 User s Manual 2 5 Hardware Gonfiguration 111 LPC debug Po 2 10 OOO OO HOOO 1 7 PIN No Signal Description PIN No Signal Description 6 mum 8 omak De oo 12 mue JUUL E 000 H RS 232 Mode PIN No op fe Dat Set Ready DSR Request to Send RTS 8 Clear to Send CTS Ring Indicator R 3 s wo 14 Reserve J15 Mini PCIe PIN No Signal Description PIN No Signal Description 1 2 33V 00 0000000000 Wake 3 3V 5 Reeva AB NANO 5050 User s Manual 2 6 Hardware Gonfiguration 7 are S GND 10 Leed IT KEY 25 24 3 3Vaux PET 0s GND 5 oo Je Reserved LED VVAN 43 Reserved LED LAN LED LAN Reserved GND 16 Rear Side FAN 2 Fan Speed Detecting signal J17 SATA Power NANO 5050 User s Manual 2 7 Hardware Gonfiguration 118 LVDS Panel LVDS DATA 6 LVDSDATAH2 7 LVDS DATA 8 LVDSDATAS3 END HA NC END 76 LCGHD Signal Description Signal Description WR LED LVDS DATAHO SUS LED LVDS_DATA 1 HDD_LED KRST BIN HDD LED
8. 7 outportb 0x2F LDN void set CFG unsigned char Add unsigned char Value outportb 0x2E Add outportb 0x2F Value j int main void unsigned char temp Initialze WDT function temp get_CFG 0x2D amp 0x01 set_CFG 0x2D temp change_LDN 0x08 NANO 5050 User s Manual 3 3 System Installation set CFG 0x30 0x01 set CFG OxF5 0x00 set CFG OxF7 0x00 printf Trigger WDT with 5 sec will reboot in 5 sec n printf Press Enter to disable WDT n set_CFG OxF6 0x05 getchar set CEG OxF6 0x00 printf All test complete Press Enter to EXIT getchar return 0 NANO 5050 User s Manual 3 4 System Installation 3 6 GPIO The motherboard provides 8 input output ports that can be individually configured to perform a simple basic I O function GPIO Pin Assignment The NANO 5050 provides 8 input output ports that can be individually configured to perform a simple basic I O function Users can configure each individual port to become an input or output port by programming register bit of I O Selection To invert port value the setting of Inversion Register has to be made Port values can be set to read or write through Data Register The GPIO port is located on J10 shown as follows WARNING Do not short the pin 9 and 10 of J10 WECEGPIO SPIO30 SP10 31 GPIOSZ GPIOSS SP1034 GPIOSS i PIO3G SPIO3S7 AAA DAD DPS PS J1 GR
9. ILL Ze SPIOSS GPIO Lir d ovecePIO Header5Px2 2 mm CNN SEH Co iO FIO GPIO GPIOSZ GPIOSS T 0 7 WS OS Rel 100 PAS PACISOY GPIOSS 1OOPEPACSOV GPIOSZ __100F 8PAC 50V GPIOST 100P is PACISON GPIOSO 1OOPABPACIBOV GPIDST 2 1O00PV8P4C 50Y GPIOSE 1O0PV8P4C 50Y GPIOSS IOOPBPACHO Y GPIOSd i include lt stdio h gt include lt stdlib h gt include lt conio h gt include lt dos h gt void enter_SIO NANO 5050 User s Manual 3 5 System Installation outportb 0x2E 0x87 outportb 0x2E 0x87 j void exit SIO outportb 0x2E OxAA j void change LDN unsigned char LDN outportb Ox2E 0x07 outportb Ox2F LDN j unsigned char get CFG unsigned char Add outportb 0x2E Add return inportb 0x2F j void set CFG unsigned char Add unsigned char Value d outportb Ox2E Add outportb Ox2F Value j void main void unsigned char tmpData 0x0 printf NANO 5050 GPIO test program n enter SIO Initialze GPIO function set cfg 0x2C get cfg 0x2C amp OxEO Switch to LDN9 for GPIO3 change LDN 0x09 Enable GPIO3 function set CFG 0x30 get CFG 0x30 0x02 set CFG 0xF9 0x00 set CFG OxFE 0x70 printf Set GP1 4 to INPUT GP5 8 to OUTPUT set_CFG OxFO OxFO printf Set GP5 8 HIGH n NANO 5050 User s Manual 3 6 System Installation set CEG
10. Manual 2 10 System Installation Chapter 3 System Installation This chapter provides you with instructions to set up your system The additional information is enclosed to help you set up onboard PCI device and handle Watch Dog Timer WDT and operation of GPIO in software programming 3 1 Intel O Atom Processor D2550 Passively cooled soldered down Dual Core Intel Atom processor D2550 with integrated graphics and integrated memory controller that s suitable for fanless system and low watt design 3 2 Main Memory NANO 5050 provide 1 x 204 pin SO DIMM sockets which supports 800 1066 MHz DDR3 SDRAM as main memory Non ECC Error Checking and Correcting non register functions The maximum memory size can be up to 4GB capacity Memory clock and related settings can be detected by BIOS via SPD interface Watch out the contact and lock integrity of memory module with socket it will impact on the system reliability Follow normal procedures to install memory module into memory socket Before locking make sure that all modules have been fully inserted into the card slots Note DDR3 1333 MHz and DDR3 1600 MHz memory will run at 1066 MHz 3 3 Installing Single Board Computer To install your NANO 5050 into standard chassis or proprietary environment please perform the following Step 1 Check all jumpers setting on proper position Step 2 Install memory module onto memory socket Step 3 Place NANO 5050 into the d
11. NANO 5050 NANO ITX Board User s Manual Version 1 0 Copyright Portwell Inc 2013 All rights reserved All other brand names are registered trademarks of their respective owners Preface Table of Contents Hovy to Use This Manual Chapter 1 System eu T TT ubi 1 1 EL tro GUC OM EE 1 1 dBA GS Carel od m Dr 1 1 1 PTOGUCE ee 1 1 TA gt y stem Gon UT ATION nd iaia 1 3 IA MONA D TAN MO oe ii 1 4 E RE T ra 1 5 Chapter 2 Hardware Configuration aaaannnnanaaaaazzunnnnnnnnnnunnnunnnnnnnnnnunnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnnna 2 1 2ZLJUMper EE 2 1 2 2 XCOBDOCIOES ricalca 2 2 Chapter 3 System Installation A 3 1 TRA tom TT EE EE 3 1 RAMA MEON iaia 3 1 ooInstalling oine E Board COM PET EE 3 1 Ll GRipset Component DNV Ch gjarperin ann diari de ni 3 2 9 52 tele lntesrated Grapes skr its 3 2 9 0 0 tek Gigabit Ethernet Controller gj 3 2 SEENEN 3 2 SA Clear EMOS Opera ON sozi 3 3 S EIO Tae AA AAA ra 3 3 VOGMO vezen eh dB ha n ET RE ed 3 5 Chapter 4 BIOS Setup Informallon said aida ada aus erue ce ea 4 1 ALTERNO EE 4 1 IO 4 2 Go e a 4 3 e EE 4 20 ce ee E Re PN aiar 4 21 i RI V tec a aren Tener a o 4 22 Chapter 5 Tro bleshoOlfiQg ea naive dun vanda da i 5 1 5 HarsdwareQuick InstallatlOE ze tu t kriti Kl stika 5 1 VOLO OS EE E III 5 2 Appendix A Appendix B Preface How to Use This Manual The manual describes how to configure your NANO 5050 system to meet various operating requirements It is divided into
12. alia device Choices Enabled Disabled NANO 5050 User s Manual 4 10 BIOS Setup Information NB PCle Configuration Always Enable PEG To Enable the PEG Slot Choices Enabled Disabled PEG ASPM Control ASPM Support for the PEG Device This has mp effect if PEF is not the current active device Choices Disabled Auto ASPM Los ASPM L1 ASPM LOsL1 NANO 5050 Users Manual AAA BIOS Setup Information Memory Configuration Graphic Configuration NANO 5050 User s Manual BIOS Setup Information Primary Display Select which of IGFX PEG PCI Graphics device should be Primary Display or select SG for Switchable Gfx The choice Auto IGFX PEG Boot Display Select the video Device which will be activated during POST This has no effect if external graphics present Secondary boot display selection will appear based on your selection VGA modes will be supported only on primary display Choices Auto CRT DP LVDS CRT LVDS CRT DP LVDS DP LVDS Panel Type Select LCD Panel used by internal Graphics by selecting the appropriate setup item Choices 800x600 1024x768 1280x800 1280x1024 1920x1080 Backlight Control Choices Level 1 Level 2 Level 3 Level 4 Level 5 Level 6 Level 7 SATA Configuration NANO 5050 User s Manual 4 13 BIOS Setup Information SATA Controller s Determines how SATA controller s operate Choices Enabled Disabled Launch Storage OpROM Enable or disable boot opti
13. ation Console Redirection Setting Terminal Type VT UTFS is the preferred terminal type for out of band management The next best choice is VT100 and then VT100 See above in console Redirection Settings page for more Help with Terminal Type Emulation The choice VT100 VT100 VT UTF8 ANSI Bits Per second Select serial port transmission speed The choice 9600 19200 57600 115200 NANO 5050 User s Manual 4 19 BIOS Setup Information 4 4 Security This section lets you set security passwords to control access to the system at boot time and or when entering the BIOS setup program Some systems have a single password while many newer ones now have two a supervisor and a user password Set Supervisor Password Set or Clear Supervisor Password Supervisor Hint String Press Enter to type Supervisor Hint String Min password length Set the minimum number of characters for password 1 20 Flash Controller Lock Lock all flash controllers The choice Enabled Disabled NANO 5050 User s Manual 4 20 BIOS Setup Information 4 5 Boot Use this menu to specify the priority of boot devices 1st Drive This setting allows users to set the priority of the removable devices First press Enter to enter the sub menu Then you may use the arrow keys 7 to select the desired device then press lt gt lt gt or lt PageUp gt lt PageDown gt key to move it up down in the priority list The choice
14. e DMI x ee PCIe x1 Slot mea 82583V Gi Pera NET Joe Egrial ATA Interface MiniPCIe on USB 1 2 Back Panel SATA USE 3 6 inside Realtek Mon j MIC Buttom side rm E 510 Serial Port W83627DHG P 8P339 EPI Interface SPI Flash NANO 5050 System Block Diagram NANO 5050 User s Manual 1 5 Hardware Gonfiguration Chapter 2 Hardware Configuration This chapter gives the definitions and shows the positions of jumpers headers and connector All of the configuration jumpers on NANO 5050 are in the proper position The default settings are indicated with a star sign 2 1 Jumper Setting In the following sections Short means covering a jumper cap over jumper pins Open or N C Not Connected means removing a jumper cap from jumper pins Users can refer to Figure 2 1 for the Jumper allocations 0000000000 D n os 50505 J8 B y 0008 OUTO UD SECHS 00090 rm Uls E LN ALL A CACAO ooo O OJ J16 0000000000000 T gt E EE SHOKUT JP2 Figure 2 1 NANO 5050 Jumper and Connector Locations Top NANO 5050 User s Manual 2 1 Hardware Gonfiguration O O U U G D O Pa ga Le pe Tee mk pi O0 Is DO DO P s ff P U Aem 1 sr L 7 AA N 6006000066 Fl x kel ry Oo O r 3 SC Dee G i Soe i j NJ MAL amp A LM A vm e um Jm SN JO 000 00000 oi 00000 202060 00000 oo pw k 50 i m 20
15. edicated position in the system Step 4 Attach cables to existing peripheral devices and secure it WARNING Please ensure that SBC is properly inserted and fixed by mechanism Note Please refer to section 3 3 1 to 3 3 7 to install INF VGA LAN Audio drivers NANO 5050 User s Manual 3 1 System Installation 3 3 1 Chipset Component Driver The chipset on NANO 5050 is a new chipset that a few old operating systems might not be able to recognize To overcome this compatibility issue for Windows Operating Systems such as Windows 7 please install its INF driver before any other drivers installation You can easily find the chipset component driver in NANO 5050 VGTAM CD title 3 3 2 Intell Integrated Graphics The Intel Atom TM Processor D2550 contains an integrated graphics core the Intel GMA 3650 graphics controller This combination makes NANO 5050 an excellent piece of multimedia hardware NANO 5050 supports VGA DP and also LVDS out put The VGA port supports analog displays The maximum supported resolution is 1920 x 1200 WUXGA at a 60 Hz refresh rate VGA port enabled from POST whenever monitor is connected Drivers Support Please find Intel GMA 3650 driver in NANO 5050 CD title Driver supports Windows 7 only 3 3 3 Intel Gigabit Ethernet Controller Drivers Support Please find Intel 82583V Ethernet driver in Ethernet directory of NANO 5050 CD title The drivers support Windows 7 LED Indicator NANO 5050 p
16. five chapters with each chapter addressing a basic concept and operation of Single Board Computer Chapter 1 System Overview Presents what you have in the box and give you an overview of the product specifications and basic system architecture for this series model of single board computer Chapter 2 Hardware Configuration Shows the definitions and locations of Jumpers and Connectors that you can easily configure your system Chapter 3 System Installation Describes how to properly mount the CPU main memory and Compact Flash to get a safe installation and provides a programming guide of Watch Dog Timer function Chapter 4 BIOS Setup Information Specifies the meaning of each setup parameters how to get advanced BIOS performance and update new BIOS In addition POST checkpoint list will give users some guidelines of trouble shooting Chapter 5 Troubleshooting Provides various useful tips to quickly get NANO 5050 running with success As basic hardware installation has been addressed in Chapter 3 this chapter will basically focus on system integration issues in terms of backplane setup BIOS setting and OS diagnostics The content of this manual and EC declaration document is subject to change without prior notice These changes will be incorporated in new editions of the document Portwell may make supplement or change in the products described in this document at any time Updates to this manual technical clarification
17. ged or missing please contact your vendor and keep all packing materials for future replacement and maintain 1 3 Product Specification O Main Processor On board Intel ATOM D2550 1 86GHz processor 6 Chipset Intel System Controller Hub NM10 NANO 5050 User s Manual 1 1 System Overvievv O System BIOS Phoenix uEFI BIOS 6 Main Memory One 204pin DDR3 SODIMM socket on board up to 4GB system memory Power input DC 12V input on rear I O 4pin 12V power connector on board DC 12V Jack and 4pin power connector can t be used at the same time 6 Serial Port Support one RS232 422 485 port on board connector adjust by bios e USB Interface Support six USB 2 0 Universal Serial Bus ports two on rear I O and four on board header for internal devices 6 SATA Interface Support one SATA II ports 6 CF SATA interface Support one CF SATA socket Support both CF card and CF SATA card 6 Audio Interface Mic In and Line Out Audio Jack on rear I O 6 Watch Dog Timer Support VVDT function through software programming for enable disable and interval setting General system reset 6 Display Support triple independent display by DP rear I O VGA on board connector and single channel 18 24 bit LVDS Only support dual display simultaneously 6 On board Ethernet LAN One Gigabit Ethernet 10 100 1000 Mbits sec LAN port using Intel 82583V PCI Expressx1 interface GbE Controller Support Wake on LAN function 6 Hig
18. h Drive GPIO On board programmable 8 bit Digital I O interface 6 Cooling Fans Support one 3 pin power connector for system fan System Monitoring Feature Monitor system temperature and major power sources 6 Outline Dimension L x W 120mm 4 72 x 120mm 4 72 NANO 5050 User s Manual 1 2 System Overvievv 1 4 System Configuration CPU Type Intel Atom CPU D2550 1 86GHz L2 1024K SBC BIOS Portwell Inc NANO 5050 Rev R1 00 W2 12112012 Transcend DDR3 1066 SODIMM 4G 1 hynix H5TQ2G83AFR VGA Card Onboard Intel Graphics Media Accelerator 3600 Series VGA Driver Intel Graphics Media Accelerator 3600 Series Ver 8 14 8 1075 LAN Card Onboard Intel 82583V Gigabit Network Connection LAN Driver Intel 82583V Gigabit Network Connection Ver 11 17 27 0 Chip Driver Seagate ST3160316AS 160GB Apacer AP CF001GP4CG NR 6 Power Consumption test Run Burning Test V6 0 RUN time 10 30 Minutes Full Loading Full Loading Item Power ON 10Min 30Min DC 12V 6 Operating Temperature U Storage temperature 20 85 C 6 Relative Humidity 0 95 non condensing NANO 5050 User s Manual 1 3 System Overvievv 1 4 1 Mechanical Dravving NANO 5050 User s Manual System Overvievv 1 5 System Architecture All of details operating relations are shown in NANO 5050 System Block Diagram Nano 5050 Block Diagram Display Interface Cedarview D D2550 DDR3 SODIMM LIOS Interface Buttom sid
19. ht the item and then use the lt PgUp gt lt PgDn gt or lt gt lt gt keys to select the value or number you want in each item and press lt Enter gt key to certify it Follow command keys in CMOS Setup table to change Date Time Drive type and any other setup options System Time The time format is lt Hour gt lt Minute gt lt Second gt Use or to configure system Time System Date The date format is lt Day gt lt Month gt lt Date gt lt Year gt Use or to configure system Date NANO 5050 User s Manual 4 2 BIOS Setup Information 4 3 Configuration This section allows users to configure further BIOS function Boot Configuration NANO 5050 User s Manual BIOS Setup Information NumLock Selects Power on state for NumLock Choices Off On Quick Boot Enable Disable quick boot Choices Enabled Disabled Diagnostic Splash Screen If you select Enable the diagnostic splash screen always display during boot If you select Disabled the diagnostic splash screen dose not display unless you press HOTKEY during boot The choice Enabled Disabled Diagnostic Summary Screen Display the Diagnostic summary screen during boot The choice Enabled Disabled UEFI Boot Enables the UEFI Boot The choice Enabled Disabled PCYPCIE Configuration NANO 5050 User s Manual 4 4 BIOS Setup Information PCH PCI Express Configuration DMI Link ASPM Control The c
20. on Launch Storage devices with option ROM Choices Enabled Disabled SATA Mode Determines how SATA controller s operate The choice IDE AHCI Serial ATA Port 0 1 Display the identity of the device attached USB Configuration Legacy USB Support Enable Legacy USB support AUTO option disables legacy support if no USB devices are connected DISABLE option will keep USB device available only for EFI applications Choices Enabled Disabled NANO 5050 User s Manual 4 14 BIOS Setup Information PCH USB Configuration UHCI Controller 1 3 Control each of the USB Controller 1 4 Choices Enabled Disabled CF SATA Enable CF SATA Enable Disable Choices Enabled Disabled NANO 5050 User s Manual 4 15 BIOS Setup Information SIO Configuration NANO 5050 User s Manual BIOS Setup Information Serial Port 1 Choices 3F8 IROA 2F8 IRO3 Disable Mode Choices RS 232 RS 422 RS 485 Watch Dog Timer Select Choices Disable 15secs 30secs 1min 2mins 3mins Hardware Monitor SYS1 Target Temp SYS1 FAN Target Temperature Choices Disable 40 C 45 C 50 C 55 C SYS1 Tolerance Temp CPU FAN Tolerance Temperature Choices Disable 5 C 4 C 3 C 2 C1 C NANO 5050 User s Manual 4 17 BIOS Setup Information Serial Port Console Configuration Console Redirection Console Redirection Enable or Disable Choices Enabled Disabled NANO 5050 User s Manual 4 18 BIOS Setup Inform
21. ontrol of active state Power Management on both NB side of the DMI Link Choices Enabled Disabled PCI Express Root Port 1 4 NANO 5050 User s Manual BIOS Setup Information PCI Express Root Port 1727374 Control the PCI Express Root Port PCIe Speed Select PCIe Speed to Genl or Gen2 ASPM Control PCle Active State Power Management settings configure Disable LOS L1 LOS And L1 Auto HOT PLUG Enable or disable PCI Express Hot Plug URR Enable or disable PCI Express Unsupported Request Reporting FER Enable or disable PCI Express Device Fatal Error Reporting NFER Enable or disable PCI Express Device Non Fatal Error Reporting CER Enable or disable PCI Express Device Correctable Error Reporting SEFE Enable or disable Root PCI Express System Error on Fatal Error SENFE Root PCI Express System Error on Non Fatal Error Enable Disable SECE Root PCI Express System Error on Correctable Error Enable Disable PME Interrupt Root PCI Express PME Interrupt Enable Disable NANO 5050 User s Manual 4 6 BIOS Setup Information Povver Control Configuration ACPI Sleep State Select the highest ACPI sleep state the system will enter when the SUSPEND button is pressed The choice S1 CPU Stop Clock 53 Suspend to RAM Restore AC power loss Select AC Power state when power is re applied after a power failure The choice Power Off Power On Last State The choice Disabled
22. program will prompt to user to enter the SETUP program Some errors are significant that ll abort the start up process too 4 1 Entering Setup Turn on or reboot the computer When the message Hit lt F2 gt if you want to run SETUP appears press lt F2 gt key immediately to enter BIOS setup program If the message disappears before you respond but you still wish to enter Setup please restart the system to try COLD START again by turning it OFF and then ON or touch the RESET button You may also restart from WARM START by pressing lt Ctrl gt lt Alt gt and lt Delete gt keys simultaneously If you do not press the keys at the right time and the system will not boot an error message will be displayed and you will again be asked to Press lt F2 gt to Run SETUP or Resume In HIFLEX BIOS setup you can use the keyboard to choose among options or modify the system parameters to match the options with your system The table below will show you all of keystroke functions in BIOS setup NANO 5050 User s Manual 4 1 BIOS Setup Information 4 2 Main Once you enter NANO 5050 Phoenix BIOS CMOS Setup Utility a Main Menu is presented The Main Menu allows user to select from eleven setup functions and two exit choices Use arrow keys to switch among items and press lt Enter gt key to accept or bring up the sub menu This setup page includes all the items in standard compatible BIOS Use the arrow keys to highlig
23. rovides two LED indicators to report Intel 82583MM Gigabit Ethernet interface status Please refer to the table below as a quick reference guide Operation of Ethernet Port Color Name of LED Green JLAN Linked Active LED Blinking LAN d LED 100 Mbps 10 Mb amp Green pes Mbps pS ps 3 3 4 Audio Controller Please find Realtek ALC886 GR Audio driver form NANO 5050 CD title The drivers support Windows 7 NANO 5050 User s Manual 3 2 System Installation 3 4 Clear CMOS Operation The following table indicates how to enable disable Clear CMOS Function hardware circuit by putting jumpers at proper position J14 CMOS Setup 1 3 Pin Header 2 0 mm PIN No 1 2 Short Normal Operation X 2 3 Short Clear CMOS contents 3 5 WDT Function The Watchdog Timer of motherboard consists of 8 bit programmable time out counter and a control and status register Reference Winbond Super I O W83627DHG PT Spec chapter 16 The units of Watchdog Timer counter are selected at Logical Device 8 CR Fbh bit 3 The time out value is set ar Logical Device 8 CR F6h Writing zero disables the Watchdog Timer function Writing any non zero value to this register causes the counter to load this value into the Watchdog Timer counter and start counting down WDT Control Command Example include lt stdio h gt include lt stdlib h gt include conio h include lt dos h gt void change_LDN unsigned char LDN outportb 0x2E 0x0
24. sary devices are connected before hooking up power source Loading the default optimal setting When prompted with the main setup menu please scroll down to Load Setup Defaults press Enter and Y to load in default optimal BIOS setup This will force your BIOS setting back to the initial factory configuration It is recommended to do this so you can be sure the system is running with the BIOS setting that Portwell has highly endorsed As a matter of fact users can load the default BIOS setting any time when system appears to be unstable in boot up sequence 9 2 FQA Question I forget my password of system BIOS what am I supposed to do Answer You can simply short 2 3 pins on J14 to clean your password Question I cannot boot up my system Answer Please make sure all the setups were followed the instruction in User s manual Unplugged any other add on device to isolate the possibility of external affection and try again If the SBC still does not boot please contact with our Technical support department Note Please visit our technical web site at http www portwell com tw For additional technical information which is not covered in this manual you can mail to tsd portwell com tw or you can also send mail to our sales they will be very delighted to forward them to us NANO 5050 User s Manual 5 2 Troubleshooting System Memory Address Map Each On board device in the system is assigned a set of memor
25. y addresses vyhich also can be identical of the device The follovving table lists the system memory address used for your reference BIOS Data Area System Data DOS Program Area Available Unused Extended BIOS Area Unused VGA Graphics Unused VGA Text C000 CF3F Video ROM CF40 EFFF 131 K Unused F000 FFFF System ROM NANO 5050 User s Manual 5 3 Troubleshooting Interrupt Request Lines IRQ Interrupt Request Lines IRQ ROH Default Us Set IRQ 1 System ROM Keyboard Event Usable IRQ Real Time Clock Usable IRQ IRQ 14 System ROM Hard Disk Event Unassigned Usable IRO NANO 5050 User s Manual 5 4
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