Evaluation Kit User`s Manual DC-DC Converter
Contents
1. z c J10 J2 SYNC 4 e O xi E E J9 J1 SDb oe 0 een E J6 e VIN e 9 VINS P14 Oo e o e e e e e e e e bd LOAD GND C2 C3 C4 C5 C6 C7 C8 C9 i t LOADS JuF luF luF HuF A47uF 47uF VIN J3 C1 e e dk e e e e e it T ET t Plane J15 c11 Jena 100E pa ia was GND R2 gi SScapSYNC SDb GND VIN VIN VIN GND ANN t DNI e e b d 1nF 50pF ta GND 24 DNI bi P5 i i 2 VREF OUT 23 RI3 7 EAINP R1 B PB DNI e AAN 3 EAINP OUT 22 m L1 OMM 9d 4 EAINM OUT 21 C WENT 9 e e e e lt a P6 U1 2 8uH C23 C24 C25 C26 C12 C27 28 o e 5 EAOUT OUT 20 e R5 6 ISET our ig 1uF d 1uF d7uF 47uF n FEEDBACK l i ak 7 ICOMP GND 18 e 2 EAINM C13 o3 C14 8 RSET GND 17 4 J8 SYNCObPGOODRSEL GND VIN VIN GND GND RSET R3 12 13 14 15 16 z NIN l 0Q e e e 4 e C15 C16 C17 C18 C19 C21 C20 C22 us P3 C29 R7 E RE ce GMT RS JuF 1uF 1uF 1uF 47uF 47uF 9 e e e e e e J5 Plane d R14 E35 LAM 00 J16 ojo VIN P2 RSEL SYNCOb o ojo VIN VIN Nd ne O uI S 10K 500 PYNCOB VIN mw S 1 10K 500 PGOOD Refer to Bill of Materials 6 PGOOD d P10 For applica2. e aeo s pF jCapacitor Ceramic 50pF 100V NPO 0608 AVXOomgraion 7 6 C6 7 C12 C19 C21 C26 47 F capacitor Ceramic 47 F 10V X7R 10 1210 Mura CS 8 3 cecz0 022 p3oF Capacitor Tant 330pF 10V 10 7843 O Kem SCS e 2jczrC28 oy capacitor Tant 470 F 6 3V 20 SMD KMET fol aea i5opF Capacitor Ceramic fB0pF 50 V 5 COG 0608 MURATA M Ut STRATEDGE 32 LEAD JIC 32 LEAD 0 500 SQUARE FLATPACK NIKS2LEAD 1 1 i5 fPOS HEADER HEADER FCI 4 PIN DUAL ROW TERMINALBLOCK FG oOo o i3 1 e 4 POS HEADER HEADER FOI 8 PIN DUAL ROW TERMINALBLOCK Fa d i fam INDUCTOR 28uHPOWERINDUCTOR DOSD0H282MLB COLCRAFT 1 2 48 JPINJUMPER Jumps3PiNO OOcenes O O SoS Ce amma MountingHoie PCB MTG HOLE 0 200 OD x 0 138 DilHoe o RESISTOR 0 OHM 1 10W 5 0603 Pamasonc ECG 18 ae i50K JRESISTOR 150K OHM 1710W 5 0603 SMD Panasonic ECG RESISTOR 10 0K OHM 1 10W 0 1 0603 Panasonic ECG RESISTOR 15 0K OHM 1 10W 0 1 0603 PANASONIC z 1 R amp amp K RESISTOR
3. Oapactor Ceramic TON SOV YSV 0608 C MURATA Capacitor Ceramic 1nF 50V X7R 1575 0603 S 3 11 02 5 76 18 023 25 iur Capacitor Ceramic TF 10V SR 10 0608 AVXComoraion Capacitor Ceramic 15pF 50V 5 COG 0603 MURATA 5 ijo feo Gapacitor Ceramic 3 9nF 50V 10 x7R 0608S muaa CS e cio sopc Capacitor Ceramic 50pF 100V NPO 0603 AVXComoraion 7 6 06 7 C12 C19 CZ C26 ar Cepacitor Ceramic 47F 10V XUR 10 210 O Musa 8 ojcze nr Cebactor Ceramic 47F 10V X7R 10 200 O O Musa SS 9 1 c0 B3oyF capacitor Tant 330pF TOV 10 7543 Kemet fol aea iSopF Cepacitor Ceramic T50pF 50 V 5 COG 0603 MURATA tif 1jU Nko C 32LEAD 0 500 SQUARE FLATPACK PES9iSt i 1 1 POS HEADER _ HEADER FC 4PIN DUALROW TERMINAL BLOCK lt o o 1 ae 4POS HEADER __ HEADER FC 6 PIN DUAL ROW TERMINAL BLOCK FGl M i pen NDUCTOR 2 8 uH POWER INDUCTOR DOSMOH282MLB 1COLCRAFT o tel 2 48 BPNJUMPER Jumper 3PIN 0 100centers O O O o 16
4. For applications support please visit www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Page 7 of 16 DC DC Converter Evaluation Kit Manual Typical Performance Peregrine Semiconductor G Vn 5V Vout 2 5V Fsw 500 kHz Tc 25 C except where noted Figure 3 PE99151 Efficiency vs Output Current PE99151 Efficiency versus Output Current VIN 5V VOUT 2 5V Fsw 1MHz 100 95 90 85 80 75 70 Efficiency 65 TC 55 C Tc 25 C 60 c 125 C 55 oi J 0 02 04 06 08 1 12 14 16 18 2 Output Current A Figure 4 PE99151 Efficiency vs Output Current PE99151 Efficiency versus Output Current Vin 5V Fsw 1MHz T 25 C 100 95 90 85 80 75 70 Efficiency Vout 3 3V 65 m Vout 2 5V 60 amp Vout 1 5V gt Vout 1 0V 55 50 0 02 04 06 08 1 12 14 16 18 2 Output Current A Figure 5 PE99151 Output Ripple u T j 3 0mV pk pk bemerhrtrtbonredarermentatyremdsrtrbemerdsrretmerebareedenret rendent RR EE H M E NDE 5 00mV 25 Mi1 00us A Chl 20 00 900pV Figure 6 PE99151 Load Transient Response
5. RSET to EAINM through jumper J4 on Slave device in current sharing configuration RSET of Master device drives EAINP of Slave device SMA connector J12 is the power good inductor Once the output voltage is within 10 of the target value an external pull up resistor connected to the open drain output will pull this output to 5V Outside of the 10 of the target value the PGOOD output will be at ground The PE9915x can be configured to output a DC voltage from 1 0V to 3 6V To set the output voltage a resistor divider must be selected that will produce a 1 000 volt dc voltage at the EAINM pin when the VOUT voltage has reached the target output voltage Fixing R2 R4 is then calculated to be R4 R2 VOUT 1 The PE9915x reference design uses a value of 10K for R2 In the case where the desired output voltage is 1 000V R2 can be removed open and R4 can be set to 0 ohms This is equivalent to directly connecting VOUT to EAINM For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 6 of 16 2012 Peregrine Semiconductor Corp All rights reserved 44g Peregrine DC DC Converter G Semic S uctor Evaluation Kit Manual 10 Soft start may be implemented to limit the in rush current as well as the output voltage ramp rate The output voltage ramp rate of the PE9915x can be increased by tying the SScap pin to the 5V input rail through an external resistor The ramp rate can also be d
6. amma MouningHoe PCB MTG HOLE 0 200 ODx 0 138D llHde o o w 2 RtR amp ohm RESISTOR OOHM 1 10W 59 0600 Pemasnc ECG 1 i Re fak RESISTOR 47K OHM 10W 5 0605 SMD Panasonic ECG RESISTOR 10 0K OHM 1 10W 0 1 0603 Panasoni ECG RESISTOR 15 0K OHM 1710W 0 1 0603 PANASONIC z ijRs e RESISTOR 39K OHM T TOW 5 0603 SMD PANASONC Cid RESISTOR 50 OHM T25MW 1 0603 Vishay 23 iR i30ehm RESISTOR 130 OHM 1710W 5 0603 SMD Panasomc ECG 24 apase PINJUMPER CONN HEADER 100 SINGLE STR 2POS F Sullins Electronics Corp 25 e 712 SMACONN SMA 50 OHM END LAUNCH JACK RECEPTACLE ROUND CONTACT Johnson Components Inc 13 PT11 P1314 SINGLEPINHEADER SINGLE PINHEADER Sulins Electronics Cor z ijRF 1 pcpcevkpPB i53 PE99153 mema REFbES VALUE PARTDESCHIPHON PEREGRINE P N MANUFACTURER 1 ft nF Capactor Ceramic T nF SOV YSV 0603 MURATA 2 jet int Capacitor Ceramic 1nF 50V X7R 5 0603 O O O KEMET S Capacitor Ceramic TuF 10V XSR 1096 0603 AVX Corporation 4 tois B3pF Capacitor Ceramic 33pF S0V 5 COG 0603 MURA
7. 1 0608 Panasonc ECG RESISTOR 15 0K OHM 1 10W 0 1 0603 PANASONIC RESISTOR 56K OHM 1 10W 5 0603 SMD ____Panasonic ECG RESISTOR 50 OHM 125MW 1 0603 a RESISTOR 82 OHM 1 10W 5 0603 SMD _______Panasonie ECG 24 413132 PINJUMPER CONN HEADER 100 SINGLE STR 2PO5S 5ulins Electronics Corp 25 epri2 SMACONN SMA50OHMENDLAUNCHJACKRECEPTACLE ROUND CONTACT Johnson Components Inc 26 13 PI TP13 4 SINGLE PINHEADER SINGLEPINHEADER Sulins Electronics Corp zx REF DcDcEVKPOBB R95732 Document No 79 0122 02 www psemi com For applications support please visit www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Page 15 of 16 Peregrine Evaluation Kit Manual Semiconductor DC DC Converter pp PE99155 memory REFDES VALUE J PARTDESCRIPHON PEREGRINEP N MANUFACTURER 1 1o nF Gamator Ceramic TOnF SV YSV 0608 S Capacitor Ceramic InF 50V X7R 5 0603 a 3 1102 5 076 18 023 25 iur Capacitor Ceramic 19F 10V X5R 11095 0600 AVXOomoraion Capacitor Ceramic 39pF 50V 5 COG 0603 MURATA s ioi anF Capacitor Ceramic S 3nF S0V 10 XIR 0608 MURATA
8. 2 02 www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Figure 18 Shut down waveforms narisezeisanninn erime chi NTIECM char NT RAM a RCL EA thr X 1008 V 2 00 V Ch4 S 00 V 40 00 Figure 20 Soft Start C_SScap 1000 nF VOUT N SSCAP EEIE Al Ch3 4 1 00 83 10 00 For applications support please visit www psemi com Page 11 of 16 Peregrine Evaluation Kit Manual Semicond uctor DC DC Converter pp Applications If more output current is required two or more regulators operating at the same frequency may be connected in a parallel configuration This current sharing technique is illustrated in Figures 27 and 28 using the two PE99155 10A POLs The resulting load current will be the sum of the combined regulators Synchronization allows the regulators to be locked together to one frequency This eliminates any beat frequency interference that could result in the absence of synchronization The PE9915x contains an internal oscillator capable of operating at 1 MHz when the SYNC pin is tied to VIN or at 500 kHz when the SYNC pin is tied to ground Optionally the switching frequency can be synchronized to an external reference from 100 kHz to 5 MHz for design flexibility Whether operating synchronously or asynchronously the open drain SYNCOb pin contains the inverted internal clock reference This inverted clock signal can be used to drive additional regulators The out of
9. 68K OHM OW 5 0603 SMD Panasonic ECG RESISTOR 50 OHM 125MW 1 0603 ooo jvshy SS 25 aR feom JRESISTOR 56 OHM 1 10W 5 0603 SMD Panasonic ECG 24 aans PINJUMPER CONN HEADER 100 SINGLE STR 2POS Sulins Electronics Corp 25 7 2 SMACONN SMA 50 OHM END LAUNCH JACK RECEPTACLE ROUND CONTACT Johnson Components Inc 26 i8 PTiTPT3 4 SINGLE PINHEADER SINGLE PINHEADER SSS Stns Electronics Corp z iRF popcEvkP W32 The information in this document is believed to be reliable However Peregrine assumes no liability for the use of this information Use shall be entirely at the user s own risk No patent rights or licenses to any circuits described in this document are implied or granted to any third party Peregrine s products are not designed or intended for use in devices or systems intended for surgical implant or in other applications intended to support or sustain life or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur Peregrine assumes no liability for damages including consequential or incidental damages arising out of the use of its products in such applications The Peregrine name logo UltraCMOS and UTSi are registered trademarks and HaHP MultiSwitch and DUNE are trademarks of Pere
10. Peregrine Semiconductor G Evaluation Kit User s Manual DC DC Converter PE99151 99153 99155 Peregrine Semiconductor Corp 9380 Carroll Park Drive San Diego CA 92121 Tel 858 731 9400 For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 1 of 16 2012 Peregrine Semiconductor Corp All rights reserved DC DC Converter Evaluation Kit Manual ine G Peregrine Table of Contents NMTFOQGUCUON srs ae E ENA 3 MOGUC HO ins teeters HERUM latent 3 Applications SUPPO daro e vio eR oncaeid enh E oU mor datis de pene ted 3 Evaluation Kit Contents amp Requirement ccc cece cece eee eeeeeeeeaeseeeesanees 3 EVAIUALION BOATO csopor EE 4 EValua lion Board SCNEMAUG siecle nnde dr ni QE bds quis 4 Evaluation Board Assembly cccc ccc ccc cece ee eeee eee eeeeeeesaeeeeeeesgaeeeeaeenaes 5 Hardware Operation usce ioo es dero eus in eov EvEEIESE UU skP E Te EE CUP EP AM URN 6 Typical Perrorman ece 2 22 02 9 299 esu a a acta 8 EMICICNGY Re mct iP Output Voltage Appl Css aie acm ubi Er ur TE T t M dpi e la tse T Mu amnes 8 10 Load Transient Response csse eene enne nns 8 10 Line Load ui le P iilo aM TL 8 10 Switening Wave OMS asaan xii DER pxRM Vct Ext L2 DR ELI EN METER 11 Start up Shut down Waveforms ssssssssseessssesssse e see eese nsn nens 11 Soltsstart VVaVelOELLTIS aau
11. TA oO Capacitor Ceramic 3 3nF 50V 10 X7R 0603 a 6 aeo SopF Capacitor Ceramic 50pF 100V NPO 0603 jAVXComortion 7 667C12C19C21C26 z F Capacitor Ceramic 47 F 10V XTR 10 1210 Murata 8 2c0cz2 feor Capacitor Tant 330 F 10V 10 7348 O O O Keme e 1c lazF Capacitor Tant 470uF 6 3V 20 SMD KEMET 10 1c iS pF Capacitor Ceramic 150pF 50 V 5 COG 0603 MURATA O iP ju NIKSZLEAD IC 32 LEAD 0 500 SQUARE FLATPACK PES985891 1 5 PPOS HEADER __ HEADER FCI 4PIN DUALROW TERMNALBLOCK FG o 13 1 e Japos HEADER HEADER FCi 8PIN DUAL ROW TERMINAL BLOCK 1 FC pe INDUCTOR 28uHPOWERINDUCTOR DOSO40H282MLB OOLCRAFT 15 245 SPINJUMPER Jumper 3 PN 000 centers S 16 ama MoutingHoe PCB MTG HOLE 0 200 ODx0138DHlHoe Oo SoSo S y S w 2RIRS foom JRESISTOR 0OHM HOW 53 0603 O Paaso EO 18 1 R amp fo JRESISTORi00K OHM 110W 5 0603 SMD Penasonc ECG 19 S R2RBS fok RESISTOR 10 0K OHM 170W 0
12. Tek Run Trig d Chi PK Pk 71 0mV lour 0 to 2A M 400us A Ch4 f 1 00A Chd 2 00A 9 For applications support please visit www psemi com Page 8 of 16 120 20 Document No 79 0122 02 UltraCMOS RFIC Solutions 2012 Peregrine Semiconductor Corp All rights reserved tf Peregrine G LN DC DC Converter Evaluation Kit Manual Vin 5V Vout 2 5V Fsw 500 kHz Tc 25 C except where noted Figure 7 PE99153 Efficiency vs Output Current PE99153 Efficiency versus Output Current VIN 5V VOUT 2 5V Fsw 1MHz Efficiency Ic 55 C TC 425 C Tc 125 C Output Current A Figure 8 PE99153 Efficiency vs Output Current Figure 9 PE99153 Output Ripple PE99153 Efficiency versus Output Current Vin 5V Fsw 1MHz T 25 C 100 95 M fa Se 85 3 30 o 5 oO g 70 w e Vout 3 3V 65 m Vout 2 5V 60 4 Vout 1 5V lt Vout 1 0V 55 50 0 1 2 3 4 5 6 Output Current A Tek Run p J Trig d T H i 1 5 6mV pk pk 1 f ETT DESSEN OPUS ee ee E E ESSE TE 5 00mWV 25 M 1 00j4s A Chi f 0O0 00V i 20 00 Document No 79 0122 02 www psemi com 2012 Peregrine Semiconductor Corp All rights re
13. asuute idboentos utentiitis sued rin ERE gut2 M dente ure REM E ved uite ias 11 PDDIICAUOINS mm c 12 Current Sharing Gonfig FlallQl sucismacdtcict dus aant dee atte Ia dt vida te o dada De sete nicis 13 PCB EV qol etc 14 POB Layout GUICC MGS eos cle iei eise ape tor dete E petat on o rasa Ser ina dem Susa 14 silgergilirzir Tyr cc 15 Evaluation Board Bill Of Materials losses 15 For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 2 of 16 2012 Peregrine Semiconductor Corp All rights reserved A Pere rine DC DC Converter J Peregine ooo Plena Introduction The PE9915x evaluation kit can be used to validate the performance Peregrine s high efficiency point of load POL synchronous buck DC DC converters with integrated switches The PE9915x is designed to operate from a wide 5V bus and provide an output voltage of 1 0V to 3 6V while delivering up to 2A 6A or 10A of continuous current Applications Support If you have a problem with your evaluation kit software or if you have applications questions contact applications support at www psemi com fastest response or call 858 731 9400 Evaluation Kit Contents amp Requirements Kit Contents The Evaluation Kit includes all of the hardware required to evaluate the PE9915x Included in the Evaluation Kit are 1 DC DC Evaluation Board with PE99151 PE99153 or PE99155 IC 1 oet of male pow
14. e sierras E been esee E S rese oeenhe eese ebrei siehe enne a E S OE O eene eere erede eere enses fH 50 0mv M400us A Cha f 5 00 A Ch4 5 00 AQ 14 Sep 2011 20 00 04 56 56 Document No 79 0122 02 UltraCMOS RFIC Solutions 2012 Peregrine Semiconductor Corp All rights reserved Peregrine Semiconductor G DC DC Converter Evaluation Kit Manual Vin 5V Vout 2 5V Fsw 500 kHz Tc 25 C except where noted Figure 15 PE99155 Switching waveforms 500 kHz SE a 2 2 T ons VOUT n 4 VSW w 9999 a Chil 1 00 V 2 SIE 10 0mV SM T 00us A Chl 1 00 V Ch4 S00mA 2 10 00 Figure 17 Start up waveforms Figure 16 PE99155 Switching waveforms 1 MHz by So Dita nn em riim roti mitia VOUT a Se NO Se SEN SON Oe Ne Se SO SOO P 3 P SO SO 3 3 BL MH 3 F BM MTM O OO Oe Oe ee Oe SO ee ee P A r 3 VSW E E NE UN NU NE m m Re m E m m m l eee Chi 1 00 V 2 10 0mV 5 M 1 00ps A Chi f 1 00 V cha 500mA 2 10 00 n edente eee eene Eee wl a KNNNM ee EENENEE chi 5 00 EN Y NE Mi ooms EE Chi F108 V mE 2 0 Chd 5 00V is 20 00 Figure 19 Soft Start C_SScap 10 nF TERRE ET etica T 00 BTE 0 0m ws Cha one xo Ch4 5 00 10 00 Document No 79 012
15. ecreased by connecting the SScap pin to ground through an external capacitor C1 An initial current is set by an internal regulator Vido 3 2V and an internal pull up resistor R 1 2 MQ to charge C1 The desired soft start time can be calculated from SS time seconds R C1 In 1 Vref Vldo where Vref is the internal reference voltage of 1V 11 When the RSEL pin is grounded the PE9915x uses an internal current limiting resistor that will limit the output current to a value of ILIMXINT listed in Table 2 of the datasheet The part can be adjusted to use an alternate current limit by tying the RSEL pin to VIN In this mode the PE9915x can be programmed to various output current limits through the selection of a resistor connected from the RSET pin to ground 12 Loop compensation is externally adjustable via C13 C14 and R5 for type Il compensation and adding C29 for type Ill compensation to optimize transient response while still maintaining stability requirements A design tool for the PE9915x is available 13 The PE9915x provides adjustable slope compensation through an external resistor R6 to allow the designer to optimize transient response and stability requirements across output voltage and switching frequency ranges A compensation ramp is created at the ICOMP pin by R6 and an internal capacitor A compensation slope of 1 is recommended Refer to the data sheet and the PE9915x design tool Document No 79 0122 02 www psemi com
16. er ground connectors CAUTION The PE9915X 00 circuit contains components that might be damaged by exposure to voltages in excess of the specified voltage including voltages produced by electrostatic discharges Handle the board in accordance with procedures for handling static sensitive components Avoid applying excessive voltages to the power supply terminals or signal inputs or outputs Document No 79 0122 02 www psemi com For applications support please visit www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Page 3 of 16 DC DC Converter Evaluation Kit Manual Evaluation Board G The components of the PE9915x evaluation board have been optimized for an input voltage of 5V anda switching frequency of 500 kHz For testing purposes the input can be varied across the 4 6V to 6V operating range The output voltage of the evaluation board is set to 2 5V nominal but this voltage can be changed to any voltage between 1 0V and 3 6V by modifying an external resistor network Figure 1 Evaluation Board Schematic P1 Peregrine Semiconductor
17. grine Semiconductor Corp All other trademarks mentioned herein are the property of their respective companies For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 16 of 16 2012 Peregrine Semiconductor Corp All rights reserved
18. nts should be routed over ground planes to minimize radiated fields The recommended board layout is shown below The sensitive feedback line has been routed directly to the bottom layer to avoid any coupling The 32 lead ceramic package underside incorporates a heat slug that should be soldered to the PCB to ensure proper grounding and device performance The EVK PCB is fabricated on FR 4 with 4 oz copper outer layers and 1 oz copper inner layers 8mil diameter vias are placed under the package and overall board thickness is 0 062 0 005 inches Gerber files are available upon request D am n 99959 j 250 mil Mid Layer 2 I 2250 mil Top Layer 0 18C0 10l UERKEXYYII et j 2530 mil gt j 2530 mil gt j 2530 mil j 2530 mil j 2250 mil _ gt 2250 mil _ gt Mid Layer 1 Bottom Layer For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 14 of 16 2012 Peregrine Semiconductor Corp All rights reserved Pere rine DC DC Converter G S Evaluation Kit Manual A Semiconductor LLL Bill of Materials PE99151 memory REFDES VALUE PARTDESCRIPTION PEREGRINEP N MANUFACTURER 1 1o Jin
19. phase clock signal has the added benefit of reducing the RMS input ripple current and filtering requirements through peak current phase interleaving Figure 21 Current Sharing Schematic PE99155 Master Vin 5VDC O Vout 20A PE99155 Slave For applications support please visit www psemi com Document No 79 0122 02 UltraCMOS RFIC Solutions Page 12 of 16 2012 Peregrine Semiconductor Corp All rights reserved Pere rine DC DC Converter GQ S emi C Sl uctor Evaluation Kit Manual Figure 22 Current Sharing Configuration C oe Z zc O OF MASTER Device VIN VIN Sense LOAD RSET LOAD Sense SLAVE Device VIN EAINP T VIN Sense LOAD R2 and Rd aE Document No 79 0122 02 www psemi com For applications support please visit www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Page 13 of 16 Peregrine Evaluation Kit Manual S emicon ductor DC DC Converter Yi Evatuation Kt Manual lS PCB Layout Guidelines In order to suppress electric fields generated by the rapid switching rate of the regulator proper PCB layout is essential Critical voltage transients and noise can result if trace inductance is not minimized Good layout practices as well as decoupling component placement and selection can minimize output noise and conducted emissions from the input It is recommended to keep critical component traces as short and fat as possible Traces carrying high ripple curre
20. rresponding LOAD terminals of header J6 Connect the negative input and the sense of the electronic load to the corresponding GND terminals of header J15 VIN IIN and VOUT may be monitored using multi meters having sufficient range and resolution It is recommended to keep all lead lengths short lt 4 feet to avoid unnecessary loss and pickup Increase VIN from OV to 5V J1 should be removed for normal operation To disable the device install jumper J1 The Shutdown pin SDb may also be controlled through SMA connector J9 The internal oscillator defaults to 1 MHz when the board is powered up To change the switching frequency to 500 kHz ground the SYNC pin by placing a jumper on J2 If a different frequency is desired a function generator may be connected to J10 A frequency between 100 kHz and 5 MHz may be used Note A frequency other than 500 kHz may require re optimization of inductor and loop compensation components SMA connector J7 is connected to the Error Amp input pin For normal operation EAINP must be tied to VREF through jumper J3 In current sharing configuration remove J3 on the Slave device SMA connector J8 is connected to the RSET pin When an external RSET resistor R7 is installed the RSEL pin must be pulled high by installing jumper J13 When the RSEL pin is grounded J13 removed an internal current limiting resistor will limit the output current to the ILIMXINT listed in Table 2 of the datasheet Connect
21. served Figure 10 PE99153 Load Transient Response Tek Run Trig d Chi Pk Pk 89 0mV Hour 0 to 6A 1 i 1 T Mn i orla M400us A Ch4 F 2 00A 5 00 AQ 20 00 Chi S0 0mV amp For applications support please visit www psemi com Page 9 of 16 DC DC Converter Evaluation Kit Manual Peregrine Semiconductor Vin 5V Vout 2 5V Fsw 500 kHz Tc 25 C except where noted Figure 11 PE99155 Efficiency vs Output Current PE99155 Efficiency versus Output Current VIN 5V VOUT 2 5V Fsw 1MHz 100 95 90 85 X 80 re in 70 be e Tc 55 C a Tc 25 C 99 amp Tc 4125 C 55 0 1 2 3 4 5 6 7 8 9 10 Output Current A Figure 12 PE99155 Efficiency vs Output Current Figure 13 PE99155 Output Ripple PE99155 Efficiency versus Output Current Vin 5V Fsw 1MHz T 25 C 100 90 85 80 75 70 Efficiency 65 e Vout 3 3V 60 m Vout 2 5V amp Vout 1 5V 55 lt Vout 1 0V 50 0 1 2 3 4 5 6 7 8 9 10 Output Current A ee 4 C EE 5 00mvov Mii 00us A Chi O 10 00 For applications support please visit www psemi com Page 10 of 16 Figure 14 PE99155 Load Transient Response ek Run as Trig d erbum
22. tions support please visit www psemi com Page 4 of 16 Document No 79 0122 02 UltraCMOS RFIC Solutions 2012 Peregrine Semiconductor Corp All rights reserved A Pere rine DC DC Converter J Peregine ooo Plena Figure 2 Evaluation Board Assembly ajio C20 DC DC EVK PCB P W 101 0587 03 vid sm eJ n ere Pd s Document No 79 0122 02 www psemi com For applications support please visit www psemi com 2012 Peregrine Semiconductor Corp All rights reserved Page 5 of 16 Evaluation Kit Manual DC DC Converter pp Peregrine Semiconductor Hardware Operation 1 Disable the input voltage source Note The input voltage source VIN should be able to source between OV and 6Vdc and be capable of supplying up to 10Adc for the PE99155 Set the input voltage to supply OV and set the input source current limit accordingly 2A for PE99151 6A for PE99153 and 10A for PE99155 Connect the positive output and the sense of the input voltage source to the corresponding VIN terminals of header J6 Connect the negative output and the sense of the input voltage source to the corresponding GND terminals of header J15 A load may be connected to header J6 or it may be left floating for no load operation An electronic load with constant resistance mode capable of between OA and 30Adc at 2V is recommended Connect the positive input and the sense of the electronic load to the co
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