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ModelSim SE Tutorial - Electrical & Computer Engineering

1. Branch Gra 14 13 2557 a Condition Fullpath E 1 View statistics in the Workspace pane Type a Select the Files tab in the Workspace and scroll to the right a en i i a Each file in the design shows summary statistics for statements AA branches conditions and expressions Berne b Select the sim tab in the Workspace and scroll to the right sia fe Coverage statistics are shown for each item in the design SER c Click the right mouse button on any column name and select an item re ie from the list Figure 89 Condition Graph Expression Count Expression Hits Expression Expression Graph Whichever column you selected is hidden To redisplay the column right click again and select that column name The status of which columns are displayed or hidden is persistent between invocations of f sl al ModelSim 2 View statistics in the Missed Coverage pane Figure 90 Statement statistics in the Missed Coverage pane a Select different files from the Files tab of the Workspace Li x The Missed Coverage pane updates to show statistics for the selected file Missed Coverage a Figure 90 Missed Statements test_sm v b Select any entry in the Statement tab to display that line in the Source window X 22 X 22 into 4 b0001 28 bO X 23 posedge clk X 24 5 X 24 into data X 26 endtask X 125 100 X 125 stop BIS a Statement Branch Cond
2. You should now see two files listed in the Project tab of the Main window workspace Figure 15 Question mark icons in the Status column mean the file hasn t been compiled or the source file has changed since the last successful compile The other columns identify file type e g Verilog or VHDL compilation order and modified date Changing compile order VHDL Compilation order is important in VHDL designs Follow these steps to change compilation order within a project 1 Change the compile order a Select Compile gt Compile Order This opens the Compile Order dialog box Figure 16 b Click the Auto Generate button ModelSim determines the compile order by making multiple passes over the files It starts compiling from the top if a file fails to compile due to dependencies it moves that file to the bottom and then recompiles it after compiling the rest of the files It continues in this manner until all files compile successfully or until a file s can t be compiled for reasons other than dependency Alternatively you can select a file and use the Move Up and Move Down buttons to put the files in the correct order c Click OK to close the Compile Order dialog Creating a new project T 35 Figure 15 Newly added project files display a for status Rabat E S ol x File Edit View Compile Simulate Tools Window Help Workspace ed E ane Toms Inne or Persae tcounter v Ver
3. icons on the folders to see the files Project Compiler Settings SE The files are now marked with a icon Because you moved the files General VHDL Verilog Coverage the project no longer knows if the previous compilation is still valid Project Properties J DoNot Compile Compile to library work 7 Place in Folder Top Level vi te m File Properties Multiple files selected ModelSim SE Tutorial Simulation Configurations A Simulation Configuration associates a design unit s and its simulation options For example say every time you load fcounter v you want to set the simulator resolution to picoseconds ps and enable event order hazard checking Ordinarily you would have to specify those options each time you load the design With a Simulation Configuration you specify options for a design and then save a configuration that associates the design and its options The configuration is then listed in the Project tab and you can double click it to load counter v along with its options 1 Create a new Simulation Configuration a gt o a o S Select File gt Add to Project gt Simulation Configuration This opens the Simulate dialog Figure 24 The tabs in this dialog present a myriad of simulation options You may want to explore the tabs to see what s available You can consult the ModelSim User s Manual to get a description of each option Type counter in the Simulati
4. ModelSim SE Tutorial T 24 Lesson 2 Basic simulation 3 Load the test_counter module b Double click test_counter to load the design You will see anew tab named sim that displays the hierarchical structure of the design Figure 6 You can navigate within the hierarchy by clicking on any line with a expand or contract icon You will also see a tab named Files that displays all files included in the design ModelSim SE Tutorial Figure 6 Workspace tab showing a Verilog design fy Modelsim a 0 x File Edit View Compile Simulate Tools Window Help SEAR 4 ET tone Oe Workspace xj rlinstanes Desianuni test_counter test_counter Module dut counter Module increment counter Function vsim work test_counter vsim work test_counter Loading work test_counter Loading work counter VSIM 5 gt Now Ons Delta 0 sim test_counter 4 Running the simulation Now you will run the simulation 1 View all windows a Select View gt All Windows This opens all ModelSim windows giving you different views of your design data and a variety of debugging tools You may need to move or resize the windows to your liking Add signals to the Wave window a Inthe Signals window select Add gt Wave gt Signals in Region Figure 7 Three signals are added to the Wave window Run the simulation a Click the Run icon on the Main Wave or Source window t
5. C breakpoint c 1 test_ringbuf compare_data this 0x842f658 at test_ringbuf h 142 ModelSim SE Tutorial Figure 35 An active breakpoint in a SystemC file source test_ringbuf h Eile Edit View Tools Window See amp BO mH Xx EF 10n HE ke OP E D x n 137 inline void test_ringbuf compare_data 138 139 bool var_dataerror_newval actual read le 140 dataerror write var_dataerror_newval 141 142 if reset read 143 144 storage write l 145 expected write l 4j gt test_ringbuf h AG SH fe ee Read Figure 36 Simulation stopped at the breakpoint source test_ringbuf h Eile Edit View Tools Window S5H amp 2B YO Mm XOX DB ejin 137 inline void test_ringbuf compare_data 138 139 bool var_dataerror_newval actual read e 140 dataerror write var_dataerror_newval 141 oo 142 if reset read 0 143 144 storage write l 145 expected write l 4 test_ringbuth SEES bee Ln 176 Col 0 Read Click the Step icon on the Source window toolbar H This steps the simulation to the next statement Because the next statement is a function call ModelSim steps into the function which is in a separate file Figure 37 Click the Continue Run icon on the Source window toolbar Hii The breakpoint in test_ringbuf h is hit again Right click the red diamond on line 142 and select Remov
6. T 97 Lesson 10 Simulating with Code Coverage 4 T 107 Lesson 11 Waveform Compare 2222 T 121 Lesson 12 Automating ModelSim 00000000 T 131 License Agreement 24254545 senkes rear T 143 IR sense Derrea euer T 149 T 3 ModelSim SE Tutorial T 4 ModelSim SE Tutorial Introduction Topics The following topics are covered in this chapter Assumptions Where to find our documentation Technical support and updates Before you begin Example designs T 6 T 7 T 8 T 9 T 9 ModelSim SE Tutorial T 6 Introduction Assumptions We assume that you are familiar with the use of your operating system You should be familiar with the window management functions of your graphic interface either OpenWindows OSF Motif CDE KDE GNOME or Microsoft Windows 98 Me NT 2000 XP We also assume that you have a working knowledge of VHDL Verilog and or SystemC Although ModelSim is an excellent tool to use while learning HDL concepts and practices this document is not written to support that goal ModelSim SE Tutorial Where to find our documentation T 7 Where to find our documentation ModelSim documentation is available from our website at www model com support or in the following formats and locations Document Format How to get it ModelSim SE Installation amp Licensing Guide paper shipped with ModelSim PDF select Main window gt H
7. mrtotes JH 42 input 21 0 addr data 43 begin san 44 5 into 4 bO011 28 hO op_word ER 1563 45 posedge clk ee 46 5 into addr send address 6252 47 repeat 4 48 begin 6252 49 posedge clk Pe 50 5 into data send data RPO C1 deta data l ff rhanma the data n l rf test_sm v gt N in 125 Cot 0 Read Byinst _ Viewing toggle statistics in the Signals window Toggle coverage counts each time a logic node transitions from one state to another In this example you enabled two state toggle coverage 0 gt 1 and 1 gt 0 with the cover t argument Alternatively you can enable six state toggle coverage using the cover x argument See the ModelSim User s Manual for more details 1 View toggle data in the Signals window Select test_sm in the sim tab of the Main window b Select View gt Signals to open the Signals window c Scroll to the right and you will see the various toggle coverage columns Figure 97 The blank columns show data when you have extended toggle coverage enabled Viewing toggle statistics in the Signals window T 115 Figure 97 Toggle coverage columns in the Source window Pre File Edit View Add Tools Window Bas Contains zz Clear sim Atest_sm 5 1 1 8 DO A ModelSim SE Tutorial T 116 Lesson 10 Simulating with Code Coverage Excluding lines and files from coverage statistics ModelSim allows you to exclude l
8. a Type do gold_sim do at the ModelSim gt prompt The DO file does the following e Creates and maps the work library e Compiles the Verilog and VHDL files e Runs the simulation and saves the results to a dataset named gold wif Feel free to open the DO file and look at its contents Creating the reference dataset T 123 ModelSim SE Tutorial T 124 Lesson 11 Waveform Compare Creating the test dataset The test dataset is the w f file that will be compared against the reference dataset Like the reference dataset the test dataset can be a saved dataset the current simulation dataset or any part of the current simulation dataset To simplify matters you will create the test dataset from the simulation you just ran However you will edit the testbench to create differences between the two runs Verilog 1 Edit the testbench a Open fest_sm v in the Source window b Select Edit gt read only to make the file writable c Scroll to line 113 which looks like this posedge clk wt_wd h10 haa d Change the data pattern aa to ab posedge clk wt_wd h10 hab e Select File gt Save to save the file 2 Compile the revised file and rerun the simulation a Type do sec_sim do at the ModelSim gt prompt The DO file does the following e Re compiles the testbench e Adds waves to the Wave window e Runs the simulation ModelSim SE Tutorial VHDL 1 Edit the testbench a b c
9. ll continue working with the project However first you need to end the simulation that started when you loaded test_counter 4 End the simulation a Select Simulate gt End Simulation b Click Yes ModelSim SE Tutorial Figure 17 The Library tab with an expanded library uJ Modelsim File Edit View Compile Simulate Tools Window Help Compile of tcounter y was successful Compile of counter y was successful Library C modeltech 2 compiles 0 failed with no errors Module C Modeltech Module C Modeltech Library MODEL_TE Library MODEL_TE Library MODEL_TE Library MODEL_TE Library MODEL_TEC Libra thE TER zl ModelSim gt lt No Context gt i HMM 0924 2003 05 50 AM lt DIR gt 09 04 2003 07 34 PM 1 024 counter v 09 04 2003 07 34 PM 358 tcounter v 2 File s 1 382 bytes 2 Dir s 15 339 933 696 bytes free Loading project test Compile of tcounter v was successful Compile of counter v was successful 2 compiles 0 failed with no errors vsim work test_counter vsim work test_counter Loading work test_counter Loading work counter an sim VSIM 11 gt Project test Now Ons Delta 0 sim test_counter Organizing projects with folders If you have a lot of files to add to a project you may want to organize them in folders You can create folders either before or after adding your files If you create
10. ModelSim also adds the library to the list in the Workspace Figure 3 and records the library mapping for future reference in the ModelSim initialization file modelsim ini When you pressed OK in step c above three lines were printed to the Main window Transcript pane vlib work vmap work work Modifying modelsim ini The first two lines are the command line equivalent of the menu commands you invoked Most menu driven functions will echo their command line equivalents in this fashion The third line notifies you that the mapping has been recorded in the ModelSim initialization file ModelSim SE Tutorial Figure 3 The newly created work library y ModelSim E Ioj x Fie Edit View Compile Simulate Tools Window Help xj ModelSim gt Mi work empty Library work aii vital2000 Library MODEL_TE GEMM ieee Library MODEL_TE fii modelsim_lib Library MODEL_TE EMM std Library MODEL_TE ei std_developerskit Library MODEL_TE il spnopsys Library MODEL_TE E gt Library lt No Design Loaded ee oa 4 Compiling the design With the working library created you are ready to compile your source files 1 Compile counter v and tcounter v a Select Compile gt Compile This opens the Compile Source Files dialog Figure 4 If the Compile menu option is not available you probably have a project open If so close the project by selecting File gt Close gt Project b Select counter
11. b Right click the counter instance and select Add gt Add to Wave The waveforms display in the Wave window When you finish viewing the results select File gt Quit to close ModelSim Running ModelSim in command line mode T 139 Figure 112 A dataset in the Main window Workspace D2 Modelsim SE PLUS 5 8 Beta File Edit View Compile Simulate Tools Window Help srele a a T r instance 0 Designuni unil er test_counter Module Reading C modeltech tcl vsim pref tel OpenFile C modeltech examples temp counter wif Design un VSIM 2 gt ey z Library counter f Loading counter test_counter ModelSim SE Tutorial T 140 Lesson 12 Automating ModelSim Using Tcl with ModelSim The DO files used in previous exercises contained only ModelSim commands However DO files are really just Tcl scripts This means you can include a whole variety of Tcl constructs such as procedures conditional operators math and trig functions regular expressions and so forth In this exercise you ll create a simple Tcl script that tests for certain values on a signal and then adds bookmarks that zoom the Wave window when that value exists Bookmarks allow you to save a particular zoom range and scroll position in the Wave window The Tcl script also creates buttons in the Main window that call these bookmarks 1 Create the script a Ina text editor open a new file and enter the foll
12. gt test_counter reset D Ef test_counter count Figure 41 Zooming out with the mouse pointer LIT 17 File Edit View Insert Format Tools Window test_counter clk test_counter reset Ef test_counter count 341 ns to 537 ns ModelSim SE Tutorial T 66 Lesson 6 Viewing simulations in the Wave window Using cursors in the Wave window Cursors mark simulation time in the Wave window When ModelSim first draws the Wave window it places one cursor at time zero Clicking anywhere in the waveform pane brings that cursor to the mouse location You can also add additional cursors name lock and delete cursors use cursors to measure time interval and use cursors to find transitions Working with a single cursor 1 Position the cursor by clicking and dragging a Click the Select Mode icon on the Wave window toolbar b Click anywhere in the waveform pane A cursor is inserted at the time where you clicked Figure 42 c Drag the cursor and observe the value pane The signal values change as you move the cursor This is perhaps the easiest way to examine the value of a signal at a particular time d Inthe waveform pane drag the cursor to the right of a transition with the mouse positioned over a waveform The cursor snaps to the transition Cursors snap to a waveform edge if you click or drag a cursor to within ten pixels of a waveform edge You can set the snap dist
13. s Manual 3 Design libraries UM 53 ModelSim SE Tutorial Creating the resource library 1 Create a directory for the resource library Create the directory that will hold the resource library Copy counter v from lt install_dir gt modeltech examples to the new directory Create a directory for the testbench Create a new the directory that will hold the testbench and project files Copy tcounter v from lt install_dir gt modeltech examples to the new directory You are creating two directories in this lesson to mimic the situation where you receive a resource library from a third party As noted earlier we will link to the resource library in the first directory later in the lesson Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Create the resource library a Select File gt New gt Library b Type parts_lib in the Library Name field Figure 27 The Library Physical Name field is filled out automatically Once you click OK ModelSim creates a directory for the library lists it in the Library tab of the Workspace and modifies the modelsim ini file to record this new library for the future
14. 24 end 25 endfunction 26 27 always posedge clk or posedge reset Gb 23 if reset 29 count ftpd_reset_to count gt 10 30 else a1 namme ql rf counter v tcounter y ramant inn mtr i test_counter dut count aie XXXXXXXX ADUN TEEN Lesson wrap up T 29 Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation 2 Click Yes when prompted to confirm that you wish to quit simulating ModelSim SE Tutorial T 30 Lesson 2 Basic simulation ModelSim SE Tutorial Lesson 3 ModelSim projects Topics The following topics are covered in this lesson Introduction Related reading Creating a new project Adding items to the project Changing compile order VHDL Compiling and loading a design Organizing projects with folders Adding folders i Moving files to folders Simulation Configurations Lesson wrap up T 32 T 32 T 33 T 34 T 35 T 36 T 37 T 37 T 38 T 39 T 41 T 31 ModelSim SE Tutorial T 32 Lesson 3 ModelSim projects Introduction In this lesson you will practice creating a project At aminimum projects have a work library and a session state that is stored in a mpf file A project may also consist of HDL source files or references to source files e other files such as READMES or other project documentation e local libraries e refere
15. Chapter 3 Design libraries UM 53 Chapter 5 Verilog simulation UM 105 Chapter 4 VHDL simulation UM 71 ModelSim Command Reference vlib CR 344 vmap CR 356 vlog CR 345 vcom CR 303 vsim CR 357 view CR 320 and right CR 244 commands ModelSim SE Tutorial Creating the working design library Before you can simulate a design you must first create a library and compile the source code into that library 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory then copy counter v and tcounter v files from lt install_dir gt examples to the new directory 2 Start ModelSim if necessary a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows Upon opening ModelSim for the first time you will see the Welcome to ModelSim dialog Figure 1 Click Close b Select File gt Change Directory and change to the directory you created in step 1 3 Create the working library a Select File gt New gt Library This opens a dialog where you specify physical and logical names for the library Figure 2 You can create a new library or map to an existing library We ll be doing the former b Type work in the Library Name field if it isn t entered automatically Creating the working design library Figure 1 The Welcome Dialog ol xi Model Welcome to
16. Compiling module dp_syn_ram rtl Compiling module ram_tb aay Module Top level modules sp_syn_ram rtl Module ram tb iJ ram_tk Module EE II vita2000 Library IM i j Loading work ram_tb eee Library Loading work sp_syn_ram rtli Loading work dp_syn_ram rtl VSIM 5 gt Figure 58 Loaded memory testbench Modelsim SE ioj x File Edit View Compile Simulate Tools Window Help ome SeQR 4 Fonte OP Re Workspace x Model Technology ModelSim SE vlog DEV Compiler 2003 05 Sep 7 2003 ram_th ram_tb Module Compiling module sp_syn_ram rtl x Instance Design unit Design ur clock_driver ram_tb Statemen Compiling module dp_syn_ram rtl 7 Compiling module ram_tb ctri_sim ram_tb Statemen spram sp_syn_ra Module Top level modules spram2 sp_syn_ra Module ram_th vsim work ram_tb spram3 sp_syn_ra Module vsim work ram tb dprami dp_syn_ra Module Loading work ram_tb Loading work sp_syn_ram rtli aU a N Loading work dp_syn_ram rtl Tea sms sis I Now 0ns Delta 0 simram_tb ModelSim SE Tutorial Viewing a memory Memories can be viewed via the ModelSim GUI 1 Open a Memory instance a Select View gt Memory from the Main window menu bar to open the Memory window The Memory List pane on the left side of the window lists the memories in the current design context ram_tb VHD
17. Creating the resource library T 45 Figure 27 Creating the new resource library Create a New Library E x Create anew library and a logical mapping to it a map to an existing library Library Name parts_li m Library Physical Name parts_lib OK Cancel ModelSim SE Tutorial T 46 Lesson 4 Working with multiple libraries 5 Compile the counter into the resource library a Click the Compile icon on the Main window toolbar b Select the parts_lib library from the Library list Figure 28 c Double click counter v d Click Done You now have aresource library containing acompiled version ofthe counter design unit 6 Change to the directory you created in step 2 a Select File gt Change Directory and change to the directory you created in step 2 ModelSim SE Tutorial Figure 28 Compiling into the resource library Library parts ib x 5b Lookin op counter J Brr File name eounter v Files of type HDL Files v v1 vhd vhdl vho hdi v Done Default Options Edit Source Creating the project Now you will create a project that contains fcounter v the counter s testbench 1 Create the project a b c d Select File gt New gt Project Type counter in the Project Name field Click OK If a dialog appears asking about which modelsim ini file to use click Use Default Ini Add the tes
18. Differences are noted with yellow highlighting Figure 108 ModelSim SE Tutorial Figure 108 Compare differences in the List window File Edit View Tools Window psy compare test_sm into lt gt into g E deltay 30000 0 DO0O00000000000000000000000000000 00000000000000000000000000000000 ooooc_ 95000 0 JDOO10O0000000000000000000000000000 O0100000000000000000000000000000 0000L 100000 0 OO10O0000000000000000000000000000 0O0100000000000000000000000000000 O000L 110000 0 00100000000000000000000000000000 0O0100000000000000000000000000000 Oooo 115000 0 OOO0O0000000000000000000000010000 00000000000000000000000000010000 O000C 120000 0 OO000000000000000000000000010000 00000000000000000000000000010000 130000 0 DO000000000000000000000000010000 00000000000000000000000000010000 135000 0 140000 0 150000 0 151000 1 155000 0 jO01O0000000000000000000000000000 00100000000000000000000000000000 160000 0 DO100000000000000000000000000000 00100000000000000000000000000000 170000 0 OO100000000000000000000000000000 00100000000000000000000000000000 0000L 171000 1 00100000000000000000000000000000 00100000000000000000000000000000 D000L SS Saving and reloading comparison data You can save comparison data for later viewing either in a text file or in files that can be reloaded into ModelSim To save comparison data so it can be reloaded into ModelSim you must save two files First you save the computed difference
19. ModelSim SE Tutorial Figure 32 Mapping to the parts_lib library Create a New Library a xi Create anew library and a logical mapping to it a map to an existing library Library Name parts_ib m Library Maps to C fexamples counter parts_lib yi Browse OK Cancel Permanently mapping resource libraries If you reference particular resource libraries in every project or simulation you may want to permanently map the libraries Doing this requires that you edit the master modelsim ini file in the installation directory Though you won t actually practice it in this tutorial here are the steps for editing the file 1 Locate the modelsim ini file in the ModelSim installation directory lt install_dir gt modeltech modelsim ini 2 IMPORTANT Make a backup copy of the file 3 Change the file attributes of modelsim ini so it is no longer read only 4 Open the file and enter your library mappings in the Library section For example parts_lib C libraries parts_lib 5 Save the file 6 Change the file attributes so the file is read only again Permanently mapping resource libraries T 51 ModelSim SE Tutorial T 52 Lesson 4 Working with multiple libraries Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation and close the project 1 Select Simulate gt End Simulation Click Yes 2 Select File gt Close gt
20. Project Click OK ModelSim SE Tutorial Lesson 5 Simulating designs with SystemC Topics The following topics are covered in this lesson Introduction u a 2 Design files for this lesson Related reading Setting up the environment Compiling and loading the example design Viewing SystemC items in the GUI Setting breakpoints and stepping in the Source window Lesson Wrap up gt Note In the current release SystemC works only on Linux HP and Sun platforms It is not yet available for AIX or Windows The functionality described in this tutorial requires a systemc license feature in your ModelSim license file Please contact your Mentor Graphics sales representatives if you currently do not have such a feature T 54 T 54 T 54 T 55 T 56 T 57 T 58 T 60 T 53 ModelSim SE Tutorial T 54 Lesson 5 Simulating designs with SystemC Introduction ModelSim treats SystemC as just another design language With only a few exceptions in the current release you can simulate and debug your SystemC designs the same way you do HDL designs Design files for this lesson The sample design for this lesson is a ring buffer where the testbench and top level chip are implemented in SystemC and the lower level modules are written in HDL The pathnames to the files are as follows SystemC Verilog lt install_dir gt modeltech examples systemc sc_vlog SystemC VHDL lt install_dir gt modeltech examples systemc
21. a Inthe Dataflow window make sure t_out is selected and then select Trace gt ChaseX The design expands to show the source of the unknown Figure 54 In this case there is a HiZ U in the VHDL version on input signal test_in and a 0 on input signal_rw bar_rw in the VHDL version so output signal test2 resolves to an unknown Scroll to the bottom of the Wave window and you will see that all of the signals contributing to the unknown value have been added 3 Clear the Dataflow window before continuing Tracing an X unknown T 77 Figure 53 A signal with unknown values CET ala Eile Edit View Insert Format Tools Window co tt Ben ho re a NW aaeanx BF LET jtop p addr_r ooooo000 00001 100 100 joo joo gt top p data_r 00 ftop p rw_r top p strb_r top p verbose top p t_out top p t_set 4b ftop pfry_out ftop pitest top pitest2 top p _rw 2820 ns Cursor 1 2065 ns J FI 870 ns to 2870 ns 1 Figure 54 ChaseX identifies the cause of the unknown on t_out LIL alox Eile Edit View Navigate Trace Tools Window Biru SPR OOCM he bHHHHM ABWAa QQ bu ANDEIT 9UF 28 ENT u yy ark test testin FE e AS sea Ker N Wi QQe Mr ftop p t_out top p test itop p 0 y top p id yl top p id bl 2820 ns 2785 ns N N Extended mode enabled Keep 1 top p t
22. 104 T 105 T 97 ModelSim SE Tutorial T 98 Lesson 9 Simulating with Performance Analyzer Introduction The Performance Analyzer identifies the percentage of simulation time spent in each section of your code With this information you can identify bottlenecks and reduce simulation time by optimizing your code Users have reported up to 75 reductions in simulation time after using the Performance Analyzer This lesson introduces the Performance Analyzer and shows you how to use the main Performance Analyzer commands Design files for this lesson The sample design for this lesson consists of a finite state machine which controls a behavioral memory The testbench test_sm provides stimulus The ModelSim installation comes with Verilog and VHDL versions of this design The files are located in the following directories Verilog lt install_dir gt modeltech examples profiler verilog VHDL lt install_dir gt modeltech examples profiler vhal This lesson uses the Verilog version for the examples If you have a VHDL license use the VHDL version instead Related reading ModelSim User s Manual Chapter 11 Performance Analyzer UM 407 Chapter 21 Tel and macros DO files UM 591 ModelSim SE Tutorial Compiling and loading the example design In this exercise you will use a DO file to compile and load the design 1 Create a new directory and copy the tutorial files into it Start by creating a new dire
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24. Tutorial T 110 Lesson 10 Simulating with Code Coverage 5 Load the design and run a Type vsim coverage test_sm at the ModelSim gt prompt b Type run 1 ms at the VSIM gt prompt When you load a design with Code Coverage enabled ModelSim adds several columns to the Files and sim tabs in the Workspace Figure 87 ModelSim also displays four Code Coverage panes in the Main window Figure 88 e Missed Coverage Displays the selected file s un executed statements branches conditions and expressions and signals that have not toggled e Current Exclusions Lists all files and lines that are excluded from coverage statistics see Excluding lines and files from coverage statistics T 116 for more information e Instance Coverage Displays statement branch condition expression and toggle coverage statistics for each instance in a flat non hierarchical view e Details Shows details of missed coverage such as truth tables or toggle details These panes can be re sized rearranged and undocked to make the data more easily viewable To resize a pane click and drag on the top or bottom border To move a pane click and drag on the double line to the right of the pane name Dragging a pane out of the Main window will undock that pane To redock the pane drag the pane back into the window by the double bar at the top of the pane window We will look at these panes more closely in the next exercise For complete detai
25. Value Addresses Increment C D t Start Px0000000c End 0x0000000e Aeree Random Fill Data Skip 24 25 26 0 word s OK Cancel Apply Figure 80 Changed contents for specified addresses memory default e lol x File Edit View Window Memory List X Address Data jeistean 00000000 Aam_tb spram1 mem 0 4095 on D Aam_tb spram2 mem 0 2047 TOTOE Aam_tb spram3 mem 0 65535 00000008 tam_tb spram4 mem 0 3 0000000a D ram_tb dpram1 mem 0 15 0000000c 0000000e linstance iram_tb dpramtr Address hexadecimal Data hexadecimal ModelSim SE Tutorial T 96 Lesson 8 Viewing and initializing memories Lesson Wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim SE Tutorial Lesson 9 Simulating with Performance Analyzer Topics The following topics are covered in this lesson Introduction 2 u Design files for this lesson Related reading Compiling and loading the example design Running the simulation Using the data to improve performance Filtering and saving the data Lesson wrap up gt Note The functionality described in this tutorial requires ModelSim SE and a profile license feature in your ModelSim license file Please contact your Mentor Graphics sales representatives for more information T 98 T 98 T 98 T 99 T 100 T 102 T
26. a folder before adding files you can specify in which folder you want a file placed at the time you add the file see Folder drop down in Figure 14 If you create a folder after adding files you edit the file properties to move it to that folder Adding folders As shown previously in Figure 13 the Add items to the Project dialog has an option for adding folders If you have already closed that dialog you can use a menu command to add a folder 1 Adda new folder Select File gt Add to Project gt Folder b Type Design Files in the Folder Name field Figure 19 c Click OK You ll now see a folder in the Project tab Figure 20 2 Add a sub folder a Right click anywhere in the Project tab and select Add to Project gt Folder b Type HDL in the Folder Name field Figure 21 c Click the Folder Location drop down arrow and select Design Files d Click OK Organizing projects with folders Figure 19 Adding a new folder to the project Add Folder xi r Folder Name 1b Folder Location Top Level Figure 20 A folder in a project oxi File Edit View Compile Simulate Tools Window Help Loading project test Compile of counter v was successful tcounter v v Verilog 1 Compile of tcounter v was successful counter v Y Verilog 0 2 compiles 0 failed with no errors Design Files Folder ModelSim gt Mess 2 Project Library Project test
27. and run the design a b Type do add_bkmrk do at the VSIM gt prompt Type run 1500 ns at the VSIM gt prompt The simulation runs and the DO file creates two bookmarks It also creates buttons labeled 1 and 2 on the Main window toolbar that jump to the bookmarks Figure 113 Click the buttons and watch the Wave window zoom on and scroll to the time when count is the value specified in the DO file Using Tcl with ModelSim T 141 Figure 113 Buttons added to the Main window toolbar Dr Modelsim File Edit View Compile Simulate Tools Window Help ER 10n HELE E est_counter dut Now 1 500 ns 3c counter test_counter Moduld 144000 72 E Count is 01001000 145001 72 Modu 145201 73 if 146000 73 Count is 01001001 147001 73 if 147201 74 148000 74 149201 75 VSIM 6 E sim test_counter 2 ModelSim SE Tutorial T 142 Lesson 12 Automating ModelSim Lesson Wrap up This concludes this lesson 1 Select File gt Quit to close ModelSim ModelSim SE Tutorial T 143 License Agreement IMPORTANT USE OF THIS SOFTWARE IS SUBJECT TO LICENSE RESTRICTIONS CAREFULLY READ THIS LICENSE AGREEMENT BEFORE USING THE SOFTWARE This license is a legal Agreement concerning the use of Software between you the end user either individually or as an authorized representative of the company acquiring the license and Mentor Graphics C
28. cn ST pay In 96 Cot 0 Read 4 ModelSim SE Tutorial T 102 Lesson 9 Simulating with Performance Analyzer Using the data to improve performance The information provided by the Performance Analyzer can be used to speed up the simulation In this example the repeated printing of data values to the screen is a significant burden to simulation A more efficient approach would be to print only fail messages when they occur and a single pass message at the end of a data block or the entire simulation run 1 Edit the source code to remove the repeated screen printing Uncheck Edit gt read only Source window to make the file editable b Comment out the repeated screen printing In Verilog change lines 96 97 so they look like this always outof any change of outof Sdisplay time outof h outof In VHDL change lines 189 192 so they look like this write msg_line NOW field gt 10 write msg_line msgl hwrite msg_line rd_data writeline OUTPUT msg_line 2 Save the file and re compile Select File gt Save Source window b Recompile the file For Verilog Type vlog test_sm v at the VSIM gt prompt For VHDL Type vcom test_sm vhd at the VSIM gt prompt 3 Re start and re run the design a Type restart f at the VSIM prompt b Type do profile_run do at the VSIM gt prompt The simulation time is reduced by almost 50 Figure 84 ModelSim SE Tutorial Figure 84 Simulat
29. lt 2 gt O x File Edit View Window Memory List x Address Data x Instance Range 00000000 06 03 00000002 a 1b ram_tbispramiimem 0 4095 00000004 1014 iram_tbispram imem 0 2047 00000008 20 21 sram_th spram3imem 0 65535 00000008 00000000 24 25 jram_th spram4 mem 0 3 00000008 26 27 D am_tbidprami men 0 15 N I oO H Ki mem Ni Instance Jram_th dpram1smem Address hexadecimal Data hexadecimal Figure 76 Changing memory contents for a range of addresses Change Memory x M Instance Name fram _thidpramt mem 2b r Address Range Fill ra ee C Value Addresses Bee ae s Increment Start Ox00000006 End 0x00000009 seen Random 2C Fill Data Skip nr 0 word s OK Cancel Apply Figure 77 Random contents of a range of addresses memory default lt 2 gt ioj xi File Edit View Window 2d Memory List x Address Data x Instance Range 00000000 06 03 00000002 7a 1b am_tbisprami mem 0 4095 00000004 D tram_thispram2imem 0 2047 otare ipt 0000000 J iram_tbispram3imem 0 65535 0000 000 54 25 Jram_thispram4imem 0 3 0000000e 26 27 D iram_thidpramtimem 0 15 x lol mem PAF Instance ram_tb dpramiimemn Address hexadecimal Data hexadecimal Change contents by highlighting You can also change data by highlighting them in the Address Data pane a Highlight the data
30. posedge clk ill_op x 123 posedge clk nop 124 K 125 176 Mean 070 el al ModelSim SE Tutorial T 114 Lesson 10 Simulating with Code Coverage d Hover your mouse pointer over a line of code with a green checkmark The icons change to numbers that indicate how many times the statements and branches in that line were executed Figure 95 In this case line 122 was executed 1562 times e Select View gt Show coverage numbers The icons are replaced by execution counts on every line Figure 96 An ellipsis is displayed whenever there are multiple statements on the line Hover the mouse pointer over a statement to see the count for that statement f Select View gt Show coverage numbers again to return to icon display ModelSim SE Tutorial Figure 95 Coverage numbers shown by hovering the mouse pointer EB source test_sm y File Edit View Tools Window x 116 G posedge clk rd wdi hl0 S 117 G posedge clk rdiwd h 0 S 118 posedge clk rd_wdi h30 wa 119 G posedge clk rd_wd h x 120 posedge clk rd_wd ho S 321 G posedge clk rd_wd ho5 1562 izz i posedge clk ill_op S 123 posedge clk nop e 124 end Y 190 Finn feran z alf test_sm v EEE gt Jin 26 Cot 0 Read Byinst Figure 96 Coverage numbers on every line fm souce tetamy o File Edit View Tools Window SEHE KH RR IA FF TAEL EEE M TP ia xl His act ojm
31. prior to running the simulation ModelSim is now ready to collect data on the run 2 Run the simulation via the DO file a Type do profile_run do at the VSIM gt prompt The status bar at the bottom of the Main window reports the number of Profile Samples taken as the simulation runs Make note of the run time reported in the Transcript Figure 81 You will use it later to compare how much you have increased simulation speed by tweaking the design Your times may differ from those shown here due to differing system configurations ModelSim SE Tutorial Figure 81 Note the run time reported in the Transcript uj Modelsim File Edit view Compile Simulate Tools Window Help instELELEL MP test_sm test_sm test_sm test_sm test_sm test_sm sm_seq hak arm 23999431 illegal op received 23999475 outof 000000cf 23999815 outof 000000aa 23999875 outof 000000bb 23999935 outof 000000cc 23999995 outof 000000cd Profiling paused 3750 samples taken 68 in user c ode 1061927158 HHHRHHH Now 24 ms Delta 2 sim test_sm 3 Display the performance data a Select Tools gt Profile gt View hierarchical profile This displays the Hierarchical Profile window Figure 82 The results differ between the Verilog and VHDL versions of the design In Verilog line 96 test_sm v 96 is taking the majority of simulation time In VHDL lines 192 and 84 are taking the majority of the
32. registered trademark and SPARCstation is a trademark of SPARC International Inc Sun Microsystems is a registered trademark and Sun SunOS and OpenWindows are trademarks of Sun Microsystems Inc All other trademarks and registered trademarks are the properties of their respective holders Copyright 1990 2004 Model Technology a Mentor Graphics Corporation company All rights reserved Confidential Online documentation may be printed by licensed customers of Model Technology and Mentor Graphics for internal business purposes only Model Technology 8005 Boeckman Road Bldg E4 Wilsonville OR 97070 USA phone 503 685 0820 fax 503 685 0910 e mail support model com sales model com home page http www model com support page http www model com support ModelSim SE Tutorial Table of Contents II von een eee earners aes abe eee ea eeu T 5 Lesson 1 ModelSim conceptual overview 222222 T 11 Lesson 2 Basic simulation 2 050 Rear ran T 19 Lesson 3 ModelSim projects 222222 nnn nennen nn T 31 Lesson 4 Working with multiple libraries 222222222220 T 43 Lesson 5 Simulating designs with SystemC T 53 Lesson 6 Viewing simulations in the Wave window T 61 Lesson 7 Debugging with the Dataflow window T 71 Lesson 8 Viewing and initializing memories T 81 Lesson 9 Simulating with Performance Analyzer
33. sc_vhal This lesson uses the SystemC Verilog version of the design in the examples If you have a VHDL license use the VHDL version instead There is also a mixed version of the design but the instructions here do not account for the slight differences in that version Related reading ModelSim User s Manual Chapter 7 SystemC simulation UM 187 Chapter 8 Mixed language simulations UM 209 Chapter 14 C Debug UM 473 ModelSim Command Reference sccom command CR 248 ModelSim SE Tutorial Setting up the environment SystemC is a licensed feature You need the systemc license feature in your ModelSim license file to simulate SystemC designs Please contact your Mentor Graphics sales representatives if you currently do not have such a feature The table below shows the supported operating systems for SystemC and the corresponding required versions of aC compiler Platform Supported compiler versions HP UX 11 0 or later aCC 3 45 with associated patches RedHat Linux 7 3 or later gcc 3 2 SunOS 5 6 or later gcc 3 2 See SystemC simulation in the ModelSim User s Manual for further details Setting up the environment T 55 ModelSim SE Tutorial T 56 Lesson 5 Simulating designs with SystemC Compiling and loading the example design With designs that contain SystemC objects you compile SystemC files using the sccom compiler and HDL files using vlog or vcom You also must lin
34. the Source window Make sure test_sm is selected in the sim tab of the Workspace b Inthe Statement tab of the Missed Coverage pane expand test_sm and select any line Figure 93 The Source window pops up with the line you selected highlighted in yellow Figure 94 c Switch to the Source window The table below describes the various icons Icon Description green checkmark indicates a statement that has been executed red X indicates that a statement in that line has not been executed zero hits indicates a line that has been excluded from code coverage statistics green E red Xr or Xp indicates that a true or false branch respectively of a conditional statement has not been executed Lines that contain unexecuted statements and branches are highlighted in pink Viewing statistics in the Source window T 113 Figure 93 Selecting a line in the Missed Coverage pane ae Missed Coverage Missed Statements test sm y 22 5 22 into 4 b0001 28 b0 23 posedge clk 24 5 into data endtask 100 Figure 94 Coverage statistics in the Source window i source test_sm v lol xj File Edit View Tools Window SEHE KH peA XOX HF ABER ia xi His lefn a A S 117 posedge clk rdiwd h 9 wa 118 iposedge clk rd _wd h 0 A 119 iposedge clk rd wdi h l Y 120 G posedge clk rd_wd ho PA 121 posedge clk rd_wd ho gt S 122
35. time p gt Note Your results may look slightly different as a result of the computer you re using and different system calls that occur during the simulation Also the line number reported in the Hierarchical Profile may be one or two lines off the actual source file This happens due to how the stacktrace is decoded on different platforms In the Hierarchical Profile window click on one of the lines that is taking a lot of time The Source window opens with that line number highlighted in the source code Figure 83 Running the simulation T 101 Figure 82 The Hierarchical Profile window EA Hierarchical Profile Maxi E Samples 4227 BA w undezf 24 Alan ELLI BER E test_sm v 96 Tel_Flush L Tel_Close Tel_DoOneEvent Tel_SericeEyvent Tel_NotifyChannel Tel_WaitForEvent E sm v 64 Tel_DoOneEvent L Te _waitForEvent Tel_Flush L Te _Close test_sm v 83 test_sm v 127 beh_sram v 13 sm_seq vi24 test_sm v 94 sm v 49 ye Ss mn N N 5 1 1 3 8 1 1 4 4 2 1 1 1 1 1 s seseseseNnnRoftowwod Figure 83 The Source window showing a line from the profile data lol xi File Edit View Tools Window Ssg HK BBO mM XOX E insa a a int sim test_sm test_sm 96 always outof any change of outof s7 display tftime outof h outof 98 99 integer i 100 101 qt qt 14 OO 102 103 tests 104 initial inc harin ee AH ex
36. to the Search Libraries field and browse to parts_lib in the first directory you created earlier in the lesson e Click Open The dialog should have parts_lib listed in the Search Libraries field Figure 31 f Click OK The design loads without errors ModelSim SE Tutorial T 50 Lesson 4 Working with multiple libraries Linking in VHDL To link to a resource library in VHDL you have to create a logical mapping to the physical library and then add LIBRARY and USE statements to the source file 1 Create a logical mapping to parts_lib a b c d Select File gt New gt Library In the Create a New Library dialog select a map to an existing library Type parts_lib in the Library Name field Click Browse and browse to parts_lib in the first directory you created earlier in the lesson The dialog should look similar to the one shown in Figure 32 Add LIBRARY and USE statements to tcounter vhd a Right click tcounter vhd in the Library tab and select Edit This opens the file in the Source window Add these two lines to the top of the file LIBRARY parts_lib USE parts_lib ALL Select File gt Save Recompile and simulate a In the Project tab of the Main window right click tcounter vhd and select Compile gt Compile Selected In the Library tab of the Main window click the icon next to the work library and double click test_counter The design loads without errors
37. units Compiling your design After creating the working library you compile your design units into it The ModelSim library format is compatible across all supported platforms You can simulate your design on any platform without having to recompile your design Running the simulation With the design compiled you invoke the simulator on a top level module Verilog or a configuration or entity architecture pair VHDL Assuming the design loads successfully the simulation time is set to zero and you enter a run command to begin simulation ModelSim SE Tutorial T 14 Introduction Debugging your results If you don t get the results you expect you can use ModelSim s robust debugging environment to track down the cause of the problem ModelSim SE Tutorial Project flow T 15 Project flow A project is a collection mechanism for an HDL design under specification or test Even though you don t have to use projects in ModelSim they may ease interaction with the tool and are useful for organizing files and specifying simulation settings The following diagram shows the basic steps for simulating a design within a ModelSim project As you can see the flow is similar to the basic simulation flow However there are two important differences e You do not have to create a working library in the project flow it is done for you automatically e Projects are persistent In other words they will open every time you invoke Model
38. up gt Note The functionality described in this tutorial requires a dataflow license feature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 72 T 72 T 73 T 74 T 75 T 77 T 78 T 79 T 71 ModelSim SE Tutorial T 72 Lesson 7 Debugging with the Dataflow window Introduction The Dataflow window allows you to explore the physical connectivity of your design to trace events that propagate through the design and to identify the cause of unexpected outputs The window displays processes signals nets and registers and interconnect Design files for this lesson The sample design for this lesson is a testbench that verifies a cache module and how it works with primary memory A processor design unit provides read and write requests The pathnames to the files are as follows Verilog lt install_dir gt modeltech examples dataflow verilog VHDL lt install_dir gt modeltech examples dataflow vhdl This lesson uses the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Verilog and VHDL versions of the design Related reading ModelSim User s Manual Dataflow window UM 270 ModelSim SE Tutorial Compiling and loading the example design In this exercise you will use a DO file to compile and load the design 1 Create a new director
39. 00000000000000000 Iram_tbispram tnem 10 85535 252 00000000000000000000000000000001 vam_tbispramdimem 0 1 253 00000000000000000000000000000010 f 254 00000000000000000000000000000011 ram_tbidpramt mem 0 15 255 00000000000000000000000000000100 N a mem mem T mem 2 Ny Instance ram_th spram3 mem Address decimal Data symbolic ModelSim SE Tutorial T 94 Lesson 8 Viewing and initializing memories Interactive debugging commands The memory window can be used interactively for a variety of debugging purposes The features described in this section are useful for this purpose 1 Open a memory instance and change its display characteristics Click on the ram_tb dpram1 instance in the Memory window a b Select View gt Display Options to bring up the dialog box c Change the Data Radix to Hexadecimal d Select Words per line and enter 2 e Click OK 2 Initialize a range of memory addresses from a fill pattern Select Edit gt Change from the Memory window menu bar Figure 76 b Click the Addresses radio button and enter the start address as 0x00000006 and the end address as 0x00000009 The Ox hex notation is optional c Select Random as the Fill Type d Enter 0 as the Fill Data setting the seed for the Random pattern e Click OK The data in the specified range are replaced with a generated random fill pattern Figure 77 ModelSim SE Tutorial Figure 75 Original memory contents memory default
40. 00000000000000000010101010 sim test_sm into 00000000000000000000000010101011 Diff number 2 From time 135 ns delta O to time 155 ns gold test_sm into 0 0 sim test_sm into 0 1 Diff number 3 From time 171 ns delta 1 to time 191 ns gold test_sm dat D0000000000000000000000010101010 sim test_sm dat 00000000000000000000000010101011 Diff number 4 From time 171 ns delta 1 to time 191 ns gold test_sm dat 0 StO sim test_sm dat 0 Sti Diff number 5 From time 409 ns delta 1 to time 411 ns gold test_sm dat 00000000000000000000000010101010 sim test_sm dat D0000000000000000000000010101011 Diff number 6 From time 409 ns delta 1 to time 411 ns gold test_sm dat 0 sto sim test_sm dat 0 Sti Diff number 7 From time 431 ns delta 1 to time 491 ns delta wnli jenne amlant minn NNNNNNNNNNNNNNNNNNNANNNNNININININ Figure 110 Reloading saved comparison data Reload and Redisplay Compare Differences Ioj Xx m Waveform Rules file name compare rul Browse m Waveform Difference file name compare cif Browse OK Cancel ModelSim SE Tutorial T 130 Lesson 11 Waveform Compare Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation and close the gold wif dataset 1 Type quit sim at the VSIM gt prompt 2 Type dataset close gold at the ModelSim gt prompt ModelSim SE Tutorial Lesson 12 Automating ModelSim Topics The f
41. 1 ns cursor name cursor value cursor ModelSim SE Tutorial Loading a design For the examples in this lesson we have used the design simulated in Chapter Lesson 2 Basic simulation 1 Ifyou just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close 2 Load the design a Select File gt Change Directory and open the directory you created in Lesson 2 The work library should already exist b Click the icon next to the work library and double click test_counter ModelSim loads the design and adds sim and Files tabs to the Workspace Loading a design T 63 ModelSim SE Tutorial T 64 Lesson 6 Viewing simulations in tne Wave window Adding items to the Wave window ModelSim offers several methods for adding items to the Wave window In this exercise you ll try out different methods 1 Add items from the Signals window a Select View gt Wave to open the Wave window b Select View gt Signals to open the Signals window c Inthe Signals window select Add gt Wave gt Signals in Design ModelSim adds three signals to the Wave window d Inthe Wave window select Edit gt Select All and then Edit gt Delete This deletes all items in the window 2 Add items using drag and drop You can drag an item to the Wave window from many other
42. 5 organizing with folders T 37 simulation configurations T 39 Q quit command T 48 R radix command T 85 reference dataset Waveform Compare T 123 reference signals T 122 run all T 26 run command T 25 S saving simulation options T 39 simulation basic flow overview T 13 Code Coverage T 107 comparing runs T 121 restarting T 27 running T 25 simulation configurations T 39 Standard Developer s Kit User Manual T 7 startup DO file T 135 stepping after a breakpoint T 28 Support T 8 SystemC T 53 compiling designs T 56 setting up the environment T 55 supported platforms T 55 viewing in the GUI T 57 T Tcl using in ModelSim T 140 Technical support and updates T 8 test dataset Waveform Compare T 124 test signals T 122 time measuring in Wave window T 66 toggle statistics Signals window T 115 tracing events T 75 tracing unknowns T 77 U unknowns tracing T 77 V vcom command T 83 verror command T 48 vlib command T 83 vlog command T 83 vsim command T 21 W Wave window T 61 adding items to T 64 cursors T 66 measuring time with cursors T 66 saving format T 69 zooming T 65 Waveform Compare T 121 reference signals T 122 saving and reloading T 129 test signals T 122 working library creating T 13 T 21 X X values tracing T 77 Z zooming Wave window T 65 T 151 ModelSim SE Tutorial T 152 Index ModelSim SE Tutorial
43. 50 e For Address Radix select Decimal and for Data Radix select Binary f Click No addresses to create a memory pattern that you can use to relocate somewhere else in the memory or in another memory g Enter the file name as reloc mem h Click OK You will use this file for initialization in the next section Saving memory contents to a file Figure 70 Saving a relocatable memory file T 91 gt Instance Name fram_th spram2 mem File Browser Filter Directories ork N 17 File name ale MTl memory tutorial examples vlog_memory_donna mem Files data_mem mem Address Range C All Addresses Start D End 250 File Format C Verilog Hex C Verilog Binary MTI Address Radix Data Radix C Hexadecimal C Symbolic Decimal Binary C Octal Ir Decimal C Unsigned Hexadecimal M No addresses Compress 2d 2f Foe xe ModelSim SE Tutorial T 92 Lesson 8 Viewing and initializing memories Initializing a memory In ModelSim it is possible to initialize a memory using one of three methods from a saved memory file from a fill pattern or from both First let s initialize a memory from a file only You will use one you saved previously data_mem mem 1 View instance ram_tb spram3 a Click on the ram_tb spram3 instance in the Memory window Scan the contents so you can identify changes once the initialization is
44. Branch Cond Togl Statement Coverage Inst Coverage Enabled test_sm sm_seqO 5 Stmt Branch Cond Togl Statement Coverage Inst Coverage Enabled test_sm 4 Stmt Branch Cond Togl ModelSim SE Tutorial T 118 Lesson 10 Simulating with Code Coverage 2 Create a summary report on all design files from the Transcript pane Figure 102 A summary report of all files Type coverage report file cover txt at the VSIM gt prompt EE b Type notepad cover txt at the VSIM gt prompt to view the report Figure File Edit Window 102 report txt c Close Notepad when you are done reviewing the report Coverage Report Summary Data by file Statement Coverage File beh sram w Branch Coverage File Branches beh sram w Condition Coverage File CT Rows beh sram w Statement Coverage File ModelSim SE Tutorial Lesson wrap up T 119 Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Type quit sim at the VSIM gt prompt ModelSim SE Tutorial T 120 Lesson 10 Simulating with Code Coverage ModelSim SE Tutorial Lesson 11 Waveform Compare Topics The following topics are covered in this lesson Introduction Design files for this lesson Related reading Creating the test dataset Verilog VHDL Comparing the simulation runs Viewing comparison data p Viewing comparison data in the Main window Viewing comparison data i
45. ETEINERNZTEFT BPR Workspace x Instance Loading work systemc s0 Loading work test_ringbuf E test_ringbuf test Loading work ringbuf clk oe _ Loading work control ring_INST ring Loading work store i Loading work retrieve view view wave Ha N a VsIM27 gt gt a sim Now Ons Delta 0 SE simvtest_ringbuffclk ModelSim SE Tutorial T 58 Lesson 5 Simulating designs with SystemC Setting breakpoints and stepping in the Source window As with HDL files you can set breakpoints and step through SystemC files in the Source window In the case of SystemC ModelSim uses C Debug an interface to the open source gdb debugger Please see the C Debug chapter in the ModelSim User s Manual for complete details 1 Set a breakpoint on line 142 of test_ringbuf h a If necessary select test_ringbuf in the Main window workspace b Inthe Source window scroll to line 142 and click on or to the left of the line number ModelSim recognizes that the file contains SystemC code so it automatically launches C Debug Once the debugger is running ModelSim places a solid red diamond next to the line number Figure 35 2 Run and step through the code a Type run 500 at the VSIM gt prompt When the simulation hits the breakpoint it stops running highlights the line with an arrow in the Source window Figure 36 and issues the following message in the Main window
46. F je wr um top p strb 2820 ns 2665 ns H N eeen h Extended mode enabled Keep 1 ftop p ASSIGN 16 1 ModelSim SE Tutorial Tracing an X unknown The Dataflow window lets you easily track an unknown value X as it propagates through the design The Dataflow window is linked to the stand alone Wave window so you can view signals in the Wave window and then use the Dataflow window to track the source of a problem As you traverse your design in the Dataflow window appropriate signals are added automatically to the Wave window 1 View t_out in the Wave and Dataflow windows a Scroll in the Wave window until you can see top p t_out t_out goes to an unknown state at 2065 ns and continues transitioning between 1 and unknown for the rest of the run Figure 53 The red color of the waveform indicates an unknown value b Double click the last transition of signal t_out at 2785 ns This automatically opens the Dataflow window and displays t_out its associated process and its waveform You may need to increase the size of the Dataflow window and scroll the panes to see everything c Move the cursor in the Wave window As previously mentioned the Wave and Dataflow windows are designed to work together As you move the cursor in the Wave the value of t_out changes in the Dataflow window d Move the cursor to a time when t_out is unknown e g 2724 ns 2 Trace the unknown
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48. H RESPECT TO ModelSim SE Tutorial A SERVICES B SOFTWARE WHICH IS LICENSED TO YOU FOR A LIMITED TERM OR LICENSED AT NO COST OR C EXPERIMENTAL BETA CODE ALL OF WHICH ARE PROVIDED AS IS 5 2 THE WARRANTIES SET FORTH IN THIS SECTION 5 ARE EXCLUSIVE NEITHER MENTOR GRAPHICS NOR ITS LICENSORS MAKE ANY OTHER WARRANTIES EXPRESS IMPLIED OR STATUTORY WITH RESPECT TO SOFTWARE OR OTHER MATERIAL PROVIDED UNDER THIS AGREEMENT MENTOR GRAPHICS AND ITS LICENSORS SPECIFICALLY DISCLAIM ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE AND NON INFRINGEMENT OF INTELLECTUAL PROPERTY LIMITATION OF LIABILITY EXCEPT WHERE THIS EXCLUSION OR RESTRICTION OF LIABILITY WOULD BE VOID OR INEFFECTIVE UNDER APPLICABLE LAW IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS BE LIABLE FOR INDIRECT SPECIAL INCIDENTAL OR CONSEQUENTIAL DAMAGES INCLUDING LOST PROFITS OR SAVINGS WHETHER BASED ON CONTRACT TORT OR ANY OTHER LEGAL THEORY EVEN IF MENTOR GRAPHICS OR ITS LICENSORS HAVE BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES IN NO EVENT SHALL MENTOR GRAPHICS OR ITS LICENSORS LIABILITY UNDER THIS AGREEMENT EXCEED THE AMOUNT PAID BY YOU FOR THE SOFTWARE OR SERVICE GIVING RISE TO THE CLAIM IN THE CASE WHERE NO AMOUNT WAS PAID MENTOR GRAPHICS AND ITS LICENSORS SHALL HAVE NO LIABILITY FOR ANY DAMAGES WHATSOEVER LIFE ENDANGERING ACTIVITIES NEITHER MENTOR GRAPHICS NOR ITS LICENSORS SHALL BE LIABLE FOR ANY DAMAGES RESULTING
49. IRE U I U af Jinstance ram_tb spram1 mem Address hexadecimal Data symbolic ModelSim SE Tutorial T 86 Lesson 8 Viewing and initializing memories 2 Simulate the design a Click the run all icon in the Main window The Address Data pane updates to show values from instance ram_tb spraml Figure 61 VHDL In the transcript window you will see an assertion failure that is functioning to stop the simulation The simulation itself has not failed You can open additional memory instances by selecting an instance in either the Main window Signals window or Structure window and dragging and dropping it into the Memory window 3 Open a second memory instance from the Main window a Inthe Main window drag and drop spram2 into the Address Data pane ofthe Memory window The contents of spram2 is displayed and a new tab is added to the bottom ofthe Address Data pane Figure 62 The Memory List now displays only the ram_tb spram2 instance b Reset the Memory List view to ram_tb Click on the ram_tb module in the Main window sim tab ModelSim SE Tutorial Figure 61 Memory display updates with simulation memory default Fa File Edit View Window Memory List x Address Data x Instance Range ram_tbisprami memn 0 4095 D ram_tbispram2 mem 0 2047 2 fram_tbh spram3 mem 0 65535 Jram_tb spram4 mem 0 3 sram_th dpramt mem 0 15 N NT instance dam _tbhispr
50. L The radix for enumerated types is Symbolic To change the radix to binary for the purposes of this lesson type the following command at the vsim prompt VSIM gt radix bin Select the ram_tb spram1 instance in the Memory List to view its contents in the Address Data pane The data are all X 0 in VHDL since you have not yet simulated the design Figure 59 In the Main window sim tab as shown in Figure 58 above select instance spram2 The Memory List pane in the Memory window updates automatically to display spram2 Figure 60 However the Address Data pane still shows the contents of instance spram because you have not yet opened the spram2 memory instance By default the Memory List updates dynamically to display memories from the current context i e the current design unit You can make the Memory List static by fixing it to a particular context To do this you would select File gt Environment gt Fix to current context For the purposes of this tutorial you will leave the view dynamic Figure 59 Viewing the memory instance memory default Viewing amemory T 85 File Edit View Window Memory List 00000000 00000004 00000008 0000000c 00000010 00000014 00000018 0000001c 00000020 00000024 00000025 0000002c 00000030 00000034 00000038 Data XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXX
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52. Model Sim SE Tutorial Version 5 8d Published 8 Mar 04 The world s most popular HDL simulator T 2 ModelSim VHDL ModelSim VLOG ModelSim LNL and ModelSim PLUS are produced by Model Technology a Mentor Graphics Corporation company Copying duplication or other reproduction is prohibited without the written consent of Model Technology The information in this manual is subject to change without notice and does not represent a commitment on the part of Model Technology The program described in this manual is furnished under a license agreement and may not be used or copied except in accordance with the terms of the agreement The online documentation provided with this product may be printed by the end user The number of copies that may be printed is limited to the number of licenses purchased ModelSim is a registered trademark and Signal Spy TraceX ChaseX and Model Technology are trademarks of Mentor Graphics Corporation PostScript is a registered trademark of Adobe Systems Incorporated UNIX is a registered trademark of AT amp T in the USA and other countries FLEXIm is a trademark of Macrovision Inc IBM AT and PC are registered trademarks AIX and RISC System 6000 are trademarks of International Business Machines Corporation Windows Microsoft and MS DOS are registered trademarks of Microsoft Corporation OSF Motif is a trademark of the Open Software Foundation Inc in the USA and other countries SPARC is a
53. ModelSim 5 8 ap IMPORTANT Info 2 ats Key Information IMPORTANT Information Product Changes New Features The VHDL default is now 2002 Compiling with the 87 switch disables support for VHDL 1993 and 5 era 2002 93 disables support for VHDL 1987 and 2002 and 2002 specifies support for VHDL 2002 default The Verilog default is now 2001 Compiling with the vlog95compat switch eliminates both Verilog 2001 and SystemVerilog keywords compiling with the sv switch enables recognition of SystemVerilog keywords Key Information Platform licensing and library recompile details Product Changes Code Coverage statement coverage is the only metric on by default Additional changes in ModelSim functionality View full release notes in web browser Ki i Don t show this dialog again Serene Jumpstart M Close Figure 2 The Create a New Library dialog Create a New Library FE Create a map to an existing library Library Name work 3b Library Physical Name work Cancel T 21 ModelSim SE Tutorial T 22 Lesson 2 Basic simulation c Click OK ModelSim creates a directory called work and writes a specially formatted file named _info into that directory The _info file must remain in the directory to distinguish it as a ModelSim library Do not edit the folder contents from your operating system all changes should be made from within ModelSim
54. Rommo 11 Ten 00000000000000000000000000101000 00000000000000000000000000101001 00000000000000000000000000101010 00000000000000000000000000101011 00000000000000000000000000101100 00000000000000000000000000101101 00000000000000000000000000101110 00000000000000000000000000101111 00000000000000000000000000110000 00000000000000000000000000110001 00000000000000000000000000110010 O0000000000000000000000000110011 serien LL y Address decimal Data symbolic In this next step you will experiment with loading from both a file and a fill pattern You will initialize spram3 with the 250 addresses of data you saved previously into the relocatable file reloc mem You will also initialize 50 additional address entries with a fill pattern 3 Load the ram_tb spram3 instance with a relocatable memory pattern reloc mem and a fill pattern Select File gt Load to bring up the Load Memory dialog box Figure 73 a b For Load Type select Both File and Data c For File Load select reloc mem from the Files list d Select Addresses and enter 0 as the start address and 300 as the end address This means that you will be loading the file from 0 to 300 However the reloc mem file contains only 251 addresses of data Addresses 251 to 300 will be loaded with the fill data you specify next e For Fill Type select Increment f Inthe Fill Data field set the seed value of 0 for the incrementing data g Click OK h View the data near addr
55. Sim unless you specifically close them ModelSim SE Tutorial T 16 Introduction Multiple library flow ModelSim uses libraries in two ways 1 as a local working library that contains the compiled version of your design 2 as a resource library The contents of your working library will change as you update your design and recompile A resource library is typically static and serves as a parts source for your design You can create your own resource libraries or they may be supplied by another design team or a third party e g a silicon vendor You specify which resource libraries will be used when the design is compiled and there are rules to specify in which order they are searched A common example of using both a working library and a resource library is one where your gate level design and testbench are compiled into the working library and the design references gate level models in a separate resource library The diagram below shows the basic steps for simulating with multiple libraries You can also link to resource libraries from within a project If you are using a project you would replace the first step above with these two steps create the project and add the testbench to the project ModelSim SE Tutorial Debugging tools T 17 Debugging tools ModelSim offers numerous tools for debugging and analyzing your design Several of these tools are covered in subsequent lessons including e Setting breakpoints and stepp
56. T 35 compiling your design T 13 T 23 cover argument T 109 coverage argument T 110 coverage report command T 118 coverage statistics T 107 cursors Wave window T 66 D Dataflow window T 71 displaying hierarchy T 78 expanding to drivers readers T 74 options T 78 tracing events T 75 tracing unknowns T 77 dataset close command T 130 design library working type T 16 do command T 56 DO files T 131 startup file T 135 documentation T 7 drivers expanding to T 74 E error messages more information T 48 external libraries linking to T 48 F folders in projects T 37 format saving for Wave window T 69 G gcc T 55 H hierarchical profile Performance Analyzer T 103 hierarchy displaying in Dataflow window T 78 ModelSim SE Tutorial T 150 Index L libraries design library types T 16 linking to external libraries T 48 mapping to permanently T 51 resource libraries T 16 working libraries T 16 working creating T 21 linking to external libraries T 48 M macros T 131 manuals T 7 mapping libraries permanently T 51 memories changing values T 94 initializing T 92 viewing T 81 memory contents saving to a file T 90 Memory window T 81 N notepad command T 129 NumericStd warnings disabling T 83 O options simulation T 39 P Performance Analyzer T 97 filtering data T 104 ModelSim SE Tutorial physical connectivity T 74 projects T 31 adding items to T 34 creating T 33 flow overview T 1
57. X XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 4 gt f mem 4 Address hexadecimal Data symbolic Instance ram_tb spram1 mem 1c Figure 60 Memory List shows ram_tb spram2 memory default Fie Edit view Window Memory List X Address 00000000 Aam_tb spram2 mem 0 2047 paei 00000008 0000000c 00000010 00000014 00000018 0000001c 00000020 00000024 00000028 0000002c 00000030 00000034 00000038 Data XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX 3 UM nen
58. _sm Loading work test_sm Loading work sm_seq Loading work sm Loading work beh_sram 5 illegal op received 711 illegal op received dataset open C Modeltech_5 7b examples fsm_ver gold wif gold C Modeltech_5 7b examples fsm_ver gold wif opened as datas et gold compare start gold sim compare options track compare add recursive all wave Created 11 comparisons compare run Computing waveform differences from time 0 ps to 750 ns Found 12 differences cl REESE 2i Library sim Files gold compare VSIM 27 gt fl gold test_sm Figure 106 Comparison items in the Wave window LX ox File Edit View Insert Format Tools Window sim test_sm loop sim test_sm i sim test_sm td_ sim test_sm wr_ compare test_sm i compare test_sm compare test_sm r compare test_sm compare test_sm compare test_sm compare test_sm Pr we ae BA EA ma ae EA EA EA 448900 ps to 455300 ps Figure 107 The compare icons Keen ModelSim SE Tutorial T 128 _ Lesson 11 Waveform Compare Viewing comparison data in the List window You can also view the results of your waveform comparison in the List window 1 Add comparison data to the List window Select View gt List from the Main window menu bar b Drag the test_sm comparison object from the compare tab of the Main window to the List window c Scroll down the window
59. a Open test_sm vhd in the Source window Select Edit gt read only to make the file writable Scroll to line 142 which looks like this wt_wd 16 10 16 aa clk into and change the data pattern aa to ab Line 142 should look like this wt_wd 16 10 16 ab clk into Select File gt Save to save the file Compile the revised file and rerun the simulation Type do sec_sim do at the ModelSim gt prompt The DO file does the following e Re compiles the testbench e Adds waves to the Wave window e Runs the simulation Creating the test dataset T 125 ModelSim SE Tutorial T 126 Lesson 11 Waveform Compare Comparing the simulation runs ModelSim includes a Comparison Wizard that walks you through the process You can also configure the comparison manually with menu or command line commands 1 Create a comparison using the Comparison Wizard a Select Tools gt Waveform Compare gt Comparison Wizard b Click the Browse button and select gold wif as the reference dataset Figure 103 Recall that gold wif is from the first simulation run Leaving the test dataset set to Use Current Simulation click Next d Select Compare All Signals in the second dialog and click Next Figure 104 e Inthe next three dialogs click Next Compute Differences Now and Finish respectively ModelSim performs the comparison and displays the compared signals in the Wave window ModelSim SE Tut
60. a Select File gt Save in the Memory window to bring up the Save Memory dialog box Figure 69 Note that MTI is the default File Format b For the Address Radix select Decimal c For the Data Radix select Binary d Type data_mem mem into the Filename field e Click OK You can view the saved file in any editor Memory pattern files can be saved as relocatable files simply by leaving out the address information Relocatable memory files can be loaded anywhere in a memory because no addresses are specified ModelSim SE Tutorial Figure 69 Save Memory dialog box save Memory A gt Instance Name fram_th spram1 mem File Browser Filter Directories Jale MTl memory tutorial examples vlog_memory_donna mnem Files Address Range All C Addresses A Start 0 End 4095 ork File Format Verilog Hex C Verilog Binary MTI Address Radix Data Radix Hexadecimal C Symbolic Decimal ie Binary C Octal Decimal C Unsigned x A z Pr Hexadecimal File name No addresses data_mem mem i Compress OK Cancel T t 1d 1b te 2 Save a relocatable memory pattern file Click on the ram_tb spram2 instance in the Memory List pane b Select View gt Display Options to set the Address Radix of this file to Decimal Click OK c Select File gt Save to bring up the Save Memory dialog box Figure 70 d Specify start of address as 0 and end address as 2
61. a of the Main window and the Add items to the Project dialog will appear Figure 13 From this dialog you can create a new design file add an existing file add a folder for organization purposes or create a simulation configuration discussed below 1 Add two existing files a Click Add Existing File This opens the Add file to Project dialog Figure 14 This dialog lets you browse to find files specify the file type specify which folder to add the file to and identify whether to leave the file in its current location or to copy it to the project directory b Click Browse c Open the examples directory in your ModelSim installation tree d Select counter v hold the lt Ctrl gt key down and then select tcounter v e Click Open and then OK f Click Close to dismiss the Add items to the Project dialog ModelSim SE Tutorial Figure 13 Adding new items to a project LI ox File Edit View Compile Simulate Tools Window Help Add items to the Project r x Click on the icon to add items of that type EE nme Ste Type N Create New File Add Existing File M 9 Create Simulation Create New Folder SSSISSSSS Project Library Project test lt No Design Loaded gt lt Mo Context gt 1a Figure 14 The Add File to Project dialog Add file to Project E File Name tcounter v counter y Browse 1b Add file as type Folder defaut Top Level 7
62. added cursors set etc are discarded However you can use the Save Format command to capture the current Wave window display and signal preferences to a DO file You open the DO file later to recreate the Wave window as it appeared when the file was created Format files are design specific use them only with the design you were simulating when they were created 1 Save a format file a Select File gt Save gt Format b Leave the file name set to wave do and click Save c Close the Wave window 2 Load a format file a Inthe Main window select View gt Wave All signals and cursor s that you had set are gone b Inthe Wave window select File gt Open gt Format c Select wave do and click Open ModelSim restores the window to its previous state d Close the Wave window when you are finished by selecting File gt Close Saving the window format T 69 ModelSim SE Tutorial T 70 Lesson 6 Viewing simulations in tne Wave window Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim SE Tutorial Lesson 7 Debugging with the Dataflow window Topics The following topics are covered in this lesson Introduction Related reading Compiling and loading the example design Exploring connectivity Tracing events Tracing an X unknown Displaying hierarchy in the Dataflow window Lesson Wrap
63. aflow window ModelSim SE Tutorial Lesson 8 Viewing and initializing memories Topics The following topics are covered in this lesson Introduction Related reading Compiling and loading the design Viewing a memory Navigating within the memory Saving memory contents to a file Initializing a memory Interactive debugging commands Lesson Wrap up T 82 T 82 T 83 T 85 T 88 T 90 T 92 T 94 T 96 T 81 ModelSim SE Tutorial T 82 Lesson 8 Viewing and initializing memories Introduction In this lesson you will learn how to view and initialize memories in ModelSim ModelSim defines and lists as memories any of the following e reg wire and std_logic arrays e Integer arrays e Single dimensional arrays of VHDL enumerated types other than std_logic gt Note This lesson uses the Verilog files dp_syn_ram v ram_tb v and sp_syn_ram v in the examples If you are a VHDL user use dp_syn_ram vhd ram_tb vhd and sp_syn_ram vhd instead Related reading ModelSim User s Manual Memory window UM 302 ModelSim Command Reference mem display CR 192 mem load CR 195 mem save CR 198 radix CR 235 commands ModelSim SE Tutorial Compiling and loading the design 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all f
64. al net or register 1 Adda signal to the Dataflow window a Make sure instance p is selected in the sim tab of the Main window b Drag signal strb from the Signals window to the Dataflow window Figure 47 2 Explore the design a Double click the net highlighted in red The view expands to display the processes that are connected to strb Figure 48 b Select signal test on process NAND 41 labeled line_62 in the VHDL version and click the Expand net to all drivers icon Notice that after the display expands the signal line for strb is highlighted in green This highlighting indicates the path you have traversed in the design c Select signal oen on process ALWAYS 146 labeled line_75 in the VHDL version and click the Expand net to all readers icon Continue exploring if you wish When you are done click the Erase All icon ModelSim SE Tutorial Figure 47 A signal in the Dataflow window CI stolx Eile Edit View Navigate Trace Tools Window Si BBQ M le o kE AAA Q a mm Extended mode enabled Keep 1 top p strb gt Figure 48 Expanding the view to display connected processes Dedataton T Eile Edit View Navigate Trace Tools Window SRH SRAM fe hE ZARA Q amp Bo ml ng PANDA a tote PALWVAYSHH 46 strb wen Extended mode enabled Keep 1 top p strb Tracing events Another useful debugging feature is tracing events that contribute to an unexpected output value Us
65. ami smem Address hexadecimal Data symbolic 00000000 00101000 00101001 00000002 00101010 00101011 00000004 00101100 00101101 00000006 00101110 00101111 00000008 00110000 00110001 00000003 00110010 00110011 o000000c 00110100 00110101 0000000e 00110110 00110111 00000010 00111000 00111001 00000012 00111010 00111011 00000014 00111100 00111101 len I Figure 62 View of spram2 data dragged from Main window memory default 3 lolx File Edit View Window Memory List in ance m 0 st gt BEM 00000000 00000002 00000004 00000006 00000008 00000003 0000000c 0000000e 00000010 00000012 00000014 00000016 00000018 0000001a Kann x Instance ram_tb spram2 mem 00010001100101000 00010001100101010 00010001100101100 00010001100101110 00010001100110000 00010001100110010 00010001100110100 00010001100110110 000100011001119000 00010001100111110 00010001101000000 00010001101000010 Address hexadecimal 00010001100101001 00010001100101011 00010001100101101 00010001100101111 00010001100110001 00010001100110011 00010001100110101 00010001100110111 00010001100111001 00010001100111011 00010001100111101 0010001100111111 010001101000001 10001101000011 x 4 J gt j 3a Data symbolic 4 Viewing amemory T 87 Let s change the address radix and the number of words per line for the Figure 63 Display Options dialog box ram_tb spramI memory instance Display Option
66. amming in Tcl and Tk Brent B Welch Copyright 1997 ModelSim SE Tutorial Creating a simple DO file Creating DO files is as simple as typing the commands in a text file Alternatively you can save the Main window transcript as a DO file In this exercise you will use the transcript to create a DO file that adds signals to the Wave window provides stimulus to those signals and then advances the simulation 1 Load the test_counter design unit a If necessary start ModelSim b Change to the directory you created in Chapter Lesson 2 Basic simulation c Inthe Library tab of the Main window double click the test_counter design unit to load it d Select File gt Transcript gt Clear Transcript to clear the transcript 2 Enter commands to add signals to the Wave window force signals and run the simulation a Enter the following commands one at a time at the VSIM gt prompt in the Main window add wave count add wave clk add wave reset force freeze clk 0 0 1 50 ns r 100 force reset 1 run 100 force reset 0 run 300 force reset 1 run 400 force reset 0 run 200 3 Save the transcript a Select File gt Transcript gt Save Transcript As b Type sim do in the File name field and save it to the current directory Creating a simple DO file T 133 ModelSim SE Tutorial T 134 Lesson 12 Automating ModelSim 4 View the DO file a Type edit sim do at the VSIM prompt The DO file opens in either the Source w
67. ance in the Window Preferences dialog select Tools gt Window Preferences e Inthe cursor pane drag the cursor to the right of a transition Figure 42 The cursor doesn t snap to a transition if you drag in the cursor pane ModelSim SE Tutorial Figure 42 Working with a single cursor in the Wave window LT lolx File Edit View Insert Format Tools Window test_counter clk test_counter reset test_counter count COORDS RI BERANE WA A NS 0 ns to 783 ns 1e 2 Rename the cursor a Right click Cursor 1 in the cursor name pane and select and delete the text Figure 43 b Type A and press Enter The cursor name changes to A 3 Jump the cursor to the next or previous transition a Click signal count in the pathname pane a Click the Find Next Transition icon on the Wave window toolbar The cursor jumps to the next transition on the currently selected signal b Click the Find Previous Transition icon on the Wave window toolbar The cursor jumps to the previous transition on the currently selected signal Working with multiple cursors 1 Add a second cursor a Click the Add Cursor icon on the Wave window toolbar b Right click the name of the new cursor and delete the text Type B and press Enter d Drag cursor B and watch the interval measurement change dynamically Figure 44 Using cursors in the Wave window T 67 Figure 43 Renaming a cursor Pa
68. complete Select View gt Display Options to bring up the Display Options dialog Change the Address Radix to Decimal and click OK 2 Initialize spram3 from a file a b c Select File gt Load to bring up the Load Memory dialog box Figure 71 The default Load Type is File Only Select data_mem mem file in the Files list Click OK The addresses in instance ram_tb spram3 are updated with the data from data_mem mem Figure 72 ModelSim SE Tutorial Figure 71 Load Memory dialog box Load Memory xi fr Instance Name Jram_th spram3 mem Directories ork oo B File name Load Type Address Range File Only All Data Only Addresses Both File and Data Start 0 End 65535 File Load Data Load File Format Fill Type C Verilog Hex Value Verilog Binary Increment MTI Decrement File Browser Random Filter Fill Data ale MTl memory tutorial examples log_memory_donna mem emory tutorial examples vlog_memory_donna data_mem mem Figure 72 Initialized memory from file and fill pattern memory default lt 2 gt File Edit View Window 2b Memory List x Instance Range ram_tbispramiimem 0 4095 sram_th spram2imem 0 2047 W ram_tbispram imem 0 65535 jram_thispram4i mem 0 3 ram_tbidpramt mern 0 15 No Instance ram_th spram3 mem Address Data lx m swosunnk
69. ctory for this exercise in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt examples profiler verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt examples profiler vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Execute the lesson DO file a Type do run do at the ModelSim gt prompt The DO file does the following e Creates the working library e Compiles the design files e Loads the test_sm design unit Feel free to open the DO file and look at its contents Compiling and loading the example design T 99 ModelSim SE Tutorial T 100 Lesson 9 Simulating with Performance Analyzer Running the simulation Throughout this lesson you will run the simulation via a DO file DO files are macros you create that automatically run several ModelSim commands The DO file in this lesson uses the seconds Tcl command to time each simulation run Feel free to open the DO file and look at its contents 1 Enable the Performance Analyzer a Select Tools gt Profile gt Profile On This must be done
70. delSim SE Tutorial Lesson 1 ModelSim conceptual overview Topics The following topics are covered in this chapter Introduction Basic simulation flow Creating the working library Compiling your design Running the simulation Debugging your results Project flow Multiple library flow Debugging tools T 12 T 13 T 13 T 13 T 13 T 14 T 15 T 16 T 17 ModelSim SE Tutorial T 12 Introduction Introduction ModelSim is a simulation and debugging tool for VHDL Verilog and mixed language designs This lesson provides a brief conceptual overview of the ModelSim simulation environment It is divided into four topics which you will learn more about in subsequent lessons Topic Additional information and practice Basic simulation flow Lesson 2 Basic simulation Project flow Lesson 3 ModelSim projects Multiple library flow Lesson 4 Working with multiple libraries Debugging tools Remaining lessons ModelSim SE Tutorial Basic simulation flow T 13 Basic simulation flow The following diagram shows the basic steps for simulating a design in ModelSim Creating the working library In ModelSim all designs be they VHDL Verilog or a combination of the two are compiled into a library You typically start a new simulation in ModelSim by creating a working library called work Work is the library name used by the compiler as the default destination for compiled design
71. dialog box opens in the data pane Figure 67 Type 11111010 in the Search for field and click Search Next The Address Data pane scrolls to the first occurrence of that address Figure 68 Click Search Next a few more times to search through the list Click Close to close the dialog box Viewing a memory T 89 Figure 67 Find searching for data value memory default PT Pa File Edit wiew Window x Address Data x inns nanninnit Memory List 7 Instance penne FY Data Search in Memory U PET B tan Search for mmord Search Next B tan Replace with Replace Replace All als EHB ran Search backwards Example Search Patterns 1234 101 011 05 hfa38 Figure 68 Data value found memory default O x File Edit View Window Memory List 11110000 Aam_tb spram1 mem 0 4095 a Aam_tb spram2 mem 0 2047 oo P ram_tb spram3 mem 0 65535 11110100 ram_tb spram4 mem 0 3 11110101 Aam_tb dpram mem 0 15 11110110 11110111 11111000 11111001 11111010 11111011 gt 4 mem mem Tal gt Instance ram_tb sprami mem Address decimal Data symbolic ModelSim SE Tutorial T 90 Lesson 8 Viewing and initializing memories Saving memory contents to a file You can save memory contents to a file that can be loaded at some later point in simulation 1 Save a memory pattern from the ram_tb spram1 instance to a file
72. e Breakpoint 142 Click the Continue Run button again The simulation runs for 500 ns and waves are drawn in the Wave window Figure 38 If you are using the VHDL version you might see warnings in the Main window transcript These warnings are related to VHDL value conversion routines and can be ignored Setting breakpoints and stepping in the Source window T 59 Figure 37 ModelSim steps into a function in a separate file lt source se sianatn T File Edit View Tools Window Se SRBQOMMK Fl 10n Hi Nhe TP DO xi 476 Ezel 477 478 f read the current value 479 virtual const bool amp read const 450 return m_cur_val 461 482 f get a reference to the current value for 483 virtual const bool amp get_data_ref const 484 return m_cur_val Figure 38 SystemC primitive channels in the Wave window Dave deft File Edit View Insert Format Tools Window su8 s ea i KEA QQe per wi ftest_ringbuffre test_ringbufft test_ringbuffr test_ringbufitxc test_ringbuffou Aest ringbUurpS 1 0000000000004 000000001 ee alalnfalajn aj a ajn e ooooo001 wut nt It SE z test_ringbuffex test_ringbufida test_ringbuffac Now 500 ns Say ern FH Ar AEG Pa Ons to 828 ns ModelSim SE Tutorial T 60 Lesson 5 Simulating designs with SystemC Lesson Wrap up This concludes the less
73. e Tools Window Help EF 100ns2j vsim work test_counter vsim work test_counter Loading C Modeltech_5 7b win32 std standard E standard standard Package Loading work test_counterfonly Waring vsim 3473 Component dut is not bound Time Ons Iteration O Region test_counter File C Modeltech_5 7b examples libraries tcounter vhd SIM 31 gt Es of Project Library sim Files p Project vhdl_counter Now O ns Delta 0 sim test_counter Linking to the resource library T 49 The process for linking to a resource library differs between Verilog and VHDL Figure 31 Specifying a search library in the Simulate dialog If you are using Verilog follow the steps in Linking in Verilog T 49 If you are using VHDL follow the steps in Linking in VHDL T 50 one page later Simulate ee Design VHDL Verilog Libraries SDF Options Linking in Verilog Search Libraries L Linking in Verilog requires that you specify a search library when you invoke C Modeltech_5 b examples counter parts_lib Add the simulator Modify 1 Specify a search library during simulation au Delete a Click the Simulate icon on the Main window toolbar E b Click the icon next to the work library and select test_counter Modify c Click the Libraries tab r Search Libraries First Lf Add Delete d Click the Add button next
74. eature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 108 T 108 T 108 T 109 T 111 T 113 T 115 T 116 T 116 T 119 T 107 ModelSim SE Tutorial T 108 Lesson 10 Simulating with Code Coverage Introduction ModelSim Code Coverage gives you graphical and report file feedback on which executable statements branches conditions and expressions in your source code have been executed It also measures bits of logic that have been toggled during execution Design files for this lesson The sample design for this lesson consists of a finite state machine which controls a behavioral memory The testbench fest_sm provides stimulus The ModelSim installation comes with Verilog and VHDL versions of this design The files are located in the following directories Verilog lt install_dir gt modeltech examples coverage verilog VHDL lt install_dir gt modeltech examples coverage vhdl This lesson uses the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Verilog and VHDL versions of the design Related reading ModelSim User s Manual Chapter 12 Code Coverage UM 419 ModelSim SE Tutorial Compiling and loading the design Enabling Code Coverage is a two step process first you compile the files and identify which coverage stati
75. elp gt SE Documentation also available from the Support page of our web site www model com ModelSim SE Quick Guide command and feature quick reference paper shipped with ModelSim PDF select Main window gt Help gt SE Documentation also available from the Support page of our web site www model com ModelSim SE Tutorial PDF HTML select Main window gt Help gt SE Documentation also available from the Support page of our web site www model com ModelSim SE User s Manual PDF HTML select Main window gt Help gt SE Documentation ModelSim SE Command Reference PDF HTML select Main window gt Help gt SE Documentation Foreign Language Interface Reference PDF HTML select Main window gt Help gt SE Documentation Std_DevelopersKit User s Manual PDF www model com support documentation BOOK sdk_um pdf The Standard Developer s Kit is for use with Mentor Graphics QuickHDL Command Help type help command name at the prompt in the Main window Error message help type verror lt msgNum gt at the Main window or shell prompt Tcl Man Pages Tcl manual select Main window gt Help gt Tcl Man Pages or find contents htm in modeltech docs tcl_help_html Technotes select Technotes dropdown on www model com support ModelSim SE Tutorial T 8 Introduction Technical support and updates Support Model Tec
76. es the Verilog version in the examples If you have a VHDL license use the VHDL version instead When necessary we distinguish between the Verilog and VHDL versions of the design Related reading ModelSim User s Manual Chapter 13 Waveform Compare UM 455 Chapter 9 WLF files datasets and virtuals UM 239 ModelSim SE Tutorial Creating the reference dataset The reference dataset is the w f file that the test dataset will be compared against It can be a saved dataset the current simulation dataset or any part of the current simulation dataset In this exercise you will use a DO file to create the reference dataset 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt modeltech examples dataflow verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt modeltech examples dataflow vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close Select File gt Change Directory and change to the directory you created in step 1 Execute the lesson DO file
77. ess 250 by double clicking on any address in the Address column and entering 250 You can see the specified range of addresses overwritten with the new data Also you can see the incrementing data beginning at address 251 Figure 74 Now before you leave this section go ahead and clear the instances already being viewed 4 Right click in the Address Data pane and select Close All Initializing a memory T 93 Figure 73 Loading a relocatable memory file M Instance Name Jram_th spram3 mem 3d Load Type Address Range C File Only CAI 3b C Data Only Addresses Both File and Data Start 0 End 300 File Load Data Load 3e File Format Fill Type C Verilog Hex C Value C Verilog Binary Increment MTI C Decrement 3f m File Browser Random Fi Fil Data ale MTl memory tutorial examples vlog_memory_donna mem q Directories Skip m 0 word s ork 3c N 17 File name Timemory tutorialexamples vlog_memory_donna reloc mem Figure 74 Overwritten values in memory file memory default Mi x File Edit View Window Memory List x Address Data x Instance Range 246 00000000000000000010010000011110 247 00000000000000000010010000011111 am_toispramf mem 0 4095 248 00000000000000000010010000100000 249 00000000000000000010010000100001 ram_tbispramzimem 0 2047 250 00000000000000000010010000100010 251 000000000000000
78. est2 ModelSim SE Tutorial T 78 Lesson 7 Debugging with the Dataflow window Displaying hierarchy in the Dataflow win dow You can display connectivity in the Dataflow window using hierarchical instances You enable this by modifying the options prior to adding items to the window 1 Change options to display hierarchy a Select Tools gt Options from the Dataflow window menu bar b Check Show Hierarchy and then click OK Figure 55 2 Add signal t_out to the Dataflow window a Type add dataflow top p t_out at the VSIM gt prompt Figure 56 ModelSim SE Tutorial Figure 55 The Dataflow options dialog Dataflow Options E x General options Warning options Keep previous contents when adding new nets or instances to the Dataflow window dataflow IV Hide cells IV Keep Dataflow I Show Hierarchy IV Bottom inout pins Tl Disable Sprout I Select equivalent nets I Log nets IV Select Environment IV Automatic Add to Wave Figure 56 Dataflow window displaying with hierarchy et 3 File Edit View Navigate Trace Tools Window Si Ras sBBQOTM KH KKE ZAR Qe Dom 4 gt x Extended mode enabled Hier Keep 1 Aop p t_out Z Lesson Wrap up T 79 Lesson Wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Type quit sim at the VSIM gt prompt ModelSim SE Tutorial T 80 Lesson 7 Debugging with the Dat
79. for the addresses 0x0000000c 0x0000000e as shown in Figure 78 b Right click the highlighted data and select Change This brings up the Change dialog box Figure 79 Note that the Addresses field is already populated with the range you highlighted c Select Value as the Fill Type d Enter the data values into the Fill Data field as follow 34 35 36 e Click OK The data in the address locations change to the values you entered Figure 80 Edit data in place To edit only one value at a time do the following Double click any value in the Data column b Enter the desired value c Double click on another value to quickly save the previously edited value and begin editing a new value d When you are finished editing all values press the lt Enter gt key on your keyboard to exit the editing mode If you needed to cancel the edit function press the lt Esc gt key on your keyboard Interactive debugging commands T 95 Figure 78 Changing contents by highlighting File Edit View Window Memory List 00000000 zam _tb spram1 mem 0 4095 Heei ram_tb spram2 mem 0 2047 00000006 am_tb spram3 mem 0 65535 00000008 ram_tb spram4 mem 0 3 00000008 1 tam_tb dpram1 mem 0 15 0000000c 0000000e Instance ram_tb dpram1 mer Address hexadecimal Data hexadecimal Figure 79 Entering data to change Change Memory x M Instance Name dram _thidpram1 mem r Address Range Fill Type C All 3
80. ftop p strb ol NER 26 gt ftop p t_out 2820 ns 2785 ns FJ N Extended mode enabled ftop p NAND 41 ModelSim SE Tutorial T 76 Lesson 7 Debugging with the Dataflow window d Select Trace gt Trace next event to trace the first contributing event Figure 51 Cursor in wave viewer marking last event ModelSim adds a cursor marking the last event the transition of the strobe to 0 at 2745 ns which caused the output of 0 on t_out Figure 51 f gt top p test f ftop p strb f Select Trace gt Trace event set Outputs ftop p t_out 2620 ns e Select Trace gt Trace next event two more times The dataflow pane sprouts to the preceding process and shows the input driver of signal strb Figure 52 Notice too that the wave viewer now shows the input and output signals of the newly selected process 2745 ns You can continue tracing events through the design in this manner select rl N Trace next event until you get to a transition of interest in the wave Extended mode enabled Keep 1 ftop p NAND 41 viewer and then select Trace event set to update the dataflow pane Figure 52 Tracing the event set iix Eile Edit View Navigate Trace Tools Window Si SUD s BRBODM Ie HF HEIZ Z DIR Q Ap mi 3 Select File gt Close to close the Dataflow window vest NANDEA Sara t_out strb gt e S X Soe aal RM eae kB QA SB H
81. g box opens in the data pane Figure 65 c Type 12 in the dialog box d Click OK The requested address appears in the top line of the Address Data pane in the Memory window Figure 65 2 Edit the address location directly To quickly move to a particular address do the following a Double click any address in the Address Data pane of the Memory window Figure 66 b Enter any desired address c Press lt Enter gt on your keyboard The Address Data pane scrolls to that address ModelSim SE Tutorial Figure 65 The Goto dialog box memory default RB ol x File Edit View Window Memory List x Address Data x 13 00110101 00110110 E 00110111 p 00111000 00111001 P 00111010 P 00111011 00111100 00111101 FE 00111110 B 00111111 X Goto Memory Goto Address m aq Fire Instance ram_tb spram1 mem Address decimal Data symbolic te Figure 66 Edit the address directly memory default m x File Edit View Window Memory List x Address Data x x Instance R ange 00110100 00110101 ram_tbisprami mem 0 4095 00110110 ram_tbispram imem 0 2047 nun ram_tbispram3imem a 00111001 00111010 jram_th spram4 mem 00111011 D ram _tbidpram1 imem a z Boa an Rf p Instance am_tbhisprami mem 2a 3 Let s search for a particular data entry now a c Select Edit gt Data Search from the Memory window menu bar The Data Search in Memory
82. gal such provision shall be severed from this Agreement and the remaining provisions will remain in full force and effect MISCELLANEOUS This Agreement contains the parties entire understanding relating to its subject matter and supersedes all prior or contemporaneous agreements including but not limited to any purchase order terms and conditions except valid license agreements related to the subject matter of this Agreement which are physically signed by you and an authorized agent of Mentor Graphics either referenced in the purchase order or otherwise governing this subject matter This Agreement may only be modified in writing by authorized representatives of the parties Waiver of terms or excuse of breach must be in writing and shall not constitute subsequent consent waiver or excuse The prevailing party in any legal action regarding the subject matter of this Agreement shall be entitled to recover in addition to other relief reasonable attorneys fees and expenses Rev 020826 Part Number 214231 T 147 ModelSim SE Tutorial T 148 License Agreement ModelSim SE Tutorial Index A aCC T 55 add dataflow command T 78 add wave command T 64 B break icon T 26 breakpoints in SystemC modules T 58 setting T 27 stepping T 28 C C Debug T 58 Code Coverage T 107 excluding lines and files T 116 reports T 117 Source window T 113 command line mode T 137 comparisons Waveform Compare T 121 compile order changing
83. he Main window a Click the icon next to the work library in the Library tab of the Main window SystemC items have a green S or C next to their names Figure 33 2 Observe window linkages a Select a different instance in the sim tab of the Main window Figure 34 The Source Signals and Process windows update to show the associated SystemC or HDL items 3 Add items to the Wave window a Right click test_ringbuf in the sim tab and select Add gt Add to Wave Viewing SystemC items in the GUI T 57 Figure 33 SystemC items in the work library M Moaeisim sE PLus s s Betas E Eile Edit View Compile Simulate Tools Window Help ome S2Qe 4 a orsama YTE Workspace x Compiling module store SH work Library Top level modules 1 control Module ringbuf F retrieve Module source process signals variables dataflow list wave me IN ringbuf Module morn IZ g vsim test_ringbuf 8 sc_clock ScMod Loading work systemc so 1 store Module Loading work test_ringbuf bak ri Loading work ringbuf e e as Loading work control via a Loading work store mfi ieee Library 7 Loading work retrieve pd meee vs me gt Wbrayfemfles SS 7 Now Ons Delta 0 simitest_ringbuf Figure 34 SystemC items in the Main window sim tab ModelSim 15 ol x Eile Edit View Compile Simulate Tools Window Help FIII
84. hnology online and email technical support options maintenance renewal and links to international support contacts www model com support default asp Mentor Graphics support www mentor com supportnet Updates Access to the most current version of ModelSim www model com downloads default asp Latest version email Place your name on our list for email notification of news and updates www model com products informant asp ModelSim SE Tutorial Before you begin T 9 Before you begin Preparation for some of the lessons leaves certain details up to you You will decide the best way to create directories copy files and execute programs within your operating system When you are operating the simulator within ModelSim s GUL the interface is consistent for all platforms Examples show Windows path separators use separators appropriate for your operating system when trying the examples Example designs ModelSim comes with Verilog and VHDL versions of the designs used in these lessons This allows you to do the tutorial regardless of which license type you have Though we have tried to minimize the differences between the Verilog and VHDL versions we could not do so in all cases In cases where the designs differ e g line numbers or syntax you will find language specific instructions Follow the instructions that are appropriate for the language that you are using ModelSim SE Tutorial T 10 Introduction Mo
85. iles from lt install_dir gt examples memory verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt examples memory vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close Select File gt Change Directory and change to the directory you created in step 1 Create the working library and compile the design Type vlib work at the ModelSim gt prompt Verilog Type vlog sp_syn_ram v dp_syn_ram v ram_tb v at the ModelSim gt prompt VHDL Type vcom 93 sp_syn_ram vhd dp_syn_ram vhd ram_tb vhd at the ModelSim gt prompt Type set NumericStdNoWarnings 1 at the ModelSim gt prompt to suppress NumericStd warnings encountered during simulation Compiling and loading the design T 83 ModelSim SE Tutorial T 84 Lesson 8 Viewing and initializing memories 4 Load the design Figure 57 Loading the memory testbench a On the Library tab of the Main window click the icon next to the Pen 7 a oix work library File Edit View Compile Simulate Tools Window Help b Double click the ram_tb design unit Figure 57 The design appears as shown in Figure 58 sree alt 8 100 ns HELE BP S Workspace E Compiling module sp_syn_ram rtli
86. ilog 1 0 ModelSim gt counter v T Verilog 0 0 Ass 21 Project Library Project test lt No Design Loaded gt lt No Context gt Figure 16 The Compile Order dialog box Compile Order Ex Current Order A counter vhd tcounter vhd move up down buttons Auto Generate ModelSim SE Tutorial T 36 Lesson 3 ModelSim projects Compiling and loading a design 1 Compile the files a Right click anywhere in the Project tab and select Compile gt Compile All from the pop up menu ModelSim compiles both files and changes the symbol in the Status column to a check mark A check mark means the compile succeeded If the compile had failed the symbol would be a red X and you would see an error message in the Transcript window on the right 2 View the design units Click the Library tab in the workspace b Click the icon next to the work library You should see two compiled design units their types modules in this case and the path to the underlying source files Figure 17 3 Load the test_counter design unit a Double click the test_counter design unit You should see a new tab named sim that displays the structure of the test_counter design unit Figure 18 A fourth tab named Files contains information about the underlying source files At this point you would generally run the simulation and analyze or debug your design like you did in the previous lesson For now you
87. indow Figure 111 or the editor you specified with the EDITOR environment variable Make sure the file includes only those commands shown in step 2 above Delete any extraneous commands and save the file 5 Load the simulation anew and use the DO file a Type quit sim at the VSIM gt prompt b Type vsim test_counter at the VSIM gt prompt c Type do sim do at the VSIM gt prompt ModelSim executes the saved commands and draws the waves in the Wave window 6 When you are done with this exercise select File gt Quit to quit ModelSim ModelSim SE Tutorial Figure 111 The DO file opened in the Source window File Edit View Tools Window 2e06 k BANA XOX HF sti ka BPR x 1 2 3 4 5 6 8 H o w il H N add wave count add wave clk add ware reset force freeze clk 0 0 1 50 ns r 100 force reset 1 run 100 force reset 0 run 300 force reset 1 run 400 force reset 0 run 200 X i Ee A N n 3C0 14 gt Running ModelSim with a startup DO file You can configure ModelSim to execute a particular DO file every time you start the tool You modify the local ModelSim initialization file modelsim ini to point at the file and from that point forward the DO file is executed whenever you invoke ModelSim from that directory In this exercise you ll create a startup DO file that opens the Signals Source and Wave windows and changes their window titles to the name of you
88. ines and files from code coverage statistics You can set exclusions with the GUI with a text file called an exclusion filter file or with pragmas in your source code Pragmas are statements that instruct ModelSim to not collect statistics for the bracketed code See the ModelSim User s Manual for more details on exclusion filter files and pragmas 1 Exclude a line via the Source window a Inthe Hits column of the Source window right click a line and select Exclude Coverage Line Figure 98 Several things happen once you exclude the line e The icon in the Source window changes to a green E e The line is removed from the Statement tab of the Missed Coverage pane e A new entry appears in the Current Exclusions pane e The statistics are updated to reflect the exclusion 2 Exclude a line via the Missed Coverage pane a Right click a line in the Missed Coverage pane and select Exclude Selection You can also exclude the selection for the current instance only by selecting Exclude Selection For Instance lt inst_name gt 3 Exclude an entire file a Inthe Files tab of the Workspace locate sm v or sm vhd if you are using the VHDL example b Right click the file name and select Coverage gt Exclude Selected File Figure 99 The file is added to the Current Exclusions pane 4 Cancel the exclusion of sm v a Right click sm v in the Current Exclusions pane and select Cancel Selected Exclusions ModelSim SE Tut
89. ing on Software license fees paid or service plan purchased apply to the following and are subject to change a relocation of Software b use of Software which may be limited for example to execution of a single session by a single user on the authorized hardware or for a restricted period of time such limitations may be communicated and technically implemented through the use of authorization codes or similar devices c support services provided including eligibility to receive telephone support updates modifications and revisions Current standard policies and programs are available upon request 2 ESD SOFTWARE If you purchased a license to use embedded software development ESD Software Mentor Graphics grants to you a nontransferable nonexclusive license to reproduce and distribute executable files created using ESD compilers including the ESD run time libraries distributed with ESD C and C compiler Software that are linked into a composite program as an integral part of your compiled computer program provided that you distribute these files only in conjunction with your compiled computer program Mentor Graphics does NOT grant you any right to duplicate or incorporate copies of Mentor Graphics real time operating systems or other ESD Software except those explicitly granted in this section into your products without first signing a separate agreement with Mentor Graphics for such purpose ModelSim SE Tutorial T 144
90. ing the Dataflow window s embedded wave viewer you can trace backward from a transition to see which process or signal caused the unexpected output 1 Add an item to the Dataflow window Make sure instance p is selected in the sim tab of the Main window b Drag signal t_out from the Signals window into the Dataflow window c Select View gt Show Wave to open the wave viewer Figure 49 You may need to increase the size of the Dataflow window and scroll the panes to see everything 2 Trace the inputs of the nand gate a Select process NAND 4 1 labeled line_62 in the VHDL version in the dataflow pane All input and output signals of the process are displayed automatically in the wave viewer b Inthe wave view scroll to time 2785 ns the last transition of signal t_out c Click on the last transition of signal t_out to set a cursor Figure 50 Tracing events T 75 Figure 49 The embedded wave viewer pane RIL atolxd Eile Edit View Navigate Trace Tools Window 4B RBs ix BRAD M ee ee RHE ZZ DIR aa Bo mi NAND 41 C tout i X RL Hm Extended mode enabled Keep 1 ftop p t_out Figure 50 Signals added to the wave viewer automatically En LC xh Eile Edit View Navigate Trace Tools Window Ba UE EOD M ke SHRM HM BAA Q aa Bm PZ u8 amp s eal zer A ea A a ka Inputs ftop p test gt
91. ing through the source code e Viewing waveforms and measuring time e Exploring the physical connectivity of your design e Viewing and initializing memories e Analyzing simulation performance e Testing code coverage e Comparing waveforms ModelSim SE Tutorial T 18 Introduction ModelSim SE Tutorial Lesson 2 Basic simulation Topics The following topics are covered in this lesson Introduction 2 2 amp Design files for this lesson Related reading Creating the working design library Compiling the design Running the simulation Setting breakpoints and stepping in the Source window Lesson wrap up T 20 T 20 T 20 T 21 T 23 T 25 T 27 T 29 ModelSim SE Tutorial T 20 Lesson 2 Basic simulation Introduction In this lesson you will go step by step through the basic simulation flow Design files for this lesson The sample design for this lesson is a simple 8 bit binary up counter with an associated testbench The pathnames are as follows Verilog lt install_dir gt modeltech examples counter v and tcounter v VHDL lt install_dir gt modeltech examples counter vhd and tcounter vhd This lesson uses the Verilog files counter v and tcounter v in the examples If you have a VHDL license use counter vhd and tcounter vhd instead Or if you have a mixed license feel free to use the Verilog testbench with the VHDL counter or vice versa Related reading ModelSim User s Manual
92. ion time reduced by almost 50 yj Modelsim AME File Edit view lie Simulate Tools Window Help 23996231 illegal op received 23996871 illegal op received 23997511 illegal op received 23998151 illegal op received 23998791 illegal op received 23999431 illegal op received Profiling paused 1946 samples taken 40 in user c test_sm test_sm test_sm test_sm de 1061931472 Ha test_sm sm_seq hak arara E a YSIM d gt sim paused gt J Now 24 ms Delta 2 sim test_sm 4 Using the data to improve performance T 103 4 Look at the performance data again Figure 85 Source edit removes the performance bottleneck a Select Tools gt Profile gt View hierarchical profile x Hierarchical Profile The problem with repeated screen printing has been removed Figure 85 E smv 64 Tel_Flush Tel_Close Tcl_DoOneEvent Tel WaitForEvent test_sm v 83 test_sm v 127 beh_sram v 13 sm_seq v 24 test_sm v 94 sm vi49 smivi44 test_sm v 129 ModelSim SE Tutorial T 104 Lesson 9 Simulating with Performance Analyzer Filtering and saving the data As a last step you will filter out lines that take less than 2 of the simulation time and then save the report data to a text file 1 Filter lines that take less than 2 of the simulation time a Change the Under field to 2 Figure 86 b Click the Update Data button ModelSim filters the list to show only those lines that take 2 or
93. ition Expression Toggle ModelSim SE Tutorial T 112 Lesson 10 Simulating with Code Coverage c Select the Toggle tab in the Missed Coverage pane Figure 91 Details pane showing toggle coverage statistics If the Toggle tab isn t visible you can do one of uy things 1 widen the cover dai xj pane by clicking and dragging on the pane border 2 if your mouse has r a middle button click and drag the tabs with the middle mouse button Details j Instance test_sm sm_seq0 d Select any item in the Toggle tab to see details in the Details pane Figure Signal addr 91 Node count 10 3 View instance coverage statistics gt 0 15621 22 gt 1 15624 The Instance Coverage pane displays coverage statistics for each instance in Toggle Coverage 40 a flat non hierarchical view Figure 92 Select any instance in the Instance 0 1 Coverage 40 Coverage pane to see its source code displayed in the Source window Full Coverage 40 X Z Coverage 40 Figure 92 The Instance Coverage pane cover_flat Ex Instance Coverage x Condition r ModelSim SE Tutorial Viewing statistics in the Source window In the previous section you saw that the Source window and the Main window coverage panes are linked You can select items in the Main window panes to view the underlying source code in the Source window Furthermore the Source window contains statistics of its own 1 View coverage statistics for test_sm in
94. k the created C object files using sccom link In this exercise you will use a DO file to compile and load the design 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory then copy all files from lt install_dir gt modeltech examples systemc sc_vlog into the new directory If you have a VHDL license copy the files in lt install_dir gt modeltech examples systemc sc_vhdl instead 2 Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 3 Execute the lesson DO file a Type do run do at the ModelSim gt prompt The DO file does the following e Creates the working library e Compiles links the C source files e Compiles the HDL design files e Opens all windows e Loads the design Feel free to open the DO file and look at its contents The DO file will take a little while to run ModelSim SE Tutorial Viewing SystemC items in the GUI SystemC items are denoted in the ModelSim GUI with a green S on the Library tab a green C on the Files tab and a green diamond icon elsewhere 1 Expand the work library in t
95. lation c Click the Run All icon on the Main Wave or Source window toolbar The simulation runs until the breakpoint is hit When the simulation hits the breakpoint it stops running highlights the line with an arrow in the Source window Figure 11 and issues a Break message in the Main window When a breakpoint is reached typically you want to know one or more signal values You have several options for checking values e look at the values shown in the Signals window e set your mouse pointer over the count variable in the Source window and a balloon will pop up with the value Figure 11 e highlight the count variable in the Source window right click it and select Examine from the pop up menu e use the examine command to output the value to the Main window Transcript i e examine count 4 Try out the step commands a Click the Step icon on the Source window toolbar This single steps the debugger Experiment on your own Set and clear breakpoints and use the Step Step Over and Continue Run commands until you feel comfortable with their operation b When you are done experimenting close the Source window by selecting File gt Close ModelSim SE Tutorial Figure 11 Resting the mouse pointer on a variable in the Source window File Edit View Tools Window D x BIER sim test_counter dut C Modeltech_5 b examples counter v gi carry val i amp carry m end
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97. license fee paid less a reasonable allowance for use T 145 ModelSim SE Tutorial T 146 License Agreement 10 11 12 13 14 15 9 3 Mentor Graphics has no liability to you if infringement is based upon a the combination of Software with any product not furnished by Mentor Graphics b the modification of Software other than by Mentor Graphics c the use of other than a current unaltered release of Software d the use of Software as part of an infringing process e a product that you make use or sell f any Beta Code contained in Software g any Software provided by Mentor Graphics licensors who do not provide such indemnification to Mentor Graphics customers or h infringement by you that is deemed willful In the case of h you shall reimburse Mentor Graphics for its attorney fees and other costs related to the action upon a final judgment 9 4 THIS SECTION 9 STATES THE ENTIRE LIABILITY OF MENTOR GRAPHICS AND ITS LICENSORS AND YOUR SOLE AND EXCLUSIVE REMEDY WITH RESPECT TO ANY ALLEGED PATENT OR COPYRIGHT INFRINGEMENT OR TRADE SECRET MISAPPROPRIATION BY ANY SOFTWARE LICENSED UNDER THIS AGREEMENT TERM This Agreement remains effective until expiration or termination This Agreement will automatically terminate if you fail to comply with any term or condition of this Agreement or if you fail to pay for the license when due and such failure to pay continues for a period of 30 days after written notice fro
98. ls on each pane see the Code Coverage chapter in the ModelSim User s Manual ModelSim SE Tutorial Figure 87 Coverage columns in the Main window Workspace Sen Cout ni Si Braten Ich Coun Branch Hte In e 17 100 000 p a 211 89 407 ME 1 1 100 000 p 763 420 55 046 EE 26 25 96 154 M 12 100 7 92157 D j 117 69231 M 20 9 95 000 MT Figure 88 Main window with coverage panes displayed modem T File Edit View Compile Simulate Tools Window Help s t tre SEL ED Abe thresh a A eee a est_sm est_sm Module nop test_sm Task 1 ctl test_sm Task lel test_sm vsim coverage gui work test_sm vsim coverage gui work test_sm Loading work test_sm Loading work sm_seq Loading work sm Loading work beh_sram VSIM 6 gt Wr wel test sm Task l rss Di Leroy in ies Missed Coverage x Current Exclusions x a Missed Statements Statement Condition Instance Coverage x Details x Instance test sm sram_0 test_sm sm_seqD sm_ test sm sm_seq0 Now Ops Delta 0 sirn test_smn Viewing statistics in the Main window T 111 Viewing stati stics in the Mai n wi ndow Figure 89 Right click a column heading to hide or show columns workspace U 5 Workspace Let s take a look at the data in these various panes
99. lt No Design Loaded gt lt No Context gt Folder Name HDL aey 2b Folder Location Design Files a Top Level BROT ncel 2c ModelSim SE Tutorial T 38 Lesson 3 ModelSim projects You ll now see a icon next to the Design Files folder in the Project Figure 22 A folder with a sub folder tab Figure 22 e Click the icon to see the HDL sub folder RA lalsl File Edit View Compile Simulate Tools Window Help Moving files to folders Now that you have folders you can move the files into them If you are running ona Windows platform you can simply drag and drop the files into the folder On Loading project test Compile of counter v was successful Ar u teounter v Verilog 1 Compie of toounter ful Unix platforms you either have to place the files in a folder when you add the files counter Verilog 0 II 2 conais D faled a os to the project or you have to move them using the properties dialog Folder ModelSim gt 1 Move tcounter v and counter v to the HDL folder Select counter v hold the lt Ctrl gt key down and then select tcounter v b Right click either file and select Properties This opens the Project Compiler Settings dialog Figure 23 which lets you set a variety of options on your design files c Click the Place In Folder drop down arrow and select HDL d Click OK The two files are moved into the HDL folder Click the
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101. m in command line mode T 137 ModelSim SE Tutorial T 138 3 Lesson 12 Automating ModelSim Create a DO file Open a text editor Type the following lines into a new file list all signals in decimal format add list decimal read in stimulus do stim do output results write list counter 1lst quit the simulation quit f Save the file with the name sim do and place it in the current directory 4 Run the batch mode simulation 5 a Type vsim c do sim do counter wlf counter wlf at the DOS UNIX prompt The c argument instructs ModelSim not to invoke the GUI The wlf argument saves the simulation results in a WLF file This allows you to view the simulation results in the GUI for debugging purposes View the list output a Open counter st and view the simulation results ns counter count delta counter clk counter reset 0 0 x Zz 1 0 Gz 50 0 Zi 100 0 gg 100 1 000 150 0 Q g 151 0 1 0 200 0 1 0 0 250 0 Ii_ 0 ModelSim SE Tutorial This is the output produced by the Verilog version of the design It may appear slightly different if you used the VHDL version View the results in the GUI Since you saved the simulation results in counter wlf you can view them in the GUI by invoking VSIM with the view argument a Type vsim view counter wlf at the DOS UNIX prompt The GUI opens and a dataset tab named counter is displayed in the Workspace Figure 112
102. menu Create a report on all instances a Select Tools gt Coverage gt Reports from the Main window toolbar This opens the Coverage Report dialog Figure 100 Make sure Report on all instances and No Filtering are selected and then click OK ModelSim creates a file report txt in the current directory and displays the report in Notepad Figure 101 Close Notepad when you are done looking at the report Creating Code Coverage reports T 117 Figure 100 The Coverage Report dialog Coverage Report k lol x Report on all files C Report on all instances Report on a specific instance Instance Name Browse Report on a source file File N ame Browse Coverage Type IV Statement Coverage I Expression Coverage 7 Branch Coverage I Toggle Coverage I Condition Coverage TT Extended Toggle Coverage Other Options I Zero Coverage Only No Filtering I Include Line Details Filter Above Percent J Coverage Totals Only Filter Below Percent I Disable Source Annotation Percent 5 T Recursive RRS J Write XML Format Report Pathname report txt Browse I Append to file Figure 101 A coverage report in Notepad Notepad m lol xj File Edit Window report txt Coverage Report Summary Data by Instance Statement Coverage Inst Coverage Enabled test_sm sram 0 Statement Coverage Inst DU test_sm sm seq0 sm 0 sm
103. more of the simulation time 2 Save the report a Click the save icon in the Hierarchical Profile window b Type hier rpt in the File name field and then click Save If you want open the report file with an editor to see what is saved You can also output this report from the command line using the profile report command See the ModelSim Command Reference for details ModelSim SE Tutorial Figure 86 The filtered profile data Hierarchical Profile i 5 x W Samples 2232 4 Under e 4 ans a el Beet EF sm v 64 Tel_Flush l Tel_close Tel_DoOneEyent testism 83 test sm vi127 sram vi13 Lesson wrap up T 105 Lesson wrap up This concludes this lesson Before continuing we need to end the current simulation 1 Select Simulate gt End Simulation Click Yes ModelSim SE Tutorial T 106 Lesson 9 Simulating with Performance Analyzer ModelSim SE Tutorial Lesson 10 Simulating with Code Coverage Topics The following topics are covered in this lesson Introduction 2 2 4 Design files for this lesson Related reading Compiling and loading the design Viewing statistics in the Main window Viewing statistics in the Source window Viewing toggle statistics in the Signals window Excluding lines and files from coverage statistics Creating Code Coverage reports Lesson wrap up gt Note The functionality described in this tutorial requires a coverage license f
104. mulate a VHDL design with a missing resource library a In the Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports a warning Figure 30 When you see a message that contains text like Warning vsim 3473 you can view more detail by using the verror command b Type verror 3473 at the ModelSim gt prompt The expanded error message tells you that a component dut in this case has not been explicitly bound and no default binding can be found c Type quit sim to quit the simulation ModelSim SE Tutorial Figure 29 Verilog simulation error reported in the Main window I nix File Edit View Compile Simulate Tools Window Help B vsim work test_counter vsim work test_counter EE JIM work Library C Mode Loading work test_counter E test_counter Module C Mode Error vsim 3033 C Modeltech_5 7b examples libraries tcounter 6 Instantiation of counter failed El vital2000 Library MODEL The design unit was not found SH parts_ib Library C Mode Region test_counter mfi ieee Library MODEL Seachad libraries ne worl EM modelsim_lib Library MODEL iE Eine kadng desinn 4 gt a ERROR Bi ModelSim gt Project Library Project counter lt No Design Loaded gt A Figure 30 VHDL simulation warning reported in Main window y ModelSim File Edit View Compile Simulat
105. n consent and payment of Mentor Graphics then current applicable transfer charges Any attempted transfer without Mentor Graphics prior written consent shall be a material breach of this Agreement and may at Mentor graphics option result in the immediate termination of the Agreement and licenses granted under this Agreement The provisions of this section 4 shall survive the termination or expiration of this Agreement 5 LIMITED WARRANTY 5 1 Mentor Graphics warrants that during the warranty period Software when properly installed will substantially conform to the functional specifications set forth in the applicable user manual Mentor Graphics does not warrant that Software will meet your requirements or that operation of Software will be uninterrupted or error free The warranty period is 90 days starting on the 15th day after delivery or upon installation whichever first occurs You must notify Mentor Graphics in writing of any nonconformity within the warranty period This warranty shall not be valid if Software has been subject to misuse unauthorized modification or installation MENTOR GRAPHICS ENTIRE LIABILITY AND YOUR EXCLUSIVE REMEDY SHALL BE AT MENTOR GRAPHICS OPTION EITHER A REFUND OF THE PRICE PAID UPON RETURN OF SOFTWARE TO MENTOR GRAPHICS OR B MODIFICATION OR REPLACEMENT OF SOFTWARE THAT DOES NOT MEET THIS LIMITED WARRANTY PROVIDED YOU HAVE OTHERWISE COMPLIED WITH THIS AGREEMENT MENTOR GRAPHICS MAKES NO WARRANTIES WIT
106. n or to the left of the line number A red diamond appears next to the line Figure 9 2 Disable enable and delete the breakpoint Click the red diamond to disable the breakpoint b Click the red diamond again to re enable the breakpoint c Click the red diamond with your right mouse button and select Remove Breakpoint 28 d Click on line 28 again to re create the breakpoint 3 Restart the simulation a Click the Restart icon to reload the design elements and reset the simulation time to zero The Restart dialog that appears gives you options on what to retain during the restart Figure 10 b Click Restart in the Restart dialog Setting breakpoints and stepping in the Source window Figure 9 A breakpoint in the Source window fm source comtery o File Edit view Tools Window SSH sBBOM OX Hl 10n HE E E B Y P D xi int C Modeltech_5 7b examples counter v a 23 end 24 end 25 endfunction 26 27 always posedge clk or posedge reset ORR if reset 29 count ftpd_reset_to_count hl 30 else 31 count lt ftpd_clk_to_count increment count 27 v lf teounter v counter v 4 gt E En 1 Col 0 Read gt Figure 10 The Restart dialog Y lt Restart Te r Keep v List Format v Wave Format v Breakpoints v Logged Signals v Virtual Definitions v Assertions Restart Cancel ModelSim SE Tutorial T 28 Lesson 2 Basic simu
107. n the Wave window Viewing comparison data in the List window Saving and reloading comparison data Lesson wrap up gt Note The functionality described in this tutorial requires a compare license feature in your ModelSim license file Please contact your Mentor Graphics sales representative if you currently do not have such a feature T 122 T 122 T 122 T 124 T 124 T 125 T 126 T 127 T 127 T 127 T 128 T 129 T 130 T 121 ModelSim SE Tutorial T 122 Lesson 11 Waveform Compare Introduction Waveform Compare computes timing differences between test signals and reference signals The general procedure for comparing waveforms has four main steps 1 Selecting the simulations or datasets to compare 2 Specifying the signals or regions to compare 3 Running the comparison 4 Viewing the comparison results In this exercise you will run and save a simulation edit one of the source files run the simulation again and finally compare the two runs Design files for this lesson The sample design for this lesson consists of a finite state machine which controls a behavioral memory The testbench test_sm provides stimulus The ModelSim installation comes with Verilog and VHDL versions of this design The files are located in the following directories Verilog lt install_dir gt modeltech examples compare verilog VHDL lt install_dir gt modeltech examples compare vhdl This lesson us
108. nces to global libraries This lesson uses the Verilog files teounter v and counter v in the examples If you have a VHDL license use tcounter vhd and counter vhd instead Related reading ModelSim User s Manual Chapter 2 Projects UM 31 ModelSim SE Tutorial Creating a new project 1 If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows Create a new project a Select Create a Project from the Welcome dialog or File gt New gt Project Main window from the menu bar This opens a dialog where you enter a Project Name Project Location i e directory and Default Library Name Figure 12 The default library is where compiled design units will reside b Type test in the Project Name field c Click Browse to select a directory where the project file will be stored d Leave the Default Library Name set to work e Click OK Figure 12 The Create Project dialog Create Project E x m Project Name test _U Project Location C modeltech examples Browse m Default Library Name work OK Cancel Creating a new project T 33 2b 2G 2d ModelSim SE Tutorial T 34 Lesson 3 ModelSim projects Adding items to the project Once you click OK to accept the new project settings you will see a blank Project tab in the workspace are
109. ollowing topics are covered in this lesson Introduction Related reading Creating a simple DO file Running ModelSim with a startup DO file Running ModelSim in command line mode Using Tcl with ModelSim Lesson Wrap up T 132 T 132 T 133 T 135 T 137 T 140 T 142 T 131 ModelSim SE Tutorial T 132 Lesson 12 Automating ModelSim Introduction Aside from executing a couple of pre existing DO files the previous lessons focused on using ModelSim in interactive mode executing single commands one after another via the GUI menus or Main window command line In situations where you have repetitive tasks to complete you can increase your productivity with DO files DO files are scripts that allow you to execute many commands at once The scripts can be as simple as a series of ModelSim commands with associated arguments or they can be full blown Tel programs with variables conditional execution and so forth You can execute DO files from within the GUI or you can run them from the system command prompt without ever invoking the GUI A Important This lesson assumes that you have added the lt install_dir gt modeltech lt platform gt directory to your PATH If you did not you will need to specify full paths to the tools i e vlib vmap vlog vcom and vsim that are used in the lesson Related reading ModelSim User s Manual Chapter 21 Tcl and macros DO files UM 239 Practical Progr
110. on Before continuing we need to quit the C debugger and end the current simulation 1 Select Tools gt C Debug gt Quit C Debug 2 Select Simulate gt End Simulation Click Yes when prompted to confirm that you wish to quit simulating ModelSim SE Tutorial Lesson 6 Viewing simulations in the Wave window Topics The following topics are covered in this lesson Introduction Related reading Loading a design Adding items to the Wave window Using cursors in the Wave window Working with a single cursor Working with multiple cursors Saving the window format Lesson wrap up T 62 T 62 T 63 T 64 T 66 T 66 T 67 T 69 T 70 T 61 ModelSim SE Tutorial T 62 Lesson 6 Viewing simulations in tne Wave window Introduction Figure 39 The Wave window and its many panes The Wave window allows you to view the results of your simulation as HDL pathname value waveform waveforms and their values default The Wave window is divided into a number of window panes Figure 39 All File Edit View Insert Format Tools Window window panes in the Wave window can be resized by clicking and dragging the oh BEAAM QiQg I ak bar between any two panes Aop ck top prw Related reading aan ModelSim User s Manual Wave window UM 337 Chapter 9 WLF files en a datasets and virtuals UM 239 top stw top sstrb top srdy top saddr yoni 3140 ns to 400
111. on Configuration Name field Select HDL from the Place in Folder drop down Click the icon next to the work library and select test_counter Click the Resolution drop down and select ps For Verilog click the Verilog tab and check Enable Hazard Checking Click OK The Project tab now shows a Simulation Configuration named counter Figure 25 Simulation Configurations T 39 Figure 24 The Simulation Configuration dialog x tb Simulation Configuration Name Place in Folder Simulation 1c Design VHDL Verilog Libraries SDF Options 1f Path Library C Modeltech_5 7b examples veril 1d Ji vital2000 Library MODEL_TECH vital2000 Eh iese Library MODEL_TECHV ieee i modelsim_lib Library MODEL_TECH modelsim_lib El std Library MODEL_TECH std MW std_developerskit Library MODEL_TECH std_developers Ji spnopsys Library MODEL_TECH synopsys i verilog Library MODEL_TECHY verilog Eee Simulate Resolution default vi Optimize 1e OK Cancel Figure 25 A Simulation Configuration in the Project tab Y Modelsim a E lalx File Edit View Compile Simulate Tools Window Help H Reading C modeltech tel vsim pref tel Loading project test C Design Files Folder I Compile of counter v was successful EH HDL Folder Compile of tcounter v was successful r 2 compiles 0 failed
112. oolbar The simulation runs for 100 ns the default simulation length and waves are drawn in the Wave window Figure 8 b Type run 500 at the VSIM gt prompt in the Main window The simulation advances another 500 ns for a total of 600 ns Running the simulation T 25 Figure 7 Adding signals to the Wave window sionals TE File Edit view Add Tools Window 2a Bhttattatta test_counter clk test_counter reset Ef test_counter count Cursor 1 Bee 0 ns to 768 ns V ModelSim SE Tutorial T 26 Lesson 2 Basic simulation c Click the Run All icon on the Main Wave or Source window toolbar The simulation continues running until you execute a break command or it hits a statement in your code e g a Verilog stop statement that halts the simulation d Click the Break icon The simulation stops running ModelSim SE Tutorial Setting breakpoints and stepping in the Source window Next you will take a brief look at one interactive debugging feature of the ModelSim environment You will set a breakpoint in the Source window run the simulation and then step through the design under test Breakpoints can be set only on lines with blue line numbers 1 Seta breakpoint on line 28 of counter v if you are simulating the VHDL files use line 30 instead a Select dut in the sim tab of the Main window Workspace This opens counter v in the Source window b Scroll to line 28 and click o
113. orial Figure 103 First dialog of the Comparison Wizard Comparison Wizard The first step in creating a CY comparison is to open the reference Reference Dataset and test datasets wlf files Joold wif Browse 1b m Test Dataset Either dataset can be a saved wif file or a dataset that is already opened Use the Browse buttons to browse for a saved dataset or click the down arrow to select a file from the dataset selection history Use Current Simulation 1c VW Update comparison after each run Specify Dataset E lt Previous Next gt Cancel Figure 104 Second dialog of the Comparison Wizard Comparison Wizard With the reference and test datasets selected the next step is to selecta c Sn Meha comparison method CCAR MENO 1d Compare All Signals compares all signals in the test dataset against the signals in the reference dataset Compare Top Level Ports Compare Top Level Ports compares Specify Comparison by Signal the top level ports of the selected gt datasets C Specify Comparison by Region Specify Comparison by Signal opens the structure_browser to allow you to select specific signals for comparison Specify Comparison by Region opens the Add Comparison by Region dialog to allow selection of a specific reference region lt Previous Next gt Cancel Viewing comparison data Compari
114. orial Figure 98 Excluding a line in the Source window m source test me _____ er File Edit View Tools Window SED 4 BBO mM XOX ER Insel A x un amp y lt 3 S 119 G posedge clk rd_wdi h gt l Y 120 posedge clk rdiwd h gt S 121 G posedge clk rdiwd h gt gt S 122 posedge clk ill_op S 123 posedge clk nop 124 end Wie Exclude Coverage Line 125 Exclude Entire File Do Not Exclude Coverage Line 125 Do Not Exclude Entire File 100 stop q i into out_ wire rst clk dat addr SESS 3 1a Figure 99 Excluding an entire file via the GUI workspace Workspace re 10 u Varilan 79 73 92 405 MT Coverage Reports Exclude Selected File Properties al Clear Coverage Data gt j Library sim Files Creating Code Coverage reports You can create reports on the coverage statistics using either the menus or by entering commands in the Transcript pane The reports are output to a text file regardless of which method you use To create coverage reports via the menus do one of the following select Tools gt Coverage gt Reports from the Main window menu right click any item in the sim or Files tab of the Main window Workspace and select Coverage gt Coverage Reports from the context menu and submenu right click any item in the Instance Coverage pane and select Coverage reports from the context
115. orporation and Mentor Graphics Ireland Limited acting directly or through their subsidiaries or authorized distributors collectively Mentor Graphics USE OF SOFTWARE INDICATES YOUR COMPLETE AND UNCONDITIONAL ACCEPTANCE OF THE TERMS AND CONDITIONS SET FORTH IN THIS AGREEMENT If you do not agree to these terms and conditions promptly return or if received electronically certify destruction of Software and all accompanying items within five days after receipt of Software and receive a full refund of any license fee paid END USER LICENSE AGREEMENT 1 GRANT OF LICENSE The software programs you are installing downloading or have acquired with this Agreement including any updates modifications revisions copies documentation and design data Software are copyrighted trade secret and confidential information of Mentor Graphics or its licensors who maintain exclusive title to all Software and retain all rights not expressly granted by this Agreement Mentor Graphics grants to you subject to payment of appropriate license fees a nontransferable nonexclusive license to use Software solely a in machine readable object code form b for your internal business purposes and c on the computer hardware or at the site for which an applicable license fee is paid or as authorized by Mentor Graphics A site is restricted to a one half mile 800 meter radius Mentor Graphics standard policies and programs which vary depend
116. owing lines proc add_wave_zoom stime num echo Bookmarking wave num bookmark add wave bk num expr stime 50 expr stime 1001 0 add button num list bookmark goto wave bk num These commands do the following e Create a new procedure called add_wave_zoom that has two arguments stime and num e Create a bookmark with a zoom range from the current simulation time minus 50 time units to the current simulation time plus 100 time units e Add a button to the Main window that calls the bookmark b Now add these lines to the bottom of the script add wave r when clk event and clk 1 echo Count is exa count if exa count 00100111 add_wave_zoom Snow 1 elseif exa count 01000111 add_wave_zoom Snow 2 ModelSim SE Tutorial These commands do the following e Add all signals to the Wave window e Use a when statement to identify when clk transitions to 1 e Examine the value of count at those transitions and add a bookmark if it is a certain value Save the script with the name add_bkmrk do Save it into the directory you created in Chapter Lesson 2 Basic simulation 2 Load the test_counter design unit Start ModelSim Select File gt Change Directory and change to the directory you saved the DO file to in step 1c above In the Library tab of the Main window expand the work library and double click the test_counter design unit 3 Execute the DO file
117. r design You ll be working from the system command prompt in the directory you created in Chapter Lesson 2 Basic simulation 1 Create the DO file a b Open a text editor Type the following lines into a new file view wave title Sentity view si title Sentity view so title Sentity The pre defined variable entity will read in the name of the top level design unit you simulate Save the file with the name startup do and place it in the directory you created in Chapter Lesson 2 Basic simulation 2 Edit the modelsim ini file a With a text editor open the modelsim ini file in the current directory This should be the same directory to which you saved the startup do file Find the following line in the file Startup do startup do Remove the semicolon to un comment the line and then save and close the file Running ModelSim with a startup DO file T 135 ModelSim SE Tutorial T 136 Lesson 12 Automating ModelSim 3 Execute ModelSim from the system prompt a Open a DOS UNIX prompt and change to the directory you ve been using in the last two steps b Type vsim title counter test_counter at the command prompt ModelSim opens loads the test_counter design unit and then displays the Signals Source and Wave windows with the title test_counter Notice that we had to use the title argument to vsim in order to change the title of the Main window 4 Select File gt Quit to clo
118. s to one file next you save the comparison configuration rules to a separate file When you reload the data you must have the reference dataset open 1 Save the comparison data to a text file Select Tools gt Waveform Compare gt Differences gt Write Report b Click Save This saved compare txt to the current directory Figure 109 c Type notepad compare txt at the VSIM gt prompt d Close Notepad when you are done reviewing the report 2 Save the comparison data Select Tools gt Waveform Compare gt Differences gt Save b Click Save This saved compare dif to the current directory Select Tools gt Waveform Compare gt Rules gt Save d Click Save This saved compare rul to the current directory e Select Tools gt Waveform Compare gt End Comparison 3 Reload the comparison data Select File gt Open gt Dataset and open gold wif b Select Tools gt Waveform Compare gt Reload Since you saved the data using default file names the dialog should already have the correct files specified Figure 110 c Click OK The comparison reloads Saving and reloading comparison data T 129 Figure 109 Coverage data saved to a text file Notepad E 0 x File Edit Window compare txt Total signals compared 11 Total primary differences 6 Total secondary differences 6 Number of primary signals with differences 4 Diff number 1 From time 135 ns delta O to time 155 ns gold test_sm into 000000
119. s xi a Select the mem tab at the bottom of the Address Data pane to view the Address Radix Data Radix ram_tb spraml instance en gone b Select View gt Display options to bring up the dialog box Figure 63 oe fl Binary c For the Address Radix select Decimal C Octal d Select Words per line and type 1 in the field C Decimal e Click OK Unsigned You can see the results of the settings in Figure 64 Hexadecimal Line Wrap Fit in Window Words per Line Mo OK Cancel Figure 64 Memory window new address radix and line length memory default File Edit Wew Window Memory List x Address Data Instance Range 0 00101000 1 00101001 D iram_tb spramiimem 0 4095 2 00101010 D ram_tbispram mem 0 2047 00101100 5 6 8 ix 00101011 am_tbispram3 mem 0 65535 ptt fram_thispram4imem 0 1 00101111 00110000 iram_tbidpramtimem 0 15 0011000 oT Nenn A Address decimal Instance ram_tb spram1 mem Data symbolic ModelSim SE Tutorial T 88 Lesson 8 Viewing and initializing memories Navigating within the memory You can navigate to specific memory address locations or to locations containing particular data patterns First you will go to a specific address 1 Use Goto to find a specific address If necessary click on the ram_tb spram1 in the Memory list pane b Select Edit gt Goto from the Memory menu The Goto dialo
120. se ModelSim 5 Edit the modelsim ini to remove the startup DO file a With a text editor open the modelsim ini file in the current directory b Find the following line in the file Startup do startup do c Add a semicolon and space to the beginning of the line and then save and close the file ModelSim SE Tutorial Running ModelSim in command line mode We use the term command line mode to refer to simulations that are run from a DOS UNIX prompt without invoking the GUI Several ModelSim commands e g vsim vlib vlog etc are actually stand alone executables that can be invoked at the system command prompt Additionally you can create a DO file that contains other ModelSim commands and specify that file when you invoke the simulator 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise Create the directory and copy these files into it lt install_dir gt modeltech examples counter v e lt install_dir gt modeltech examples stim do We have used the Verilog file counter v in this example If you have a VHDL license use counter vhd instead 2 Create a new design library and compile the source file Again enter these commands at a DOS UNIX prompt in the new directory you created in step 1 a Type vlib work at the DOS UNIX prompt b For Verilog type vlog counter y at the DOS UNIX prompt For VHDL type vcom counter vhd Running ModelSi
121. son data displays in three places within the ModelSim GUI the Main window the Wave window and the List window Viewing comparison data in the Main window The Compare tab in the Main window shows the region that was compared and the Transcript shows the number of differences found between the reference and test datasets Figure 105 Viewing comparison data in the Wave window In the signals pane of the Wave window a timing differences is denoted by ared X Figure 106 Red areas in the waveform pane show the location of the timing differences as do the red lines in the scrollbars Annotated differences are highlighted in blue The Wave window includes six compare icons that let you quickly jump between differences Figure 107 From left to right the icons do the following find first difference find previous annotated difference find previous difference find next difference find next annotated difference find last difference Use these icons to move the selected cursor The compare icons cycle through differences on all signals To view differences for just the selected signal use lt tab gt and lt shift tab gt Viewing comparison data T 127 Figure 105 The Compare tab in the Main window Workspace Di Moaeisim tox Fie Edit View Compile Simulate Tools Window Help s e sesaR t 8 melaa Workspace xj ee a Top level modules E test_sm test_sm VirtualReg vsim test
122. stics you want second you load the design and tell ModelSim to produce those statistics 1 Create a new directory and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt modeltech examples coverage verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt modeltech examples coverage vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Create the working library a Type vlib work at the ModelSim gt prompt Compile the design files a For Verilog Type vlog cover bet sm v sm_seq v beh_sram v test_sm v at the ModelSim gt prompt For VHDL Type vcom cover bet sm vhd sm_seq vhd sm_sram vhd test_sm vhd at the ModelSim gt prompt The cover bet argument instructs ModelSim that you want branch condition and toggle coverage statistics Seethe Code Coverage chapter in the ModelSim User s Manual for more information on the available coverage types Compiling and loading the design T 109 ModelSim SE
123. swave default re File Edit View Insert Format Tools Window test_counter cik 1 test_counter reset 0 test_counter count 00011000 I CSSSSCCCSCH EGET E77 07H LI II Now 1000 ns D ng to 768 ns 2a Figure 44 Interval measurement between two cursors wave default i File Edit View Insert Format Tools Window test_counter clk S test_counter reset ew test_counter count Co ihi BERB Now A Ons to 768 ns ModelSim SE Tutorial T 68 Lesson 6 Viewing simulations in the Wave window 2 Lock cursor B a With cursor B selected select Edit gt Edit Cursor b Check Lock cursor to specified time and click OK Figure 45 The cursor color changes to red and you can no longer drag the cursor Figure 46 3 Delete cursor B a With cursor B selected select Edit gt Delete Cursor ModelSim SE Tutorial Figure 45 The cursor properties dialog gt cursor_props ETTE M Cursor Name r M Cursor Time 68 ns T Lock cursor to specified time OK Cancel Figure 46 A locked cursor in the Wave window 2b wave default E S ol x File Edit Yiew Insert Format Tools Window test_counter clk gt test_counter teset Geet test_counter count 00000011 III Saving the window format If you close the Wave window any configurations you made to the window e g signals
124. tbench to the project a b c d Click Add Existing File in the Add items to the Project dialog Click the Browse button and select tcounter v Click Open and then OK Click Close to dismiss the Add items to the Project dialog The tcounter v file is listed in the Project tab of the Main window Compile the testbench a Right click tcounter v and select Compile gt Compile Selected Creating the project T 47 ModelSim SE Tutorial T 48 Lesson 4 Working with multiple libraries Linking to the resource library To wrap up this part ofthe lesson you will link to the parts_lib library you created earlier But first try simulating the testbench without the link and see what happens ModelSim responds differently for Verilog and VHDL in this situation Verilog 1 Simulate a Verilog design with a missing resource library a Inthe Library tab click the icon next to the work library and double click test_counter The Main window Transcript reports an error Figure 29 When you see a message that contains text like Error vsim 3033 you can view more detail by using the verror command b Type verror 3033 at the ModelSim gt prompt The expanded error message tells you that a design unit could not be found for instantiation It also tells you that the original error message should list which libraries ModelSim searched In this case the original message says ModelSim searched only work VHDL 1 Si
125. utorial Lesson 4 Working with multiple libraries Topics The following topics are covered in this lesson Introduction Related reading Creating the resource library Creating the project Linking to the resource library Permanently mapping resource libraries Lesson wrap up T 44 T 44 T 45 T 47 T 48 T 51 T 52 T 43 ModelSim SE Tutorial T 44 Lesson 4 Working with multiple libraries Introduction In this lesson you will practice working with multiple libraries As discussed in Lesson I ModelSim conceptual overview you might have multiple libraries to organize your design to access IP from a third party source or to share common parts between simulations You will start the lesson by creating a resource library that contains the counter design unit Next you will create a project and compile the testbench into it Finally you will link to the library containing the counter and then run the simulation Design files for this lesson The sample design for this lesson is a simple 8 bit binary up counter with an associated testbench The pathnames are as follows Verilog lt install_dir gt modeltech examples counter v and tcounter v VHDL lt install_dir gt modeltech examples counter vhd and tcounter vhd This lesson uses the Verilog files tcounter v and counter v in the examples If you have a VHDL license use tcounter vhd and counter vhd instead Related reading ModelSim User
126. v hold the lt Ctrl gt key down and then select tcounter v c With the two files selected click Compile The files are compiled into the work library d Click Done 2 View the compiled design units a On the Library tab click the icon next to the work library and you will see two design units Figure 5 If you scroll to the right you will see their types modules in this case and the path to the underlying source files Compiling the design T 23 Figure 4 The Compile HDL Source Files dialog Compile Source Files Library fwork o Look in Quoi O ea ex Fe counter Ecounter File name tcounter v counter v Files of type HDL Files v vl vhd vhdl vho hdl v Y Done Default Options Edit Source Figure 5 Verilog modules compiled into the work library IRAI ModelSim File Edit View Compile Simulate Tools Window Help Compiling module test_counter E Library Top level modules NJ counter Module test_counter 7 test counter Module vlog reportprogress 300 work work C Modeltech_5 7 w z i b examples counter v El vital2000 Library MODEL_ Model Technology MadelSim SE vlog 5 8 Beta Com ieee Library MODEL_ piler 2003 08 Aug 25 2003 E ffi modelsim ib Libary MODEL_ 114 Compiling module counter il std Library MODEL_ vf Top level modules counter Library ModelSim gt lt No Design Loaded DI 4
127. windows e g Main Signals and Variables a Drag an instance from the sim tab of the Main window to the Wave ModelSim adds the items for that instance to the Wave window b Drag a signal from the Signals window to the Wave window c Inthe Wave window select Edit gt Select All and then Edit gt Delete 3 Add items using a command a Type add wave at the VSIM gt prompt ModelSim adds all items from the current region b Run the simulation for awhile so you can see waveforms ModelSim SE Tutorial Zooming the waveform display Zooming lets you change the display range in the waveform pane There are numerous methods for zooming the display 1 Zoom the display using various techniques a Click the Zoom Mode icon on the Wave window toolbar b Inthe waveform pane click and drag down and to the right You should see blue vertical lines and numbers defining an area to zoom in Figure 40 c Select View gt Zoom gt Zoom Last The waveform pane returns to the previous display range d Click the Zoom In 2x icon a few times e Inthe waveform pane click and drag up and to the right You should see a blue line and numbers defining an area to zoom out Figure 41 f Select View gt Zoom gt Zoom Full Zooming the waveform display T 65 Figure 40 Zooming in with the mouse pointer LTT 1 File Edit Yiew Insert Format Tools Window 88 x Ba nase nmiaaan S test_counter clk 0
128. with no errors ModelSim gt wm title ModelSim ModelSim gt T Project Library Project test lt No Design Loaded gt lt No Context gt y ModelSim SE Tutorial T 40 Lesson 3 ModelSim projects 2 Load the Simulation Configuration Figure 26 Transcript shows options used for Simulation Configuration a Double click the counter Simulation Configuration in the Project tab Fv Modelsim In the Transcript pane of the Main window the vsim the ModelSim File Edit View Compile Simulate Tools Window Help simulator invocation shows the hazards and t ps switches Figure 26 These are the command line equivalents of the options you specified in the Simulate dialog 2 Dit s 15 339 933 696 bytes free Loading project test Compile of tcounter v was successful counter Compile of counter v was successful 2 compiles 0 failed with no errors vsim work test_counter vsim work test_counter Loading work test_counter Loading work counter command line switches ModelSim SE Tutorial Lesson wrap up This concludes this lesson Before continuing you need to end the current simulation and close the current project 1 Select Simulate gt End Simulation Click Yes 2 Select File gt Close gt Project Click OK If you do not close the project it will open automatically next time you start ModelSim Lesson wrap up T 41 ModelSim SE Tutorial T 42 Lesson 3 ModelSim projects ModelSim SE T
129. y and copy the tutorial files into it Start by creating a new directory for this exercise in case other users will be working with these lessons Create the directory and copy all files from lt install_dir gt examples dataflow verilog to the new directory If you have a VHDL license copy the files in lt install_dir gt examples dataflow vhdl instead Start ModelSim and change to the exercise directory If you just finished the previous lesson ModelSim should already be running If not start ModelSim a Type vsim at a UNIX shell prompt or use the ModelSim icon in Windows If the Welcome to ModelSim dialog appears click Close b Select File gt Change Directory and change to the directory you created in step 1 Execute the lesson DO file a Type do run do at the ModelSim gt prompt The DO file does the following e Creates the working library e Compiles the design files e Opens the Dataflow Signals and Wave windows e Adds signals to the Wave window e Logs all signals in the design e Runs the simulation Feel free to open the DO file and look at its contents Compiling and loading the example design T 73 ModelSim SE Tutorial T 74 Lesson 7 Debugging with the Dataflow window Exploring connectivity A primary use of the Dataflow window is exploring the physical connectivity of your design You do this by expanding the view from process to process This allows you to see the drivers receivers of a particular sign

ModelSim SE Tutorial - Electrical & Computer Engineering

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ModelSim SE Tutorial - Electrical &amp; Computer Engineering

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ModelSim SE Tutorial - Electrical & Computer Engineering