PLC actuator high-side driver solution with CMOS interface based
Contents
1. 2443 77 Application note PLC actuator high side driver solution with CMOS interface based on VN808CM E High side Driver Main Features 8 output channels 8 x 0 7A 1 feedback channel diagnostic CMOS compatible signals allow direct connection to a microcontroller Outputs Diagnostic indicated by LEDs Immunity Proof 4kV level EFT IEC 61000 4 4 2kV Voltage Surge 61000 4 5 m Compatible with existing ST tools CANIC10 m 10 5 33V DC Supply Voltage range Introduction This application note describes the STEVAL IFP001V1 hardware implementation It focus on PCB design which is critical for EMC immunity robustness and thermal management The VN808CM E is a monolithic device designed in STMicroelectronics 0 3 technology The product is intended for driving any kind of load with one side connected to ground It can be driven by using a 5 0V or 3 3V logic supply This allows realizing an output stage without optical decoupling or another level shifting Active current limitation combined with thermal shutdown and automatic restart protect the device against accidental or long time short circuit and overload The complete solution is implemented on a double face board with only two copper layers which is cost effective also precision of routing is cost optimized STEVAL IFP001V1 is delivered in a set with CD ROM including board fabrication data Gerber files2. List of figures Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6 Figure 7 Figure 8 Figure 9 Figure 10 Figure 11 4 15 STEVAL IFP001V1 application top view 5 STEVAL IFP001V1 application bottom view 5 JP1 Connector RR 6 JP2 6 Reverse polarity 7 Application schematic 403 1 8 Thermal vias placement 5 5 9 PCB toplayer zc eet et ER e ot S gc S Rake end 12 bottomlayer srd issiria ele 12 PCB silk scr en top lies suus s 13 silk screen bottom 13 AN2443 Overview Overview Application is built on double face FR4 substrate printed circuit board with 35um copper plating PCB dimensions are 94 mm x 74 mm Figure 1 STEVAL IFP001V1 application top view St com STEVAL IFPOO1V1 Figure 2 STEVAL IFP001V1 application bottom view Dew Ri 5 15 Connectors AN2443 2 6 15 Connectors The application uses two input connectors one output and one supply voltage terminal Bo
3. Y WITH RESPECT TO THE USE AND OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY FITNESS FOR A PARTICULAR PURPOSE AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION OR INFRINGEMENT OF ANY PATENT COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE ST PRODUCTS ARE NOT RECOMMENDED AUTHORIZED OR WARRANTED FOR USE IN MILITARY AIR CRAFT SPACE LIFE SAVING OR LIFE SUSTAINING APPLICATIONS NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY DEATH OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ST PRODUCTS WHICH ARE NOT SPECIFIED AS AUTOMOTIVE GRADE MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER S OWN RISK Resale of ST products with provisions different from the statements and or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever any liability of ST ST and the ST logo are trademarks or registered trademarks of ST in various countries Information in this document supersedes and replaces all information previously supplied The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners 2006 STMicroelectronics All rights reserved STMicroelectronics group of companies Australia Belgium B
4. cally connected by jumper W1 To ensure the reverse polarity protection replace this jumper by a parallel combination of a resistor e g 1kW and diode universal or schottky as shown in Figure 5 Output capacitors C1 to C8 improve application EMC immunity robustness especially for compliance with standard 61000 4 6 Immunity to conducted disturbances Figure 5 Reverse polarity protection IN1 OUTI IN2 OUT2 IN3 OUT3 IN4 VN808CM E OUT4 5 OUTS ING OUT6 IN7 OUT7 STATUS ov ai13630 7 15 2443 Connection description Application schematic diagram Figure 6 mdg 1022000 Lar 9cu lt 5 Isa SHI sta 61 0c Ic 4901 Vc 52 9c LC 8c 6 oE It ct EE yt GE 9t JN2808NA Lt DJA A0S MTT DOA LT SI fT CH 71 WOLF eA E Ir MOL or 6 MOLE 9 8 SOLE LA L RT E HOLT ON s T 5 VEELSIINS smdz euism TXL Imdur c mur S dur 9 mddur L 8 SWEIS puo eman pur 9 Sus SPAS 8 15 AN2443 Thermal management 4 Thermal management The PCB includes a 14 x 53mm heat
5. ision history 14 15 Table 5 Document revision history Date Revision Changes 05 Dec 2006 1 Initial release 14 Dec 2006 2 Figure 5 Reverse polarity protection updated AN2443 Please Read Carefully Information in this document is provided solely in connection with ST products STMicroelectronics NV and its subsidiaries ST reserve the right to make changes corrections modifications or improvements to this document and the products and services described herein at any time without notice All ST products are sold pursuant to ST s terms and conditions of sale Purchasers are solely responsible for the choice selection and use of the ST products and services described herein and ST assumes no liability whatsoever relating to the choice selection or use of the ST products and services described herein No license express or implied by estoppel or otherwise to any intellectual property rights is granted under this document If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein UNLESS OTHERWISE SET FORTH IN ST S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANT
6. lock 2 54x2 54mm pitch 4 JP3 ARK508 2P 4 x terminal block 5 08mm pitch 1 JP4 ARK508 2P 1 x terminal block 5 08mm pitch 1 W1 Jumper 2 pin header 2 54mm pitch Resistors 9 R1 R9 470R Resistor SMD size 0805 150V 300V 0 125W 5 1 R18 1k5 Resistor SMD size 0805 150V 300V 0 125W 5 8 R19 R26 4k7 Resistor SMD size 0805 150V 300V 0 125W 5 ICs 1 U1 VN808CM E STMicroelectronics VN808CM E Octal high side driver 11 15 AN2443 PCB layout PCB top layer top Figure 8 11111111 a 23 23835 aera ra gt 7 PCB bottom layer Figure 9 Appendix B PCB layout 12 15 AN2443 PCB layout Figure 10 PCB silk screen top TopOverlay St Com STEURL IFPOO1U1 JP3 2 14 1 13 34 33 20 4 4 4 4 4 4 4 74 ANWA DIAN CO cO Le Lie Lie Li Lie c c c c c c c c ol E Cu tatus ail J 1 Figure 11 PCB silk screen bottom us yevOtod 2 n PT BARN SE a RR r1 a FAL pay Fay pay r1 t LIOL IOLIOLIOLIOLIOLI ef lo VT 1 LIG 13 15 Revision history AN2443 Rev
7. razil Canada China Czech Republic Finland France Germany Hong Kong India Israel Italy Japan Malaysia Malta Morocco Singapore Spain Sweden Switzerland United Kingdom United States of America www st com 15 15 4
8. riteria A t 2kV Criteria A Application note AN2208 see Section 7 Reference documents provides specific information about test setups 9 15 Technical data AN2443 6 10 15 Technical data Table3 STEVAL IFP001V1 technical data Parameter Min Typ Max Unit Board Supply Voltage range recommended 10 5 33 V DC Output current per channel nominal value 0 5 A DC Output low level voltage 3 V DC Supply leakage current 24VDC all inputs grounded 88 pA DC Input signal low level voltage 0 1 25 V DC Input signal high level voltage 2 25 6 V DC 1 These values are for information only Reference documents 1 1351 AND BCDmultipower Making Life Easier with ST s High side Drivers 2 AN2208 Designing Industrial Applications with VN808 VN340SP High side Drivers AN2443 Bill of materials Appendix A Bill of materials Table 4 List of components Quantity Reference Part Description Capacitors 8 C1 C8 10nF Ceramic capacitor SMD size 0805 50V 1 C11 100nF Ceramic capacitor SMD size 0805 50V 1 C13 22uF Electrolytic capacitor 22uF 50V SMD 20 Diodes 1 D1 SM15T33A Transil diode 33V 9 DS1 DS9 LED 1206 LED SMD size 1206 green color Mechanical parts 1 JP1 MLW34G 34 pin header dual in line with lock 2 54x2 54mm pitch 1 JP2 MLW14G 14 pin header dual in line with
9. sink on both the top and bottom layers Both heatsinks are thermally interconnected with vias Another via grid is placed directly under the device exposed pad This grid creates a low resistive thermal connection of the device thermal slug to the bottom copper layer Via drill holes should be approximately 0 3mm in diameter and the orthogonal grid approximately 1 2mm as shown in Figure 7 Figure 7 Thermal vias placement suggestion VN808CM Exposed pad 342506 Immunity testing The application was tested according to electromagnetic compatibility EMC immunity standards IEC61000 4 4 Fast Transient Burst and IEC61000 4 5 High Energy Surge The Fast Transient Burst test lasted approximately 1 minute with 4 kV and a repetition rate of 5 kHz All channels were in Switching mode with a frequency of approximately 1Hz The burst signal was applied using a capacitive coupling clamp tool The High Energy Surge test was performed only in Differential mode no protective GND available The signal was coupled by 420 impedance The test contained five positive and five negative discharges The repetition rate was 1 discharge per minute The application worked properly during and after the tests Table 2 shows the test results Table 2 EMC Immunity standards Applied to Standard IEC61000 4 4 IEC61000 4 5 Differential Mode Supply voltage lines t 4kV Criteria A t 2kV Criteria A Output port t 4kV C
10. th input connectors JP1 and JP2 provide the same signals the difference is in type and pinout The location of connector JP1 ensures better compatibility with existing tools primarily used for motor control Figure 3 1 connector pinout 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 Figure 4 2 connector pinout Table 1 Connectors JP1 and JP2 signal assignments JP1 pin number JP2 pin number Signal Type 2 3 Status Output 4 4 Input 8 Input 10 5 Input 7 Input 14 6 Input 6 Input 20 7 Input 5 Input 22 8 Input 4 Input 23 2 GND Ground reference 26 9 Input 3 Input 28 10 Input 2 Input 32 11 Input 1 Input AN2443 Connection description 3 Connection description The application is connected as shown in Figure 6 It is not intended for a standalone operation and a control unit is necessary to provide the input signals The control unit can be connected either to connector JP1 or JP2 Resistors R1 to R9 protect the control unit and prevent latch up Their value can be extended up to approximately 10kW depending on the application requirements Output states of the VN808CM E device are monitored by LEDs 052 to 059 051 is used for diagnostic purposes The STATUS pin of the VN808CM E with its open source structure provides typically 3mA current in case of over temperature conditions GND of the device is typi
11. this user manual and related devices documentation for latest information please have a look at www st com December 2006 Rev 2 1 15 www st com Contents AN2443 Contents 1 ups discas rcnt Ra a a 5 2 ix dc aO e d C Ca acid cuo e ene 6 3 Connection description 7 4 Thermal management 9 5 EMC Immunity 0 9 6 Technical dala dac ka ae eu 10 7 Reference documents 10 Appendix Bill of materials 11 Appendix B PCB 12 Revision TUES EON Yh x rio doi ac oia omar ue RM Co A tu 14 2 15 57 AN2443 List of tables List of tables Table 1 Connectors JP1 and JP2 signal assignments 6 Table 2 EMC Immunity 1 9 Table 3 STEVAL IFP001V1 technical 10 Table 4 List Of componens uen Rao ES PG M oa RR RU 11 Table 5 Document revision history 14 3 15 List of figures AN2443
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