P89C669 80C51 8-bit microcontroller family with extended
Contents
1. 80C51 8 bit microcontroller family with extended memory 96 kB Flash with 2 kB RAM BUS Rev 02 13 November 2003 Product data 1 General description The P89C669 represents the first Flash microcontroller based on Philips Semiconductors new 51MX core The P89C669 features 96 kbytes of Flash program memory and 2 kbytes of data SRAM In addition this device is equipped with a Programmable Counter Array PCA a watchdog timer that can be configured to different time ranges through SFR bits as well as two enhanced UARTs and byte based C bus serial interface Philips Semiconductors 51 MX Memory eXtension core is an accelerated 80C51 architecture that executes instructions at twice the rate of standard 80C51 devices The linear address range of the 51MX has been expanded to support up to 8 Mbytes of program memory and 8 Mbytes of data memory It retains full program code compatibility to enable design engineers to re use 80C51 development tools eliminating the need to move to a new unfamiliar architecture The 51MX core also retains 80C51 bus compatibility to allow for the continued use of 80C51 interfaced peripherals and Application Specific Integrated Circuits ASICs The P89C669 provides greater functionality increased performance and overall lower system cost By offering an embedded memory solution combined with the enhancements to manage the memory extension the P89C669 eliminat2. DIMENSIONS mm are the original dimensions UNIT A A2 As bp C 1 45 0 05 1 35 0 30 Note 1 Plastic or metal protrusions of 0 25 mm maximum per side are not included OUTLINE REFERENCES EUROPEAN PROJECTION ISSUE DATE VERSION IEC JEDEC JEITA SOT389 1 136E08 MS 026 E 02 06 07 Fig 15 SOT389 1 Koninklijke Philips Electronics N V 2003 All rights reserved 9397 750 12299 Product data Rev 02 13 November 2003 27 of 33 Philips Semiconductors P89C669 13 Soldering 9397 750 12299 13 1 13 2 13 3 80C51 8 bit microcontroller family with extended memory Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology A more in depth account of soldering ICs can be found in our Data Handbook IC 26 Integrated Circuit Packages document order number 9398 652 90011 There is no soldering method that is ideal for all IC packages Wave soldering can still be used for certain surface mount ICs but it is not suitable for fine pitch SMDs In these situations reflow soldering is recommended In these situations reflow soldering is recommended Reflow soldering Reflow soldering requires solder paste a suspension of fine solder particles flux and binding agent to be applied to the printed circuit b
3. 0 pin 1 index ji Lp detail X 5 Ld Scale DIMENSIONS mm dimensions are derived from the original inch dimensions Ay Aa 1 EG min As bp b4 D E e ep eE Hp UNIT A max 16 66 16 66 0 51 3 05 16 51 16 51 1 27 0 656 0 656 inches 0 02 E 0 12 0 650 0 650 Note 1 Plastic or metal protrusions of 0 25 mm 0 01 inch maximum per side are not included OUTLINE REFERENCES EUROPEAN VERSION IEC JEDEC JEITA PROJECTION SOT187 2 112E10 MS 018 EDR 7319 fe pe T ISSUE DATE Fig 14 SOT187 2 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 26 of 33 P89C669 Philips Semiconductors 80C51 8 bit microcontroller family with extended memory LQFP44 plastic low profile quad flat package 44 leads body 10 x 10 x 1 4mm SOT389 1 SX rmm c2 oo ppp pin 1 index p HHE HRHHRHHRRHR A R S detail X
4. 2 3 Ordering information 3 3 1 Ordering options 3 4 Block diagram 4 5 Functional diagram 5 6 Pinning information see eee 6 6 1 PINNING uses eei ia ueni pp encom 6 6 1 1 Plastic leaded chip carrier 6 6 1 2 Plastic low profile quad flat package 7 6 2 Pin description 8 7 Functional description 11 7 1 Flash memory description 11 7 2 Memory arrangement 12 7 3 Special function registers 12 7 4 Security bits WA ea na a aE 17 8 Limitingvalues 17 9 Static characteristics 18 10 Dynamic characteristics 19 10 1 Explanation of AC symbols 21 10 2 Timingdiagrams 22 11 Test information 24 12 Package outline 26 13 Soldering IAA IIIA 28 13 1 Introduction to soldering surface mount packages 28 13 2 Reflow soldering 28 13 3 Wave soldering 28 13 4 Manual soldering 29 13 5 Package related soldering information 29 14 Revision history 31 15 Data sheet status 32 16 Definitions 32 17 Disclaimers
5. 80C51 8 bit microcontroller family with extended memory Plastic leaded chip carrier P1 5 CEX2 P1 6 SCL 8 P1 7 SDA 9 RST P3 0 RXDO RXD1 P3 1 TXDO P3 2 INTO P3 3 INT1 P3 4 CEX3 TO P3 5 CEXA T1 NC Vss 6 P1 4 CEX1 5 P1 3 CEXO 4 P1 2 ECI 3 P1 1 T2EX 2 P1 0 T2 43 PO 0 ADO 42 PO 1 AD1 41 PO 2 AD2 44 VDD 40 P0 3 AD3 P0 4 AD4 P0 5 AD5 P0 6 AD6 P0 7 AD7 EA Vpp P89C669FA TXD1 ALE PSEN P2 7 A15 P2 6 A14 A22 P2 5 A13 A21 00 o eo y N co Ub LO Oo N 00 7 IN Sy jN N fy NAN pat fay e 002aaa404 a e N a za N eo o eo Bir Q N I Edi 2 0x x x x EZ o x Lp E 2 0 0 S uq eo eo x x O x x T a oO zo c X x X a a N oO X E E Fig 3 PLCCAA pin configuration 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 6 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 6 1 2 Plastic low profile quad flat package 44 P1 4 CEX1 43 P1 3 CEXO 42 P1 2 ECI 41 P1 1 T2EX 40 P1 0 T2 39 NC Vss 38 VDD 37 PO 0 ADO 36 PO 1 AD1 35 P0 2 AD2 34 PO 3 AD3 P0 4 AD4 P1 6 SCL P0 5 AD5 P0 6 AD6 RST P0 7 AD7 P3 0 RXDO 29 EA Vpp RXD1 6 P89C669BBD 28 TxD1 P3 1 TXDO ALE P3 2 INTO 8 26 PSEN P3 3 INTT 9 P2 7 A15
6. seien 32 18 Licenses IIIA eee eee 32 Koninklijke Philips Electronics N V 2003 Printed in the U S A All rights are reserved Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner The information presented in this document does not form part of any quotation or contract is believed to be accurate and reliable and may be changed without notice No liability will be accepted by the publisher for any consequence of its use Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights Date of release 13 November 2003 Document order number 9397 750 12299 PHILIPS Let make things beter
7. tavivi 9 tAVIV gt AN N ZA P2 0 P2 7 OR A8 A15 OR 002aaa150 A16 A22 P2 7 Fig 5 External program memory read cycle ALE kt WALI PSEN EAM lu tLLDV gt K tLLWL 94 tRLRH 9 RD tLLaxk t t tAVLL 9 dini PULLUM tRHDZ tRHDX le N NN PORT 0 CADAT p d DATA in DY INSTR IN tavw e Ni tavwL1 le tavdvi tAVDV N PORT 2 cj P2 0 P2 7 OR A8 A15 XX X Y AN IN IN AN P2 0 P2 7 OR A8 A15 OR A16 A22 P2 7 002aaa151 Fig 6 External data memory read cycle 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 22 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory ALE le tWHL PSEN N tLLWL gt twLWH WR tLLAX e t tAVLL 79 abhi gt amp _ twuax he iQvWH tAVWL1 tAVWL gt PORT 2 K X P2oP27 OR AB AIS X AN AN P2 0 P2 7 OR AB A15 OR A16 A22 P2 7 002aaa153 Fig 7 External data memory write cycle INSTRUCTION 0 1 2 3 4 5 6 7 8 t tQVXH Ni Wo WRITE TO SBUF LAU F IXHDX SET TI A 630690690630 690 69063069 CLEAR RI SET RI 002aaa155 Fig8 Shift register mode tim
8. 7 V port 0 in external bus lou 3 2 mA mode ALEI I PSENISI lit Logical 0 input current Vin 0 4 V 1 75 uA ports 1 2 3 4 Ite Logical 1 to 0 transition 4 5 V Vpp 5 5 V 4 650 uA current ports 1 2 3 4181 V 2 0 V l4 Input leakage current port O 0 45 lt Viy lt Vpp 0 3 10 uA lec Power supply current BI Active mode Vpp 5 5 V 742 7 x fgg MHz mA Idle model 4 1 3 x fg MHz mA Power down mode or clock 20 100 uA stopped see Figure 13 for conditions Rast Internal reset pull down 40 225 kQ resistor Cio Pin capacitancel 15 pF except EA 1 Typical ratings are not guaranteed The values listed are at room temperature 25 C 5 V unless otherwise stated 2 Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the Vo of ALE and ports 1 3 and 4 The noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins make 1 to 0 transitions during bus operations In the worst cases capacitive loading gt 100 pF the noise pulse on the ALE pin may exceed 0 8 V In such cases it may be desirable to qualify ALE with a Schmitt Trigger or use an address latch with a Schmitt Trigger STROBE input loj can exceed these conditions provided that no single output sinks more than 5 mA and no more than two outputs exceed the test conditions 3 Capacitive loading on ports 0 and 2 may cause the Voy on AL
9. Data Pointer 2 bytes 00H AJOWOW popuoj1xe uii AJIWej 19 04 u0204091UI 11G 8 16209 S10 onpuooiuieg sdi iud 699D68d 00Z JoquieAoN 4 Z0 eH elep jonpoud E JO pL 66221 0SZ L6E6 pamasa SIYBU Ily 002 AN S91u0129 3 sdijiug exfipuruoy Table 5 Special function registers continued DPH Data Pointer HIGH 83H 00H DPL Data Pointer LOW 82H 00H EPL 2 Extended Data Pointer LOW FCHISI 00H EPM 2 Extended Data Pointer Middle FDHISI 00H EPH 2 Extended Data Pointer HIGH FEHISI 00H I2ADR 12C Slave Address Register 94H addr 6 addr 5 addr 4 addr 3 addr 2 addr 1 addr 0 GC 00H I2CON 12C Control Register 91H I2EN STA STO SI AA CRSEL 00H I2DAT 12C Data Register 93H I2CLH I C Clock Generator HIGH 96H 00H Register I2CLL 12C Clock Generator LOW 95H 00H Register I2STA 12C Status Register 92H code 4 code 3 code 2 code 1 code 0 0 0 0 F8H Bit address AF AE AD AC AB AA A9 A8 IENO UJ Interrupt Enable 0 A8H EA EC ET2 ESO ET1 EX1 ETO EXO 00H ESOR Bit address EF EE ED EC EB EA E9 E8 IEN1 1 Interrupt Enable 1 E8H EI2C ES1T ESOT ES1 00H 8 ES1R Bit address BF BE BD BC BB BA B9 B8 IPO Interrupt Priority B8BH PPC PT2 PSO PT1 PX1 PTO PXO 00H PSOR IPOH Interrupt Priority 0 HIGH B7H PPCH PT2H PSOH PT1H PX1H PTOH PXOH 00H PSORH Bit address FF FE FD FC FB FA F9 F8 IP40 Interrupt Priority 1 F8H PI2C PSIT PSOT PS4 OOH PS1R IP1H
10. Interrupt Priority 1 HIGH F7H PI2CH PS1TH PSOTH PS1H OOHIE PS1RH MXCONI MX Control Register FFH EAM ESMM EIFM OOHIE AJOWSW popuoj1xe uii AW 19 01 UOD019IW 11G 8 162098 S10 onpuooiuieg Sdijiud 699D68d 00Z JoquieAoN 4 Z0 eH elep jonpoud JO SL 66221 OSZ L6E6 pamasa siu u Ily 002 AN S91u0129 3 sdijiug exfipuruoy Table 5 Special function registers continued Bit address 87 86 85 84 83 82 81 80 Pott Port 0 80H AD7 AD6 AD5 AD4 AD3 AD2 AD1 ADO FFH Bit address 97 96 95 94 93 92 91 90 Pi NI Port 1 90H CEX4 CEX3 CEX2 CEX1 CEXO ECI T2EX T2 FFH SPICLK MOSI Bit address A7 A6 A5 A4 A3 A2 A1 A0 Pali Port 2 AOH AD15 AD14 ADA13 AD12 AD1 1 AD10 AD9 AD8 FFH AD22 AD21 AD20 AD19 AD18 AD17 AD16 Bit address B7 B6 B5 B4 B3 B2 B1 BO PSI Port 3 BOH RD WR T1 TO INT1 INTO TxDO RxDO FFH PCON 2 Power Control Register 87H SMOD1 SMODO POF GF1 GFO PD IDL 00H 10H14 Bit address D7 D6 D5 D4 D3 D2 D1 DO PSWI I Program Status Word DOH CY AC FO RS1 RSO OV F1 P 00H RCAP2H Timer2 Capture HIGH CBH 00H RCAP2L Timer2 Capture LOW CAH 00H Bit address 9F 9E 9D 9C 9B 9A 99 98 SOCON Serial Port 0 Control 98H SMO 0 SM1_0 SM20 REN 0 TB80 RB80 TIO RIO 00H FE 0 SOBUF Serial Port 0 Data Buffer 99H xxH Register SOADDR Serial Port 0 Address Register A9H 00H SOADEN Serial Port 0 Address Enable B9H 00H
11. SOSTATI2 Serial Port 0 Status 8CHIS DBMOD 0 INTLO_O CIDIS O DBISEL FE 0 BR 0 OE 0 STINT O OOHIS 0 Bit address 87131 86131 8513 84131 8311 82131 8113 80131 S1CONU I2l Serial Port 1 Control 80HIS SMO 1 SM1 1 SM2_1 REN_1 TB8 1 RB8 1 TI 1 RI 1 00H FE 1 S1BUF Serial Port 1 Data buffer Register 81HI XXH S1ADDRH Serial Port 1 Address Register 82HI5 00H AJOWSW popuoj1xe uii Iue 19 04 u0204091UI 11G 8 162098 699D68d S10 onpuooiuieg Sdijiud 00Z 49qUIeAON L Z0 eH elep jonpoud E JO OL 66221 0S4 L6E6 penuesei SIYBU Ily E00 AN 91U01193 3 sdijiug exfipuruoy Table 5 Special function registers continued S1ADEN Serial Port 1 Address Enable 83H93 00H S1STAT Serial Port 1 Status 84HI3 DBMOD 1 INTLO 1 CIDIS 1 DBISEL1 FE 1 BR 1 OE 1 STINT 1 OOHIE SP Stack Pointer Stack Pointer 81H 07H LOW Byte SPE 2 Stack Pointer HIGH FBHIS 00H Bit address 8F 8E 8D 8C 8B 8A 89 88 TCONI Timer Control Register 88H TF1 TR1 TFO TRO IE1 IT1 IEO ITO 00H CF CE CD CC CB CA C9 C8 T2CON I2 Timer2 Control Register C8H TF2 EXF2 RCLK TCLK EXEN2 TR2 C T2 CP RL2 00H T2MOD Timer2 Mode Control C9H T2OE DCEN 00H 8 THO Timer 0 HIGH 8CH 00H TH1 Timer 1 HIGH 8DH 00H TH2 Timer 2 HIGH CDH 00H TLO Timer 0 LOW 8AH 00H TL 1 Timer 1 LOW 8BH 00H TL2 Timer 2 LOW CCH 00H TMOD Timer 0 and 1 Mode 89H GATE C T M1 MO GATE C T M1 MO 00H WDTRSTH Wa
12. bits are programmed all of the conditions above apply and all external program memory execution is disabled Table 6 EPROM security bits 1 U U U No program security features enabled Flash is programmable and verifiable 2 P U U MOVC instructions executed from external program memory are disabled from fetching code bytes from internal memory EA is sampled and latched on Reset and further programming of the EPROM is disabled 3 P P U Same as 2 also verification is disabled 4 P P P Same as 3 external execution is disabled 1 P programmed U unprogrammed 2 Any other combination of security bits is not defined 8 Limiting values Table 7 Limiting values In accordance with the Absolute Maximum Rating System IEC 60134 Tamb operating temperature under bias 0 70 C 40 485 C Tstg storage temperature range 65 150 C Vi input voltage on EA Vpp pin to Vss 0 13 V input voltage on any other pin to Vss 0 5 Vpp 05 V l lo maximum lo per I O pin 20 mA P power dissipation based on package heat 1 5 WwW transfer not device power consumption 1 The following applies to the Limiting values a Stresses above those listed under Limiting values may cause permanent damage to the device This is a stress rating only and functional operation of the device at these or any conditions other than those described in Section 9 Static characteristics and Section 10 Dynamic
13. characteristics of this specification is not implied b This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static charge Nonetheless it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima c Parameters are valid over operating temperature range unless otherwise specified All voltages are with respect to Vss unless otherwise noted 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 17 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 9 Static characteristics Table 8 DC electrical characteristics Tamb 0 C to 70 C for commercial unless otherwise specified Vpp 4 5 V to 5 5 V unless otherwise specified VIL LOW level input voltage 0 5 0 2Vpp 0 1 V Vin HIGH level input voltage 0 2Vpp 0 9 Vpp 0 5 V ports 0 1 2 3 4 EA Vind HIGH level input voltage 0 7Vpp Vpp 0 5 V XTAL1 RST VoL LOW level output voltage Vpp 4 5 V logi 1 6 mA 0 4 V ports 1 2 3 48 Vout LOW level output voltage Vpp 4 5 V lot 3 2 mA 0 4 V port 0 ALE PSENI7II8 Vou HIGH level output voltage Vpp 4 5 V lon 2 30 A Vpp 0 7 V ports 1 2 3 4 Vout HIGH level output voltage Vpp 4 5 V Vpp 0
14. gt lieicL gt 4 7 us trp SDA rise time lt 1us trp SDA fall time lt 300 ns lt 0 3 us 1 Parameters are valid over operating temperature range unless otherwise specified 2 Load capacitance for port 0 ALE and PSEN 100 pF load capacitance for all other outputs 80 pF 3 Interfacing the microcontroller to devices with float times up to 45 ns is permitted This limited bus contention will not cause damage to Port 0 drivers 4 Parts are tested down to 2 MHz but are guaranteed to operate down to 0 Hz 10 1 Explanation of AC symbols Each timing symbol has five characters The first character is always t time The other characters depending on their positions indicate the name of a signal or the logical status of that signal The designations are A Address C Clock D Input data H Logic level HIGH Instruction program memory contents L Logic level LOW or ALE P PSEN Q Output data R RD signal t Time V Valid W WR signal X No longer a valid logic level Z Float 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 21 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Examples tavLL Time for address valid to ALE LOW tttpL Time for ALE LOW to PSEN LOW 10 2 Timing diagrams tLHLL gt ALE PSEN
15. 2003 9 of 33 Philips Semiconductors P89C669 Table 3 Pin description continued 80C51 8 bit microcontroller family with extended memory XTAL2 20 14 O Crystal 2 Output from the inverting oscillator amplifier Vss 22 16 Ground 0 V reference Vpp 44 38 Power Supply This is the power supply voltage for normal operation as well as Idle and Power down modes NO Vss 1 39 No Connect Ground This pin is internally connected to Vss on the P89C669 If connected externally this pin must only be connected to the same Vss as at pin 22 Note Connecting the second pair of Vss and Vpp pins is not required However they may be connected in addition to the primary Vss and Vpp pins to improve power distribution reduce noise in output signals and improve system level EMI characteristics NC Vpp 23 17 No Connect Power Supply This pin is internally connected to Vpp on the P89C669 If connected externally this pin must only be connected to the same Vpp as at pin 44 Note Connecting the second pair of Vss and Vpp pins is not required However they may be connected in addition to the primary Vss and Vpp pins to improve power distribution reduce noise in output signals and improve system level EMI characteristics 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 10 of 33 Philips Semiconductors P89C669 80C51 8 bi
16. 6 E5 E4 E3 E2 E1 E0 ACCI I Accumulator EOH 00H AUXR 2 Auxiliary Function Register 8EH EXTRAM AO 00H 8 AUXR1 71 Auxiliary Function Register 1 A2H ENBOOT GF2 0 DPS 00H 8 Bit address F7 F6 F5 F4 F3 F2 F1 FO Bl B Register FOH 00H BRGCON Baud Rate Generator Control 85H93 SOBRGS BRGEN 00Hl8 BRGRO FII5 _ Baud Rate Generator Rate LOW 86HI 00H BRGR1 25 Baud Rate Generator Rate HIGH 87H63I 00H 8 CCAPOH Module 0 Capture HIGH FAH XXH CCAP1H 2 Module 1 Capture HIGH FBH XXH CCAP2H 2 Module 2 Capture HIGH FCH XXH CCAP3H 2 Module 3 Capture HIGH FDH XXH CCAP4HI2 Module 4 Capture HIGH FEH XXH CCAPOLI Module 0 Capture LOW EAH XXH CCAP1L Module 1 Capture LOW EBH XXH CCAP2LI2 Module 2 Capture LOW ECH XXH CCAPS3LI Module 3 Capture LOW EDH XXH CCAP4LI Module 4 Capture LOW EEH XXH CCAPMO 2 Module 0 Mode DAH ECOM_0 CAPPO CAPNO MATO TOGO PWM 0 ECCF 0 00HI6 CCAPM1 2 Module 1 Mode DBH ECOM 1 CAPP 1 CAPN 1 MAT TOG 1 PWM 1 ECCF 1 00H CCAPM2 2 Module 2 Mode DCH ECOM 2 CAPP2 CAPN2 MAT 2 TOG2 PWM 2 ECCF 2 00H CCAPM3 2 Module 3 Mode DDH ECOM 3 CAPP_3 CAPN3 MATS3 TOGSGS PWM 3 ECCF 3 00H CCAPM4 2 Module 4 Mode DEH ECOM 4 CAPP4 CAPN4 MAT 4 TOGA4 PWM 4 ECCF 4 00H Bit address DF DE DD DC DB DA D9 D8 CCON J2 PCA Counter Control D8H CF CR CCF4 CCF3 CCF2 CCF1 CCFO OOHIS CHIZI PCA Counter HIGH F9H 00H CLI PCA Counter LOW E9H 00H CMOD I PCA Counter Mode D9H CIDL WDTE CPS1 CPSO ECF OOHIE DPTR
17. E and PSEN to momentarily fall below the Vpp 0 7 V specification when the address bits are stabilizing 4 Pins of ports 1 2 3 and 4 source a transition current when they are being externally driven from 1 to 0 The transition current reaches its maximum value when Vin is approximately 2 V for 4 5 V lt Vpp lt 5 5 V 5 See Figure 10 through Figure 13 for Icc test conditions fose is the oscillator frequency in MHz 6 This value applies to Tamb 0 C to 70 C 7 Load capacitance for port 0 ALE and PSEN 100 pF load capacitance for all other outputs 80 pF 8 Under steady state non transient conditions lo must be externally limited as follows a Maximum lo per port pin 15 mA b Maximum lo per 8 bit port 26 mA 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 18 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory c Maximum total lo for all outputs 71 mA If loi exceeds the test condition Vo may exceed the related specification Pins are not guaranteed to sink current greater than the listed test conditions 9 ALE is tested to Vou1 except when ALE is off then Voy is the voltage specification 10 Pin capacitance is characterized but not tested 10 Dynamic characteristics Table 9 AC electrical characteristics Tamb 0 C to 70 C for commercial unless otherwise
18. Extended Addressing Mode tLLWL 6 7 ALE LOW to RD or WR LOW 1 5tc_cL 10 1 5tetcL 20 52 82 ns tavwL 6 7 Address valid to WR or RD LOW 2tcicL 5 78 ns non Extended Addressing Mode tavwL1 6 7 Address A16 A22 valid to WR or RD tcici 10 31 ns LOW Extended Addressing Mode 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 19 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Table 9 AC electrical characteristics continued Tamb 0 C to 70 C for commercial unless otherwise specified Formulae including tci c assume oscillator signal with 50 50 duty cycle 1 2 3 tovwx 7 Data valid to WR transition O 5tci ci 15 5 ns twHox 7 Data hold after WR O 5tei ci 11 9 ns tavwH 7 Data valid to WR HIGH 3 5tcLceL 10 135 ns trLaz 6 RD LOW to address float 0 0 ns tWHLH 6 7 RD or WR HIGH to ALE HIGH 0 5tcLeL 11 0 5tcercL 10 9 30 ns External Clock tcHcx 9 HIGH time 16 tect tcLcx 16 ns tcLcx 9 LOW time 16 tcicL 7 tcucx 16 ns tci cH 9 Rise time 4 4 ns tcucL 9 Fall Time 7 4 4 ns Shift Register XLXL 8 Serial port clock cycle time 6tcLcL 250 ns tavxH 8 Output data set up to clock rising edge 5tci ci 10 198 ns txHax 8 Output data hold after clock rising edge tci ci 15 26 ns txHpx 8 Input data hold after clo
19. P3 4 CEX3 TO P2 6 A14 A22 P3 5 CEX4 T1 P2 5 A13 A21 eo wa N el LE 8 lel Ep C O N Ke d A o r o o o CO we ou xe amp lE22329258zccxxx o T LE E 2 0 5 S A eo e x x o lt x x T E 2 S 2 2 gag UU ow wp o0 0 F rom M Sog Fig 4 LQFP44 pin configuration 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 7 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 6 2 Pin description Table 3 Pin description P0 0 P0 7 43 36 30 37 1 0 Port 0 Port 0 is an open drain bidirectional I O port Port 0 pins that have 1s written to them float and can be used as high impedance inputs Port 0 is also the multiplexed low order address and data bus during accesses to external program and data memory In this application it uses strong internal pull ups when emitting 1s P1 0 P1 7 2 9 1 3 40 44 1 0 O O O 1 0 O 1 0 Port 1 Port 1 is an 8 bit bidirectional I O port with internal pull ups on all pins Port 1 pins that have 1s written to them are pulled HIGH by the internal pull ups and can be used as inputs As inputs Port 1 pins that are externally pulled LOW will source current because of the internal pull ups P1 0 T2 Timer Counter 2 external count input Clock out P1 1 T2EX Timer Counter 2 Reload Capture Direction Control P1 2 ECI Ext
20. ace and 23 bit data memory space Four level interrupt priority 32 I O lines 4 ports Three Timers TimerO Timer1 and Timer2 Two full duplex enhanced UARTs with baud rate generator Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 2 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Byte based Fast I C bus serial interface 400 kbits s Framing error detection Automatic address recognition Power control modes Clock can be stopped and resumed Idle mode Power down mode Second DPTR register Asynchronous port reset Programmable Counter Array PCA compatible with 8xC51Rx with five Capture Compare modules Low EMI inhibit ALE Watchdog timer with programmable prescaler for different time ranges compatible with 8xC66x with added prescaler 3 Ordering information 9397 750 12299 Table 1 Ordering information P89C669FA PLCC44 plastic leaded chip carrier 44 leads SOT187 2 P89C669BBD LQFP44 plastic low profile quad flat package 44 leads SOT389 1 body 10 x 10 x 1 4 mm 3 1 Ordering options Table 2 Ordering options P89C669FA 96kB 2048B 40 C to 85 C 4 5 to 5 5 V 0 to 24 MHz P89C669BBD 96kB 2048B 0 Cto 70 C 4 5 to 5 5 V 0 to 24 MHz Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 3 of 33 Philips Semiconduc
21. ck rising edge 0 0 ns txHpv 8 Clock rising edge to input data valid 5tcic_ 35 173 ns 1 Parameters are valid over operating temperature range unless otherwise specified 2 Load capacitance for port 0 ALE and PSEN 100 pF load capacitance for all other outputs 80 pF 3 Interfacing the microcontroller to devices with float times up to 45 ns is permitted This limited bus contention will not cause damage to Port 0 drivers 4 Parts are tested down to 2 MHz but are guaranteed to operate down to 0 Hz 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 20 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Table 10 1 C bus interface characteristics tHD STA START condition hold time gt ficu gt 4 0 us tiow SCL LOW time gt 8tci cL gt 4 7 us tHIGH SCL HIGH time gt ficu 4 0 us tnc SCL rise time lt 1us trc SCL fall time lt 0 3 us lt 0 3 us SU DAT1 Data set up time gt 250 ns gt 1Otcici trp tsu DAT2 SDA set up time before repeated START gt 250 ns gt 1us condition tsu DaT3 SDA set up time before STOP condition gt 250 ns gt 4tcicL HD DAT Data hold time 20ns gt 4tcici tec tsu STA Repeated START set up gt 7teLcL gt 4 7 us time tsu sTo STOP condition set up time gt TtcicL gt 4 0 us teur Bus free time
22. emory that can be addressed 1280 indirectly using Universal Pointers PRO 1 can be used 7F 0000 7F 04FF as stack XDATA memory on chip External Data that is accessed via 768 the MOVX EMOV instructions using DPTR EPTR 00 0000 00 02FF For more detailed information please refer to the P89C669 User Manual 7 3 Special function registers Special Function Register SFR accesses are restricted in the following ways User must not attempt to access any SFR locations not defined Accesses to any defined SFR locations must be strictly for the functions for the SFRs SFR bits labeled 0 or 1 can only be written and read as follows must be written with 0 but can return any value when read even if it was written with 0 It is a reserved bit and may be used in future derivatives 0 must be written with 0 and will return a 0 when read 1 must be written with 1 and will return a 1 when read 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 12 of 33 00Z JoquieAoN 4 Z0 eH elep jonpoud JO EL 66221 OSZ 26 6 penuesei SIYBU Ily 002 AN 91U01193 3 sdijiug exfipuruoy Table 5 Special function registers Bit address E7 E
23. ernal Clock Input to the PCA P1 3 CEXO Capture Compare External I O for PCA module 0 P1 4 CEX1 Capture Compare External I O for PCA module 1 with pull up on pin P1 5 CEX2 Capture Compare External I O for PCA module 2 with pull up on pin P1 6 SCL 2C serial clock when I C is used this pin is open drain and requires external pull up due to I2C bus specification P1 7 SDA C serial data when I C is used this pin is open drain and requires external pull up due to I C bus specification P2 0 P2 7 24 31 18 25 9397 750 12299 1 0 Port 2 Port 2 is a 8 bit bidirectional I O port with internal pull ups Port 2 pins that have 1s written to them are pulled HIGH by the internal pull ups and can be used as inputs As inputs port 2 pins that are externally being pulled LOW will source current because of the internal pull ups See Section 9 Static characteristics Ij Port 2 emits the high order address byte during fetches from external program memory and during accesses to external data memory that use 16 bit addresses MOVX DPTR or 23 bit addresses MOVX EPTR EMOV In this application it uses strong internal pull ups when emitting 1s During accesses to external data memory that use 8 bit addresses MOV Ri port 2 emits the contents of the P2 Special Function Register Note that when 23 bit address is used address bits A16 A22 will be outputted to P2 0 P2 6 when ALE is HIGH and address bi
24. es the need for software work arounds The increased program memory enables design engineers to develop more complex programs in a high level language like C for example without struggling to contain the program within the traditional 64 kbytes of program memory These enhancements also greatly improve C Language efficiency for code size below 64 kbytes The P89C669 device contains a non volatile Flash program memory that is both parallel programmable and serial In System and In Application Programmable In System Programming ISP allows the user to download new code while the microcontroller sits in the application In Application Programming IAP means that the microcontroller fetches new program code and reprograms itself while in the system This allows for remote programming over a modem link A default serial loader boot loader program in ROM allows serial In System programming of the Flash memory via the UART without the need for a loader in the Flash code For In Application Programming the user program erases and reprograms the Flash memory by use of standard routines contained in ROM The 51MX core is described in more detail in the 51MX Architecture Reference PHILIPS Philips Semiconductors P89C669 2 Features 9397 750 12299 80C51 8 bit microcontroller family with extended memory 2 1 Key features 2 2 2 3 Extended features of the 51MX Core 23 bit program memory space and 23 bit data memory space L
25. for product development Philips Semiconductors reserves the right to change the specification in any manner without notice ll Preliminary data Qualification This data sheet contains data from the preliminary specification Supplementary data will be published at a later date Philips Semiconductors reserves the right to change the specification without notice in order to improve the design and supply the best possible product HI Product data Production This data sheet contains data from the product specification Philips Semiconductors reserves the right to make changes at any time in order to improve the design manufacturing and supply Relevant changes will be communicated via a Customer Product Process Change Notification CPCN 1 Please consult the most recently issued data sheet before initiating or completing a design 2 The product status of the device s described in this data sheet may have changed since this data sheet was published The latest information is available on the Internet at URL http www semiconductors philips com 3 For data sheets describing multiple type numbers the highest level product status determines the data sheet status 16 Definitions Short form specification The data in a short form specification is extracted from a full data sheet with the same type number and title For detailed information see the relevant data sheet or data handbook Limiting values definition Limiti
26. iffused resistor to Vss permits a power on reset using only an external capacitor to Vpp ALE 33 27 O Address Latch Enable Output pulse for latching the LOW byte of the address during an access to external memory In normal operation ALE is emitted at a constant rate of 1 the oscillator frequency and can be used for external timing or clocking Note that one ALE pulse is skipped during each access to external data memory ALE can be disabled by setting SFR AUXR 0 With this bit is set ALE will be active only during a MOVX instruction PSEN 32 26 O Program Store Enable The read strobe to external program memory When executing code from the external program memory PSEN is activated twice each machine cycle except that two PSEN activations are skipped during each access to external data memory PSEN is not activated during fetches from internal program memory EA Vpp 35 29 External Access Enable Programming Supply Voltage EA must be externally held LOW to enable the device to fetch code from external program memory locations If EA is held HIGH the device executes from internal program memory The value on the EA pin is latched when RST is released and any subsequent changes have no effect XTAL1 21 15 Crystal 1 Input to the inverting oscillator amplifier and input to the internal clock 9397 750 12299 generator circuits Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November
27. inear program and data address range expanded to support up to 8 Mbytes each Program counter expanded to 23 bits Stack pointer extended to 16 bits enabling stack space beyond the 80C51 limitation New 23 bit extended data pointer and two 24 bit universal pointers greatly improve C compiler code efficiency in using pointers to access variables in different spaces 100 binary compatibility with the classic 80C51 so that existing code is completely reusable Up to 24 MHz CPU clock with 6 clock cycles per machine cycle 96 kbytes of on chip program Flash 2 kbytes of on chip data RAM Programmable Counter Array PCA Two full duplex enhanced UARTs Byte based Fast I2C serial interface 400 kbits s Key benefits Increases program data address range to 8 Mbytes each Enhances performance and efficiency for C programs Fully 80C51 compatible microcontroller Provides seamless and compelling upgrade path from classic 80C51 Preserves 80C51 code base investment knowledge and peripherals and ASICs Supported by wide range of 80C51 development systems and programming tools vendors The P89C669 makes it possible to develop applications at lower cost and with a reduced time to market Complete features Fully static Up to 24 MHz CPU clock with 6 clock cycles per machine cycle 96 kbytes of on chip Flash with In System Programming ISP and In Application Programming IAP capability 2 kbytes of on chip RAM 23 bit program memory sp
28. ing 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 23 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Vpp 0 5 V 0 45 V 002aaa160 Fig 9 External clock drive 11 Test information 9397 750 12299 NC CLOCK SIGNAL 002aaa161 Fig 10 Icc test condition active mode all other pins are disconnected NC CLOCK SIGNAL 002aaa162 Fig 11 Icc test condition idle mode all other pins are disconnected Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 24 of 33 Philips Semiconductors P89C669 9397 750 12299 80C51 8 bit microcontroller family with extended memory Vpp 0 5 V 0 45 V 002aaa163 Fig 12 Clock signal waveform for Icc tests in active and idle modes tcLcH tcncL 5 ns 002aaa164 Fig 13 Icc test condition power down mode all other pins are disconnected Vpp 2 0 V to 5 5 V Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 25 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 12 Package outline PLCC44 plastic leaded chip carrier 44 leads SOT187 2
29. maller than 0 65 mm Wave soldering is suitable for SSOP and TSSOP packages with a pitch e equal to or larger than 0 65 mm it is definitely not suitable for packages with a pitch e equal to or smaller than 0 5 mm Image sensor packages in principle should not be soldered They are mounted in sockets or delivered pre mounted on flex foil However the image sensor package can be mounted by the client on a flex foil by using a hot bar soldering process The appropriate soldering profile can be provided on request Hot bar soldering or manual soldering is suitable for PMFP packages Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 30 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 14 Revision history Table 12 Revision history 02 20031113 Product data 9397 750 12299 ECN 853 2422 01 A14403 of 6 November 2003 Figure 6 External data memory read cycle on page 22 adjusted drawing 01 20030508 Product data 9397 750 11359 ECN 853 2422 29812 of 14 April 2003 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 31 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 15 Data sheet status l Objective data Development This data sheet contains data from the objective specification
30. ng values given are in accordance with the Absolute Maximum Rating System IEC 60134 Stress above one or more of the limiting values may cause permanent damage to the device These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied Exposure to limiting values for extended periods may affect device reliability Application information Applications that are described herein for any of these products are for illustrative purposes only Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification 17 Disclaimers Life support These products are not designed for use in life support appliances devices or systems where malfunction of these products can reasonably be expected to result in personal injury Philips Semiconductors Contact information For additional information please visit http www semiconductors philips com For sales office addresses send e mail to sales addresses www semiconductors philips com 9397 750 12299 customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application Right to make changes Philips Semiconductors reserves the right to make changes in the pr
31. nywhere in the Flash memory space This configuration provides flexibility to the user Default loader in BootFlash allows programming via the UART interface without the need for a user provided loader Up to 8 Mbytes of external program memory if the internal program memory is disabled EA 0 5 V programming and erase voltage Read Programming Erase using ISP IAP Byte Programming 20 us Typical quick erase times including preprogramming time Block Erase 8 kbytes in 1 second Full Erase 96 kbytes in 1 second Parallel programming with 87C51 like hardware interface to programmer Programmable security for the code in the Flash 10 000 minimum erase program cycles for each byte 10 year minimum data retention 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 11 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 7 2 Memory arrangement P89C669 has 96 kbytes of Flash MX universal map range 80 0000 81 7FFF and 2 kbytes of on chip RAM Table 4 Memory arrangement DATA memory that can be addressed both directly and 128 indirectly can be used as stack 7F 0000 7F 007F IDATA superset of DATA memory that can be addressed 256 indirectly where direct address for upper half is for SFR 7F 0000 7F 00FF only can be used as stack EDATA superset of DATA IDATA m
32. oard by screen printing stencilling or pressure syringe dispensing before package placement Driven by legislation and environmental forces the worldwide use of lead free solder pastes is increasing Several methods exist for reflowing for example convection or convection infrared heating in a conveyor type oven Throughput times preheating soldering and cooling vary between 100 and 200 seconds depending on heating method Typical reflow peak temperatures range from 215 to 270 C depending on solder paste material The top surface temperature of the packages should preferably be kept below 225 C SnPb process or below 245 C Pb free process for all BGA HTSSON T and SSOP T packages for packages with a thickness gt 2 5 mm for packages with a thickness 2 5 mm and a volume gt 350 mm so called thick large packages below 240 C SnPb process or below 260 C Pb free process for packages with a thickness 2 5 mm and a volume 350 mm so called small thin packages Moisture sensitivity precautions as indicated on packing must be respected at all times Wave soldering Conventional single wave soldering is not recommended for surface mount devices SMDs or printed circuit boards with a high component density as solder bridging and non wetting can present major problems To overcome these problems the double wave soldering method was specifically developed If wave soldering is used the follo
33. oducts including circuits standard cells and or software described or contained herein in order to improve design and or performance When the product is in full production status Production relevant changes will be communicated via a Customer Product Process Change Notification CPCN Philips Semiconductors assumes no responsibility or liability for the use of any of these products conveys no licence or title under any patent copyright or mask work right to these products and makes no representations or warranties that these products are free from patent copyright or mask work right infringement unless otherwise specified 18 Licenses Purchase of Philips IC components conveys a license 2 under the Philips 12C patent to use the components in the fe 12C system provided the system conforms to the 12C BUS specification defined by Philips This specification can be _ ordered using the code 9398 393 40011 Far 431 40 27 24825 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 32 of 33 Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory Contents 1 General description 1 2 Features iuaissasss aas nrc arr RR 2 2 1 Key features 2 2 2 Key benefits 2 2 3 Complete features
34. re in them the so called popcorn effect For details refer to the Drypack information in the Data Handbook IC26 Integrated Circuit Packages Section Packing Methods Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 29 of 33 Philips Semiconductors P89C669 9397 750 12299 3 4 5 6 7 8 9 80C51 8 bit microcontroller family with extended memory These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C 10 C measured in the atmosphere of the reflow oven The package body peak temperature must be kept as low as possible These packages are not suitable for wave soldering On versions with the heatsink on the bottom side the solder cannot penetrate between the printed circuit board and the heatsink On versions with the heatsink on the top side the solder might be deposited on the heatsink surface If wave soldering is considered then the package must be placed at a 45 angle to the solder wave direction The package footprint must incorporate solder thieves downstream and at the side corners Wave soldering is suitable for LQFP QFP and TQFP packages with a pitch e larger than 0 8 mm it is definitely not suitable for packages with a pitch e equal to or s
35. specified Formulae including tc ci assume oscillator signal with 50 50 duty cycle 121131 fosc 5 Oscillator frequency 0 24 MHz tcc 5 Clock cycle 41 5 ns tiu 5 ALE pulse width tcicr 15 26 ns tAVLL 5 6 7 Address valid to ALE LOW O 5tci ci 15 5 ns tLLax 5 8 7 Address hold after ALE LOW O 5tci ci 15 5 ns tuv 5 ALE LOW to valid instruction in 2tcici 30 53 ns tLLPL 5 ALE LOW to PSEN LOW 0 5tcLceL 12 8 ns PLPH 5 PSEN pulse width 1 5tceic_ 20 42 ns tpLIV 5 PSEN LOW to valid instruction in 1 5tcLcL 35 27 ns tpxix 5 Input instruction hold after PSEN 0 0 ns tPxiz 5 Input instruction float after PSEN O 5tci ci 5 15 ns taviv 5 Address to valid instruction in 2 5tce_c_ 30 74 ns non Extended Addressing Mode tavivi 5 Address A16 A22 to valid instruction 1 5tetc_ 34 28 ns in Extended Addressing Mode iPLAZ 5 PSEN LOW to address float 8 8 ns Data Memory tRLRH 6 RD pulse width 3tcLcL 20 105 ns twi wH 7 WR pulse width Stci ci 20 105 ns tRLDV 6 RD LOW to valid data in 2 5tcrcL 40 64 ns RHDX 6 Data hold after RD 0 0 ns tRHDz 6 Data float after RD tcLcL 15 26 ns tiipv 6 ALE LOW to valid data in 4tcici 35 131 ns tavpv 6 Address to valid data in non Extended 4 5tcici 30 157 ns Addressing Mode tAVDV1 6 Address A16 A22 to valid data in 3 5te c_ 35 110 ns
36. t microcontroller family with extended memory 7 Functional description 7 1 Flash memory description The P89C669 contains 96 kbytes of Flash program memory It is organized as 12 separate blocks each block containing 8 kbytes The P89C669 Flash memory augments EPROM functionality with in circuit electrical erasure and programming The Flash can be read and written as bytes The Chip Erase operation will erase the entire program memory The Block Erase function can erase any Flash byte block In system programming and standard parallel programming are both available On chip erase and write timing generation contribute to a user friendly programming interface The P89C669 Flash reliably stores memory contents even after 10 000 erase and program cycles The cell is designed to optimize the erase and programming mechanisms In addition the combination of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling The P89C669 uses a 5 V Vpp supply to perform the Program Erase algorithms Flash internal program memory with Block Erase Internal 4 kbytes Boot Flash containing low level in system programming routines and a default UART loader User program can call these routines to perform In Application Programming IAP The BootFlash can be turned off to provide access to the full 8 Mbytes memory space Boot vector allows user provided Flash loader code to reside a
37. tchdog Timer Reset A6H FFH WDCONI2 Watchdog Timer Control 8FHS WDPRE2 WDPRE1 WDPREO 00Hl9 1 SFRs are bit addressable 2 SFRs are modified from or added to the 80C51 SFRs 3 Extended SFRs accessed by preceding the instruction with MX escape opcode A5h 4 Power on reset is 10H Other reset is 00H 5 BRGR1 and BRGRO must only be written if BRGEN in BRGCON SFR is 0 If any of them is written if BRGEN 1 result is unpredictable 6 The unimplemented bits labeled in the SFRs are X s unknown at all times 1 s should NOT be written to these bits as they may be used for other purposes in future derivatives The reset values shown for these bits are 0 s although they are unknown when read AJOWOW popuoj1xe uii AWE 19 04 u0204091UI 11G 8 162098 699D68d S10 onpuooiuieg sdi iud Philips Semiconductors P89C669 80C51 8 bit microcontroller family with extended memory 7 4 Security bits The P89C669 has security bits to protect users firmware codes With none of the security bits programmed the code in the program memory can be verified When only security bit 1 see Table 6 is programmed MOVC instructions executed from external program memory are disabled from fetching code bytes from the internal memory EA is latched on Reset and all further programming of EPROM is disabled When security bits 1 and 2 are programmed in addition to the above verify mode is disabled When all three security
38. tors P89C669 4 Block diagram 80C51 8 bit microcontroller family with extended memory 96 kB HIGH PERFORMANCE 80C51 CPU CODE FLASH internal bus 2 kB BAUD RATE DATA RAM GENERATOR AK AK PORT 3 PORT 2 l gt K gt WATCHDOG TIMER l l PORT 1 l l PORT 0 CRYSTAL OR OSCILLATOR RESONATOR Fig 1 Block diagram Ki PCA PROGRAMMABLE COUNTER ARRAY eee TIMER2 002aaa405 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 4 of 33 Philips Semiconductors P89C669 5 Functional diagram 80C51 8 bit microcontroller family with extended memory Fig 2 Functional diagram Address bus 0 7 Data Bus PORTO PORT 3 RXD1 TXD1 RST EA Vpp PSEN ALE PROG VDD Vss Oo O d I7 gt T2EX JEC cEX0 6 cEXi CEX2 scL _ SDA 2 gt 2 gt a 2 gt E g Address Bus 16 22 P89C669 o gt 3 gt gt 5 jt gt dili XTAL2 XTAL1 002aaa403 9397 750 12299 Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 5 of 33 Philips Semiconductors P89C669 6 Pinning information 6 1 6 1 1 Pinning
39. ts A8 A14 are outputted to P2 0 P2 6 when ALE is LOW Address bit A15 is outputted on P2 7 regardless of ALE Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 8 of 33 Philips Semiconductors P89C669 Table 3 Pin description continued 80C51 8 bit microcontroller family with extended memory P3 0 P3 7 11 5 O Port 3 Port 3 is an 8 bit bidirectional I O port with internal pull ups Port 3 pins 13 19 7 13 that have 1s written to them are pulled HIGH by the internal pull ups and can be used as inputs As inputs Port 3 pins that are externally pulled LOW will source current because of the internal pull ups 11 5 P3 0 RXDO Serial input port 0 13 7 O P3 1 TXDO Serial output port 0 14 8 P3 2 INTO External interrupt 0 15 9 P3 3 INT1 External interrupt 1 16 10 P3 4 TO CEX3 TimerO external input capture compare external I O for PCA module 3 17 11 P3 5 T1 CEX4 Timer1 external input capture compare external I O for PCA module 3 18 12 O P3 6 WR External data memory write strobe 19 13 O P3 7 RD External data memory read strobe RXD1 12 6 RXD1 Serial input port 1 with pull up on pin TXD1 34 28 O TXD1 Serial output port 1 with pull up on pin RST 10 4 l Reset A HIGH on this pin for two machine cycles while the oscillator is running resets the device An internal d
40. wing conditions must be observed for optimal results Use a double wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave Koninklijke Philips Electronics N V 2003 All rights reserved Product data Rev 02 13 November 2003 28 of 33 Philips Semiconductors P89C669 9397 750 12299 13 4 13 5 80C51 8 bit microcontroller family with extended memory e For packages with leads on two sides and a pitch e larger than or equal to 1 27 mm the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed circuit board smaller than 1 27 mm the footprint longitudinal axis must be parallel to the transport direction of the printed circuit board The footprint must incorporate solder thieves at the downstream end For packages with leads on four sides the footprint must be placed at a 45 angle to the transport direction of the printed circuit board The footprint must incorporate solder thieves downstream and at the side corners During placement and before soldering the package must be fixed with a droplet of adhesive The adhesive can be applied by screen printing pin transfer or syringe dispensing The package can be soldered after the adhesive is cured Typical dwell time of the leads in the wave ranges from 3 to 4 seconds at 250 C or 265 C depending on solder material applied SnPb or Pb free respectivel
41. y A mildly activated flux will eliminate the need for removal of corrosive residues in most applications Manual soldering Fix the component by first soldering two diagonally opposite end leads Use a low voltage 24 V or less soldering iron applied to the flat part of the lead Contact time must be limited to 10 seconds at up to 300 C When using a dedicated tool all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C Package related soldering information Table 11 Suitability of surface mount IC packages for wave and reflow soldering methods BGA HTSSON TIS LBGA LFBGA SQFP not suitable suitable SSOP TIS TFBGA USON VFBGA DHVQFN HBCC HBGA HLQFP HSO HSOP not suitablel4l suitable HSQFP HSSON HTQFP HTSSOP HVQFN HVSON SMS PLCC I SO SOJ suitable suitable LQFP QFP TQFP not recommended ll suitable SSOP TSSOP VSO VSSOP not recommended suitable CWQCON L 8 PMFPI I WQCCN LI not suitable not suitable 1 For more detailed information on the BGA packages refer to the LF BGA Application Note ANO1026 order a copy from your Philips Semiconductors sales office 2 All surface mount SMD packages are moisture sensitive Depending upon the moisture content the maximum temperature with respect to time and body size of the package there is a risk that internal or external package cracks may occur due to vaporization of the moistu
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