VK-RZ/A1H Development Board V3.0 User manual
Contents
1. VDD_A gt VDD_A VDD_A VDDIO VDDIO lt C131 470 143 10nF D gt D D tr a tr c 9 o o o F 6130 10nF 40142 10nF C127 10nF C141 10nF 21274119 PN x C126 10nF 45140 47uF C4 10nF 00007 8 4 VDDCR i R7 E E UU DU UI NND gt 580 Ter 228 8 2 Ss a an R9 10 ESSE 2 aa 53 gt gt _1 gt 29 TPO TPO 1 TD BEIS lt gt P1MDIO 4 TCT J3 RX O P1MDC gig 100 4 TPO TD P1RXD3 lt gt P1RXD3 R20 106 4 g RXD3 PHYAD2 28 5 RE P1RXD2 lt gt P1RXD2 RXD2 RMIISEL TXN TPO RCT J5 R22 100 10 6 63 P1RXD1 lt gt PI1RXD1 1 R23 100 77 RXD1 MODE1 7 RD PIRXDO lt gt P1RXDO 4 zg RXDO MODEO O P1RXDV R8 109 7 RXDV SHLD YA P1RXCLK P1RXCLK R24 100 13 RXCLK PHYAD1 12 PIRXER lt gt PIRXER RXER RXD4 PHYADO u2 31 VDDIO YELA R33 100 20 RXP TPI A YEL K lt 51 IXCL2. e 02 6L 8IAL AS Ag e SC EI i LL Ce a GGA 221 i e i d EE 1769 ora ZOSIN OXHO T er SE 9 E t 3 0101845 61 84 Ce d ees 1 845 21784 d te 17155845 61784 6 Lg o 871d EE d L cL r 0 0l8dS 9 0 YNY ZIT ER ERES IRE de Soen 170201845 017 4 5 91 ZNV OL Ld x ei 5 EU RELSE MEE SNY LLT 10 eil Ee z Cid 92 e i 1 40 eL 4 i i ONASH q21 0vas GE 373 027 SEI t ONASA 021 0128 i E 307091 we gt GE 3 z8 027 2 87 21 ES SE 5 097091 4 587421 EE A 69 027 ate t I 1 1970091 N 58 001 EE EEN E 2 e 4 027 T CO G lle s 68 027 dao ees 97007 s i 8 0201 LBE 29 051 716 oft Oe i 1 e 9 e 02 1 L AS 5 2 1 R n CE E 125221 APER i 0041 1125 2714 Se l e
3. 009 P6_9 D9 RE SS EUN WA Dao 6_10 010 Desk 22 lato ae 10 D10 VD P8 12 D 00 wras csawreaare ve pais 50 137013 MT48LC32M16A2TG e el 51 Y 8829823898 0914 53 14 014 0015 15 015 SDRAM CLK pie 4 25 4 4 i ogogo 02000 NNW DNNN NNW 9992 388 8888 BPR 2299 259 2299 259 ob el ek ER 8 REB 3 343 343 343 343 343 3V 3 3V C155 dad SD CARD Interface 11 100nF 3 3V d lt a al el d a SS S S 2 10 3 3V gc acc vec vss He RESETRFU P9 1 18 5 00 Ipo 0 5 15 1 09 0 4 WP lo2 gt 4 HOLD IO3 R224 2 16 i CS S25FL512SDPMFIO11 SD CLK 0 3 343 343 343 343 343 3V 3 3V C154 0 A al N 11 LSD 100nF R210 di U13 SD WP 0 12 52 R208 0 ____ _ 2 RB RB a al 5 2 10 22k TBD vec vest 4 112A TAAR RO3 al lt SIRESETIAFU Vio eru Los FT mF a 0 18 5 0 i 880 01 0 4 9 2 i HOLD IO3 R217 22 1 16 ISCK cs S25FL512SDPMFIO11 Title Memory Size Number Rev A2 VK RZ A1H V3 0 Date Drawn by Filename Sheet 7 of 11 A B C D E
4. 21 P4 LCDO 015 920 P4 8 SD CD 0 20 1 9 SD WP 0 SD_D1_0 4 1060 Di 0 af D DO 0 P5 O TXCLKOUTP P5 1 TXCLKOUTM P5 2 TXOUT2P P5 S TXOUT2M P5 A TXOUTIP P5 5 TXOUT1M P5_6 TXOUT1P P5 7 TXOUTIM P5 8 CS2 P5 9 MDC CRx1 P5 10 CTx1 P6 0 DO P6 1 D1 P6 2 D2 P6 3 D3 4 D4 P6 5 D5 P6 6 D6 P6 7 D7 8 D8 P6 9 D9 P6 10 D10 P6 11 D11 P6 12 D12 P6 13 D13 P6 14 D14 P6 15 D15 P7 0 MD BOOT2 P7 1 CS3 P7_2 RAS CRx2 P7_3 CAS CTx2 P7_4 CKE P7 S RD WR P7_6 WE0 DQMLL P7 7 NET DQMLU P7 8 TIOC3A IRQ1 P7 9 A1 P7 10 A2 P7 11 A3 P7 12 A4 P7 13 A5 P7 14 A6 P7 15 7 P8 0 A8 P8 1 9 P8 2 A10 P8 3 A11 P8 4 12 P8 5 A13 P8 6 A14 P8 7 A15 P8 B TxD3 P8 9 RxD3 P8 10 SPBIO20 1 P8 11 SPBIO30 1 P8 12 SPBCLK 1 P8 13 SPBSSL 1 P8 14 SPBIO00 1 P8 15 SPBIO10 1 P9 0 0 P9_1 CRx0 P9_2 SPBCLK_0 P9 3 SPBSSL 0 P9 4 SPBIOO0 0 P9 5 SPBIO10 0 P9 6 SPBIO20 0 P9 7 SPBIO30 0 721 P4 11 SD DO P4 12 SD CLK 0 D CMD 0 5D 08 0 AED 03 0 9 550020 R7S721000VCBG S AUX CH Bio AUX_CH_ 10 ML LANE 2 010 ML LANE 2 09 ML LANE 1 Bo ML LANE 1 9 ML LANE 0 8 ML_LANE_O_ B7 P5 8 CS2 AT P5 9 P5 10 CTX1 P6 0 00 Fe 1 01 P6 2 02 P6 5 05 A P6_4 D4 P6 5 D5 2 P6 6 06 P6 7 07 Di 6 8 08 i 6 9 0
5. interrupt controller modules general 1 0 ports The kit supports H CAN Ethernet LVDS Port optional H up to 128 MB SDRAM up to 640 MB SPI Flash RTC Crypto Auth optional Mini SD card connector Composite video connector optional USB lt gt UART converter 2 USB communication channels All this along with the DC DC power supply on board and connected to pin headers unused pins of 5 amp R7S721000VCBG allow you to build a diversity of powerful applications to be used in a wide range of embedded tasks BOARD FEATURES e MCU RL78 G1C 5 10 e 151 RZ A1H R7S721000VCBG e USB Mini device connector RL78 G1C e 2xUSB Standard host connectors RZ A1H e Micro SD card connector RZ A1H e Composite video connector RZ A1H e LVDS Port connector RZ A1H e connectors NXP TJA1040 RZ A1H e RJ 45 ethernet connector 10 100Mb MAC PHY SMSC LAN8710A RZ A1H e SDRAM 32 MB CS2 64MB per chip select RZ A1H e 4 bit SPI Flash 2x16 Mbits Spansion S25FL128S RZ A1H e l CRTC with battery holder ST M41T82 RZ A1H e l CCrypto Authentication Atmel ATSHA204 RZ A1H e 20pins Debug programming connector JTAG e 5pin Debug programming Emulator connector Renesas E1 e Power connector for DC DC In 5V gt Out 3V3 amp 1V18 e FR 4 2 0 mm Orange Blue Red solder mask component print e Dimensions 105 0mm x
6. MD_CLK MD_CLKS aay 4 vec 2 m B S 10 E EXTAL crystal resonator 10k 1 SSCG On Off 9 JP1 z JP2 R134 a B 2 UE up 22 ze J16 SG 8002JF 13 3333MHz i l RCJ 044 RCA3 1 R d U1 B 5 num 32768 905 Tu 100nF ner 00M_1 EXTAL PO 0 MD BOOTO 6 CX3225GB48000POHPQCC Re 1 00M_ 4 E aus EXTA Ge ca 2 1 85 85 PO 2 MD CLK al 52 AAT 3 MD CLKS 1 UR Y7 1 C104 cios 100 3 4 E T uF 100nF C106 C28 5V 627 18pF VIN2A 1 1 18pF 100nF Ds XT VIN1B A VIN2B LI V19 4 RTC Dis 45V J6 Reeg _5 _ 4 VRP 4618 100nF E are ng USB DUAL C91 92 612 075 2 22 22pF M 8160 22 1 4 X5 R158 A 4 Zaiff 90 CX3225GB27000P0HPQCC 1 00M 1 A13 Les xi 12 2 SE 3 R159 Y13 lues 2 DMo AAT 5V LE EE 8 YTT PFMF 075 2 C20 100nF m Ke VBUSIN1 710 4 4 9 1 2 DM1 9 Zdiff 90 C101 C102 DP1 4 E 10pF 12 36 5 6k 1 Wet VIDEO x1 REFRIN R36 D E VIDEO X2 mm ER 31 ume TRST MM O TDI are Ef 1 ZN JPO 1 TDO R55 700 Zk K TMS JTAG_TMS 3 4 X6 R161 Tek D I __ 1 00M 1 CX3225GB22579200P0HPQCI AUDIO X1 de U20 AUDIO X2 RESET US RESET R135 9381064506 R162 vw NMI 3 1 1 2 LvbsREFRIN
7. 3 o LVYQSVS 1d R i 5 eee 19 6 6 198 921 97 Zait d 6 440 NO 091 7 s i 27 67 45722 714 EET e ej 8 40 _ EE 3 198 021 55 Ce i E Be 9 90 us i 794 KS 10u 51 SO 4 feuondo EET e v Sd pesn ee d i E 179d 5754 1 2214 ef 0 gt MT G3 FED4 FED3 root Title Rev Number Size VK RZ ATH V3 0 Date Drawn by Sheet of Filename Ut A SCLO LCD VSYNC 15 P1 0 2 SCLO VSYNCO SDAO LCD HSYNC P1_2 SCL1 IRQO E14 P1_1 l2C_SDAO HSYNCO pyg P 1 2 l2C SCL1 IRQO P1 3 8DA1 IRQ0 5 17 P1 3 2 SDA1 IRQT P1 4 RIIC28CL pP 4 CRx1 P1_5 RIIC2SDA E13 F 1 5 IRQS Il2C ScL prz 1 e l2c SCL 3 12C SDA 3 3 P1 8 ANO IRQ2 DREQO P1_9 AN1 P1_9 AN1 IRQ3 P1_10 AN2 V17 P 1 10 AN2 IRQ4 TCLKB P1 1 1 AN3 Yvi8 P1 11 ANS IRQ5S TCLKD 1_1 2 AN4 19 P1 12 AN4 DV0 VSYNC P1 1 3 ANS 19 P1 13 AN5 DV0 HSYNC P1CO RR20 P 1 14 COL P1 15 P1TXCLK P1_15 J18 P1TXER Hig P2_0 TXCLK MLB_CLK F20 P2_1
8. 74 0mm ELECTROSTATIC WARNING The VK RZ A1H R7S721000VCBG board is shipped in protective anti static packaging The board must not be subject to high electrostatic potentials General practice for working with static sensitive devices should be applied when working with this board PROCESSOR FEATURES The VK RZ A1H board use MCU R7S721000VCBG from RENESAS ELECTRONICS with these features e Power supply voltage VDD 3 0 to 3 6 V e Operating ambient temperature TA 40 85 C CPU clock 400 MHz For more information please visit www renesas eu BLOCK DIAGRAM POWER JACK DC DC 2 SPI flash Converter Abit MO AP3512 mode USB Function E1 24C02 Emulator CAN ch 1 RTC UART ch 3 CPU RL78 G1C RZ A1H R5F10KBC R7S721000VCBG NXP JTAG CE CryptoAuth TJA1040T debuger EXTERNAL SDRAM BASE ADDRESSES SDRAM CS2 ORIGIN 0x08000000 LENGT SDRAM CS3 ORIGIN 0x0C000000 LENGT SDRAM CS2 mirror ORIGIN 0x48000000 LENGT SDRAM CS3 mirror ORIGIN 0x4C000000 LENGT A SDRAM is accessed with 16bit data width A A14 amp A15 are used for bank switching SCHEMATICS Please refer to CD for high quality pictures odi og LVDS Port Micro SD Card 2x USB Standard A Host Function RJ45 LAN 10 100 SMSC LAN8710A SDRAM 32 64 MB A54C32W165A 64MB 64MB 64MB 64MB POWER SUPPLY CIRCU
9. 9 P1MDC 7 12 712 04 WE 97711703 P7 1052 9 710 2 P5_9 CRX1 gt P5 9 CRX1 7 9 0 7 9 1 R179 0 P5 9 CRX1 lt gt P5_9 CRX1 CRX1 P7 5 WE en amp g R43 0 _p7_6 WEO DoMLL ent D I 0 7 WET7DOMLU R51 0 LCD BKL EN p7_2 P51 2 RNS RTX2 p7_3 855 0 p 3 CAS CIX2 P1_185 CE LED R59 0 R4 4 99 0 P7 A CKE 8 1 p 0 5 8 CSZ 3 3V 43 8V P7 1 ESCH P7_1 CS3 R70 0 S Ux Us US s 2k RED gt P1 5 RIIC2SDA LEDO DS 3 LD1 DNP P7_1 P8_10 SPBIO20_1 R133 DNP 15 0072 H e 5 P6_15 D15 P6_15 D15 26 14 ggg 5 P6_14 D14 P6_14 D14 P6_13 5 P6_13 D13 P6_13 D13 6 12 5 P6_12 D12 P6_12 D12 P611 si 5 P6_11 D11 P6_11 D11 26 10 5 E P6_10 D10 P6_10 D10 P6 9 z P6_9 D9 P6_9 D9 P6_8 ggg 5 ECH P6_8 D8 P6_8 D8 P6 7 E 856 5 P6_7 D7 P6_7 D7 P6 6 ggz 5 P6_6 D6 P6_6 D6 P6_5 5 P6_5 D5 P6 5 D5 P6 4 ggg 5 P6_4 D4 P6_4 D4 P6 3 P6_3 D3 P6 3 D3 rem 5 P6_2 D2 P6_2 D2 P6_1 aE 5 P6_1 D1 P6_1 D1 P6_0 P6_0 D0 P6_0 D0 22K R128 R103 0 ML LANE 0 P5_6 R104 0 ML LANE 0 5_7 R105 0 ML_LANE_1_ P5 4 R106 0 ML_LANE_1_ 5_5 R107 0 LANE 2 P5 2 R108 0 ML LANE 2 P5 3 109 0 age SCL 3 E P1_6 12C_SCL_3 R110 0 I2C SDA 3 P
10. BLM18BB470SN1D AP3512E 2 15 2 gt gt 3 9 BLM18BB470SN1D 100nF VA 102 U21 AP3512E FB13 gt VDD_1V18 BLM18BB470SN1D Title power Size Number A4 VK RZ A1H V3 0 Filename d vw ut ul d 5 5 5 5 5 5 5 2 2 8 8888 888 P7 0 8888 gt gt gt Dao 2 2 6 712 44 P6 713 45 s 3 3V3 3V3 3W3 3M3 3V3 3V3 3V SDRAM 0 pee We 007 P6 SDRAM 1 xl d xl als 4 S
11. ML LANE 2 10 P5 3 TXOUT2M 10 AUX CH B11 P5 O TXCLKOUTP 11 GND 12 AUX CH A11 P5 1 TXCLKOUTM 13 14 15 2 SCL 3 E13 P1 6 I2C SCL 3 16 GND 17 12C SDA 3 D13 P1 7 I2C SDA 3 18 LVDS HPD K1 P7 8 IRO1 19 GND 20 3V3 A The signals that are coming out from the connector ARE NOT DISPLAY PORT SIGNALS regardless of the fact that the connector is the same as Display port CONFIGURABLE REROUTING There are function and features that can be enabled or disabled by manually soldering or desoldering components mostly resistors Every component specified with attribute DNP is missing by default If user wants to enable given purpose related designator should be soldered and sometimes some other components must be desoldered Optionals solder at your own risk double check amp comply with the schematic Designator Sheet Purpose Dependence R2 Jumper amp Pull Ups clock the PHY from 5_9 Remove R3 or R179 R6 LAN Some Oscillator need it R114 LVDS Lane 0 impedance match R115 LVDS Lane 1 impedance match R116 LVDS Lane 2 impedance match R117 LVDS Lane aux impedance match R124 LVDS 10k Pull down CONFIG1 R125 LVDS 10k Pull down CONFIG2 R126 LVDS Access LCD EEPROM from HCH Remove R122 R127 LVDS Access LCD EEPROM from HCH Remove R120 R131 Jumper amp Pull Ups Drive LD1 from P1 5
12. TXER MLB_DAT P1IXEN y P2 2 TXEN MLB SIG P1CRS P2 3 CRS 1 00 2_4 0 1 01 5 2_5 1 TXD2 Dsg P2_6 TxDI2 1 1TXD3 P2 7 TxD 3 P1RXDO 102 8 RxD 0 1 1 PiRXD1 Kr P2 9 RxD 1 P18XD2 Cep P2 10 PxD 2 P1RXD3 102 P2 14 SPBIO21 0 pt16 P2 12 SPBIOO1 0 Pt18 1P2_13 SPBIO11_0 M8 P2 14 SPBIO21 0 2 15 5 051 2 15 SPBIO31 0 ARG 109 0 LCDO CLK LCD DE 745 1 LCDO TCONO P3 2 LCD ON OFF 2 LCDO TCON1 P1MDIO Y5 P3_3 MDIO P1RXCLK P1RXER V7 P3 4 RXCLK 3 S RXER P 1 RXDV 6 RXDV LCD BKL EN U21 P3_7 LCDO_TCON6 120 P3 8 LCDO DO 82 9 LCDO Di _83 prg 10 LCDO 02 11 LCDO 03 0 P3 12 LCD0 LCD 60 Ne1 P3 13 LCDO D5 14 LCD0 D P3_15 LCD0_D7 LCD_G3 y57 P4_0 LCD0_D8 LCD 64 p70 1 LCDO 09 P4 216007010 8 Seng 611 20 P4_4 LCDO_D12 K21 P4 S LCDO D13 K20 P4_6 LCD0_D14
13. 113111110 18 gt oem 5 MN s s s 1 9 8 sn7aLve1T4508VR ee gt OOZAZOZLSHO Sepa Reser 52256822579200 5 RENESAS RZ A1H el 18 CX3225GB25000POHPQC BLM1 SET 10 2991 225 x 000 dE Fa c 2181 00 IS LANB7 10A EZK abeo Ton J8011D018NL TE 2013655 1 S25FL512SDPMFIQ11 Stes ZL SLM E 3 VK RZ A1 H V3 0 Design amp Fab by EE D PFMF 075 2 CU 1SAH1D 0 SN74LVC1T45DBVR 1 4745 1 AS4C32M16SA 7TCN 5 1 7 74 0 8456 SNY 330uF 10V GH qo x fanon CUO4SCM1380 RO AS4C32M16SA 7TCN RENESAS RL78 G1C Reset 1 18 31 24 24 22 20 00 120 61 137 GND 10 ele LXT xeiow RCJ 044 RCA3 1 16 17 50 70 21 01 62 60 122121 5VDC 60 62 64 66 68 610612614 58 80 82 84 86714712710 76 74 72 bat 88 89 812814 90 1 2 ser e N 5 e a KX 9 amp 61 63 65 67 69 611613615713 715 85 85 87 711 79 77 75 73 71 810811813815 91 RES GND RZ ATH v revA 16 15 105 0 Bae 56 54 52 50 78 32 15 12 14 5V 51540 47 45 311 42 515 39 10 11 59 510115112 19 3V 5V ed em MIG3 410 49 J13 wb d de Be N Se 57 55 53 51 37 17 16 13 3VGND
14. 1_7 12C_SDA_3 R111 0 AUX CH PS_O 112 0 AUX CH P5 1 R113 0 P7 B lVDS HPD P7_8 22k P8 9 0 R178 43 3V R41 22k m 44 22k R46 22k R49 22k R52 22k R54 22k R57 22k R60 22k R62 22k R65 22k R68 22k 71 22k R73 22k R75 22k R76 22k R77 PB 9 RXD3 P8_9 RXD3 UART gt USB and AppHeader AppHeader Title x Size Number Rev A3 VK RZ A1H V3 0 Date Drawn by Filename Sheet of 3 3V ES 43 8V 3 3V 3 3V 3 3V 3 3V C88 A A A 4 100nF 45 R146 R148 R149 R14 USB Xt crystal resonator Gef 10k_1 10k_1 10k 1 59 DNP H R150
15. 2 P3_0 LCDO_CLK 3 P1_0 RIICOSCL 4 P3_1 LCDO_TCONO DE 5 P3_9 LCDO_DATA1 B2 6 P3_8 LCDO_DATAO 1 7 P3 13 LCDO DATAS GO 8 P3 12 LCDO DATA B5 9 P4 2 LCDO DATA10 G5 10 P3 14 LCDO DATA6 G1 11 P3 11 LCDO DATA3 B4 12 P4 1 LCDO DATAS G4 13 P4 5 LCDO DATA13 R3 14 P4 A LCDO DATA12 R2 15 P4 7 LCDO DATAZ15 R5 16 P4 6 LCDO DATA14 R4 17 P4 O LCDO DATAS G3 18 P3 10 LCDO DATA2 B3 19 P3 15 LCDO DATA7 G2 20 P4 3 LCDO DATA11 R1 J10 RZ A1H Pin Signal Name Pin Signal Name 1 5V 2 GND 3 P1_4 RIIC2SCL 4 3V3 5 P1 2 RIIC1SCL 6 P1 3 RIICISDA 7 P1 5 RIIC2SDA 8 P1 6 RIIC3SCL 9 P3 2 LCDO 1 Hsync 10 P1 7 RIIC3SDA 11 P7 8 IRO1 12 P3 7 LCDO 6 Vsync BKL EN 13 P5 O TXCLKOUTP 14 P5 1 TXCLKOUTM 15 P5 2 TXOUT2P 16 P5 3 TXOUT2M 17 P5 4 TXOUT1P 18 P5 5 TXOUT1M 19 P5 6 TXOUTOP 20 P5 7 TXOUTOM SDRAM extension J11 RZ A1H Pin Signal Name Pin Signal Name 1 P8 1 A9 2 P8 0 A8 3 P8 3 A11 4 P8 2 A10 5 P8 5 A13 6 P8 4 A12 7 P8 7 A15 8 P8 6 A14 9 P7 11 A3 10 P7 14 A6 11 P7 9 A1 12 P7 12 A4 13 P7 7 WE1 DOMLU 14 P7 10 A2 15 P7 5 RD WR 16 P7 6 WEO DOMLL 17 P7 3 CAS 18 P7 A CKE 19 P7 1 CS3 20 P7 2 RAS 112 RZ A1H Pin Signal Name Pin Signal Name 1 P6 1 D1 2 P6 0 DO 3 P6 3 D3 4 P6 2 D2 5 P6 5 D5 6 P6_4 D4 7 P6 7 D7 8 P6 6 D6 9 P6 9 D9 10 P
16. 21 43 3V DP_PWR 0 100nF 7 Title Display Size Number Rev A3 VK RZ A1H V3 0 Date Drawn by Filename Sheet of P5 10 CTX1 L e P5 10 CTX1 lt CRX1 gt 1 R193 0 5 DIR VREF SN74LVC1T45DBVR 3 3V S 5V silent mode C146 56k C147 56k CryptoAuth SCL SDA ATSHA204 SH DA P1_6 12C_SCL_3 gt P1 6 2 SCL 3 019 41 82 0 SDAO LCD HSYNC SDAO LCD HSYNC us R199 P1_7 2C_SDA_3 X gt 7 2 SDA 3 BATERY Vbat 0 FT RST SCLO LCD VSYNC SCLO LCD VSYNC 32768 905 ADI XO Xl Title Size Number A4 VK RZ A1H V3 0 200 swm Sheet 11 of 105 0 56 54 52 50 78 32 15 12 14 51540 47 45 311 42 313 39 10 nj 59 510115112 19 3V 5V n N V CH81802V200 CH81802V200 CH81802V200 Y J EE 57 55 53 Di 37 17 16 13 3VGND 43 510 46 44 41 314312 38 31 36
17. 3V P137 INTPO 5 RL P 137 A R5F10KBCAFP Hie RA SCLO LCD_VSYNC lt gt SCLO LCD_VSYNC RL P60 R174 0 SDAO LCD_HSYNC lt gt SDA0 LCD_HSYNC RL P61 R175 8 a tr 5 2 Title usb uart 2 SCL 3 SCL 3 Size Number Rev 2C_SDA_3 _____X gt 120 3 Date VK RZ A1H V3 0 Drawn by Filename Sheet of 43 3V U7 ive 1 2 ZR eler 3 4 USBLC6 4SC6 ne ML_LANE_O_ R114 ML_LANE_0_ 5 6k 1 DNP ML_LANE_1_ R115 ML_LANE_1_ 5 6k_1 e Ee DNP HE gt ML LANE 2 R116 ML LANE 2 5 6k 196 DNP AUX CH R117 AUX_CH_ 5 6k 1 3 3V DE _2013655 1 U6 wo CN waa AS ae ae SE en ML LANE 0 2 ML_LANE_O_ 5 5 ML_LANE_1_ USBLC6 4SC6 gt 8 ML_LANE_1_ ML LANE 2 9 10 ML_LANE_2_ AUX CH 11 12 AUX_CH_ 13 14 eet ds R120 0 15 16 age e 6122 0 7 17 18 DAD ANE R126 0 SA 15 20 SDAO LCD_HSYNC R127 0 5 SCLO LCD VSYNC 5 DNP DNP a 5 S 3 e R119 5 6k 1 P7 8 LVDS R1
18. 43 310 46 44 41 314312 38 31 113111110 18 2 A a 5 JP3 JP1 RENESAS RZ A1H R13 124 014 42 21 J8 2 R33 R9 Z3 c78 pe VK RZ A1H V3 0 Design amp Fab by dee LC24 813 deen 020 EE 57 Ex S U5 J3 ca AR RT sep 8131 Jon 3 4 R1 Ln 911 RENESAS RL78 G1C Reset 1 18V DE 31 24 24 22 20 00 120 61 137 GND 4 U21 U15 AR Ok 5 FED1 m 16 17 30 70 21 01 62 60 122121 5VDC FEo 60 62 64 66 68 610612614 58 80 82 84 8671471271076 74 72 bat 88 89 812814 90 1 2 2M J14 m 8 p 65 67 69 611613615 13 715 w 85 85 87 711 79 77 75 73 71 810811813815 91 RES GND 1 RZ ATH v revA 16 15 LI HS gt 4 01450 788 Po AN a Ei 100nF al F P 1000 ear fe i INP NI NI 58 224 224 CR CR En BLM 1 BBB47 SN1D Look 26997 220 1024 Pk Ji ATSPA204 SH x od lod la M 155 STO 84 184 64
19. 6 8 D8 11 P6 11 D11 12 P6 10 D10 13 P6 13 D13 14 P6 12 D12 15 P6 15 D15 16 P6 14 D14 17 P7 13 A5 18 P5 8 CS2 19 P7 15 A7 20 n c PORT extension J13 RZ A1H Pin Signal Name Pin Signal Name 1 5V 2 1V18 3 3V3 4 GND 5 n c 6 n c 7 n c 8 n c 9 P1_9 AN1 10 n c 11 n c 12 P1_8 ANO 13 P1_12 AN4 14 n c 15 P1_15 AN7 16 P1_10 AN2 17 5 10 1 18 P1_11 AN3 19 P5_9 CAN1RX 20 P1_13 AN5 J14 RZ A1H Pin Signal Name Pin Signal Name 1 n c 2 Battery 3 n c 4 n c 5 P8 10 6 P8 8 TxD3 7 P8 11 8 P8 9 RxD3 9 P8 13 10 P8 12 11 P8 15 12 P8 14 13 P9 1 14 P9 0 15 n c 16 1V18 17 RESET 18 3V3 19 GND 20 5V 10 AVAILABLE DEMO SOFTWARE NAN FREERTOS TM DEMO PROJECT PORTED FOR IAR AND BUILT FOR VK RZ A1H development board CycloneTCP PROJECT PORTED FOR IAR AND BUILT FOR VK RZ A1H development board u boot Linux PORTED FOR GCC AND BUILT FOR VK RZ A1H development board Express Logic Embedded GUI demo IS2S MicroEJ demos Microsoft Micro net framework Micro net framework PORTED FOR VK RZ A1H development board 11 FEDS 0 d 5 51 e if 3 a
20. 9 2 P6 10 D10 1 P6 11 D11 P6 12 D12 P6_13 D13 P6 14 D14 P6 15 D15 MD 0012 Et P7 1 CS3 2 P7_2 RAS RTX2 P7_3 CAS CTX2 7_4 5 WE_ e P7_6 WEO DOMLL Ki P7 7 WE1 DQMLU 2 P7 8 lVDS HPD t P7 9 A1 7_10 2 M P7_11 A3 MD P7_12 A4 MT P7 13 A5 7_14 6 7_15 7 M P8 0 8 PB 1 9 N2 P8 2 A10 zi PB 3 A11 p PB 4 A12 P5 PB 5 A13 52 P8_6 A14 1 PB 7 A15 2 P8_8 TXD3 PB 9 01 PB 10 SPBIO20 1 02 PB 11 SPBIO30 1 Vi PB 12 SPBCLK 1 V2 PB 13 SPBSSL 1 Wi PB 14 5 000 1 PB 15 SPBIO10 1 Xs P9 0 CTX0 MOSI2 6 P9 1 CRX0 MISO2 06 P9 2 SPBCLK 0 6 P9 5 5 8551 0 BG P9 4 5 1000 0 05 P9 5 SPBIO10 0 P9 6 SPBIO20 0 P9 7 SPBIO30 D Title Size Number Rev VK RZ ATH V3 0 Date Drawn by Filename Sheet of _______ ______ ______ R39 MD BOOT2 enz pa 7 15 640 0 Ris g PB 8 A14 S P8 5a 0 8 5 13 9 08 4 R59 ag g P8 4 A12 i P8_3 7 rod p8 3 A11 P8 2 ues 9 82 10 P8 ggg GO p8 1 49 P8 o R864 _ 5 0 8 7_15 p7 15 47 o P7 14 P7_14 A6 7 13 R64 0 15 45 R2 Fe R66 0 e xt P5
21. AIS 50 3 3V 3 3V 43 8V 3 3V 3 3V gen eae En a a a 43 3V T F E MH M 18pF 17 SDRAM_CLK R1 oe Bsacnp 118 BSACNP i 43 3V d d ad d 2s DNP n R7S721000VCBG Normal operation ies S S J15 E 2 2 1 3 3V isl ti JTAG TRST 3 JTAG 5 JTAG_TMS 7 8 JTAG_TCK 9 10 1 3 3V 11 12 100 Tes JTAG TDO 13 14 S 010 RESET co JTAG_SRST R151 0 7 vcc anD R137 t INPUT ele R154 R155 RESET 6 RESET 10k 1 10k 1 5 1 51957 Title SR 5 elle C94 100nF Size Number Rev AS VK RZ A1H V3 0 Date Drawn by Filename Sheet of FB6 43 3V lt lt gt AVCC_3V3 BLM18BB470SN1D FB5 gt VDD_1V18 c86 FB8 BLM18BB470SN1D 100nF BLM18BB470SN1D _L C85 100nF FB4 LM4132EMF 3 3 NOPB DNP C87 S VDD 1V18 Jr 10905 BLM18BB470SN1D __ C46 100nF FBI U1 C VDD_1V18 gt USBAVCC V13 UsBAVcc avrei DI gt uL uL AVcc c BLM18BB470SN1D 38 a a 5 5 t 013 8 8 BLM18BB470SN1D S438 ie By
22. C112 330nF 21 UVDD es T 1 POWER ZA D2 2TooL st 9 4 V USB1 4 C113 o 3 RESET1 d RESET_N 2 RESET 10 J17 4 RESET FB11 C114 C115 C116 TOOLO BMB2A0060LN2 10nF 10uF 10uF p 5 GND 22 Uvgus R166 24 jupPo Nc 20 10k 8167 33 S 23 mu nc 18 Io R168 co 33 U4 31 1 ES Jos RL P0o 3 _ pog ANI17 TIOO INTPB P40 TOOLO TOOLO R170 R169 ZN 6 18 18 30 22k 10k ie RL Po1 9 bo4 ANIH6 TOOO INTP9 2 4 P50 INTP1 S100 RxD0 19 PB 8 TXD3 lt gt PB 8 TXD3 USBLC6 4SC6 RL P16 18 p 4 6 TI01 TOOT INTPS P51 INTP2 SOO0 TxD0 18 use_uarT_our Sall d 3 3V shifter 9 RXD3 O P8_9 RXD3 17 17 1102 1002 P6O SCLAO 9 21 6 U20 3 3 45V USB RL P20 29 P20 ANIO AVREFP P61 SDAA0 19 n Pe 5 vcCCAHL GND RL P21 28 jP21 ANII AVREFM pez ri p62 4 vccB 22 27 jP22 ANI2 RL P121 26 13 4 lt gt 3 RL P122 RL P137 RL P23 P23 ANI3 P70 PCLBUZ1 RL P70 e B SE RL P61 25 5 RL P62 RL P120 RL P24 _ P24 ANI4 DIR RL PO1 RL POO L RL P21 RL P20 P120 ANI 9 SOO1 PCL 52 RL P120 RL P70 RL P22 14 5 SN74LVC1T45DBVR RL P30 RL P23 RL P30 4_ P30 INTP3 SCKO0 SCLO P121 X1 RL P121 RL P17 RL P24 12 4 R171 RL P16 RL P31 RL P31 12 P31 TIOS TOOS INTP4 P122 X2 EXCLK RL P122 0 DNP 3 3V 43
23. IT VK RZ A1H is powered by 5 VDC applied at the power jack VK RZ A1H could also be powered by USB Mini B connector The consumption of VK RZ A1H may vary and the maximum is 3 3V 450mA CLOCK CIRCUITS Quartz Generator 13 3333 MHz is connected to EXTAL pin AA14 Quartz crystal 32 768KHz is connected to RTC_X1 RTC_X2 pins AA7 Y7 Quartz crystal 4 0000MHz is connected to RTC_X3 RTC_X4 pins V10 V11 Quartz crystal 48 0000MHz is connected to USB X1 USB X2 pins AA13 Y13 Quartz crystal 27 0000MHz is connected to VIDEO X1 VIDEO X2 pins W21 V20 Quartz crystal 22 5792MHz is connected to AUDIO X1 AUDIO 2 pinstt V21 U20 Quartz crystal 25 0000MHz is connected to Ethernet Phy SMSC LAN8710A XTAL1 XTAL2 pins 5 4 Quartz crystal 32 768KHz is connected to RTC M41T82 XI XO pins 1 2 PUSH BUTTONS Buttons Function Signal Name Pin Sw1 JUMPERS CONFIGURATION connected Disconnected A _ input is connected to 1 3V3 so only Boot Mode 3 4 5 are available A MD_BOOT1 input is connected to JP1 and MD BOOT2 to JP2 A MD CLK input is connected to 0 GND so the LSI is clocked from EXTAL A BSCANP input connected to 0 GND so the LSI is in normal debug interface mode i e JTAG is connected to CoreSight debug TAP controller BOOT configuration BOOT mode JP1 JP2 Description Boot from SPI multi 0 3 L P9 2 P9 5 Boot from SD card a I
24. K LAN8710A 22 J0011D21BNL O P17XDO 53 XDO 30 SX 1 O P1TXD1 24 TXD1 RXN TPI gis PITXD2 O P1TXD2 25 2 NETODO07 P1TXD3 lt gt P1TXD3 R26 100 15 TXD3 P1COL lt gt PI1COL R25 100 14 COL CRS DV MODE2 PICRS lt gt PICRS CRS 3 LED1 REGOFF 2 LED R32 C6 c7 CNN ae LED2 nINTSEL LED2 RESET lt gt RESET 19 tg 330R_1 100 ATE XBR 50 5 nINT TXER TXD4 XTAL1 CLKIN vn R6 4 32 R21 55 5 C XTAL2 08149 1 00M 1 5 12 _1 DNP 5 1 00 1 e o m o o 4 3 4 l 1 2 612212 12 TF Al 12pF CX3225GB25000POHPQCC O7 P 1TXER LED1 O LED1 Title LAN Size Number Rev A3 VK RZ A1H V3 0 Date Drawn by Filename VK Ri A H 3 Sheet of 12 J3 USB MINI AB BLM18BB470SN1D 5V_USB C109 220pF 45V USB 45V C110 100nF 4 A A 5V_USB 02 gt 0 Ohm u5 D1 3 8 7 TT K VDD s 1 MBROS20LT1G 85 Cit jp 6 per EC a
25. R P4 10 4 15 Boot from MMC card chO P5 10 5 15 Clock settings CLK mode JP3 Description MD_CLKS B SSCG circuit OFF MD CLKS LI SSCG circuit ON CAN Termination CAN mode JP4 Description 0 CAN line is terminated 1 CAN line isn t terminated EXTERNAL CONNECTORS DESCRIPTION PWR J1 Pin Signal Name Pin Signal Name 1 5V 2 3 GND A The power input should be 5VDC E1 Emulator 5 connector EL 117 Pin Signal Name 1 5V 2 TOOL 3 RESET 4 TRESET 5 GND JTAG 20pin connector JTAG J15 Pin Signal Name Pin Signal Name 1 3V3 2 3V3 3 TRST 4 GND 5 TDI JPO_O 6 GND 7 TMS 8 GND 9 TCK 10 GND 11 12 GND 13 TDO JPO_1 14 GND 15 SRST 16 GND 17 18 GND 19 20 GND CAN 3pin connector CAN J7 Pin Signal Name 1 CAN_L 2 GND 3 CAN_H CTX1 is connected to P5_10 pin A7 of R7S721000VCBG CRX1 is connected to P5 9 pin B7 of R7S721000VCBG A Termination Jumper JP4 Ethernet connector RJ45 type J2 A Transformer and integrated LEDS are connected to PHY interface LAN8710A A Respective signals from PHY are connected to interface of R7S721000VCBG USB devices USB mini B J3 Pin Signal Name Pin Signal Name 1 V_USB1 3 D 2 D 5 GND A Pin 4 ID is di
26. Remove R132 R133 Jumper amp Pull Ups Drive LD1 from P8 10 Remove R132 R145 MCU Control clock LSI from USB X1 Remove R152 R147 MCU Control Set debug mode to boundary scan Remove R153 R171 USB Serial Bypass level shifter Remove U20 R176 USB Serial Access RL78 EEPROM from CH Remove R174 R177 USB Serial Access RL78 EEPROM from CH Remove R175 R194 CAN Put can transceiver in silent mode Remove R193 R198 RTC amp Crypto Access RTC amp Crypto from Remove R201 R200 RTC amp Crypto Access RTC amp Crypto from Remove R199 R210 Memory Invert SD Card detect signal logic U8 MCU Decoupling If External Reff Voltage needed UNUSED PIN HEADERS PORT extension J5 RL78 G1C Pin Signal Name Pin Signal Name 1 P16 TIO1 TOO1 INTP5 2 P31 TIO3 TOO3 INTPA4 PCLBUZO 3 P17 TIO2 TOO2 4 P24 ANIA P30 INTP3 SCKO0 SCLOO gt TIO3 TOO3 PCLBUZO S P2S ANIS 7 P70 PCLBUZ1 8 P22 ANI2 9 21 1 10 20 11 PO1 ANI16 TOOO INTP9 12 117 00 8 5101 SCKO1 SCLO1 SCLAO SDAO1 SDAAO 13 P62 14 120 119 5001 071 15 P60 SCLAO 16 P61 SDAAO 17 P122 X2 EXCLK 18 P137 INTPO 19 P121 X1 20 GND LCD extension 19 RZ A1H Pin Signal Name Pin Signal Name 1 P1_1 RIICOSDA
27. VK RZ A1H Development Board V3 0 User manual 13 N 812814 90e 1 18 810811815815 91 NC RES C Rev 3 0 Sep 18 2015 Copyright c Vekatech Ltd All right reserved INTRODUCTION VK RZ A1 is a development board which uses MCU R7S721000VCBG from Renesas Electronics This powerful MCU is actually LSI single chip microcontroller that includes an ARM Cortex A9 processor along with the integrated peripheral functions required to configure a system The core includes 32 KB L1 instruction cache 32 KB 11 data cache e 128 KB L2 cache Integrated various on chip peripheral functions and interfaces such as H 10 MB large capacity RAM 128 KB are shared by the data retention RAM data retention RAM multi function timer pulse unit 2 OS timer realtime clock motor control PWM timer UART UART with FIFO 2 SPI SPI multi bus controller CAN LIN serial sound interface sound generator CD ROM decoder A D converter SCUX media local bus SD host interface MMC host interface NAND flash memory controller IEBus controller Renesas SPDIF interface Ethernet controller EthernetAVB USB 2 0 host function digital video decoder video display controller 5 dynamic range compression image renderer image renderer for display display out comparison unit H Renesas graphics processor for OpenVG H JPEG codec unit capture engine unit pixel format converter
28. redes B14 VDAVcc LVDSPLLVec BS g a 14 VDAVss LVDSAPVocc CES LVDSAPVcc 21 Jee ee Vss Vss VDD_1V18 vss 8 8 8 8 8 8 8 FB2 V ss gt e USBAPVCC Vss Vss e e BLM18BB470SN1D 53 5 Vss amp 8 8 8 8 S 8 8 s t Vss Vss ul utt 2 Vss 5 5 5 5 5 5 5 4 4 9 Vss S S 5 8 3 8 8 5 Vss 1 2 Vss ae wes E 8 2 gg R x Vss 43 3V 3 3V Vss ud FB9 Vss Vss ut ut ut ut ut ut ut ut ut ut e 1 Vss 5 5 5 5 5 5 8 5 5 5 BLM18BB470SN1D ub lw Sse 5 5 5 o E ss Sa ee Vas Vss D x e o 2 wo wo Vss 3 3V iD o Vss o OF Vss 55 uf ut ut uf ut ut ut ut ut Vss c c c c c u Vss 8 8 8 8 8 8 8 8 5 Vss Vss Vss 8 S8 a R N R Vss 55 55 2 Vss lt R7S721000VCBG Si lt lt FB7 Title i BLM18BB470SN1D MCU Decoupling Size Number Rev A3 VK RZ A1H V3 0 Date Drawn by Filename Sheet of BLM18BB470SN1D FB16 BMB2A0060LN2 FB18 BLM18BB470SN1D SMAJ5 0A FB17 U15
29. sconnected V_USB1 Output USB device power D is connected to pin 23 of 5 1 D is connected to UDPO pin 24 of RSF1OKBC USB standard A J6 lower USB standard A J6 upper Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name 1 5V 3 D 5 5V 7 D 2 D 4 GND 6 D 8 GND A Both USB are configured as hosts lower D is connected to DM1 pin AA9 of R7S721000VCBG lower D is connected to DP1 pin Y9 of R7S721000VCBG upper D is connected to DMO 11 of R7S721000VCBG upper D is connected to DPO pin Y 11 of R7S721000VCBG Micro SD card slot Micro SD J4 Pin Signal Name MCU PIN MCU PORT 1 DAT2 F18 P4 15 SD D2 0 2 CD DAT3 F17 14 SD D3 0 3 CMD G20 P4 13 SD CMD 0 4 VDD 5 CLK H21 P4 12 SD CLK O 6 GND 7 DATO G18 P4 11 SD DO O 8 DAT1 H20 P4 10 SD D1 O 9 S1 10 G1 11 52 121 8 SD CD 0 12 G2 Composite video Composite video J16 Pin Signal Name Pin Signal Name 1 VIN1A 2 GND LVDS port connector J8 LVDS port J8 Pin Signal Name MCU PIN MCU PORT 1 ML LANE 0 B9 P5 6 TXOUTOP 2 GND 3 ML LANE 0 A9 P5 7 TXOUTOM 4 ML LANE 1 010 P5 4 5 GND 6 ML LANE 1 D9 P5 5 TXOUT1M 7 ML LANE 2 B10 P5 2 TXOUT2P 8 GND 9
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