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Analog Output Series User Manual

1. Counter 1 Source Signal Counter 1 Gate Signal sss Counter 1 Internal Output Signal Counter 1 Up Down Signal Frequency Output Signal Master Timebase Signal Getting Started with Counter Applications in Software Chapter 6 Programmable Function Interfaces PFI Inputs iei oe Eee prose tee rese ves tore erre t Outputs eda e Ee Aad tee Chapter 7 Digital Routing Timing Signal Routing eee Connecting Timing Signals sess Routing Signals in Software esses Chapter 8 Real Time System Integration Bus RTSI RISE Triggers entente ite aerea Device and RTSI Clocks ee Synchronizing Multiple Devices sss National Instruments Corporation Vii Contents Analog Output Series User Manual Contents Chapter 9 Bus Interface MITE and DAQ PnP 5 nup a ete e DP dens 9 1 Usine PXT with GompactPCL eter Rr ere 9 1 Data Transfer Methods sn ii dete Poiret deti 9 2 Direct Memory Access DMA essen nennen nennen ens 9 2 Interrupt Request IRQ tereti ennemis eie epe 9 2 Programmed l o ro reo pe ee de 9 2 Changing Data Transfer Methods between DMA and IRQ 9 2 Chapter 10
2. AO 0 Y External o Channel 0 Reference Vief Signal Optional Load V OUT V Load V OUT AO 1 or Channel 1 Analog Output Channels I O Connector AO Series Device Figure 3 2 Analog Output Connections for AO 0 and AO 1 Note AO EXT REF is not available on the NI 6722 6723 3 Waveform Generation Timing Signals Waveform Generation Timing Summary There is one AO Sample Clock that causes all AO channels to update simultaneously Figure 3 3 summarizes the timing and routing options provided by the analog output timing engine RTSI 7 PFI 0 9 Ctr1InternalOutput Master Onboard RTSI 0 6 ao SampleClock E ao SampleClock Timebase s Onboard RTSI 0 6 Clock Timebase e Clock e Sm 20 MHz 200 Divisor Timebase Figure 3 3 Analog Output Engine Routing Options Analog Output Series User Manual 3 6 ni com Chapter 3 Analog Output AO Start Trigger Signal You can use the AO Start Trigger ao StartTrigger signal to initiate a waveform generation If you do not use triggers you begin a generation with a software command Using a Digital Source To use ao StartTrigger specify a source and an edge The source can be an external signal connected to any PFI or RTSI lt 0 6 gt pin The source can also be one of several internal signal on your DAQ device Refer to Device
3. eese n nn nnn nenne sene h nenne nene nene e nnn aa nn X Chapter 1 DAQ System Overview DAQO HardwW te u seet te E o a aed PU qiia steve m eet 1 2 DAQCSTG ibeoiigeienemgeeedenpalteeidteapeqaueietioidis 1 2 Calibration Carcuitry eR eta eH ede PP vere eto 1 3 Internal or Self Calibration eese 1 3 External Calibration essent nnne 1 3 Cables and ACC SSOFIGS iai eite b d RE Rar dg 1 4 Using Accessories with Devices M Wu u u cessereeserserersereeseree renerne renere nerne renee 1 4 Custom Cabling 3232 3 2 e het doen armes 1 6 Field Wiring Considerations eese rennen 1 6 Programming Devices in Software esses eene 1 7 Chapter 2 1 0 Connector 68 Pin AO I O Connector Pinout cccccccccssssccceesssscceceeesssseeceeesssceececesssaeeceeeessseeeeees 2 1 68 68 Pin Extended AO I O Connector Pinout eeessseeeeeeeeeneeenne 2 5 Terminal Name Equivalents tonigi a n i e Ern eerte 2 7 I O Connector Signal Descriptions essere enne 2 9 x V ROWER SOUTCE uite ete t t re HE ERE EH cos seed seb ra e EYE E PERENNE Uu 2 12 Chapter 3 Analog Output Analog Output Fundamentals essent eene enne 3 1 Analog Output Circuitry sic Geek Ee eR ER RU RR 3 1 DAGES unen uenti ee E aie 3 1 DAC FIFO rro 2 tnter hr etm rho estet et e esee 3 1 AO Sample Clock 35 5 hd aues 3 2 R f rence Selection
4. Table 1 2 Overview of DAQ Accessories for Analog Output Devices Accessory Description BNC 2110 BNC connector block for 68 pin analog output devices BNC 2115 BNC connector block for extended I O CB 68LP CB 68LPR 68 pin low cost screw terminal block SCB 68 68 pin shielded screw terminal block with breadboard areas TB 68 68 pin DIN rail mountable screw terminal block National Instruments Corporation Analog Output Series User Manual Chapter 1 DAQ System Overview Custom Cabling Follow these guidelines if you want to develop your own cable Route the analog lines separately from the digital lines When using a cable shield use separate shields for the analog and digital halves of the cable Failure to do so results in noise coupling into the analog signals from transient digital signals Table 1 3 shows the recommended connectors to use with the I O connector on your AO device Table 1 3 Recommended AO Connectors Device Connector NI 6711 6713 Honda 68 position solder cup female connector Honda backshell NI DAQCard 6715 AMP 68 position VHDCI AMP backshell NI 6722 6723 AMP 68 position VHDCI AMP backshell NI 6731 6733 Honda 68 position solder cup female connector Honda backshell NS Note When the NI DAQCard 6715 is in the upper PCMCIA slot you can maintain access to the adjacent slot by using an inverted VHDCI con
5. Generic Se nc Interface PCI Bus Interface ftofrofro b S Data v i DAC FIFO K Address gt I O Connector Latch K T T 1 DIO Register EEPROM 4 EEPROM 16 AO7 FIFO Decode Control sen o FPGA ow i Control IRQ AO Control Calirationt iDAG STO n Onyali p Interface Calibration BAL K Data L Calibration Calibration 1 8 Mux ADC T T PFI Trigger P i Analog Output Bus Trigger iTiming Control Interface Timin i Counter poner g Timing Vo DAQ STC DMA IRQ F n P Analog Input RTSI Bus Digital I O 8 Digital 1 O Timing Control Interface 4 4X Qmm Note AO 4 through AO 7 appear only on the NI 6733 Nut Figure A 4 NI 6731 6733 Block Diagram National Instruments Corporation A 9 Analog Output Series User Manual Troubleshooting This section contains some common questions about AO Series devices If your questions are not answered here refer to the National Instruments KnowledgeBase at ni com kb It contains thousands of documents that answer frequently asked questions about NI products Calculating Frequency Resolution How can I calculate the fr
6. o tee p re 3 2 Analog Output Resolution eese enne 3 2 Reference Selection NI 6711 6713 DA QCard 6715 and NI 6731 6733 Only cece iiiter ert e PE e PO Une 3 3 Reglitch Selection NI 6711 6713 Only eee 3 3 National Instruments Corporation V Analog Output Series User Manual Contents Minimizing Glitches on the Output Signal sees 3 3 AO Data Generation Methods sess 3 3 Software Timed Generations sese 3 4 Hardware Timed Generations eee 3 4 Analog Output Triggering sad ette eter eei tee bn nee Ud dende eR Rond 3 5 Connecting Analog Output Signals essere eene 3 6 Waveform Generation Timing Signals sees 3 6 Waveform Generation Timing Summary eee 3 6 AO Start Trigger Signal eet eee ted etie rocas 3 7 Using a Digital Source i d 3 7 Outputting the AO Start Trigger Signal sse 3 7 AO Pause Trigger Signal niet tertii e Ce Ceci ts 3 8 Using a Digital Source 3 8 AO Sample Clock Signal estet ete 3 8 Using an Internal Source eese 3 9 Using an External Source esee 3 9 Outputting the AO Sample Clock Signal sess 3 9 Other Timing Requirements essere 3 10 AO Sample Clock Timebase Signal ene 3 11 Master T imeb
7. Current output high Analog Output Series User Manual G 4 ni com LED LSB m measurement device MSB module monotonicity NC NI NI DAQ National Instruments Corporation G 5 Glossary Current output low Interrupt request Light emitting diode a semiconductor light source Least significant bit Meter DAQ devices such as the E Series multifunction I O MIO devices SCXI signal conditioning modules and switch modules Most significant bit A board assembly and its associated mechanical parts front panel optional shields and so on A module contains everything required to occupy one or more slots in a mainframe SCXI and PXI devices are modules A characteristic of a DAC in which the analog output always increases as the values of the digital code input to it increase Normally closed or not connected National Instruments Driver software included with all NI measurement devices NI DAQ is an extensive library of VIs and functions you can call from an application development environment ADE such as LabVIEW to program all the features of an NI measurement device such as configuring acquiring and generating data from and sending data to the device Analog Output Series User Manual Glossary NI DAQmx noise NRSE PCI pd PFI PGIA physical channel port ppm pu The latest NI DAQ driver with new VIs functions and development tools for controlling meas
8. PFI pins labeled PFI lt 0 9 gt route all external control over the timing of the device These lines serve as connections to virtually all internal timing signals These PFIs are bidirectional As outputs they are not programmable and reflect the state of many waveform generation and counter timing signals There are five other dedicated outputs for the remainder of the timing signals As inputs the PFI signals are programmable and can control all timing signals All digital timing connections are referenced to D GND Figure 7 2 shows this reference and how to connect an external PFI 0 source and an external PFI 2 source to two PFI pins National Instruments Corporation 7 3 Analog Output Series User Manual Chapter 7 Digital Routing PFI O PFI 2 PFI O Source PFI2 Source D GND x d X I O Connector AO Series Device Figure 7 2 Connecting PFI 0 and PFI 2 to Two PFI Pins Routing Signals in Software Table 7 1 lists the basic functions you can use to route signals Table 7 1 Signal Routing in Software Language Program Function LabVIEW NI DAQmx DAQmx Export Signal vi and DAQmx Connect Terminals vi Traditional NI DAQ Legacy Route Signal vi C NI DAQmx Export Signal and DAQmx Connect Terminals Traditional NI DAQ Legacy Select Signal Note For more information about routing s
9. Triggering Triggering with a Digital Source esiseina runosi ierdie ea e ae eee ene 10 1 Appendix A Device Specific Information Appendix B Troubleshooting Appendix C Technical Support and Professional Services Glossary Index Analog Output Series User Manual Viii ni com About This Manual Conventions This manual contains information about using the National Instruments Analog Output AO Series devices with NI DAQ 7 x or later If you have not already installed your device refer to the DAQ Getting Started Guide 3 AN A N bold italic monospace The following conventions appear in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on a product refer to the Read Me First Safety and Radio Frequency Interference document for information about precautions to take When symbol is marked on a product it denotes a warning advising you to take p
10. You can configure the PFI 5 AO SAMP CLK pin to output the ao SampleClock signal The output pin reflects the ao SampleClock signal regardless of what signal you specify as its source National Instruments Corporation 3 9 Analog Output Series User Manual Chapter 3 Analog Output The output is an active high pulse Figure 3 7 shows the timing behavior of the PFI 5 AO SAMP CLK pin when the pin is an output tw 50 75 ns Figure 3 7 PFI 5 A0 SAMP CLK as an Output The PFI 5 AO SAMP CLK is configured as an input by default Other Timing Requirements A counter on your device internally generates ao SampleClock unless you select some external source The ao StartTrigger signal starts this counter Itis stopped automatically by hardware after a finite acquisition completes or manually through software When using an internally generated ao SampleClock in NI DAQmx you can also specify a configurable delay from the ao StartTrigger to the first ao SampleClock pulse By default this delay is two ticks of the ao SampleClockTimebase signal Figure 3 8 shows the relationship of the ao SampleClock signal to the ao StartTrigger signal mmm ao SampleClockTimebase ao StartTrigger 1 ao SampleClock 4 Delay from Start Trigger Figure 3 8 ao SampleClock and ao StartTrigger Analog Output Series User Manual 3 10 ni com Chapter 3 Analog Output
11. i I 12 AO 1 1 GSR 4 A91 Amp 12 Bit DAC Latch 12 402 A02 n Amp 12 Bit DAC 7 Latch ft ft Ed f AO 3 Latch I I AO 4 i Latch I I Generie i AO 5 KC Interface 7 Latch sD 2 E DAC 8 12 a FIFO IRQ ed I Sla Yi A06 GE ED Lm K amp 1 Amp 12 Bit DAC Latch I o Ez I EEPROM Register AO 7 Control Decode m Latch dig ar ecl P contor FPGA ONG OMA S ft AO Control taai 1DAQ STC x gt Control intetace oa O Calibration K Data n 34 DACs Z Calibration p Calibration 8 Mux ADC PFI Trigger X Analog Output Bus 2 Trigger Timing Control Interface Timin X Counter 3 Timing vo DAQ STC DMA IRQ 10 Analog Input RTSI Bus Digital I O 8 y Digital I O Timing Control Interface ois 5V NZ Note AO_ lt 4 7 gt appear only on the NI 6713 NU National Instruments Corporation Figure A 1 NI 6711 6713 Block Diagram A 3 Analog Output Series User Manual Appendix A Device Specific Information NI DAQCard 6715 The following sections contain more information on the NI DAQCard 6715 Features NI DAQCard 6715 The NI DAQCard 6715 is a Plug and Play analog output AO digital
12. 5 2 shows the timing requirements for the gate and source input signals and the timing specifications for the output signals on your device lt tsc gt q tsp gt lt tsp Vis EM SOURCE p WEN A CUM aa S Vit tgsu lt tgh Vin i i GATE i i Vi i lt tow gt tu Vi i our VoL Source Clock Period tsc 50 ns minimum Source Pulse Width tsp 10 ns minimum Gate Setup Time tgsu 10 ns minimum Gate Hold Time tgh 0 ns minimum Gate Pulse Width tow 10 ns minimum Output Delay Time tout 80 ns maximum Figure 5 2 Gate and Source Input Timing Requirements The gate and out signal transitions shown in Figure 5 2 are referenced to the rising edge of the source signal This timing diagram assumes that the counters are programmed to count rising edges The same timing diagram Analog Output Series User Manual 5 2 ni com Chapter 5 Counters but with the source signal inverted and referenced to the falling edge of the source signal applies when you program the counter to count falling edges The gate input timing parameters are referenced to the signal at the source input or to one of the internally generated signals on your device Figure 5 2 shows the gate signal referenced to the rising edge of a source signal The gate must be valid either high or low for at least 10 ns before the rising or falling edge of a source signal so the gate can take effect at that source edge as shown
13. AO Sample Clock Timebase Signal You can select any PFI or RTSI pin as well as many other internal signals as the AO Sample Clock Timebase ao SampleClockTimebase signal This signal is not available as an output on the I O connector The ao SampleClockTimebase is divided down to provide the Onboard Clock source for the ao SampleClock You specify whether the samples begin on the rising or falling edge of ao SampleClockTimebase You might use the ao SampleClockTimebase signal if you want to use an external sample clock signal but need to divide the signal down If you want to use an external sample clock signal but do not need to divide the signal then you should use the ao SampleClock signal rather than the ao SampleClockTimebase If you do not specify an external sample clock timebase NI DAQ uses the Onboard Clock Figure 3 9 shows the timing requirements for the ao SampleClockTimebase signal t 1 P 4 M gt row 1 dw oi tp 50 ns minimum ty 23 ns minimum Figure 3 9 ao SampleClockTimebase Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency Unless you select an external source either the 20MHzTimebase or 100kHzTimebase generates the ao SampleClockTimebase signal Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which
14. Calibration Procedure for NI DAQmx document by selecting Manual Calibration Procedures at ni com calibration FREQ OUT D GND Output Frequency Output Signal This output is from the frequency generator For more information refer to Chapter 5 Counters National Instruments Corporation 2 11 Analog Output Series User Manual Chapter 2 10 Connector Caution Connections that exceed any of the maximum ratings of input or output A signals on the AO Series device can damage the device and the computer Refer to the specifications document for your device for more information on maximum input ratings for each signal NI is not liable for any damage resulting from signal connections that exceed the maximum ratings 5 V Power Source The 5 V pins on the I O connector supply 5 V power You can use these pins referenced to D GND to power external circuitry A self resetting fuse protects the supply from overcurrent conditions The fuse resets automatically within a few seconds after the overcurrent condition is removed Power rating 4 65 to 5 25 VDC at 1 A 0 75 A for the DAQCard 6715 The 5 V line on the connector of the DAQCard 6715 is fused at 0 75 A However the actual current available can be limited below this value by the host computer NI recommends limiting current from this line to 250 mA Caution Never connect these 5 V power pins to analog or digital ground or to any other voltag
15. Master Timebase 5 9 D DAC FIFO 3 1 DACs 3 1 DAQ System Overview 1 1 DAQCard analog output A 4 block diagram A 5 features A 4 DAQ STC 1 2 data transfer methods changing 9 2 Declaration of Conformity NI resources C 1 device and RTSI clocks 8 3 DI Sample Clock 4 4 diagnostic tools NI resources C 1 digital I O connecting digital I O signals 4 6 power on state 4 5 Analog Output Series User Manual Index DIO applications 4 7 direct memory access DMA 9 2 DO Sample Clock 4 2 documentation NI resources C 1 drivers NI resources C 1 E examples NI resources C 1 external reference 3 6 F features NI 6711 6713 A 1 NI 6722 6723 A 6 NI 6731 6733 A 8 NI DAQCard 6715 A 4 frequency resolution B 1 G glitches on the output signal minimizing 3 3 H help technical support C 1 I O connector 68 68 pin extended AO 2 5 68 pin AO 2 1 NI 6711 figure 2 2 NI 6713 figure 2 3 NI 6722 figure 2 4 NI 6723 figure 2 5 NI 6731 figure 2 2 NI 6733 figure 2 3 NI DAQCard 6715 figure 2 3 signal descriptions 2 9 Analog Output Series User Manual 1 2 I O protection 4 5 instrument drivers NI resources C 1 interrupt request IRQ 9 2 interrupts 9 2 K KnowledgeBase C 1 L LabVIEW documentation xii LabWindows CVI documentation xii Measurement Studio documentation xii minimizing glitches 3 3 National Instruments support and servic
16. Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Figure 3 4 shows the timing requirements of the ao StartTrigger digital source Rising Edge Polarity c Falling Edge E Polarity ty 10 ns minimum Figure 3 4 ao StartTrigger Timing Requirements Outputting the AO Start Trigger Signal You can configure the PFI 6 AO START TRIG pin to output the ao StartTrigger signal The output pin reflects the ao StartTrigger signal regardless of what signal you specify as its source The output is an active high pulse Figure 3 5 shows the timing behavior of the PFI 6 AO START TRIG pin when the pin is an output National Instruments Corporation 3 7 Analog Output Series User Manual Chapter 3 Analog Output tw 50 100 ns Figure 3 5 PFI 6 A0 START TRIG Timing Behavior The PFI 6 AO START TRIG pin is configured as an input by default AO Pause Trigger Signal You can use the AO Pause trigger signal ao PauseTrigger to mask off samples in a DAQ sequence That is when ao PauseTrigger is active no samples occur The ao PauseTrigger does not stop a sample that is in progress The pause does not take effect until the beginning of the next sample This signal is not available as an output Using a Digital Source To use ao Pause Trigger specify a source and a polarity The source can be an external signal connected to any PFI or RTSI lt 0 6 gt p
17. This book also contains Taking an NI DAQmx Measurement in LabWindows CVI which includes step by step instructions about creating a measurement task using the DAQ Assistant In LabWindows CVI select Help Contents then select Using LabWindows CVI Data Acquisition The NI DAQmx Library book of the LabWindows CVI Help contains API overviews and function reference for NI DAQmx Select Library Reference NI DAQmx Library in the LabWindows CVI Help Measurement Studio If you program your NI DAQmx supported device in Measurement Studio using Visual C Visual C or Visual Basic NET you can interactively create channels and tasks by launching the DAQ Assistant from MAX or Analog Output Series User Manual Xii ni com About This Manual from within Visual Studio NET You can generate the configuration code based on your task or channel in Measurement Studio Refer to the DAQ Assistant Help for additional information about generating code You also can create channels and tasks and write your own applications in your ADE using the NI DAQmx API For help with NI DAQmx methods and properties refer to the NI DAQmx NET Class Library or the NI DAQmx Visual C Class Library included in the NJ Measurement Studio Help For general help with programming in Measurement Studio refer to the NJ Measurement Studio Help which is fully integrated with the Microsoft Visual Studio NET help To view this help file in Visual Studio NET select Me
18. User Manual 5 10 ni com Programmable Function Interfaces PFI Inputs The 10 Programmable Function Interface PFI pins allow timing signals to be routed to and from the I O connector of a device An external timing signal can be input on any PFI pin and multiple timing signals can simultaneously use the same PFI pin This flexible routing scheme reduces the need to change the physical connections to the I O connector for different applications For more information refer to the Timing Signal Routing section of Chapter 7 Digital Routing When using the PFI pin as an input you can individually configure each PFI for edge or level detection and for polarity selection You can use the polarity selection for any of the timing signals but the edge or level detection depends upon the particular timing signal being controlled The detection requirements for each timing signal are listed within the section that discusses that signal In edge detection mode the minimum pulse width required is 10 ns This applies for both rising edge and falling edge polarity settings There is no maximum pulse width requirement in edge detect mode In level detection mode there are no minimum or maximum pulse width requirements imposed by the PFI signals but there can be limits imposed by the particular timing signal being controlled O National Instruments Corporation 6 1 Analog Output Series User Manual Chapter 6 Programmable Function Interfac
19. accurate The document has been carefully reviewed for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunction
20. configurable For example the signal routing multiplexer for controlling the ao SampleClock signal is shown in Figure 7 1 D RTSI Trigger lt 0 6 gt gt ao Sample Clock PFI 0 9 lt Onboard Clock 3 Ctr1InternalOutput m d Figure 7 1 Signal Routing Multiplexer on Analog Output Devices Figure 7 1 shows that you can generate the ao SampleClock signal from a number of sources including the external signals RTSI lt 0 6 gt PFI lt 0 9 gt and the internal signals Onboard Clock and Ctr1InternalOutput Here the Onboard Clock is derived by dividing down the ao SampleClockTimebase signal Analog Output Series User Manual 7 2 ni com Chapter 7 Digital Routing Many of these timing signals are also available as outputs on the PFI pins S Note The Master Timebase signal can only be accepted as an external signal over RTSI For more information on the Master Timebase signal refer to the Master Timebase Signal section of Chapter 5 Counters Refer to the Device and RTSI Clocks section of Chapter 8 Real Time System Integration Bus RTSI for information on routing this signal Connecting Timing Signals UN Caution Exceeding the maximum input voltage ratings listed in the specifications for your device can damage your device and the computer NI is not liable for any damage resulting from signal connections that exceed the maximum ratings The 10 programmable function interface
21. devices e CtriInternalOutput can drive other internal signals Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Counter 1 Up Down Signal You can externally input this signal on the P0 7 pin but it is not available as an output on the I O connector When you enable externally controlled count direction Counter 1 counts down when this pin is at a logic low and counts up when it is at a logic high If you do not enable externally controlled count direction the PO 7 pin is free for general use Frequency Output Signal This signal is available only as an output on the FREQ OUT pin The frequency generator for your device outputs on the Frequency Output signal The frequency generator is a four bit counter that can divide its input clock by the numbers one through 16 The input clock of the frequency generator is software selectable from the internal 10 MHz and 100 kHz timebases The output polarity is software selectable This output is set to high impedance at startup Master Timebase Signal The Master Timebase MasterTimebase signal or Onboard Clock is the timebase from which all other internally generated clocks and timebases on the board are derived It controls the timing for the analog output and counter subsystems It is available as on output on the I O connector but you must use one or more counters to do so The maximum allowed frequency for the MasterTimebase
22. generations typically allow for much faster transfer rates than non buffered generations because data is moved in large blocks rather than one point at a time For more information on DMA and interrupt requests refer to the Data Transfer Methods section of Chapter 9 Bus Interface One property of buffered I O operations is the sample mode The sample mode can be either finite or continuous Finite sample mode generation refers to the generation of a specific predetermined number of data samples After the specified number of samples has been written out the generation stops Analog Output Series User Manual 3 4 ni com Analog Output Chapter 3 Analog Output Continuous generation refers to the generation of an unspecified number of samples Instead of generating a set number of data samples and stopping a continuous generation continues until you stop the operation There are several different methods of continuous generation that control what data is written These methods are regeneration FIFO regeneration and non regeneration modes Regeneration is the repetition of the data that is already in the buffer Standard regeneration is when data from the PC buffer is continually downloaded to the FIFO to be written out New data can be written to the PC buffer at any time without disrupting the output With FIFO regeneration the entire buffer is downloaded to the FIFO and regenerated from there After the data is downloaded new dat
23. host software Using an Internal Source To use di SampleClock with an internal source specify the signal source and the polarity of the signal The source can be any of the following signals e AO Sample Clock e Counter 0 Out Program the DAQ device to sample the DIO terminals on the rising edge or falling edge of di SampleClock Using an External Source You can use a signal connected to any RTSI lt 0 6 gt pin as the source of di SampleClock You can sample data on the rising or falling edge of di SampleClock Any PFI line that can be routed to RTSI can also be used as the clock source Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information You must ensure that the time between two active edges of the di SampleClock is not too short If the time is too short the DI waveform generation FIFO is not able to store the sample fast enough Analog Output Series User Manual 4 4 ni com 1 0 Protection Chapter 4 Digital I O To minimize the risk of damaging the DIO and PFI terminals of your device follow these guidelines Power On States If you configure a PFI or DIO line as an output do not connect it to any external signal source ground signal or power supply If you configure a PFI or DIO line as an output understand the current requirements of the load connected to these signals Do not exceed the specified current output limits of the DAQ device NI has sever
24. increments and decrements the counter value depending on the application the counter is performing You can export the Counter 1 signal to the PFI 3 CTR 1 SOURCE pin even if another PFI is inputting the Ctr1 Source signal This output is set to high impedance at startup Figure 5 7 shows the timing requirements for the Ctr1Source signal 4 ip y wp tw tp 50 ns minimum tw 10 ns minimum Figure 5 7 Ctr1Source Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency For most applications unless you select an external source the 20MHzTimebase signal or the 100kHzTimebase signal generates the Ctrl Source signal Counter 1 Gate Signal You can select any PFI as well as many other internal signals like the Counter 1 Gate Ctr1Gate signal The Ctr1Gate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can export the gate signal connected to Counter 1 to the PFI 4 CTR 1 GATE pin even if another PFI is inputting the Ctr1Gate signal This output is set to high impedance at startup National Instruments Corporation 5 7 Analog Output Series User Manual Chapter 5
25. is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The two possible sources for the MasterTimebase signal are the internal 20MHzTimebase signal or an external signal through RTSI 7 Typically the 20MHzTimebase signal is used as the MasterTimebase unless you wish to synchronize multiple devices in which case you should use RTSI 7 Refer to Chapter 8 Real Time System Integration Bus RTSI for more information on which signals are available through RTSI National Instruments Corporation 5 9 Analog Output Series User Manual Chapter 5 Counters Figure 5 10 shows the timing requirements for MasterTimebase tp 50 ns minimum ty 23 ns minimum Figure 5 10 MasterTimebase Timing Requirements Getting Started with Counter Applications in Software You can use the AO Series device in the following counter based applications e Counting Edges e Frequency Measurement Period Measurement e Pulse Width Measurement e Semi Period Measurement e Pulse Generation You can perform these measurements through programmed I O interrupt or DMA data transfer mechanisms The measurements can be finite or continuous in duration Some of the applications also use start triggers and pause triggers NS Note For more information about programming counter applications and triggers in software refer to the NI DAQmx Help Analog Output Series
26. signal Application Specific Integrated Circuit a proprietary semiconductor component designed and manufactured to perform a set of specific functions A signal range that includes both positive and negative values for example 5 to 45 V Celsius 1 Physical a terminal or pin at which you can measure or generate an analog or digital signal A single physical channel can include more than one terminal as in the case of a differential analog input channel or a digital port of eight lines The name used for a counter physical channel is an exception because that physical channel name is not the name of the terminal where the counter measures or generates the digital signal 2 Virtual a collection of property settings that can include a name a physical channel input terminal connections the type of measurement or generation and scaling information You can define NI DAQmx virtual channels outside a task global or inside a task local Configuring virtual channels is optional in Traditional NI DAQ Legacy and earlier versions but is integral to every measurement you take in NI DAQmx In Traditional NI DAQ Legacy you configure virtual channels in MAX In NI DAQmx you can configure virtual channels either in MAX or in a program and you can configure channels as part of a task or separately Centimeter Complementary metal oxide semiconductor Analog Output Series User Manual G 2 ni com correlated DIO counter ti
27. such as LabVIEW or LabWindows CVI to program all the features of your NI measurement devices Driver software has an application programming interface API which is a library of VIs functions classes attributes and properties for creating applications for your device NI DAQ 7 x includes two NI DAQ drivers Traditional NI DAQ Legacy and NI DAQmx Each driver has its own API hardware configuration and software configuration Refer to the DAQ Getting Started Guide for more information about the two drivers Traditional NI DAQ Legacy and NI DAQmx each include a collection of programming examples to help you get started developing an application You can modify example code and save it in an application You can use examples to develop a new application or add example code to an existing application To locate LabVIEW and LabWindows CVI examples open the National Instruments Example Finder In LabVIEW select Help Find Examples e In LabWindows CVI select Help NI Example Finder Measurement Studio Visual Basic and ANSI C examples are in the following directories e NI DAQmx examples for Measurement Studio supported languages are in the following directories MeasurementStudio VCNET Examples NIDaq Measurement Studio DotNET Examples NIDaqg National Instruments Corporation 1 7 Analog Output Series User Manual Chapter 1 DAQ System Overview e Traditional NI DAQ Legacy examples for Visual Ba
28. timebase over the RTSI bus to another device that is programmed to receive this timebase signal The default configuration is to use the internal 20MHzTimebase signal without driving the timebase onto the RTSI bus NI DAQCard 6715 only The NI DAQCard 6715 does not interface to the RTSI bus It can only directly use its own internal 20 MHz timebase as the primary frequency source Synchronizing Multiple Devices With the RTSI bus and the routing capabilities of the DAQ STC there are several ways to synchronize multiple devices depending on your application NI recommends that you use a common timebase as the MasterTimebase signal and share any common triggers in the application One device is designated as the master device and all other devices are designated as slave devices The 20MHzTimebase on the master device is the MasterTimebase signal for all devices The slave devices pull this signal from the master device across the RTSI trigger 7 line Slave devices also pull any shared triggers across an available RTSI trigger line from the master device When you start all of the slave devices before starting the master device you have successfully synchronized your application across multiple devices Analog Output Series User Manual 8 4 ni com Bus Interface Each AO Series device is designed on a complete hardware architecture that is deployed on either the PCI or PXI platform Using NI DAQ driver software you have the flexib
29. to the PXI star trigger line allowing the device to receive triggers from any star trigger controller plugged into Slot 2 of the chassis AO Series devices can accept timing signals from the PXI star trigger line but they cannot drive signals onto it For more information on the star trigger refer to the PXI Hardware Specification Revision 2 1 National Instruments Corporation 8 1 Analog Output Series User Manual Chapter 8 Real Time System Integration Bus RTS Figure 8 1 shows the PCI RTSI bus signal connection F S Trigger lt 0 6 gt RTSI Bus Connector RTSI Switch RTSI Trigger 7 DAQ STC ao SampleClock ao StartTrigger ao Pause Trigger CtrO Source CtroGate CtrOlnternalOutput CtrOOut ao SampleClockTimebase Ctr1 Source Ctr1 Gate 20MHzTimebase MasterTimebase Analog Output Series User Manual Figure 8 1 PCI RTSI Bus Signal Connection 8 2 ni com Chapter 8 Real Time System Integration Bus RTS Figure 8 2 shows the PXI RTSI bus signal connection la DAQ STC lt _ Y _ _ _ ao SampleClock PXI Star 6 lt _ Y _ _ ad StartTrigger F 1 ao PauseTrigger MT Ctro Source g rigger s 2 m 9 0 5 Ctr0Gate S lt t __A _ gt Ctr lnternalOutput O 6 o 2 dt CtrOOut F oc x a gt ao Sam
30. 0 7 D GND Input or Digital I O signals These pins drive and Output receive digital signals P0 6 and P0 7 can control the up down signal of Counters 0 and 1 respectively 5 V D GND Output 5 VDC source These pins provide 5 V power AO EXT REF D GND Input External Reference This pin is the external reference input for the AO circuitry AI HOLD COMP D GND Output AI Hold Complete This pin is used to control some NI accessories EXT STROBE D GND Output External Strobe This pin is used to control some NI accessories PFI O D GND Input PFI 0 As an input for digital signals this pin is a general purpose input terminal For an explanation of PFI signals refer to the Connecting Timing Signals section PFI 1 D GND Input PFI 1 As an input this is a general purpose input terminal PFI 2 D GND Input PFI 2 As an input this pin is a general purpose input terminal National Instruments Corporation 2 9 Analog Output Series User Manual Chapter 2 1 0 Connector Table 2 2 1 0 Connector Signal Descriptions Continued I O Connector Pin Reference Direction Signal Description PFI 3 CTR 1 D GND Input PFI 3 As an input this pin is a general purpose SOURCE input terminal This is the default input for the Ctrl Source signal Output Counter 1 Source Signal As an output this pin emits the selected Ctr1 Source signal This signal reflects the actual source signal con
31. 57 AO 2 AO 0 22 56 AO GND AO 1 21 55 AO GND AO EXT REF 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 PO 1 17151 P0 5 P0 6 16 50 D GND D GND 15 49 P0 2 45V 14 48 P0 7 D GND 13 47 P0 3 D GND 12 46 NC PEKO 11145 EXT STROBE PFI 1 10 44 D GND D GND 9 43 PFI 2 5V 8 42 PFI 3 CTR 1 SOURCE D GND 7 141 PFI 4 CTR 1 GATE PFI 5 A0 SAMP CLK 6 40 C3 ENTRO UTR PFI 6 AO START TRIG 5 39 D GND D GND 4 38 IPF T PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1 35 D GND NC No Connect Figure 2 1 NI 6711 6731 68 Pin AO 1 0 Connector Pinout Analog Output Series User Manual 2 2 ni com Chapter 2 OR AO GND 34 68 NC NC 33 67 AO GND AO GND 32 66 AO GND AO GND 31 65 AO 7 AO 6 30 64 AO GND AO GND 29 63 AO GND AO 5 28 62 NC AO GND 27 61 AO GND AO GND 26 60 AO 4 AO 3 25 59 AO GND AO GND 24 58 AO GND AO GND 23 57 AO 2 AO 0 22 56 AO GND AO 1 21 55 AO GND AO EXT REF 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 PO 1 17 51 P0 5 P0 6 16 50 D GND D GND 15 49 P0 2 5V 14 48 P0 7 D GND 13 47 P0 3 D GND 12 46 NC PFI O 11 45 EXT STROBE PFI 1 10 44 D GND D GND 9 43 PFI 2 5 V 8 42 PFI 3 CTR 1 SOURCE D GND 7 41 PFI 4 CTR 1 GATE PFI 5 AO SAMP CLK 6 40 CTR 1 OUT PFI 6 AO START TRIG 5 39 D GND D G
32. Counters Figure 5 8 shows the timing requirements for the Ctrl Gate signal Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 5 8 CtriGate Timing Requirements Counter 1 Internal Output Signal The Counter 1 Internal Output CtrOInternalOutput signal is the output of Counter 1 This signal reflects the terminal count TC of Counter 1 The counter generates a terminal count when its count value rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options Figure 5 9 shows the behavior of the Ctr1InternalOutput signal Ctr1Source Ctr1InternalOutput Pulse on TC Ctr1InternalOutput Toggle Output on TC i Figure 5 9 CtriInternalOutput Behavior You can use CtrlInternalOutput in the following applications e In pulse generation mode the counter drives Ctr1InternalOutput with the generated pulses To enable this behavior software configures the counter to toggle Ctr1InternalOutput on TC e CtriInternalOutput can control the timing of analog output acquisitions by driving ao SampleClock e Counter 0 and 1 can be daisy chained together by routing Ctrl InternalOutput to CtrOGate Analog Output Series User Manual 5 8 ni com Chapter 5 Counters e CtriInternalOutput drives the CTR 1 OUT pin to trigger or control external
33. DAQ Analog Output Series Analog Output Series User Manual NI 6711 6713 DAQCard 6715 NI 6722 6723 and NI 6731 6733 Devices June 2007 7 NATIONAL 370735E 01 INSTRUMENTS Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 Worldwide Offices Australia 1800 300 800 Austria 43 662 457990 0 Belgium 32 0 2 757 0020 Brazil 55 11 3262 3599 Canada 800 433 3488 China 86 21 5050 9800 Czech Republic 420 224 235 774 Denmark 45 45 76 26 00 Finland 385 0 9 725 72511 France 01 57 66 24 24 Germany 49 89 7413130 India 91 80 41190000 Israel 972 3 6393737 Italy 39 02 413091 Japan 81 3 5472 2970 Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 3390150 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand 662 278 6777 Turkey 90 212 279 3031 United Kingdom 44 0 1635 523545 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and e
34. EPROM Address Control gt Calibration Y Calibration Mux ADC PFI Trigger anari ladki E OSTE Cabratenla p EEPROM 9 TN 4X a S lt 8 E Digital 6 Thermometer Ke ven DAC amp FIFO 5 S E a NM A Analog Output Bus Analog Input Timing Control Interface Timing Control 1 1 X Trigger DAQ STC IRQ 4 9 Counter pini RTSI Bus Timing I O Digital VO Interface Digital 1 0 8 7 45V 4X 0 75A National Instruments Corporation Figure A 2 NI DAQCard 6715 Block Diagram A 5 Analog Output Series User Manual Appendix A Device Specific Information NI 6722 6723 The following sections contain more information on the NI 6722 6723 Features NI 6722 6723 The NI 6722 6723 are Plug and Play analog output AO digital I O DIO and timing I O TIO devices for PCI bus computers The NI 6722 features e eight AO channels with 13 bit resolution e eight lines of TTL compatible DIO e two 24 bit counter timers for TIO e a68 pin AO I O connector The NI 6723 features e 32 AO channels with 13 bit resolution e eight lines of TTL compatible DIO e two 24 bit counter timers for TIO e a 68 pin extended AO I O connector Because the NI 6722 6723 have no DIP switches jumpers or potentiometers they are easily soft
35. F OUT National Instruments Corporation 2 7 Analog Output Series User Manual Table 2 1 Terminal Name Equivalents Continued Traditional NI DAQ Legacy NI DAQmx GPCTRO_GATE CTR 0 GATE GPCTRO_OUT CTR 0 OUT GPCTRO_SOURCE CTR 0 SOURCE or CTR 0 SRC GPCTR1_GATE CTR 1 GATE GPCTR1_OUT CTR 1 OUT GPCTR1_SOURCE CTR 1 SOURCE or CTR 1 SRC PA PB PC PO P1 P2 PFI PFI PFI_ PFI SCANCLK AI HOLD COMP or AI HOLD SISOURCE AI Sample Clock Timebase STARTSCAN AI SAMP CLK or AI SAMP TRIG1 AI START TRIG or AI START TRIG2 AI REF TRIG or REF TRIG UISOURCE AO Sample Clock Timebase UPDATE AO SAMP CLK or AO SAMP WFTRIG AO START TRIG or AO START Analog Output Series User Manual 2 8 ni com Chapter 2 1 0 Connector 1 0 Connector Signal Descriptions Table 2 2 describes the signals found on the I O connectors Table 2 2 1 0 Connector Signal Descriptions I O Connector Pin Reference Direction Signal Description AO GND Analog Output Ground The AO voltages and the external reference voltage are referenced to these pins AO lt 0 31 gt AOGND Output Analog Output channels 0 through 31 These pins supply the voltage outputs of their respective channels D GND Digital Ground These pins supply the reference for the digital signals at the I O connector as well as the 5 VDC supply P0
36. I O DIO and timing I O TIO device for PCMCIA bus computers The NI DAQCard 6715 features e eight AO channels with 12 bit resolution e eight lines of TTL compatible DIO two 24 bit counter timers for TIO e a68 pin AO I O connector Because the NI DAQCard 6715 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI DAQCard 6715 connector pinouts refer to Chapter 2 I O Connector Analog Output NI DAQCard 6715 The NI DAQCard 6715 has eight channels of voltage output at the I O connector The reference for the AO circuitry is software selectable per channel The reference can be either internal or external but the range is always bipolar This means that you can generate signals up to 10 V with internal reference selected or EXT REF voltage with external reference selected Analog Output Series User Manual A 4 ni com Block Diagram NI DAQCard 6715 Figure A 2 shows a block diagram of the NI DAQCard 6715 Appendix A Device Specific Information a a a Ej I O Connector f AO 0 AO 0 Amp 12 Bit DAC AO 1 Amp AO2 Amp AOS3 Amp AO 4 Amp AO 5 Amp AO 6 Amp AO 1 12 Bit DAC AO 2 12 Bit DAC A 12 Bit DAC A mn Control Data ds Bit DAC AO 6 12 Bit DAC AO7 12 Bit DAC 03 O4 12 Bit DAC AO5 IL TL LL Calibration 24 DACs K d CONFIG EEPROM CIS E
37. MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information CTR 0 OUT Pin When the CTR 0 OUT pin is an output the CtrOInternalOutput signal drives the pin As an input CTR 0 OUT can drive any of the RTSI lt 0 6 gt signals CTR 0 OUT is set to high impedance at startup Figure 5 6 shows the relationship of CTR 0 OUT and CtrOInternalOutput Can Drive RTSI lt 0 6 gt or other signals CtroGate CtrOSource Counter 0 CtrOlnternalOutput CTR 0 OUT CtrOUp Down CtrOOut Can Drive RTSI lt 0 6 gt Figure 5 6 CTR 0 OUT and CtrOInternalOutput Counter 0 Up Down Signal You can externally input this signal on the PO 6 pin but it is not available as an output on the I O connector When you enable externally controlled count direction Counter 0 counts down when this pin is at a logic low and counts up when it is at a logic high If you are using an external signal to control the count direction do not use the PO 6 pin for output If you do not enable externally controlled count direction the P0 6 pin is free for general use Analog Output Series User Manual 5 6 ni com Chapter 5 Counters Counter 1 Source Signal You can select any PFI as well as many other internal signals as the Counter 1 Source Ctr1Source signal The Ctrl Source signal is configured in edge detection mode on either rising or falling edge The selected edge of the Ctr1Source signal
38. ND AO GND 18 52 AO 23 AO 24 17 51 AO GND AO 25 16 50 AO GND AO GND 15 49 AO 26 AO 27 14 48 AO GND AO 28 13 47 AO GND AO GND 12 46 AO 29 AO 30 11 45 AO GND AO 31 10 44 AO GND NC 9 43 NC NC 8 42 NC NC 7 41 NC NC 6 40 NC NC 5 39 NC NC 4 38 NC NC 3 37 NC NC 2 36 NC NC 1 35 NC Analog Output Series User Manual Figure 2 4 NI 6723 68 68 Pin Extended AO 1 0 Connector Pinout 2 6 ni com For a detailed description of each signal refer to O Connector Signal Descriptions Terminal Name Equivalents Chapter 2 1 0 Connector With NI DAQmx National Instruments has revised its terminal names so they are easier to understand and more consistent among National Instruments hardware and software products The revised terminal names used in this document are usually similar to the names they replace Refer to Table 2 1 for a list of Traditional NI DAQ Legacy terminal names and their NI DAQmx equivalents Table 2 1 Terminal Name Equivalents Traditional NI DAQ Legacy NI DAQmx ACH Al ACH Al ACH Al ACHGND AI GND AIGND AI GND AISENSE AI SENSE AISENSE2 AI SENSE 2 AOGND AO GND CONVERT AI CONV CLK or AI CONV DACOOUT AO 0 DACIOUT AO 1 DGND D GND DIO s PO DIO PO DIOA DIOB DIOC PO P1 P2 EXTREF AO EXT REF or EXT REF EXT_STROBE EXT STROBE FREQ_OUT FREQ OUT or
39. ND 4 38 PFI 7 PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1 35 D GND 1 0 Connector koe NC No Connect National Instruments Corporation Figure 2 2 NI 6713 DAQCard 6715 NI 6733 68 Pin AO 1 0 Connector Pinout 2 3 Analog Output Series User Manual Chapter 2 1 0 Connector AO GND NC AO GND AO GND AO 6 AO GND AO 5 AO GND AO GND AO 3 AO GND AO GND AO 0 AO 1 CAL P0 4 D GND PO 1 P0 6 D GND 5V D GND D GND PFI 0 PFI 1 D GND 45V D GND PFI 5 AO SAMP CLK PFI 6 AO START TRIG D GND PFI 9 CTR 0 GATE CTR 0 OUT FREQ OUT NC AO GND AO GND AO 7 AO GND AO GND NC AO GND AO 4 AO GND AO GND AO 2 AO GND AO GND AO GND D GND P0 0 P0 5 D GND P0 2 BORG P0 3 NC EXT STROBE D GND PFI 2 PFI S CTR 1 SOURCE PFI 4 CTR 1 GATE CTR 1 OUT D GND REI PFI 8 CTR 0 SOURCE D GND D GND NC No Connect Figure 2 3 NI 6722 68 Pin AO I O Connector Pinout For a detailed description of each signal refer to O Connector Signal Descriptions Analog Output Series User Manual 2 4 ni com Chapter 2 1 0 Connector 68 68 Pin Extended AO 1 0 Connector Pinout The NI 6723 has two 68 pin I O connectors Figure 2 4 shows the pin assignments for both connectors on the NI 6723 National Instruments Corporatio
40. O Reference Selection Options AO Range Polarity Reference Select 10 V Bipolar Internal EXT REF Bipolar AO External Reference Signal Analog Output Resolution You can calculate the least significant bit LSB or the minimal allowed voltage change on a voltage output on your AO Series device as follows LSB output voltage range 2resolution of your device where the output range is determined by your reference selection Using AO EXT REF you can reduce the output voltage range and lower the LSB the minimum allowed voltage change For more information on using the AO External Reference signal refer to the Reference Selection NI 6711 6713 DAQCard 6715 and NI 6731 6733 Only section The following equation is an example of this formula using the NI 6731 6733 20V 20V 305 uv 65 536 H The denominator in the equation is derived from 2 6 65 536 since the NI 6731 6733 devices use 16 bit DACs Analog Output Series User Manual 3 2 ni com Chapter 3 Analog Output Reference Selection NI 6711 6713 DAQCard 6715 and NI 6731 6733 Only You can connect each DAC to the device internal reference of 10 V or to the external reference signal connected to the external reference AO EXT REF pin on the I O connector This signal applied to AO EXT REF should be within 11 V of AO GND You do not need to configure all channels for the same mode Using AO EXT REF to reduce the output voltage range results in a higher resoluti
41. The amount of time required for a voltage to reach its final value within specified limits The manipulation of signals to prepare them for digitizing Analog Output Series User Manual Glossary task terminal count tout Traditional NI DAQ Legacy transducer Vcc VDC NI DAQmx a collection of one or more channels timing and triggering and other properties that apply to the task itself Conceptually a task represents a measurement or generation you want to perform The highest value of a counter Gate hold time Gate setup time Gate pulse width Output delay time An upgrade to the earlier version of NI DAQ Traditional NI DAQ Legacy has the same VIs and functions and works the same way as NI DAQ 6 9 x You can use both Traditional NI DAQ Legacy and NI DAQmx on the same computer which is not possible with NI DAQ 6 9 x See sensor Source clock period Source pulse width Transistor transistor logic a digital circuit composed of bipolar transistors wired in a certain manner A typical medium speed digital technology Nominal TTL logic levels are 0 and 5 V Volts Nominal 5 V power supply provided by the PC motherboard Volts direct current Analog Output Series User Manual G 8 ni com VI virtual instrument V rms virtual channel National Instruments Corporation Glossary 1 A combination of hardware and or software elements typically used with a PC that has the functio
42. These limits are designed to provide reasonable protection against harmful interference when the equipment is operated in a commercial environment This equipment generates uses and can radiate radio frequency energy and if not installed and used in accordance with the instruction manual may cause harmful interference to radio communications Operation of this equipment in a residential area is likely to cause harmful interference in which case the user is required to correct the interference at their own expense Canadian Department of Communications This Class A digital apparatus meets all requirements of the Canadian Interference Causing Equipment Regulations Cet appareil num rique de la classe A respecte toutes les exigences du R glement sur le mat riel brouilleur du Canada Compliance with EU Directives Users in the European Union EU should refer to the Declaration of Conformity DoC for information pertaining to the CE marking Refer to the Declaration of Conformity DoC for this product for any additional regulatory compliance information To obtain the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column The CE marking Declaration of Conformity contains important supplementary information and instructions for the user or installer Contents About This Manual ConVentloDszs eite eu eua e IM UTI ix Related Documentation
43. VELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Compliance Compliance with FCC Canada Radio Frequency Interference Regulations Determining FCC Class The Federal Communications Commission FCC has rules to protect wireless communications from interference The FCC places digital electronics into two classes These classes are known as Class A for use in industrial commercial locations only or Class B for use in residential o
44. W Switch Y I O Connector AO Series Device Figure 4 2 Digital I O Signal Connections UN Caution Exceeding the maximum input voltage ratings which are listed in the specifications of each AO Series device can damage the DAQ device and the computer NI is not liable for any damage resulting from such signal connections Analog Output Series User Manual 4 6 ni com Chapter 4 Digital 1 0 Getting Started with DIO Applications in Software You can use the AO Series device in the following digital I O applications Static Digital Input e Static Digital Output e Digital Waveform Generation e Digital Waveform Acquisition NI 6731 6733 only For correlated DIO examples in Traditional NI DAQ Legacy refer to the KnowledgeBase document What Devices Other Than M Series Can Perform Correlated Digital I O To access this document go to ni com info and enter the info code rdwd7m S Note For more information about programming digital I O applications and triggers in software refer to the NI DAQmx Help National Instruments Corporation 4 7 Analog Output Series User Manual Counters Figure 5 1 shows a counter on the AO Series device Source Out Gate Software Registers Figure 5 1 Counter Block Diagram Counters 0 and 1 each have two inputs source and gate one output and two software registers which are used to perform different operations Counter
45. a cannot be written to the FIFO To use FIFO regeneration the entire buffer must fit within the FIFO size The advantage of using FIFO regeneration is that it does not require communication with the main host memory when the operation is started thereby preventing any problems that may occur due to excessive bus traffic With non regeneration old data will not be repeated New data must be continually written to the buffer If the program does not write new data to the buffer at a fast enough rate to keep up with the generation the buffer will underflow and cause an error Non Buffered In hardware timed non buffered generations data is written directly to the FIFO on the device Typically hardware timed non buffered operations are used to write single samples with known time increments between them and good latency Triggering Analog output supports two different triggering actions start and pause A digital hardware trigger can initiate these actions All AO Series devices support digital triggering The AO Start Trigger Signal section and AO Pause Trigger Signal section contain information about the analog output trigger signals Refer to Chapter 10 Triggering for more information about triggers National Instruments Corporation 3 5 Analog Output Series User Manual Chapter 3 Analog Output Connecting Analog Output Signals Figure 3 2 shows how to connect loads to AO 0 and AO 1 AO EXT REF
46. a list of devices and their compatible accessories 1 Sensors and Transducers 4 DAQ Device 2 Terminal Block Accessory 5 Personal Computer 3 Cable Assembly Figure 1 1 DAQ System Setup National Instruments Corporation 1 1 Analog Output Series User Manual Chapter 1 DAQ System Overview DAQ Hardware DAQ hardware digitizes signals performs D A conversions to generate analog output signals and measures and controls digital I O signals Figure 1 2 shows the components common to all AO Series devices The following sections contain more information about specific components of the DAQ hardware PFI Analog Output Counters I O Connector Digital I O Digital Bus Bus Routing Interface RTSI DAQ STC Figure 1 2 Analog Output Block Diagram Analog output devices use the National Instruments DAQ system timing controller DAQ STC for time related functions The DAQ STC consists of the following three timing groups e Al two 24 bit two 16 bit counters not used on AO Series devices e AO three 24 bit one 16 bit counter e General purpose counter timer functions two 24 bit counters You can independently configure the groups for timing resolutions of 50 ns or 10 us With the DAQ STC you can interconnect a wide variety of internal timing signals to other internal blocks The interconnection scheme is flexible and c
47. al signal conditioning solutions for digital applications requiring high current drive If you configure a PFI or DIO line as an input do not drive the line with voltages outside of its normal operating range The PFI or DIO lines have a smaller operating range than the AI signals Treat the DAQ device as you would treat any static sensitive device Always properly ground yourself and the equipment when handling the DAQ device or connecting to it At system startup and reset the hardware sets all PFI and DIO lines to high impedance inputs The DAQ device does not drive the signal high or low Each line has a weak pull up resistor connected to it as described in the specifications of your device National Instruments Corporation 4 5 Analog Output Series User Manual Chapter 4 Digital 1 0 Connecting Digital I O Signals The DIO signals P0 lt 0 7 gt are referenced to D GND You can individually program each line as an input or output Figure 4 2 shows P0 0 3 configured for digital input and P0 lt 4 7 gt configured for digital output Digital input applications include receiving TTL signals and sensing external device states such as the state of the switch shown in the figure Digital output applications include sending TTL signals and driving external devices such as the LED shown in the figure LED N 7 AT P0 lt 4 7 gt TTL Signal 3 P0 lt 0 3 gt 45V V
48. all other internally generated clocks and timebases on the board are derived It controls the timing for the analog output and counter subsystems It is available as an output on the I O connector but you must use one or more counters to do so National Instruments Corporation 3 11 Analog Output Series User Manual Chapter 3 Analog Output The maximum allowed frequency for the MasterTimebase is 20 MHz with a minimum pulse width of 23 ns high or low There is no minimum frequency limitation The two possible sources for the MasterTimebase signal are the internal 20MHzTimebase signal or an external signal through RTSI 7 Typically the 20MHzTimebase signal is used as the MasterTimebase unless you wish to synchronize multiple devices in which case you should use RTSI 7 Refer to Chapter 8 Real Time System Integration Bus RTSI for more information on which signals are available through RTSI Figure 3 10 shows the timing requirements for MasterTimebase tp 50 ns minimum ty 23 ns minimum Figure 3 10 MasterTimebase Timing Requirements Getting Started with AO Applications in Software 3 You can use the AO Series device in the following analog output applications e Single Point Generation e Finite Generation e Continuous Generation e Waveform Generation You can perform these generations through programmed I O interrupt or DMA data transfer mechanisms Some of the a
49. alog Output and the Counter Triggering section of Chapter 5 Counters Triggering with a Digital Source Your DAQ device can generate a trigger on a digital signal You must specify a source and an edge The digital source can be any of the PFI or RTSI lt 0 6 gt signals The edge can be either the rising edge or falling edge of the digital signal A rising edge is a transition from a low logic level to a high logic level A falling edge is a high to low transition Figure 10 1 shows a falling edge trigger 5V Digital Trigger OV Falling Edge Initiates Acquisition Figure 10 1 Falling Edge Trigger National Instruments Corporation 10 1 Analog Output Series User Manual Chapter 10 Triggering You can also program your DAQ device to perform an action in response to a trigger from a digital source The action can affect e analog output generation counter behavior For more information refer to the Analog Output Triggering section of Chapter 3 Analog Output and the Counter Triggering section of Chapter 5 Counters Analog Output Series User Manual 10 2 ni com Device Specific Information This appendix includes device specific information about the following analog output devices e NI 6711 6713 e NI DAQCard 6715 e NI 6722 6723 e NI 6731 6733 NI 6711 6713 The following sections contain more information on the NI 6711 6713 Features NI 6711 6713 The NI 6711 6713 are Plug an
50. asurement Studio NI Measurement Studio Help The Measurement Studio Reference contains the Traditional NI DAQ Legacy API overview measurement concepts and function reference In Visual Studio NET select Measurement Studio Measurement Studio Reference To create an application in Visual C Visual C or Visual Basic NET follow these general steps 1 In Visual Studio NET select File New Project to launch the New Project dialog box 2 Findthe Measurement Studio folder for the language you want to create a program in 3 Choose a project type You add DAQ tasks as a part of this step ANSI C without NI Application Software The Traditional NI DAQ Legacy User Manual and the NI DAQmx Help contain API overviews The NI DAQmx Help also contains general information about measurement concepts The Traditional NI DAQ Legacy Function Reference Help and the NI DAQmx C Reference Help describe the C functions and attributes Select Start All Programs National Instruments NI DAQ and the document title for the NI DAQ API you are using NET Languages without NI Application Software With the Microsoft NET Framework version 1 1 or later you can use NI DAQmx to create applications using Visual Cft and Visual Basic NET without Measurement Studio You need Microsoft Visual Studio NET 2003 or Microsoft Visual Studio 2005 for the API documentation to be installed National Instruments Corporation xiii Analog Output S
51. atible with any CompactPCI chassis with a sub bus that does not drive the lines used by that device Even if the sub bus is capable of driving these lines the PXI device is still compatible as long as those pins on the sub bus are disabled by default and never enabled National Instruments Corporation 9 1 Analog Output Series User Manual Chapter 9 Bus Interface A Caution Damage can result if these lines are driven by the sub bus NI is not liable for any damage resulting from improper signal connections Data Transfer Methods There are three primary ways to transfer data across the PCI bus Direct Memory Access DMA Interrupt Request IRQ and Programmed I O Direct Memory Access DMA DMA is a method to transfer data between the device and computer memory without the involvement of the CPU This method makes DMA the fastest available data transfer method National Instruments uses DMA hardware and software technology to achieve high throughput rates and to increase system utilization DMA is the default method of data transfer for DAQ devices that support it Interrupt Request IRQ Programmed 1 0 IRQ transfers rely on the CPU to service data transfer requests The device notifies the CPU when it is ready to transfer data The data transfer speed is tightly coupled to the rate at which the CPU can service the interrupt requests If you are using interrupts to acquire data at a rate faster than the rate the CPU can servic
52. by t and tsh The gate signal is not required after the active edge of the source signal If you use an internal timebase clock you cannot synchronize the gate signal with the clock In this case gates applied close to a source edge take effect either on that source edge or on the next one This arrangement results in an uncertainty of one source clock period with respect to unsynchronized gating sources The output timing parameters are referenced to the signal at the source input or to one of the internally generated clock signals on your device Figure 5 2 shows the out signal referenced to the rising edge of a source signal Any out signal state changes occur within 80 ns after the rising or falling edge of the source signal For information on the internal routing available on the DAQ STC counter timers refer to Counter Parts in NI DAQmx in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Counter 0 Source Signal You can select any PFI as well as many other internal signals as the Counter 0 Source CtrOSource signal The CtrOSource signal is configured in edge detection mode on either the rising or falling edge The selected edge of the CtrOSource signal increments and decrements the counter value depending on the application the counter is performing You can export the CtrOSource signal to the PFI 8 CTR 0 SOURCE pin even if another PFI is inputting the CtrOSource signal This output is set to high impe
53. cation the outputs drop to 0 V Why is this happening and how do I prevent it The power on state for the outputs of the NI 6713 is 0 V with an accuracy of x200 mV When the computer is powered on the output values might go to 100 110 mV which are within the specifications When you run LabVIEW or the test panels in MAX the driver loads the device s calibration constants into the device and the voltage drops to zero If there is any hardware connected to the device the best way to work around this problem is to have an additional output digital or analog that will power on the device Update Rate What is update rate Update rate is the fastest rate that you can output data from the device and still achieve accurate results For example the NI 6723 has an update rate of 800 kS s for up to 32 channels The fastest rate that the output voltage can change is also limited by the device s slew rate Analog Output Series User Manual B 2 ni com Technical Support and Professional Services Visit the following sections of the National Instruments Web site at ni com for technical support and professional services National Instruments Corporation Support Online technical support resources at ni com support include the following Self Help Resources For answers and solutions visit the award winning National Instruments Web site for software drivers and updates a searchable KnowledgeBase product manuals step b
54. ces e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events Analog Output Series User Manual C 2 ni com Glossary Symbol Prefix Value n nano 10 u micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols Negative of or minus Q Ohms Percent Plus or minus Positive of or plus A Amperes the unit of electric current A D Analog to digital AC Alternating current ADC Analog to digital converter an electronic device often an integrated circuit that converts an analog voltage to a digital number Al 1 Analog input 2 Analog input channel signal AI HOLD COMP Analog input hold complete signal National Instruments Corporation G 1 Analog Output Series User Manual Glossary AO AO 0 AO 1 AO GND ASIC bipolar C C channel cm CMOS Analog output Analog channel 0 output signal Analog channel 1 output signal Analog output ground
55. d I O Connector Pin Reference Direction Signal Description PFI 7 D GND Input PFI 7 As an input this pin is a general purpose input terminal PFI 8 CTR 0 SOURCE D GND Input PFI 8 As an input this pin is a general purpose input terminal and can also be used to route signals directly to the RTSI bus This is the default input for the CtrOSource signal Output Counter 0 Source Signal As an output this pin emits the CtrOSource signal This signal reflects the actual source signal connected to Counter 0 For more information refer to Chapter 5 Counters PFI 9 CTR 0 GATE D GND Input PFI 9 As an input this pin is a general purpose input terminal and can also be used to route signals directly to the RTSI bus This is the default input for the CtrOGate signal Output Counter 0 Gate Signal As an output this pin emits the CtrOGate signal This signal reflects the actual gate signal connected to Counter 0 For more information refer to Chapter 5 Counters CTR 0 OUT D GND Input Counter 0 Output Signal As an input this pin can be used to route signals directly to the RTSI bus For more information refer to Chapter 5 Counters Output As an output this pin emits the CtrOInternalOutput signal CAL D GND Input Calibration Voltage input for external calibration For more information on using this signal refer to the AO Waveform
56. d Play analog output AO digital I O DIO and timing I O TIO devices for PCI bus computers The NI 6711 features four AO channels with 12 bit resolution e eight lines of TTL compatible DIO two 24 bit counter timers for TIO e a 68 pin AO I O connector The NI 6713 features e eight AO channels with 12 bit resolution e eight lines of TTL compatible DIO e two 24 bit counter timers for TIO e a 68 pin AO I O connector Because the NI 6711 6713 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI 6711 6713 connector pinouts refer to Chapter 2 O Connector National Instruments Corporation A 1 Analog Output Series User Manual Appendix A Device Specific Information Analog Output NI 6711 6713 The NI 6711 has four channels of voltage output at the I O connector and the NI 6713 has eight channels of voltage output at the I O connector The reference for the AO circuitry is software selectable per channel The reference can be either internal or external but the range is always bipolar This means that you can generate signals up to 10 V with internal reference selected or xEXT REF voltage with external reference selected Analog Output Series User Manual A 2 ni com Block Diagram NI 6711 6713 Figure A 1 shows a block diagram of the NI 6711 6713 Appendix A Device Specific Information I I 12 A00 1 CE AO 0 Amp 12 Bit DAC 7 Latch I
57. dance at startup National Instruments Corporation 5 8 Analog Output Series User Manual Chapter 5 Counters Figure 5 3 shows the timing requirements for the CtrOSource signal ap 4 twt y to 50 ns minimum tw 10 ns minimum Figure 5 3 CtrOSource Timing Requirements The maximum allowed frequency is 20 MHz with a minimum pulse width of 10 ns high or low There is no minimum frequency For most applications unless you select an external source the 20MHzTimebase signal or the 100kHzTimebase signal generates the CtrOSource signal Counter 0 Gate Signal You can select any PFI as well as many other internal signals like the Counter 0 Gate CtrOGate signal The CtrOGate signal is configured in edge detection or level detection mode depending on the application performed by the counter The gate signal can perform many different operations including starting and stopping the counter generating interrupts and saving the counter contents You can export the gate signal connected to Counter 0 to the PFI 9 CTR 0 GATE pin even if another PFI is inputting the CtrOGate signal This output is set to high impedance at startup Analog Output Series User Manual 5 4 ni com Chapter 5 Counters Figure 5 4 shows the timing requirements for the CtrOGate signal Rising Edge Polarity I Falling Edge Polarity ty 10 ns minimum Fi
58. e an external signal or one of several internal signals as the DO Sample Clock You can correlate digital and analog samples in time by choosing the same signal as the source of the DO Sample Clock AI Sample Clock or DI Sample Clock If the DAQ device receives a do SampleClock when the FIFO is empty the DAQ device reports an underflow error to the host software Analog Output Series User Manual 4 2 ni com Chapter 4 Digital 1 0 Using an Internal Source To use do SampleClock with an internal source without making any external connections specify the signal source and the polarity of the signal The source can be one of the following signals e AO Sample Clock e Counter 0 Out Program the DAQ device to update the DIO pins on the rising edge or falling edge of do SampleClock Using an External Source You can use a signal connected to any RTSI lt 0 6 gt pin as the source of do SampleClock You can generate samples on the rising or falling edge of do SampleClock Any PFI line that can be routed to RTSI can also be used as the clock source Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information You must ensure that the time between two active edges of the do SampleClock is not too short If the time is too short the DO waveform generation FIFO is not able to read the next sample fast enough Digital Waveform Acquisition NI 6731 6733 Only The NI 6731 6733 can acquire d
59. e All NI DAQmx documentation for Linux is installed at usr local natinst nidaqmx docs NI DAQmx Base The NI DAQmx Base Getting Started Guide describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQmx Base Documentation Getting Started Guide Getting Started with NI DAQmx Base for Linux and Mac Users describes how to install your NI DAQmx Base software your NI DAQmx Base supported DAQ device and how to confirm that your device is operating properly on your Mac Linux machine The NI DAQmx Base Readme lists which devices are supported by this version of NI DAQmx Base Select Start All Programs National Instruments NI DAQmx Base DAQmx Base Readme The NI DAQmx Base VI Reference Help contains VI reference and general information about measurement concepts In LabVIEW select Help NI DAQmx Base VI Reference Help The NI DAQmx Base C Reference Help contains C reference and general information about measurement concepts Select Start All Programs National Instruments NI DAQmx Base Documentation C Function Reference Help S Note All NI DAQmx Base documentation for Mac OS X is installed at Applications National Instruments NI DAQmx Base Documentation National Instruments Corporation Xi Analog Output Series User Manual About This Manual LabVIEW If you are a
60. e source on the AO Series device or any other device Doing so can damage the device and the computer NI is not liable for damage resulting from such a connection Analog Output Series User Manual 2 12 ni com Analog Output Figure 3 1 shows the analog output circuitry of AO Series devices AO 0 AO 1 DACO DAC1 AO FIFO m AO Data AO Sample Clock Polarity Select Reference Select Analog Output Fundamentals Figure 3 1 Analog Output Circuitry Block Diagram Analog Output Circuitry DACs Digital to analog converters DACs convert digital codes to analog voltages DAC FIFO The DAC FIFO enables analog output waveform generation It is a first in first out FIFO memory buffer between the computer and the DACs that allows you to download all the points of a waveform to your board without host computer interaction National Instruments Corporation 3 1 Analog Output Series User Manual Chapter 3 Analog Output AO Sample Clock The DAC reads a sample from the FIFO with every cycle of the AO Sample Clock signal and generates the AO voltage For more information on the AO Sample Clock signal refer to the Waveform Generation Timing Signals section Reference Selection NI 6711 6713 DAQCard 6715 and NI 6731 6733 Only Reference selection allows you to set the AO range Refer to Table 3 1 to set the range for your device Table 3 1 A
61. e the interrupts your systems may start to freeze Programmed I O is a data transfer mechanism where the user s program is responsible for transferring data Each read or write call in the program initiates the transfer of data Programmed I O is typically used in software timed on demand operations Changing Data Transfer Methods between DMA and IRQ There are a limited number of DMA channels per device refer to the specifications document for your device Each operation such as AI DIO and so on that requires a DMA channel uses that method until all of the DMA channels are used When all of the DMA channels are used you will get an error if you try to run another operation requesting a DMA channel If appropriate you can change one of the operations to use interrupts For NI DAQmx use the Data Transfer Mechanism property node For Traditional NI DAQ Legacy use the Set DAQ Device Information VI or function Analog Output Series User Manual 9 2 ni com Triggering A trigger is a signal that causes a device to perform an action such as starting an acquisition You can program your DAQ device to generate triggers on e a software command e a condition on an external digital signal You can also program your DAQ device to perform an action in response to a trigger The action can affect e analog output generation counter behavior For more information refer to the Analog Output Triggering section of Chapter 3 An
62. e these signals to manage acquisitions These signals can come from e your AO Series device e Other devices in your system by way of RTSI e user input by way of the PFI pins For a detailed description of which routes are possible on your device click the Device Routes tab in Measurement amp Automation Explorer Timing Signal Routing The DAQ STC provides a flexible interface for connecting timing signals to other devices or external circuitry Your device uses the RTSI bus to interconnect timing signals between devices and it uses the programmable function interface PFI pins on the I O connector to connect the device to external circuitry These connections are designed to enable your device to both control and be controlled by other devices and circuits You can control the following timing signals internal to the DAQ STC by an external source e AO Start Trigger Signal e AO Pause Trigger Signal e AO Sample Clock Signal e AO Sample Clock Timebase Signal e DI Sample Clock Signal e DO Sample Clock Signal e Counter 0 Source Signal National Instruments Corporation 7 1 Analog Output Series User Manual Chapter 7 Digital Routing e Counter 0 Gate Signal e Counter 0 Up Down Signal e Counter 1 Source Signal e Counter 1 Gate Signal e Counter 1 Up Down Signal Master Timebase Signal You also can control these timing signals with signals generated internally to the DAQ STC and these selections are fully software
63. equency resolution of the analog output on the AO Series device The analog frequency f you can generate is determined by the update clock frequency f and the number of samples per cycle S f The onboard 20 MHz clock that generates f can only be divided by an integer For example suppose you want to generate a sine wave at 2 kHz with 50 samples per cycle Substitute 2 kHz and 50 samples into the previous equation to get 2 kHz fa 50 So f equals 100 kHz The 20 MHz clock must be divided by 200 as shown by 20 MHZ 100 kHz 200 Suppose now you want to slightly increase or decrease the frequency of the sine wave The closest available update clock you can generate occurs using a divisor of 199 or 201 If you choose 201 f equals 99 5 kHz as the following equation shows 20 MHz 201 99 50 kHz National Instruments Corporation B 1 Analog Output Series User Manual Appendix B Troubleshooting In this case f equals 1 99 kHz according to the following equation _ 99 50 kHz 1 99 kHz 50 f The smallest frequency change that you can generate in this case is approximately 10 Hz Power On States of the Analog Output Lines I have some motors connected directly into the outputs of my NI 6713 and when I power on my computer they start running very slowly I am reading an offset of 100 110 mV If I open the test panels in Measurement amp Automation Explorer MAX or run any LabVIEW appli
64. eries User Manual About This Manual The installed documentation contains the NI DAQmx API overview measurement tasks and concepts and function reference This help is fully integrated into the Visual Studio NET documentation To view the NI DAQmx NET documentation go to Start Programs National Instruments NI DAQ NI DAQmx NET Reference Help Expand NI Measurement Studio Help NI Measurement Studio NET Class Library Reference to view the function reference Expand NI Measurement Studio Help NI Measurement Studio NET Class Library Using the Measurement Studio NET Class Libraries to view conceptual topics for using NI DAQmx with Visual Cft and Visual Basic NET To get to the same help topics from within Visual Studio go to Help Contents Select Measurement Studio from the Filtered By drop down list and follow the previous instructions Device Documentation and Specifications Training Courses The NI 6711 6713 DA QCard 6715 Specifications contains all specifications for the NI 6711 NI 6713 and NI DAQCard 6715 AO Series devices The NI 6722 6723 Specifications contains all specifications for the NI 6722 and NI 6723 AO Series devices The NI 6731 6733 Specifications contains all specifications for the NI 6731 and NI 6733 AO Series devices NI DAQmx includes the Device Document Browser which contains online documentation for supported DAQ and SCXI devices such as documents describing device pinouts features and
65. es C 1 NET languages documentation xiii NI 6711 6713 analog output A 2 block diagram A 3 features A 1 NI 6722 6723 analog output A 6 block diagram A 7 features A 6 NI 6731 6733 analog output A 8 block diagram A 9 features A 8 NI DAQCard 6715 analog output A 4 block diagram A 5 features A 4 NI support and services C 1 ni com NI DAQ documentation x device documentation browser xiv NI DAQmx Base documentation xi NI DAQmx for Linux documentation x P PFI 6 1 pinouts 68 68 pin extended AO 2 5 68 pin AO 2 1 NI 6711 figure 2 2 NI 6713 figure 2 3 NI 6722 figure 2 4 NI 6723 68 68 pin extended I O 2 5 NI 6723 68 pin AO figure 2 4 NI 6731 figure 2 2 NI 6733 figure 2 3 NI DAQCard 6715 figure 2 3 polarity selection 3 2 power on states AO lines B 2 PFI and DIO lines 4 5 programmable function interfaces 6 1 programmed I O 9 2 programming devices 1 7 programming examples NI resources C 1 R reference selection 3 2 3 3 reglitch selection 3 3 related documentation x RTSI 8 1 S signal descriptions 2 9 software NI resources C 1 support technical C 1 synchronizing multiple devices 8 4 National Instruments Corporation 1 3 Index T technical support xv C 1 terminal name equivalents 2 7 timing signal routing 7 1 device and RTSI clocks 8 3 RTSI 8 1 RTSI triggers 8 1 timing signals connecting 7 3 counter 5 2 power on state 4 5 ro
66. es PFI Outputs You can also individually enable each PFI pin to output a specific internal timing signal For example if you need the Counter 0 Source signal as an output on the I O connector software can turn on the output driver for the PFI 8 CTR 0 SRC pin This signal however cannot be output on any other PFI pin Not all timing signals can be output PFI pins are labeled with the timing signal that can be output on it For example PFI 8 is labeled PFI 8 CTR 0 Source The following timing signals can be output on PFI pins e AO Start Trigger Signal e AO Sample Clock Signal e Counter 0 Source Signal e Counter 0 Gate Signal e Counter 1 Source Signal e Counter 1 Gate Signal UN Caution Do not drive a PFI signal externally when it is configured as an output For more information about PFI lines refer to the Power On States section of Chapter 4 Digital I O For a list of the PFI pins and the signals they can output refer to the O Connector Signal Descriptions section in Chapter 2 I O Connector Analog Output Series User Manual 6 2 ni com Digital Routing The digital routing circuitry manages the flow of data between the bus interface and the acquisition subsystems AO circuitry digital I O and the counters The digital routing circuitry uses FIFOs if present in each subsystem to ensure efficient data movement The digital routing circuitry also routes timing and control signals The acquisition subsystems us
67. escribes how to install your NI DAQmx for Windows software how to install your NI DAQmx supported DAQ device and how to confirm that your device is operating properly Select Start All Programs National Instruments NI DAQ DAQ Getting Started Guide The NI DAQ Readme lists which devices are supported by this version of NI DAQ Select Start All Programs National Instruments NI DAQ NI DAQ Readme The NI DAQmx Help contains general information about measurement concepts key NI DAQmx concepts and common applications that are applicable to all programming environments Select Start All Programs National Instruments NI DAQ NI DA Qmx Help The Traditional NI DAQ Legacy User Manual contains an API overview and general information about measurement concepts Select Start All Programs National Instruments NI DAQ Traditional NI DAQ Legacy User Manual NI DAOmx for Linux The DAQ Getting Started Guide describes how to install your NI DAQmx supported DAQ device and confirm that your device is operating properly Analog Output Series User Manual X ni com About This Manual The NI DAQ Readme for Linux lists supported devices and includes software installation instructions frequently asked questions and known issues The C Function Reference Help describes functions and attributes The NI DAQmx for Linux Configuration Guide provides configuration instructions templates and instructions for using test panels S Not
68. functionality is built into the DAQ STC For more information on the DAQ STC refer to the DAQ STC section of Chapter 1 DAQ System Overview Counter Triggering Counters support two different triggering actions start and pause Only digital triggers can initiate these actions For more information on digital triggers refer to the Triggering with a Digital Source section of Chapter 10 Triggering Start Trigger A start trigger begins a finite or continuous pulse generation When a continuous generation is initiated the pulses continue to generate until you stop the operation in software The specified number of pulses are generated for finite generations unless the retriggerable attribute is used The retriggerable attribute causes the generation to restart on a subsequent start trigger National Instruments Corporation 5 1 Analog Output Series User Manual Chapter 5 Counters Pause Trigger You can use pause triggers in edge counting and continuous pulse generation applications For edge counting acquisitions the counter stops counting edges while the external trigger signal is low and resumes when the signal goes high or vice versa For continuous pulse generations the counter stops generating pulses while the external trigger signal is low and resumes when the signal goes high or vice versa Counter Timing Signals The following sections contain information on counter timing signals Counter Timing Summary Figure
69. gure 5 4 Ctr0Gate Timing Requirements Counter 0 Internal Output Signal The Counter 0 Internal Output CtrOInternalOutput signal is the output of Counter 0 This signal reflects the terminal count TC of Counter 0 The counter generates a terminal count when its count value rolls over The two software selectable output options are pulse on TC and toggle output polarity on TC The output polarity is software selectable for both options Figure 5 5 shows the behavior of the CtrOInternalOutput signal CtrOSource CtrOInternalOutput Pulse on TC CtrOInternalOutput Toggle Output on TC 1 TC 3 Figure 5 5 CtrOInternalOutput Signal Behavior You can use CtrOInternalOutput in the following applications e In pulse generation mode the counter drives CtrOInternalOutput with the generated pulses To enable this behavior software configures the counter to toggle CtrOInternalOutput on TC e Counter 0 and 1 can be daisy chained together by routing CtrOInternalOutput to Ctrl Gate National Instruments Corporation 5 5 Analog Output Series User Manual Chapter 5 Counters e CtrOInternalOutput can drive any of the RTSI lt 0 6 gt signals to control the behavior of other devices in the system e CtrOInternalOutput drives the CTR 0 OUT pin to trigger or control external devices e CtrOInternalOutput can drive other internal signals Refer to Device Routing in
70. igital waveforms This behavior is also referred to as correlated digital I O because there is no dedicated clock source for the digital operation Refer to the DI Sample Clock Signal NI 6731 6733 Only section for a list of possible sources The DI waveform acquisition FIFO stores the digital samples The NI 6731 6733 can use DMA transfers to move data from the DI waveform acquisition FIFO to system memory The DAQ device samples the DIO lines on each rising or falling edge of a clock signal di SampleClock For more information on DMA transfers refer to the Direct Memory Access DMA section of Chapter 9 Bus Interface You can configure each DIO line to be an output a static input or a digital waveform acquisition input National Instruments Corporation 4 3 Analog Output Series User Manual Chapter 4 Digital 1 0 DI Sample Clock Signal NI 6731 6733 Only Use the DI Sample Clock di SampleClock signal to sample the P0 lt 0 7 gt terminals and store the result in the DI waveform acquisition FIFO Because there is no dedicated internal clock for timed digital operations you can use an external signal or one of several internal signals as the DI Sample Clock You can correlate digital and analog samples in time by choosing the same signal as the source of the DI Sample Clock AI Sample Clock or DO Sample Clock If the DAQ device receives a di SampleClock when the FIFO is full the DAQ device reports an overflow error to the
71. ignals in software refer to the NI DAQmx Help Analog Output Series User Manual 7 4 ni com Real Time System Integration Bus RTSI NI DAQ devices use the Real Time System Integration RTSI bus to easily synchronize several measurement functions to a common trigger or timing event In a PCI system the RTSI bus consists of the RTSI bus interface and aribbon cable The bus can route timing and trigger signals between several functions on as many as five DAQ devices in the computer In a PXI system the RTSI bus consists of the RTSI bus interface and the PXI trigger signals on the PXI backplane This bus can route timing and trigger signals between several functions on as many as seven DAQ devices in the system Refer to the KnowledgeBase document RTSI Connector Pinout for more information To access this document go to ni com info and enter the info code rdrtcp S Note The NI DAQCard 6715 does not use the RTSI bus RTSI Triggers The seven RTSI trigger lines on the RTSI bus provide a flexible interconnection scheme for devices sharing the RTSI bus These bidirectional lines can drive or receive any of the timing and triggering signals shown below directly to or from the trigger bus The RTSI trigger lines on PXI devices connect to other devices through the PXI bus on the PXI backplane RTSI lt 0 5 gt connect to PXI Trigger lt 0 5 gt respectively The RTSI Clock is connected to PXI Trigger 7 In PXI RTSI 6 connects
72. ility to change hardware platforms and operating systems with little or no change to software code MITE and DAQ PnP PCI and PXI AO Series devices use the MITE application specific integrated circuit ASIC as a bus master interface to the PCI bus PCI and PXI AO Series devices are inherently Plug and Play PnP compatible On all devices the operating system automatically assigns the base address of the device Using PXI with CompactPCl Using PXI compatible products with standard CompactPCI products is an important feature provided by PXI Hardware Specification Revision 2 1 If you use a PXI compatible plug in module in a standard CompactPCI chassis you cannot use PXI specific functions but you can still use the basic plug in device functions For example the RTSI bus on a PXI AO Series device is available in a PXI chassis but not in a CompactPCI chassis The CompactPCI specification permits vendors to develop sub buses that coexist with the basic PCI interface on the CompactPCI bus Compatible operation is not guaranteed between CompactPCI devices with different sub buses nor between CompactPCI devices with sub buses and PXI The standard implementation for CompactPCI does not include these sub buses The PXI AO Series device works in any standard CompactPCI chassis adhering to the PICMG CompactPCI 2 0 R3 0 core specification PXI specific features are implemented on the J2 connector of the CompactPCI bus The PXI device is comp
73. in The source can also be one of several other internal signals on your DAQ device Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Also specify whether the samples are paused when ao PauseTrigger is at a logic high or low level AO Sample Clock Signal You can use the AO Sample Clock ao SampleClock signal to initiate AO samples Each sample updates the outputs of all of the DACs The source of the ao SampleClock signal can be internal or external You can specify whether the DAC update begins on the rising edge or falling edge of the ao SampleClock signal Analog Output Series User Manual 3 8 ni com Chapter 3 Analog Output Using an Internal Source By default ao SampleClock is created internally by dividing down the ao SampleClockTimebase For more information refer to the AO Sample Clock Timebase Signal section Several other internal signals can be routed to the sample clock Refer to Device Routing in MAX in the NI DAQmx Help or the LabVIEW Help in version 8 0 for more information Using an External Source You can use a signal connected to any PFI or RTSI lt 0 6 gt pin as the source of ao SampleClock Figure 3 6 shows the timing requirements of the ao SampleClock source Rising Edge Polarity Falling Edge Polarity ty 10 ns minimum Figure 3 6 ao SampleClock Timing Requirements Outputting the AO Sample Clock Signal
74. ions contain more information on the NI 6731 6733 Features NI 6731 6733 The NI 6731 6733 are Plug and Play analog output AO digital I O DIO and timing I O TIO devices for PCI bus computers The NI 6731 features e four AO channels with 16 bit resolution e eight lines of TTL compatible DIO two 24 bit counter timers for TIO e a68 pin AO I O connector The NI 6733 features e eight AO channels with 16 bit resolution e eight lines of TTL compatible DIO e two 24 bit counter timers for TIO e a68 pin AO I O connector Because the NI 6731 6733 have no DIP switches jumpers or potentiometers they are easily software configured and calibrated For the NI 6731 6733 connector pinouts refer to Chapter 2 O Connector Analog Output NI 6731 6733 The NI 6731 has four channels of voltage output at the I O connector and the NI 6733 has eight channels of voltage output at the I O connector The reference for the AO circuitry is software selectable per channel The reference can be either internal or external but the range is always bipolar This means that you can generate signals up to 10 V with internal reference selected or xEXT REF voltage with external reference selected Analog Output Series User Manual A 8 ni com Appendix A Device Specific Information Block Diagram NI 6731 6733 Figure A 4 shows a block diagram of the NI 6731 6733 o gt t BO sO Data f
75. l Calibration Procedures at ni com calibration Cables and Accessories NI offers a variety of products to use with Analog Output Series devices including BNC accessories Connector blocks with screw terminals I O connector cables RTSI bus cables Low channel count digital signal conditioning modules devices and accessories For more specific information about these products refer to ni com The following sections contain information on how to select accessories for your AO Series device Using Accessories with Devices Table 1 1 Accessories and Cables for Analog Output Devices Accessories Device Cables Terminal Blocks NI 6711 6713 SH68 68 EP BNC 2110 CB 68LP CB 68LPR SCB 68 TB 68 NI DAQCard 6715 SHC68 68 EP BNC 2110 SHC68U 68 EP CB 68LP CB 68LPR SCB 68 TB 68 Analog Output Series User Manual 1 4 ni com Chapter 1 DAQ System Overview Table 1 1 Accessories and Cables for Analog Output Devices Continued Accessories Device Cables Terminal Blocks NI 6722 SH68 C68 S shielded RC68 68 unshielded BNC 2110 CB 68LP CB 68LPR SCB 68 TB 68 NI 6723 AO 0 7 amp DIGITAL connector SH68 C68 S shielded BNC 2110 CB 68LP CB 68LPR SCB 68 TB 68 NI 6723 AO 8 31 connector SH68 C68 S shielded BNC 2115 CB 68LP CB 68LPR SCB 68 TB 68 NI 6731 6733 SH68 68 EP BNC 2110 CB 68LP CB 68LPR SCB 68 TB 68
76. mer D D A DAC DAQ DAQ device DAQ STC data acquisition DAQ Glossary A feature that allows you to clock digital I O on the same clock as analog I O A circuit that counts external pulses or clock pulses timing Digital to analog Digital to analog converter an electronic device often an integrated circuit that converts a digital number into a corresponding analog voltage or current See data acquisition DAQ A device that acquires or generates data and can contain multiple channels and conversion devices DAQ devices include plug in devices PCMCIA cards and DAQPad devices which connect to a computer USB or 1394 FireWire port SCXI modules are considered DAQ devices Data acquisition system timing controller an application specific integrated circuit ASIC for the system timing requirements of a general A D and D A system 1 Acquiring and measuring analog or digital electrical signals from sensors transducers and test probes or fixtures 2 Generating analog or digital electrical signals dB Decibel the unit for expressing a logarithmic measure of the ratio of two signal levels dB 20log10 V1 V2 for signals in volts DC Direct current although the term speaks of current many different types of DC measurements are made including DC Voltage DC current and DC power device 1 An instrument or controller you can access as a single entity that controls or monitors real world I O
77. mpanies Members of the National Instruments Alliance Partner Program are business entities independent from National Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products refer to the appropriate location Help Patents in your software the patents txt file on your CD or ni com patents WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTI
78. n 2 5 Analog Output Series User Manual Chapter 2 1 0 Connector AO 8 31 Connector AO 0 7 amp DIGITAL Connector AO GND 34 68 NC NC 33 67 AO GND AO GND 32 66 AO GND AO GND 31 65 AO 7 AO 6 30 64 AO GND AO GND 29 63 AO GND AO 5 28 62 NC AO GND 27 61 AO GND AO GND 26 60 AO 4 AO3 25 59 AO GND AO GND 24 58 AO GND AO GND 23 57 AO 2 AOO 22 56 AO GND AO 1 21 55 AO GND CAL 20 54 AO GND P0 4 19 53 D GND D GND 18 52 P0 0 RONI 17 51 P0 5 P0 6 16 50 D GND D GND 15 49 P0 2 45V 14 48 P0 7 D GND 13 47 P0 3 D GND 12 46 NC RENO 11 45 EXT STROBE PFI 1 10 44 D GND D GND 9 43 PFI 2 5 V 8 42 PFI 3 CTR 1 SOURCE D GND 7 41 PFI 4 CTR 1 GATE PFI 5 AO SAMP CLK 6 40 CTR 1 OUT PFI 6 AO START TRIG 5 39 D GND D GND 4 38 BEIA PFI 9 CTR 0 GATE 3 37 PFI 8 CTR 0 SOURCE CTR 0 OUT 2 36 D GND FREQ OUT 1 35 D GND NC No Connect AO GND 34 68 AO 8 AO 9 33 67 AO GND AO 10 32 66 AO GND AO GND 31 65 AO 11 AO 12 30 64 AO GND AO 13 29 63 AO GND AO GND 28 62 AO 14 AO 15 27 61 AO GND AO 16 26 60 AO GND AO GND 25 59 AO 17 AO 18 24 58 AO GND AO 19 23 57 AO GND NC 22 56 NC AO GND 21 55 AO 20 AO 21 20 54 AO GND AO 22 19 53 AO G
79. nality of a classic stand alone instrument 2 A LabVIEW software module VI which consists of a front panel user interface and a block diagram program Volts input high Volts input low Volts in Volts output high Volts output low Volts root mean square See channel Analog Output Series User Manual Index A accessories 1 4 devices 1 4 field wiring considerations 1 6 analog output circuitry 3 1 connecting analog output signals 3 6 minimizing glitches 3 3 NI 6711 6713 A 2 NI 6722 6723 A 6 NI 6731 6733 A 8 NI DAQCard 6715 A 4 analog output triggering AO Pause Trigger 3 8 AO Start Trigger 3 7 ANSI C documentation xiii AO applications 3 12 block diagram NI 6711 6713 A 3 NI 6722 6723 A 7 NI 6731 6733 A 9 NI DAQCard 6715 A 5 C cables 1 4 custom 1 6 devices 1 4 field wiring considerations 1 6 calculating frequency resolution B 1 calibration 1 3 calibration certificate NI resources C 2 conventions ix National Instruments Corporation l 1 correlated DIO DI Sample Clock 4 4 digital waveform acquisition 4 3 digital waveform generation 4 2 DO Sample Clock 4 2 counter applications 5 10 counter timing signals Counter 0 Gate 5 4 Counter 0 Internal Output 5 5 Counter 0 Source 5 3 Counter 0 Up Down 5 6 Counter 1 Gate 5 7 Counter 1 Internal Output 5 8 Counter 1 Source 5 7 Counter 1 Up Down 5 9 counter timing summary 5 2 Frequency Output 5 9
80. nected to Counter 1 For more information refer to Chapter 5 Counters PFI 4 CTR 1 GATE D GND Input PFI 4 As an input this pin is a general purpose input terminal This is the default input for the Ctr1Gate signal Output Counter 1 Gate Signal As an output this pin emits the selected Ctr1Gate signal This signal reflects the actual gate signal connected to Counter 1 For more information refer to Chapter 5 Counters CTR 1 OUT D GND Output Counter 1 Output Signal This pin emits the Ctr1InternalOutput signal For more information refer to Chapter 5 Counters PFI 5 AO SAMP D GND Input PFI 5 As an input this pin is a general purpose CLK input terminal Output AO Sample Clock Signal As an output this pin emits the ao SampleClock signal A high to low transition of this signal indicates a new sample is being generated For more information refer to Chapter 3 Analog Output PFI 6 AO START D GND Input PFI 6 As an input this pin is a general purpose TRIG input terminal This is the default input for the ao StartTrigger signal Output AO Start Trigger Signal As an output this pin emits the ao StartTrigger signal A low to high transition of this signal indicates the start of a generation For more information refer to Chapter 3 Analog Output Analog Output Series User Manual 2 10 ni com Chapter 2 VO Connector Table 2 2 1 0 Connector Signal Descriptions Continue
81. nector For more information on the connectors used for DAQ devices refer to the KnowledgeBase document Specifications and Manufacturers for Board Mating Connectors To access this document go to ni com info and enter the info code rdsmbm Field Wiring Considerations The following recommendations apply for all signal connections to the AO Series device Analog Output Series User Manual Separate the signal lines of the AO Series device from high current or high voltage lines These lines can induce currents in or voltages on the signal lines of the AO Series device if they run in close parallel paths To reduce the magnetic coupling between lines separate them by a reasonable distance if they run in parallel or run the lines at right angles to each other Do not run signal lines through conduits that also contain power lines 1 6 ni com Chapter 1 DAQ System Overview e Protect signal lines from magnetic fields caused by electric motors welding equipment breakers or transformers by running them through special metal conduits Refer to the NI Developer Zone document Field Wiring and Noise Considerations for Analog Signals for more information To access this document go to ni com info and enter the info code rdfwin Programming Devices in Software National Instruments measurement devices are packaged with NI DAQ driver software an extensive library of functions and VIs you can call from your application software
82. new user use the Getting Started with LabVIEW manual to familiarize yourself with the LabVIEW graphical programming environment and the basic LabVIEW features you use to build data acquisition and instrument control applications Open the Getting Started with LabVIEW manual by selecting Start All Programs National Instruments LabVIEW LabVIEW Manuals or by navigating to the labview manuals directory and opening LV_Getting_Started pdf Use the LabVIEW Help available by selecting Help Search the LabVIEW Help in LabVIEW to access information about LabVIEW programming concepts step by step instructions for using LabVIEW and reference information about LabVIEW VIs functions palettes menus and tools Refer to the following locations on the Contents tab of the LabVIEW Help for information about NI DAQmx Getting Started Getting Started with DAQ Includes overview information and a tutorial to learn how to take an NI DAQmx measurement in LabVIEW using the DAQ Assistant VI and Function Reference Measurement I O VIs and Functions Describes the LabVIEW NI DAQmx VIs and properties e Taking Measurements Contains the conceptual and how to information you need to acquire and analyze measurement data in LabVIEW including common measurements measurement fundamentals NI DAQmx key concepts and device considerations LabWindows CVI The Data Acquisition book of the LabWindows CVI Help contains measurement concepts for NI DAQmx
83. nter the info code feedback 2003 2007 National Instruments Corporation All rights reserved Important Information Warranty The NI 6711 6713 NI DAQCard 6715 NI 6722 6723 and NI 6731 6733 are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is
84. ompletely software configurable The DAQ STC offers PFI lines to import external timing and trigger signals or to export internally generated clocks and triggers The DAQ STC also supports buffered operations such as buffered waveform acquisition Analog Output Series User Manual 1 2 ni com Chapter 1 DAQ System Overview buffered waveform generation and buffered period measurement It also supports numerous non buffered operations such as single pulse or pulse train generation digital input and digital output Calibration Circuitry Calibration is the process of making adjustments to a measurement device to reduce errors associated with measurements Without calibration the measurement results of your device will drift over time and temperature Calibration adjusts for these changes to improve measurement accuracy and ensure that your product meets its required specifications DAQ devices have high precision analog circuits that must be adjusted to obtain optimum accuracy in your measurements Calibration determines what adjustments these analog circuits should make to the device measurements During calibration the value of a known high precision measurement source is compared to the value your device acquires or generates The adjustment values needed to minimize the difference between the known and measured values are stored in the EEPROM of the device as calibration constants Before performing a measurement these constants are
85. on at the adjusted range Reglitch Selection NI 6711 6713 Only In normal operation a DAC output glitches whenever it is updated with a new value The glitch energy differs from code to code and appears as distortion in the frequency spectrum Each AO channel contains a reglitch circuit that generates uniform glitch energy at every code rather than large glitches at the major code transitions This uniform glitch energy appears as a multiple of the update rate in the frequency spectrum This reglitch circuit does not eliminate the glitches it only makes them more uniform in size By default reglitching is disabled for all channels however you can use NI DAQ to independently enable reglitching for each channel Minimizing Glitches on the Output Signal When you use a DAC to generate a waveform you may observe glitches on the output signal These glitches are normal when a DAC switches from one voltage to another it produces glitches due to released charges The largest glitches occur when the most significant bit MSB of the DAC code switches You can build a lowpass deglitching filter to remove some of these glitches depending on the frequency and nature of the output signal Visit ni com support for more information on minimizing glitches AO Data Generation Methods When performing an analog output operation there are several different data generation methods available You can either perform software timed or hardware timed gene
86. operation You can find view and or print the documents for each device using the Device Document Browser at any time by inserting the CD After installing the Device Document Browser device documents are accessible from Start All Programs National Instruments NI DA Q Browse Device Documentation If you need more help getting started developing an application with NI products NI offers training courses To enroll in a course or obtain a detailed course outline refer to ni com training Analog Output Series User Manual xiv ni com About This Manual Technical Support on the Web For additional support refer to ni com support or zone ni com S Note You can download these documents at ni com manuals DAQ specifications and some DAQ manuals are available as PDFs You must have Adobe Acrobat Reader with Search and Accessibility 5 0 5 or later installed to view the PDFs Refer to the Adobe Systems Incorporated Web site at www adobe com to download Acrobat Reader Refer to the National Instruments Product Manuals Library at ni com manuals for updated documentation resources O National Instruments Corporation XV Analog Output Series User Manual DAQ System Overview Figure 1 1 shows a typical DAQ system setup which includes transducers signal conditioning cables that connect the various devices to the accessories the analog output device and the programming software Refer to the Using Accessories with Devices section for
87. pleClockTimebase gt CtriSource i m PXI Trigger 7 Ciri Gate K 20MHzTimebase Switch NA gt MasterTimebase Figure 8 2 PXI RTSI Bus Signal Connection Refer to the Timing Signal Routing section of Chapter 7 Digital Routing for a description of the signals shown in Figure 8 1 and Figure 8 2 S Note In NI DAQmx some additional timing signals not shown in the figures can be routed to RTSI indirectly Click the Device Routes tab in Measurement amp Automation Explorer for more information Device and RTSI Clocks Many AO Series device functions require a frequency timebase to generate the necessary timing signals for controlling DAC updates or general purpose signals at the I O connector This timebase is also called the Master Timebase or Onboard Clock For more information refer to the Master Timebase Signal section of Chapter 3 Analog Output The AO Series device can use either its internal 20MHzTimebase signal or a timebase received over the RTSI bus The timebase can only be routed to or received from RTSI 7 or the RTSI clock The device uses this clock source whether local or from the RTSI bus as the primary frequency National Instruments Corporation 8 3 Analog Output Series User Manual Chapter 8 Real Time System Integration Bus RTS source If you configure the device to use the internal timebase you also can program the device to drive its internal
88. ples of static DI lines and updates of DO lines are software timed P0 6 and P0 7 also can control the up down input of general purpose Counters 0 and 1 respectively The up down control signals Counter 0 Up Down and Counter Up Down are input only and do not affect the operation of the DIO lines For more information refer to Chapter 5 Counters Digital Waveform Generation NI 6731 6733 Only The NI 6731 6733 can generate digital waveforms This behavior is also referred to as correlated digital I O because there is no dedicated clock source for the digital operation Refer to the DO Sample Clock Signal NI 6731 6733 Only section for a list of possible sources The DO waveform generation FIFO stores the digital samples The NI 6731 6733 can use DMA transfers to move data from the system memory to the DO waveform generation FIFO The DAQ device moves samples from the FIFO to the DIO terminals on each rising or falling edge of a clock signal do SampleClock For more information on DMA transfers refer to the Direct Memory Access DMA section of Chapter 9 Bus Interface You can configure each DIO line to be an input a static output or a digital waveform generation output DO Sample Clock Signal NI 6731 6733 Only Use the DO Sample Clock do SampleClock signal to update the DO pins with the next sample from the DO waveform generation FIFO Because there is no dedicated internal clock for timed digital operations you can us
89. points A device often is connected to a host computer through some type of communication network 2 See also DAQ device and measurement device DIO Digital input output National Instruments Corporation G 3 Analog Output Series User Manual Glossary DMA DNL driver E EEPROM ESD FPGA I O INL Direct memory access a method by which data can be transferred to from computer memory from to a device or memory on the bus while the processor does something else DMA is the fastest method of transferring data to from computer memory Differential nonlinearity a measure in least significant bit of the worst case deviation of code widths from their ideal value of 1 LSB Software unique to the device or type of device and includes the set of commands the device accepts Electrically erasable programmable read only memory ROM that can be erased with an electrical signal and reprogrammed Electrostatic Discharge a high voltage low current discharge of static electricity that can damage sensitive electronic components Electrostatic discharge voltage can easily range from 1 000 to 10 000 V Field programmable gate array Hertz Input output the transfer of data to from a computer system involving communications channels operator interface devices and or data acquisition and control interfaces Integral nonlinearity for an ADC deviation of codes of the actual transfer function from a straight line
90. pplications also use start triggers and pause triggers Note For more information about programming analog output applications and triggers in software refer to the NI DAQmx Help Analog Output Series User Manual 3 12 ni com Digital 1 0 AO Series devices contain eight lines of bidirectional DIO signals that support the following features e Direction and function of each terminal individually controllable e High speed digital waveform generation NI 6731 6733 only e High speed digital waveform acquisition NI 6731 6733 only Figure 4 1 shows the circuitry of one DIO line DO Waveform Generation FIFO DO Sample Clock NEN e Weak Pull Up Static DO Buffer PO x I O Protection DO x Direction Control Static DI lt DI Waveform Measurement FIFO DI Sample Clock Figure 4 1 AO Series Digital 1 0 Block Diagram The DIO terminals are named P0 0 7 on the I O connector The voltage input and output levels and the current drive levels of the DIO lines are listed in the specifications of your device National Instruments Corporation 4 1 Analog Output Series User Manual Chapter 4 Digital 1 0 Static DIO Each DIO line can be used as a static DI or DO line You can use static DIO lines to monitor or control digital signals Each DIO can be individually configured as a digital input DI or digital output DO All sam
91. r commercial locations All National Instruments NI products are FCC Class A products Depending on where it is operated this Class A product could be subject to restrictions in the FCC rules In Canada the Department of Communications DOC of Industry Canada regulates wireless interference in much the same way Digital electronics emit weak signals during normal operation that can affect radio television or other wireless products All Class A products display a simple warning statement of one paragraph in length regarding interference and undesired operation The FCC rules have restrictions regarding the locations where FCC Class A products can be operated Consult the FCC Web site at www fcc gov for more information FCC DOC Warnings This equipment generates and uses radio frequency energy and if not installed and used in strict accordance with the instructions in this manual and the CE marking Declaration of Conformity may cause interference to radio and television reception Classification requirements are the same for the Federal Communications Commission FCC and the Canadian Department of Communications DOC Changes or modifications not expressly approved by NI could void the user s authority to operate the equipment under the FCC Rules Class A Federal Communications Commission This equipment has been tested and found to comply with the limits for a Class A digital device pursuant to part 15 of the FCC Rules
92. rations Hardware timed generations can be non buffered or buffered National Instruments Corporation 3 8 Analog Output Series User Manual Chapter 3 Analog Output Software Timed Generations With a software timed generation software controls the rate at which data is generated Software sends a separate command to the hardware to initiate each DAC conversion In NI DAQmx software timed generations are referred to as On Demand timing Software timed generations are also referred to as immediate or static operations They are typically used for writing a single value out such as a constant DC voltage Hardware Timed Generations With a hardware timed generation a digital hardware signal controls the rate of the generation This signal can be generated internally on your device or provided externally Hardware timed generations have several advantages over software timed generations The time between samples can be much shorter The timing between samples can be deterministic e Hardware timed generations can use hardware triggering For more information refer to Chapter 10 Triggering Hardware timed operations can be buffered or non buffered A buffer is a temporary storage in computer memory for acquired or to be generated samples Buffered In a buffered generation data is moved from a PC buffer to the DAQ device s onboard FIFO using DMA or interrupts before it is written to the DACs one sample at a time Buffered
93. read out of the EEPROM and are used to adjust the calibration hardware on the device NI DAQ determines when this is necessary and does it automatically If you are not using NI DAQ you must load these values yourself You can calibrate AO Series devices in the following two ways Internal or Self Calibration Self calibration is a process to adjust the device relative to a highly accurate and stable internal reference on the device Self calibration is similar to the autocalibration or autozero found on some instruments You should perform a self calibration whenever environmental conditions such as ambient temperature change significantly To perform self calibration use the self calibrate function or VI that is included with your driver software Self calibration requires no external connections External Calibration External calibration is a process to adjust the device relative to a traceable high precision calibration standard The accuracy specifications of your device change depending on how long it has been since your last external calibration National Instruments recommends that you calibrate your device at least as often as the intervals listed in the accuracy specifications National Instruments Corporation 1 3 Analog Output Series User Manual Chapter 1 DAQ System Overview For a detailed calibration procedure for AO Series devices refer to the AO Waveform Calibration Procedure for NI DAQmx document by selecting Manua
94. recautions to avoid electrical shock When symbol is marked on a product it denotes a component that may be hot Touching this component may result in bodily injury Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from the keyboard sections of code programming examples and syntax examples National Instruments Corporation ix Analog Output Series User Manual About This Manual Platform This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions operations variables filenames and extensions Text in this font denotes a specific platform and indicates that the text following it applies only to that platform Related Documentation Each application software package and driver includes information about writing applications for taking measurements and controlling measurement devices The following references to documents assume you have NI DAQ 7 x or later and where applicable version 7 0 or later of the NI application software NI DAQ for Windows The DAQ Getting Started Guide d
95. s or service failures caused by owner s failure to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks National Instruments NI ni com and LabVIEW are trademarks of National Instruments Corporation Refer to the Terms of Use section on ni com legal for more information about National Instruments trademarks FireWire is the registered trademark of Apple Computer Inc Other product and company names mentioned herein are trademarks or trade names of their respective co
96. se Signal eee techn tee ite o I ess 3 11 Getting Started with AO Applications in Software sess 3 12 Chapter 4 Digital 1 0 Static DI LO edge e nene ire eei E HEUTE ORE 4 2 Digital Waveform Generation NI 6731 6733 Only see 4 2 DO Sample Clock Signal NI 6731 6733 Only eee 4 2 Using an Internal Source esee 4 3 Using an External Source esee 4 3 Digital Waveform Acquisition NI 6731 6733 Only see 4 3 DI Sample Clock Signal NI 6731 6733 Only sese 4 4 Using an Internal Source esee 4 4 Using an External Source sscsssrrersresrsenersenenensseenerrerednsrenenne 4 4 ignorem REDE SED 4 5 Power On States eee d ete RH More e E eS 4 5 Connecting Digital T O Signals sess eene en eene 4 6 Getting Started with DIO Applications in Software eee eee eseeeseeseeeeeseeeseeseees 4 7 Analog Output Series User Manual vi ni com Chapter 5 Counters Counter Triggering cinici nannti Start TrIgeer saco eei Dien Pa se Trio ger etin eee dalede Counter Timing Signals sees Counter Timing Summary s Counter 0 Source Signal Counter 0 Gate Signal sss Counter 0 Internal Output Signal CTR 0 OUT Pin oo eee Counter 0 Up Down Signal
97. sic are in the following two directories NI DAQ Examples Visual Basic with Measurement Studio directory contains a link to the ActiveX control examples for use with Measurement Studio NI DAQ Examples VBasic directory contains the examples not associated with Measurement Studio NI DAQmx examples for ANSI C are in the NI DAQ Examples DAQmx ANSI C Dev directory e Traditional NI DAQ Legacy examples for ANSI C are in the NI DAQ Examples Visualc directory For additional examples refer to zone ni com Analog Output Series User Manual 1 8 ni com 1 0 Connector This chapter contains information about the AO Series I O connectors NS Note Some hardware accessories may not yet reflect the NI DAQmx terminal names If you are using an AO Series device in Traditional NI DAQ Legacy refer to Table 2 1 for the Traditional NI DAQ Legacy signal names 68 Pin AO I O Connector Pinouts Figure 2 1 Figure 2 2 and Figure 2 3 show the pinouts of 68 pin AO Series devices O National Instruments Corporation 2 1 Analog Output Series User Manual Chapter 2 1 0 Connector AO GND 34 68 NC NC 33 67 AO GND AO GND 32 66 AO GND AO GND 31 65 NC NC 30 64 AO GND AO GND 29 63 AO GND NC 28 62 NC AO GND 27 61 AO GND AO GND 26 60 NC AO 3 25 59 AO GND AO GND 24 58 AO GND AO GND 23
98. urement devices The advantages of NI DAQmx over earlier versions of NI DAQ include the DAQ Assistant for configuring channels and measurement tasks for your device for use in LabVIEW LabWindows CVI and Measurement Studio increased performance such as faster single point analog I O and a simpler API for creating DAQ applications using fewer functions and VIs than earlier versions of NI DAQ An undesirable electrical signal Noise comes from external sources such as the AC power line motors generators transformers fluorescent lights CRT displays computers electrical storms welders radio transmitters and internal sources such as semiconductors resistors and capacitors Noise corrupts signals you are trying to send or receive Nonreferenced single ended mode all measurements are made with respect to a common NRSE measurement system reference but the voltage at this reference can vary with respect to the measurement system ground Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It offers a theoretical maximum transfer rate of 132 Mbytes s Pull down Programmable function interface Programmable gain instrumentation amplifier See channel 1 A communications connection on a computer or a remote controller 2 A digital port consisting of four or eight lines of digital input and or output Parts per million Pull up Analog O
99. uting 7 1 waveform generation 3 6 training xiv training and certification NI resources C 1 triggering about 10 1 AO Pause Trigger 3 8 AO Start Trigger 3 7 digital source 10 1 troubleshooting calculating frequency resolution B 1 NI resources C 1 power on states of the analog output lines B 2 update rate B 2 U update rate B 2 W waveform generation timing signals AO Pause Trigger 3 8 AO Sample Clock 3 8 AO Sample Clock Timebase 3 11 AO Start Trigger 3 7 Master Timebase 3 11 waveform generation timing summary 3 6 Web resources C 1 Analog Output Series User Manual
100. utput Series User Manual G 6 ni com PXI rms RSE RTSI S s scan interval scan rate SCXI sensor settling time signal conditioning National Instruments Corporation G 7 Glossary PCI eXtensions for Instrumentation PXI is an open specification that builds off the CompactPCI specification by adding instrumentation specific features Root mean square Referenced single ended mode all measurements are made with respect to a common reference measurement system or a ground Also called a grounded measurement system Real Time System Integration the National Instruments timing bus that connects DAQ devices directly by means of connectors on top of the devices for precise synchronization of functions Seconds Samples Samples per second used to express the rate at which a digitizer or D A converter or DAQ device samples an analog signal Controls how often a scan is initialized is regulated by the AI SAMP signal Reciprocal of the scan interval Signal Conditioning eXtensions for Instrumentation the National Instruments product line for conditioning low level signals within an external chassis near sensors so that only high level signals are sent to DAQ devices in the noisy PC environment SCXI is an open standard available for all vendors A device that responds to a physical stimulus heat light sound pressure motion flow and so on and produces a corresponding electrical signal
101. ware configured and calibrated For the NI 6722 6723 connector pinouts refer to Chapter 2 O Connector Analog Output NI 6722 6723 The NI 6722 has eight channels of voltage output at the I O connectors and the NI 6723 has 32 channels of voltage output at the I O connectors The reference for the AO circuitry is internal Each NI 6722 6723 voltage output channel has a bipolar range of 10 V from AO GND You cannot select an external reference to adjust the AO voltage range Analog Output Series User Manual A 6 ni com Appendix A Device Specific Information Block Diagram NI 6722 6723 Figure A 3 shows a block diagram of the NI 6722 6723 Load DAC q EEPROM AO Data Bus i 6 lt 13 Bit pack o o T S o 1 a c c i T T X 8 KIT qum mene aie ap Ea 1 1 Reset Bus Oo o i Anala 1 DES amp Spa Mite Bus 1 A ddressD in Mosa e mn i x4 x4 Input FIFO i Update Clear 16 Bit ADC Busy PFI Trigger Trigger Analog Output DM A IRQ i Timing Control DMA IRQ Timing VO DAQ STC nce Dinayo RTSI Bus Digital l O 8 Digital VO Interface NI 6723 only C RTSI Bus gt Figure A 3 NI 6722 6723 Block Diagram National Instruments Corporation A 7 Analog Output Series User Manual Appendix A Device Specific Information NI 6731 6733 The following sect
102. y step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Free Technical Support All registered users receive free Basic Service which includes access to hundreds of Application Engineers worldwide in the NI Discussion Forums at ni com forums National Instruments Application Engineers make sure every question receives an answer For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electronic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification C 1 Analog Output Series User Manual Appendix C Technical Support and Professional Servi

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