Home

NI PXI-6682 Series User Manual

1. VI NI PXI 6682 Series User Manual seconds the actual time difference between two events that would ideally occur simultaneously Inter channel skew is an example of the time differences introduced by different characteristics of multiple channels Skew can occur between channels on one module or between channels on separate modules intermodule skew a computer or peripheral device controlled by another computer the place in the computer or chassis in which a card or module can be installed the second slot in a PXI system which can house a master timing unit sub miniature type B a small coaxial signal connector that features a snap coupling for fast connection a property of an event that is synchronized to a reference clock clock to output time hold time propagation delay time trigger signal a digital signal that starts or times a hardware event for example starting a data acquisition operation setup time volts virtual instrument G 6 ni com Index Numerics 1588 LED color explanation table 3 4 overview 3 4 A ACT LINK LED color explanation table 3 5 overview 3 5 asynchronous routing overview 3 16 sources and destinations 3 17 timing diagram 3 17 best practices for synchronization 4 3 block diagram NI PXI 6682 Series functional overview 3 2 routing architecture 3 10 C calibration certificate NI resources C 2 CE compliance specifications A 1 1 CLKIN connecto
2. lt __ __ gt a Synchronization i PPIO Digital Clock Generation PXI_TRIG lt 0 7 gt gt and PFI 1 leq gt Routing Circuitry PFI 2 gt O PCI Interface lt _________ gt Ethernet Ethernet Port 4 gt Controller y Figure 3 2 Functional Overview of the NI PXI 6682 3 Note The NI PXI 6682H does not have PXI_STAR trigger lines shown as PXI_STAR lt 0 12 gt in Figure 3 2 The NI PXI 6682H does not have the CLKIN circuitry or the ability to drive PXI_CLK10_IN NI PXI 6682 Series User Manual 3 2 ni com NI PXI 6682 Series Front Panel Chapter 3 Hardware Overview Figure 3 3 shows the connectors and LEDs on the front panel of the NI PXI 6682 Series x a a a NATIONAL INSTRUMENTS NI PXI 6682 Timing Module akWN GPS LED 1588 LED GPS Antenna Connector CLKOUT Connector CLKIN Connector 6 7 8 9 1 PFIO IRIG B Input Connector PFI lt 1 2 gt Connectors Ethernet Speed LED Ethernet ACT LINK LED 0 RJ 45 Ethernet Connector Figure 3 3 NI PXI 6682 Front Panel ay Note The NI PXI 6682H does not have the CLKIN connector shown as item 5 in Figure 3 3 National Instruments Corporation NI PXI 6682 Series User Manual Chapter 3 Hardware Overview GPS LED The GPS LED indicates the status of the GPS hardware Refer to Figure 3 3 for the GPS LED location Table 3 1 summarizes what the
3. PXI_CLK10 can be routed to CLKOUT hardware component that controls timing for reading from or writing to groups An adaptation of the Peripheral Component Interconnect PCI Specification 2 1 or later for industrial and or embedded applications requiring a more robust mechanical form factor than desktop PCI It uses industry standard mechanical components and high performance connector technologies to provide an optimized system intended for rugged applications It is electrically compatible with the PCI Specification which enables low cost PCI components to be utilized in a mechanical form factor suited for rugged environments G 2 ni com DAQ DC ESD F frequency front panel G GPS Glossary data acquisition 1 collecting and measuring electrical signals from sensors transducers and test probes or fixtures and inputting them to a computer for processing 2 collecting and measuring the same kinds of electrical signals with A D and or DIO devices plugged into a computer and possibly generating control signals with D A and or DIO devices in the same computer direct current electrostatic discharge the basic unit of rate measured in events or oscillations per second using a frequency counter or spectrum analyzer Frequency is the reciprocal of the period of a signal the physical front panel of an instrument or other hardware Global Positioning System worldwide system that allows you to receive preci
4. Not in NI PXI 6682H Out This is a signal that can replace the native 10 MHz oscillator on the PXI backplane PXI_CLK10_IN may originate from the onboard TCXO or from an external source connected to CLKIN PXI_CLK10 In This signal is the PXI 10 MHz backplane clock By default this signal is the output of the native 10 MHz oscillator in the chassis An NI PXI 6682 Series in Slot 2 can replace this signal with PXI_CLK10_IN Oscillator N A This is the output of the 10 MHz TCXO It is used by the FPGA for synchronization and can be routed to CLKOUT or PXI_CLK10_IN The TCXO is a very stable and accurate frequency source CLKIN Not in NI PXI 6682H In CLKIN is a signal connected to the SMB input pin of the same name CLKIN can be routed to PXI_CLK10_IN CLKOUT Out CLKOUT is the signal on the SMB output pin of the same name Either the TCXO clock or PXI_CLK10 may be routed to this location PXL STAR lt 0 12 gt Not in NI PXI 6682H In Out The PXI star trigger bus connects Slot 2 to Slot lt 3 15 gt in a star configuration The electrical paths of each star line are closely matched to minimize intermodule skew An NI PXI 6682 in Slot 2 can route signals to Slots lt 3 15 gt using the star trigger bus PFI lt 0 2 gt In Out The Programmable Function Interface pins on the NI PXI 6682 Series route timing and triggering signals between multiple PXI chassis A wide variety o
5. PXI_CLK10 Output CUITENE nnrir sriid 48 mA max Square wave rise fall time 10 to 90 for 50 Q load 0 5 ns min 2 5 ns max Input Characteristics Frequency range u e DC to 30 MHz Input impedance eeeeeeceeeseeeneeeeeees 1 KQ nominal Input coupling ee eee eeeeeteeees DC Voltage level oo eeeeeeeeeeeereeees 0 to 3 3 V 5 V tolerant Absolute maximum input voltage 0 5 V to 6 0 V Input threshold Voltage threshold high 2 3 V Voltage threshold low 0 8 V Asynchronous delay tpa PFI lt 0 2 gt to PXI_TRIG lt 0 7 gt output 20 to 31 ns typical PFI lt 0 2 gt to PXI_STAR lt 0 12 gt output 10 ns typical Synchronized trigger input setup LIME tyoup eseeeceeeerereeeeeeeerees 19 ns typical relative to CLKOUT when set up to route PXI_CLK10 For PFI 0 these characteristics apply when the line is configured as a digital input They do not apply when configured as an IRIG B AM input 2 Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specifications is not implied 3 The NI PXI 6682H does not have star trigger lines National Instruments Corporation A 3 NI PXI 6682 Series User Manual Appendix A Specifications Synchronized trigger input hold tim
6. the synchronization pulses and the information bits are sent The standards also differ slightly in the content of the information transmitted Table B 1 summarizes the characteristics of each IRIG standard Table B 1 IRIG Standard Definitions Bit rate Frame rate IRIG Standard bit duration frame duration Information sent IRIG A 1 Kbps 1 ms 10 fps 100 ms TOY amp Y BCD SOD SBS IRIG B 100 bps 10 ms 1 fps 1s TOY amp Y BCD SOD SBS IRIG D 1 bpm 60 s 1 fph 1 hour TOY BCD days and hours only IRIG E 10 bps 100 ms 6 fpm 10s TOY amp Y BCD IRIG G 10 kbps 0 1 ms 100 fps 10 ms TOY amp Y BCD Includes fractions of seconds IRIG H 1 bps 1 1 fpm 60 s TOY BCD Days hours and minutes only bpm bits per minute BCD binary coded decimal bps bits per second SBS straight binary seconds fph frames per hour SOD seconds of day fpm frames per minute TOY time of year fps frames per second Y year In addition to the characteristics of each standard described in the table above each of those is subdivided further depending on the electrical characteristics of the signal used to transmit the data and the actual data National Instruments Corporation B 1 NI PXI 6682 Series User Manual Appendix B IRIG Protocol Overview transmitted This is usually specified by 3 digits that follow the IRIG standard name for instance IRIG B 120 Table B 2 details
7. 13 PXI star triggers per chassis Each trigger line is a dedicated connection between Slot 2 and one other slot The PXI Specification Revision 2 1 requires that the propagation delay along each star trigger line be matched to within ns A typical upper limit for the skew in most NI PXI chassis is 500 ps The low skew of the PXI star trigger bus is useful for applications that require triggers to arrive at several modules nearly simultaneously The NI PXI 6682 is able to route low skew triggers to the PXI_Star lines from any PFI line The star trigger lines are bidirectional so signals can be sent to Slot 2 from a module in another slot or from Slot 2 to the other module The signal source for each PXI star trigger line configured as an output can be independently selected from one of the following options e PFI lt 0 2 gt low skew e PXI_TRIG lt 0 7 gt e Another PXI star trigger line PXI_STAR lt 0 12 gt e Synchronized time event e PXI_CLK10 e Ground The PXI star trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock Choosing the Type of Routing NI PXI 6682 Series User Manual The NI PXI 6682 Series routes signals in one of two ways asynchronously or synchronously The following sections describe the two routing types and the considerations for choosing each type Asynchronous R
8. A SYSTEM FAILURE WOULD CREATE A RISK OF HARM TO PROPERTY OR PERSONS INCLUDING THE RISK OF BODILY INJURY AND DEATH SHOULD NOT BE RELIANT SOLELY UPON ONE FORM OF ELECTRONIC SYSTEM DUE TO THE RISK OF SYSTEM FAILURE TO AVOID DAMAGE INJURY OR DEATH THE USER OR APPLICATION DESIGNER MUST TAKE REASONABLY PRUDENT STEPS TO PROTECT AGAINST SYSTEM FAILURES INCLUDING BUT NOT LIMITED TO BACK UP OR SHUT DOWN MECHANISMS BECAUSE EACH END USER SYSTEM IS CUSTOMIZED AND DIFFERS FROM NATIONAL INSTRUMENTS TESTING PLATFORMS AND BECAUSE A USER OR APPLICATION DESIGNER MAY USE NATIONAL INSTRUMENTS PRODUCTS IN COMBINATION WITH OTHER PRODUCTS IN A MANNER NOT EVALUATED OR CONTEMPLATED BY NATIONAL INSTRUMENTS THE USER OR APPLICATION DESIGNER IS ULTIMATELY RESPONSIBLE FOR VERIFYING AND VALIDATING THE SUITABILITY OF NATIONAL INSTRUMENTS PRODUCTS WHENEVER NATIONAL INSTRUMENTS PRODUCTS ARE INCORPORATED IN A SYSTEM OR APPLICATION INCLUDING WITHOUT LIMITATION THE APPROPRIATE DESIGN PROCESS AND SAFETY LEVEL OF SUCH SYSTEM OR APPLICATION Contents About This Manual Cony nt ons enonsa ek hei ease esa aoe Then one ok cues Levees deste E ba ees bea eae es vii National Instruments Documentation cccccccccccccesesesesessssesssnssscncsssesesesceceseeseeesenens viii Related Doc me ntati ns siinne e a ses oes A Becta e iaaa e aa viii Chapter 1 Introduction What You Need to Get Started eeseeeeeseeessessessseseserreereerrrrrrsssssssssrsrrereteereeerresse
9. Figure 3 4 High Level Schematic of NI PXI 6682 Signal Routing Architecture 3 Note The NI PXI 6682H architecture is identical to the architecture described in Figure 3 4 except that it doesn t have the PXI_STAR trigger lines CLKIN or PXI_CLK10_IN Determining Sources and Destinations All signal routing operations can be characterized by a source input and a destination In addition synchronous routing operations must also define a third signal known as the synchronization clock Refer to the Choosing the Type of Routing section for more information on synchronous versus asynchronous routing Table 3 6 summarizes the sources and destinations of the NI PXI 6682 Series The destinations are listed in the horizontal heading row and the sources are listed in the column at the far left A v in a cell NI PXI 6682 Series User Manual 3 10 ni com Chapter 3 Hardware Overview indicates that the source and destination combination defined by that cell is a valid routing combination Table 3 6 Sources and Destinations for NI PXI 6682 Series Signal Routing Operations Destinations Front Panel Backplane CLKOUT PFI lt 0 2 gt PXI_ PXI_Star PXI TRIG z CLK10_IN Trigger lt 0 7 gt fz S lt 0 12 gt aa S CLKIN vi vt v vi vi m PFI lt 0 2 gt v vi v S PXI_CLK10 y v v v J a PXI STAR vi v v p lt 0 12 gt FI PXI TRIG lt 0 7 gt v v v zr TCXO v vi vA vi vt S 2 T
10. GPS it can function as an IEEE 1588 grandmaster to enable synchronization of external 1588 devices IRIG B IRIG is a standard used to transmit precise timing information between instruments to achieve synchronization IRIG B is a particular application of the IRIG standard in which 100 bits of data are sent every second Embedded in the data is a seconds boundary marker that the receiving National Instruments Corporation 4 1 NI PXI 6682 Series User Manual Chapter 4 NI PXI 6682 Series User Manual Synchronization instrument uses to synchronize its timebase to the IRIG source The rest of the data contains information such as the time of day days since the beginning of the year and optionally control functions and the number of seconds since the start of the day encoded as a straight binary number Refer to Appendix B IRIG Protocol Overview for more information about the IRIG standard The NI PXI 6682 Series can function as an IRIG B receiver supporting synchronization to sources outputting IRIG B 12X AM and IRIG B 00X DC When configured to synchronize to an IRIG B AM source the NI PXI 6682 Series will be able to accept a 1 kHz AM modulated IRIG B 12X signal on its PFIO input When configured to synchronize to an IRIG B DC source the NI PXI 6682 Series will be able to accept an IRIG B 00X DC encoded signal on its PFIO input Caution Do not connect an AM signal to PFIO when the PFI line is configured for di
11. Identifier Po 90 97 Eight most significant bits of time of day in straight binary seconds bit 90 gt 2 bit 97 gt 2 99 Position identifier Po Note Bits not listed are index markers and are sent as binary zeroes The NI PXI 6682 Series uses the time of day information transmitted as BCD to synchronize its internal timebase If the IRIG B signal includes the year then it also uses that information to synchronize its clock Otherwise it gets the year from the host computer The NI PXI 6682 Series disregards the rest of the information contained in the IRIG B signal Therefore when configured to synchronize to IRIG B AM the NI PXI 6682 Series supports IRIG B 12X and when configured to synchronize to IRIG B DC it supports IRIG B 00X The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6682 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59 and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 e Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents 2009 If the year is not supp
12. or gaseous state that can reduce dielectric strength or surface resistivity The following is a description of pollution degrees e Pollution Degree 1 means no pollution or only dry nonconductive pollution occurs The pollution has no influence e Pollution Degree 2 means that only nonconductive pollution occurs in most cases Occasionally however a temporary conductivity caused by condensation must be expected e Pollution Degree 3 means that conductive pollution occurs or dry nonconductive pollution occurs that becomes conductive due to condensation You must insulate signal connections for the maximum voltage for which the product is rated Do not exceed the maximum ratings for the product Do not install wiring while the product is live with electrical signals Do not remove or add connector blocks when power is connected to the system Avoid contact between your body and the connector block signal when hot swapping modules Remove power from signal lines before connecting them to or disconnecting them from the product National Instruments Corporation 1 3 NI PXI 6682 Series User Manual Chapter 1 Introduction Operate the product at or below the installation category marked on the hardware label Measurement circuits are subjected to working voltages and transient stresses overvoltage from the circuit to which they are connected during measurement or test Installation categories establish standard impulse withstand vol
13. the different characteristics of each IRIG option Table B 2 IRIG Option Characteristics Modulation Carrier Signal type Frequency Information sent 0 Pulse width modulated 0 DC 0 TOY BCD CB SBS 1 Amplitude modulated 1 100 Hz 1 TOY BCD CB sine wave 2 Manchester modulated 2 1 kHz 2 TOY BCD 3 10 kHz 3 TOY BCD SBS 4 100 kHz 4 TOY BCD Year BCD CB SBS 5 1 MHz 5 TOY BCD Year BCD CB 6 TOY BCD Year BCD 7 TOY BCD Year BCD SBS CB control bits NI PXI 6682 Series User Manual For example IRIG B 120 indicates that the information is sent once per second 100 bits per second on a kHz amplitude modulated sine wave and that the information sent is the time of year in BCD control bits and the seconds of day in straight binary seconds There are 3 types of bits sent in the IRIG standard binary zeroes binary ones and position identifiers To transmit a binary zero the source must keep the signal at mark for 20 of the bit duration and at space for the remaining 80 to transmit a binary one the source must keep the signal at mark for 50 of the bit duration and at space for the remaining 50 to transmit a position identifier the source must keep the signal at mark for 80 of the bit duration and at space for the remaining 20 Binary bits are used to transmit information such as time of year straight binary seconds and so on and posit
14. Appendix A Specifications CLKIN frequency accuracy requirement For replacing PXI_CLK10 100 ppm Jitter added to CLKIN cece eeeeeeeeeee 1 3 pSims 10 Hz to 100 kHz typical Duty cycle distortion of CLKIN to PXI_CLKI10_IN oe eee 1 max Required input duty cycle 45 to 55 PFI lt 0 2 gt Output Characteristics Frequency range o eee eeeeeeeeeeeees DC to 30 MHz Output impedance eee 50 Q nominal Output coupling oo eee eeeeteeee DC Output voltage levels Output high eee eters 1 1 V min 1 6 V typical for 50 Q load 2 4 V min 3 3 V typical for 1 MQ load Output LOW eee eects eeeeeeees 0 3 V max 0 V typical for 50 Q load 0 7 V max 0 V typical for 1 MQ load Absolute maximum applied voltage 0 to 5 V Output to output skew asynchronous lt 1 5 ns typical Output to output skew synchronous lt 2 ns typical This is a requirement of the PXI specification 2 Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specifications is not implied NI PXI 6682 Series User Manual A 2 ni com Appendix A Specifications Synchronized trigger clock to Out TIMES Cogiescseessisescsseadesessescatiserdassness 10 ns typical relative to CLKOUT when set up to route
15. B AM matching 7 1 us lt 220 ns standard deviation IRIG B AM to source 5 us lt 500 ns standard deviation PPS 47 ns lt 10 ns standard deviation to GPS 4 Netgear DS104 Hub used the switch period 1 All synchronization measurements were done by recording the offset between PPS signals generated by two PXI 6682 Series boards inside closed PXI 1031 chassis at ambient room temperature conditions Synchronization was performed for 15 minutes before testing began All test durations were 12 hours 2 For the GPS test two PXI 6682 Series boards were independently synchronizing to GPS and configured to generate a PPS The specification above represents empirical results Please note that GPS satellites are only guaranteed to be within 100 ns of UTC Therefore the offset between any two devices synchronizing can be as high as 200 ns plus the offset of that device 3 Sync interval of 1 second was used for IEEE 1588 tests and all Ethernet connections were 100 Mbps 5 Airlink 101 Gigabit over copper switch used For this test a moderate amount of non 1588 Ethernet traffic was present on 6 IRIG B AM matching specification was obtained by setting two PXI 6682 Series boards to synchronize independently to the same IRIG B AM source and generate a PPS The offset between their PPS signals was then measured over a 12 hour 7TRIG B performance depends on IRIG B source stability and quality NI PXI 6682 Seri
16. Ethernet using IEEE 1588 It is possible to configure the NI PXI 6682 Series to synchronize to GPS or IRIG B and then function as an IEEE 1588 grandmaster It is also possible to configure the NI PXI 6682 Series to synchronize to IEEE 1588 in which case the standard defines how the master will be selected If the NI PXI 6682 Series is selected as IEEE 1588 master and it is not configured to synchronize to GPS or IRIG B it will use its internal free running timebase which will be updated to the host computer s system time during power up PPS The NI PXI 6682 Series is capable of using a PPS pulse per second signal for synchronization Any PFI PXI_Trigger or PXI_Star line can be configured as the PPS input terminal When synchronizing based on a PPS the first pulse received will set the NI PXI 6682 Series internal timebase to either an arbitrary time supplied by the user or the host computer s system time Each subsequent pulse received will be interpreted as a second s boundary the pulse occurring exactly second after the previous pulse As each pulse is received the NI PXI 6682 Series will adjust its internal timebase to match the frequency of the PPS source For best results when using PPS Time Reference ensure that the device supplying the PPS signal is capable of providing a stable consistent 1Hz signal Error can be induced into the system if the reference signal contains significant jitter or if the reference freque
17. GPS LED indicates Table 3 1 GPS LED Color Description Color Status Off Not using GPS Amber Attempting to start self survey Blinking Amber Self survey in progress Blinking Green Self survey complete normal operation Red Error The GPS LED is turned off if GPS is not set as the time reference T An error is generated when the antenna is disconnected when there is an antenna malfunction or when there is a hardware malfunction 1588 LED The 1588 LED indicates the status of the IEEE 1588 synchronization protocol Refer to Figure 3 3 for the 1588 LED location Table 3 2 summarizes what the 1588 LED indicates Table 3 2 1588 LED Color Description Color Status Off Not using 1588 Amber Initializing Blinking Amber 2 seconds Listening or Passive Green Uncalibrated or Slave Blinking Green 2 seconds Master or Premaster Red Faulty 1588 has been disabled or stopped NI PXI 6682 Series User Manual ni com Chapter 3 Hardware Overview Speed LED The Speed LED indicates the NI PXI 6682 Series Ethernet link speed Refer to Figure 3 3 for the Speed LED location Table 3 3 summarizes what the Speed LED indicates Table 3 3 Speed LED Description Color Status Off 10 Mbps Green 100 Mbps 3 Note When there is no Ethernet link the Speed LED is off ACT LINK LED The ACT LINK LED indicates the NI PXI 6682 S
18. I VISA Help included with the NI VISA software NI Sync User Manual available from ni com manuals viii ni com Introduction The NI PXI 6682 Series enables you to synchronize PXI systems using GPS IEEE 1588 IRIG B or PPS to perform synchronized events The NI PXI 6682 Series can generate events and clock signals at specified synchronized future times and timestamp input events with the synchronized system time The PXI 6682 Series also allows you to route clock signals and triggers with low skew within a PXI chassis or between multiple chassis providing a method for synchronizing multiple devices in a PXI system What You Need to Get Started To set up and use the NI PXI 6682 Series you need the following items U NI PXI 6682 Series Timing and Triggering Module NI PXI 6682 Series User Manual Q Q NI Sync CD Q One of the following software packages and documentation LabVIEW LabWindows CVI Microsoft Visual C MSVC Q PXI chassis the NI PXI 6682H can be installed in a hybrid slot of a PXI Express chassis Q PXI PXI Express PXIe embedded controller or a desktop computer connected to the PXI PXIe chassis using MXI hardware If you are using the NI PXI 6682 Series in a system to synchronize NI PXI 4472 NI PXI 5112 NI PXI 5411 NI PXI 6115 or E Series DAQ modules you can refer to the N J Sync User Manual which you can find on the NI Sync CD or download from ni com manuals Natio
19. I pin PFI lt 0 2 gt e Any PXI Star trigger line PXI_STAR lt 0 12 gt NI PXI 6682 only e Any PXI Trigger line PXI_TRIG lt 0 7 gt e Synchronized time events e PXI_CLK10 e Ground The destination of an asynchronous routing operation on the NI PXI 6682 Series can be any of the following lines e Any front panel PFI pin PFI lt 0 2 gt e Any PXI star trigger line PXI_STAR lt 0 12 gt NI PXI 6682 only e Any PXI Trigger line PXI_TRIG lt 0 7 gt National Instruments Corporation 3 17 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview NI PXI 6682 Series User Manual Synchronous Routing A synchronous routing operation is defined in terms of three signals a source a destination and a synchronization clock A digital signal comes in on the source and is propagated to the destination after the edge has been realigned with the synchronization clock Unlike asynchronous routing the output of a synchronous routing operation does not directly follow the input after a propagation delay Instead the output waits for the next rising edge of the clock before it follows the input Thus the output is said to be synchronous with this clock Synchronous routing can send triggers to several places in the same clock cycle or send the trigger to those same places after a deterministic skew of a known number of clock cycles If a signal arrives at two chassis within the same clock cycle each NI PXI 6682 Series mo
20. N 61010 1 UL 61010 1 CSA 61010 1 3 Note For UL and other safety certifications refer to the product label or the Online Product Certification section Electromagnetic Compatibility This product is designed to meet the requirements of the following standards of EMC for electrical equipment for measurement control and laboratory use EN 61326 IEC 61326 Class A emissions Basic immunity EN 55011 CISPR 11 Group 1 Class A emissions AS NZS CISPR 11 Group 1 Class A emissions FCC 47 CFR Part 15B Class A emissions ICES 001 Class A emissions 3 Note For the standards applied to assess the EMC of this product refer to the Online Product Certification section B Note For EMC compliance operate this device with shielded cabling NI PXI 6682 Series User Manual A 10 ni com Appendix A Specifications CE Compliance C This product meets the essential requirements of applicable European Directives as follows e 2006 95 EC Low Voltage Directive safety e 2004 108 EC Electromagnetic Compatibility Directive EMC Online Product Certification Refer to the product Declaration of Conformity DoC for additional regulatory compliance information To obtain product certifications and the DoC for this product visit ni com certification search by model number or product line and click the appropriate link in the Certification column Environmental Management Dx National Instruments Corporation A 11 Nation
21. PXI NI PXI 6682 Series User Manual NI PXI 6682 and NI PXI 6682H Timing and Synchronization Modules for PXI March 2009 7 NATIONAL 372292B 01 instruments Worldwide Technical Support and Product Information ni com National Instruments Corporate Headquarters 11500 North Mopac Expressway Austin Texas 78759 3504 USA Tel 512 683 0100 Worldwide Offices Australia 1800 300 800 Austria 43 662 457990 0 Belgium 32 0 2 757 0020 Brazil 55 11 3262 3599 Canada 800 433 3488 China 86 21 5050 9800 Czech Republic 420 224 235 774 Denmark 45 45 76 26 00 Finland 358 0 9 725 72511 France 01 57 66 24 24 Germany 49 89 7413130 India 91 80 41190000 Israel 972 3 6393737 Italy 39 02 41309277 Japan 0120 527196 Korea 82 02 3451 3400 Lebanon 961 0 1 33 28 28 Malaysia 1800 887710 Mexico 01 800 010 0793 Netherlands 31 0 348 433 466 New Zealand 0800 553 322 Norway 47 0 66 90 76 60 Poland 48 22 328 90 10 Portugal 351 210 311 210 Russia 7 495 783 6851 Singapore 1800 226 5886 Slovenia 386 3 425 42 00 South Africa 27 0 11 805 8197 Spain 34 91 640 0085 Sweden 46 0 8 587 895 00 Switzerland 41 56 2005151 Taiwan 886 02 2377 2222 Thailand 662 278 6777 Turkey 90 212 279 3031 United Kingdom 44 0 1635 523545 For further support information refer to the Technical Support and Professional Services appendix To comment on National Instruments documentation refer to the National Instruments Web site at ni com info and enter the info co
22. You also can visit the Worldwide Offices section of ni com niglobal to access the branch office Web sites which provide up to date contact information support phone numbers email addresses and current events NI PXI 6682 Series User Manual C 2 ni com Glossary Symbol Prefix Value p pico 10712 n nano 10 9 u micro 10 6 m milli 10 3 k kilo 103 M mega 106 Symbols percent plus or minus positive of or plus negative of or minus per 4 degree Q ohm A AC alternating current ADE application development environment asynchronous a property of an event that occurs at an arbitrary time without synchronization to a reference clock National Instruments Corporation G 1 NI PXI 6682 Series User Manual Glossary backplane C C CLKIN CLKOUT clock CompactPCI NI PXI 6682 Series User Manual an assembly typically a printed circuit board PCB with 96 pin connectors and signal paths that bus the connector pins PXI systems have two connectors called the J1 and J2 connectors the group of conductors that interconnect individual circuitry in a computer Typically a bus is the expansion vehicle to which I O or other devices are connected An example of a PC bus is the PCI bus Celsius CLKIN is a signal connected to the SMB input pin of the same name CLKIN also can serve as PXI_CLK10_IN CLKOUT is the signal on the SMB output pin of the same name
23. al Instruments is committed to designing and manufacturing products in an environmentally responsible manner NI recognizes that eliminating certain hazardous substances from our products is beneficial not only to the environment but also to NI customers For additional environmental information refer to the NJ and the Environment Web page at ni com environment This page contains the environmental regulations and directives with which NI complies as well as other environmental information not included in this document Waste Electrical and Electronic Equipment WEEE EU Customers At the end of their life cycle all products must be sent toa WEEE recycling center For more information about WEEE recycling centers and National Instruments WEEE initiatives visit ni com environment weee htm AF aS mis Ria SDE ChE ROHS RARA National Instruments 4 E E FAE AP mh P RENMEN EA ES ROHS XF National Instruments F E ROHS AWSE WE ni com environment rohs_china For information about China RoHS compliance go to ni com environment rohs_china NI PXI 6682 Series User Manual IRIG Protocol Overview IRIG Inter Range Instrumentation Group is a standard used to transmit precise timing information between instruments to achieve synchronization There are 6 different IRIG standards defined A B D E G and H The main difference between the standards is the rate with which
24. at the primary electrical supply installation lt 1 000 V Examples include electricity meters and measurements on primary overcurrent protection devices and on ripple control units 1 Installation categories also referred to as measurement categories are defined in electrical safety standard IEC 61010 1 2 Working voltage is the highest rms value of an AC or DC voltage that can occur across any particular insulation 3 MAINS is defined as a hazardous live electrical supply system that powers equipment Suitably rated measuring circuits may be connected to the MAINS for measuring purposes NI PXI 6682 Series User Manual 1 4 ni com Installing and Configuring This chapter describes how to install the NI PXI 6682 Series hardware and software and how to configure the device Installing the Software Refer to the readme htm file that accompanies the NJ Sync CD for software installation directions 3 Note Be sure to install the driver software before installing the NI PXI 6682 Series module Installing the Hardware The following are general installation instructions Consult the chassis user manual or technical reference manual for specific instructions and warnings about installing new modules 1 Power off and unplug the chassis UN Caution Do not install the NI PXI 6682 Series module in the system controller slot slot 1 of a chassis National Instruments Corporation Choose an available slot in
25. ational Instruments and have no agency partnership or joint venture relationship with National Instruments Patents For patents covering National Instruments products technology refer to the appropriate location Help Patents in your software the patents txt file on your media or the National Instruments Patent Notice at ni com patents WARNING REGARDING USE OF NATIONAL INSTRUMENTS PRODUCTS 1 NATIONAL INSTRUMENTS PRODUCTS ARE NOT DESIGNED WITH COMPONENTS AND TESTING FOR A LEVEL OF RELIABILITY SUITABLE FOR USE IN OR IN CONNECTION WITH SURGICAL IMPLANTS OR AS CRITICAL COMPONENTS IN ANY LIFE SUPPORT SYSTEMS WHOSE FAILURE TO PERFORM CAN REASONABLY BE EXPECTED TO CAUSE SIGNIFICANT INJURY TO A HUMAN 2 IN ANY APPLICATION INCLUDING THE ABOVE RELIABILITY OF OPERATION OF THE SOFTWARE PRODUCTS CAN BE IMPAIRED BY ADVERSE FACTORS INCLUDING BUT NOT LIMITED TO FLUCTUATIONS IN ELECTRICAL POWER SUPPLY COMPUTER HARDWARE MALFUNCTIONS COMPUTER OPERATING SYSTEM SOFTWARE FITNESS FITNESS OF COMPILERS AND DEVELOPMENT SOFTWARE USED TO DEVELOP AN APPLICATION INSTALLATION ERRORS SOFTWARE AND HARDWARE COMPATIBILITY PROBLEMS MALFUNCTIONS OR FAILURES OF ELECTRONIC MONITORING OR CONTROL DEVICES TRANSIENT FAILURES OF ELECTRONIC SYSTEMS HARDWARE AND OR SOFTWARE UNANTICIPATED USES OR MISUSES OR ERRORS ON THE PART OF THE USER OR APPLICATIONS DESIGNER ADVERSE FACTORS SUCH AS THESE ARE HEREAFTER COLLECTIVELY TERMED SYSTEM FAILURES ANY APPLICATION WHERE
26. ble to program the start and ending time of a clock generated in this way Refer to Table 3 6 for a list of destinations for synchronized time clocks and future time events Routing Signals The NI PXI 6682 Series has versatile trigger routing capabilities It can route signals to and from the front panel the PXI star triggers and the PXI triggers In addition the polarity of the destination signal can be inverted which is useful when handling active low digital signals The NI PXI 6682 also can route a 10 MHz clock from CLKIN to the PXI 10 MHz reference clock the NI PXI 6682H does not have a CLKIN connector The NI PXI 6682 Series can route the TCXO or PXI 10 MHz reference clock to CLKOUT Figure 3 4 summarizes the routing features of the NI PXI 6682 Series The remainder of this chapter details the capabilities and constraints of the routing architecture National Instruments Corporation 3 9 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview Not in PXI 6682H ce ClkOut lt lt PXI_Clk10 Router for each I O PFIO gt e e e e PFI2 gt PX _Trig 0 gt m gt PXI Tigo e e y e e e e Clk10 PXI_Trig 7 gt Synchronizer gt PXI_Trig 7 PELSE E T Not in PXI 6682H___ o ip PXI Staro PXI_Star 12 gt e PXI_CIk10 gt Pxi_Star12 GND pY RRR ESE
27. bles filenames and extensions National Instruments Corporation vii NI PXI 6682 Series User Manual About This Manual Platform Text in this font denotes a specific platform and indicates that the text following it applies only to that platform NI PXI 6682 Series This term is used when the content would apply to either the NI PXI 6682 or the NI PXI 6682H National Instruments Documentation The NI PXI 6682 Series User Manual is one piece of the documentation set for your measurement system You could have any of several other documents describing your hardware and software Use the documentation you have as follows Measurement hardware documentation This documentation contains detailed information about the measurement hardware that plugs into or is connected to the computer Use this documentation for hardware installation and configuration instructions specifications about the measurement hardware and application hints Software documentation Refer to the NI Sync User Manual available at ni com manuals You can download NI documentation from ni com manuals Related Documentation The following documents contain information that you might find helpful as you read this manual NI PXI 6682 Series User Manual PICMG 2 0 R3 0 CompactPCI Core Specification available from PICMG at www picmg org PXI Specification Revision 2 1 available from www pxisa org NI VISA User Manual available from ni com manuals N
28. ccuracy frequency stability and phase noise the measured resistance and capacitance between the output terminals of a circuit Peripheral Component Interconnect a high performance expansion bus architecture originally developed by Intel to replace ISA and EISA It is achieving widespread acceptance as a standard for PCs and work stations it offers a theoretical maximum transfer rate of 132 Mbytes s Programmable Function Interface Pulse Per Second the measure of the stability of an instrument and its capability to give the same measurement over and over again for the same input signal the amount of time required for a signal to pass through a circuit a rugged open system for modular instrumentation based on CompactPCI with special mechanical electrical and software features The PXIbus standard was originally developed by National Instruments in 1997 and is now managed by the PXIbus Systems Alliance a special set of trigger lines in the PXI backplane for high accuracy device synchronization with minimal latencies on each PXI slot the clock signal that is used to synchronize the PXI Triggers or PXI_STAR triggers on an NI PXI 6682 the PXI timing bus that connects PXI devices directly by means of connectors on top of the devices for precise synchronization of functions NI PXI 6682 Series User Manual Glossary skew slave slot Slot 2 SMB synchronous T tctog Chola tpd TRIG trigger tsetup V
29. ce 4 4 training and certification NI resources C 1 trigger bus See PXI_TRIG lt 0 7 gt troubleshooting NI resources C 1 U unpacking the device 1 2 W Web resources C 1 WEEE information A 11 ni com
30. ckplane clock PXI_CLK10 The main source of error in most frequency reference oscillators is temperature variation The TCXO contains circuitry to measure the temperature of the oscillator It uses the temperature to adjust its frequency output according to the crystal s known frequency variation across its operating temperature range An NI PXI 6682 module in Slot 2 of a PXI chassis can replace the native PXI 10 MHz backplane frequency reference clock PXI_CLK10 with the more stable and accurate output of the TCXO All other PXI modules in the chassis that reference the 10 MHz backplane clock benefit from this improved reference The TCXO does not automatically replace the native 10 MHz clock this feature must be explicitly enabled in software The TCXO output also can be routed out to the CLKOUT connector Note The 10 MHz TCXO signal is freerunning It is not disciplined to the board s time 3 8 ni com Chapter 3 Hardware Overview Time Synchronized Clock and Event Generation The NI PXI 6682 Series is capable of generating clock signals and triggers based on the synchronized time base The NI PXI 6682 Series keeps an internal time base with 10 ns resolution that can be synchronized to GPS IRIG B PPS IEEE 1588 or freerunning The NI Sync API allows you to schedule triggers to occur at an arbitrary future time future time events or clocks of arbitrary frequencies with high and low times in multiples of 10ns It is also possi
31. de feedback 2007 2009 National Instruments Corporation All rights reserved Important Information Warranty The NI PXI 6682 and NI PXI 6682H are warranted against defects in materials and workmanship for a period of one year from the date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace equipment that proves to be defective during the warranty period This warranty includes parts and labor The media on which you receive National Instruments software are warranted not to fail to execute programming instructions due to defects in materials and workmanship for a period of 90 days from date of shipment as evidenced by receipts or other documentation National Instruments will at its option repair or replace software media that do not execute programming instructions if National Instruments receives notice of such defects during the warranty period National Instruments does not warrant that the operation of the software shall be uninterrupted or error free A Return Material Authorization RMA number must be obtained from the factory and clearly marked on the outside of the package before any equipment will be accepted for warranty work National Instruments will pay the shipping costs of returning to the owner parts which are covered by warranty National Instruments believes that the information in this document is accurate The document has been carefully reviewed
32. dule realigns the signal with the synchronization clock and distributes it to the modules in each chassis at the same time Synchronous routing can thus remove uncertainty about when triggers are received If the delays through the system are such that an asynchronous trigger might arrive near the edge of the receiver clock the receiver might see the signal in the first clock cycle or it might see it in the second clock cycle However by synchronizing the signal you can eliminate the ambiguity and the signal will always be seen in the second clock cycle 3 18 ni com Chapter 3 Hardware Overview Figure 3 7 shows a timing diagram that illustrates synchronous routing Setup Hold Time Time tsetup thold i lt gt 44 Trigger Input Synchronization Clock i Clock to Output Time totoa lt a Trigger Output Figure 3 7 Synchronous Routing Operation Possible sources and destinations for synchronous routing include the following e Any front panel PFI pin PFI lt 0 2 gt e Any PXI star trigger line PXI_STAR lt 0 12 gt NI PXI 6682 only e Any PXI Trigger line PXI_TRIG lt 0 7 gt In the NI PXI 6682 Series the synchronization clock for synchronous routes is always PXI_CLK10 ay Note The possible destinations for a synchronous route are identical to those for an asynchronous route The destinations include any front panel PFI pin any PXI star trigger line or any PXI Trigger l
33. e thojge sscescesceeeeeeeseeeeeeeens 0 ns relative to CLKOUT when set up to route PXI_CLK10 IRIG B Input Characteristics PFIO IRIG B AM compatibility oe IRIG B 12X Maximum Input voltage range 5 V to 5 V Decode Input voltage range 1 5 V to 10 V peak peak mark 3 1 ratio mark space Input carrier frequency eeeeeeeeeeeee 1 kHz UN Caution Do not connect an IRIG B AM signal to PFI 0 when the input is configured for digital operation as this can result in damage of the digital input circuitry NI PXI 6682 Series User Manual IRIG B DC compatibility IRIG B 00X Input characteristics for IRIG B DC same as PFI digital input characteristics listed above The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6682 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59 and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 e Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents 2009 If the year is not supplied sent as 00 the OS system time is read and t
34. e eeeeeseeeeereeeeeeeees 3 12 Using Front Panel PFI Terminals as Inputs eee eseeseeeeeeeeeneeeeenees 3 12 Note Regarding PRO eria ania dete diets dian eae 3 13 National Instruments Corporation v NI PXI 6682 Series User Manual Contents Brief Overview of PXI Synchronization Features Using the PXI Trig fers is iic csccsssvscsscesssezcasecsesssabuatabsscessaasses Using the PXI Star Triggers NI PXI 6682 only Choosing the Type of Routing eee eee eeeeeeereeeeeaeenes Asynchronous Routing eeceeeseeseeeeereeseeeeneeerere Synchronous Routing 0 0 eee eee eeeseeeeeeseeseeeeeeeeees Chapter 4 Synchronization Synchronization Best Practices cee eee eseeseeseeeseeeeseeeeseeeeeeseeseees Operating Environment eee cece ceeeeseceeeeeeteesseeeeeseens Timing System Performance eee ee eeeeeeeeeee TEEE 1588 Synchronization Best Practices 0 eee Network Topology cescesccceseesecseceseeeseeeeeeeneeees GPS Synchronization Best Practices Appendix A Specifications Appendix B IRIG Protocol Overview Appendix C Technical Support and Professional Services Glossary Index NI PXI 6682 Series User Manual vi ni com About This Manual Conventions This manual describes the electrical and mechanical aspects of the NI PXI 6682 and NI PXI 6682H and contains information concerning its operation and programming lt gt bold italic monospace The following conventions a
35. eries Ethernet link condition Refer to Figure 3 3 for the ACT LINK LED location Table 3 4 summarizes what the ACT LINK LED indicates Table 3 4 ACT LINK LED Color Description Color Status Off No Ethernet link Green Ethernet link established Blink Ethernet activity occurring Connectors This section describes the connectors on the front panel of the NI PXI 6682 Series Refer to Figure 3 3 for the location of the connectors e GPS ANT GPS antenna RF input and DC power output for active GPS antenna This connector provides 5 VDC for an active antenna This connector also serves as the input for the RF signal coming in from the GPS antenna e CLKOUT Clock Output This connector is used to source a 10 MHz clock that can be routed programmatically from the temperature compensated crystal oscillator TCXO or backplane clock PXI_CLK10 National Instruments Corporation 3 5 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview 3 Note The NI PXI 6682H does not have the CLKIN connector e CLKIN Clock Input This connector supplies the module with a clock that can be programmatically routed to the PXI backplane PXI_CLK10_IN for distribution to the other modules in the chassis when the NI PXI 6682 is installed in PXI slot 2 e PFI lt 0 2 gt Programmable Function Interface lt 0 2 gt These connectors can be used for either input or output You can program the behavior of these PFI con
36. es User Manual A 8 ni com Appendix A Specifications Environmental Operating Environment Ambient temperature range 0 to 55 C Tested in accordance with TEC 60068 2 1 and TEC 60068 2 2 Relative humidity range 10 to 90 noncondensing Tested in accordance with TEC 60068 2 56 Maximum altitude ccceesseeeseeees 2 000 m at 25 C ambient temperature Pollution Degree sesoonse 2 Indoor use only Storage Environment Ambient temperature range 20 to 70 C Tested in accordance with TEC 60068 2 1 and TEC 60068 2 2 Relative humidity range 5 to 95 noncondensing Tested in accordance with TEC 60068 2 56 Shock and Vibration Operational Shock eee eee eeeeeees 30 g peak half sine 11 ms pulse Tested in accordance with IEC 60068 2 27 Test profile developed in accordance with MIL PRF 28800F National Instruments Corporation A 9 NI PXI 6682 Series User Manual Appendix A Specifications Random Vibration Operating assises 5 to 500 Hz 0 3 gims Nonoperating 00 0 eee eeeeeeeeereeeee 5 to 500 Hz 2 4 gms Tested in accordance with TEC 60068 2 64 Nonoperating test profile exceeds the requirements of MIL PRF 28800F Class 3 3 Note Specifications are subject to change without notice Safety This product is designed to meet the requirements of the following standards of safety for electrical equipment for measurement control and laboratory use IEC 61010 1 E
37. f input and output signals can be routed to or from the PFI lines PFI lt 0 gt also can function as an input for IRIG B DC or AM PXI_TRIG lt 0 7 gt In Out The PXI trigger bus consists of eight digital lines shared among all slots in the PXI chassis The NI PXI 6682 Series can route a wide variety of signals to and from these lines National Instruments Corporation 3 7 NI PXI 6682 Series User Manual Hardware Overview Chapter 3 Hardware Overview The remainder of this chapter describes how these signals are used acquired and generated by the NI PXI 6682 Series hardware and explains how you can use the signals between various locations to synchronize events in your system Clock and Event Generation The NI PXI 6682 Series can generate two types of clock signals The first type is generated with a precise 10 MHz oscillator and the second is generated with the synchronized timebase The following sections describe the two types of clock generation and explain the considerations for choosing either type In addition to time synchronized clock signals the NI PXI 6682 Series is also capable of generating arbitrary digital events to be used as triggers PXI_CLK10 and TCXO 3 NI PXI 6682 Series User Manual The NI PXI 6682 Series features a precision 10 MHz TCXO The frequency accuracy and stability of this clock is greater than the frequency accuracy and stability of the native 10 MHz PXI ba
38. for technical accuracy In the event that technical or typographical errors exist National Instruments reserves the right to make changes to subsequent editions of this document without prior notice to holders of this edition The reader should consult National Instruments if errors are suspected In no event shall National Instruments be liable for any damages arising out of or related to this document or the information contained in it EXCEPT AS SPECIFIED HEREIN NATIONAL INSTRUMENTS MAKES NO WARRANTIES EXPRESS OR IMPLIED AND SPECIFICALLY DISCLAIMS ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE CUSTOMER S RIGHT TO RECOVER DAMAGES CAUSED BY FAULT OR NEGLIGENCE ON THE PART OF NATIONAL INSTRUMENTS SHALL BE LIMITED TO THE AMOUNT THERETOFORE PAID BY THE CUSTOMER NATIONAL INSTRUMENTS WILL NOT BE LIABLE FOR DAMAGES RESULTING FROM LOSS OF DATA PROFITS USE OF PRODUCTS OR INCIDENTAL OR CONSEQUENTIAL DAMAGES EVEN IF ADVISED OF THE POSSIBILITY THEREOF This limitation of the liability of National Instruments will apply regardless of the form of action whether in contract or tort including negligence Any action against National Instruments must be brought within one year after the cause of action accrues National Instruments shall not be liable for any delay in performance due to causes beyond its reasonable control The warranty provided herein does not cover damages defects malfunctions or service failures caused by owner s failu
39. gital operations This could cause damage to the digital circuitry the device driving the AM signal or both Always ensure the line is configured for IRIG B AM operation before connecting an IRIG B AM signal Furthermore once the NI PXI 6682 Series is synchronized to IRIG B it can function as an IEEE 1588 grandmaster to synchronize of external 1588 devices The following assumptions are made regarding the received IRIG B signal All conditions must be met for the NI PXI 6682 Series to be able to synchronize accurately e Seconds begin every minute at 0 increment to 59 and then roll over to 0 e Minutes begin every hour at 0 increment to 59 and then roll over to 0 e Hours begin every day at 0 increment to 23 and then roll over to 0 e Days begin every year at 1 Days increment to 365 in non leap years or to 366 in leap years and then roll over to 1 Leap years must be supported Valid values for year are 01 99 inclusive Years are assumed to be in the XXI Century For instance year 09 represents 2009 If the year is not supplied sent as 00 the OS system time is read and the year is derived from it 4 2 ni com Chapter 4 Synchronization To achieve proper synchronization of the NI PXI 6682 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements IEEE 1588 The NI PXI 6682 Series is capable of performing synchronization over
40. he seconds boundary of the synchronized system time You can then use this signal to analyze system performance by connecting two or more pulse per second signals to an oscilloscope and measuring the latency between them Adjustments can be made to account for deterministic latency Refer to the NJ Sync API Reference Help for more information The NI PXI 6682 Series can also timestamp an incoming pulse per second signal The NI PXI 6682 Series will timestamp the externally generated pulse per second with its internal timebase By comparing this timestamp with the nearest seconds boundary you can quickly determine the synchronization performance IEEE 1588 Synchronization Best Practices NI PXI 6682 Series User Manual Network Topology To obtain the best NI PXI 6682 Series performance follow these guidelines to set up the Ethernet network topology e Use short cabling when possible Ethernet cabling is inherently asymmetric the longer the cabling the higher the asymmetry This impacts synchronization performance because the IEEE 1588 protocol assumes a symmetric network path e Use hubs when connecting to multiple IEEE 1588 capable devices Hubs offer low latency and close to deterministic performance for transporting Ethernet traffic This latency is on the order of hundreds of nanoseconds Using switches degrades performance due to 4 4 ni com Chapter 4 Synchronization increased latency and indeterminate performance from the o
41. he year is derived from it To achieve proper synchronization of the NI PXI 6682 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements A 4 ni com Appendix A Specifications PXI_STAR Trigger Characteristics NI PX 6682 only PXI_STAR lt 0 12 gt to PXI_STAR lt 0 12 gt output skew at NI PXI 6682 backplane connector lt 400 ps Asynchronous delays tpa PXI_STAR lt 0 12 gt to PFI lt 0 2 gt output eee 11 ns typical PXI_STAR lt 0 12 gt to PXI_TRIG lt 0 7 gt output 22 to 36 ns typical PXI Trigger Characteristics PXI_TRIG lt 0 7 gt to PXI_TRIG lt 0 7 gt output skew at NI PXI 6682 backplane connector lt 5 ns typical Asynchronous delay tpa PXI_TRIG lt 0 7 gt to PFI lt 0 2 gt output eee 18 to 34 ns typical Timestamping and Time Synchronized Clock Generation Time sychronized clock frequency range eee eee DC to 1 5 MHz Duty Cycle siseses oieri Programmable i Note Clock signals generated on PFI PXI_STAR NI PXI 6682 only or PXI Trigger lines must have a period and duty cycle that is a multiple of 10 ns Minimum pulse width for timestamping 0 ee eee eeeeeeee 36 ns TCXO Characteristics PrOQUCNCY rennara 10 MHz Initial accuracy 0 0 eee eeeeeeteeseeeeneeeeeees 1 ppm This specification applies to all asynchronous routes from the PFI inputs to the PXI_STAR lines Na
42. ime synchronized v v v events and clocks The NI PXI 6682H does not have a CLKIN connector PXI_CLK10_IN or PXI STAR trigger lines Can be accomplished in two stages by routing source to PXI_CLK10_IN replacing PXI_CLK10 with PXI_CLK10_IN occurs automatically in most chassis and then routing PXI_CLK10 to the destination The source must be 10 MHz Asynchronous routes between a single source and multiple destinations are very low skew See Appendix A Specifications for details 1 0 Considerations Using the Ethernet Port The NI PXI 6682 Series provides one standard RJ 45 connection for Ethernet communication This port auto negotiates to the best possible speed 10 Mbps or 100 Mbps The Ethernet port is auto MDI capable which means crossover cabling is not necessary when connecting the NI PXI 6682 Series to another network card The NI PXI 6682 Series senses whether a crossed connection is needed and performs the action internally The Ethernet port also allows for full duplex operation so traffic can be sent and received at the same time National Instruments Corporation 3 11 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview Using Front Panel PFI Terminals as Outputs The front panel PFI output signals use 3 3 V signaling for high impedance loads You can use the PFI terminals to generate future time events and clock signals up to 1 5 MHz PFI output signals are suitable for driving most LEDs To en
43. ine National Instruments Corporation 3 19 NI PXI 6682 Series User Manual Synchronization The NI PXI 6682 Series is capable of achieving tight synchronization with various other devices using GPS IRIG B PPS or IEEE 1588 When GPS or IRIG B are selected as the synchronization source the NI PXI 6682 Series module can also serve as an IEEE 1588 grandmaster The following sections describe the synchronization capabilities of the NI PXI 6682 Series GPS GPS stands for Global Positioning System and it is a system of over 2 dozen satellites in medium Earth orbit that are constantly transmitting signals down to Earth GPS receivers are able to detect these signals and determine location speed direction and time very precisely GPS satellites are fitted with atomic clocks and the signals they transmit to Earth contain timing information This makes the GPS system a precise timing and synchronization source The NI PXI 6682 Series has a GPS receiver which powers an active GPS antenna and receives and processes the RF signals 1 575 GHz from the satellites The GPS receiver then generates a very precise pulse per second PPS that the NI PXI 6682 Series uses to achieve sub microsecond synchronization GPS enables the NI PXI 6682 Series to synchronize PXI systems located far away from each other as long as GPS satellites are visible to the antenna from each location Furthermore once the NI PXI 6682 Series is synchronized to
44. ion Architecture The PXI trigger Bus PXI star triggers and PXI_CLK10 are PXI features that enhance synchronization The PXI trigger bus is a multi drop 8 line bus that goes to every slot The PXI star trigger bus is a set of up to 13 point to point matched length connections between Slot 2 timing slot and every slot starting with slot 3 and up to slot 15 The propagation delay between Slot 2 and each destination slot is matched to within Ins to achieve low skew triggering PXI_CLK10 is a high quality 10 MHz clock that is distributed with low skew to each PXI slot This 10 MHz signal can be sourced from the native PXI backplane oscillator or from a Slot 2 Controller Module installed in Slot 2 such as the NI PXI 6682 The following sections describe in more detail the use of PXI triggers and PXI star triggers with the NI PXI 6682 series 3 14 ni com Chapter 3 Hardware Overview Using the PXI Triggers The PXI trigger bus is a set of 8 electrical lines that go to every slot ina segment of a PXI chassis multi drop up to 8 slots Only one PXI module should drive a particular PXI_Trigger line at a given time The signal is then received by modules in all other PXI slots This feature makes the PXI triggers convenient in situations where you want for instance to trigger several devices at the same time because all modules will receive the same trigger Given the architecture of the PXI trigger bus triggering signals do not reach each
45. ion identifiers are used to separate the different pieces of data transmitted The second s boundary is embedded into the transmission by sending two consecutive position identifiers the beginning of the second position identifier is the second s boundary B 2 ni com Appendix B IRIG Protocol Overview For pulse width modulated systems conventional digital binary signaling is used and mark is defined as the logic high state while space is defined as the logic low state For amplitude modulated systems the source must generate sinusoidal signaling modulating the amplitude such that it has a 10 3 mark space amplitude ratio the range of allowable mark to space ratios is 3 1 to 6 1 The source must phase align the generated sine wave such that the leading edges of bits are coincident with zero crossings of the sine wave Figure B 1 shows an example of transmission of a binary one a binary zero and two position identifiers with the second s boundary at the leading edge of the second position identifier The figure shows the information transmitted using an amplitude modulated signal and a pulse width modulated signal 4 34 2 1 i a 1 4 2 3 4 1 i 1 i 1 i 1 1 0 5m 10m 15m 20m 25m 30m 35m 40m Time 1s 2 o 1 1 1 1 i 1 i 1 0 5m 10m 15m 20m 25m 30m 35m 40m Time Binary one Binary zero Position identifier t Position identifier Second s boundary Figure B 1 IRIG B AM and DC Transmissio
46. ks ensure that PFIO is driven low for at least 5 ms after the line is set up Alternately ensure that the external receiver can tolerate a slow rising edge e Before disabling PFIO set up as an output drive the output low to avoid a very slow ramp down e Any time a route is set up or changed where PFIO is the source or the destination allow for a 5 ms settling time For more information refer to KnowledgeBase 4E9BT88P at ni com support Brief Overview of PXI Synchronization Features PCI eXtensions for Instrumentation PXI is a rugged PC based platform that offers a high performance low cost deployment solution for measurement and automation systems PXI combines the Peripheral Component Interconnect PCI electrical bus with the rugged modular Eurocard mechanical packaging of CompactPCI and adds specialized synchronization buses and key software features National Instruments Corporation 3 13 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview Figure 3 5 provides an overview of the PXI synchronization architecture System Conrtroller Star Trigger Bus 10 MHZ Clock a 35 oD o o DX 5 5 5 FS 8 8 8 go z Ne jo oO lt P gt ttt hi ee ee ee ee 132 Mbytes s 33 MHz 32 bit PCI Bus PXI Trigger Bus 8 lines NI PXI 6682 Series User Manual Figure 3 5 PXI Synchronizat
47. lied sent as 00 the OS system time is read and the year is derived from it To achieve proper synchronization of the NI PXI 6682 Series ensure that the IRIG B source used conforms to the requirements listed above Note that most IRIG B sources conform to these requirements National Instruments Corporation B 5 NI PXI 6682 Series User Manual Technical Support and Professional Services Visit the following sections of the award winning National Instruments Web site at ni com for technical support and professional services National Instruments Corporation Support Technical support at ni com support includes the following resources Self Help Technical Resources For answers and solutions visit ni com support for software drivers and updates a searchable KnowledgeBase product manuals step by step troubleshooting wizards thousands of example programs tutorials application notes instrument drivers and so on Registered users also receive access to the NI Discussion Forums at ni com forums NI Applications Engineers make sure every question submitted online receives an answer Standard Service Program Membership this program entitles members to direct access to NI Applications Engineers via phone and email for one to one technical support as well as exclusive access to on demand training modules via the Services Resource Center NI offers complementary membership for a full year after purchase after which you
48. ls as outputs 3 12 PFI synchronization clock 3 6 physical specifications A 7 power requirement specifications A 8 PPS synchronization 4 3 programming examples NI resources C 1 PXI backplane clock 3 8 PXI star trigger bus See PXI_STAR lt 0 12 gt PXI trigger bus See PXI_TRIG lt 0 7 gt PXI_CLK10 clock generation 3 8 PXI_CLK10_IN routing from the CLKIN connector 3 6 signal description table 3 7 PXI_CLK10_OUT signal description table 3 7 National Instruments Corporation l 3 Index routing to the CLKOUT connector 3 5 PXI_STAR lt 0 12 gt asynchronous routing 3 17 signal description table 3 7 specifications A 5 PXI_TRIG lt 0 7 gt asynchronous routing 3 17 signal description table 3 7 specifications A 5 R recycling hardware A 11 related documentation viii RJ 45 Ethernet connector description 3 6 routing architecture figure 3 10 routing signals front panel triggers using as inputs 3 12 using as outputs 3 12 overview 3 9 possible sources and destinations table 3 11 PXI star triggers 3 16 PXI triggers 3 15 overview 3 13 types asynchronous 3 16 synchronous 3 18 S safety specifications A 10 shock and vibration specifications A 9 signal source 3 10 possible sources table 3 11 software installing 2 1 NI resources C 1 programming choices overview 1 2 NI PXI 6682 Series User Manual Index source possible sources table 3 11 signal 3 10
49. may renew to continue your benefits For information about other technical support options in your area visit ni com services or contact your local office at ni com contact Training and Certification Visit ni com training for self paced training eLearning virtual classrooms interactive CDs and Certification program information You also can register for instructor led hands on courses at locations around the world System Integration If you have time constraints limited in house technical resources or other project challenges National Instruments Alliance Partner members can help To learn more call your local NI office or visit ni com alliance C 1 NI PXI 6682 Series User Manual Appendix C Technical Support and Professional Services Declaration of Conformity DoC A DoC is our claim of compliance with the Council of the European Communities using the manufacturer s declaration of conformity This system affords the user protection for electromagnetic compatibility EMC and product safety You can obtain the DoC for your product by visiting ni com certification e Calibration Certificate If your product supports calibration you can obtain the calibration certificate for your product at ni com calibration If you searched ni com and could not find the answers you need contact your local office or NI corporate headquarters Phone numbers for our worldwide offices are listed at the front of this manual
50. n Example National Instruments Corporation B 3 NI PXI 6682 Series User Manual Appendix B IRIG Protocol Overview IRIG B is one of the most common IRIG standards used The following table describes how the information is transmitted when using IRIG B each second Table B 3 IRIG B Bit Assignments Bit position Information transmitted 0 Position identifier Pp seconds boundary marker 1 4 Units of seconds 6 8 Tens of seconds Position identifier P 10 13 Units of minutes 15 17 Tens of minutes 19 Position identifier P 20 23 Units of hours 25 26 Tens of hours 29 Position identifier P3 30 33 Units of days 35 38 Tens of days 39 Position identifier P4 40 41 Hundreds of days 49 Position identifier P5 50 53 Units of year or control function bits 55 58 Tens of year or control function bits 59 Position identifier P 60 68 Control function bits 69 Position identifier P 70 78 Control function bits 79 Position identifier Pg NI PXI 6682 Series User Manual B 4 ni com Appendix B IRIG Protocol Overview Table B 3 IRIG B Bit Assignments Continued Bit position Information transmitted 80 88 Nine lowest significant bits of time of day in straight binary seconds bit 80 gt 2 bit 88 gt 28 89 Position
51. nal Instruments Corporation 1 1 NI PXI 6682 Series User Manual Chapter 1 Introduction Unpacking The NI PXI 6682 Series is shipped in an antistatic package to prevent electrostatic damage to the module Electrostatic discharge ESD can damage several components on the module UN Caution Never touch the exposed pins of connectors To avoid such damage in handling the module take the following precautions e Ground yourself using a grounding strap or by touching a grounded object e Touch the antistatic package to a metal part of the computer chassis before removing the module from the package Remove the module from the package and inspect the module for loose components or any sign of damage Notify NI if the module appears damaged in any way Do not install a damaged module into the computer Store the NI PXI 6682 Series in the antistatic envelope when not in use Software Programming Choices NI PXI 6682 Series User Manual The NI PXI 6682 Series uses NI Sync software as its driver When programming the NI PXI 6682 Series you can use NI application development environment ADE software such as LabVIEW or LabWindows CVI or you can use other ADEs such as Visual C C to interface with the NI Sync software LabVIEW features interactive graphics a state of the art interface and a powerful graphical programming language The LabVIEW Data Acquisition VI Library a series of virtual instruments for using Lab VIEW wi
52. nboard buffers Synchronization performance across switches can be in the tens of microseconds If a switch must be used obtain a 1588 boundary clock or transparent switch to achieve the best performance These devices allow traffic to cross Ethernet collision domains without the inherent loss in performance from a switch e Ensure that the network is running at 100 Mbps by noting the Speed LED status Synchronization performance is degraded when running at 10 Mbps i Note If it is impossible to use a 100 Mbps network and you must run IEEE 1588 synchronization using a 10 Mbps network ensure the network interface of the NI PXI 6682 Series is explicitly configured for 10 Mbps Full Duplex operation using the Windows configuration panels GPS Synchronization Best Practices The embedded GPS receiver in the NI PXI 6682 Series requires signals from several satellites to be able to compute precise timing and location The more satellites available to the receiver the more precisely it can determine time and location Therefore the location of the antenna should be such that it will receive signals from the greatest number of satellites possible As the number of satellites visible to the antenna decreases the synchronization performance may also decrease The antenna location should be chosen so that the antenna has a clear view of the sky There is no strict definition for clear view of the sky but a suitable guideline is that the GPS antenna sh
53. ncy strays from 1 Hz Synchronization Best Practices The NI PXI 6682 Series can achieve sub microsecond synchronization The following section describes some guidelines for achieving the best possible performance from your NI PXI 6682 Series module While the NI PXI 6682 Series will function properly if you follow the specifications the following guidelines may increase the synchronization performance National Instruments Corporation 4 3 NI PXI 6682 Series User Manual Chapter 4 Synchronization Operating Environment For best synchronization performance follow these operating environment guidelines while taking care to remain within the specified operating temperature limits Ensure the PXI filler panels are properly installed for unused PXI slots Airflow can degrade the NI PXI 6682 Series performance because it tends to cause rapid changes in temperature The NI PXI 6682 Series has precision thermally compensated components but limiting direct airflow helps achieve the best performance Consider placing the PXI chassis containing the NI PXI 6682 Series in an environment free of rapid temperature transitions e Perform the same steps as above to ensure that all other synchronization partners also have a thermally stable environment Timing System Performance The NI PXI 6682 Series can generate or receive a 1 Hz pulse per second signal on any PFI or PXI Trigger terminal You can set up this signal to transition on t
54. nections individually Additionally PFIO can function as an input for IRIG B DC or AM UN Caution Do not connect an AM signal to PFIO when the PFI line is configured for digital operations This could cause damage to the digital circuitry the device driving the AM signal or both Always ensure the line is configured for IRIG B AM operation before connecting an IRIG B AM signal e RJ 45 Ethernet 10 100 Mbit Ethernet connection This connector allows the module to communicate via standard Ethernet cabling UN Caution Connections that exceed any of the maximum ratings of input or output signals on the NI PXI 6682 Series can damage the module the computer or other devices connected to the NI PXI 6682 Series NI is not liable for any damage resulting from such signal connections Hardware Features The NI PXI 6682 Series performs the following functions e Synchronization using GPS IRIG B PPS or IEEE 1588 e Generation of future time events and clock signals e Timestamping incoming signals with the synchronized time e Routing internally or externally generated signals from one location to another Table 3 5 outlines the function and direction of the signals discussed in detail in the remainder of this chapter These signals are also identified in Figure 3 2 NI PXI 6682 Series User Manual 3 6 ni com Chapter 3 Table 3 5 NI PXI 6682 Series I O Terminals Signal Name Direction Description PXI_CLK10_IN
55. ng 1 2 GPS specifications A 6 GPS ANT connector description 3 5 GPS LED color explanation table 3 4 overview 3 4 GPS synchronization 4 1 best practices 4 5 H hardware 1588 LED overview 3 4 ACT LINK LED overview 3 5 block diagram 3 2 configuring 2 2 connector descriptions 3 5 GPS LED overview 3 4 installing 2 1 overview 3 6 Speed LED overview 3 5 NI PXI 6682 Series User Manual l 2 synchronization 4 1 best practices 4 3 GPS 4 1 TEEE1855 4 3 IRIG B 4 1 PPS 4 3 help technical support C 1 T O considerations 3 11 I O terminals table 3 7 IEEE 1588 synchronization 4 3 best practices 4 4 network topology 4 4 installation category 1 4 hardware 2 1 software 2 1 instrument drivers NI resources C 1 IRIG B AM and DC transmission example figure B 3 IRIG B synchronization 4 1 K KnowledgeBase C 1 L LED Link LED 3 5 light emitting diode See LED maximum signal rating caution 3 6 National Instruments support and services C 1 network topology 4 4 ni com NI PXI 6682 Series configuration 2 2 connectors 3 5 functional overview 3 6 installation hardware 2 1 software 2 1 parts locator diagram 3 3 0 operating environment 4 4 P PFI lt 0 2 gt connector description 3 6 connector signals table 3 7 signals asynchronous routing 3 17 specifications A 2 using front panel PFI terminals as inputs 3 12 using front panel PFI termina
56. ould have a straight line of sight to the sky in all directions 360 down to an imaginary line making a 30 angle with the ground Locations far from trees and tall buildings which could reflect GPS satellite signals are best National Instruments Corporation 4 5 NI PXI 6682 Series User Manual Specifications CLKOUT Characteristics Output frequency eens 10 MHz Duty Cy Cle cci toctessszeal hist tenis 45 to 55 Output impedance eects 50 Q nominal Output coupling eects AC Load Square Wave Open Load 5 Vp p typical 50 Q Load 2 5 Vp p typical Square wave rise fall time 10 10 90 0 si 3 ck Net hi ete sheeis 0 5 ns min 2 5 ns max CLKIN Characteristics NI PXI 6682 only CLKIN fundamental frequency 10 MHz sine or square wave Input impedance eee eects teers 50 Q nominal Input Coupling 0 eee cece eeeereeees AC Voltage range oo eee eee cece eeeeereeeeees 400 mV to 5 Vp p Absolute maximum input voltagel 6 Vp p max CLKIN to PXI_CLK10_IN delay 13 ns typical 1 0 ns max Stresses beyond those listed can cause permanent damage to the device Exposure to absolute maximum rated conditions for extended periods of time can affect device reliability Functional operation of the device outside the conditions indicated in the operational parts of the specification is not implied National Instruments Corporation A 1 NI PXI 6682 Series User Manual
57. outing Asynchronous routing is the most straightforward method of routing signals Any asynchronous route can be defined in terms of two signal locations a source and a destination A digital pulse or train comes in on the source and is propagated to the destination When the source signal goes from low to high this rising edge is transferred to the destination after a propagation delay through the module Figure 3 6 illustrates an asynchronous routing operation 3 16 ni com Chapter 3 Hardware Overview Propagation Delay Trigger Input Trigger Output Figure 3 6 Asynchronous Routing Operation Some delay is always associated with an asynchronous route and this delay varies among NI PXI 6682 Series modules depending on variations in temperature and chassis voltage Typical delay times in the NI PXI 6682 Series for asynchronous routes between various sources and destinations are given in Appendix A Specifications Asynchronous routing works well if the total system delays are not too long for the application Propagation delay could be caused by the following reasons e Output delay on the source e Propagation delay of the signal across the backplane s and cable s e Propagation delay of the signal through the NI PXI 6682 Series e Time for the receiver to recognize the signal The source of an asynchronous routing operation on the NI PXI 6682 Series can be any of the following lines e Any front panel PF
58. ppear in this manual Angle brackets that contain numbers separated by an ellipsis represent a range of values associated with a bit or signal name for example AO lt 3 0 gt The symbol leads you through nested menu items and dialog box options to a final action The sequence File Page Setup Options directs you to pull down the File menu select the Page Setup item and select Options from the last dialog box This icon denotes a tip which alerts you to advisory information This icon denotes a note which alerts you to important information This icon denotes a caution which advises you of precautions to take to avoid injury data loss or a system crash When this symbol is marked on the product refer to the Safety Information section of Chapter 1 Introduction for precautions to take Bold text denotes items that you must select or click in the software such as menu items and dialog box options Bold text also denotes parameter names Italic text denotes variables emphasis a cross reference or an introduction to a key concept Italic text also denotes text that is a placeholder for a word or value that you must supply Text in this font denotes text or characters that you should enter from the keyboard sections of code programming examples and syntax examples This font is also used for the proper names of disk drives paths directories programs subprograms subroutines device names functions operations varia
59. r description 3 6 specifications A 1 CLKOUT connector 3 6 description 3 5 signal description table 3 7 specifications A 1 clock and event generation overview 3 8 clock generation PXI_CLK10 and TCXO 3 8 National Instruments Corporation color Link LED color explanation table 3 5 Speed LED color explanation table 3 5 configuring the device overview 2 2 Speed LED 3 5 conventions used in the manual vii D Declaration of Conformity NI resources C 2 destinations possible destinations table 3 11 diagnostic tools NI resources C 1 documentation conventions used in manual vii NI resources C 1 related documentation viii drivers NI resources C 1 E electromagnetic compatibility A 10 environmental management specifications A 11 WEEE information A 11 environmental specifications A 9 equipment getting started 1 1 Ethernet port using 3 11 examples NI resources C 1 F front panel See also CLKIN connector 1588 LED 3 4 ACT LINK LED 3 5 connector descriptions 3 5 GPS LED 3 4 NI PXI 6682 Series User Manual Index NI PXI 6682 Series diagram 3 3 PFI 3 6 Speed LED 3 5 front panel PFI terminals using as inputs 3 12 G generating a clock PXI_CLK10 and TCXO 3 8 generating a clock or event overview 3 8 getting started configuring the device 2 2 equipment 1 1 installing the hardware 2 1 installing the software 2 1 software programming choices 1 2 unpacki
60. re to follow the National Instruments installation operation or maintenance instructions owner s modification of the product owner s abuse misuse or negligent acts and power failure or surges fire flood accident actions of third parties or other events outside reasonable control Copyright Under the copyright laws this publication may not be reproduced or transmitted in any form electronic or mechanical including photocopying recording storing in an information retrieval system or translating in whole or in part without the prior written consent of National Instruments Corporation National Instruments respects the intellectual property of others and we ask our users to do the same NI software is protected by copyright and other intellectual property laws Where NI software may be used to reproduce software or other materials belonging to others you may use NI software only to reproduce materials that you may reproduce in accordance with the terms of any applicable license or other legal restriction Trademarks National Instruments NI ni com and LabVIEW are trademarks of National Instruments Corporation Refer to the Terms of Use section on ni com legal for more information about National Instruments trademarks Other product and company names mentioned herein are trademarks or trade names of their respective companies Members of the National Instruments Alliance Partner Program are business entities independent from N
61. rminals accept native 3 3 V signaling but are 5 V tolerant Use 50 Q source termination when driving signals into PFI terminals The voltage thresholds for the front panel PFI input signals are fixed Refer to Appendix A Specifications for the actual voltage thresholds The front panel PFI input signals can be timestamped on rising falling or both edges of an input signal 3 12 ni com Chapter 3 Hardware Overview Note Regarding PFIO Since PFIO is a dual purpose terminal capable of performing digital I O like the other PFI lines while also being capable of receiving IRIG B AM and DC inputs care is taken to protect the digital circuitry when PFIO is being used as an IRIG B AM input This is achieved with a normally open solid state relay SSR which is closed only when digital operations for the line are enabled through the API Digital operations include setting up routes in which PFIO is the source or the destination enabling timestamping for PFIO and scheduling future time events or clocks for PFIO The SSR has a 5 ms open and close time Therefore care must be taken when using PFIO to ensure correct operation when the SSR is switching To avoid issues due to the SSR switching follow these guidelines e Whenever timestamping begins on PFIO either ensure the input will remain at a logic low state for at least 5 ms or disregard timestamps for at least 5 ms e When setting up PFIO as an output future time events or cloc
62. s fully inserted into the slot Plug in and power on the chassis The NI PXI 6682 Series module is now installed Configuring the Module NI PXI 6682 Series User Manual The NI PXI 6682 Series is completely software configurable The system software automatically allocates all module resources The two LEDs on the front panel provide information about module status The front panel description sections of Chapter 3 Hardware Overview describe the LEDs in greater detail 2 2 ni com Hardware Overview This chapter presents an overview of the hardware functions of the NI PXI 6682 Series shown in Figure 3 1 Ds 2 NI PXI 6682H NI PXI 6682 1 Isometric View of the NI PXI 6682 Series Figure 3 1 NI PXI 6682 Series User Manual 3 1 National Instruments Corporation Chapter 3 Hardware Overview Figure 3 2 provides a functional overview of the NI PXI 6682 Series Notin PXG6BAR e eson e e aet Ee the ea e tenets AC Coupled 1 __ PXI_CLK10_IN j CEKIN Clock Detector Jotteeneetecseescie C 0 Toxo H o CLKOUT AC Coupling PXI_CLK10 x a From GPS GPS RF a Antenna Detector PFIO e T TRGE Not in PXI 6682H Receiver gt ae ee i 1 PXI_STAR lt 0 12 gt
63. se location and timing information National Instruments Corporation G 3 NI PXI 6682 Series User Manual Glossary l IEEE IEEE 1588 in IRIG IRIG B jitter L LabVIEW LED master Measurement amp Automation Explorer MAX NI PXI 6682 Series User Manual hertz the number of scans read or updates written per second Institute of Electrical and Electronics Engineers an IEEE standard used to synchronize separate devices inch or inches Inter Range Instrumentation Group a standard used to transmit precise timing information the rapid variation of a clock or sampling frequency from an ideal constant frequency a graphical programming language light emitting diode a semiconductor light source the requesting or controlling device in a master slave configuration a controlled centralized configuration environment that allows you to configure all of your National Instruments DAQ GPIB IMAQ IVI Motion VISA and VXI devices G 4 ni com 0 oscillator output impedance PCI PFI PPS precision propagation delay PXI PXI star PXI_Trig PXI_Star synchronization clock PXI Trigger National Instruments Corporation G 5 Glossary a device that generates a fixed frequency signal An oscillator most often generates signals by using oscillating crystals but also may use tuned networks lasers or atomic clock sources The most important specifications on oscillators are frequency a
64. slot at precisely the same time A difference of several nanoseconds can occur between slots especially in larger PXI chassis which can have buffers between segments This delay is not a problem for many applications However if your application requires tighter synchronization use the PXI_STAR triggers see next section or use the PXI trigger bus synchronous to PXI_CLK10 The multi drop nature of the PXI trigger bus can introduce signal integrity issues Therefore National Instruments does not recommend the use of PXI_Trigger lines for clock distribution especially for clocks above 20 MHz The preferred method for clock distribution is the use of the PXI_STAR triggers However the NI PXI 6682 Series does support routing of clocks to the PXI_Trigger lines in case you must use them For each PXI_Trigger line configured as an output in the NI PXI 6682 Series the signal source can be independently selected from the following options e PFI lt 0 2 gt e Another PXI trigger line PXI_TRIG lt 0 7 gt e PXI_STAR lt 0 12 gt e Future time events e PXICLK10 e Ground The PXI trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock National Instruments Corporation 3 15 NI PXI 6682 Series User Manual Chapter 3 Hardware Overview Using the PXI Star Triggers NI PXI 6682 only There are up to
65. specifications CE compliance A 11 CLKIN characteristics A 1 CLKOUT characteristics A 1 electromagnetic compatibility A 10 environmental A 9 environmental management A 11 WEEE information A 11 GPS characteristics A 6 online product certification A 11 PFI lt 0 2 gt input characteristics A 2 output characteristics A 2 physical A 7 power requirements A 8 PXI trigger characteristics A 5 PXI_STAR trigger characteristics A 5 safety A 10 shock and vibration A 9 synchronization accuracy A 8 synchronized future time clock generation A 5 TCXO characteristics A 5 timestamping characteristics A 5 Speed LED color explanation table 3 5 overview 3 5 star triggers See PXI_STAR lt 0 12 gt support technical C 1 synchronization accuracy A 8 best practices 4 3 GPS 4 5 TEEE 1588 4 4 network topology 4 4 GPS 4 1 TEEE 1588 4 3 IRIG B 4 1 NI PXI 6682 Series User Manual l 4 PFI synchronization clock 3 18 PPS 4 3 synchronization clock See also PXI_Trig PXI_Star synchronization clock overview 3 18 synchronization considerations operating environment 4 4 timing system performance 4 4 synchronized future time clock generation specifications A 5 synchronous routing overview 3 18 timing diagram 3 19 T TCXO clock generation 3 8 overview 3 8 specifications A 5 technical support C 1 temperature compensated oscillator See TCXO timestamping specifications A 5 timing system performan
66. ssssses 1 1 Wipackim gessa eea e a a R ck eatieh ten sb ab ea ERA E saad isl EA ates 1 2 Software Programming CHOICES 0 cece eeeceeseeeeeneceeeesesseeeseceeceaeeseeeaeceeseeesseseseseeeaees 1 2 Safety Information sses er e E Ee eE E ee nl E EE R R n ATi 1 3 Chapter 2 Installing and Configuring Installing the Soltware iiid eetenstiieh aa aa wide E E R a 2 1 Installing the HardWare iecerei ennea E E OAE EE O i 2 1 Configuring the Modules ivc scsiscicccesseiscensssesesssbegcs roia a R a A i 2 2 Chapter 3 Hardware Overview NI PXI 6682 Seres Front Panel sega oiae ARE E bots veces 3 3 GPS GED EESE A E AE EE a S E Bagel 3 4 T585 LED cece ae terta h a E EA O E E E E 3 4 Speed LED ai tase ee ethics A A N R Sees Reed E A 3 5 ACHEINK LED eeren a E E EEE E EEA 3 5 CONNECOIS x sf ieee cos nene aae aaa e a E A ied tee 3 5 Hardware Features el eano e aO ess eens ses E EE EAE NE A E AE EEEE 3 6 Clock and Event Generation tcann a E E R E E 3 8 PXI CEKO and TEXO prei E EER EREA OREO EE 3 8 Time Synchronized Clock and Event Generation sssssssisssserersssesseserereese 3 9 Routing Sis tial Senere e eset neta E E E E E EE tee aeteds 3 9 Determining Sources and Destinations eseessesesesresesrsresresesresreresreresreseneeses 3 10 VO CONSIGELAL ONS 35 fe 4 sess cows E le cules h ectes E EERE RER EERE E RR 3 11 Using the Ethemet Porte 2scn8 cata ace teins notice el kites 3 11 Using Front Panel PFI Terminals as Outputs eee ee
67. sure proper signaling for fast edge rate signals ensure that the system terminates to 50 on the receiving end Cabling should also be 50 Q impedance In a 50 Q environment the PFI terminals will output less than 3 3 V in the high state Refer to Appendix A Specifications for more information Refer to the NJ Sync User Manual for information on how to set up the PFI lines for output UN Caution Do not attempt to drive signals into PFI terminals set up as outputs Doing so can damage the NI PXI 6682 Series or the device driving the PFI terminal The signal source for each PFI trigger line configured as an output can be independently selected from one of the following options e Another PFI lt 0 2 gt e PXI_TRIG lt 0 7 gt e PXI_STAR lt 0 12 gt NI PXI 6682 only e Future time events e PXI CLK10 e Ground The PFI trigger outputs may be synchronized to CLK10 except when routing future time events Refer to the Choosing the Type of Routing section for more information about the synchronization clock Using Front Panel PFI Terminals as Inputs NI PXI 6682 Series User Manual The front panel PFI terminals can be configured by software to accept input signals Refer to the NI Sync User Manual for information on how to set up the PFI terminals to accept input signals You can use these terminals to timestamp triggers with the synchronized system time or to route signals to other destinations refer to Table 3 6 The input te
68. t NI PXI 6682 eesse One 3U CompactPCI or PXI slot PXI Slot 2 for full functionality NI PXI 6682H ccccceeeeeeeeseseeeeees One 3U CompactPCI PXI or PXIe hybrid slot Weight NI PXI 6682 oreren roana 235 g NI PXI 6682H 0 eee eeeeeeeeeeeees 220 g Front panel connectors NI PXI 6682 ntn at eae unirii Six SMB male 50 Q one standard RJ 45 Ethernet connector NI PXI 6682H zehat Five SMB male 50 Q one standard RJ 45 Ethernet connector Front panel indicators eeeeeeeeeeeeees Two tricolor LEDs green red and amber for GPS and IEEE 1588 status and two green LEDs for Ethernet link status and speed Recommended maximum cable lengths PFI DC to 1 5 MHZ 200 m CLKOUT to CLKIN wee 200 m Ethernet CATS esere 100 m The NI PXI 6682H does not have a CLKIN connector National Instruments Corporation A 7 NI PXI 6682 Series User Manual Appendix A Specifications Power Requirements Voltage V Typical Maximum 3 3 V 450 mA 700 mA 5 V 170 mA 235 mA 12 V 135 mA 180 mA 12 V OA OA Synchronization Accuracy Test Specification GPS 100 ns lt 13 ns standard deviation IEEE 1588 3 m Ethernet direct connection 47 ns lt 10 ns standard deviation IEEE 1588 through a hub3 210 ns lt 35 ns standard deviation IEEE 1588 through a switch35 25 us lt 150 ns standard deviation IRIG B DC 55 ns lt 13 ns standard deviation IRIG
69. tage levels that commonly occur in electrical distribution systems The following is a description of installation categories Installation Category I is for measurements performed on circuits not directly connected to the electrical distribution system referred to as MAINS voltage This category is for measurements of voltages from specially protected secondary circuits Such voltage measurements include signal levels special equipment limited energy parts of equipment circuits powered by regulated low voltage sources and electronics Installation Category II is for measurements performed on circuits directly connected to the electrical distribution system This category refers to local level electrical distribution such as that provided by a standard wall outlet for example 115 V for U S or 230 V for Europe Examples of Installation Category II are measurements performed on household appliances portable tools and similar products Installation Category III is for measurements performed in the building installation at the distribution level This category refers to measurements on hard wired equipment such as equipment in fixed installations distribution boards and circuit breakers Other examples are wiring including cables bus bars junction boxes switches socket outlets in the fixed installation and stationary motors with permanent connections to fixed installations Installation Category IV is for measurements performed
70. th National Instruments DAQ hardware is included with LabVIEW LabWindows CVI is a complete ANSI C ADE that features an interactive user interface code generation tools and the LabWindows CVI Data Acquisition and Easy I O libraries 1 2 ni com Chapter 1 Introduction Safety Information The following section contains important safety information that you must follow when installing and using the product Do not operate the product in a manner not specified in this document Misuse of the product can result in a hazard You can compromise the safety protection built into the product if the product is damaged in any way If the product is damaged return it to National Instruments for repair Do not substitute parts or modify the product except as described in this document Use the product only with the chassis modules accessories and cables specified in the installation instructions You must have all covers and filler panels installed during operation of the product Do not operate the product in an explosive atmosphere or where there may be flammable gases or fumes If you must operate the product in such an environment it must be in a suitably rated enclosure If you need to clean the product use a soft nonmetallic brush The product must be completely dry and free from contaminants before you return it to service Operate the product only at or below Pollution Degree 2 Pollution is foreign matter in a solid liquid
71. the chassis NI PXI 6682 Install the NI PXI 6682 in an available PXI slot The NI PXI 6682 is a star trigger controller for PXI It can replace PXI_CLK10 and control the PXI_STAR triggers This functionality is only available when the NI PXI 6682 is installed in Slot 2 of a PXI chassis The PXI triggers are accessible from any PXI slot NI PX 6682H Install the NI PXI 6682H in an available PXI slot If you are using a PXI Express PXIe system install the NI PXI 6682H in an available PXI or PXIe hybrid slot The PXI 6682H is a special version of the PXI 6682 designed to also fit in hybrid slots on PXIe chassis It does not have the ability to replace PXI_CLK10 or drive the PXI_STAR triggers 2 1 NI PXI 6682 Series User Manual Chapter 2 Installing and Configuring 9 Remove the filler panel for the PXI or PXIe hybrid slot you chose in step 2 Ground yourself using a grounding strap or by touching a grounded object Follow the ESD protection precautions described in the Unpacking section of Chapter 1 Introduction Remove any packing material from the front panel screws and backplane connectors Insert the NI PXI 6682 Series module into the PXI PXIe hybrid slot Use the injector ejector handle to fully insert the module into the chassis Screw the front panel of the module to the front panel mounting rail of the chassis Visually verify the installation Make sure the module is not touching other modules or components and i
72. tional Instruments Corporation A 5 NI PXI 6682 Series User Manual Appendix A Specifications Temperature stability 0 to 55 C 1 ppm Aging per year oe eeceeeeeeeeeeseeeeeeeereeees 1 ppm GPS Recommended GPS antenna Trimble Bullet HI DC voltage output for antenna 5V RF GPS signal frequency ee 1575 42 MHz 1 023 MHz Input impedance eee eeeeeeeeeees 50 Q nominal Accuracy PPS oiistie aia ahi EE Within 15 ns to GPS UTC 1 Sigma Horizontal position cece lt 6 m 50 lt 9 m 90 Altitude position 0 0 cee ceeeeeeeeeeneees lt 11 m 50 lt 18 m 90 Velocity ss dvssesscazsees Menegtotnaatensveides lense 0 06 m s Trimble Bullet III Gain at 1575 42 MHZ eee 35 dB 3 dB Current requirement 5 V uu cesses 30 mA maximum VSWR irronneen 2 0 maximum be C1022 5 0 re Right hand circular polarization RHCP Signal strength required At PRIRGOS2 isinsin aeann 18 dB Maximum allowable cable signal loss at 1575 42 MHz 17 dB 3 Note The GPS antenna kit offered by National Instruments comes with a 30 m cable which has a loss of 15 dB 100 ft making the total loss in the cable approximately 14 8 dB If your GPS antenna installation requires a longer cable ensure that the loss per unit of distance is lower such that the total signal loss is under 17 dB NI PXI 6682 Series User Manual A 6 ni com Appendix A Specifications Physical Chassis requiremen

NI PXI-6682 Series User Manual

Contents

Download Pdf Manuals

Related Search

Related Contents