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Enhanced OS-9 for 68K Processors MVME Board Guide

1. 16 J12 n 11 1 2 15 16 CONFIGURATION 2 256K x 8 EPROMs 1 2 15 16 CONFIGURATION 5 1M x 8 EPROMs ONBOARD FLASH DISABLED 15 16 CONFIGURATION 4 1M x 8 EPROMs OS 9 ROM Setting J11 162BUG INSTALLED GP100 1 2 REFER 162BUG MANUAL GPIO1 ERG REFER TO 162BUG MANUAL GPIO2 REFER 162BUG MANUAL GPIO3 7 8 IN FLASH OUT EPROM GPIO4 ___ USER DEFINABLE 5 USER DEFINABLE GPIO6 USER DEFINABLE GPIO7 15 ES 16 EPROMs Selected factory configuration Figure 2 7 System Controller Select Header J1 The MVME162LX is factory configured as a VMEbus system controller a jumper is installed across pins 1 and 2 of header J1 Remove the J1 jumper if the MVME162LX is not to be the system controller Note when the MVME162LX is functioning as system controller the SCON LED is turned on Note For MVME162LXs without the optional VMEbus interface i e with no VMEchip2 the jumper may be installed or removed without affecting normal operation Z MICROWARE Figure 2 6 General Purpose Readable Jumpers Header J11 USER CODE INSTALLED USER DEFINABLE USER DEFINABLE USER DE
2. This section contains information about the MVME167 models It contains the following sections MVME167 Quick Reference Overview of the MVME167 CPU Module ROM Configuration and Organization Board Specific OS 9 Modules Configuring 167Bug to Boot RomBug ZA MICROWARE Z MICROWARE MVME167 Quick Reference Ports Directory lt mwos gt OS9 68040 PORTS MVME167 Console Port Location MVME712 connector labeled console OS 9 EPROM Size 2 256K X 16 bits 1 Megabyte total No flash Option ROM Booting Search Order FF800400 FF808400 FFA00400 FFA08400 BootP Ethernet booting device ie SPF Ethernet descriptor name spieO CMDS Build sequence mwos OS9 68000 CMDS mwos OS9 68020 CMDS mwos OS9 68040 CMDS lt mwos gt 0S9 68040 PORTS MVME167 CMDS Overview of the MVME167 CPU Module The MVME167 CPU module provides 68040 processor running at 25MHz or 33Mhz with on chip 8K cache MMU and FPU e 4 8 16 or 32M bytes of on board DRAM e 128K Bytes of on board Static RAM e 4 RS 232C serial ports Centronics parallel printer port On board SCSI I O processor e On board Ethernet processor Time of day clock calendar with battery backup 8Kx8 battery backed CMOS RAM NVRAM The OS 9 for 68K area of NVRAM is the first 256 bytes of the user area beginning at FFFCOOOO Four 44 pin PLCC 16 bit EPROM sockets organized as two banks of 32 bit wide high and low word memory Primary
3. Step 5 Step 6 The MVME162 can be reset from either the 162Bug in flash memory or the RomBug in PROM The jumper at J22 pins 9 amp 10 switches the address space between these two devices Once 162Bug has been coldstarted RomBug can be booted from the 162Bug by configuring 162Bug s environment as described in a later section of this manual Examine and change jumpers on the CPU module In general the jumper settings for the MVME162 module should remain the same as the factory default settings or configured specifically for your needs Reinstall the CPU module Complete hardware installation Once the PROM is installed and jumper configuration is completed carefully read the MVME162 Embedded Controller User s Manual to complete the hardware installation steps required for the P2 Adaptor card if used and the MVME712M Transition Module Note Use of the second serial port requires the installation of a serial line driver module at J10 on the CPU module Consult your Motorola representative for details Installing the MVME162LX CPU Module EPROM method Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Remove power from the system and eject the CPU module Installthe OS 9 PROM in XU24 and configure J12 for configuration 4 See Figure 2 5 IMPORTANT Retain the 162Bug PROM for future use Optional Select the PROM as the reset bank Remove the jumper at J11 pins 7 amp 8 Save the jumper by i
4. and built in this directory and its subdirectories The board specific drivers available for the MVME172 include tk172 rtcl72 sc172 scsil72 sp172 System ticker Real time clock driver SCF serial port driver SCSI low level driver Ethernet driver Other system modules available for use on the board residing in common directories include cache060 ssm060 ssm060_cbsup fpsp060 fpu Cache control module SSM for the 68060 PMMU Same as above with cache copyback for supervisor state Floating point support package for 68060 board versions Floating point emulation for 68LC060 board versions Installing the MVME172 CPU Module EPROM Method Step 1 Step 2 Step 3 Step 4 Remove power from the system and eject the MVME172 CPU module Install the PROM s On FX models insert the EPROM in socket XU2 On LX models insert the EPROM in socket XU1 IMPORTANT Retain the 172Bug EPROM for future use Set EPROM Jumpers On FX models set jumper J23 to connect pins 1 and 2 On LX models set jumpers J20 to Configuration 4 Note The 32 pin PROM used with the MVME172FX requires special considerations when inserting or removing and during handling A special extraction tool is required to remove the device from its socket When handling and inserting the PROM be careful not to damage or bend the pins on the PROM Optional Select the PROM as the reset bank On FX models Remove the jumper at J22
5. remove all jumpers from J13 except for storage J13 J13 J13 2 6 2 6 2 6 mmm REED 1 5 1 5 1 5 Primary Source Onboard Battery Backup Power Disabled Primary Source VMEbus 5V STBY Secondary Source Onboard Battery For storage only Secondary Source VMEbus 5V STBY Factory configuration J13 J13 2 6 6 2 i 1 5 5 1 Primary Source VMEbus 5V STBY Primary Source Onboard Battery Secondary Source Onboard Battery Secondary Source VMEbus 5V STBY Figure 2 10 Backup Power Configurations The following backup power configurations are available for the 2MB mezzanine SRAM through header J1 located on the mezzanine In the factory configuration the onboard battery serves as secondary power source CAUTION Removing the jumper may temporarily disable the SRAM Do not remove the jumpers from J1 except for storage J1 J1 J1 3 3 3 Onboard Battery Backup Power Disabled VMEbus 5V STBY Factory configuration For storage only Z ROM Configuration and Organization On the original and FX MVME162 either flash memory when available or the PROM socket can be selected as the primary ROM bank with a jumper Typically Motorola ships the MVME162 wi
6. 51 Download Boot Image using NIOP Command 52 Program OS 9 ROM Image into Flash Memory Enhanced OS 9 for 68K Processors MVME Board Guide 3 Chapter 3 Z MICROWARE MVME167 Reference 53 54 55 58 59 60 63 63 Chapter 4 MVME167 Quick Reference Overview of the MVME167 CPU Module ROM Configuration and Organization Board Specific OS 9 Modules Installing the MVME167 CPU Module Configuring 167Bug to Boot RomBug Configuring 167Bug to Boot RomBug MVME172 Reference 67 68 69 75 76 77 79 80 82 82 Chapter 5 MVME172 Quick Reference Overview of the MVME172 CPU Models ROM Configuration and Organization Board Specific OS 9 Modules Installing the MVME172 CPU Module EPROM Method Installing the MVME172 CPU Module Flash programming method Downloading RomBug From a Host Over a Serial Interface Configuring 172Bug to Boot RomBug Configuring 172Bug to Boot RomBug MVME177 Reference 87 88 89 92 94 95 MVME177 Quick Reference Overview of the MVME177 CPU Module ROM Configuration and Organization Board Specific OS 9 Modules Installing the MVME177 CPU Module Enhanced OS 9 for 68K Processors MVME Board Guide 99 99 100 102 102 Chapter 6 Installing RomBug into Flash Downloading RomBug from a Host over an Ethernet Network Downloading RomBug from a Host Over a Serial Interface Configuring 177Bug to Boot RomBug Configuring 177Bug to Boot RomBug Peripheral and Transition Module Configurations
7. 52 5 RE ABC31 M J6 J7 2 1712 516 ABC P2 3 1 J8 J9 3 ABC32 ROM Configuration and Organization There are two possible ROM configurations for the MVME147 As the system installer you must choose which ROM configuration to adopt depending on your system application The first retains the 147Bug ROMs in the primary bank for ease of hardware diagnostic testing and adds the OS 9 RomBug EPROMs in the secondary bank In this configuration 147Bug gets control on a reset and boots RomBug in the secondary bank see the Configuring 147Bug to Boot RomBug section The second configuration replaces the 147Bug EPROMs with the OS 9 RomBug EPROMs in the primary bank In this configuration RomBug always gets control on a reset Figure 1 3 MVME 147 RomBug EPROM Address Space RomBug and i pace System Booters 8K Bytes Embedded OS 9 Bootfile 896 Bytes Z MICROWARE Installing the MVME147 CPU Module Step 1 Step 2 Step 3 Remove power from the system and eject the CPU module Install the EPROMs on the MVME147 module For the MVME147 not S models the primary bank of sockets U1 high or even byte and U2 low or odd byte The secondary bank of sockets are U16 high byte and U18 low byte For the MVME147S models the primary bank of sockets are U22 high or even byte and U30 low or odd byte The secondary bank of socke
8. B B B B B B Bo Bo Bo Bo Networ Networ Networ Networ Networ Memory Memory Memory Memory Memory Memory Memory Memory Base Address of Size of Local Memory Board 0 Size of Local Memory Board 1 Slave Slave Slave Slave Slave Slave Slave Slave Slave Slave Slave Slave Master Master Master Master Master Master Master Master Master Z Y N N lt return gt Y N N lt return gt A lt return gt Y lt return gt A S N Y N II oot Enable Y N N lt return gt oot at power up only Y N Y lt return gt oot Controller LUN 00 lt return gt oot Device LUN 00 lt return gt oot Abort Delay 15 lt return gt oot Default String NULL for a empty string lt return gt ot Enable Y N N Y lt return gt ot at power up only Y N Y N lt return gt ot Enable search of VMEbus Y N N lt return gt ot Abort Delay 0 3 lt return gt ot Direct Starting Address FF800000 FFA00400 lt return gt ot Direct Ending Address FFDFFFFC FFA00500 lt return gt k Auto Boot Enable Y N N lt return gt k Auto Boot at power up only Y N Y lt return gt k Auto Boot Controller LUN 00 lt return gt k Auto Boot Device LUN 00 lt return gt k Auto Boot Abort Delay 5 lt return gt k Auto Boot Configuration Parameters Pointer NVRAM 00000000 lt return gt Search Starting Address 00000000 FFE00000 return Searc
9. Bank FF800000 High Word XU1 Low Word XU2 Secondary Bank FFA00000 High Word XU3 Low Word XU4 Z MICROWARE Motorola has numerous variations of the board These boards are differentiated by the amount of RAM memory installed the speed of the processor and the design revisions of the board A representative list of module numbers are listed in Table 3 1 Table 3 1 MVME167 Models and Processor Information CPU Model Memory Size Processor Speed MVME167 4M 25mhz MVME167A 8M 25mhz MVME167B 16M 25mhz MVME167C 32M 25mhz MVME167 01 4M 25mhz MVME167 02 8M 25mhz MVME167 03 16M 25mhz MVME167 04 32M 25mhz MVME167 31 4M 33mhz MVME167 32 8M 33mhz MVME167 33 16M 33mhz MVME167 34 32M 33mhz Figure 3 1 MVME167 Jumper Block Locations AQ Ups ife 2 61 40 61 40 61 40 61 40 Nc Gu 39 7 7 39 7 39 17 29 17 29 17 SKT 29 17 SKT 59 DSJ n 18 28 18 28 18 28 18 28 053 26 1 DS4 J2 l 5 20 119 J3 ABC3 2 51 52 59 160 ABC J4 Mezzanine Board 1502 59 60 P2 J5 1412 3 1 o J6 ABC32 4 Ser GH a LI Z ROM Configuration and Organization There two possible ROM configurat
10. Boot Device LUN 00 lt return gt Auto Boot Abort Delay 15 lt return gt Auto Boot Default String NULL for ROM Boot Enable Y N ROM Boot at power up only Y N ROM Boot Enable search of VMEbus ROM Boot Abort Delay ROM Boot Direct Starting Address ROM Boot Direct Ending Address Network Auto Boot Enable Y N a empty string lt return gt N Y return Y N lt return gt Y N N lt return gt Network Auto Boot at power up only Network Auto Boot Controller LUN Network Auto Boot Device LUN Network Auto Boot Abort Delay 0 3 lt return gt FF800000 FFA00400 return FFDFFFFC FFA00500 lt return gt N lt return gt Y N Y lt return gt 00 lt return gt 00 lt return gt 5 lt return gt Network Auto Boot Configuration Parameters Pointer NVRAM Memory Search Starting Address Memory Search Ending Address Memory Search Increment Size Memory Search Delay Enable Y N Memory Search Delay Address Memory Size Enable Y N Memory Size Starting Address Memory Size Ending Address Base Address of Local Memory Size of Local Memory Board 0 Size of Local Memory Board 1 00000000 FFE00000 return 00010000 FFE10000 return 00010000 return N return FFFFCEOF return Y return 00000000 return 0xx00000 return 00000000 return 0xx00000 return 0xx00000 return Slave Enable 41 Y N Y N return Slave Starting Address 1 000000
11. Ethernet driver Other system modules available for use on the board which reside in common directories are cache030 cache control module ssm851 SSM for the 68030 PMMU fpu floating point emulation for CPU modules without 68882 FPU chip HM Note When starting the SoftStax LAN Communications Pak TCP IP networking on the MVME147 using the startspf ndbmod example shell script the device name should be changed from sple0 as shown below ndbmod interface add enetO0 address 192 168 0 5 netmask 255 255 255 0 binding sple0 enet Chapter 2 MVME162 Reference This section contains information about the MVME162 original FX and LX models It contains the following sections MVME162 Quick Reference Overview of the Original and FX MVME162 CPU Models Overview of the MVME162 LX CPU Models ROM Configuration and Organization Board Specific OS 9 Modules Installing the Original or FX Series MVME162 CPU Module EPROM Method Installing the MVME162LX CPU Module EPROM method Installing the MVME162 CPU Module Flash programming method Configuring 162Bug to Boot RomBug ZA MICROWARE Z MICROWARE MVME162 Quick Reference Ports Directory lt mwos gt OS9 68040 PORTS MVME162 Console Port Location Faceplate connector labeled console OS 9 EPROM Size 1 megabyte X 8 bits Original and FX models EPROM available On some models PROM size may be restricted to 512K and the OS 9 Rombug imag
12. LX Models and Processor Information continued DRAM SRAM Flash Model Processor Size amp Type Size Options 1MB MVME162 270 LC040 none 2MB 1MB MVME162 271 LC040 none 2MB SCSI 1MB MVME162 272 LC040 none 2MB Enet 1MB MVME162 273 LC040 none 2MB Enet SCSI 1MB MVME162 280 040 none 2MB 1MB MVME162 281 040 none 2MB SCSI 1MB MVME162 282 040 none 2MB Enet 1MB MVME162 283 040 none 2MB Enet SCSI Z MICROWARE Figure 2 4 MVME162 Switch Header Connector FUse and LED Locations 2xx series 0 Fl gt B 88 s Ow J5 J2 9 me 23 11174 x t NO 2 N R ol J7 gt ex o FA o BR RB ES amp IC C Pa a 44 44 4 1 e E Jil J12 _ P gt lt J14 aa 115 115 P2 Es 38 FEED _ Figure 2 5 EPROM Flash Configuration Header J12 15 CONFIGURATION 1 J12 16 128K x 8 EPROMs 15 CONFIGURATION 3 512K x 8 EPROMs J12
13. N return Remote Start Method Switch G M B N B N return MVME172 Reference Probe System for Supported I O Controllers Y N Y N lt return gt Negate VMEbus SYSFAIL Always Y N N lt return gt Local SCSI Bus Reset on Debugger Startup Y N Local SCSI Bus Negotiations Type A S N Industry Pack Reset on Debugger Startup Y N Ignore CFGA Block on a Hard Disk Boot Y N N lt return gt A lt return gt Y N lt return gt Y return lI II II Auto Boot Enable Y N N lt return gt Auto Boot at power up only Y N Y lt return gt Auto Boot Controller LUN 00 lt return gt Auto Boot Device LUN 00 lt return gt Auto Boot Abort Delay 15 lt return gt Auto Boot Default String NULL for a empty string lt return gt ROM Boot Enable Y N N Y lt return gt ROM Boot at power up only Y N Y N return ROM Boot Enable search of VMEbus Y N N lt return gt ROM Boot Abort Delay 0 5 lt return gt ROM Boot Direct Starting Address FF800000 FFA00400 return ROM Boot Direct Ending Address FFDFFFFC FFA00500 lt return gt Network Auto Boot Enable Y N N return Network Auto Boot at power up only Y N Y return Network Auto Boot Controller LUN 00 return Network Auto Boot Device LUN 00 return Network Auto Boot Abort Delay 5 return Network Auto Boot Configuration Parameters Pointer NVRAM 00000000 FFE10000 lt return gt M
14. Startup Y N N lt return gt Ignore CFGA Block on a Hard Disk Boot Y N Y lt return gt Auto Boot Enable Y N N lt return gt Auto Boot at power up only Y N Y lt return gt Auto Boot Controller LUN 00 lt return gt Auto Boot Device LUN 00 lt return gt Auto Boot Abort Delay 15 lt return gt Auto Boot Default String NULL for a empty string lt return gt ROM Boot Enable Y N N Y lt return gt ROM Boot at power up only Y N Y N lt return gt ROM Boot Enable search of VMEbus Y N N lt return gt ROM Boot Abort Delay 0 3 lt return gt For the original and FX series boards the following two entries apply ROM Boot Direct Starting Address FF800000 FFA00400 return ROM Boot Direct Ending Address FFDFFFFC FFA00500 lt return gt For the LX series boards the following two entries apply ROM Boot Direct Starting Address FF800000 FF900400 lt return gt ROM Boot Direct Ending Address FFDFFFFC FF900500 return Network Auto Boot Enable Y N N return Network Auto Boot at power up only Y N Y return Network Auto Boot Controller LUN 00 return Network Auto Boot Device LUN 00 return Network Auto Boot Abort Delay 5 return Network Auto Boot Configuration Parameters Pointer NVRAM 00000000 return Memory Search Starting Address 00000000 FFEO00000 return Memory Search Ending Address 00010000 FFE10000 return Memory
15. abort delay and then release the ABORT switch Enhanced OS 9 for 68K Processors MVME Board Guide 85 4 MVME172 Reference MICROWARE 86 Enhanced OS 9 for 68K Processors MVME Board Guide Chapter 5 MVME177 Reference This section contains information about the MVME177 models It includes the following sections MVME177 Quick Reference Overview of the MVME177 CPU Module ROM Configuration and Organization Board Specific OS 9 Modules Installing RomBug into Flash Configuring 177Bug to Boot RomBug ZA MICROWARE Z MICROWARE MVME177 Quick Reference Ports Directory lt mwos gt OS9 68060 PORTS MVME177 Console Port Location MVME712 connector labeled console OS 9 Prom Size 1 megabyte always programmed into Flash ROM Booting Search Order FF800400 FF808400 FFA00400 FFA08400 BootP Ethernet booting device ie SPF Ethernet descriptor name spieO CMDS Build sequence mwos OS9 68000 CMDS mwos OS9 68020 CMDS mwos OS9 68060 CMDS mwos OS9 68060 PORTS MVME177 CMDS Overview of the MVME177 CPU Module The MVME177 CPU module provides 68060 processor running at 50MHz 4 8 16 32 64 or 128MB of on board DRAM 128KB of on board Static RAM e 4RS 232 serial ports 8 bit bi directional parallel port On board SCSI bus interface with DMA e On board Ethernet transceiver interface with DMA Time of day clock calendar with battery backup 8KB by 8 battery backed CMO
16. board residing in common directories include cache040 ssm040 ssm040_cbsup fpsp040 Cache control module SSM for the 68040 PMMU Same as above with cache copyback for supervisor state Floating point support package for 68040 CPU chips Z MICROWARE Installing the MVME167 CPU Module Step 1 Step 2 Step 3 Remove power from the system and eject the CPU module Install the EPROM labeled HIGH in socket XU1 Install the EPROM labeled LOW in socket XU2 If you desire you may leave the Motorola PROMs in U1 and U2 The OS 9 RomBug ROMs can co exist with the Motorola PROMS Install the EPROM labeled HIGH in socket XU3 and the EPROM labeled LOW in XU4 Note If you choose this method you must also complete the Configuring 167Bug to Boot RomBug section WARNING The 44 pin EPROMs used with the MVME167 require special considerations when inserting or removing and during handling A special extraction tool is required to remove the devices from their sockets When handling and inserting the EPROMs be careful not to damage or bend the pins on the EPROMs Set jumpers In general the jumper settings for the MVME167 module should remain the same as the factory default settings or configured specifically for your needs Step 4 Step 5 Figure 3 3 MVME167 Jumper Settings Software Readable Header Jumper Block J1 Note Unused by Microware 2 4 6 8 10 12 14 16 J1 1 to 2 3 to 4 5to 6 7
17. factory configuration S 32 1 3 1 2 1 Backup Battery A WARNING Do not remove all of the jumpers from J2 or your SRAM becomes disabled System Control Selection Jumper Block J6 System Controller Auto System Controller Not System Controller Factory Configuration Figure 1 3 MVME177 Jumper Settings continued Thermal Sensing Pins Jumper Block J7 The thermal sensing pins THERM1 and THERM2 are connected to internal thermal resistor to provide information about the average temperature of the processor Refer to the M68000 Microprocessors User s Manual for additional information on the use of these pins EPROM Flash Configuration Jumper Block J8 a 1MB PROM and 2MB Flash enabled 4MB Flash enabled Factory Configuration Serial Port 4 Clock Configuration Select Headers J9 Jumper 2 3 to receive RTXC4 Factory Configuration J10 Jumper 2 3 to receive TRXC4 Factory Configuration J9 Jumper 1 2 to drive RTXC4 J10 Jumper 1 2 to drive TRXC4 Jumper Block J9 Jumper Block J10 Step 4 Reinsert the CPU module into the system Step 5 Complete hardware installation b MVME177 Reference Z MICROWARE Step 6 98 For More Information Carefully read the MVME1
18. gt P A Base Address 00000000 lt return gt P B Base Address 00000000 lt return gt P C Base Address 00000000 lt return gt P D Base Address 00000000 lt return gt P D C B A Memory Size 00000000 lt return gt P D C B A General Control 00000000 lt return gt P D C B A Interrupt 0 Control 00000000 lt return gt P D C B A Interrupt 1 Control 00000000 return Update Non Volatile RAM Y N Y lt return gt Reset Local System CPU Y N Y return Z MICROWARE 00000000 lt return gt 00000000 lt return gt The system resets twice after responding to the last prompt each time with a three second delay during which the operator may abort the ROMboot process by pressing lt break gt then RomBug is entered Resetting from RomBug brings the operator back to 172Bug with another opportunity to interrupt the automatic ROMboot Once configured RomBug can manually be booted from 172Bug by entering the RB command at the 172 Bug gt prompt MVME172 Reference Note All of the above 172Bug entries are explained in the 172Bug User s Manual Note An ABORT RESET sequence disables an automatic ROM Boot sequence As a result it cannot be used alone to force an OS 9 RomBug reconfiguration session when 172Bug is in the primary ROM bank To force a reconfiguration session from 172Bug press and hold the ABORT switch enter the RB command wait at least as long as the ROMboot
19. is detailed in Table 2 1 If a particular application requires a different setup RomBug can be rebuilt with a customized initext module to fit the application s requirements Z MICROWARE Table 2 1 MVME162 Original and FX Model IP Slots IP Slot Memory Base Interrupt Level A C0000000 5 B C0800000 4 C C1000000 3 D C1800000 2 All slots are set for Memory Size 8M Bytes Memory Width 16 Bits Interrupts Level sensitive Normal Polarity Recovery Time 0 microseconds The original models differ by the amount of RAM memory installed the type of the processor and support for SCSI and or Ethernet on the board Original series boards operate at 25 MHz while the FX boards operate at 32 MHz A representative list of model numbers are listed in Table 2 2 MVME162 Original and FX Models and Processor Information Table 2 2 MVME162 Original and FX Models and Processor Information DRAM Size Model Processor and Type I O Options MVME162 001 LC040 1MB Parity MVME162 002 68040 1MB Parity MVME162 003 LC040 1MB Parity No VME interface MVME162 010 A LC040 4MB Parity MVME162 011 A LC040 4MB Parity SCSI MVME162 012 A LC040 4MB Parity Enet MVME162 013 A LC040 4MB Parity Enet SCSI MVME162 014 A LC040 4MB Parity No VME interface MVME162 020 A 040 4MB Parity MVME162 021 A 040 4MB Parity SCSI MVME162 022 A 040 4MB Parity Enet MVME162 023 A 040 4MB Parity Enet SCSI MVME162 026 A 040 4MB Parity Enet No VME MVME162 030 LC04
20. pins 9 amp 10 Save the jumper by installing it only on pin 10 Z MICROWARE M Note Step 5 Step 6 Step 7 The MVME172 can be reset from either the 172Bug in flash memory or the RomBug in PROM The jumper at J28 pins 8 amp 9 on FX models and at J21 pins 9 amp 10 on LX models switches the address space between these two devices Once 172Bug has been coldstarted RomBug can be booted from the 172Bug by configuring 162Bug s environment as described in a later section of this manual Examine and change jumpers on the CPU module In general except for EPROM size the jumper settings for the MVME172 module should remain the same as the factory default settings or configured specifically for your needs Reinstall the MVME172CPU module Complete hardware installation Once the PROM is installed and jumper configuration is completed carefully read the MVME172 Embedded Controller User s Manual to complete the hardware installation steps required for the P2 Adaptor card if used and the MVME712M Transition Module Note Jumper installation details for the MvME7 12M module are supplied in the support module appendix However carefully read the Motorola supplied documentation to ensure all hardware cabling requirements are correctly satisfied Installing the MVME172 CPU Module Flash programming method Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Step 8 Step 9 Remo
21. return gt Master Control 3 00 lt return gt Master Enable 4 Y N N lt return gt Master Starting Address 4 00000000 lt return gt Master Ending Address 4 00000000 lt return gt Master Address Translation Address 4 00000000 lt return gt Master Address Translation Select 4 00000000 lt return gt Master Control 4 00 lt return gt Short I O VMEbus A16 Enable Y N Y N lt return gt Short I O VMEbus A16 Control 00 lt return gt F Page VMEbus A24 Enable Y N Y N lt return gt F Page VMEbus A24 Control 00 lt return gt ROM Speed Bank A Code 00 lt return gt ROM Speed Bank B Code 00 lt return gt Static RAM Speed Code 00 lt return gt PCC2 Vector Base 05 lt return gt VMEC2 Vector Base 1 06 lt return gt VMEC2 Vector Base 2 07 lt return gt VMEC2 GCSR Group Base Address CC lt return gt VMEC2 GCSR Board Base Address 00 lt return gt VMEbus Global Time Out Code 01 lt return gt Local Bus Time Out Code 00 lt return gt VMEbus Access Time Out Code 02 lt return gt Update Non Volatile RAM Y N Y Reset Local System CPU Y N Y The system resets twice after responding to the last prompt each time with a three second delay during which the operator may abort the ROMboot process by pressing lt break gt then RomBug is entered Resetting from RomBug brings the operator back to 167Bug with another opportunity to interrupt
22. with the NroP Network I O Physical command Specify a read with the rombugger file path toa load address of 100000 If an error occurs repeat the transfer until successful Step 12 When the previous command is complete enter the command to program the image into flash 172 Bug gt PFLASH 100000 100000 FFAO00000 B Step 13 When programming is complete enable ROM booting by entering the ENV command Specify the starting address as FFA00400 and the ending address as FFA00500 You should include a delay count of three 3 seconds to give yourself time to interrupt an automatic ROM boot to regain access to the 172Bug debugger For More Information This is explained in more detail in the next section Configuring 172Bug to Boot RomBug Downloading RomBug From a Host Over a Serial Interface Step 1 Perform steps 1 6 from Flash programming method above Step 2 Connect a serial line from the development host to serial port 2 of the MVME 172 board The host s port should be configured to 9600 baud 8 data bits one stop bit no parity and Flow Control XON XOFF enabled Step 3 Initiate the reception of the image on the MVME172 board with the following command 172 Bug LO 1 100000 Step 4 Step 5 On the development host initiate transmission of the rombugger file with the following type of command binex s 2 rombugger gt lt port gt The output of the binex command is redirected to the output p
23. 0 8MB Parity Imes MVME162 031 LC040 8MB Parity SCSI MVME162 032 LC040 8MB Parity Enet MVME 162 033 LC040 8MB Parity Enet SCSI MVME162 040 040 8MB Parity MVME162 041 040 8MB Parity SCSI MVME162 042 040 8MB Parity Enet MVME162 043 040 8MB Parity Enet SCSI MVME162 510 040 4MB No Parity Z MICROWARE Table 2 2 MVME162 Original and FX Models and Processor Information continued DRAM Size Model Processor and Type Options MVME162 511 040 4MB No Parity SCSI MVME162 512 040 4MB No Parity Enet MVME162 513 040 4MB No Parity Enet SCSI MVME162 520 040 8MB No Parity MVME162 521 040 8MB No Parity SCSI MVME162 522 040 8MB No Parity Enet MVME162 523 040 8MB No Parity Enet SCSI MVME162 530 040 16MB No Parity MVME162 531 040 16MB No Parity SCSI MVME162 532 040 16MB No Parity Enet MVME162 533 040 16MB No Parity Enet SCSI Figure 2 1 MVME162 Jumper Block Locations 0xx and 5xx series IN a JA 1 B J5 16 DS1 1 DS2 Fl 053 1 L DS4 tt m
24. 00 return Slave Ending Address 1 OxxFFFFF return Slave Address Translation Address 1 Slave Address Translation Select 41 Slave Control 1 return Slave Enable 2 Y N N return 00000000 return Fxx00000 return II Slave Starting Address 2 00000000 lt return gt Slave Ending Address 2 00000000 lt return gt Slave Address Translation Address 2 Slave Address Translation Select 2 Slave Control 2 0000 lt return gt 00000000 return 00000000 return ll Master Enable 41 Y N Y N lt return gt Master Starting Address 1 0xx00000 return Master Ending Address 1 Master Control 41 00 return 00000000 return Master Enable 42 Y N N return Master Starting Address 2 00000000 return Master Ending Address 42 00000000 return Master Control 42 00 return Master Enable 43 Y N N return Master Starting Address 3 Master Ending Address 43 Master Control 43 00 return II 00000000 return 00000000 return Enhanced OS 9 for 68K Processors MVME Board Guide 00000000 return 103 Z MICROWARE Master Enable 4 Y N N lt return gt Master Starting Address 4 00000000 lt return gt Master Ending Address 4 00000000 lt return gt Master Address Translation Address 4 00000000 lt return gt Master Address Translation Select 4 00000000 lt return g
25. 10 and associated P2 adaptor module Consult the appropriate Motorola supplied manuals to determine the correct cabling and physical mounting requirements for your desired configuration 118 Enhanced OS 9 for 68K Processors MVME Board Guide ABCDEFGHIJKLMNOPQRSTUVW XY 2 Index Numerics 147Bug configure to boot RomBug 15 162Bug configure to boot RomBug 46 167Bug configure to boot RomBug 63 172Bug configure to boot RomBug 82 177Bug configure to boot RomBug 102 68040 21 55 68060 69 89 68LC040 21 68LC060 69 cache030 18 configure 162Bug to boot RomBug 46 167Bug to boot RomBug 63 172Bug to boot RomBug 82 177Bug to boot RomBug 102 MVMEO070 transition module 115 MVME712 transition module 110 CPU MVME147 overview 8 Ethernet connection 108 ABCDEFGHIJKLMNOPQRSTUVWX YZ fpu 18 I O transition module MVME701 115 install MVME162 CPU module 41 77 MVME172 CPU module 79 MVME177 CPU module 95 MVMEO050 configure 112 jumper block locations 112 MVME147 108 overview 8 ROM configuration locations 11 software environment 18 MVME147S overview 8 MVME162 108 install 41 77 jumper block locations 22 list of module numbers 22 overview 21 ROM configuration locations 38 software environment 40 MVME167 108 jumper block locations 56 list of module numbers 56 overview 55 ROM configuration 58 software environment 59 MVME172 install 79 list of module numbers 71 ABCDEFGHIJKLMNOPQRS
26. 107 108 110 112 115 118 Index Overview of the MVME712 Transition Module Configuring the MVME712 Transition Module Configuring the MVME050 System Controller Module for I O Operations Configuring the MVME701 Transition Module Overview of the MVME712 10 Transition Module 119 Product Discrepancy Report 123 Enhanced OS 9 for 68K Processors MVME Board Guide 5 MICROWARE Enhanced OS 9 for 68K Processors MVME Board Guide Chapter 1 MVME147 Reference This section contains information about various MVME147 models It contains the following sections Overview of the MVME147 CPU Module ROM Configuration and Organization Installing the MVME147 CPU Module Configuring 147Bug to Boot RomBug Board Specific OS 9 Modules ZA MICROWARE Z MICROWARE Overview of the MVME147 CPU Module The MVME147 CPU module provides 68030 processor running at either 16MHz SRF model 20MHz 25MHz Sx 1 models or 32MHz Sx 2 models with on chip Paged Memory Management Unit 4 8 SA x models 16 SB x models or 32M SC x models of on board DRAM Four RS 232C Serial Ports Centronics Parallel Printer Port On board SCSI Interface Ethernet Transceiver Interface except for RF SRF models Time of day clock calendar with battery backup 2Kx8 Battery backed CMOS RAM NVRAM The OS 9 area of NVRAM is the first 256 bytes of the user area beginning at address Four JEDEC EPROM sock
27. 126 27 2411 4 1 1 7 52 P2 2 3 J28 1 J29 1 _ N 5 The following steps guide you through the configuration of the MVMEO050 system controller for I O operations Step 1 Step 2 Step 3 Z MICROWARE Remove the MVME050 module Remove power from the system and eject the MVME050 module Configure the jumpers on the MVME050 module The jumpers on the MVME050 module should remain the same as the factory configuration or configured specifically to your needs with the exceptions of J20 J23 and J24 Figure 6 4 Jumper Settings for MVME050 Base Address Select Jumper Block J20 Select the base address of 1000 Short I O 2468 10 12 14 Space by connecting the following jumpers J20 1102 3104 5106 910 10 1110 12 131014 1357 9 11 13 Txc Signal Serial Input Jumper Block J23 Jumper Block J24 J23 controls port 1 and J24 controls 2 4 2 4 port 2 These settings select the transmit clock Txc signal as an input 1 3 1 3 for the RS 232 ports J23 3 to 4 J24 3 to 4 Set the front panel switch block on the MVME050 module The front panel switch block of the MVME050 controls various options you can set for the system Microware reserves switch 1 for future use Switches 6 and 7 are not used by Microware and may be used for your applications Switch 2 is the ROM boot override If closed switches 3 and 4 sel
28. 77 Single Board Computer Installation and User Manual supplied by Motorola to complete the hardware installation steps required for the P2 Adaptor Card if used and the MVME712M Transition Module These instructions also detail the various options available for cabling SCSI devices to the MVME712 module Note Jumper installation details for the MVME712M module are supplied in the support module appendix However carefully read the Motorola supplied documentation to ensure all hardware cabling requirements are correctly satisfied Install RomBug This BSP is supplied with a RomBug image to be installed in the flash memory Follow the procedure in the next section Installing RomBug into Flash if you are going to put the RomBug image in flash Enhanced OS 9 for 68K Processors MVME Board Guide Installing RomBug into Flash Before booting OS 9 for 68K a copy of Microware s RomBug debugger must be programmed into the MVME177 board s flash memory The PROM resident Motorola debugger 177Bug has the capability to read the images off of magnetic media or download them from cross development platforms and program the image into flash memory Downloading RomBug from a Host over an Ethernet Network Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Reset the system by powering up or pressing the reset switch This brings up the 177Bug prompt You may need to press lt break gt to bring up
29. C 32MB ECC 16MB Parity 16MB Parity Z MICROWARE Figure 4 1 MVME172FX Jumper Block Locations c E mm c gt N 3415 AuVWitd 1HOd 1viu3s FEBR 000000000000 066000000000000 600000000000 600000000090 3108NO2 1 180d 1viH3S Figure 4 2 MVME172LX Jumper Block Locations J2 J9 J15 J17 J3 14 15 J19 J6 J8 J20 J21 Pl P2 Figure 4 3 MVME172FX Jumper Settings GPI7 GPI6 GPI5 GPI3 GPI2 GPIO 1 2 _ _ E E E _ E B NH BH 15 16 J28 10 172BUG Installed User definable User definable User definable User definable In Flash outZEPROM Refer to 172BUG manual Refer to 172BUG manual Refer to 172BUG manual Figure 4 4 MVME172LX Jumper Settings GPI7 GPI6 GPI5 GPI3 GPI2 GPI1 GPIO 16 15 E E E _ BH _ 2 1 421 7 172BUG Installed User definable User definable User d
30. CPU users All Microware Development Packs for Motorola VME CPUs now support auto detection of one Motorola MVMEO050 module with a base address of Oxffff1000 For CPUs with 24 bit addressing the base address is OxOOff1000 If the MVME050 module is installed and detected the Microware DevPak ROMs read the MVME050 front panel switches to determine the boot system configuration overriding the boot method switches provided on the CPU If this is not desired you must change the base address of the MVME050 module to something other than what is specified by Microware If the ROM RAM quads are not in use disable them Otherwise ensure their addresses are unique within the VME bus memory map 112 Enhanced OS 9 for 68K Processors MVME Board Guide Figure 6 3 MVME050 Jumper Block Locations Lo 12 11 7 8 e 1212 2014 27 ib ion J6 5 ps2 1 by 2 6 15 0 Js J9 19 1 52 TH 1 15 DS3 m n2 104 n3 404 n4 304 DS4 2 6 ABC3D 2015 ei EN 122 316 17 eel 1 ns J19 v 2111 2 14 1 L_J20_ 173 pl i 1125 a ae 123 4
31. Ending Address 1 EFFFFFFF return Enhanced OS 9 for 68K Processors MVME Board Guide 83 Master Control 1 OD lt return gt Master Enable 2 Y N N lt return gt Master Starting Address 2 00000000 Master Ending Address 2 00000000 Master Control 2 00 lt return gt Master Enable 3 Y N N lt return gt Master Starting Address 3 00000000 Master Ending Address 3 00000000 Master Control 3 00 lt return gt Master Enable 4 Y N N lt return gt Master Starting Address 4 00000000 Master Ending Address 4 00000000 Master Address Translation Address 4 Master Address Translation Select 4 Master Control 4 00 lt return gt Short I O VMEbus A16 Enable Y N Short I O VMEbus A16 Control F Page VMEbus A24 Enable Y N F Page VMEbus A24 Control lt return gt lt return gt lt return gt lt return gt lt return gt lt return gt Y N lt return gt 01 lt return gt Y N lt return gt 02 lt return gt ROM Access Time Code 04 lt return gt FLASH Access Time Code 03 lt return gt MCC Vector Base 05 lt return gt VMEC2 Vector Base 1 06 lt return gt VMEC2 Vector Base 2 07 lt return gt VMEC2 GCSR Group Base Address D2 lt return gt VMEC2 GCSR Board Base Address 00 lt return gt VMEbus Global Time Out Code 01 lt return gt Local Bus Time Out Code 02 lt return gt VMEbus Access Time Out Code 02 lt return
32. Enhanced OS 9 for 68K Processors MVME Board Guide Version 1 1 ZA MICROWARE Intelligent Products For A Smarter World Z MICROWARE Copyright and Publication Information Copyright 2000 Microware Systems Corporation All Rights Reserved Reproduction of this document in part or whole by any means electrical mechanical magnetic optical chemical manual or otherwise is prohibited without written permission from Microware Systems Corporation This manual reflects version 1 1 of Enhanced OS 9 for 68K Revision B Publication date July 2000 Disclaimer The information contained herein is believed to be accurate as of the date of publication However Microware will not be liable for any damages including indirect or consequential from use of the OS 9 operating system Microware provided software or reliance on the accuracy of this documentation The information contained herein is subject to change without notice Reproduction Notice The software described in this document is intended to be used on a single computer system Microware expressly prohibits any reproduction of the software on tape disk or any other medium except for backup purposes Distribution of this software in part or whole to any other party or on any other system may constitute copyright infringements and misappropriation of trade secrets and confidential processes which are the property of Microware and or other parties Unauthorized dist
33. FINABLE IN FLASH OUT EPROM USER DEFINABLE USER DEFINABLE USER DEFINABLE USER DEFINABLE Jumper Block J1 1 2 System Controller factory configuration Jumper Block J1 1 2 Not System Controller Figure 2 8 SCSI Terminator Enable Header J14 The MVME162LX provides terminators for the SCSI bus The SCSI terminators are enabled disabled by a jumper on header J14 The SCSI terminators may be configured as follows NOTE If the MVME162LX is to be used at end of the SCSI bus the SCSI bus terminators must be enabled J14 J14 1 1 2 2 Onboard SCSI Bus Terminator Enabled Onboard SCSI Bus Terminator Disabled Factory configuration Z MICROWARE Figure 2 9 Header J13 determines the source for onboard static RAM backup power on the MVME162LX main module Header J1 determines the source for backup power on the 2MB SRAM mezzanine board if installed The following backup power configurations are available for onboard SRAM through header J13 In the factory configuration the VMEbus 5V standby voltage serves as primary and secondary power source the onboard battery is disconnected NOTE For MVME162LXs without the optional VMEbus interface for instance without the VMEchip2 ASIC you must select the onboard battery as the backup power source CAUTION Removing all jumpers may temporarily disable the SRAM Do not
34. I DS3 DS4 Bi 20 19 3 m mm 5 13 ABC32 2 j SI S2 59 60 J4 Mezzanine Board 1 N42 59 60 J9 P2 J5 I 1 2 ABC32 on se s Uso Z ROM Configuration and Organization There are two possible ROM configurations for the MVME177 As the system installer you must choose which ROM configuration to adopt depending on your system application MVME 177 has one bank of ROM sockets and a 4MB bank of flash memory split into two halves upper and lower You can set the jumpers to allow two different configurations 1 The ROM responds as the primary ROM bank and one of the two flash halves under software configuration responds as the secondary ROM bank 2 The lower half of the flash responds as the primary ROM bank and the upper half of the flash responds as the secondary ROM bank The first retains the 177Bug ROMs in the primary bank for ease of hardware diagnostic testing and adds the OS 9 RomBug image in the secondary bank In this configuration 177Bug gets control on a reset and transfers control to RomBug in the secondary bank For More Information See the Configuring 177Bug to Boot RomBug section in this chapter for more information The second configuration is to program the OS 9 RomBug image into the primary flash bank In this configuration RomBug always gets control on a reset The secondary flash bank can be used for additional bo
35. J8 si A s2 En 3d 40 P4 1 J9 Q Q 1 l J n h 2 J3 Md 1 1 5 1 T n7 diz J15 1 121 J18 719 h eee E 1 1 N 122 O O ind om 16 2 Figure 2 2 Jumper Locations MICROWARE 1 1 2 4 2 4 2 2 1 3 1 3 J1 System J1 Not System J41 Internal J11 External Controller Controller Clock Clock as shipped as shipped 2 4 2 4 1 2 4 2 1 3 1 3 5 6 5 6 J12 Internal J12 External Clock Clock J20 VMEbus J20 Onboard as shipped 5V Standby Battery as shipped 1 1 3 3 J21 4Mbit J21 8 Mbit PROM ehi OS 9 ROM as shippad setting may not be supported by all boards Figure 2 3 Jumper Locations continued GPI7 GPI6 GPI5 GPI3 GPI2 GPI1 GPIO 15 16 J22 162BUG Installed User definable User definable User definable User definable In Flash out PROM Refer to 162BUG manual Refer to 162BUG manual Refer to 162BUG manual User Code Installed User definable User definable User definable User definable In Flash out ZPROM User definable User definable User definable Z MICROWARE Overview of the MVME162 LX CPU Models The MVME162 LX C
36. Level A C0000000 B C0800000 All slots are set for Memory Size 8M Bytes Memory Width 16 Bits Interrupts Level sensitive Normal Polarity Recovery Time 0 microseconds Table 4 2 MVME172 FX Models and Processor Information Mode Processor Type and Speed DRAM Size MVME172 413y MVME172 433y MVME172 453y MVME172 513y MVME172 523y MVME172 533y 64 MHz MC68LC060 64 MHz MC68LC060 64 MHz MC68LC060 60 MHz MC68060 60 MHz MC68060 60 MHz MC68060 4MB DRAM 8MB DRAM 16MB DRAM 4MB DRAM 8MB DRAM 16MB DRAM Motorola has numerous variations of the MVME172board These boards are differentiated by FX vs LX model the amount and type of RAM memory installed the type of processor and support for SCSI and Ethernet on the board A representative list of model numbers are listed in Table 4 3 Table 4 3 MVME172LX Models and Processor Information Model Processor Type and Speed DRAM Size and Type MVME1 72 213 MVME1 72 223 MVME1 72 233 MVME1 72 243 MVME1 72 253 MVME1 72 263 MVME1 72 303 MVME1 72 313 MVME1 72 323 MVME1 72 333 MVME1 72 343 MVME1 72 353 MVME1 72 363 MVME1 72 373 68LC060 64MHz 68060 60MHz 68LC060 64MHz 68060 60MHz 68LC060 64MHz 68060 60MHz 68060 60MHz 68LC060 64MHz 68060 60MHz 68 C060 64MHz 68060 60MHz 68LC060 64MHz 68060 60MHz 68060 60MHz 4MB Parity 4MB Parity 4MB ECC 4MB ECC 16MB ECC 16MB ECC 8MB Parity 8MB Parity 8MB ECC 8MB ECC 32MB EC
37. Needed A W W BOOTP RARP Reply Update Control Yes No Y N Y Update Non Volatile RAM Y N y 162 Bug gt Download Boot Image using NIOP Command Step 1 Step 2 Step 3 Verify reset into 162Bug and that 162Bug is running from EPROM OPTIONAL Reset the system to bring up the 162 Bug gt prompt Note you may need to press lt break gt if 162Bug has been previously configured to ROMBoot Copyright Motorola Inc 1988 1993 All Rights Reserved MVME162 Debugger Diagnostics Release Version 1 2 02 14 93 COLD Start Local Memory Found 00400000 amp 4194304 may vary with other memory configurations MPU Clock Speed 25Mhz ROMboot in progress To abort hit lt BREAK gt lt break gt Break Detected 162 Bug 162 Bug niop Controller LUN 00 Device LUN 200 Get Put G File Name rombugger Memory Address FFE0F000 100000 Length 00000000 Byte Offset 00000000 Bytes Received amp 1048576 Bytes Loaded amp 1048576 Bytes Second amp 80659 Elapsed Time 13 Second s 162 Bug gt Z MICROWARE Program OS 9 ROM Image into Flash Memory Step 1 Step 2 Program 1 MB flash image from ROM Image downloaded into RAM Flash memory is at FFA00000 Perform NIOP command above just before PFLASH command Do Not reset between commands 162 Bug gt pflash 100000 100000 FFA00000 Source Starting Ending Addresses 00100000 001FFFFF Destination Starting Endin
38. Order FF800400 FF808400 FFA00400 FFA08400 BootP Ethernet booting device ie SPF Ethernet descriptor name spie0 CMDS Build sequence mwos OS9 68000 CMDS mwos OS9 68020 CMDS mwos OS9 68060 CMDS mwos OS9 68060 PORTS MVME172 CMDS Overview of the MVME172 CPU Models The MVME172 models provide 68060 or 68LC060 processor running at 60MHz or 64 MHz with on chip 8K cache MMU and FPU 68060 only 4M to 64M Bytes of Dynamic RAM e 512K Bytes of battery backed Static RAM e 4RS 232 serial ports e On board SCSI I O processor Optional On board Ethernet processor Optional Time of day clock calendar with battery backup e 8Kx8 battery backed CMOS RAM NVRAM The OS 9 for 68K area of NVRAM is the first 256 bytes of the user area beginning at FFFCO0000 e 2M Bytes of flash memory as primary ROM bank at FF800000 or secondary ROM bank at FFA00000 jumper selectable FX One 32 pin PLCC EPROM socket LX Two 32 pin DIP EPROM sockets are selectable as primary or secondary ROM bank EPROMS are jumper selectable to alternate with flash as primary ROM bank e 2 Industry Pack IP slots A D The default IP setup by RomBug is detailed in Table 4 1 If a particular application requires a different setup RomBug can be rebuilt with a customized initext module to fit the application s requirements Table 4 1 MVME172 Model IP Slots Z MICROWARE IP Slot Memory Base Interrupt
39. PU models provide 68040 or 68LC040 processor running at 33MHZ with on chip 8K cache MMU and FPU 68040 only 4M of Parity Dynamic DRAM 4MB 16MB or 32MB of ECC DRAM the combination of 16 ECC and 4MB of Parity DRAM or no DRAM 128K bytes or 2M bytes of battery backed static RAM 4 RS 232 serial ports On board SCSI processor optional On board Ethernet processor optional Time of day clock calendar with battery backup 8Kx8 battery backed CMOS RAM NVRAM The OS 9 for 68K area of NVRAM is the first 256 bytes of the user area beginning at FFFCOOOO 1M bytes of flash memory as primary ROM bank at FF800000 or secondary ROM bank at FFA00000 jumper selectable Four 32 pin DIP PROM sockets as primary or secondary ROM banks jumper selectable alternates with flash 2 Industry Pack IP slots A B unless otherwise specified The default IP setup by RomBug is detailed in Table 2 3 If a particular application requires a different setup RomBug can be rebuilt with a customized initext module to fit the application s requirements Table 2 3 MVME162 LX Model IP Slots IP Slot Memory Base Interrupt Level A C0000000 5 B C0800000 4 Both slots are set for Memory Size 8MB Memory Width 16 bits Interrupts Level sensitive Normal Polarity Recovery Time 0 microseconds The MVME162 LX models differ by the type and amount of RAM memory installed the type of the processor and support for SCSI
40. S NVRAM The OS 9 for 68K area of NVRAM is the first 256 bytes of the user area beginning at FFFCO0000 Two 44 pin PLCC 16 bit EPROM sockets organized as one bank of 32 bit wide high and low word memory e 4MB flash memory in four Intel 28F00854A chips with software control write protection Motorola has numerous variations of the board These boards are differentiated by the amount of RAM memory installed A representative list of module numbers are listed in Table 5 1 Table 5 1 MVME177 Models and Memory Size CPU Model CPU Speed Memory Size MVME 1 77 001 50 MHz 4M MVME1 77 002 50 MHz 8M MVME177 003 50 MHz 16M Z MICROWARE Table 5 1 MVME177 Models and Memory Size continued CPU Model CPU Speed Memory Size MVME177 004 50 MHz 32M MVME177 005 50 MHz 64M MVME177 006 50 MHz 128M MVME177 011 60 MHz 4M MVME177 012 60 MHz 8M MVME177 013 60 MHz 16M MVME177 014 60 MHz 32M MVME177 015 60 MHz 64M MVME177 016 60 MHz 128M Figure 5 1 MVME177 Jumper Block Locations Ups 0 6 1 40 ua B DSI 2 17 29
41. Search Increment Size 00010000 return Memory Search Delay Enable Y N N return Memory Search Delay Address FFFFD20F return Memory Size Enable Y N Y return Memory Size Starting Address 00000000 return Memory Size Ending Address 00400000 return value may vary with installed memory Base Address of Dynamic Memory 00000000 return Size of Parity Memory 00400000 return Size of ECC Memory Board 0 00000000 return Size of ECC Memory Board 1 00000000 return Base Address of Static Memory FFE00000 return Size of Static Memory 00800000 return Slave Enable 41 Y N Y N return Slave Starting Address 1 00000000 return Slave Ending Address 1 000FFFFF return Slave Address Translation Address 1 00000000 return Slave Address Translation Select 41 00000000 return Slave Control 1 return Slave Enable 2 Y N N return Slave Starting Address 2 00000000 return Slave Ending Address 42 00000000 return Slave Address Translation Address 2 00000000 return Slave Address Translation Select 42 00000000 return Slave Control 42 0000 return Master Enable 1 Y N Y N lt return gt Enhanced OS 9 for 68K Processors MVME Board Guide 47 Z MICROWARE Master Starting Address 1 02000000 lt return gt Master Ending Address 1 EFFFFFFF lt return gt Ma
42. TUVW XY 2 overview 69 ROM configuration locations 75 software environment 76 MVME177 install 95 jumper block locations 89 list of module numbers 89 overview 89 ROM configuration 92 MVME701 configure 115 MVME712 configure 110 transition module 108 parallel printer port connection 108 PORTS 18 rtc147 18 sc147 18 scp147 18 SCSI bus connection 108 scsil47 18 serial port connection 108 147 18 ssm851 18 system controller module 112 MVME050 112 ABCDEFGHIJKLMNOPQRSTUVW XY 2 tk147 18 122 Enhanced OS 9 for 68K Processors MVME Board Guide Product Discrepancy Report To Microware Customer Support FAX 515 224 1352 From Company Phone Fax Email Product Name Description of Problem Host Platform Target Platform ZA MICROWARE
43. and or Ethernet on the board Currently all boards operate at 25 MHZ The models known at the time of publication are listed in Table 2 4 Table 2 4 MVME162 LX Models and Processor Information DRAM SRAM Flash Model Processor Size amp Type Size Options MVME162 200 LC040 1MB Parity 128KB no P interface MVME162 201 LC040 1MB Parity 128KB MVME162 202 040 1MB Parity 128KB SCSI MVME162 203 LC040 1MB Parity 128KB no VME interface 1MB MVME162 210 LC040 4MB Parity 128KB 1MB MVME162 211 LC040 4MB Parity 128KB SCSI 1MB MVME162 212 LC040 4MB Parity 128KB Enet 1MB MVME162 213 LC040 4MB Parity 128KB Enet SCSI 1MB MVME162 214 LC040 4MB Parity 128KB no VME interface 1MB MVME162 215 LC040 4MB Parity 128KB SCSI no VME 1MB MVME162 220 040 4MB Parity 128KB Z MICROWARE Table 2 4 MVME162 LX Models and Processor Information continued DRAM SRAM Flash Model Processor Size amp Type Size Options 1MB MVME 162 221 040 4MB Parity 128KB SCSI 1MB MVME 162 222 040 4MB Parity 128KB Enet 1MB MVME 162 223 040 4MB Parity 128KB Enet SCSI 1MB MVME 162 233 LC040 4MB ECC 128KB Enet SCSI 1MB MVME 162 250 LC040 16MB ECC 128KB 1MB MVME 162 251 LC040 16MB ECC 128KB SCSI 1MB MVME 162 252 LC040 16MB ECC 128KB Enet 1MB MVME 162 253 LC040 16MB ECC 128KB Enet SCSI 1MB MVME 162 260 040 16MB ECC 128KB 1MB MVME 162 261 040 16MB ECC 128KB SCSI 1MB MVME 162 262 040 16MB ECC 128KB Enet 1MB MVME 162 263 040 16MB ECC 128KB Enet SCSI Table 2 4 MVME162
44. code take control directly from reset If you do not anticipate needing occasional diagnostic testing or if you desire a faster reset you can choose to reset directly into the OS 9 ROM code To start the board via 162Bug set the jumper Reset from Flash ROM to the location holding the 162Bug code Additional configuration is required to have 162Bug transfer control to the OS 9 ROM code For More Information For more information see Configuring 162Bug to Boot RomBug To reset directly into the OS 9 ROM code set the jumper to the location where the OS 9 code resides If the OS 9 PROM is install the PROM size jumpers must be reset from the factory setting 512KB to the setting for 1MB x 8bits On the MVME162LX the OS 9 PROM is installed in XU24 Socket U23 can be used for additional OS 9 modules The address space of the MVME162 RomBug PROM is divided into the two areas illustrated in Figure 2 11 Figure 2 11 MVME162 RomBug PROM Address Space RomBug 128K Bytes and Booters i 896K Bytes OS 9 for 68K Bootfile Access using the Ir or ro Boot menu options Z MICROWARE Board Specific OS 9 Modules The software environment for the MVME162 is built in its PORTS directory structure found at h0 MWOS 089 68020 PORTS MVME 1 62 All descriptors init modules and bootfiles are configured and built in this directory and its subdirectories The board specific drivers available for MVME162 tk102 r
45. dress 00000000 lt return gt P C Base Address 00000000 lt return gt P D Base Address 00000000 lt return gt P D C B A Memory Size 00000000 lt return gt P D C B A General Control 00000000 lt return gt P D C B A Interrupt 0 Control 00000000 return P D C B A Interrupt 1 Control 00000000 return Update Non Volatile RAM Y N Y lt return gt Reset Local System CPU Y N Y lt return gt The system resets twice after responding to the last prompt each time with a three second delay during which the operator may abort the ROMboot process by pressing lt break gt then RomBug is entered Resetting from RomBug brings the operator back to 162Bug with nhanron YS far AAK Drap efr Enhanced OS 9 for 68K Processors MVME162 Reference another opportunity to interrupt the automatic ROMboot Once configured RomBug can manually be booted from 162Bug by entering the RB command at the 162 Bug gt prompt Note All of the above 162Bug entries are explained in the 162Bug User s Manual Note An ABORT RESET sequence disables an automatic ROM boot sequence As a result it cannot be used alone to force an OS 9 RomBug reconfiguration session when 162Bug is in the primary ROM bank To force a reconfiguration session from 162Bug press and hold the ABORT switch enter the RB command wait at least as long as the ROMboot abort delay and then release the ABORT switch En
46. e all jumpers from J5 and install all jumpers on J6 1 to 2 3 to 4 5 to 6 etc Serial Port 2 Direction To Terminal operation DCE remove all jumpers from J10 and install all jumpers on J9 1 to 2 3 to 4 5 to 6 etc To Modem operation DTE remove all jumpers from J9 and install all jumpers on J10 1 to 2 3 to 4 5 to 6 etc Serial Port 2 DSR and CTS Configuration Hold DSR signal always TRUE install J8 1 to 2 To drive the DSR signal with your terminal install J8 2 to 3 Hold CTS signal always TRUE install J12 1 to 2 To drive the CTS signal with your terminal install J12 2 to 3 Serial Port 1 DSR and CTS Configuration Hold DSR signal always TRUE install J7 1 to 2 To drive the DSR signal with your terminal install J7 2 to 3 Hold CTS signal always TRUE install J11 1 to 2 To drive the CTS signal with your terminal install J11 2 to 3 Peripheral and Transition Module Configurations Step 3 Replace the MVME701A module Enhanced OS 9 for 68K Processors MVME Board Guide 117 C Peripheral and Transition Module Configurations Z MICROWARE Overview of the MVME712 10 Transition Module The MVME712 10 transition module is a support module for the MVME166 CPU Module This transition module provides the connections for the serial ports parallel printer port and Ethernet For More Information The MVME166 User s Manual contains detailed instructions for installingthe MVME712
47. e must be programmed into Flash EPROM may be installed on models supporting 1Mbit EPROM LX models e EPROM provided or can be programmed into Flash HM Note EPROMSs are available from Microware Contact support at support microware com or 1 800 475 9000 ROM Booting Search Order FF800400 FF808400 FFA00400 FFA08400 BootP Ethernet booting device ie SPF Ethernet descriptor name spie0 CMDS Build sequence mwos OS9 68000 CMDS mwos OS9 68020 CMDS mwos OS9 68040 CMDS mwos OS9 68040 PORTS MVME162 CMDS Overview of the Original and FX MVME162 CPU Models The original and FX MVME162 models provide 68040 or 68LC040 processor running at 25MHz or 32 MHz with on chip 8K cache MMU and FPU 68040 only 1M 4M 8M or 16M Bytes of Dynamic RAM 512K Bytes of battery backed Static RAM 2 RS 232 serial ports On board SCSI I O processor Optional On board Ethernet processor Optional Time of day clock calendar with battery backup 8Kx8 battery backed CMOS RAM NVRAM The OS 9 for 68K area of NVRAM is the first 256 bytes of the user area beginning at FFFCO0000 1M Bytes of flash memory as primary ROM bank at FF800000 or secondary ROM bank at FFA00000 jumper selectable One 32 pin PLCC PROM socket as primary or secondary ROM bank jumper selectable alternates with flash Size 4 8 M Bits Early board may be restricted to 4M Bits 4 Industry Pack IP slots A D The default IP setup by RomBug
48. ect the boot method If open the kernel is searched for in ROM the system does a ROM boot Switch 3 menu select and switch 4 boot method control how the system comes up These switches may be set in the following combinations Figure 6 5 Switch Combinations and Definitions Switch 3 Switch 4 Definition on on sysboot builds user select menu on off sysboot uses AUTOSELECT algorithm off on Boots from the primary device off off Boots from the secondary device Switch 5 controls the enabling of the ROM debugger If closed the ROM debugger is called after a system reset If open the normal booting action takes place after a system reset Switch 8 controls the front panel LED display If this switch is off the LED display is enabled If this switch is on the LED display is blanked Step 4 Replace the MVME050 module Configuring the MVME701 I O Transition Module The MVME701 module is a support module for the MVMEO5O system controller module Step 1 Remove the MVME701A module Remove power from the system and eject the MVME701 module Step 2 Z MICROWARE Configure the jumpers on the MVME701A module The jumpers on the MVME701A module control options for the following functions Figure 6 6 Jumper Settings for MVME701A Serial Port 1 Direction To Terminal operation DCE remove all jumpers from J6 and install all jumpers on J5 1 to 2 3 to 4 5 to 6 etc To Modem operation DTE remov
49. efinable User definable In Flash out EPROM Refer to 172BUG manual Refer to 172BUG manual Refer to 172BUG manual Z MICROWARE User Code Installed User definable User definable User definable User definable In Flash out EPROM User definable User definable User definable User Code Installed User definable User definable User definable User definable In Flash outZEPROM User definable User definable User definable ROM Configuration and Organization On the MVME172 either flash memory or the PROM socket can be selected as the primary ROM bank with a jumper Typically Motorola ships the MVME172 with a PROM containing 172Bug and with 172Bug residing in flash The 172Bug includes a facility for reprogramming flash but it must run from the PROM as the primary bank not flash to operate properly All MVME172 BLSs include a RomBug image to put in flash and an EPROM that can be installed onto the board in socket XU2 The address space of the MVME172 RomBug PROM is divided into the two areas illustrated in Figure 4 5 Figure 4 5 Address Space of the MVME172 RomBug PROM RomBug i 128K Bytes and Booters Embedded i 896K Bytes OS 9 for 68K Bootfile boot menu options Z MICROWARE Board Specific OS 9 Modules The software environment for the MVME172 is built in its PORTS directory structure found at h0 MWOS 089 68060 PORTS MVME 172 All descriptors init modules and bootfiles are configured
50. emory Search Starting Address 00000000 FFE00000 lt return gt Memory Search Ending Address 02000000 FFE10000 lt return gt Memory Search Increment Size 00010000 lt return gt Memory Search Delay Enable Y N N lt return gt Memory Search Delay Address FFFFD20F lt return gt Memory Size Enable Y N Y lt return gt Memory Size Starting Address 00000000 lt return gt Memory Size Ending Address 02000000 lt return gt Base Address of Dynamic Memory 00000000 lt return gt Size of Parity Memory 00000000 lt return gt Size of ECC Memory Board 0 02000000 lt return gt Size of ECC Memory Board 1 00000000 lt return gt Base Address of Static Memory FFE00000 return Size of Static Memory 00020000 return Slave Enable 41 Y N Y N return Slave Starting Address 1 00000000 return Slave Ending Address 1 1 return Slave Address Translation Address 1 00000000 return Slave Address Translation Select 41 00000000 return Slave Control 1 O3FF return Slave Enable 2 Y N N return Slave Starting Address 2 00000000 return Slave Ending Address 2 00000000 return Slave Address Translation Address 2 00000000 return Slave Address Translation Select 42 00000000 return Slave Control 2 0000 return Master Enable 1 Y N Y N lt return gt Master Starting Address 1 02000000 return Master
51. es the ROMboot feature on subsequent resets To reenable the ROMboot feature reenter the RB command dialogue followed by the RESET command dialogue as shown above Note Since the ABORT RESET sequence disables an automatic ROMboot sequence it cannot be used alone to force a reconfiguration session when 147Bug is in the primary ROM Bank The only way to force a reconfiguration session is to use the ABORT RESET sequence to enter 147Bug manually enter a value in the OS 9 area of NVRAM to invalidate the checksum of that area re enable ROM Booting and reset the CPU The following 147Bug command will invalidate the NVRAM checksum in the same way as the ABORT RESET sequence would if RomBug were in the primary ROM bank 147 Bug MW fffe0004 01 B return Effective address FFFEO0004 Effective data 01 147 Bug RB lt return gt Enhanced OS 9 for 68K Processors MVME Board Guide 17 Z MICROWARE Board Specific OS 9 Modules The software environment for the MVME147 is built in its PORTS directory structure which can be found at h0 MWOS 0S9 68030 PORTS MVME147 All descriptors init modules and bootfiles are configured and built in this directory and its subdirectories The board specific drivers that are available for the MVME147 are tk147 system ticker amp 147 real time clock driver sc147 SCF serial port driver 147 SCF parallel port driver scsil47 SCSI low level driver sp147 SoftStax
52. ets organized as two banks of 16 bit wide high and low byte memory MVME147 Primary ROM Bank FF800000 High Byte U1 Low Byte U2 Secondary ROM Bank FFA00000 High Byte U16 Low Byte U18 MVME147S Primary ROM Bank FF800000 High Byte U22 Low Byte 030 Secondary ROM Bank FFA00000 High Byte U1 Low Byte U15 68882 Floating Point Coprocessor Figure 1 1 MVME147 Jumper Block Locations J7 Q ON ro J8 J6 ON tA J9 J103 J2 49 ABC P1 ee 5 amp IN 2 E 552 S3 01 02 25474 J5 P 18 016 11019 2 1 2 J1 E 49 50 EN l ai Bo Z MICROWARE Figure 1 2 MVME 147S Jumper Block Location V ak _ DS1 2 Ul ABCI ps2 18 015 m DS3 2 DS4 I2 ua m Bi 18 21 J4 os U30 m SI
53. g Addresses FFA00000 FFAFFFFF Number of Effective Bytes 00100000 amp 1048576 Program FLASH Memory Y N y Erasing Block Number 00 SFFA00000 Erasing Block Number 01 SFFA10000 Erasing Block Number 02 SFFA20000 Erasing Block Number 03 SFFA30000 Erasing Block Number 04 SFFA40000 Erasing Block Number 05 SFFA50000 Erasing Block Number 06 SFFA60000 Erasing Block Number 07 SFFA70000 Erasing Block Number 08 SFFA80000 Erasing Block Number 09 SFFA90000 Erasing Block Number 10 SFFAA0000 Erasing Block Number 11 SFFABOO000 Erasing Block Number 12 SFFAC0000 Erasing Block Number 13 SFFAD0000 Erasing Block Number 14 S FFAE0000 Erasing Block Number 15 SFFAF0000 Programming Block Number 00 SFFA00000 Programming Block Number 01 SFFA10000 Programming Block Number 02 SFFA20000 Programming Block Number 03 SFFA30000 Programming Block Number 04 SFFA40000 Programming Block Number 05 SFFA50000 Programming Block Number 06 SFFA60000 Programming Block Number 07 SFFA70000 Programming Block Number 08 SFFA80000 Programming Block Number 09 SFFA90000 Programming Block Number 10 SFFAA0000 Programming Block Number 11 FFAB0000 Programming Block Number 12 S FFACOO000 Programming Block Number 13 S FFAD0000 Programming Block Number 14 SFFAE0000 Programming Block Number 15 SFFAF0000 FLASH Memory Programming Complete 162 Bug Chapter 3 MVME167 Reference
54. h Ending Address 00010000 FFE10000 lt return gt Search Increment Size 00010000 lt return gt Search Delay Enable Y N N lt return gt Search Delay Address FFFFCEOF return Y N Size Starting Address Size Enable Size Ending Address Local Memory Y lt return gt 00000000 0xx00000 00000000 0xx00000 0xx00000 return return return return return Enable 1 Y N Y N return Starting Address 1 00000000 return Ending Address 1 OxxFFFFF return Address Translation Address 1 00000000 return Address Translation Select l Fxx00000 return Control 1 O3FF return Enable 2 Y N N lt return gt Starting Address 2 00000000 lt return gt Ending Address 2 00000000 lt return gt Address Translation Address 2 00000000 lt return gt Address Translation Select 2 00000000 lt return gt Control 2 0000 lt return gt Enable 1 Y N Y N lt return gt Starting Address 1 0xx00000 lt return gt Ending Address 1 00000000 lt return gt Control 1 00 lt return gt Enable 2 Y N N lt return gt Starting Address 2 00000000 lt return gt Ending Address 2 00000000 lt return gt Control 2 00 lt return gt Enable 3 Y N N lt return gt Enhanced OS 9 for 68K Processors MVME Board Guide Master Starting Address 3 00000000 lt return gt Master Ending Address 3 00000000 lt
55. hanced OS 9 for 68K Processors MVME Board Guide 49 Z MICROWARE 162Bug s NIOT configuration Step 1 Step 2 Step 3 Verify reset into 162Bug and that 162Bug is running from EPROM Reset the system to bring up the 162 Bug gt prompt Note you may need to press lt break gt if 162Bug has been previously configured to ROMBoot Copyright Motorola Inc 1988 1993 All Rights Reserved MVME162 Debugger Diagnostics Release Version 1 2 02 14 93 COLD Start Local Memory Found 00400000 amp 4194304 may vary with other memory configurations MPU Clock Speed 25Mhz ROMboot in progress To abort hit lt BREAK gt lt break gt Break Detected 162 Bug Enter appropriate Data in NIOT command 162 Bug niot Controller LUN 00 Device LUN 00 Node Control Memory Address FFE10000 Client IP Address 0 0 0 0 ENTER DATA HERE Server IP Address 0 0 0 0 ENTER DATA HERE Subnet IP Address Mask 0 0 0 0 ENTER DATA HERE Broadcast IP Address 0 0 0 0 Gateway IP Address 0 0 0 0 Boot File Name NULL for None ENTER DATA HERE Argument File Name NULL for None Boot File Load Address 00000000 00100000 Boot File Execution Address 00000000 00100000 Boot File Execution Delay 00000010 Boot File Length 00000000 Boot File Byte Offset 00000000 BOOTP RARP Request Retry 00 TFTP ARP Request Retry 00 Trace Character Buffer Address 00000000 BOOTP RARP Request Control Always When
56. ic ROMboot sequence As a result it cannot be used alone to force an OS 9 RomBug reconfiguration session when 177Bug is in the primary ROM bank To force a reconfiguration session from 177Bug press and hold the ABORT switch enter the RB command wait at least as long as the ROM Boot abort delay and then release the ABORT switch Enhanced OS 9 for 68K Processors MVME Board Guide 105 b MVME177 Reference MICROWARE 106 Enhanced OS 9 for 68K Processors MVME Board Guide Chapter 6 Peripheral and Transition Module Configurations This chapter contains information about the MVME712 Transition Module It includes the following topics Overview of the MVME712 Transition Module Configuring the MVME712 Transition Module Configuring the MVME050 System Controller Module for I O Operations Overview of the MVME712 10 Transition Module ZA MICROWARE 107 o eripheral and Transition Module Configurations MICROWARE E of the MVME712 Transition Module The MVME712 transition module is support module for the MVME147 MVME162 original series models only and MVME167 CPU modules This transition module provides the connections for the serial ports parallel printer port SCSI bus and Ethernet for non RF SRF MVME147 versions Note The MVME147 User Manual and the MVME167 User Manual contain detailed instructions for installing the MVME712 and the associated P2 adaptor module Consult the appro
57. ions for the MVME167 As the system installer you must choose which ROM configuration to adopt depending on your system application The first retains the 167Bug ROMs in the primary bank for ease of hardware diagnostic testing and adds the OS 9 RomBug EPROMs in the secondary bank In this configuration 167Bug gets control on a reset and boots RomBug in the secondary bank see Configuring 167Bug to Boot RomBug The second configuration replaces the 167Bug EPROMs with the OS 9 RomBug EPROMs the primary bank In this configuration RomBug always gets control on a reset The address space of the MVME167 RomBug EPROMS is divided into the two areas illustrated in Figure 3 1 Figure 3 2 Address Space of MVME167 RomBug EPROMS RomBug i 128K Bytes and Boot Embedded i 896K Bytes OS 9 for 68K Bootfile Access using the Ir or ro Boot Menu Option Board Specific OS 9 Modules The software environment for the MVME167 is built in its PORTS directory structure found at h0 MWOS 089 68040 PORTS MVME 1 67 All descriptors init modules and bootfiles are configured and built in this directory and its subdirectories The board specific drivers available for the MVME167 include tk167 rtcl67 scl67 5 167 scsil67 5 167 System ticker Real time clock driver SCF serial port driver SCF parallel port driver SCSI low level driver Ethernet driver Other system modules available for use on the
58. led by jumpers J18 and J19 Figure 6 2 Jumper Settings All four serial ports should be set for To Terminal DCE operation Remove all jumpers from J11 J17 J14 and J19 Install jumpers in J1 J16 J13 and J18 as follows Jumper Block J1 Jumper Block J13 24 6 8 T 12 14 1357 911 13 2468 10 12 14 hag d x uw 13 57 91 13 Jumper Block J16 Jumper Block J18 2 4 10 12 14 2 4 i 1 14 1357 9 11 13 1357 9 11 13 Install P2 adaptor and SCSI cabling Once the serial ports are configured install the P2 adaptor module Run all cables from the P2 adaptor module to the MVME712 transition module and cable the SCSI devices according to your system requirements Peripheral and Transition Module Configurations For More Information The MVME147 User Manual and the MVME167 User Manual provide detailed instructions on how this is achieved Step 4 Configure and connect the disk system For More Information See the Enhanced OS 9 for 68K Processors BLS Reference manual for information on OS 9 for 68K SCSI operation and disk formats Step 5 Replace the MVME712 module Enhanced OS 9 for 68K Processors MVME Board Guide 111 6 Peripheral and Transition Module Configurations MICROWARE Configuring the MVME050 System Controller Module for I O Operations HM Note Important notice for all Motorola VME
59. lows resetting into the 162Bug in order to keep the diagnostics handy then automatically transferring control to RomBug to bring up OS 9 However this method is slower than resetting directly into RomBug Configuring 162Bug to Boot RomBug Step 1 Step 2 Step 3 Verify reset into 162Bug On the original and FX series ensure 162Bug is installed in EPROM and the jumper at J22 pins 9 amp 10 is removed On the LX series ensure the 162Bug PROM is installed in XU24 and the jumper at J11 pins 7 amp 8 is removed Reset the system to bring up the 162 Bug gt prompt Copyright Motorola Inc 1988 1993 All Rights Reserved MVME162 Debugger Diagnostics Release Version 1 2 02 14 93 COLD Start Local Memory Found 00400000 amp 4194304 may vary with other memory configurations MPU Clock Speed 25Mhz 162 Bug gt Enter the ENV command at the 162 Bug gt prompt entering the following values at the configuration field prompt 162 Bug gt ENV lt return gt Bug or System environment B S B lt return gt Field Service Menu Enable Y N N lt return gt Remote Start Method Switch G M B N B lt return gt Probe System for Supported I O Controllers Y N Y N lt return gt Negate VMEbus SYSFAIL Always Y N N lt return gt MVME162 Reference Local SCSI Bus Reset on Debugger Startup Y N N lt return gt Local SCSI Bus Negotiations Type A S N A lt return gt Industry Pack Reset on Debugger
60. matically boot RomBug using its ROMboot feature This allows coldstarting from the 167Bug in order to keep the diagnostics handy then automatically transferring control to RomBug to bring up OS 9 However this method is much slower than coldstarting directly into RomBug Configuring 167Bug to Boot RomBug Step 1 Step 2 Step 3 Verify PROM installation Ensure 167Bug EPROMs are installed in the primary bank and the RomBug 5 are installed the secondary bank Start up the system Reinstall the module and reset the system to bring up the 167 Bug prompt Copyright Motorola Inc 1988 1993 All Rights Reserved MVME167 Debugger Diagnostics Release Version 1 5 02 14 93 COLD Start Local Memory Found 203000000 amp 50331648 MPU Clock Speed 33Mhz 167 Bug Enable the ROMboot feature Enter the ENV command at the 167 Bug gt prompt entering the following values at the configuration field prompt 167 Bug 5ENV return Bug or System environment B S B return Field Service Menu Enable Y N N return Remote Start Method Switch G M B N B return Probe System for Supported I O Controllers Y N Y N return 64 MVME167 Reference Negate VMEbus SYSFAIL Always Local SCSI Bus Reset on Debugger Startup Local SCSI Bus Negotiations Type Ignore CFGA Block on a Hard Disk Boot Auto Auto Auto Auto Auto Auto ROM ROM ROM ROM ROM Bo ROM Bo Networ
61. mper indicates whether the MVME147 is the system controller If installed the MVME147 is the system controller 1 2 Figure 1 6 Serial Port 4 Clock Configuration Select J9 J10 Jumper Block J9 J9 and J10 along with J15 of the MVME712M Breakout Module configure KISS the serial port 4 use of the clock signals Connect 49 2 to 3 Receives RTXC4 Jumper Block J10 1 to 2 Drives TRXC4 J10 1 2 3 Step 4 Z MICROWARE Replace the CPU module in the system Once the EPROM and jumper installation is done carefully read the MVME147 User Manual supplied by Motorola to complete the hardware installation steps required for the P2 Adaptor Card if used and the MVME712M Transition Module These instructions also detail the various options available for cabling SCSI devices to the MVME147 module Jumper installation details for the MVME712M module are supplied in Chapter 6 of the Enhanced OS 9 for 68K Processors MVME Board Guide However carefully read the Motorola supplied documentation to ensure that all hardware cabling requirements are correctly satisfied Configuring 147Bug to Boot RomBug Motorola s 147Bug which resides in EPROM can be configured to automatically boot RomBug using its ROMboot feature This enables coldstarting from the 147Bug in order to keep the diagnostics handy then automatically transferring control to RomBug to bring up OS 9 Howe
62. n Use 162BUG s NIOP command to load the OS 9 ROM image into ram See command sequence at Download Boot Image using NIOP Command Program Flash memory with OS 9 ROM image See command sequence a Program OS 9 ROM Image into Flash Memory Optional Select the PROM as the reset bank Remove the jumper at J11 pins 7 amp 8 Save the jumper by installing it only on pin 8 m Step 8 Step 9 Step 10 Note The MVME162LX can be reset from the code in either flash memory or PROM The jumper at J11 pins 7 amp 8 switches the address space between these two devices Once 162Bug has been coldstarted RomBug can be booted from the 162Bug by configuring 162Bug s environment as described in a later section of this manual Examine and change jumpers on the CPU module In general the jumper settings for the MVME162LX module should remain the same as the factory default settings or configured specifically for your needs Reinstall the CPU module Complete hardware installation Once the PROM is installed and jumper configuration is completed carefully read the MVME162LX Embedded Controller User s Manual to complete the hardware installation steps required for any connections Z MICROWARE Configuring 162Bug to Boot RomBug Motorola s 162Bug which resides in flash on the original and FX series and PROM on the LX series can be configured to automatically boot RomBug using its ROMboot feature This al
63. nstalling it only on pin 8 Note The MVME162LX can be reset from the code in either flash memory or PROM The jumper at J11 pins 7 amp 8 switches the address space between these two devices Once 162Bug has been coldstarted RomBug can be booted from the 162Bug by configuring 162Bug s environment as described in a later section of this chapter Examine and change jumpers on the CPU module In general the jumper settings for the MVME162LX module should remain the same as the factory default settings or configured specifically for your needs Reinsert the CPU module into the system Complete hardware installation Once the PROM is installed and jumper configuration is completed carefully read the MVME162LX Embedded Controller User s Manual to complete the hardware installation steps required for any I O connections Z MICROWARE Installing the MVME162 CPU Module Flash programming method Step 1 Step 2 Step 3 Step 4 Step 5 Step 6 Step 7 Install ROM Flash image onto a machine configured with a tftp server ROM image MWOS 08S9 68040 PORTS MVME162 CMDS BOOTOBJS ROMBUG rombugger Reset Target machine Use 162Bug s ENV command to configure autobooting to ROMBUG ROM Image Not required if step 6 option is selected See command sequence at Configuring 162Bug to Boot RomBug Use 162BUG s NIOT command to setup networking information See command sequence at 162Bug s NIOT configuratio
64. ols inetd conf and resolv conf Installing the MVME177 CPU Module Step 1 Step 2 Step 3 Remove power from the system and eject the CPU module Verify EPROM installation Motorola s 177Bug is shipped with the MVME177 board and installed in EPROM in sockets XU1 and XU2 177Bug is used to install the OS 9 RomBug image into the MVME177 board s flash memory The EPROMs may be disabled with jumper J8 once the RomBug image is stored in flash For More Information Refer to the Installing RomBug into Flash section of this manual for more information Verify the factory supplied EPROMs are installed in sockets and XU2 Verify jumper settings In general the jumper settings for the MVME177 board should remain the same as the factory default settings or configured specifically for your needs Z MICROWARE Figure 5 3 MVME177 Jumper Settings Software Readable Header Jumper Block J1 Reserved for 177Bug GPIO GPI1 GPI2 GPI3 Available GP14 GPI5 GPI6 GPI7 GPI7 GPI6 GPI5 GPI3 GPI2 GPI1 GPIO Factory Default GPI3 only removed SRAM Backup Power Source Jumper Block J2 Select Option OptionB Option C Possible configurations 4 4 4 A Backup Power Disable B VMEbus 5V STBY backup off backplane
65. ort If an error occurs repeat the transfer starting back at step 2 until successful Complete the installation by performing steps 12 and 13 of the Downloading RomBug from a host over ethernet section above Z MICROWARE Configuring 172Bug to Boot RomBug Motorola s 172Bug which resides in flash can be configured to automatically boot RomBug using its ROMboot feature This allows resetting into the 172Bug in order to keep the diagnostics handy then automatically transferring control to RomBug to bring up OS 9 However this method is slower than resetting directly into RomBug Configuring 172Bug to Boot RomBug Step 1 Step 2 Step 3 Verify reset into 172Bug Ensure 172Bug is installed in flash the jumper at J21 pins 7 amp 8 is installed and the RomBug PROM is installed in the socket Start up the system Reinstall the cPu module and reset the system to bring up the 172 Bug prompt Copyright Motorola Inc 1988 1997 All Rights Reserved MVME172 Debugger Diagnostics Release Version 1 2 01 21 97 COLD Start Local Memory Found 02000000 amp 33554432 WARNING Local Memory Configuration Status 00000000 MPU Clock Speed 60Mhz 172 Bug Enable the ROMboot feature Enter the ENV command at the 172 Bug gt prompt entering the following values at the configuration field prompt 172 Bug ENV lt return gt Bug or System environment B S B return Field Service Menu Enable Y N
66. ot modules or can be searched by the kernel for additional modules by adjusting the init module s search lists The jumpers must be set to select flash memory for the primary ROM address The address space of the MVME177 RomBug image is divided into the three areas illustrated in Figure 5 2 Figure 5 2 Address Space of the MVME177 RomBug RomBug and Booters i 128K Bytes Embedded i 896K Bytes 3 Access using the OS 9 for 68K Bootfile or ro Boot meni items Z MICROWARE Board Specific OS 9 Modules The board specific drivers available for the MVME177 include tk177 System ticker rtc177 Real time clock driver sc177 SCF serial port driver scp177 SCF parallel port driver scsil77 SCSI low level driver sp177 Ethernet driver Other system modules available for use on the board residing in common directories include cache060 Cache control module ssm060 SSM for the 68060 PMMU ssm060_cbsup Same as above with cache copyback for supervisor state fpsp060 Floating point support package for 68060 CPU chips The MVME177 contains the 182595 Ethernet chip The MVME177 BLS provides the functionality to communicate over the network to other systems System Ethernet modules can be found in the following directory MWOS OS9 68060 PORTS MVME177 CMDS BOOTOBJS SPF spie0 i82596 descriptor sp177 182595 driver inetdb Data module containing network information such as host networks services protoc
67. p OS 9 However this method is much slower than coldstarting directly into RomBug Configuring 177Bug to Boot RomBug Step 1 Step 2 Step 3 Verify PROM installation Ensure 177Bug EPROMs are installed in the primary bank and the RomBug image has been stored in the MVME177 board s flash memory Start up the system Reinstall the CPU module and reset the system to bring up the 177 Bug prompt Copyright Motorola Inc 1988 1993 All Rights Reserved MVME177 Debugger Diagnostics Release Version 1 5 02 14 93 COLD Start Local Memory Found 203000000 amp 50331648 MPU Clock Speed 33Mhz 177 Bug Enable the ROMboot feature Enter the ENV command at the 177 Bug gt prompt entering the following values at the configuration field prompt 177 Bug gt ENV lt return gt Bug or System environment B S B lt return gt Field Service Menu Enable Y N N lt return gt Remote Start Method Switch G M B N B lt return gt Probe System for Supported I O Controllers Y N Y N lt return gt Negate VMEbus SYSFAIL Always Y N N lt return gt Local SCSI Bus Reset on Debugger Startup Y N N lt return gt Local SCSI Bus Negotiations Type A S N A lt return gt MVME177 Reference Ignore CFGA Block on a Hard Disk Boot Y N Y lt return gt Auto Boot Enable Y N N lt return gt Auto Boot at power up only Y N Y lt return gt Auto Boot Controller LUN 00 lt return gt Auto
68. priate Motorola supplied manuals to determine the correct cabling and physical mounting requirements for your desired configuration Enhanced OS 9 for 68K Processors MVME Board Guide Figure 6 1 MVME712 Jumper Block Locations 22772 HHO 17712 1p32 25 13 19 i 13L H4 13 14 14 12 172 Ibo J13 J14 13 h4 134 If j2 Ir 2 141115 sie 217 18 1112 13 13 lu J10 1 14 1 2 1 2 J18 J19 13L la 131114 158 J6 918 ABC 1 ol 350 49 TD d 6 72 J3 4 lI 9 1 O ys 2 1 32 490 50 Z MICROWARE Configuring the MVME712 Transition Module Step 1 Step 2 Step 3 The following steps guide you through configuration of the MVME712 transition module Remove the MVME712 module Remove power from the system and eject the MVME712 module Configure serial ports for DCE operation Serial Port 1 is controlled by jumpers J1 and J11 Serial Port 2 is controlled by jumpers J16 and J17 Serial Port 3 is controlled by jumpers J13 and J14 Serial Port 4 is control
69. r More Information This is explained in more detail in the next section Configuring 177Bug to Boot RomBug Downloading RomBug from a Host Over a Serial Interface Step 1 Step 2 Step 3 The following steps detail the process of downloading the RomBug image from a cross development host over a serial RS232 interface Perform Step 3 from Downloading RomBug from a Host over an Ethernet Network Connect a serial line from the development host to serial port 2 of the MVME 177 board The host s port should be configured to 9600 baud 8 data bits one stop bit no parity Initiate the reception of the image on the MVME177 board with the following command 177 Bug gt LO 1 100000 Step 4 the development host initiate transmission of the rombugger file with the following type of command gt binex s 2 rombugger gt lt port gt The output of the binex command is redirected to the output port If an error occurs repeat the transfer starting back at step 2 until successful Step 5 Complete the installation by performing Step 9 and Step 10 from Downloading RomBug from a Host over an Ethernet Network Z MICROWARE Configuring 177Bug to Boot RomBug Motorola s 177Bug which resides in EPROM can be configured to automatically boot RomBug using its ROMboot feature This allows coldstarting from the 177Bug in order to keep the diagnostics handy then automatically transferring control to RomBug to bring u
70. ribution of software may cause damages far in excess of the value of the copies involved For additional copies of this software documentation or if you have questions concerning the above notice please contact your OS 9 supplier Trademarks OS 9 OS 9000 DAVID and MAUI are registered trademarks of Microware Systems Corporation SoftStax FasTrak UpLink and Hawk are trademarks of Microware Systems Corporation All other product names referenced herein are either trademarks or registered trademarks of their respective owners Address Microware Systems Corporation 1500 N W 118th Street Des Moines lowa 50325 515 223 8000 Table of Contents Chapter 1 MVME147 Reference 7 8 11 Overview of the MVME147 CPU Module ROM Configuration and Organization 12 Installingthe MVME147 CPU Module 15 Configuring 147Bug to Boot RomBug 15 To configure 147Bug to boot RomBug 18 Board Specific OS 9 Modules Chapter 2 MVME162 Reference 19 20 MVME162 Quick Reference 21 Overview of the Original and FX MVME162 CPU Models 28 Overview of the MVME162 LX CPU Models 38 ROM Configuration and Organization 40 Board Specific OS 9 Modules 41 Installing the Original or FX Series MVME162 CPU Module EPROM Method 43 Installing the MVME162LX CPU Module EPROM method 44 Installing the MVME162 CPU Module Flash programming method 46 Configuring 162Bug to Boot RomBug 46 Configuring 162Bug to Boot RomBug 50 162Bug s configuration
71. ster Control 1 0D lt return gt Master Enable 2 Y N N lt return gt Master Starting Address 2 00000000 lt return gt Master Ending Address 2 00000000 lt return gt Master Control 2 00 lt return gt Master Enable 3 Y N Y N lt return gt Master Starting Address 3 00000000 lt return gt Master Ending Address 3 00000000 lt return gt Master Control 3 00 lt return gt Master Enable 4 Y N N lt return gt Master Starting Address 4 00000000 lt return gt Master Ending Address 4 00000000 lt return gt Master Address Translation Address 4 00000000 lt return gt Master Address Translation Select 4 00000000 lt return gt Master Control 4 00 lt return gt Short I O VMEbus A16 Enable Y N Y N lt return gt Short I O VMEbus A16 Control 01 lt return gt F Page VMEbus A24 Enable Y N Y N lt return gt F Page VMEbus A24 Control 02 lt return gt ROM Access Time Code 03 lt return gt FLASH Access Time Code 02 lt return gt MCC Vector Base 05 lt return gt VMEC2 Vector Base 1 06 lt return gt VMEC2 Vector Base 2 07 lt return gt VMEC2 GCSR Group Base Address D2 lt return gt VMEC2 GCSR Board Base Address 00 lt return gt VMEbus Global Time Out Code 01 lt return gt Local Bus Time Out Code 00 lt return gt VMEbus Access Time Out Code 02 lt return gt P A Base Address 00000000 lt return gt P B Base Ad
72. t Master Control 4 00 lt return gt Short I O VMEbus A16 Enable Y N Y N lt return gt Short I O VMEbus A16 Control F Page VMEbus A24 Enable Y N Y N lt return gt F Page VMEbus A24 Control 00 lt return gt ROM Speed Bank A Code 00 lt return gt ROM Speed Bank B Code 00 lt return gt Static RAM Speed Code 00 lt return gt PCC2 Vector Base 05 lt return gt VMEC2 Vector Base 1 06 lt return gt VMEC2 Vector Base 2 07 lt return gt VMEC2 GCSR Group Base Address CC lt return gt VMEC2 GCSR Board Base Address 00 lt return gt VMEbus Global Time Out Code 01 lt return gt Local Bus Time Out Code 00 lt return gt VMEbus Access Time Out Code 02 lt return gt 00 lt return gt uo H I l H H H Update Non Volatile RAM Y N Y Reset Local System CPU Y N Y The system resets twice after responding to the last prompt each time with a three second delay during which the operator may abort the ROMboot process by pressing lt break gt then RomBug is entered Resetting from RomBug brings the operator back to 177Bug debugger with another opportunity to interrupt the automatic ROMboot Once configured RomBug can manually be booted from 177Bug by entering the RB command at the 177 Bug gt prompt Note All of the above 177Bug entries are explained in the 177Bug User s Manual from Motorola MVME177 Reference Note An ABORT RESET sequence disables an automat
73. tcl62 5 162 5 51162 5 162 System ticker Real time clock driver SCF serial port driver SCSI low level driver Ethernet driver Other system modules available for use on the board residing in cache040 ssm040 ssm040_cbsup fpsp040 fpu common directories include Cache control module SSM for the 68040 PMMU Same as ssm040 with cache copyback for supervisor state Floating point support package for 68040 board versions Floating point emulation for 68LC040 board versions MVME162 Reference Installing the Original or FX Series MVME162 CPU Module EPROM Method Step1 Remove power from the system and eject the CPU module Step 2 Install the PROM Note Set EPROM Jumper J21 to short pins 1 2 for 8M Bit setting Some boards may not support 8M Bit EPROMS Check the Motorola documentation that came with your board to verify 8M bit EPROM support Note The 32 pin PROM used with the MVME162 requires special considerations when inserting or removing and during handling A special extraction tool is required to remove the device from its socket When handling and inserting the PROM be careful not to damage or bend the pins on the PROM Step 3 Optional Select the PROM as the reset bank Remove the jumper at J22 pins 9 amp 10 Save the jumper by installing it only on pin 10 Enhanced OS 9 for 68K Processors MVME Board Guide 41 Z MICROWARE M Note Step 4
74. ter responding to the last prompt Copyright Motorola Inc 1988 1989 1990 1991 1992 All Rights Reserved MVME147 Monitor Debugger Release 2 43 6 30 92 CPU running at 25 MHz FPC passed test MMU passed test COLD Start Onboard RAM start 00000000 stop 003FFFFF 147 Bug gt G FFA00416 Effective address FFA00416 Copyright Motorola Inc 1988 1989 1990 1991 1992 All Rights Reserved MVME147 Monitor Debugger Release 2 43 6 30 92 CPU running at 25 MHz FPC passed test MMU passed test COLD Start Onboard RAM start 00000000 stop 003FFFFF 147 Bug gt G FFA00416 Effective address FFA00416 OS 9 68K System Bootstrap lt Called gt Searching special memory list for symbol modules dn 000000FF 00002000 00000000 00000000 00000000 00000001 FFFFEO000 000069F0 an FFA00A6E FFA00500 FFA40000 FFA40000 00007A00 00000400 00000000 000069F0 pc FFA00970 sr 2708 SI 7 N t OFF msp 00005C18 usp 00000000 isp OxFFA00970 gt 43FAFBDA lea l OxFFA0054C pc al RomBug A 3 Guide MVME147 Reference Note The ROMboot feature is not as robust on the MVME147 as it is on the MVME162 and 167 The only way to interrupt or disable ROMboot sequence once it has been enabled is to force an ABORT RESET sequence with the front panel switches This is done by pressing both ABORT and RESET and letting go of RESET while still depressing ABORT until the 147 Bug prompt appears This also disabl
75. th a PROM containing 162Bug and with 162Bug residing in flash The 162Bug includes a facility for reprogramming flash but it must run from the PROM as the primary bank not flash to operate properly MVME162 BLS packages include a RomBug PROM and the ROM image in the file mwos 0S9 68040 PORTS MVME1 62 CMDS BOOTOBJS ROMBUG rombugger Some original and FX boards may restrict the PROM size to 512K bytes which will require the OS 9 ROM image to be programmed into the Flash memory for use The image may optionally be modified and reconstructed from the materials provided in the distribution and downloaded into the board to be programmed into flash There are two methods available for installing OS 9 s Rombug Boot on the board The suggested method retains MotBug in PROM and programs the OS 9 image into the onboard Flash memory This method limits possible damage to the MotBug PROM and makes it easier to make changes to the embedded boot The specifics are covered later in the section The second method involves removing the 162Bug PROM and installing the OS 9 PROM in it s place Take care when removing the 162Bug PROM not to damage any pins and be sure to retain the PROM for use if you ever wish to reprogram the Flash memory Once you ve decided where to have the OS 9 ROM image reside the next step is to decide whether you wish to have 162Bug get control ona reset and boot RomBug in the secondary bank or if you want to have the OS 9 ROM
76. the 177Bug prompt Ensure 177Bug is configured to Probe system for supported I O controllers Y through the ENV command Ensure the time of day clock is started with the SET command for example SET lt yymmddhhmm gt The TIME command can confirm the correct setting and operation Obtain an IP address for the MVME177 board Determine the assigned IP address for the cross development nost bootp tftp server Use the NP ING command to confirm connectivity between the MVME177 board and the host system Use the Network I O Teach command to configure the network driver with the correct IP addresses Move the file MWOS 0S9 68060 PORTS MVME177 CMDS BOOTOBJS ROMBUG rombugger tO the tftp server Step 8 Step 9 Step 10 Z MICROWARE Initiate transfer of the RomBug image with the Network I O Physical command Specify a read with the rombugger file path toa load address of 100000 If an error occurs repeat the transfer until successful When the previous command is complete enter the command to program the image into flash 177 Bug gt PFLASH 100000 100000 FFA00000 B When programming is complete enable ROM booting by entering the ENV command Specify the starting address as FFA00400 and the ending address as FFA00500 You should include a delay count of three 3 seconds to give yourself time to interrupt an automatic ROM boot to regain access to the 177Bug debugger Fo
77. the automatic ROMboot Once configured RomBug can manually be booted from 162Bug by entering the RB command at the 167 Bug gt prompt Note All of the above 167Bug entries are explained in the 167Bug User s Manual 3 MVME167 Reference Z MICROWARE M Note An ABORT RESET sequence disables an automatic ROMboot sequence As a result it cannot be used alone to force an OS 9 RomBug reconfiguration session when 167Bug is in the primary ROM bank To force a reconfiguration session from 167Bug press and hold the ABORT switch enter the RB command wait at least as long as the ROM boot abort delay and then release the ABORT switch 66 Enhanced OS 9 for 68K Processors MVME Board Guide Chapter 4 MVME172 Reference This section contains information about the MVME172 models It contains the following sections MVME172 Quick Reference Overview of the MVME172 CPU Models ROM Configuration and Organization Board Specific OS 9 Modules Installing the MVME172 CPU Module EPROM Method Configuring 172Bug to Boot RomBug ZA MICROWARE Z MICROWARE MVME172 Quick Reference Ports Directory lt mwos gt OS9 68060 PORTS MVME172 Console Port Location Faceplate connector labeled console OS 9 EPROM Size 1 megabyte X 8 bits EPROM available or can be programmed into Flash M Note EPROMSs are available from Microware Contact support at support microware com or 1 800 475 9000 ROM Booting Search
78. to 8 9 to 10 11 to 12 13 to 14 15 to 16 1357 9 11 13 15 System Controller Selection J2 System Controller Not System Controller 1 2 1 2 Factory Default Serial Port 4 Clock Configuration Select Headers J6 Jumper 2 3 to receive RTXC4 Factory Configuration J7 Jumper 2 3 to receive TRXC4 Factory Configuration J6 Jumper 1 2 to drive RTXC4 J7 Jumper 1 2 to drive TRXC4 Jumper Block J6 Jumper Block J7 1 1 2 2 3 3 Reinsert the CPU module into the system Complete hardware installation Once the EPROM and jumper installation is done carefully read the MVME167 User Manual supplied by Motorola to complete the hardware installation steps required for the P2 Adaptor Card if used MVME167 Reference Z the MVME712 Transition Module s These instructions also detail the various options available for cabling SCSI devices to the MVME167 module M Note Jumper installation details for the MVME712 module s are supplied in the support module appendix However carefully read the Motorola supplied documentation to ensure all hardware cabling requirements are correctly satisfied LIahannarn Oc Brana nas AIME Enhanced OS 9 for 68K Processors MVME Board Guide Configuring 167Bug to Boot RomBug Motorola s 167Bug which resides in EPROM can be configured to auto
79. ts are U1 high byte and U15 low byte Insert the RomBug EPROMs into the appropriate bank s as desired keeping watch for the correct part high or low in the correct socket of the bank The notches in the EPROMs should face the top edge of the card for non S models or the backplane for S models Examine and change the jumpers on the MVME147 module In general the jumper settings for the MVME147 module should remain the same as the factory default settings or configured specifically to your needs with the exception of the ROM size jumpers for the bank s containing RomBug EPROMSs If the jumpers are set for a size too small Boot from ROM will not operate correctly if RomBug even operates at all The jumper configurations are identical across all models of the MVME147 and across banks Figure 1 4 EPROM Size Select Banks 1 and 2 Banks 1 J3 for 147 J2 for 147S and 2 J4 for 147 J1 for 147S Jumper Blocks This jumper selects the size of the 2 4 6 8 10 12 14 16 18 EPROMSs installed for the Bank used by the OS 9 RomBug EPROMs For 1 3 5 7 9 11 13 15 17 27C040 type EPROMs 256K x 8 connect 2 to 4 3 to 5 6 to 8 7 to 9 13 to 15 and 14 to 16 Note The MotBug EPROMs will use a different jumper setting because they are not 270040 EPROMs Figure 1 5 System Controller Enable Header J5 for 147 J3 for 147S J5 for 147 J3 for 147S Jumper Block J5 J3 This ju
80. ve power from the system and eject the MVME172 CPU module Verify EPROM installation Motorola s 172Bug EPROMS are shipped with the MVME172 board 172Bug will be used to install the OS 9 RomBug image into the MVME172 board s flash memory The EPROMs may be disabled with jumper J8 once the RomBug image is stored in flash Set jumpers For installation the jumper settings for the MVME172 should be set to boot from EPROM FX Models J28 LX models J21 Reinsert the MVME172 CPU module into the system IReset the system by powering up or pressing the reset switch This brings up the 172Bug prompt You may need to press break to bring up the 172Bug prompt Ensure the 172Bug is configured to Probe system for supported I O controllers Y through the ENV command Ensure the time of day clock is started with the SET command for example SET lt yymmddhhmm gt The TIME command can confirm the correct setting and operation Obtain an IP address for the MVME172 board Determine the assigned IP address for the cross development nost bootp tftp server Use the NPING command to confirm connectivity between the MVME172 board and the host system Transfer the file mwos 089 68060 PORTS MVME172 CMDS BOOTOBJS ROMBUG rombugger to the tftp server Z MICROWARE Step 10 Use the uror Network I O Teach command to configure the network driver with the correct IP addresses Step 11 Initiate transfer of the RomBug image
81. ver this method is much slower than coldstarting directly into RomBug To configure 147Bug to boot RomBug Step 1 Ensure that 147Bug EPROMSs are installed in the primary bank that RomBug EPROMSs are installed in the secondary bank and that the ROM size jumper settings for each bank are correctly set Step 2 Reinstall the CPU 147 Bug prompt Copyright Mo module and reset the system to bring up the torola Inc 1988 1989 1990 1991 1992 All Rights Reserved MVME147 Moni tor Debugger Release 2 43 6 30 92 CPU running at 25 MHz FPC passed test MMU passed COLD Start Onboard RAM 147 Bug test start 00000000 stop 003FFFFF Step 3 Enter the RB command at the 147Bug gt prompt entering the following values at the configuration field prompt 147 Bug RB return Boot at Powe return r up only or any board Reset P R P R Enable search of VMEbus Y N N return Step 4 Reference Z MICROWARE Boot direct address SFF800000 FFA00400 lt return gt ROM boot enabled 147 Bug Enter the RESET command to force 147Bug to initiate the ROMboot sequence 147Bug RESET lt return gt Reset Local SCSI Bus Y N N return Automatic reset of known SCSI Buses on RESET Y N N return Cold Warm Reset flag C W C return Execute Soft Reset Y N N Y return The system will reset twice af

Enhanced OS-9 for 68K Processors MVME Board Guide

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