µPD78F0988A, 78F0988A(A)
Contents
1. Data Sheet U15801EJ1VODS 31 NEC uPD78F0988A 78F0988A A External data access no wait ADO to AD7 8 bit address Readdata Wrtedata ASTB RD I tASTRD WR External data access wait insertion tappe Hi Z Hi Z ADO to AD7 addas sc MED Read data D Write data p iRDAD tRDH lAsTH big ASTB lASTRD RD 1 12 twos twoH twRwD WR tasrwR a RDWT2 twr twrRD twr twRwT twrwr 32 Data Sheet U15801EJ1VODS Serial Transfer Timing 3 wire serial mode tkcym tkHm SCK tksom SO Data Sheet U15801EJ1VODS uPD78F0988A 78F0988A A 33 NEC uPD78F0988A 78F0988A A A D Converter Characteristics Ta 40 to 85 C Voo AVpp 4 0 to 5 5 V AVss Vss 0 V Parameter Conditions Resolution Overall errorNete 4 0 V lt AVrer lt 5 5 V 2 7 V lt AVrerF lt 4 0 V Conversion time 4 0 V lt AVrer lt 5 5 V 2 7 V AVner lt 4 0 V Zero scale errorNete 4 0 V lt AVrer lt 5 5 V 2 7 V lt AVneE lt 4 0 V Full scale errorNete 4 0 V lt AVrer lt 5 5 V 2 7 V lt AVneE lt 4 0 V Non linearity error 4 0 V lt AVrer lt 5 5 V 2 7 V lt AVrer lt 4 0 V Differential non linearity error 4 0 V lt AVrer lt 5 5 V 2 7 V2. Storage temperature 40 to 125 Note rms value should be calculated as follows rms value Peak value x VDuty Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter That is the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded Capacitance Ta 25 C Vss 0 V sees pm e ps Den Input capacitance f 1 MHz Unmeasured pins returned to 0 V I O capacitance f 1 MHz to P20 to P26 P30 Unmeasured pins to P37 P40 to P47 P50 to returned to O V P57 P64 to P67 TO70 to TO75 Remark Unless specified otherwise the characteristics of alternate function pins are the same as those of port pins 22 Data Sheet U15801EJ1VODS System Clock Oscillator Characteristics TA 40 to 85 C Vpp 4 0 to 5 5 V Resonator Ceramic resonator Recommended Circuit Parameter Oscillation frequency fx Nete 1 uPD78F0988A 78F0988A A Conditions Oscillation stabilization timeNote 2 After reaches oscillation voltage range MIN Crystal resonator Oscillation frequency fx Note 1 Oscillation stabilization After reaches oscillation timeNete 2 voltage range MIN External clock X1 input freq
3. Connecting crystal resonator for system clock oscillation Positive power supply for ports Ground potential for ports Positive power supply except for ports Ground potential except for ports 14 High voltage application during program write verify In the normal operation mode connect directly to Vsso Data Sheet U15801EJ1VODS uPD78F0988A 78F0988A A 3 3 Pin I O Circuits and Recommended Connection of Unused Pins The circuit type of each and recommended connection of unused pins are shown in Table 3 1 For the circuit configuration of each type refer to Figure 3 1 Pin Name POO INTPO TOFF7 PO1 INTP1 PO2 INTP2 POS INTPS ADTRG Table 3 1 Types of Pin Circuits Circuit Type Recommended Connection of Unused Pins Input Independently connect to Vsso via a resistor Output Leave open P10 ANIO to P17 ANI7 Independently connect to Vppo or Vsso via a resistor P20 RxD00 21 7 P22 RxD01 P23 TxD01 P24 TI50 TO50 P25 TI51 TO51 26 1152 052 P30 RTPO to P37 RTP7 P40 ADO to P47 AD7 P50 P51 SCK P52 SI P53 SO P54 INTP4 TIOO0 TOOO0 P55 INTP5 TIO10 P56 INTP6 T1001 TOO1 P57 INTP7 T101 1 P64 RD P65 WR P66 WAIT P67 ASTB Input Independently connect Vppo Vsso via a resistor Output Leave ope
4. CSA8 00MTZ CST8 00MTW CSA8 38MTZ CST8 38MTW The oscillator constant and oscillation voltage range indicate conditions of stable oscillation Oscillation frequency precision is not guaranteed For applications requiring oscillation frequency precision the oscillation frequency must be adjusted on the implementation circuit For details contact directly the manufacturer of the resonator you will use 24 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A DC Characteristics Ta 40 to 85 C 4 0 to 5 5 V Parameter Conditions Input voltage P10 to P17 P21 23 P30 to P37 P40 to P47 P50 P53 high P64 to P67 RESET to P20 P22 P24 to P26 P51 P52 P54 to P57 X1 X2 Input voltage low P10 to P17 P21 P23 P30 to P37 P40 to P47 P50 P53 P64 to P67 RESET to P20 P22 P24 to P26 P51 P52 P54 to P57 X1 X2 Output voltage 4 5 V lt 5 5 V 1 mA high lou 100 uA Output voltage P50 to P57 TO70 to TO75 5 0 lt lt 5 5 low lo 15 mA to P20 to P26 5 0 V lt 5 5 V P30 to P37 P40 to P47 lo 1 6 mA P64 to P67 lo 400 uA Input leakage Vin P00 to P03 P10 to P17 current high P20 to P26 P30 to P37 P40 to P47 P50 to P57 P64 to P67 TO70 to TO75 RESET X1 X2 Input leakage P00 to P03 P10 to P17 current low P20 to P26 P30 to P37 P40 to
5. FA 64GC for 64 pin plastic GC AB8 type FA 64GC 8BS A for 64 pin plastic LQFP GC 8BS type When 78 0 5 IE 78K0 NS A in circuit emulator is used IE 78K0 NS In circuit emulator common to 78K 0 Series IE 78K0 NS PA Performance board for enhancement and expansion of IE 78K0 NS functions IE 78K0 NS A Combination of IE 78K0 NS and IE 78K0 NS PA IE 70000 MC PS B Power supply unit for IE 78KO NS IE 70000 98 IF C Interface adapter necessary when PC 9800 series PC except notebook type is used as host machine C bus supported IE 70000 CD IF A PC card and interface cable when notebook PC is used as host machine PCMCIA socket supported IE 70000 PC IF C Interface adapter necessary when using or compatible as host machine ISA bus supported IE 70000 PCI IF A Adapter necessary when using PCI bus incorporated personal computer as host machine IE 780988 NS EMA 78 0 5 01 Emulation board and I O board to emulate uPD780988 Subseries NP 64CW Emulation probe for 64 pin plastic SDIP CW type NP 64GC NP 64GC TQ NP H64GC TQ Emulation probe for 64 pin plastic GC AB8 type 64 pin plastic LQFP GC 8BS type EV 9200GC 64 Conversion socket to connect the NP 64GC and a target system board on which the 64 pin plastic GC AB8 type 64 pin plastic LQFP GC 8BS type can be mounted TGC 064SAP Conversio
6. Documents related to flash memory writing PG FP3 Flash Memory Programmer User s Manual 013502 Other related documents Document Name Document No SEMICONDUCTORS SELECTION GUIDE Products amp Packages X13769E Semiconductor Device Mounting Technology Manual C10535E Quality Grades on NEC Semiconductor Devices C11531E NEC Semiconductor Device Reliability Quality Control System C10983E Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge ESD C11892E Caution The related documents listed above are subject to change without notice Be sure to use the latest version of each document for designing Data Sheet U15801EJ1VODS 49 NEC uPD78F0988A 78F0988A A NOTES FOR CMOS DEVICES PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note Strong electric field when exposed to a MOS device can cause destruction of the gate oxide and ultimately degrade the device operation Steps must be taken to stop generation of static electricity as much as possible and quickly dissipate it once when it has occurred Environmental control must be adequate When it is dry humidifier should be used Itis recommended to avoid using insulators that easily build static electricity Semiconductor devices must be stored and transported in an anti static container static shielding bag or conductive material All test and measurement tools including work bench and floor should be grounded The operator shou
7. b 3 wire serial mode SCK External clock input Parameter Conditions SCK cycle time SCK high low level width SI setup time to SCKT SI hold time from SCKT Delay time from SCKL C 100 pFNete to SO output Note is the load capacitance of the SCK and SO output lines c UART mode UARTOO Dedicated baud rate generator output d UART mode UARTOO Infrared data transfer mode Parameter Conditions Transfer rate 115200 Bit rate allowable error 10 87 Output pulse width i 0 24 fprNete Input pulse width Note fbr Set baud rate e UART mode UART01 Dedicated baud rate generator output Symbo o JJ Je be Data Sheet U15801EJ1VODS 29 NEC uPD78F0988A 78F0988A A AC Timing Test Points Excluding X1 Input 0 8Vpp 0 8Vpp Test points 0 2Vpp cl 0 2Vpp Clock Timing Vins MIN X1 input MAX TI Timing 1 frio gt T1000 T1001 TIO10 TIO11 1 fns 50 1 TI52 TOFF Timing trorrr tToFFH TOFF7 30 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A Read Write Operation External fetch no wait ADO to AD7 ASTB lASTRD External fetch wait insertion ADO to AD7 Q 8 bit address tastH tRDAST ASTB lASTRD tROWT1 twr twrRD
8. Batch blank check Checks that the entire memory has been erased Data write Performs writing to flash memory according to the write start address and the number of the data to be written the number of bytes Batch verify Compares the contents of the entire memory and the input data Write back Countermeasure for the over erase state of the flash memory 6 3 Connection of Flashpro lll The connection of the Flashpro Ill and the uPD78F0988A differs depending on the communication mode The types of connections are shown in Figures 6 2 6 3 and 6 4 Figure 6 2 Connection of Flashpro 11 Using 3 Wire Serial I O Mode Flashpro Ill APD78F0988A Note For input to X1 a normal oscillator can also be used instead of CLK 20 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A Figure 6 3 Connection of Flashpro Ill Using 3 Wire Serial I O Mode When Using Handshake Flashpro III LPD78F0988A P50 HS Vssi Vsso Note For input to X1 a normal oscillator can also be used instead of CLK Figure 6 4 Connection of Flashpro Ill Using UART Flashpro Ill LPD78F0988A Note For input to X1 a normal oscillator can also be used instead of CLK Figure 6 5 Connection of Flashpro III Using Pseudo 3 Wire Serial I O Mode Flashpro 111 LPD78F0988A VPP Vop1 Vppo 1 Note RESET P26 Serial clock input P24 Serial data input P25 Serial dat
9. NEC semiconductor products customers must incorporate sufficient safety measures in their design such as redundancy fire containment and anti failure features NEC semiconductor products are classified into the following three quality grades Standard Special and Specific The Specific quality grade applies only to semiconductor products developed based on a customer designated quality assurance program for a specific application The recommended applications of a semiconductor product depend on its quality grade as indicated below Customers must check the quality grade of each semiconductor product before using it in a particular application Standard Computers office equipment communications equipment test and measurement equipment audio and visual equipment home electronic appliances machine tools personal electronic equipment and industrial robots Special Transportation equipment automobiles trains ships etc traffic control systems anti disaster Systems anti crime systems safety equipment and medical equipment not specifically designed for life support Specific Aircraft aerospace equipment submersible repeaters nuclear reactor control systems life support systems and medical equipment for life support etc The quality grade of NEC semiconductor products is Standard unless otherwise expressly specified in NEC s data sheets or data books etc If customers wish to use NEC semiconductor products i
10. REGISTER IMS 2 2 2 17 5 INTERNAL EXPANSION RAM SIZE SWITCHING REGISTER IXS 18 6 FLASH MEMORY PROGRAMMING nam u 4 RAS 19 6 1 Selection of Communication Mode U uuu 19 6 2 Flash Memory Programming Functions U U u uuu uu uuu uu u 20 6 3 Connection of Flashpro lI UU S ualere cuida ceo 20 7 ELECTRICAL 65 u u 22 8 PACKAGE DRAWINGS RR NR S DSSA RR NR 4 u 38 9 RECOMMENDED SOLDERING CONDITIONS sanam aaa 41 APPENDIX A DEVELOPMENT TOOLS UU u 42 APPENDIX B RELATED DOCUMENTS u AR RR R44 u 48 Data Sheet U15801EJ1V0DS 9 uPD78F0988A 78F0988A A 1 DIFFERENCES BETWEEN 4PD78F0988A AND MASK ROM VERSIONS The uPD78F0988A is a product with a flash memory which enables on
11. Tel 01908 691 133 Fax 01908 670 290 NEC Electronics Italiana s r l Milano Italy Tel 02 66 75 41 Fax 02 66 75 42 99 NEC Electronics Germany GmbH Benelux Office Eindhoven The Netherlands Tel 040 2445845 Fax 040 2444580 NEC Electronics France S A Velizy Villacoublay France Tel 01 3067 5800 Fax 01 3067 5899 NEC Electronics France S A Madrid Office Madrid Spain Tel 091 504 2787 Fax 091 504 2860 NEC Electronics Germany GmbH Scandinavia Office Taeby Sweden Tel 08 63 80 820 Fax 08 63 80 388 Data Sheet U15801EJ1VODS NEC Electronics Hong Kong Ltd Hong Kong Tel 2886 9318 Fax 2886 9022 9044 NEC Electronics Hong Kong Ltd Seoul Branch Seoul Korea Tel 02 528 0303 Fax 02 528 4411 NEC Electronics Singapore Pte Ltd Novena Square Singapore Tel 253 8311 Fax 250 3583 NEC Electronics Taiwan Ltd Taipei Taiwan Tel 02 2719 2377 Fax 02 2719 5951 NEC do Brasil S A Electron Devices Division Guarulhos SP Brasil Tel 11 6462 6810 Fax 11 6462 6829 J01 2 51 NEC uPD78F0988A 78F0988A A The information in this document is current as of September 2001 The information is subject to change without notice For actual design in refer to the latest publications of NEC s data sheets or data books etc for the most up to date specifications of NEC semiconductor products Not all products and or types are available in every country Please check with an
12. board writing erasing and rewriting of programs Except for flash memory specifications the same functions as those of mask ROM versions can be obtained by setting the internal memory size switching register IMS and internal expansion RAM size switching register IXS Table 1 1 shows the differences between the flash memory version uPD78F0988A and mask ROM versions uPD780982 780983 780984 780986 780988 Table 1 1 Differences Between uPD78F0988A and Mask ROM Versions Internal ROM structure uPD78F0988A Flash memory Mask ROM Versions Mask ROM Internal ROM capacities 60 KB 780982 16 KB LPD780983 24 KB uPD780984 32 KB LPD780986 48 KB LPD780988 60 KB Internal expansion RAM capacities 1024 bytes uPD780982 None LPD780983 None uPD780984 None LPD780986 1024 bytes LPD780988 1024 bytes Change of internal ROM capacity with internal memory size switching register IMS AvailableNete 1 Not available Change of internal expansion RAM capacity with internal expansion RAM size switching register IXS AvailableNete 2 Not available TEST pin Not provided Provided VPP Provided Notes 1 Flash memory capacity becomes 60 KB by RESET input 2 Internal expansion RAM capacity becomes 0 bytes by RESET input Caution Not provided There are differences in noise immunity and noise radiation between the flash memory and mask ROM ve
13. external interface 100 pin 78070 78070 100 uPD780018AY ROMless version of the uPD78078 LPD78078Y with enhanced serial I O and limited function 80 pin LA PD78054 with enhanced serial I O 80 pin LPD78058FY reduced version of the u PD78054 80 pin LIPD78054 LPD78018F with enhanced UART and D A converter and enhanced I O 80 pin 780024 with increased RAM capacity 64 pin 80034 with added timer and enhanced serial I O 64 pin 780024 with enhanced A D converter LPD78018F with enhanced serial I O 64 pin uPD780024A uPD780024AY 64 pin uPD78014H EMI noise reduced version of the PD78018F 64 pin uPD78018F uPD78018FY Basic subseries for control 42 44 pin uPD78083 On chip UART capable of operating at low voltage 1 8 V Inverter control m 64 pin uPD780988 On chip inverter controller and UART EMI noise reduced VFD drive if 100 pin LPD78044F with enhanced I O and VFD C D Display output total 53 80 For panel control On chip VFD C D Display output total 53 80 pin LPD78044F with added N ch open drain I O Display output total 34 80 Basic subseries for VFD drive Display output total 34 LCD drive F 120 pin 780308 with enhanced display function and timer Segment signal output 40 pins max 120 pin 780308 with enhanced display function and timer Segment
14. is located within 0 15 mm of A 17 6 0 4 its true position T P at maximum material condition 14 0 0 2 14 0 0 2 17 6 0 4 1 0 1 0 I O Tojo 0 08 0 37 0 07 0 15 0 8 1 8 0 2 0 8 0 2 0 08 017 007 0 10 2 55 0 1 0 1 0 1 59559 2 85 P64GC 80 AB8 5 r Data Sheet U15801EJ1VODS 39 uPD78F0988A 78F0988A A 64 PIN PLASTIC LQFP 14x14 detail of lead end rS ITEM MILLIMETERS A 17 2 0 2 14 0 0 2 14 0 0 2 17 2 0 2 1 0 1 0 0 08 0 37 6 07 0 20 0 8 1 6 0 2 0 8 0 03 0 1776 06 0 10 1 40 1 0 127 0 075 1 7 0 25 0 886 0 15 P64GC 80 8BS EX NOTE Each lead centerline is located within 0 20 mm of its true position T P at maximum material condition C 2iop m o vuz xj r c T 40 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A 9 RECOMMENDED SOLDERING CONDITIONS This product should be soldered and mounted under the following recommended conditions For soldering methods and conditions other than those recommended below contact an NEC sales representative For details of the recommended soldering conditions refer to the document Semicondu
15. lt AVneE lt 4 0 V Analog input voltage Reference voltage Resistance between AVrer When A D converter is not operating and AVss Note Excludes quantization error 1 2 LSB This value is indicated as a ratio FSR to the full scale value Data Memory STOP Mode Low Supply Voltage Data Retention Characteristics TA 40 to 85 C Parameter Conditions Data retention power supply voltage Data retention 2 0 V power supply current Release signal set time Oscillation stabilization Release by RESET wait time Release by interrupt request Note Selection of 212 fx and 2 4 fx to 217 fx is possible with bits 0 to 2 OSTSO to OSTS2 of the oscillation stabilization time select register OSTS 34 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A Data Retention Timing STOP Mode Release by RESET Internal reset operation HALT mode i STOP mode ete Operation mode Data retention mode O r nWAPn Vpp STOP instruction execution RESET twat Data Retention Timing Standby Release Signal STOP Mode Release by Interrupt Request Signal HALT mode N STOP mode Operation mode Data retention mode STOP instruction execution Standby release signal interrupt request twarr Interrupt Request Input Tim
16. recommended Data Sheet U15801EJ1VODS 5 uPD78F0988A 78F0988A A 64 pin plastic 14 x 14 uPD78F0988AGC AB8 78F0988AGC A ABB8 64 pin plastic LQFP 14 x 14 uPD78F0988AGC 8BS 78F0988AGC A 8BS O P66 WAIT O P65 WR P47 AD7 P46 AD6 O P45 AD5 P44 AD4 O P43 AD3 P42 AD2 O P41 AD1 P40 ADO O P67 ASTB O P64 RD P37 RTP7 O P36 RTP6 P35 RTP5 O P34 RTP4 P50 O 1 O P33 RTP3 P51 SCK O 2 O P32 RTP2 P52 SI 3 O P31 RTP1 P53 SO O 4 P54 TIOOO TOOO INTP4 5 O PO1 INTP1 P55 TIO10 INTP5 O 6 O POO INTPO TOFF7 P56 T1001 TOO1 INTP6 O 7 P57 TIO11 INTP7 8 O X1 Vsso 9 O X2 TEST TO70O O POS INTPS ADTRG 0710 O PO2 INTP2 TO72 O O RESET 7 TO74 AVrer TO75 O O P10 ANI0 P23 TxD01 O Vop AVss O P17 ANI7 O P16 ANI6 O P15 ANI5 O P14 ANI4 O P13 ANI3 O P12 ANI2 O P11 ANI1 O P22 RxD01 O P24 T150 TO50 Os O o o gt lt EE N 8 P25 T151 TO51 P26 TI52 TO52 O Cautions 1 In the normal operation mode connect the VPP pin directly to Vsso 2 In the flash memory writing mode connect the VPP pin to Vsso via a 10 pull down resistor Remark When the uPD78F0988A and 78F0988A A are used in applications where the noise generated inside the microcontroller needs to be reduced the implementation of noise reduction measures such as supplying voltage to and Vpn1 individua
17. to 60 K 3 ch UART 1 ch uPD78054 16Kto60K JP D780065 40 K to 48 K 4 ch UART 1 ch JP D780078 48 K to 60 K 8 ch UART 2 ch uPD780034A 8 K to 32 K ch UART 1 ch uPD780024A 1 ch UART 1 ch Inverter control uPD780208 32 K to 60 K uPD780232 16 K to 24 K LuPD78044H 32 K to 48 K uPD78044F 16 K to 40 K uPD780338 48 K to 60 K 2 ch UART 1 ch uPD780328 uPD780318 LPD780308 48 K to 60 K 3 ch time division UART 1 ch uPD78064B 32 2 ch UART 1 ch uPD78064 16Kto32K Bus LPD780948 60 K 3 ch UART 1 ch interface supported UPD78098B 40 K to 60 K 780816 32 K to 60 K 2 ch UART 1 ch Meter 780958 48 4ch 2ch ch 2 ch UART 1 ch 69 2 2 V control 780852 32 K to 40 K 3 ch UART 1 ch uPD780828B 32 K to 60 K Note 16 bit timer 2 channels 10 bit timer 1 channel Data Sheet U15801EJ1VODS 3 NEC uPD78F0988A 78F0988A A OVERVIEW OF FUNCTIONS Internal Flash memory 60 KBNete 1 memory High speed RAM 1024 bytes Expansion RAM 1024 bytesNete2 Memory space 64 KB General purpose register 8 bits x 32 registers 8 bits x 8 registers x 4 banks Instruction cycle On chip instruction execution time variable function 0 24 us 0 48 5 0 96 us 1 9 us 3 8 u
18. 0982 A 780983 A 780984 A 780986 A 780988 A Data Sheet U12804E UPD78F0988A 78F0988A A Data Sheet This manual 780988 Subseries Inverter Control Application Note U13119E 78K 0 Series Instructions User s Manual Documents related to development software tools user s manuals U12326E Document Name Document No RA78KO Assembler Package Operation U14445E Language U14446E Structured Assembly Language U11789E CC78KO0 C Compiler Operation U14297E Language 014298 5 78 05 SM78KO System Simulator Ver 2 10 or Later Operation Windows Based U14611E SM78K Series System Simulator Ver 2 10 or Later External Part User Open Interface Specifications U15006E ID78KO NS Integrated Debugger Ver 2 00 or Later Operation Windows Based U14379E ID78KO Integrated Debugger Windows Based Reference U11539E Guide U11649E RX78KO Real Time OS Fundamentals U11537E Installation U11536E Project Manager Ver 3 12 or Later Windows Based Documents related to development hardware tools user s manuals U14610E Document Name Document No IE 78K0 NS In Circuit Emulator U13731E IE 78K0 NS A In Circuit Emulator U14889E IE 78001 R A In Circuit Emulator 014142 78 0 1 In Circuit Emulator 48 Data Sheet U15801EJ1VODS To be prepared NEC uPD78F0988A 78F0988A A
19. 1 FFF4H OCH R W 2 IXRAM1 Selection of internal expansion RAM capacity 0 1 1024 bytes 0 1 No internal expansion RAM Other than above Setting prohibited Table 5 1 shows the IXS setting values to make the memory mapping the same as that of mask ROM versions Table 5 1 Setting Value of Internal Expansion RAM Size Switching Register Target Mask ROM Versions IXS Setting Value uPD780982 uPD780983 uPD780984 uPD780986 uPD780988 18 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A 6 FLASH MEMORY PROGRAMMING On board writing of flash memory with device mounted on target system is supported On board writing is done after connecting a dedicated flash programmer Flashpro III part numbers FL PR3 and PG FP3 to the host machine and target system Moreover writing to flash memory can also be performed using a flash memory writing adapter connected to Flashpro lll Remark is a product of Naito Densei Machida Mfg Co Ltd 6 1 Selection of Communication Mode Writing to flash memory is performed using Flashpro III with a serial communication mode Select the communi cation mode for writing from Table 6 1 For the selection of the communication mode a format like the one shown in Figure 6 1 is used The communication modes are selected using the VPP pulse numbers shown in Table 6 1 Table 6 1 Communication Mod
20. 1VODS NEC uPD78F0988A 78F0988A A PIN CONFIGURATION TOP VIEW 64 Pin Plastic SDIP 19 05 mm 750 uPPD78F0988ACW P40 ADO O 1 O P67 ASTB P41 AD1 2 O P66 WAIT P42 AD2 3 O P65 WR P43 AD3 4 O P64 RD P44 AD4 O 5 O P37 RTP7 P45 AD5 6 O P36 RTP6 P46 AD6 O 7 O P35 RTP5 P47 AD7 8 P34 RTP4 P50 O P33 RTP3 P51 SCK O O P32 RTP2 P52 SI O P31 RTP1 P53 SO O P30 RTPO P54 TIO00 TOOO INTP4 O O PO1 INTP1 P55 TIO10 INTP5 O O POO INTPO TOFF7 P56 TI001 TOO1 INTP6 O Vssi P57 TIO11 INTP7 O O X1 Vsso O X2 Vppo O O TEST TO70 O O P03 INTP3 ADTRG TO71 O O PO2 INTP2 TO72 O RESET TO73 O O TO74 O O AVREF TO75 O O P10 ANI0 P20 RxD00 O O P11 ANI1 P21 TxD00 O O P12 ANI2 P22 RxD01 O O P13 ANI3 P23 TxD01 O O P14 ANIA P24 TI50 TO50 O O P15 ANI5 25 151 51 O O P16 ANI6 26 52 052 O O P17 ANI7 O O AVss Cautions 1 In the normal operation mode connect the VPP pin directly to Vsso 2 In the flash memory writing mode connect the VPP pin to Vsso via a 10 pull down resistor 3 The 64 pin plastic SDIP 19 05 mm 750 package is not provided for special quality grade products Remark When the uPD78F0988A and 78F0988A A are used in applications where the noise generated inside the microcontroller needs to be reduced the implementation of noise reduction measures such as supplying voltage to Vppo and individually and connecting Vsso Vssi to different ground lines is
21. 8240GC R ID78KO Integrated debugger for IE 78001 R A SM78KO DF780988 EP 78240CW R EP 78240GC R EV 9200GC 64 System simulator common to 78K 0 Series Device file for uPD780988 Subseries 5 Real time OS RX78KO Real time OS for 78K 0 Series 6 Cautions on using development tools The ID78K0 NS ID78K0 and SM78KO are used in combination with the DF780988 e The CC78K0 and RX78KO are used in combination with the RA78KO or DF780988 The FL PR3 FA 64CW FA 64GC NP 64CW NP 64GC NP 64GC TQ and NP H64GC TQ are products made by Naito Densei Machida Mfg Co Ltd TEL 81 45 475 4191 e The TGC 064SAP is a product made by TOKYO ELETECH CORPORATION For further information contact Daimaru Kogyo Ltd Tokyo Electronics Department TEL 81 3 3820 7112 Osaka Electronics Department TEL 81 6 6244 6672 For third party development tools see the Single Chip Microcontroller Development Tool Selection Guide U11069E The host machine and OS suitable for each software are as follows Host Machine PC EWS OS PC 9800 series Japanese Windows HP9000 series 700 HP UX IBM PC AT and compatibles SPARCstation SunOS Solaris Japanese English Windows RA78KO CC78K0 ID78K0 NS ID78KO 5 78 0 RX78KO Note DOS based software Data Sheet U15801EJ1VODS 43 NEC uPD78F0988A 78F0988A A 7 Cautions on designing target system The connection condition diagrams
22. Conversion adapter TGC 064SAP Target system IC socket uPD78F0988A 78F0988A A 45 uPD78F0988A 78F0988A A Figure A 4 Connection Condition of Target System 1 Emulation probe NP 64GC Emulation board 780988 5 4 50 2 2 2 10 x A Conversion socket 7 T D ur EV 9200GC 64 sss ese CD WE ie NN 1 pin dS 7 35 mm 60 mm Target system Figure A 5 Connection Condition of Target System 2 Emulation probe NP 64GC TQ Emulation board IE 780988 NS EM4 Conversion adapter Target system TGC 064SAP 46 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A Figure A 6 Connection Condition of Target System 3 Emulation probe NP H64GC TQ Emulation board IE 780988 NS EM4 Conversion adapter TGC 064SAP Target system Figure A 7 Connection Condition of Target System 4 Emulation probe NP 64CW he Emulation board IE 780988 NS EM4 Target system Data Sheet U15801EJ1VODS 47 NEC APPENDIX B RELATED DOCUMENTS The related documents indicated in this publication may include preliminary versions versions are not marked as such Documents related to devices uPD78F0988A 78F0988A A However preliminary Document Name Document No LPD780988 Subseries User s Manual U13029E UPD780982 780983 780984 780986 780988 78
23. DATA SHEET MOS INTEGRATED CIRCUIT uPD78F0988A 78F0988A A 8 BIT SINGLE CHIP MICROCONTROLLERS DESCRIPTION The uPD78F0988A and 78F0988A A are products in the PD780988 Subseries in the 78K 0 Series that have flash memory in the place of the internal ROM of the uPD780988 Flash memory be written or erased electrically with the device mounted on the board Therefore the uPD78F0988A and uPD78F0988A A are ideal for evaluation in system development small scale production or systems likely to be upgraded frequently Detailed function descriptions are provided in the following user s manuals Be sure to read them before designing UPD780988 Subseries User s Manual U13029E 78K 0 Series Instruction User s Manual U12326E FEATURES Pin compatible with mask ROM version except VPP pin Flash memory 60 KBNete 1 Internal high speed RAM 1024 bytes Internal expansion RAM 1024 bytes e Operable in the same supply voltage range as the mask ROM version 4 0 to 5 5 V Notes 1 The capacity of the flash memory can be changed with the internal memory size switching register IMS 2 The capacity of the internal expansion RAM can be changed with the internal expansion RAM size switching register IXS Remark For the differences between the flash memory versions and the mask ROM versions refer to 1 DIFFERENCES BETWEEN 4 PD78F0988A AND MASK ROM VERSIONS ORDERING INFORMATION Part Number Package Qualit
24. NEC sales representative for availability and additional information No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC NEC assumes no responsibility for any errors that may appear in this document NEC does not assume any liability for infringement of patents copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products No license express implied or otherwise is granted under any patents copyrights or other intellectual property rights of NEC or others Descriptions of circuits software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples The incorporation of these circuits software and information in the design of customer s equipment shall be done under the full responsibility of customer NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits software and information While NEC endeavours to enhance the quality reliability and safety of NEC semiconductor products customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely To minimize risks of damage to property or injury including death to persons arising from defects in
25. P26 Port 2 7 bit I O port Input output can be specified in 1 bit units Use of an on chip pull up resistor can be specified by software setting RxD00 RxD01 TxD01 TI50 TO50 TI51 TO51 TI52 TO52 P30 to P37 Port 3 8 bit I O port Input output can be specified in 1 bit units Use of an on chip pull up resistor can be specified by software setting RTPO to RTP7 P40 to P47 Port 4 8 bit I O port Input output can be specified in 1 bit units Use of an on chip pull up resistor can be specified by software setting ADO to AD7 Port 5 8 bit I O port Input output can be specified in 1 bit units LEDs can be driven directly Use of an on chip pull up resistor can be specified by software setting INTP4 TIO00 TOO0 INTP5 TIO10 INTP6 TIO01 TOO1 INTP7 T1011 12 Port 6 4 bit I O port Input output can be specified in 1 bit units Use of an on chip pull up resistor can be specified by software setting Data Sheet U15801EJ1VODS RD WR uPD78F0988A 78F0988A A 3 2 Pins 1 2 INTPO INTP1 INTP2 INTP3 INTP4 INTP5 INTP6 INTP7 Function External interrupt request input for which the valid edge rising edge falling edge or both rising and falling edges can be specified After Reset Input Alternate Function POO TOFF7 I
26. P30 to P37 Watchdog timer Flash k 78K 0 aS CPU core MORY 60 KB RTPO P30 to Real time RTP7 P37 output port Port 4 to P47 TxD00 P21 RxD00 P20 UARTOO TxD01 P23 NBDE UARTO1 RxD01 P22 RAM 1024 bytes Pots K P50toP57 SCK P51 SI P52 SIO3 dme SO P53 ANIO P10 to Port 6 D P64 to P67 ANI7 P17 ADTRG INTP3 P e ps converter AVss AVREF ADO P40 to AD7 P47 INTPO TOFF7 P00 External is INTP1 PO1 and WR P65 INTP2 P02 WAIT P66 INTP3 ADTRG P03 Interrupt INTP4 TIOO0 TOO0 P54 control DSTBTST INTP5 TIO10 P55 INTP6 TIOO1 TOO1 P56 INTP7 TIO11 P57 RESET Real time TO70 to TO75 1 Manor Maso VPP x2 Vssi 8 Data Sheet U15801EJ1VODS uPD78F0988A 78F0988A A 5 1 DIFFERENCES BETWEEN uPD78F0988A AND MASK ROM VERSIONS 10 2 DIFFERENCES BETWEEN uPD78F0988A AND uPD78F0988 11 CE PIN FUNCTIONS m n 12 3 1 o gd ES 12 3 2 Non Port PINS casia cau rn in Rando spuadaddinnecwavendunsusdvveusudovandubousuvedecuuecenbauabvenanibusuuenoasas 13 3 3 Pin I O Circuits and Recommended Connection of Unused Pins 15 4 INTERNAL MEMORY SIZE SWITCHING
27. P47 P50 to P57 P64 to P67 TO70 to TO75 RESET X1 X2 Output leakage Vout current high Output leakage Vout 0 V current low Software pull up VN 0 V resistor P00 to P03 P20 to P26 P30 to P37 P40 to P47 P50 to P57 P64 to P67 Power supply 8 38 MHz crystal Voo 5 0 V 10 Note 2 When A D currentNote 1 oscillation converter operating mode stopped When A D converter operating 8 38 MHz crystal Voo 5 0 V 10 Note 2 When peripheral oscillation HALT function mode stopped When peripheral function operating STOP mode Voo 5 0 V 10 VPP supply voltage In normal operation mode Notes 1 Refers to the total current flowing to the internal power supply and Voo The peripheral operation current is included but the current flowing to the pull up resistors of ports and the AVrer pin is not 2 High speed mode operation when the processor clock control register is set to Remark Unless specified otherwise the characteristics of alternate function pins are the same as those of port pins Data Sheet U15801EJ1VODS 25 NEC uPD78F0988A 78F0988A A AC Characteristics asic operation Ta 40 to 85 C Vpp 4 0 to 5 5 1 Basi i T 40 85 C V 4 0 V Parameter Conditions Cycle time Operating with system clock Min instruction execution time TIOOO TIOO1 TIO10 TIO11 inpu
28. a output Vssi Vsso Note For input to X1 a normal oscillator can also be used instead of CLK Data Sheet U15801EJ1VODS 21 NEC uPD78F0988A 78F0988A A 7 ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings Ta 25 Parameter Conditions Ratings Supply voltage 0 3 to 6 5 0 3 to 10 5 0 3 to Voo 0 3 0 3 to Voo 0 3 0 3 to 40 3 Input voltage to P10 to P17 P20 to P26 P30 to P37 P50 0 3 to Voo 0 3 to P57 P64 to P67 TO70 to TO75 X1 X2 RESET Output voltage 0 3 to 0 3 Analog input voltage P10 to P17 Analog input pin AVss 0 3 to AVner 0 3 and 0 3 to 0 3 Output current high Per pin 10 P01 P30 to P37 P40 to P47 P50 to P57 P64 to P67 total 15 P02 P03 P20 to P26 TO70 to TO75 total 15 Output current low oL to P10 to P17 P20 to P26 Peak value 20 P30 to P37 P40 to P47 P64 to P67 per pin rms value 10 P50 to P57 TO70 to TO75 per pin Peak value 30 rms value 15 P01 P30 to P37 P40 to P47 P64 to P67 Peak value 100 total rms value 70 P02 P20 to P26 total Peak value 30 rms value 15 TO70 to TO75 total Peak value 100 rms value 70 P50 to P57 total Peak value 100 rms value 70 Operating ambient In normal operating mode 40 to 85 temperature In flash memory programming mode 10 to 40
29. ctor Device Mounting Technology Manual C10535E Table 9 1 Surface Mounting Type Soldering Conditions 1 uPD78F0988AGC AB8 64 pin plastic QFP 14 x 14 Soldering Method Soldering Conditions Recommended Condition Symbol Infrared reflow Package peak temperature 235 C Time 30 seconds max IR35 00 3 at 210 C or higher Count Three times or less VPS Package peak temperature 215 C Time 40 seconds max VP15 00 3 at 200 C or higher Count Three times or less Wave soldering Solder bath temperature 260 C max Time 10 seconds max WS60 00 1 Count Once Preheating temperature 120 C max package surface temperature Partial heating Pin temperature 300 C max Time 3 seconds max per pin row Caution Do not use different soldering methods together except for partial heating 2 uPD78FO988AGC A AB8 64 pin plastic QFP 14 x 14 Soldering Method Soldering Conditions Recommended Condition Symbol Infrared reflow Package peak temperature 235 C Time 30 seconds max IR35 00 2 at 210 C or higher Count Two times or less VPS Package peak temperature 215 C Time 40 seconds max VP15 00 2 at 200 C or higher Count Two times or less Wave soldering Solder bath temperature 260 C max Time 10 seconds max WS60 00 1 Count Once Preheating temperature 120 C max package surface temperature Partial heating Pin temperature 300 C max Time 3 seconds max per pin r
30. e List Communication Mode Number of Pin UsedNete 1 Number of Channels Vee Pulses 3 wire serial I O SCK P51 SI P52 SO P53 3 wire serial HS P50 HS SCK P51 SI P52 SO P53 UART RxD00 P20 TxD00 P21 Pseudo 3 wire serial 1 P24 TI50 TO50 Serial data input mode ete 2 P25 TI51 TO51 Serial data output 26 52 52 Serial clock input Notes 1 Shifting to the flash memory programming mode sets all pins not used for flash memory programming to the same state as that immediately after reset If the external device connected to each port does not acknowledge the state immediately after reset pin handling such as connecting to Vpp or Vss via a resistor is required 2 Serial transfer is performed by controlling ports using software Caution Always select the communication mode according to the number of VPP pulses shown in Table 6 1 Figure 6 1 Communication Mode Selection Format VPP pulses 10 V VPP Vpop Z UUL Vss i 2 n RESET Vss Flash memory write mode Data Sheet U15801EJ1VODS 19 NEC uPD78F0988A 78F0988A A 6 2 Flash Memory Programming Functions Flash memory writing is performed via command and data transmit receive operations using the selected communication mode The main functions are listed in Table 6 2 Table 6 2 Main Functions of Flash Memory Programming Function Description Batch erase Erases the contents of the entire memory
31. for an emulation probe conversion connector and conversion socket or conversion adapter are shown below Design the system taking into consideration the dimension or shape etc of the parts to be mounted on the target system Table A 1 Distance Between In Circuit Emulator and Conversion Socket Emulation Probe Conversion Adapter Distance Between In Circuit Emulator Conversion Socket and Conversion Socket or Conversion Adapter NP 64GC EV 9200GC 64 NP 64GC TQ TGC 064SAP NP H64GC TQ NP 64CW Figure A 1 Distance Between In Circuit Emulator and Conversion Socket or Conversion Adapter 1 In circuit emulator IE 78KO NS or IE 78KO NS A Target system Emulation board IE 780988 NS EM4 CN6 Emulation probe 64GC NP 64GC NP 64GC TQ Conversion socket EV 9200GC 64 Conversion adapter TGC 064SAP 44 Data Sheet U15801EJ1VODS Figure A 2 Distance Between In Circuit Emulator and Conversion Socket or Conversion Adapter 2 In circuit emulator 78 0 5 or IE 78KO NS A Emulation board 780988 5 4 CN6 Emulation probe 64GC NP H64GC TQ Figure A 3 Distance Between In Circuit Emulator and Conversion Socket or Conversion Adapter 3 In circuit emulator 78 0 5 or IE 78KO NS A Emulation board 780988 5 4 160 CN7 Emulation probe 64CW NP 64CW Data Sheet U15801EJ1VODS Target system
32. ing m INTPO to INTP7 RESET Input Timing I gt RESET Data Sheet U15801EJ1V0DS 35 uPD78F0988A 78F0988A A Flash Memory Programming Characteristics Ta 10 40 C Voo AVpp 4 0 to 5 5 V Vss AVss 0 V VPP 9 7 to 10 3 V 1 Basic characteristics Parameter Conditions Operation frequency 1 0 Supply voltage 4 0 When VPP low level is detected 0 When Ver high level is detected 0 8Vpp When VPP high voltage is detected 9 0 When programming 9 7 Number of rewrites 2 Note Programming temperature 10 Note Operation is not guaranteed for over 20 rewrites Remark After execution of the program command execute the verify command and check that the writing has been completed normally 2 Serial write operation characteristics Parameter Conditions Set time from to Ver tpmesa Ver high voltage Set time from VerT to RESETT Ver high voltage VPP count start time from RESETT tarcr VPP high voltage Count execution time tcount VPP counter high level width tcu Vee counter low level width tc Ver counter noise elimination width tnrw Flash Write Mode Setting Timing VPPH VrP VPP ATE VPPL teL r tcounT Vpp RESET input N OV 36 Data Sheet U15801EJ1VODS 3 Write erase charac
33. ion Windows is either a registered trademark or a trademark of Microsoft Corporation in the United States and or other countries PC AT is a trademark of International Business Machines Corporation HP9000 series 700 and HP UX are trademarks of Hewlett Packard Company SPARCstation is a trademark of SPARC International Inc Solaris and SunOS are trademarks of Sun Microsystems Inc 50 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A Regional Information Some information contained in this document may vary from country to country Before using any NEC product in your application please contact the NEC office in your country to obtain a list of authorized representatives and distributors They will verify Device availability Ordering information e Product release schedule Availability of related technical literature Development environment specifications for example specifications for third party tools and components host computers power plugs AC supply voltages and so forth Network requirements In addition trademarks registered trademarks export restrictions and other legal issues may also vary from country to country NEC Electronics Inc U S Santa Clara California Tel 408 588 6000 800 366 9782 Fax 408 588 6130 800 729 9288 NEC Electronics Germany GmbH Duesseldorf Germany Tel 0211 65 03 02 Fax 0211 65 03 490 NEC Electronics UK Ltd Milton Keynes UK
34. ld be grounded using wrist strap Semiconductor devices must not be touched with bare hands Similar precautions need to be taken for PW boards with semiconductor devices on it HANDLING OF UNUSED INPUT PINS FOR CMOS Note No connection for CMOS device inputs can be cause of malfunction If no connection is provided to the input pins itis possible that an internal input level may be generated due to noise etc hence causing malfunction CMOS devices behave differently than Bipolar or NMOS devices Input levels of CMOS devices must be fixed high or low by using a pull up or pull down circuitry Each unused pin should be connected to Vpp or GND with a resistor if it is considered to have a possibility of being an output pin handling related to the unused pins must be judged device by device and related specifications governing the devices STATUS BEFORE INITIALIZATION OF MOS DEVICES Note Power on does not necessarily define initial status of MOS device Production process of MOS does not define the initial operation status of the device Immediately after the power source is turned ON the devices with reset function have not yet been initialized Hence power on does not guarantee out pin levels settings or contents of registers Device is not initialized until the reset signal is received Reset operation must be executed immediately after power on for devices having reset function FIP and IEBus are trademarks of NEC Corporat
35. lly and connecting Vsso and Vssi to different ground lines is recommended 6 Data Sheet U15801EJ1VODS ADO to AD7 ADTRG ANIO to 7 ASTB AVnEF AVss INTPO to INTP7 POO to P10 to P17 P20 to P26 P30 to P37 P40 to P47 P50 to P57 P64 to P67 RD RESET RTPO to RTP7 Address data bus AD trigger input Analog input Address strobe Analog power supply Analog reference voltage Analog ground External interrupt input Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 Port 6 Read strobe Reset Real time port RxDOO 01 TIOOO 001 TIO10 TIO11 TI5O to TI52 TOOO 01 50 to TO52 TO70 to TO75 TOFF7 TxD01 Vppo VPP Vsso Vsst WAIT WR X1 X2 Data Sheet U15801EJ1VODS uPD78F0988A 78F0988A A Receive data Serial clock Serial input Serial output Timer input Timer output Timer output off Transmit data Power supply Programming power supply Ground Wait Write strobe Crystal uPD78F0988A 78F0988A A BLOCK DIAGRAM 000 00 4 54 16 bit timer TIO10 INTP5 P55 event counter 00 G P00 to P03 TI001 TO01 INTP6 P56 46 bit timer TIO11 INTP7 P57 event counter 01 ey 8 bit timer P10 to P17 TO50 TIS0 P24 event counter 50 TO51 TI51 P25 Po timer event counter 51 Port 2 P20 to P26 8 bit timer TO52 TI52 P26 event counter 52 Pot3 K gt
36. n TO70 to TO75 Leave open RESET AVDD AVREF AVss VpP Connect to Connect to Vsso Connect directly to Vsso Data Sheet U15801EJ1VODS 15 16 Figure 3 1 Pin Circuits Schmitt triggered input with hysteresis characteristics Pullup uPD78F0988A 78F0988A A Vppo enable Data r T H P ch Output disable gt Vppo ri IN OUT N ch 77 Vsso lt A Vppo iras 1 O OUT N ch 77 Vsso Output disable Push pull output that enables high impedance output both P ch and N ch are off Vppo Pen Pullup enable p Vppo Data P ch N ch IN OUT Output disable Input enable P ch T Vner threshold voltage Input C gt N ch Vsso 1 O IN enable Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A 4 INTERNAL MEMORY SIZE SWITCHING REGISTER IMS IMS is a register that is set by software and is used to specify a part of the internal memory that is not to be used By setting this register the internal memory of the u PD78F0988A and uPD78F0988 be mapped in the same manner as that of a mask ROM version with a different internal memory ROM and RAM capacity IMS is set with an 8 bit memory manip
37. n adapter to connect the NP 64GC TQ or NP H64GC TQ and a target system board on which the 64 pin plastic GC AB8 type 64 pin plastic LQFP GC 8BS type can be mounted ID78K0 NS Integrated debugger for IE 78K0 NS 5 78 0 System simulator common to 78 0 Series DF780988 42 Device file for uPD780988 Subseries Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A When IE 78001 R A in circuit emulator is used IE 78001 R A In circuit emulator common to 78K 0 Series IE 70000 98 IF C Adapter necessary when PC 9800 series PC except notebook type is used as host machine C bus supported IE 70000 PC IF C Adapter necessary when using IBM PC AT or compatible as host machine ISA bus supported IE 70000 PCI IF A Adapter necessary when using PCI bus incorporated personal computer as host machine IE 78000 R SV3 Interface adapter and cable when using EWS as host machine IE 780988 NS EMA Emulation board and I O board to emulate 780988 Subseries 78 0 5 01 IE 78K0 R EX1 Emulation probe conversion board necessary when using IE 780988 NS EM4 and 78 0 5 01 on IE 78001 R A Emulation probe for 64 pin plastic SDIP CW type Emulation probe for 64 pin plastic GC AB8 type 64 pin plastic LQFP GC 8BS type Socket to connect target system board made for mounting 64 pin plastic QFP GC AB8 type or 64 pin plastic LQFP GC 8BS type and EP 7
38. n applications not intended by NEC they must contact an NEC sales representative in advance to determine NEC s willingness to support a given application Note 1 NEC as used in this statement means NEC Corporation and also includes its majority owned subsidiaries 2 NEC semiconductor products means any semiconductor product developed or manufactured by or for NEC as defined above 8 00 4
39. nput P01 Input P02 Input P03 ADTRG Input P54 T1000 TO00 Input 55 1010 Input P56 T1001 TO01 Input P57 TIO11 TI50 TI51 TI52 000 011 External count clock input to 8 bit timer event counter 50 Input P24 TO50 External count clock input to 8 bit timer event counter 51 Input P25 TO51 External count clock input to 8 bit timer event counter 52 Input P26 TO52 External count clock input to 16 bit timer event counter 00 Capture trigger input to capture register CR000 010 of 16 bit timer event counter 00 Input P54 INTP4 TOOO Capture trigger input to capture register 000 of 16 bit timer event counter 00 P55 INTP5 External count clock input to 16 bit timer event counter 01 Capture trigger input to capture register 001 CRO11 of 16 bit timer event counter 01 P56 INTP6 TOO1 Capture trigger input to capture register 001 of 16 bit timer event counter 01 P57 INTP7 TO50 51 52 000 001 8 bit timer event counter 50 output P24 TI50 8 bit timer event counter 51 output P25 TI51 8 bit timer event counter 52 output P26 TI52 16 bit timer event counter 00 output 54 4 000 16 bit timer event counter 01 output P56 INTP6 TIOO1 RTPO to RTP7 Output Real time output port that outputs pulses in synchronization with trigger signals outputs f
40. om RD trop 2 2n tcv 87 tRDD2 3 2n tcv 93 Read data hold time 0 RD low level width trout 1 5 2n tcy 33 trove 2 5 2n tcy 33 WAIT input time from RD tnpwri tcv 43 tRDwr2 tcv 43 WAIT input time from WRI twawt 0 5tcy 25 WAIT low level width twit 0 5 2n tcy 10 2 2n tcy Write data setup time twos 60 Write data hold time twoH 6 WR low level width 1 5 2n tcy 15 Delay time from ASTBY to RD tasTRD 6 Delay time from ASTBl to WRU tASTWR 2tcy 15 Delay time from RD at external tRDAST 0 8tcy 15 fetch to ASTBT Write data output time from RDT 40 Write data output time from WRI 10 60 Delay time from WAITT to RDT 2 5tcv 25 Delay time from WAITT to WRT 2 5tcv 25 Remarks 1 tcv Tcv 4 2 n indicates the number of waits 3 C 100 pF C is the load capacitance of the ADO to 07 RD WR WAIT and ASTB pins 28 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A 3 Serial interface TA 40 to 85 C Vpp 4 0 to 5 5 V a 3 wire serial mode SCK Internal clock output Parameter Conditions SCK cycle time 954 SCK high low level width t cvi 2 50 SI setup time to SCKT 100 SI hold time from SCKT 400 Delay time from SCKL C 100 pFNete to SO output Note is the load capacitance of the SCK and SO output lines
41. ow Caution Do not use different soldering methods together except for partial heating Table 9 2 Insertion Type Soldering Conditions LPD78F0988ACW 64 plastic SDIP 19 05 mm 750 Soldering Method Soldering Condition Wave soldering Solder bath temperature 260 C max Time 10 seconds max only for pins Partial heating Pin temperature 300 C max Time 3 seconds max per pin row Caution Apply wave soldering only to the pins and be careful not to bring solder into direct contact with the package Data Sheet U15801EJ1VODS 41 NEC uPD78F0988A 78F0988A A APPENDIX A DEVELOPMENT TOOLS The following development tools are available for system development using the uPD780988 Subseries Also refer to 5 Cautions on Using Development Tools 1 Software package SP78K0 Software package common to 78K 0 Series 2 Language processing software RA78KO Assembler package common to 78K 0 Series CC78KO C compiler package common to 78K 0 Series DF780988 Device file for uPD780988 Subseries CC78K0 L C compiler library source file common to 78K 0 Series 3 Flash memory writing tools Flashpro III part No FL PR3 PG FP3 Flash programmer dedicated to on chip flash memory microcontroller FA 64CW FA 64GC FA 64GC 8BS A 4 Debugging tools Adapter for flash memory writing Used connected to Flashpro III FA 64CW for 64 pin plastic SDIP CW type
42. rom the real time pulse unit P30 to P37 TxD00 TxD01 Output Asynchronous serial interface serial data output P21 P23 RxD00 Input Asynchronous serial interface serial data input P20 P22 RxD01 1 0 Serial interface serial clock input output P51 Input Serial interface serial data input P52 Output Serial interface serial data output P53 ANIO to ANI7 Input A D converter analog input P10 to P17 ADTRG Input External trigger signal input to the A D converter PO3 INTP3 TO70 to TO75 Output Timer output for the 3 phase PWM inverter control TOFF7 Input Timer output TO70 to TO75 stop external input POO INTPO Address data bus for expanding memory externally 40 to P47 ADO to AD7 Output Strobe signal output for reading from external memory P64 Strobe signal output for writing to external memory P65 Input Wait insertion at external memory access P66 Output Strobe output that externally latches address information output to ports 4 and 5 to access external memory P67 Input A D converter reference voltage input A D converter analog power supply Data Sheet U15801EJ1VODS 13 NEC 3 2 Non Port Pins 2 2 Pin Name Function A D converter ground potential uPD78F0988A 78F0988A A After Reset Alternate Function System reset input
43. rsions When pre producing an application set with the flash memory version and then mass producing it with the mask ROM version be sure to conduct sufficient evaluations for the commercial samples not engineering samples of the mask ROM versions In addition when replacing the PD78F0988 with the uPD78F0988A be sure to also conduct sufficient evaluation with the uPD78F0988A 10 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A 2 DIFFERENCES BETWEEN uPD78F0988A AND uPD78F0988 The differences between the uPD78F0988A and uPD78F0988 old version are shown in Table 2 1 Table 2 1 Differences Between uPD78F0988A and 78 0988 Lu Part Number HPD78F0988A 78 0988 Old Version Flash memory area Two areas Three areas 0 Oto 1FFFH 0 to 1FFFH 1 2000H to EFFFH 1 2000H to 7FFFH 2 8000H to EFFFH Quality grade Standard Standard Special 64 pin plastic QFP 14 x 14 64 pin plastic LQFP 14 x 14 Data Sheet U15801EJ1VODS 11 uPD78F0988A 78F0988A A 3 PIN FUNCTIONS 3 1 Port Pins Pin Name 1 2 Function Port 0 4 bit I O port Input output can be specified in 1 bit units Use of an on chip pull up resistor can be specified by software setting After Reset Input Alternate Function INTPO TOFF7 INTP1 INTP2 INTPS ADTRG P10 to P17 Port 1 8 bit input only port ANIO to ANI7 P20 P21 P22 P23 P24 P25
44. s 8 38 MHz operation with system clock Instruction set 16 bit operation Multiply divide 8 bits x 8 bits 16 bits 8 bits Bit manipulation set reset test Boolean operation BCD adjust etc I O ports Total 47 CMOS inputs 8 CMOS 39 Real time output ports 8 bits x 1 or 4 bits x 2 6 bits x 1 or 4 bits x 1 A D converter 10 bit resolution x 8 channels Power supply voltage AVpp 4 0 to 5 5 V Serial interface UART mode 2 channels 3 wire serial I O mode 1 channel Timer 16 bit timer event counter 2 channels 8 bit timer event counter 3 channels 10 bit inverter control timer 1 channel Watchdog timer 1 channel Timer output 11 general purpose outputs 5 inverter control outputs 6 Vectored Maskable Internal 16 external 8 interrupt Non maskable Internal 1 Sources Software 1 Power supply voltage Vpp 4 0 to 5 5 V Operating ambient temperature Ta 40 to 85 C Package e 64 pin plastic SDIP 19 05 mm 750 Nete3 64 pin plastic QFP 14 x 14 64 pin plastic LQFP 14 x 14 Notes 1 The capacity of the flash memory can be changed with the internal memory size switching register IMS 2 The capacity of the internal expansion RAM can be changed with the internal expansion RAM size switching register IXS 3 Standard quality grade products only Data Sheet U15801EJ
45. se Shipped product gt rewrites Shipped product gt E gt P gt 5 P gt 3 rewrites Remarks 1 range of the operating clock during flash memory programming is the same as the range during normal operation 2 When using the PG FP3 the time parameters that need to be downloaded from the parameter files for write erase are automatically set Unless otherwise directed do not change the set values Data Sheet U15801EJ1VODS 37 NEC uPD78F0988A 78F0988A A 8 PACKAGE DRAWINGS 64 PIN PLASTIC SDIP 19 05mm 750 NOTES ITEM MILLIMETERS 1 Each lead centerline is located within 0 17 mm of A 58 0 0 68 0 2 its true position T P at maximum material condition 0 20 1 78 1 778 0 50 0 10 0 9 MIN 3 2 0 3 0 51 2 Item to center of leads when formed parallel r oimUooj u 0 26 4 05050 5 08 MAX 19 05 T P 17 0 0 2 0 10 0 25 0 05 0 17 0 15 P64C 70 750A C 4 22 Z Ir x 38 Data Sheet U15801EJ1V0DS NEC uPD78F0988A 78F0988A A 64 PIN PLASTIC 14x14 detail of lead end mS AAU 7 lI NIS eH M NOTE ITEM MILLIMETERS Each lead centerline
46. signal output 32 pins max 120 pin uPD780318 1 PD780308 with enhanced display function and timer Segment signal output 24 pins max 100 pin uPD780308 uPD78064 with enhanced SIO and increased ROM RAM capacity 100 pin uPD78064B EMI noise reduced version of the PD78064 100 pin Basic subseries for LCD drive on chip UART Bus interface supported 100 pin uPD780948 On chip CAN controller 80 pin uPD78098B uPD78054 with added IEBus controller 80 pin uPD780702Y _ On chip IEBus controller 7 80 pin 7 uPD780703Y On chip CAN controller 80 pin uPD780833Y On chip controller compliant with J1850 Class 2 64 pin uPD780816 2 Specialized for CAN controller function Meter control 100 pin LPD780958 For industrial meter control 80 pin 780852 On chip automobile meter controller driver 80 pin uPD780828B For automobile meter driver On chip CAN controller Remark VFD Vacuum Fluorescent Display is referred to as FIP Fluorescent Indicator Panel in some documents but the functions of the two are the same 2 Data Sheet U15801EJ1VODS NEC uPD78F0988A 78F0988A A The major functional differences between the subseries are shown below ROM Timer 10 Bit Serial Interface External Capacity Subseries Nama 16 Bit Watch A D Expansion 078075 32 K to 40 K 3 ch UART 1 ch uPD78078 48Kto 60K LPD780058 24 K to 60 K 3 ch time division UART 1 ch uPD78058F 48 K
47. t frequency TIOOO TIOO1 2 fsam T1010 T1011 0 1Note input high low level width TI50 TI51 TI52 fris 8 16 bit precision input frequency TI50 TI51 2 tris 8 16 bit precision input high trits low level width Interrupt request tintH INTPO to INTP7 input high low level width TOFF input trorFH high low level trorFL width RESET input tns low level width Note Selection of fsam fx 5 4 fx 32 is possible with bits 0 and 1 000 PRMO01 of prescaler mode register 00 PRMOO or with bits 0 and 1 PRMO10 PRMO1 1 of prescaler mode register 01 PRMO1 Note that when selecting 000 TMOO or 001 01 valid edge as the count clock fsam fx 16 26 Data Sheet U15801EJ1VODS NEC 32 0 10 0 5 0 2 0 Cycle time Tcv us 1 0 0 24 0 1 uPD78F0988A 78F0988A A Tcv vs System clock operation 0 10 20 30 40 505560 Supply voltage Voo V Data Sheet U15801EJ1VODS 27 NEC uPD78F0988A 78F0988A A 2 Read write operation Ta 40 to 85 C Vpp 4 0 to 5 5 V Parameter Conditions ASTB high level width tasTH Address setup time taps Address hold time Data input time from address tapp1 2 2n tcv 54 3 2n tcv 60 Address output time from RDJ tnpap 100 Data input time fr
48. teristics Parameter VPP supply voltage Conditions During flash memory programming uPD78F0988A 78F0988A A V Voo supply current When VPP Vera fxx 8 38 MHz mA VPP supply current When VPP VPP2 Step erase time Note 1 S Overall erase time per area When step erase time 0 2 sNote 2 s area Write back time Note 3 Number of write backs per write back command When write back time 50 msNote 4 Number of erase write backs Step write time Note 5 Overall write time per word When step write time 50 us 1 word 1 byte Nete 6 Number of rewrites per area 1 erase 1 write after erase 1 rewriteNote 7 Notes 1 The recommended setting value for the step erase time is 0 2 s 2 The prewrite time before erasure and the erase verify time write back time is not included 3 The recommended setting value for the write back time is 50 ms 4 Write back is executed once by the issuance of the write back command Therefore the number of retries must be the maximum value minus the number of commands issued 5 Recommended step write setting value is 50 us 6 The actual write time per word is 100 us longer The internal verify time during or after a write is not included 7 Whenaproductis first written after shipment erase write and write only are both taken as one rewrite Example P Write E Era
49. uency fx Note 1 X1 input high low uPD74HCU04 level width tx Notes 1 Indicates only oscillator characteristics Refer to AC Characteristics for instruction execution time 2 Time required to stabilize oscillation after reset or STOP mode release Caution When using the system clock oscillator wire as follows in the area enclosed by the broken lines in the above figures to avoid an adverse effect from wiring capacitance Keep the wiring length as short as possible Do not cross the wiring with the other signal lines Do not route the wiring near a signal line through which a high fluctuating current flows Always make the ground point of the oscillator capacitor the same potential as Vss1 Do not ground the capacitor to a ground pattern through which a high current flows Do not fetch signals from the oscillator Data Sheet U15801EJ1VODS 23 Recommended Oscillator Constant uPD78F0988A 78F0988A A System clock Ceramic resonator Ta 40 to 85 C Manufacturer Murata Mfg Co Ltd Caution Part Number CSA2 00MG040 Frequency MHz Recommended Circuit Constant Oscillation Voltage Range C1 pF C2 pF MIN V MAX V CST2 00MG040 CSA3 58MG CST3 58MGW CSA4 00MG CST4 00MGW CSA4 19MG CST4 19MGW CSA4 91MG CST4 91MGW CSA5 00MG CST5 00MGW CSA7 37MTZ CST7 37MTW
50. ulation instruction IMS is set to CFH by RESET input Figure 4 1 Format of Internal Memory Size Switching Register Address After reset R W 7 6 5 4 3 2 1 0 IMS RAM2 RAM1 0 ROM3 ROM2 ROM1 ROMO FFFOH CFH R W ROMO Selection of internal ROM capacity 16 KB 24 KB 32 KB 48 KB 60 KB Other than above Setting prohibited RAM2 RAM1 RAMO Selection of internal high speed RAM capacity 1 1 0 1024 bytes Other than above Setting prohibited Table 4 1 shows the IMS setting values to make the memory mapping the same as that of mask ROM versions Table 4 1 Setting Value of Internal Memory Size Switching Register Target Mask ROM Versions IMS Setting Value uPD780982 780983 uPD780984 780986 780988 Data Sheet U15801EJ1VODS 17 NEC uPD78F0988A 78F0988A A 5 INTERNAL EXPANSION RAM SIZE SWITCHING REGISTER IXS IXS is a register that sets the internal expansion RAM capacity by software setting By using this register the memory of the uPD78FO988A and uPD78F0988A A can be mapped the same manner as that of a mask ROM version with a different internal expansion RAM capacity IXS is set with an 8 bit memory manipulation instruction IXS is set to OCH by RESET input Figure 5 1 Format of Internal Expansion RAM Size Switching Register Address After reset R W 7 6 5 4 3 2 1 0 IXS JES IXRAM4 IXRAM3 IXRAM2 IXRAM
51. y Grade LuPD78F0988ACW 64 pin plastic SDIP 19 05 mm 750 Standard for general electrical equipment uPD78F0988AGC AB8 64 pin plastic QFP 14 x 14 Standard for general electrical equipment uPD78F0988AGC 8BS 64 pin plastic LQFP 14 x 14 Standard for general electrical equipment LPD78F0988AGC A AB8 64 plastic 14 x 14 Special for high reliability electrical equipment UPD78F0988AGC A 8BS 64 pin plastic LQFP 14 x 14 Special for high reliability electrical equipment For details of the quality grade and its application fields refer to Quality Grades on NEC Semiconductor Devices C11531E The information in this document is subject to change without notice Before using this document please confirm that this is the latest version Not all devices types available in every country Please check with local NEC representative for availability and additional information Document No 015801 1 00500 1st edition Date Published October 2001 N CP K Printed in Japan NEC Corporation 2001 uPD78F0988A 78F0988A A 78K 0 SERIES LINEUP The products in the 78K 0 Series are listed below The names enclosed in boxes are subseries names LO Products in mass production 2 Products under development Y subseries products are compatible with bus gt Control 100 pin uPD78075B EMI noise reduced version of the PD78078 100 pin uPD78078 uPD78078Y 78054 with added timer and enhanced
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