Industry Standard Control Interfaces for inter IC Communication
Contents
1. 2 Protocol Parts Transmitter sends one byte of data t may send the next byte if re ceiver acknowledges When receiver not acknowledges the transmission ends 17 35 2 Protocol Parts SDA aft SCL high Master injects Positive going Edge on SDA 17 35 2 Protocol Example 1 SDA Master SDAsiave SDA SCL Simple 2 read on default register 18 35 2 Protocol Example 2 SDAMaster eT SDAstaver 4 1 oon SDAStave2 T zr UH i SDA III 4 YOO SCL LA PLL PLP LE Example of repeated start SDAsiave I On ey 00 05057 SDA ACTA ant SDA master WACO 8 r i E SCL gt Example of multi byte transmission 19 35 2 Clock Stretching No fixed speed Any device may slow down the transmission Master pauses switching of SCL transmission is paused a Slave holds SCL low master waits for release SDA MAA V 50 ey 7 ScEL SDA LGC aaa oT FL ug 1008 SCLstave 7 SCL 2 Collision Detection amp Bus Arbitration wo devices issue start condition become master of the bus Both2. I communicates with it m No delay Source Adapted from http en wikipedia org wiki File SPI three slaves svg 10 35 SPI Bus Topologies Serial SCLK SCLK m Four signal lines SPI MOSI gt MOSI SPI 6 s 546 MOSI MISO CLOCK SS shared SCLK MOSI SPI m Messages are passed through Messages get latched when SCLK C Er SS is deasserted 55 m Not supported by all devices Source Adapted from m Delayed responses message http en wikipedia org wiki File SPI_three_slaves_daisy_chained svg has to pass adjacent slaves 11 35 Table of Contents Inter Integrated Circuit Source http www cpushack com gallery 1 philips philipsmab8400b Moritz Naltner Created in the 1980s First used in Philips MAB8400B Very widely accepted Compatible with other buses SMBus PMBus Bus system Multi master operation Half duplex simplex Two signal lines two pull up resistors 2 Roles Four roles possible Master Starts a transmission a Slave Responds to transmission Transmitter Transmits data a Receiver Receives data 2 Signal Lines MICRO CONTROLLER A STATIC RAM OR EEPROM SDA SCL MICRO CONTROLLER B Source Adapted from I C Bus Specificatio
3. transmit address and possibly data One master sends 1 one sends 0 The master sending 1 notices the discrepancy between its output A master that lost bus arbitration switches to slave mode SDA SDA Arbitration OTT TTT SDA AUT T a Te eT vm ur SCL ee et Second master became slave before any race condition occured no data loss 21 35 2 10 bit Addressing 7 bit addressing means 128 addresses 16 addresses reserved only 112 addresses free More addresses needed 10 bit addressing First byte 11110 first 2 bits of 10 bit address R W bit Second byte Remaining 8 bits of slave address Rest of transmission as usual 11110XX X S SLAVE ADDRESS 1st 7 BITS A foara A para na P SLAVE ADDRESS 2nd BYTE Source Adapted from UM1020412C busspecificationandusermanualRev 6 2014 2 Higher Speeds Standard Mode Fast Mode Fast Mode High Mode Plus Speed Up to 100kbit s Up to 400kbit s Fully compatible with Standard Mode Up to 1Mbit s Timing loosened more drive strength Up to 3 4Mbit s A number of changes o Pull up current sources in each device o Schmitt trigger inputs for spike suppression Clock stretching only after ACK bit Special initiation master code 00001XX X transmitted in Fast Mode Bus arbitration only during mast
4. 6 connected to temperature sensor 7 TEMPERATURE M AX665 7 6657 PC BUS Multiplexer Oscilloscope attached to bus on sensor 28 35 Software Setup Load Kernel Modules i2c bcm2708 amp i2c dev Load package i2c tools Start terminal session Software Session Tell the multiplexer to connect the correct bus to the pi pi raspberrypi i2cset 1 73 3 64 WARNING This program can confuse your I2C bus cause data loss and worse I will write to device file dev i2c 1 chip address 0x49 data address 0x03 data 0x40 mode byte Continue Y n y Read the temperature sensor pi raspberrypi i2cget y 1 76 0 A thumb was placed on the sensor to warm it up a little pi2 raspberrypi i2cget y 1 76 0 Oxid 2 Measurement TACK 41 n Ei 1 an rebel Maren gef onbres Arterien ives rar LLL The low levels of master and slave differ sligthly revealing which device is driving the line Zoom 1 31 35 Table of Contents Conclusion Comparison of SPI an PC Simplicity Simplicity at Chip of use Simplicity at Board Speed A Versatility Robustness Comparison of the buses visualisation of estimation Red I C Blue SPI 33 35 C
5. Industry Standard Control Interfaces for inter IC Communication Moritz Noltner Institut f r Technische Informatik Lehrstuhl f r Rechnerarchitektur Universitat Heidelberg January 28 2015 Table of Contents Introduction Serial Peripheral Interface Inter Integrated Circuit Practical Part Conclusion Table of Contents Introduction How to Connect Circuits Device 1 lt gt Device 2 HyperTransport m PATA SATA UART USART m PCI PCI Express m SPI m AGP 2 SMBus ISA UNI O m USB m 1 Wire Source http www anandtech com show 2354 2 Moritz Naltner Table of Contents Serial Peripheral Interface Serial Peripheral Interface Created in the 1980s First used in Motorola 6800 Very widely accepted m Bus system Full duplex Four signal lines en 1 SPI Signal Lines MASTER SPI SLAVE SPI MISO MISO A MOSI Mos SHIFT REGISTER SCK SCK BAUD RATE e GENERATOR 55 55 Source Adapted from SPI Block Guide V 03 06 2003 SPI Signal Lines MASTER SPI SLAVE SPI SHIFT REGISTER SHIFT REGISTER BAUD RATE GENERATOR Source Adapted from SPI Block Guide V 03 06 2003 55 Slave Select Slaves will only interact if their SS is acrive SPI Signal Lines MASTER SPI SLAVE SPI mum BAUD RATE GENERATOR SHIFT REGISTER Source A
6. dapted from SPI Block Guide V 03 06 2003 MOSI Master Out Slave In Serial data line for master to slave SPI Signal Lines MASTER SPI SLAVE SPI SHIFT REGISTER SHIFT REGISTER BAUD RATE GENERATOR Source Adapted from SPI Block Guide V 03 06 2003 MISO Master In Slave Out Serial data line for master to slave SPI Signal Lines MASTER SPI SLAVE SPI SHIFT REGISTER SHIFT REGISTER BAUD RATE GENERATOR Source Adapted from SPI Block Guide V 03 06 2003 CLOCK Shift Clock One bit is sent per clock cycle 8 35 Clock Phase amp Pol arity 4 combinations SCK CYCLE 1 2 3 4 5 6 7 SCK CPOL 0 SCK 1 SAMPLE INPUT 0 DATA OUT we X 5 X X 3 X 2 X 1 SAMPLEINPUT M 4 CPHA 1 DATAOUT WIEN SIE WE sos lll S SLAVE CPHA 1 TRANSFER IN PROGRESS 6 MASTER TRANSFER IN PROGRESS Source SLAVE CPHA 0 TRANSFER IN PROGRESS Taken from the datasheet for Motorola MC68HC11AQ SPI Bus Topologies Star SCLK t SCLK MOSI MOSI SP SPI MISO me Slave Master 5 m 3 n signal lines 553 Sl Mos m MOSI MISO CLOCK shared MISO Slave SS for every slave m Master activates a slave and LIL
7. er code transfer 23 35 2 High Speed Mode Electrical Setup Vpp1 Vpp2 Rp Rp SDAH 5 SDAH SDA gt SCLH Rs SCL gt Rs Rs Rs Rs SDAH 5 SCLH soa 56 SDA SCL el 2 2 2 2 MCS MCS a L4 8 Vss vss st Hs mode Hs mode Hs mode F S mode F S mode SLAVE MASTER SLAVE MASTER SLAVE MASTER SLAVE SLAVE 1 Bridge not used SDA and SCL have an alternative function 2 To input filter 3 Only the active master can enable its current source pull up circuit 4 Dotted transistors are optional open drain outputs which can stretch the serial clock signal SCL or SCLH Source Adapted from I C Bus Specification v 2 1 2000 2 Ultra Fast Mode Ultra Fast Mode Up to 5Mbit s Not compatible Changes Unidirectional Protocol Push Pull output stages o Rest of protocol remains mostly the same 25 5 Table of Contents Practical Part 26 35 Goal Measure I C transaction A Raspberry Pi is connected to a lab card Measurement done with a temperature sensor on the card Source Moritz N ltner http static trustedreviews com 94 00002403 1a88_orh350w620 Raspberry Pi B Plus model jpg Hardware Setup SDA1 1 m Raspberry Pi drives a 2 bus multiplexer mE SDA2 ScL2 LTC4306 LTC430
8. n v 2 1 2000 2 Signal Lines MICRO CONTROLLER A MICRO CONTROLLER B Source Adapted from I C Bus Specification v 2 1 2000 SDA Seria Data Bidirectional data amp address line 15 35 2 Signal Lines MICRO LCD STATIC CONTROLLER DRIVER RAM OR A EEPROM SDA MICRO GATE CONTROLLER ARRAY ADC B Source Adapted from I C Bus Specification v 2 1 2000 SCL Serial Clock Used by the master to synchronise with the slaves 2 Electrical Setup VDD Open drain or open collector outputs m Wired AND MASTER SLAVE SLAVE Source Adapted from The I C Bus Specification v 2 1 2000 2 Protocol Parts 17 35 2 Protocol Parts rere m SDA IN SCL high Master injects negative Edge on SDA 17 35 2 Protocol Parts Seven bits of address are trans mitted Some addresses are reserved 17 35 2 Protocol Parts 17 for reading 0 for writing 17 35 2 Protocol Parts sae ay DATA OUTPUT 7 Transmitter releases the SDA line not acknowledge DATA OUTPUT 77 N Receiver pulls SDA low to knowledge acknowledge SCLFROM amm fs MASTER __ 8 clock pulse for acknowledgement 17 35
9. onclusion Both SPI and I C very mature busses Nevertheless up to date Low pin count low speeds SPI used for data connections mostly 2 prevalently used for configuration centric communication References Datasheet of the Motorola MC68HC11A8 microcontroller describing the SPI bus Last downloaded 2014 01 10 http cache freescale com files microcontrollers doc data_sheet MC68HC11A8 pdf EE Datasheet of the Motorola MC68HCP11A1VP microcontroller Last downloaded 2014 01 10 http pdf datasheetcatalog com datasheet motorola MC68HCP11A1VP pdf SPI Block Guide V03 06 Last downloaded 2014 01 10 http www ee nmt edu teare ee3081 datasheets S12SPIV3 pdf Datasheet detailing Microwire Last downloaded 2014 01 11 http www ti com lit an snoa743 snoa743 pdf EE Phillips Semiconductors The I C Bus Specification 2000 Last downloaded 2014 01 10 http www cs unc edu Research stc FAQs Interfaces I2C BusSpec V2 1 pdf E Semiconductors UM10204 I2C bus specification and user manual Last downloaded 2014 01 10 http www nxp com documents user_manual UM10204 pdf Homepage for PMBus detailing it s connection to gc Last visited 2014 01 11 http pmbus org about pmbusancestry Specification of SMBus Last downloaded 2014 01 11 http smbus org specs smbus20 pdf 34 35 Homepage about Pc detailing TWI Last visited 2014 01 11 http www i2c bus org
10. twi bus Example of a datasheet using the term Two Wire Interface instead of 2 Last downloaded 2014 01 11 http www atmel com Images 2466S pdf 35 35 Any Questions EYES
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