KNX Reference Design Evaluation Board User`s Manual
Contents
1. G ESERESGEE axQaaaaaaa gt m u oye P 5 2 f 5 b E 5 lt lt F a 8 Figure 10 Schematic of NCN5120 Reference Design Part 2 www BD Ff com ON SDOTXD gt SDURXD lt SCKUC2 gt OSICUM www BD fFf com ON NCN51206GEVB oo oo oo oo oo oo oo QO Figure 14 Inner Layer 2 of NCN5120 Reference Design www BD Ftf tom ON NCN51206GEVB KNX REF Figure 15 Top Silkscreen of NCN5120 Reference Design Figure 16 Bottom Silkscreen of NCN5120 Reference Design www BD FT tom ON NCN51206GEVB Table 5 BILL OF MATERIALS Note 1 Le L A omes CE oen e aw me _ j C s 28 Note 2 e seem ur es oem me o 1 1 1SMA40AT3G ON Semiconductor Semiconductor D3 NSRO520V2T1G K Semiconductor 523 Note 2 ON Semiconductor SOD 523 D5 D6 D7 ESD5Z3 3T1G D8 CE s NEN E NTJD4001NT1G ON Semiconductor SOT 363 6 RC1218JK xx22RL 22 Q Thick Film Yageo 1218 RC0402JR xx0RL 02 0 0625 W Thick Film Yageo 0402 RC0402JR xx1RL 0 0625 W Thick Film 1 6x 0 8 Technologies RC0402JR xx180KL 0 0625 W Thick Film RC0402. Baudrate Depending on Configuration Input Bits see Interface Mode page 14 Tolerance is Equal to Xtal Oscillator Tolerance Figure 6 C 20 pF Figure 6 Figure 6 Figure 6 Universal Asynchronous Receiver Transmitter UART UART Interface Baudrate Baudrate Depending on Configuration Input Pins see Interface Mode page 14 Tolerance is equal to tolerance of Xtal oscillator tolerance www BDTt ctom ON NCN51206GEVB Vaus Meus teus FILTER Lus lt VBUS gt Comments lt VBUS gt is an internal signal which can be verified with the Internal State Service Figure 4 Bus Voltage Undervoltage Threshold Comments lt VDD2 gt is an internal signal which can be verified with the System State Service Figure 5 VDD2 Undervoltage Threshold cs SX sees Figure 6 SPI Bus Timing Diagram www BDTt ctom ON NCN51206GEVB Analog State Nomal Reset gt c o z Comments lt TW gt is an internal signal which can be verified with the System State Service No SPI UART communication possible when RESETB is low It s assumed all voltage supplies are within their operating condition Figure 7 Temperature Monitoring Levels mi KN i 1 trrea_HoLg 4 Ut ITREQ SET
3. can be used over the complete Vpp2 voltage range ESD diodes D14 and D15 need to be replaced if Vpp2 is increased see also Adjustable DC DC Converter Push Button and LED s One push button SW1 and 3 LED s LEDI LED3 are foreseen on the reference design These are freely usable Microcontroller Debug Interface J4 is the microcontroller debug interface See the microcontroller datasheet for more info on how to use this interface www BD ff com ON NCN51206GEVB Interface Mode The device can communicate with the host controller by means of a UART interface or an SPI interface The selection of the interface is done by the pins MODEI MODE2 TREQ SCK UC2 and CSB UC1 which are connected to the microcontroller see Figure 10 More details on the different interfaces can be found back in Table 6 and the NCN5120 datasheet Digital Description The implementation of the Data Link Layer as specified in the KNX standard is divided in two parts All functions related to communication with the Physical Layer and most of the Data Link Layer services are inside NCN5120 the rest of the functions and the upper communication layers are implemented into the microcontroller see Figure 10 and Figure 18 The host controller is responsible for handling Checksum Parity Addressing Length The NCN5120 is responsible for handling Checksum Parity Acknowledge Repetition Timing Services All services can be found ba
4. clock signal is also supplied to the microcontroller See the NCN5120 datasheet www onsemi com for more details on this signal RESETB and SAVEB The KNX transceiver NCN5120 controls the reset state of the microcontroller by means of the RESETB signal An additional signal SAVEB can be monitored by the microcontroller to detect possible issues See NCN5120 datasheet for more details on these two signals Voltage Supervisors NCN5120 has different voltage supervisors Please check the NCN5120 datasheet for more details Temperature Monitor NCN5120 produces an over temperature warning TW and a thermal shutdown warning TSD Please check the NCN5120 datasheet for more details External 10 The reference design has the possibility to monitor up to 4 inputs pin 1 3 5 and 7 of J3 and control up to 4 outputs pin 9 11 13 and 15 of J3 The input pins are 3 3 V compliant and ESD protected D5 D8 Figure 10 J3 is connected in such a way that an easy connection between the input and ground is possible The microcontroller U2 see Figure 10 should be configured with an internal pull up see microcontroller datasheet on how to do this The external outputs are driven by means of low side drivers O1 and O2 see Figure 10 A gate resistor is foreseen for slope control R15 R18 R23 and R26 of Figure 10 J3 is routed in such a way that the load can easily be connected between the output low side driver and Vppo Q1 and Q2
5. 2JR xx0RL 0 0625 W Thick Film R15 R18 RC0402JR xx1KL 0 0625 W Thick Film R23 R26 R16 R19 RC0402JR xx1ML 0 0625 W Thick Film R24 R27 RC0402JR d KL 0 0625 W Thick Film 434 123 025 816 Wurth Elektronik See Datasheet NCN5120 ON Semiconductor QFN 40 MSP430F2370IRHAx Texas Instruments VQFN 40 a 1 All devices are Pb Free 2 Not mounted www BD FT tom ON NCN51206GEVB FUNCTIONAL DESCRIPTION Because the NCN5120 Reference Design contains the NCN5120 KNX Transceiver KNX Certified no details on KNX will be given in this document Detailed information on the Certified KNX Transceiver NCN5120 can be found in the NCN5120 datasheet www onsemi com Detailed information on the KNX Bus can be found on the KNX website and in the KNX standards www knx org KNX Bus Connection Connection to the KNX bus is done by means of J1 or J2 A standard Wago connector type 243 211 can be used for this see Figure 17 A reverse protection diode D1 Figure 10 is foreseen mandatory as also a Transient Voltage Suppressor D2 Figure 10 Figure 17 Bus Connector The KNX bus can be connected to J1 if the break out section is removed from the PCB When removed the KNX Bus connector Figure 17 will fit nicely inside the PCB Adjustable DC DC Converter NCN5120 provides the power for the complete reference design It has also a second power supply which can be used
6. ES Symbol Veus Parameter Voltage on Positive Pin of J1 and J2 Note 1 Input Voltage on J4 and J3 Pins 1 5 and 7 Input Voltage on J3 Pins 9 11 13 and 15 Note 2 Output Voltage on J3 Pins 10 12 14 and 16 Note 3 Ambient Temperature outside these operating ranges is not guaranteed Operating outside the recommended operating ranges for extended periods of time may affect device reliability 1 Voltage indicates DC value With equalization pulse bus voltage must be between 11 V and 45 V 2 Higher voltages are possible See Adjustable DC DC Converter page 13 for more details 3 See Adjustable DC DC Converter page 13 for the limitations Table 3 DC PARAMETERS The DC parameters are given for a reference design operating within the Recommended Operating Conditions unless otherwise specified Convention currents flowing in the circuit are defined as positive Remark Test Symbol Connector Pin s Parameter Conditions Min Typ Max Unit Power Supply Bus DC Voltage Excluding Active and Equalization Pulse Bus Current Consumption EA Eu ETE Undervoltage Trigger Level Veus_Hyst _ Bus Coupler Bus Coupler Current Limitation Undervoltage Hysteresis Normal Operating Mode No External Load DC1 and DC2 Enabled Continuous Transmission of 0 on the KNX Bus by another KNX Device 20 33 V 5 mA Undervoltage Release Level Vaus Rising Fi
7. NCN51206GEVB KNX Reference Design Evaluation Board User s Manual Introduction The NCN5120 Reference Design mimics a switch application suitable for use in KNX twisted pair networks KNX 1 256 Only 2 wires are needed for communication and power It contains the NCN5120 KNX Transceiver which handles the transmission and reception of data on the bus It will also generate all necessary voltages to power the board and external loads The Reference Design contains a microcontroller with debug interface for custom firmware development Up to 4 external switches can be monitored and up to 4 external loads can be controlled A voltage between 3 3 V and 21 V is available to drive the external loads The NCN5120 Reference Design assures safe coupling to and decoupling from the KNX bus Bus monitoring warns the external microcontroller for loss of power so that critical data can be stored in time Figure 1 NCN5120 Reference Design ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Key Features 9 600 baud KNX Communication Speed Supervision of KNX Bus Voltage High Efficient 3 3 V to 21 V Selectable DC DC Converter to Drive External Loads Monitoring of Power Regulators No Additional Power Supply Required Buffering of Sent Data Frames Extended Frames Supported Selectable UART or SPI Interface to Host Controller Selectable UART and SPI Baud Rate to Host Controller Optional CRC on UART to the Host Optio
8. ck in the NCN5120 datasheet www onsemi com Firmware No special firmware is provided with the reference design There will be some basic firmware flashed on the microcontroller U2 Figure 10 but this is only used to verify the reference design before shipment The user has the possibility to develop his own firmware but help on programming the microcontroller will not be provided my ON Semiconductor NCN5120 contains the physical layer and a part of the data link layer see Figure 18 ON Semiconductor can provide a library for the microcontroller to complete the data link layer By no means will ON Semiconductor provide any of the higher layer stacks Network Layer Transport Layer Sufficient 3 d party companies are available which have certified higher layer stacks FAQs 1 Is this reference design KNX Certified No only NCN5120 is KNX Certified The reference design may only be used for evaluation an of NCN5120 It is not allowed to use the reference design in a final product or to sell it as a KNX Certified product Contact ON Semiconductor if you want to use the reference design as a final product What 3rd party companies do you recommend for the higher layer stacks ON Semiconductor does not recommend 374 party company in particular Several 3 party companies have KNX Certified stacks and it s always advised to use one of these stacks Some companies have experience with NCN5120 Contact ON Sem
9. gure 4 R10 Not Mounted DC DC Converter E 14 16 E Undervoltage Release Level Undervoltage Trigger Level Output Voltage Ripple Vpp2 _ rip looz im lim Overcurrent Threshold Power Efficiency 10 12 Output Voltage VBus gt Vpp2 R10 Mounted 3 3 Vppo Faling Figure 5 Veus 26 V Vpp2 3 3 V 1502 40 mA Vin 26 V Vppo 3 3 V Ipp2 35 mA www BD fT com ON NCN51206GEVB Table 3 DC PARAMETERS continued The DC parameters are given for a reference design operating within the Recommended Operating Conditions unless otherwise specified Convention currents flowing in the circuit are defined as positive Remark Test Symbol Connector Pin s Parameter Conditions Min Typ Max Unit Digital Inputs Logic Low Threshold Logic High Threshold Logic Low Output Level Logic High Output Level Table 4 AC PARAMETERS The AC parameters are given for a reference design operating within the Recommended Operating Conditions unless otherwise specified Logic Low Level Open Drain Symbol Pin s Remark Test Conditions Min Typ Max Unit Power Supply BUS FILTER VBUS1 VBUS1 Filter Time Figure 4 MASTER Serial Peripheral Interface MASTER SPI tscCK_ HIGH tsck Low 1501 SET SDI HOLD ics HIGH lcs sET lcs HOLD trREQ LOW trREQ HIGH trREQ SET tTREQ HOLD TREQ Hold Time SPI
10. i trago Low trREQ_HIGH Figure 8 TREQ Timing Diagram www BDTt ctom ON NCN51206GEVB APPLICATION SCHEMATIC 5 A 100 001000000 DLLEAOZSOHSN 10pF FA 238 16MHz 4 c2 B 23 22 5120 Re 1R R4 22R D2 VFILT c7 100nF 100uF IPS VFILT 17 5 V5 TP18 E V33 TP19 GND DELVOPVWSI wo o o 1 1 E J1 2 x RT 01T 1 0B LF Figure 9 Schematic of NCN5120 Reference Design Part 1 www BD Ff com ON CON1 243 211 J2 2 x RT 01T 1 0B LF NCN51206GEVB APPLICATION SCHEMATIC OUT3 OUTA4 R23 1k R24 1MEG 1k J3 sw1 Q2B 434 123 025 816 R26 Q2A R28 1k 1k o LED1 o LED2 I 2 2 a R20 1k 5 9 g NIOOPOPLN R27 1MEG 145525953 8 haan 145575953 TERARI g 288 e gt xf xf sf xr 2 S 9 4 2 n 2 38 geez SSAVIq 83 vdsogonomsogoni Ed 2 WN LSH OO WIOOVON ALSOSONIO ed s 391 EET SVO OSON S zd SL Eos Zd 80 XOLL Zd 5 IQL OGL VO OV L 1nOVO z Zd X08L vd EVOMTIONIVL L Zd XTIOV HLNOBLS Yd ZVO W TOVO Zd ts lt lt x
11. iconductor for more information Can we freely reuse the schematic and layout of this reference design It is allowed to reuse the schematic components and layout of the NCN5120 reference design for your own application Because the operating conditions of your design are not known by ON Semiconductor one must always fully verify the design even if it s based on this reference design Contact ON Semiconductor if additional information is required Can we request ON Semiconductor to supply the higher layer stacks By no means will ON Semiconductor provide any higher layer stacks Certified higher layer stacks can be provided by 314 party companies see also Firmware How much load can the outputs drive The maximum allow load can be calculated with the formula as given in Adjustable DC DC Converter page x13 Ipp2 defines the maximum load the outputs can drive in total What is the usage of ARXD and ATXD Figure 10 These pins have no meaning and cannot be used tried all possible R and R9 combinations but I m not capable of setting Vpp2 above 6 V How does this come As can be seen in Figure 10 Vpp2 5 V is connected to an ESD protection diode D14 This is a 5 V ESD protection diode Whenever one tries to set 2 above 5 V this ESD diode will trigger and limit the Vpp2 voltage to about 6 V This issue can be solved by or removing D14 in an ESD safe area this should not be an issue
12. is possible One could connect NCN5120 directly to your microcontroller board by soldering some Table 6 INTERFACE SELECTION RXD TXD 9 bit UART Mode 19 200 bps 9 bit UART Mode 38 400 bps 8 bit UART Mode 19 200 bps 8 bit UART Mode 38 400 bps river SCK out CSB out SDI SDO SPI Master 125 kbps SPI Master 500 kbps NOTE X Don t Care 3 Host Controller Network Layer Logic Link Control Data Link Layer Media Access Control Physical Layer Figure 18 OSI Model Reference NCN5120 www BDTt ctom ON NCN51206GEVB BOARD DIMENSIONS 30 0 KNX REF 7 2 e E Q em amp e 2 mA NNYNY zl Er Above dimensions are in mm Height C8 11 mm Height J3 5 3 mm Height J4 6 mm Height L1 and L2 bottom side of PCB 4 8 mm The product described herein may be covered by one or more US patents pending ON Semiconductor and D are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC owns the rights to a number of patents trademarks copyrights trade secrets and other intellectual property A listing of SCILLC s product patent coverage may be accessed at www onsemi com site pdf Patent Marking pdf SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any pa
13. nal MARKER Character to the Host Optional Direct Coupling of RxD and TxD to Host Analog Mode Auto Polling Optional Temperature Monitoring Contains Freely Programmable Microcontroller for Custom Applications Monitoring of 4 External Switches Controlling of 4 External High Voltage Loads e g LED s One Freely Usable Push Button 3 Freely Usable LED s Operating Temperature Range 25 C to 85 C Semiconductor comen S AAT B D it CO m ON ication Order Number May 2013 Rev 3 e e EVBUM2169 D NCN51206GEVB BLOCK DIAGRAM Connector J4 Glock y RESETb SAVEb MSP430 Interface UART or SPI Low Side Drive c 0 a 8e o z 8 20 tc 3 LED Switch LED1 2 3 SW1 Figure 2 NCN5120 Reference Design Block Diagram CONNECTOR DESCRIPTION Table 1 CONNECTOR LIST AND DESCRIPTION J1 and J2 KNX Bus Connection External Switch Inputs and External Outputs Microcontroller Debug Interface TYPICAL APPLICATION kasus UN P P P Figure 3 Typical Application E 4 Push Buttons with each one blue LED www BD fffctom ON ESD Protection Connector J3 NCN51206GEVB ELECTRICAL SPECIFICATION Recommend Operation Conditions Operating ranges define the limits for functional operation and parametric characteristics of the reference design Note that the functionality of the reference design Table 2 OPERATING RANG
14. or by replacing this 5 V ESD diode with a higher voltage version see the ESD5Z datasheet for other versions www onsemi com www BD ff com ON NCN51206GEVB 8 5 it possible to test all possible interfaces UART SPI Analog Mode with KNX REV6 Yes the KNX REV6 board can be used with all possible interfaces One has to be careful however when using the Analog Mode In the Analog Mode the digital of NCN5120 is bypassed If the microcontroller would force the RXD pin pin 29 of NCN5120 low NCN5120 would pull the KNX bus low which could lead to issues wires on the KNX REV6 board It is however advised to remove the microcontroller from the KNX REV6 board or to put the microcontroller in reset short pins 8 and 7 of J4 see Figure 10 10 I m trying to sink more than 13 mA from the KNX bus with KNX REV6 but I m having issues with the voltage regulators whenever I m going above 16 mA What could be the issue To be able to take more than 13 mA from the KNX bus one needs to pull the FANIN WAKE pin of NCN5120 low This can be done by mounting R10 zero Ohm resistor After mounting of R10 see Figure 9 verify carefully if the FANIN WAKE pin is pulled to ground See NCN5120 datasheet for more info on the FANIN WAKE pin s it possible to bypass the microcontroller on the KNX REV6 board and connect NCN5120 directly with our microcontroller board Although the board is not designed for this this
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17. to drive external loads The voltage is programmable between 3 3V and 21V by means of an external resistor divider R6 and R9 see Figure 10 The voltage divider can be calculated as next _ X _ 3 3 6 Rypp2M 3 3 RyppaM is between 60 and 140 typical 100 KQ The DC value of the KNX bus should at least be higher than Vppo Be aware that when changing the 2 voltage D14 and D15 see Figure 10 need to be replaced Check the 5 5 datasheet for possible replacements www onsemi com Although is capable of delivering 100 mA the maximum current capability will not always be usable One needs to make sure that the KNX bus power consumption stays within the KNX specification The maximum allowed current for Vppo can be calculated as next Vaus X gt 2 0 033 x 1502 eq 2 Ipus is limited by NCN5120 If R10 is not mounted Ipus can maximum be 13 mA If R10 is mounted Igus can maximum be 26 mA Ipus will however also be limited by eq 1 the KNX standard Minimum Vpus is 20 V see KNX standard Above formula gives only an estimation and will mainly depend on the firmware loaded on the microcontroller U2 see Figure 10 One must always verify that the KNX bus loading is in line with the KNX Specification under all operating conditions Xtal Oscillator A crystal of 16 MHz Y1 see Figure 10 is foreseen on the reference design This
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