The HP 1660C/CS/CP-Series Benchtop Logic Analyzers Technical
Contents
1. A user specified term that can be any state no state any recognizer pattern ranges or edge glitch any timer or the logical combina tion NOT AND NAND OR NOR XOR NXOR of the recognizers and timers Each sequence level has a branching qualifi er When satisfied the analyzer will branch to the sequence level specified 4 Full Channel Half Channel M odes Warranted specification With compliments fon 49 241 155 315 Helmut Singer Elektronik www helmut singer de info helmut singer de fax 49 241 152 066 Feldchen 16 24 D 52070 Aachen Germany Occurrence Sequence qualifier may Counters be specified to occur up to 1 048 575 times before advancing to the next level Each sequence level has its own counter Maximum 1 048 575 Occurrence Count Storage Each sequence level Qualification has a storage qualifier state only that specifies the states that are to be stored Maximum 125MHz Sequencer Speed State 12 Sequence Levels Timing 10 Sequence Levels Timers Timers may be Started Paused or Continued at entry into any sequence level after the first Timers 2 Timer Range 400 ns to 500 seconds Timer 16 ns or 0 1 whichever Resolution is greater Timer 32 ns or 0 1 Accuracy whichever is greater Timer 70ns Recovery Time Datainto li0nstypica Trigger Out BNC Port Acquisition Measurement and Display Functions Arming Each analyzer can be armed2. With compliments Helmut Singer Elektronik www helmut singer de info helmut singer de fax 49 241 152 066 Germany The combination of 100 MHz state 500 M Hz timing 2 channel 250 MHz BW scope or 32 channel 200 M Vector sec pattern generator internal hard disk drive and LAN make the HP 1660C CS CP series benchtop logic analyzers especially well suited to finding problems at the integration stage of prototype hardware and software e The internal hard disk drive provides quick storage and retrieval of files e 3 5 inch high density flexible disk drive supports both DOS and LIF formats e LAN interface enables access to the logic analyzer files via FTP or NFS Use X11 windows and display the logic analyzer user interface on a PC or workstation 1 e The HP 1660C CS CP series operating system includes System Performance Analysis SPA SPA provides state Logic Analyzer Key Specifications and Characteristics HP Model Number 1660C CS CP 1661C CS CP 1662C CS CP 1663C CS CP 1664A Stateandtiming 130 102 be 4 amp 34 Channels Timing Analysis Conventional 250 M Hz all channels 500MHzhalfchanneis S Transitional 125 M Hz all channels 250 MHz half channels Glitch 125 M Hz half channels State Analysis Speed 100MHzallchannes 50MHZz State Clocks Qualifiers 6 6 4 2 2 Memory Depth 4K perchannel 8Kinhalf channelmodes per Channel LAN Port Standard for CP Model Option 015 for C CS model 1 NA M aximum
3. Initiation Arming is started by Run Group Run or the Port In BNC ye et e e m e e e e e e pe y e e e and the oscilloscope can cross arm each other Output An output signal is provided at the Port Out BNC Port In Out PORTIN Portinisastandard Signaland BNC connection Connection The input operates at TTL logic signal levels Rising edges are valid input signals PORTOUT Port Out is a standard Signaland BNC connection Connection with TTL logic signal levels A rising edge is asserted as a valid output Skew Adjustment and Arming Times Correction factors for Adjustment nominal skew between displayed timing and oscilloscope signals are built into the oper ating system Additional correction for unit by unit varia tion can be made using the Skew field An entered skew value affects the next not the present acquisition display 1 Please refer to HP 1664A Product Specifications and Characteristics on page 9 2 LAN interface is standard for the HP 1660CP series optional for the HP 1660C CS series HP 1660C CS C P Series Logic Analyzer Specifications and Characteristics PORT IN 15 ns typical delay Arms Logic from signal input to a AnalyzerB don t care logic analyzer trigger PORT IN 40 ns typical delay Arms from signal input to an Oscilloscope immediate oscilloscope trigger not available when oscilloscope is in time qualified pattern triggering mode Logic 120 ns typica
4. 1 clk period Recommended lead set HP 10474A 412 CLKout gt s 10H15 Z 1014 10463A ECL CLOCK POD WAIT CLKin Output type TALVT 244 with 100 Q series 10H125 on non 3 state channel 7 note 2 3 state enable negative true 100 KQ to GND enabled on no connect Maximum clock 200 M Hz Skew note 1 typical lt 3 ns worst case 7 ns Recommended lead set HP 10474A 100 Q TALVT 244 Note 1 Typical skew measurements made at pod connector with approximately 10 pF 50 KQ load to GND worst case skew numbers are a calculation of worst case conditions through circuits Both numbers apply to any channel within a single or multiple module system Note 2 Channel 7 on the 3 state pods has been brought out in parallel as a non 3 state signal By looping this output back into the 3 state enable line the channel can be used as a 3 state enable Data Cable Characteristics Without a Data Pod The HP 1660CP data cables without a data pod provide an ECL terminated 1 KQ to 5 2V differen tial signal from a type 10E156 or 10E154 driver These are usable when received by a differential receiver preferably with a 100 Q termination across the lines These signals should not be used single ended due to the slow fall time and shifted voltage threshold they are not ECL compatible HP 1660CP DATA CABLE OUTPUT 5 2V 1kQ gt sa Differential 10E154 e
5. HP E2427A Addkeyboard with HiL connector HP 1664A only HP E2472A 12 ee a rh age to HP 1660C CS series this upgrade does not 12 Upgrade includes cost of installation ata Hewlett See Aka Ae ee shee ied eS Sac tee pelea eee tN Packard Service Center Upgrade is not customer HP E2460BT 12 Upgrades HP 1661C CS to 136 channel HP 1660C CS model option 001 installable pa upgrades channel count of HP 1662C CS to 1660C CS option 002 upgrades 13 Ethernet LAN interface is included standard on the channel count of HP 1663C CS to 1660C CS HP 1660CP series and HP 1670D series models a aT Se ES SPN i O OA Se EE SO Co ES EE LAN is optional on the HP 1660C series and HP E2461Bf 12 Upgrades HP 1662C CS to 102 channel 1661C CS model option 001 upgrades HP 1660CS series LAN is not available on the channel count of 1663C CS to 1661C CS HP 1664A HP E2462BT FIX Upgrades HP Y663C7CS to d channel 1660CICS model Channel sountupiats dent anny Me HP E2469A 12 l Upgrade HP 1660A AS series to HP 1660C CS series includes LAN capabili ty do not order additional HP E2472A Additional Ordering Information State Timing Analyzer Probes amp Lead Sets With compliments Helmut Singer Elektronik www helmut singer de info helmut singer de fon 49 241 155 315 fax 49 241 152 066 Feldchen 16 24 D 52070 Aachen Germany For more information about Hewlett Packard test amp measurement products applications services and for a
6. 1V ns and threshold 1 3V 6 Time or state tagging Count Time or Count State is available in the full channel state mode There is no speed penalty for tag use Memory is halved when time or state tags are used unless a pod pair 34 channel group remains unassigned in the Configuration menu Warranted specification Maximum Timing Speed Channel Count Sample Period Minimum Glitch W idth Maximum Glitch W idth Memory Depth per Channel Time Covered by Data Sample Period Accuracy Channel to Data sample and glitch information is stored every sample period 125 M Hz HP 1660C CS CP 68 HP 1661C CS CP 51 HP 1662C CS CP 34 HP 1663C CS CP 17 HP 1664A 17 8 ns minimum 8 38 ms maximum 3 5 ns Sample Period 1 ns 2048 samples Sample Period x 2048 16 3 us minimum 17 1 sec maximum 0 01 2 ns typical Channel Skew 3 ns maximum Time Interval Accuracy Maximum Delay After Triggering Trigger Macros Sample Period Accuracy channel to channel skew 0 01 of time interval reading Sample Period 2 8 ns 8 389 ms Sample Period gt 8ns 1 048 575 x sample period Trigger setups can be selected from a catego rized list of trigger macros Each macro is shown in graphical form and has a written description Macros can be chained togeth er to create a custom trigger sequence Recognizers Pattern Recognizers Each recognizer is the AND combination of bi
7. Clock Speed 200 M Hz Number of Data Channes t i CS S 16 Memory Depth in vectors tS 258 048 sE Command 77 No 100 M Hz 50 M Hz a e ae 258 048 258048 o boo w Get to the root cause of problems quickly histograms state overview and time interval analysis The HP E2450A Symbolic Download Utility is included with the HP 1660C CS CP series This utility provides the capability to extract symbolic information from popular object module formats Store data as ASCII files and screen images in TIFF PCX and EPS encapsulated PostScript formats New graphical trigger macros make trigger setup easier Centronics RS 232 and HP IB com munications ports make connecting to other devices easier than ever All of these come standard on all HP 1660C CS CP series models Standard DIN mouse and keyboard connectors A mouse ships with every HP 1660C CS CP series 2 1 Please refer to HP 1664A Product Specifications and Characteristics on page 9 PostScript is a trademark of Adobe Systems Incorporated Oscilloscope Key Specifications and Characteristics HP 1660CS HP 1661CS HP 1662CS amp HP 1663CS Channels 2 Maximum Sample 1GSa s per channel Rate Bandwidth dcto250MHz dc coupled Rise Time 1 IL4n Vertical Resolution 8bts MemoryDepthper Sksamples tS Channel HP 1660C CS CP Series General Product Information FrontPanel A knob and keypads make up the front panel human interface Keys incl
8. current sales office listing visit our web sites http www hp com go tmdir http www hp com go logicanalyzer http www hp com go emulator You can also contact one of the follow ing centers and ask for a test and mea surement sales representative United States Hewlett Packard Company Test and Measurement Call Center P O Box 4026 Englewood CO 80155 4026 1 800 452 4844 Canada Hewlett Packard Canada Ltd 5150 Spectrum Way Mississauga Ontario L4W 5G1 905 206 4725 Europe Hewlett Packard European Marketing Centre P O Box 999 1180 AZ Amstelveen The Netherlands 31 20 547 9900 J apan Hewlett Packard J apan Ltd Measurement Assistance Center 9 1 Takakura Cho Hachioji Shi Tokyo 192 J apan Tel 81 426 56 7832 Fax 81 426 56 7840 Latin America Hewlett Packard HP 10465A 8 channel ECL unterminated Data Pod for the HP 1660CP series Latin American Region Headquarters use HP 10347A lead set 5200 Blue Lagoon Drive HP 10466A amp channel 3 state TTL 3 3V Data Pod forthe HP 1660CP series eae Jae HP 10474A 8 channel Probe Lead Set for the HP 1660CP series USA HP 10347A 8 channel 50 ohm Coaxial Probe Lead 5e Tel 305 267 4245 aR ge ee eee 305 267 4220 Related HP Literature Fax 305 267 4288 Title st C C2 2XR Publication Description HP Pub Number Australia New Zealand HP 1660C C3 Series and AP 1670D Series Color Brochure 5064 366
9. dcto250MHz 7 11 real time dc coupled RiseTime 14ns 8 11 Vertical 8bis Resolution Memory Depth 8k samples Input Coupling M Q ac dc 50 Q dc only InputR H 1MQ 1 50Q 1 Input F Probes Two HP 10430A probes Included 10 1 1M Q 6 5 pF Vertical at BNC Maximum 1MQ 4 250V Safe Input 50 Q 5V rms Voltage Vertical 1MQ 250V Sensitivity ac dc lt 10 kHz Range 50 Q 5V rms 1 1 Probe Probe Factors Any integer ratio from 1 1 to 1000 1 Vertical dc 1 25 of full scale Gain Accuracy I dc Offset 2V to 250V Range depending on the 1 1 probe vertical sensitivity dc Offset 1 0 of channel Accuracy H offset 2 0 of full scale Voltage 1 25 of full scale Measurement offset accuracy Accuracy H 0 016 V div Channel to dc to 50 M Hz 40 dB Channel 50 M Hz to 250 M Hz Isolation 30 dB Horizontal Time Base 1ns div to 5 s div Range Time Base 20 ps 0 005 of At Resolution 2x10 6 x delay setting 150 ps Maximum 4usto 40s Negative depending on the Acquisition sample rate Delay Maximum 16 7msto25ks Positive depending on Acquisition sample rate Delay Time Interval 0 005 of At Measurement 2x10 6x delay pe iraey setting 150 ps 10 11 Trigger Level Bounded within chan Range nel display window Trigger dc to 50 M Hz Sensitivity 1 0 063 x Full Scale 50 M Hz to 250 M Hz 0 125 x Full Scale Trigger M odes Immediate Triggers immediately afte
10. trigger M ax time between states is 34 4sec Min time between states is 8 ns Time Tag 8 ns to 34 4 seconds Value 8 ns 0 01 of time tag value Time Tag 8 ns or 0 1 Resolution whichever is greater Conventional Data stored at selected Timing sample rate across all timing channels M aximum 250 M Hz 500 M Hz Timing Speed M Channel HP 1660C CS CP 136 68 Count A HP 1661C CS CP 102 51 HP 1662C CS CP 68 34 HP 1663C CS CP 34 17 HP 1664A 34 17 4 Sample 4ns 2 ns minimum Period 4 8 38 ms maximum M emory 4096 8192 samples Depth per Channel 4 Time Covered Sample period x by Data memory depth 16 3 us min 34 4 sec 68 6 sec max Transitional Sample is stored in Timing acquisition memory only when the data changes A time tag stored with each sample allows recon struction of waveform display Time covered by a full memory acquisition varies with the number of pattern changes in the data Maximum 125 M Hz 250 M Hz Timing Speed M Channel HP 1660C CS CP 136 68 Count A HP 1661C CS CP 102 51 HP 1662C CS CP 68 34 HP 1663C CS CP 34 17 HP 1664A 34 17 Sample 8 ns 4 ns Period 4 Time Covered 16 3 us minimum by Data 41 9 7 hrs 6 5 hrs maximum Maximum 34 45 Time Between Transitions Number of 1023 2047 682 4094 Captured Depending on input Transitions 4 signals 4 Full Channel Half Channel M odes 5 Specified for an input signal VH 0 9V VL 1 7V slew rate
11. 502 Coop 7 5 pF To Cra 1pF LK Ry 100kQ Zo 1502 High Frequency Model for Probe Inputs Figure 2 Minimum 500 mV peak to peak Input Voltage Swing Minimum 250 mV or 30 of input Input amplitude whichever is Overdrive greater Threshold 6 0 V to 6 0V in 50 mv Range increments Threshold Threshold levels may be Setting defined for pods 17 channel groups on an individual basis Threshold 100 mV H of Accuracy threshold setting Input 10Vaboutthe Dynamic threshold Range Maximum 40Vpeak Input Voltage HV 1 3 amp maximum Accessory per pod Current Channel Each groupof34 Assignment channels a pod pair can be assigned to Analyzer 1 Analyzer 2 or remain unassigned 1 Please refer to HP 1664A product specifications and characteristics on page 9 3 Time may vary depending upon the mode of logic analyzer operation Warranted specification With compliments Helmut Singer Elektronik www helmut singer de info helmut singer de fon 49 241 155 315 fax 49 241 152 066 Feldchen 16 24 D 52070 Aachen Germany State Analysis Maximum 100 M Hz all models State except HP 1664A Speed which is 50 MHz Channel HP 1660C CS CP 136 68 Count 41 HP 1661C CS CP 102 51 HP 1662C CS CP 68 34 HP 1663C CS CP 34 17 HP 1664A 34 17 Memory 4096 8192 samples Depth per Channel 41 State Clocks HP 1660C CS CP 6 clocks HP 1661C CS CP 6 clocks HP 1662
12. 58 777 ee Ltd Logic Analyzers EES E E EEEE E EE E AE AAE E E N E See Blackburn Victoria 3130 The HP 1660CP Series Logic Analyzers W ith Color Photo Card 5966 1490E Australia Integrated 32 Channel 200 mVectors Sec Pattern Generator 1 800 629 485 Australia 0800 738 378 New Zealand The HP 1670 Series Benchtop Logic Analyzers Technical Specifications 5964 3666E Fax 61 3 9210 5489 Introduction to the HP 1660C CS and Video NTSC 5965 7501EUS Asia Pacific 1670D Series Logic Analyzers Video PAL 5965 7501E Hewlett Packard Asia Pacific Ltd E SO Oe ee 17 21 F Shell Tower Times Square 1 Matheson Street Causeway Bay Warranty Information Hond Kong All Hewlett Packard products described in this document are warranted against defects in materi yy 852 2599 7777 al and workmanship for a period of one year from date of shipment Option W03 provides a three Fax 852 2506 9285 month on site warranty in lieu of the standard one year return to HP warranty Three year and five year return to HP repair services are also available Refer to individual product manuals for Copyright detailed descriptions and terms of warranty 1 Please refer to HP 1664A Product Specifications and Characteristics Hewlett Packard Company 1997 Technical information in this document is subject to change without notice 5964 3664E 12 97 Printed in the U S A on page 9
13. C CS CP 4 clocks HP 1663C CS CP 2 clocks HP 1664A 2 clocks Clocks can be used by either one or two state analyzers at any time except for the 1663C 1663CS 1663CP and 1664A models which can have only one state or timing analyzer Clock edges can be ORed together and operate in single phase two phase demultiplexing or two phase mixed mode Clock edge is selectable as positive negative or both edges for each clock State Clock The high or low of up to Qualifier 4 of the 6 clocks can be ANDed or ORed with the clock specification Setup Hold 5 one clock 3 5 0 ns to 0 3 5 ns one edge in 0 5 ns increments one clock 4 0 0 ns to 0 4 0 ns both edges in 0 5 ns increments multi clock 4 5 0 ns to 0 4 5 ns multi edge in 0 5 ns increments Minimum 3 5 NS State Clock Pulse Width 5 Minimum 10 0 ns Master to Master Clock Time 5 Minimum 10 0 ns Slave to Slave Clock Time 5 Minimum 0 0 ns Master to Slave Clock Time 5 Minimum 4 0 ns Slave to Master Clock Time 5 Clock 4 0 0 ns fixed Qualifiers Setup Hold 61 State Counts the number of Tagging 5 qualified states between each stored state Measurement can be shown relative to the previous state or relative to trigger Max count is 4 29 x 109 StateTag Oto 4 29 x 109 Count State Tag 1 count Resolution Time Measures the time Tagging 61 between stored states relative to either the previous state or to the
14. Discontinued Product Support Information Only This literature was published years prior to the establishment of Agilent Technologies as a company independent from Hewlett Packard and describes products or services now available through Agilent It may also refer to products services no longer supported by Agilent We regret any inconvenience caused by obsolete information For the latest information on Agilent s test and measurement products go to www agilent com find products Or in the US call Agilent Technologies at 1 800 452 4844 8am 8pm EST ete nee wee eee Agilent Technologies The HP 1660C CS C P Series Benchtop Logic Analyzers Technical Data Identifying the cause of problems in embedded microprocessor system designs can be difficult The HP 1660C CS CP series benchtop logic analyzers have the features to help the design team troubleshoot hardware and find software defects quickly Team members can verify critical hardware timing relation ships view processor mnemonics make analog parametric measure ments or functionally test their digi tal design with stimulus An optional LAN interface enables software designers to capture a real time microprocessor trace and time correlate it to source code in C or other high level languages on a PC or workstation For time correlation of source code order the HP B3740A Software Analysis package fon 49 241 155 315 Feldchen 16 24 D 52070 Aachen
15. and o markers measure the number of tagged states between any two States state only The x or o marker can be used to locate the nth occurrence of a specified pattern before or after trigger or after the beginning of data The o marker can also find the nth occurrence of a pattern before or after the x marker Statistics x to o marker statistics are calculated for repetitive acquisitions Patterns must be speci fied for both markers and statistics are kept only when both pat terns can be found in an acquisition Statistics are minimum x to o time maximum x to o time average x to o time and ratio of valid runs to total runs 1 Please refer to HP 1664A Product Specifications and Characteristics on page 9 Intervals Compare Performs post process Mode ing bit by bit Functions comparison of the acquired state data and Compare Image data Compare Image Created by copying a state ac quisition into the compare image buffer Allows editing of any bitin the Compare Image to a 1 X or O Each channel column in the Compare Image can be enabled or dis abled via bit masks in the Compare Image Upper and lower ranges of states rows in the compare image can be specified Any data bits that do not fall within the enabled channels and the specified range are not compared Compare Image Boundaries Stop Repetitive acquisitions Measurement may be halted when the comparison between the current s
16. ay form format Sec div 1 ns to 1000 s 0 01 resolution Delay 2 500 s to 2 500 s Accumulate Waveform display is not erased between successive acquisitions Overlay M ode M ultiple channels can be displayed on one waveform display line When waveform size setto large the value represented by each waveform is displayed inside the waveform in the selected base 24 lines maximum on one screen Up to 96 lines may be specified and scrolled through SPA includes state histogram state overview and time interval measurements to aid in the software optimization process These tools provide a statistical overview of your synchronous design Binary Octal Decimal Hexadecimal ASCII display only User defined symbols two s complement Symbols Displayed Waveforms Performance Analysis User can define a mnemonic for the spe cific bit pattern of a label When data display is SYM BOL mnemonic is displayed w here the bit pattern occurs Pattern Symbols User can define a mnemonic covering a range of values When data display is SYM BOL values within the speci fied range are displayed as mnemonic offset from base of range Range Symbols Numberof 1000 maximum Symbols HP 1660CS Series Oscilloscope Specifications and Characteristics 1 General Information Model HP 1660CS 1661CS Numbers 1662CS 1663CS Numberof 2 Channels Maximum 1GSa s per channel Sample Rate Bandwidth
17. by the Run key the other analyzer the oscilloscope CS models only the pattern gener ator CP M odels only or the Port In H Starts acquisition of data in specified trace mode In single trace mode or the first run of a repeti tive acquisition Stop halts acquisition and displays the current acquisition data For subsequent runs in repetitive mode Stop halts acquisition of data and does not change current display Single mode acquires data once per trace specification repetitive mode repeats single mode acquisitions until Stop is pressed or until pattern time interval or compare stop criteria are met Displayed as a vertical dashed line in the timing waveform state waveform and X Y chart displays and as line 0 in the state listing and state compare dis plays Activity Provided in the Indicators Configuration State Format and Timing Format menus for moni toring device under test activity while set ting up the analyzer Labels Channels may be grouped together and given a 6 character name called a label Up to 126 labels in each analyzer may be assigned with up to 32 channels per label Trigger terms may be given an 8 character name MeasurementFunctions Two markers x and o are shown as dashed lines in the display The x and o markers measure the time interval between events occurring on one or more waveforms or states available in state when time tagging is on The x
18. eases 0 08 per degree C from software calibration temperature 10 Specification applies atthe maximum sampling rate At lower rates replace 150 ps in the formula with 0 15 x sample interval where sample inter val is defined as 1 sample rate 11 Specifications valid within 10 C of auto calibra tion temperature The HP 1664A Specifications and Characteristics The HP 1664A is a low cost version of the HP 1660C CS CP series logic ana lyzer family The HP 1664A has some specifications and characteristics that are different from the HP 1660C CS CP series logic analyzers The HP 1664A Supports a maximum of 50 M Hz state acquisition Supports all modes of timing analysis Weight 26 pounds 11 8 kg Altitude To 15 000 ft 4 752 m Boots from the floppy disk drive it does not have flash ROM It cannot be upgraded to include an oscilloscope or pattern generator Channel count upgrades are not available The mouse and keyboard connectors are HP HIL standard For the optional keyboard order HP E2427A It cannot be upgraded to a C model It does not support the HP B3740A software analyzer software t does not support the HP E2450A Symbol Download Utility e t does not support the software per formance analysis software e Itdoes not have a hard disk drive e It cannot have a LAN port added HP 1660C P Series Pattern Generator Characteristics Maximum mem
19. ew note 1 typical lt 4 ns worst case 12 ns Recommended lead set HP 10474A _ 100 Q 74ACT11244 gt With compliments Helmut Singer Elektronik www helmut singer de info helmut singer de fon 49 241 155 315 Feldchen 16 24 D 52070 Aachen fax 49 241 152 066 Germany With compliments Helmut Singer Elektronik www helmut singer de info helmut singer de fon 49 241 155 315 fax 49 241 152 066 Feldchen 16 24 D 52070 Aachen Germany HP 10464A ECL DATA POD TERMINATED Output type 10H115 with 330 Q pulldown 47 Q series Maximum clock 200 M Hz Skew note 1 typical lt 1 ns worst case 2ns Recommended lead set HP 10474A 41 Q gt 330 Q 5 2V HP 10465A ECL DATA POD UNTERMINATED 10H115 10 Clock Pod Characteristics 10460A TTL CLOCK POD Clock output type 10H125 with 47 Q series true amp inverted Clock output rate 100 M Hz maximum Clock out delay 1lns maximum in 9 steps Clock input type TTL 10H124 Clock input rate dc to 100 MHz Pattern input type TTL 10H124 no connectis logic 1 Clock in to clock out approximately 30 ns Output type 10H115 no termination Maximum clock 200 M Hz Skew note 1 typical lt 1 ns worst case 2 ns Recommended lead set HP 10347A E 10H115 gt HP 10466A 3 STATE TTL 3 3 VOLT DATA POD Pattern in to recognition approx 15ns
20. gt iii 1kQ 5 2 V Clock output type 10H116 differential unterminated and differential with 330 Q to 5 2V and 47 Q series Clock output rate 200 M Hz maximum Clock out delay 11 ns maximum in 9 steps Clock input type ECL 10H116 with 50 KQ to 5 2v Clock input rate dc to 200 MHz Pattern input type ECL 10H116 with 50 KQ no connect is logic 0 Clock in to clock out approximately 30 ns Pattern in to recognition approx 15ns 1 clk period Recommended lead set HP 10474A mm CLKin 50kQ VBB gy 5 2V 3302 1016 479 CLKout m gt HP 1660C CS C P Series a Ordering Information HP 1660C CS CP Series Benchtop Logic Analyzers HP 1660C HP 1660CS Every HP 1660 Series logic analyzer ships standard with a complete probe kit that contains all of the HP B3740A Software Analyzer acquisition cables p n 01660 61605 lead sets 01650 61608 grabbers 5090 4356 and other acces Opt AJ 4 IBM 3 5 M edia Documentation sories that you require for general purpose logic analysis The HP 1660CP Series requires the appro Opt AAY HP 9000 Series 700 priate clock and data pods to be ordered as options as noted below M edia Documentation ta k Opt AAV SUN Solaris and SUN OS Additional HP 1660C CS CP Series Product Options si i edia Documentation 7 eae alae E or e Gr Nhe eet fis on ee ee ee TE ET pt ingle Use
21. l delay Analyzer from logic analyzer Arms PORT trigger to signal OUT BI output Oscilloscope 60 ns typical delay from Arms PORT oscilloscope trigger to OUT signal output 115 Vac or 230 Vac 22 to 10 single phase 48 66 Hz 320 VA max Temperature Instrument 0 to 50 C 32 to 122 F Disk media 10 to 40 C 50 to 104 F Probes and cables 0 to 65 C 32 to 149 F Instrument up to 95 relative humidity at 40 C 140 F Disk media and hard drive 8 to 85 relative humidity Altitude To 3 048 m 10 000 ft Vibration Random vibrations Operating 5 500 Hz 10 minute per axis 0 3g rms Vibration Random vibrations Non Operating 5 500 Hz 10 minutes per axis 2 41 g rms and swept sine resonant search 5 500 Hz 0 75 g 0 peak 5 minute resonant dwell 4 resonances per axis Weight 266lbs 13kq Dimensions See figure 1 Safety IEC 348 HD 401 UL 1244 and CSA Standard C22 2 No 231 series M 89 EMC t lt si_S C CC CISPR 11 1990 EN 55011 1991 Group 1Class A IEC 801 2 1991 EN 50082 1 1992 4kV CD 8kV AD IEC 801 3 1984 EN 50082 1 1992 3 V m IEC 801 4 1988 EN 50082 1 1992 1kV 13 0in 14 5in 330 mm 367 mm l j 17 3 inches 440 mm Weight 28 6 Ibs 13 kg Figure 1 Input 100 kQ 2 Resistance approx 8 pF see figure 2 Rr 2
22. ory depth 258 048 vectors Number of output channels at 100 MHz to 200 MHz clock 16 Number of output channels at lt 100 MHz clock 32 Maximum number of IF Condition blocks at lt 50 M Hz clock 1 Maximum number of different macros 100 Maximum number of lines in a macro 1024 Maximum number of parameters in a macro 10 Maximum number of macro invocations 1 000 Maximum loop countina repeat loop 20 000 Maximum number of repeat loop invocations 1 000 Maximum number of Wait event patterns 4 Number of input lines to define a wait pattern 3 Maximum width of a label 32 bits Maximum number of labels 126 Lead Set Characteristics HP 10474A 8 channel probe lead set Provides most cost effective lead set for the HP 1660CP series clock and data pods Grabbers are not included HP 10347A 8 channel probe lead set Provides 50 Q coaxial lead set for unterminated signals required for HP 10465A ECL Data Pod unterminated Grabbers are not included Data Pod Characteristics HP 10461A TTL DATA POD Output type 10H125 with 100 Q series Maximum clock 200 M Hz Skew note 1 typical lt 2 ns worst case 4ns Recommended lead set HP 10474A ECL TTL oe Z ims HP 10462A 3 STATE TTL CM OS DATA POD Output type 74ACT11244 with 100 Q series 10H125 on non 3 state channel 7 note 2 3 state enable negative true 100 KQ to GND enabled on no connect Maximum clock 100 M Hz Sk
23. r License ror ame OpLUBY HP D0 Sees 70 Sige User oer BF ae P Opt UBK SUN Solaris and SUN 0S Single Option 908 Rack Mount Kit ____________ User license ee A Option UK9 Front Panel Cover HP 10391B Inverse Assembler Option W30 3 Year extended repair service Development Package Option W50 5 Year extended repair service 2 FRITTERS ESTES TT TTS SET TEST TTT TTT Option 011 TTL Clock Pod and Lead Set 1 ea 10460A 1 ea 10474A Option 012 3 state TTL 3 3V Data Pod and Lead Set 1 ea 10466A 1 ea 10474A Option 013 3 state TTL CM OS Data Pod and Lead Set 1 ea 10462A 1 ea 10474A Option 014 TTL Data Pod and Lead Set 1 ea 10461A 1 ea 10474A Option 021 ECL Clock Pod and Lead Set 1 ea 10463A 1 ea 10474A Option 022 ECL terminated Data Pod and Lead Set 1 ea 10464A 1 ea 10474A Option 023 ECL unterminated Data Pod and Lead Set 1 ea 10465A 1 ea 10347A Note For the pattern generator of HP 1660CP series please order atleast one clock pod and atleast one data pod for every eight 8 output channels from the above options or accessories listed on page 12 HP 1660C CS CP Series Upgrades HP E2460CS 12 Upgrade to add two channel 1 GSa s 250 M Hz BW oscilloscope to any of the HP 1660CS series oscilloscope upgrade does not apply to HP 1660A series HP E2495A 12 l Upgrade to add 32 channel 200M Vectors sec pattern generator this upgrade does not apply to the HP 1660CS series and HP 1664A HP E2427B Addkeyboard with DIN connector PC styl
24. r arming condition is met Arming condition is Run Group Run cross arming signal or PortIn BNC signal Edge Triggers on rising or falling edge from chan nel lor 2 Pattern Triggers on entering or exiting logical pattern specified across chan nels 1 or 2 Each chan nel can be specified as high H low L or don t care X with respect to the level settings in the edge trigger menu Patterns must be gt 1 75 ns in duration to be recognized Time Qualified Triggers on the exiting Pattern edge of a pattern which meets the user speci fied duration criterion Greater than less than or within range dura tion criterion can be used Duration range is 20 ns to 160 ns Recov ery time after valid pat terns with invalid dura tion is lt 12 ns Events Delay Triggers on the nth edge or pattern as specified by the user Time qualification is applied only to the 1st of n patterns Self triggers if no trig ger condition is found 50 ms after arming Time Markers Two markers x and o measure time intervals manually or automati cally with statistics Voltage Two markers a and b Markers measure voltage and voltage differences Automatic Period frequency Measurements rise time fall time width width peak to peak voltage over shoot and undershoot 7 Upper bandwidth reduces by 2 5 MHz for every degree C above 35 C 8 Rise time calculated as ty Ea andwi 9 Vertical gain accuracy decr
25. t 0 1 or X patterns in each label 10 Pattern Width HP 1660C CS CP 136 68 in channels I4 HP 1661C CS CP 102 51 Minimum Pattern and Range Recognizer Pulse Width Range Recognizers Range Recognizers Range Width Edge Glitch Recognizers Edge Glitch Recognizers HP 1662C CS CP 68 34 HP 1663C CS CP 34 17 HP 1664A 34 17 250 M Hz and 500 M Hz Timing Modes 13 ns channel to channel skew lt 125 MHz Timing M odes 1sample period 1ns channel to channel skew 0 01 Recognize data which is numerically between or on two specified pat terns ANDed combina tion of zeros and or ones 2 32 channels Trigger on glitch or edge on any channel Edge can be specified as rising falling or either 2 in timing mode only Edge Glitch HP 1660C CS CP 136 68 Width in HP 1661C CS CP 102 51 channels 41 HP 1662C CS CP 68 34 HP 1663C CS CP 34 17 HP 1664A 34 17 Edge Glitch Sample Period 2 8 ns Recovery Time 28 ns Sample Period gt 8 ns 20 ns sample period Greater than Duration timing only Less than Duration timing only Qualifier Sample period 2 8 ns 8 ns to 8 389 ms Accuracy is 2ns to 10 ns Sample period gt 8 ns 1 to 220 x sample period Accuracy is 2ns sample period 2ns 0 01 Sample period 2 8 ns 8 ns to 8 389 ms Accuracy is 2 ns to 10 ns Sample period gt 8 ns 1 to 220 x sample period Accuracyis 2ns sample period 2ns 0 01
26. tarting from center screen using the Print All selection Mass Storage Files and Softw are Updating the The operating system Operating resides in Flash ROM System and can be updated from the flexible disk drive or from the internal hard disk drive The HP 1664A boots from disk and requires only a disk change to update the operating system Mass Storage oro by an inter nal hard disk drive and by a 1 44 M byte 3 5 inch flexible disk drive Supports DOS and LIF formats 2 Screen Image An image file of any Files display screen can be stored to disk via the display s Print field Black amp white TIFF Grayscale TIFF PCX Encapsulated PostScript EPS and gray scale TIFF file for mats are available ASCII Data State or timing listings Files can be stored as ASCII files on a disk via the display s Print field These files are equiva lentin character width and line length to hard copy listings printed via the Print All selection Configuration Logic analyzer and and Data Files oscilloscope files that include configura tion and data informa tion if present are encoded in a binary format They can be stored to or loaded from the hard disk drive ora flexible disk I Recording of Binary format Acquisition configuration data files and Storage are stored with the Times time of acquisition and the time of storage for all models except the HP 1664A which does not have a real time clock
27. tate acquisition and the current Compare Image is equal or not equal Compare Reference Listing Mode display shows the Displays Compare Image and bit masks Difference Listing display highlights differences between the current state acquisition and the Compare Image Display State Listing State Modes Waveforms State Chart State Compare Listing Compare Difference Listing Timing Waveforms Timing Listing interleaved time correlated listing of two state analyzers time tags on and time corre lated State Listing with Timing Waveforms on the same display State X Y Plots value of a speci Chart Display fied label on y axis versus states or another label on x axis Both axes can be scaled M arkers Correlated to State Listing State Compare and State Waveform displays Available as pattern time or statis tics with time counting and states with state counting on Accumulate Chart display is not erased between suc cessive acquisitions State Displays state Waveform acquisitions Display in waveform format States div 1to 1000 states Delay 8191 to 8192 states Accumulate Waveform display is not erased between suc cessive acquisitions Overlay Multiple channels can Mode be displayed on one waveform display line Displayed 24 lines maximum on Waveforms one screen Up to 96 lines may be specified and scrolled through Timing Displays timing Waveform acquisition in wave Displ
28. ude control menu display naviga tion and alpha numer ic entry functions A DIN mouse is shipped as standard equipment It provides full instrument control Knob functionality is replicated by holding down the right button and moving the mouse left or right IH The logic analyzer can also be operated using a DIN keyboard Order the HP Logic Analyzer Keyboard Kit model number HP E2427B IH Input Output Control and Printing printer port RS 232 and HP IB as standard equipment 2 LAN Interface An Ethernet LAN inter face is available as option 015 The LAN interface comes with both Ethertwist and ThinLan connectors The LAN supports FTP and PC NFS connec tion protocols It also works with X11 win dows packages H2 Program Each instrument is fully mability programmable from a computer via HP IB and RS 232 connec tions This feature is standard on all models HP Printer Printers which use the Support HP Printer Control Language PCL and have a parallel Centronics RS 232 or HP IB interface are supported HP Deskj et Laser et Quiet et Paint et and Think et models Alternate The Epson FX80 LX80 rinter and M X80 printers with Supported an RS 232 or Centronics interface are Supported in the Epson 8 bit graphics mode Hard Copy Screen images can be Output printed in black and white from all menus using the Print field State or timing listings can be also be printed in full or part s
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