m mc145540 adpcm codec evaluation kit
Contents
1. two jumper configuration options CAO g10 91 o M ji N Pe af st M af gt J10ABCD MCU RESET o R 1 0 mum Figure 2 2 Jumper Positions for Switch EIA 232 Serial Compu MOTOROLA 2 6 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc 2 6 COMPUTER TERMINAL INTERFACE The serial computer terminal interface uses ground These signals are on circuits 2 3 i MC145407 and EIA 232 port for reconfigt computer terminal should be configured for 1 9600 bps bits per second or 9600 2 Full duplex 3 8 Bit data words 4 1 stop bit 5 Parity should be turned off 6 Linefeed automatic with return MC145537EVK 2 7 JUMPER DESCRIPTIONS The following table shows all on board jun Please reference the schematic for addition Jumper Functionality Ji If VDD is selected for 3 volts b 3 volt power supply input of F from the 5 volt supply J2 Sets VDD power supply of the power supply wire clamp conn for the logic level shifters and t J3 Connects the on board 20 48 I generate the 8 kHz FST bit clc allows these clocks to be deriv J4 Connects the on board 20 48 logic level shifter for driving the MC145540 This jumper allows oscillator to clock the SPC pin J5A B Connects the 8 kHz FSYNC or respectively of the MC145540 J6A B C J6A connects the on board 251 MC145540 for use as the inter pin as the input for an external be selected by programming2. 5V 3V LEVEL SHIFT MC145540 ADPCM CODEC 3V LEVEL Analog Interface This document contains information on a new product Specifications an MOTOROLA INC 1992 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc Motorola reserves the right to make chan herein to improve reliability function or des arising out of the application or use of any does it convey any license under its pater products are not authorized for use as con intended for surgical implant into the body agrees to notify Motorola of any such int determine availability and suitability of its Motorola and are registered trademarks Employment Opportunity Affirmative Action MC145537EVK TABLE OF Paragraph Number Tit SECT GENERAL DI 1 1 Organization Of Data Sheet 1 2 INtFOGUCTION cceceeeeeceeeeeeeseesereeeeeeseeeees 1 3 Feature Sh Ta n ea niaaa Ea iE SECT HARDWARE I 2 1 Power Supply Configurations 2 2 Clock Generation Circuitry 4 2 3 MC145540 ADPCM Codec 2 4 MC68HC705C8P cece 2 5 MC145407 and EIA232 Port Descript 2 6 Computer Terminal Interface Descrip 2 7 Jumper Descriptions eee 2 9 WANS CL sssi aiaa enbia SECT OPERATING CO 3 1 MC145537EVK Single Board Analog 3 2 MC145537EVK to MC145537EVK Fu 3 3 MC145537EVK to MC145536EVK Fu SECT MICROCONTROLLER SO 4 1 Computer Terminal Software Comma F
3. www freescale com Freescale Semiconductor Inc Literature Distribution Centers USA Motorola Literature Distribution P O Box 205 EUROPE Motorola Ltd European Literature Cent ASIA PACIFIC Motorola Semiconductors H K Ltd JAPAN Nippon Motorola Ltd 3 20 1 Minamiazabt az AA MOTOROLA HEE ME memory address lt memory data gt Men Access the memory location specified by n microcontroller operates in internal memor goes from 0 to HEX 1FFF If the address sp and a memory data field has been inclu location otherwise the memory location is r memory location after the access has been TG coefficient attenuation tone generator Program the tone generation function of the field with the coefficient and attenuation i debugging aide all SCP accesses required displayed on the screen e g TG 100 200 generator to a frequency of 697 hertz at an amplitude would be TG 6D5 200 1 Tr sequence of SC commands SC 7 REM Read BR7 SC 7 OR HEX 08 REM Logical OR REM Let BR7 H SC 7 08 REM Write HEX SC 4 D5 REM Write lowe SC 5 06 REM Write to tor REM write the m REM coefficient SC 7 REM Read BR 7 Is SC 7 lt HEX 80 REM Check that REM read BR4 SC 4 00 REM Write the le REM coefficient SC 5 42 REM Write to tor REM write the m REM coefficient SC 7 REM Read BR7 Is SC 7 lt HEX 80 REM Check that REM read BR4 lt SC 7 0A REM Turn on tor MA lt encoding mode
4. gt Encoding law comm If an encoding mode field is specified set th or A law encoding encoding mode 1 C used E2 256 kHz clock option External 256 kHz Set or reset the external 256 kHz clock or clock option parameter 1 to set the option MOTOROLA 4 2 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc IO lt I O mode gt Set or display the I O mode of the part rep This command allows easy access to the fi below summarises these modes Pleas information I O Mode 1 0 Figure 4 1 Input Output Modes of the M CD lt Charge pump option gt Set or reset the charge pump disable optior the operation of the charge pump CD 1 will ST lt Sidetone Gain gt Set or display the gain factor to be applied of the Codec section of the part to the sam Codec Numbers in the range of 0 to 7 aree XG lt Transmit Gain gt Set or display the gain factor to be applied transmit filter Numbers in the range of 0 to 7 AG lt Analog Receive Gain gt Set or display the gain factor to be applied receive filter of the Codec section of the expected DG lt Digital Receive Gain gt Set or display the gain factor to be appli processed by the decoder function in the HEX 7F are expected FW Frame sync pulse width The width of the sync pulse to be applied to switch DSW1 or by the on board microcor access to the input of the parallel loaded lt MC145537EVK
5. of the program all of the accessed byte register s fi SS register address lt scp data gt SCP acce Same as the SC command explained abov interface whether for read or write This is necessary to synchronize some test equip This successive read is terminated wt microcontroller reset switch S2 is depressec MC145537EVK MC145536EVK Board 2 mi 223 2388 Ea a g Figure 3 3 Recommended Configurati MOTOROLA 3 8 For More Information On This Product Go to www freescale com Oper The following table shows all on board jump connecting an MC145537EVK to an MC 145 Freescale Semiconductor Inc MC145537EVK Jumper Configuration Jumper Position Ji 3EXT J2 5V J3 CLK J4 SPC J5 FSYNC gt FSR FSYNCSFST J6 256 gt BCLKR BCLK gt BLKCR BCLK gt BCLKT J7 BCLK gt MCLK 256 gt MCLK J8 SPC gt P6 J9 DT gt DR J10 TOP ROW J11 MCU RES J12 VDD J13 VDDA J14 RO J15 AXO gt P5 AXO gt SP1 J16 BACK TO BACK J17 SPC CLK J18 SPC OFF P1 2048 MC145537EVK IN IN IN IN OUT IN OUT OUT OUT OUT MC145536EVK Jumper Configuration Jumper Position J1 OUT J2A OUT J2B IN J3A OUT J3B IN J4 OUT J5 OUT J6 OUT J7 IN J8 IN J9 OUT J10 OUT J11A IN J11B OUT J12A IN J12B OUT J13A IN J13B OUT J14A OUT J14B IN J15A IN J15B OUT J16 IN J17 IN J18 IN J19 IN J20 OUT P1 2048 S1 ALL SWITCHES OPEN CLO MOTOROLA 3 10 For More Information On This Product Go to
6. 145537EVK MC145540 Features cont M Low Noise High Gain Three 1 Interface Push Pull 300Q Power Drivers Interface Push Pull 300 Auxiliary Outp Voltage Regulated Charge Pur Voltage Applications Receive Side Noise Burst Dete Custom DSP Engine Optimize OTOROLA 1 4 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc 2 4 MC68HC705C8P The MC68HC705C8P is one of Motorola s Serial Peripheral Interface port SPI MC145537EVK utilizes the SPI port for inte SCP The asynchronous interface is used computer terminal interface The microco supports sixteen commands for prograr MC145540 ADPCM Codec The MC145537EVK is designed to acco currently supported by the resident software and D7 the push button switch S1 and th MC145540 reset pin the MCU reset pin SC MC145537EVK FSYNC Frame Synchronization Pulse Frame Sync FSYNC is the 8 kHz signa PCM words The ADPCM transcoding rate controlled by the width of the frame sync me pins respectively The FST and FSR signal ADPCM Codec to determine the sample analog conversions FSYNC is presented tc the MC145540 for FSR pin and FST pin res DSW 1 allows the user to select the widtt cycles The individual switches of DSW1 resistors that are connected to the inputs a The value of DSW1 is loaded into the shift BCLK signal The inputs of this shift r microcontroller using the FW Frame syn section 3 for the softwa
7. Freescale Semiconductor Inc SECT GENERAL DI 1 1 ORGANIZATION OF DATA SHEET This document is composed of 4 section MC145537EVK ADPCM Codec Evaluation board and a list of key features Section 2 functional block of the MC145537EVK and describes the stand alone hardware oper jumper positioning for this mode It also disc operation using two MC145537EVKs or on Section 4 describes the software interface fi commands available via the on board MC68 NO This User s Manual MC Evaluation Kit corresponds Circuit Board REVISION C XI 1 2 INTRODUCTION The MC145537EVK is the primary tool MC145540 ADPCM Codec The MC145537 hardware and software interface needed to modes of the MC145540 ADPCM Codec Figure 1 1 on the following page is a funct The MC145537EVK is comprised of the MC from 2 7 to 5 25 volts the 5 volt circuitry the MC68HC705C8P microcontroller and the level shifters which interface the ADPC microcontroller User I O to the board is provided via a numk analog interfaces for the device an industr provided to connect the included handset transmit analog input the BNC connector the wire clamp connector P5 for access speaker which is jumper selectable to be dri digital interfaces including the DB25 conne the computer terminal a 2x20 pin header F MC145537EVK MOTOROLA mg SEMICONDUCTOR mE TECHNICAL DATA Advance Information MC145540 ADPCM EVALUATION KIT PIEZO SPEAKER CLOCK GEN CIRCUr
8. Inc SECT OPERATING The following information describes the MC145537EVK may operate There are ma been described in this document that the yourself with the included schematic dia configuration that may prove beneficial for there are specific questions on a particular hesitate to contact your local Motorola Repre 3 1 MC145537EVK SINGLE BOARD AN The following table shows all on board jun digital loopback which accommodates analo Le9 seo i cago Age b MC145407 a ob e on e He g caga 3e peno 7 oE Jo n T gt MC74HC165N S mc74Hcu04 e SPC S MC74HC390N A e Q Q Cez Jumper Position a J1 3EXT ae Ti J2 5V I Ss bfa MC74HC393 al crs R J3 CLK GEN IN a i J4 SPC IN QO J5A FSYNC gt FSR IN 2 JBABRRBRE J5B FSYNC gt FST IN I N J6A 256k gt BCLKR OUT ag J6B BCLK gt BLKCR IN X a amp aS JEC BCLK gt BCLKT IN EE bB J7A BCLK gt MCLK OUT O23 J7B 256k gt MCLK OUT Ip E S 1 o J8 SPC gt P6 OUT of J9 DT gt DR IN o J10 TOP ROW 03 te A A 5 N o J11 MCU RES OUT J12 VDD O J13 VDDA OUT J14 RO J15A AXO gt P5 OUT J15B AXO gt SP1 IN ae J16 BACK TO BACK OUT Figure 3 1 Jumper Settings for Digital J17 SPC CLK IN J18 SPC OFF OUT P1 2048 MC145537EVK MOTOROLA 3 2 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc 3 3 MC145537EVK to MC145536EVK Fi The MC145536EVK and MC145537EVK e ba
9. LOCK GENERATION CIRCUITRY A 20 48 MHz crystal oscillator is used as From this 20 48 MHz crystal Frame Syn Processor Clock SPC are derived for use k MC145537EVK the controlling clocks and a 2x16 header signals The MC145537EVK is powered by the three at the top of the circuit board This evaluatic clock generator microcontroller and ElA23 be powered by this 5 volt supply as selecte 2 7 volts to 5 25 volts that is also applied at 5V PIEZO SPEAKER CLOCK CIR 5V 3V LEVEL SHIFT MC145540 Analo g ADPCM CODEC Interface Figure 1 1 MC145537EVK MOTOROLA 1 2 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc 1 3 FEATURES GENERAL Provides Stand Alone Evaluat The kit provides analog to anal 32 kbps ADPCM 24 kbps ADF Motorola proprietary 16 kbps ADPCM 24 kbps ADPCM CC proprietary 16 kbps ADPCM t 5 Volt Only Power Supply or Easily Interfaced to Test Equip MC145537EVK or MC 1455365 Duplex Operation Convenient Access to Key Sic Piezo Loud Speaker EIA232 Serial Computer Termi ADPCM Codec Features Compatible Handset Provided Schematics Data Sheets and MC145540 Features Single 2 7 to 5 25 Volt Power Typical 3 Volt Power Dissipatic Differential Analog Circuit Desi Complete Mu Law and A Law Conforms to CCITT and ANSI 32 24 and 16 kbps data rates Universal Programmable Dual Programmable Transmit Gain MC
10. O gt P5 OUT J13 VDDA OUT AXO gt SP1 IN J14 RO J16 BACK TO BACK OUT J15 AXO gt P5 OUT J17 SPC CLK IN AXO gt SP1 IN J18 SPC OFF OUT J16 BACK TO BACK OUT P1 2048 J17 SPC CLK IN J18 SPC OFF OUT P1 2048 MC145537EVK MOTOROLA 3 6 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc SE MICROCONTROLLER 4 1 COMPUTER TERMINAL SOFTWARE The following is a list of all commands curre their function In all cases an error in th message on the CRT Error unknow parameters specified is less than what the parameter s input will be displayed oi routine expects all numbers and coefficients HE Help command Print out the command menu RE lt logic state gt Reset command Force the reset line to the MC145540 to w state Recall that the reset line into the MC held in the reset state when the logic state reactivate cycle to occur this command mtu reset pin low RE 0 followed by a comma This is an alternative to the reset pushbuttor DR Display all SCP registers Read all 10 SCP registers plus silicon mas on the computer terminal display SC register address lt scp data gt SCP acce Execute an access to SCP register specifiec it is written to the register otherwise the ai the contents of the register after the access terminal display This command allows fu display the status of byte register 2 SC 2 SC 2 40 This command will also prograr PO AXO and AXO outputs to half
11. ck to back A 2x20 header connecter w length makes the necessary electrical con handset to handset path to be establish noise in the grounds between these board audio channel To eliminate this noise use the crystal on the MC145537EVK to one te This will synchronize the two crystals and not present when a 36 inch about one me 20 48 MHz oscillator is used for the SPC c must be operated at 5 volts for logic level cc Codec and the MC145532 ADPCM Transco MC145537EVK Board 1 NO Power and Ground are busse the MC145536EVK Do not c to the MC145536EVK 35650868 8 Figure 3 2 Recommended Cabling Oper MC145537EVK MOTOROLA 3 4 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc The following table shows all on board jun connecting one MC145537EVK to a sec Jumper Configuration for second clock rece operation Jumper Position Jumper Configuration for first clock generat J1 3EXT J2 5V Jumper Position J3 CLK IN J1 3EXT J4 SPC IN J2 5V J5 FSYNC gt FSR OUT J3 CLK IN FSYNC gt FST OUT J4 SPC IN J6 256 gt BCLKR OUT J5 FSYNC gt FSR IN BCLK gt BLKCR OUT FSYNC gt FST IN BCLK gt BCLKT OUT J6 256 gt BCLKR OUT J7 BCLK gt MCLK OUT BCLK gt BLKCR IN 256 gt MCLK OUT BCLK gt BCLKT IN J8 SPC gt P6 OUT J7 BCLK gt MCLK OUT J9 DT gt DR OUT 256 gt MCLK OUT J10 TOP ROW J8 SPC gt P6 OUT J9 DT gt DR OUT J11 MCU RES OUT J10 TOP ROW J12 VDD J13 VDDA OUT J11 MCU RES OUT J14 RO J12 VDD J15 AX
12. ed tc Connects the MC145540 pin V used only when the MC14554 pump must be disabled by pro zero bit 2 Connects either RO or PO as connecter P4 J15A connects the AXO signa connects the AXO signal to th This jumper is a control input t microcontroller that two MC14 the 32 pin header connecter P both MC145540 ADPCM Code one computer terminal This of microcontroller software The t software development Connects the level shifted 3 vc MC145540 SPC pin and to the be removed if the SPC pin is tc Connects the SPC pin of the M P9 This jumper must be remo I MC145537EVK 2 5 MC145407 and ElIA232 PORT DESCRI The MC145407 is a single 5 volt power su receivers in addition to an on chip voltage develops the drive voltages to satisfy the the level shifting and signal conditioning to produce an EIA 232 serial port which operat controlled by the microcontroller s crystal MC145540 configuration and control da MC145537EVK via a computer terminal An connector board side and the appropriat serial computer interface is the 3 wire mini data receive data and signal ground Only connected Upon turning on the board or p message should appear on the screen Motorola MC145537EVK Evaluation KI MC145540 gt Where X X represents the software revision If the computer terminal is configured correc the MCU reset switch is released then the t the DB 25 connecter may need to be excl This may be done by jumpers J10 A J10
13. er This allows the on board oscillat the SPC pin of the MC145540 to the P9 he drive the MC145540 If an off board clock is be removed from the board To use two MC145537EVK boards togethe and J18 are removed from the boards Thi MC145536EVK which has the MC145480 ADPCM Transcoder When two MC145537 ribbon cable that is about 2 inches about 5 used for both evaluation boards The jumpe 20 48 MHz clock may feed through to the o noise which may be eliminated by externall board to the other side of R3 of the other bo MC145537EVK 2 3 MC145540 ADPCM CODEC The MC145540 ADPCM Codec is a single and an ADPCM encoder decoder and th applications requiring the digitization and device is designed to operate over a wide v is ideal for battery powered as well as A ADPCM Codec also includes a serial co registers that permit a microcomputer to exe The ADPCM Codec is designed to m requirements of CCITT Recommendation G T1 303 and CCITT Recommendation G 7z 16 kbps ADPCM standard CCITT Recomm PCM conformance specification of the CCIT Please refer to the included data sheet f ADPCM Codec MOTOROLA 2 4 For More Information On This Product Go to www freescale com J10 J12 J14 J15A B J16 J17 Freescale Semiconductor Inc Invert TX and RX circuits to fr operation Forces the microcontroller into Connects the VEXT pin of the independent of the level shifte accommodates current measu should usually be connect
14. igure 1 1 LIST OF ILLL MC145537EVK Functional Bloch Figure 2 1 DSW1 Settings for Transcoding Figure 2 2 Jumper Positions for Switching 1 EIA 232 Serial Computer Termir Figure 3 1 Jumper Settings for Digital Loop Figure 3 2 Recommended Configuration fo Oprati Mnie Figure 3 3 Recommended Configuration fo CDCI AOI sateves eons eee ees Figure 4 1 Input Output Modes of the MC MOTOROLA ji For More Information On This Product Go to www freescale com Freescale Semiconductor Inc SECT HARDWAR Please refer to the MC145537 of the hardware 2 1 POWER SUPPLY CONFIGURATIONS The MC145537EVK is powered by the three at the top of the circuit board This evaluatic clock generator microcontroller and ElA23 be powered by this 5 volt supply as selecte 2 7 volts to 5 25 volts that is applied at the tr The MC145540 powers up from a hardwe charge pump running This allows the devic 2 7 volts to as high as 5 25 volts For 5 volt position This selects the 5 volt power sur VEXT pin of the MC145540 The charge pur For lower voltage applications i e 3 volt position and jumper J1 should be in 1 configuration connects the MC145540 VEX the third terminal of P7 so that the MC1455 voltage power supply Jumper J12 allows the MC145540 to be cor or the lower voltage supply VDD This j except to insert an ammeter for measuring tl Jumper J13 connects the MC145540 VD applications with the charge pump turned ofi 2 2 C
15. re command set N be in the open position and that the microc open to this node for the clock circuit to oper Figure 2 1 below indicates the proper dip s and 16 kbps long frame clocking and 32 k For 64 kbps operation switches 1 2 and 3 output of the shift register has only one ris load shift cycle Refer to the MC145540 Da 64kbps 32kbps 24k DSW1 DSW1 DS gt gt lel e a aE The position of this switch is Open Off Figure 2 1 DSW1 Settinc MOTOROLA 2 2 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc BCLK ADPCM PCM Data Bit Clock Bit Clock BCLK is the Clock that controls signal is presented to J6 B and J6 C for sel for bit clock receive BCLKR and for bit cloc P1 allows the user to select the frequency are 2 048 MHz 1 024 MHz 512 kHz 256 k note that only one frequency should be FSYNC signal is controlled by the BCLK cl always 8 kHz when either of the BCLK frequ 256kHz 256 kHz is presented to J6 A for conne sequencing clock for the codec filter and option for using BCLKR as the source for t be programed via the SCP port at byte regis SPC Signal Processing Clock SPC is a 20 48 MHz clock signal presente SPC 21 pin for use as its digital signal pri the SPC which are controlled by jumpers J1 should not be selected when J18 is selecte the evaluation board at the same time J1 drive the SPC pin of the MC145540 J8 sele P9 head
16. status of the DSW1 and if any of DSW 1 s not try to drive the shift register If the parar microcontroller will not try to program the open the clock circuit will generate an FSYN The microcontroller may be used to shorte the value of the FW parameter to other thar load that parameter into the shift register closed The value of Frame sync pulse wi HEX 80 to HEX FF or else the number 0 A kbps HEX FO puts the board into 32 kbps CO puts the board into 16 kbps HEX 80 put MOTOROLA 4 4 For More Information On This Product Go to www freescale com
17. th and J6C connect the on board J7A B Connects the on board 256 kH 40 pin header connecter P9 1 PCM Codec Filter on an MC 14 MCLK function is similar to the of the MC145540 J8 Connects a buffered on board pin header connecter P9 for o connected if Jumper J18 is cor SPC pins of P9 J9 Connects the ADPCM PCM c ADPCM PCM input DR pin operation MOTOROLA 2 8 For More Information On This Product Go to www freescale com Freescale Semiconductor Inc 3 2 MC145537EVK to MC145537EVK Ft The MC145537EVK evaluation boards were header connecter with a ribbon cable 36 inc makes the necessary electrical connections to handset path to be established The thre cable and therefore the MC145537EVK shot compatibility with maximum digital noise imn Codecs NO Power 5 volt and Grou MC145537EVK to the seco connect a second powe MC145537EVK MC145537EVK 2 8 HANDSET The compatible handset included with th W3 K EM80 reverse polarity The hand connector The handset incorporates a lon receiver equipped with a hearing aid coil anc TRANSMITTER Transmit Output Level 1000 Hz 46 dBV Output Impedance 100 Hz 1000 300Q RECEIVER Receive Output Level 1000 Hz 79 dBSP Receive Input Impedance 100 Hz 150 Q For more detailed characteristics of the W lt Equipment Corporation in North America at MOTOROLA 2 10 For More Information On This Product Go to www freescale com Freescale Semiconductor
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