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BitsyXb User`s Manual

1. Symbol Parameter Min Typ Max Units Vdd Supply voltage Vddx V A D sample resolution 12 bit Power Supply Absolute Maximum Ratings Supply Voltage DCIN_POS oooconcocccccococconononncnncnnnnos 18 V Symbol Parameter Min Typ Max Units System Power VBATT_POS BitsyXb supply voltage Note 15 5 12 15 V Diode drop from DCIN_POS to vain VBATT_POS at 130 mA a OM y VDDI Processor core voltage 6 3 9 0 85 1 0 1 3 V Run 3 1 3 3 3 5 V VDDX 3 3 V onboard supply Sleep 315 V VCC 5 0 V onboard supply 4 75 5 0 5 25 V 5 V available for display Run Vcc PCMCIA USB J9 15 ____ 500 mA J10 48 etc Note 16 Sleep 3 3 V available for I Vddx display PCMCIA J9 23 PUn in mA J10 47 etc Note 17 Sleep 100 mA RTC Backup Power 4 2 V BATPOS real time clock battery backup 2 2 3 0 3 6 V I BATPOS RTC current note 18 300 500 nA Battery Trickle Charger section 5 3 7 Rch Charger series resistance 37 5 o Pch Charge resistor power rating 0 25 W Notes 15 The system can operate down to the minimum voltage shown but the DC_GOOD signal may cause the system to go to sleep when running at that voltage See Power Failure Interrupt in section 5 3 3 for details The power failure feature can be overridden 16 LTC 1771 Burst mode used when the BitsyXb is in Sleep mode is more efficient at low currents However it is electrically noisier and can cause significantly greater EMI RFI at
2. Series ESD signals Source Resistance prot Header Usage Notes 5 PXA270 1kQ Y J3 EIO5 9 5 PXA270 1kQ Y J10 EIO0 4 5 ADSmartIO 1kQ Y J10 PC0 4 or ROWO 4 5 ADSmartIO 1kQ Y J10 PA0 3 or COLO 3 Analog Inputs The BitsyXb uses the ADSmartIO controller to perform analog to digital A D conversions These A D inputs are typically used for low speed uncalibrated applications e g user input ballpark voltage measurement etc as the noise margins on the BitsyXb A Ds are not suited for most instrumentation applications For precision A D readings consider taking averages of several readings performing two point calibrations or using an external A D converter e g over SSP The following table summarizes the A D inputs available on the BitsyXb The Ref column indicates reference sections for their use Range lines Rin Source Header Ref Details 0 25V upto4 100MO ADSmartlO J3 o PA0 3 0 2 5 V 1 100MO ADSmartIO J3 o Thermistor PA4 Analog Outputs PWM The BitsyXb has two filtered pulse width modulated outputs that serve as analog control outputs These are used to control LCD backlighting and contrast sections 4 6 6 and 4 6 7 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Featu re Refe rence 4 8 EMI RFI and ESD Protection The BitsyXb board incorporates a number of industry leading features that protect 1t from electrostatic dis
3. ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Feature Reference GP Signal Name Type Function connector section 14 tp 15 aida O SDRAM chip select 16 17 CPU Ready 18 CPLD O Interrupt 19 20 21 22 IRO TP I 23 SCLK C 24 SFRM C 25 TXD C PRK 26 RXD C 27 USB_RECON N 28 BITCLK 29 AUDIO_IN 30 AUDIO_OUT 31 AUDIO_SYNC AC 97 Codec 32 MMCLK O 33 n c 34 RXDI I 35 CTS1 I 36 DCDI I x Serial I J10 4 5 1 39 TXD1 O 40 DTRI O 4 TRS1 O 42 RXDI I ae 2 Serial 3 J3 4 5 1 45 RTS3 O nn 5 Serial 2 J3 4 5 1 48 POE 49 PWE 50 PIOR 51 PIOW a2 aM PCMCIA CF Card interface 53 n c 54 PCE2 55 PREG 56 PWAIT 57 IOIS 16 ADS document 110118 00013 preliminary Page 21 BitsyXb User s Manual Applieddata net Embedded Computer Systems GP Signal Name Type Function connector section 58 LDDO O 59 LDDI O 60 LDD2 O 61 LDD3 O 62 LDD4 O 63 LDD5 O 64 LDD6 O 65 LDD7 O 66 LDD8 O 67 LDD9 O o Em o LCD display J1 70 LDD12 O 71 LDD13 O 72 LDD14 O 73 LDDI15 O L_FCLK VSY 74 NC O L_LCLK HSY 73 NC O 76 L_PCLK O 7
4. Applieddata net Embedded Computer Systems BitsyXb User s Manual ADS document 110118 00013 preliminary Applied Data Systems www applieddata net 10260 Old Columbia Road Columbia MD 21046 USA 301 490 4007 O 2005 ADS Applieddata net Embedded Computer Systems About the Cover Image The cover image shows a Rev 4 BitsyXb Printing this Manual BitsyXb User s Manual This manual has been designed for printing on both sides of an 8 5x11 inch paper but can be printed single sided as well It has also been optimized for use in electronic form with active cross reference links for guick access to information Revision History REV DESCRIPTION BY 2 First preliminary release 10 25 05 ak Second preliminary release 1 Sections remaining for update are marked tbd PHD AE ADS document 110118 00013 preliminary Pagei Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page ii ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems BitsyXb User s Manual Table of Contents Aboutthe Coverlmap euni iei title dd dud Fn Id Y dude HF ddydd a i Printing this Manual ae i REVISION History aeu i ed i GG GG GG nu i Table of Contents minita iia 111 Introduccion ta A ee nei et eaten 1 TIL OYE Wense italia 1 15 2 PESAS siii 1 2 1 Processor i o See tis Hi ok Y ea de YY Fd 1 12 2 BO
5. o onncnnnnnnnnnnnninncnonnconnnonoconononcnnncnn nono nonncnnnonnncnnccnnoo 35 4 6 7 Contrast Control Vee and VOM ccoooooccnnononcnononnnonononnnonononcnnononncnnnnnnnnnonnnnnnnnnrncnanonnos 35 4 6 8 Touch Panell nie coria lidera is 35 47 DiscretelOS citada arde 36 aele Digital A RF SC I WY YN GRYF 36 A2 Analog pus cuidece chota nd eel i enteu eh dey in A 36 AS Analog Outputs PWM AA i WG A rasa 36 4 8 EMI RFI and ESD ProtectiOtlei eiii diciendole italian ynad 37 45 1 _ Agency Certifications i i uu Y ie id 37 4 8 2 Protecting the Power Supply Inputs oonconncnnnnnnnnnonnnonoconnconononcnnnona cono nonn cnn nonnncanccinos 37 2 Power and Power Management nei nonien doded e 39 5 1 Determining the Features You Need srooot erse n saa ET iieii 39 2 2 Power Management Mode evitas 40 5 2 1 XScale Power Management Modes escceesceessceeeseeeeseeescecseeseaeecseeseaeeesneeeeaeers 40 5 2 2 Power Management on the BitsyXD oo cece cesececeseeeeeeeaeeeaecesecnseeseeeseeeeenaees 40 5 3 Architectural Overview and Power Management Features oooonccnncnnoninocononnonnconnnononanonanonnss 41 5 3 1 Power Supply Architecture iii a ta FYNN 41 5 3 2 SUbsystem Partio id ai ds ta 41 5 3 3 System AA 43 Power Failure Interrupt RQOnOff Input Software Control IIA System Wakeup A i WI e A O NI I NR HU 44 ROOnoff Input Touch Panel Timed Wakeup ADSmartlO Keypad 5 3 5 SUpercapaeltOtSrmn nu Sok vests Gudd AL Ja oe Eog d
6. 5 2 2 Page 40 Applieddata net BitsyXb User s Manual Embedded Computer Systems 5 2 Power Management Modes Handheld and portable systems available today never really turn off They make use of power management algorithms that cycle the electronics into standby and sleep modes but never fully remove power from the full system This section describes the various power management modes of the XScale processor and how the BitsyXb makes use of them XScale Power Management Modes The XScale PXA270 processor supports four operational modes Turbo Run Idle and Sleep e Sleep mode uses the least amount of electrical power The processor core is powered off and only a few processor peripherals RTC 1 Os and interrupt control remain active The transition back to Run mode may take a few hundred milliseconds as clocks must stabilize and hardware that was powered off must be reinitialized e Idle mode reduces power consumption by pausing the processor core clock Processor peripherals remain enabled This mode is used for brief periods of inactivity and offers a quick transition back to Run mode e Run mode is the standard mode used when applications are running It offers the best MIPS mW performance vs power performance when running applications from RAM e Turbo mode runs the processor core at up to three times the Run mode speed Since external memory fetches are still performed at the memory bus freguency Turbo mode is
7. 44 External Power Input DEINE OS 48 se also on J6 Request On Off Switch Input 45 ROONOFF I 5 3 3 6 3 1 46 47 GND P ground 49 BATPOS 50 PI Real time clock backup battery 4 2 6 3 4 3 3 4 J6 Input Power Board Connector Molex 22 23 2021 Recommended mating connector Molex 22 01 3027 These power inputs are also connected to J3 See Chapter 5 and section 6 3 3 for input power specifications Pin Name Type Description 1 DCIN_POS PI DC Power Input 2 GND P Ground 3 3 5 J7 XScale I O Signals Board Connector 2x8 2mm spacing Samtec STMM 108 02 G D SM Recommended Board to Cable Connector TCSD series Recommended Board to Board Connector ESQT series e g ESQT 108 02 F D 450 8 This header supplies signals from the XScale that were not available on the StrongARM These include PC and MMC interfaces as well as a number of processor pins that may be used as general purpose I Os GPIOs or for alternate special purpose functions Pin Name Type Description 1 I2C_SCA IO 2 I2C_SCL IO PO GND Z Ground 5 MMCCSO O Chip select 0 6 MMCCS1 O Chip select 1 7 MMCMD O Command Multimedia Card MMC 8 MMCDATO IO Card 0 data Controller 4 5 5 9 MMCCLK O Clock 10 MMCCD I Card Detect 11 VDDX P 33V 12 VCC P 5V 8 Note that the STMM header is 0 050 inch higher than the other 2mm headers on the board because it is a surface mount part Use a correspondingly shorter
8. Analog Inputs A D cai Y A Y CENID REID aia lancia 24 4 9 5 Temperature IET 24 ABO A A NT 24 4 3 7 ADSmartlO Signal Cross Reference ooooocccnonoconoccnonnconnncnnnnconcncnnnncononcnnnncononcnnnncnnnnns 26 44 AM lO ctas 21 4 4 1 Microphone Preamps emeren E n e E aa 27 4 4 2 Audio Outputs Speakers and HeadphonesS ooconnoninnnonnnonononononcnnncnnnonnnonncnnnonnncnnccinos 27 Connecting Speakers Connecting Headphones Using Stereo Headphones and Speakers in the Same System 45 Buses and Data Communications sssseseseseseeeeeeesessessstssrtsstesstssesstestesstrrsessessreserssresset 29 4 5 1 Serial Ports ocio SE ti E Meh YU E 29 45 2 t USB A N A ee A at Y A AE ee Yn 30 USB Host USB Function Client 4 5 2 Synchronous Serial Ports ne eie A FWD Fn 31 Overview of Synchronous Serial Ports SSP on the PXA270 SSP on the BitsyXb 454 GC Bus Master GG NR A 33 PC on the BitsyXb 4 5 5 Multimedia Card MMC Controller ooooocnnnononnnonocnnononcnonononnncnononononononcnnnnonncnnnnnnss 33 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems BitsyXb User s Manual 4i0 lt Displays e au GG A GG GG A GG 34 4 6 1 Display Types Supported cirio a 34 4 6 2 BCD Volta ges uri 34 4 6 3 gt Display Sinaloa eee AA sh a RR RY dee 34 4 6 4 Creating Display Cables ics eu ue ete de Te italia 34 4 63 Developing Display DIV cerco uyn dydy Fd des nee aero divers 34 4 6 6 Brightness Control Backlight
9. Electrical Specifications mtrs tt 53 6 2 1 Temperature Reset Sleep Wakeup cooooonnnnnnnnocnnonnnonononcnanonnncnnnonnconnnnnnonnnonnncanccinoo 53 6 2 2 LED DIS play one iennet a S k E anidar ciones 54 6 2 3 Touch Panel Controller occitano GRY Gin GWE DS CY Fd 55 6 2 4 E O 55 6 2 5 AN inii iin enie n rE GRY Fe inn GWY THY E 56 6 2 6 ADSmartlO Controller noresite reiini s e er aaie E E E s 57 6 27 System Controller siirros nisen S Y WR AF ER AE E EA 58 CompactFlash Port Used as Expansion Bus 0 2 8 A 59 6 2 9 PXA2ZTO Processor niara a e dodd Sy a e t e YNO 60 6 2 10 Crystal Frequenci s it ta Y ds dd a 61 Board Revision History cidcid ii dani 63 Tl Identifying the board TeViSION tenia dd reece teste tb dee eee nee 63 Tdi Revision HIStOLY verb duo yu A Ae es 63 7 2 1 Re LTD ILYN LYDD GWYFYN DN DI A 63 New Features Changes ADS document 110118 00013 preliminary Applieddat Embedded Computer Systems a net 1 Introduction 1 1 1 2 1 2 1 1 2 2 1 2 3 Overview The BitsyXb is a full featured single board computer using the PXA270 XScale RISC microprocessor The BitsyXb is designed to meet the needs of embedded and graphical systems developers This manual applies to latest revision of the BitsyXb as listed in the revision history section 7 2 Features Processor e PXA270 32 bit XScale processor e Clock rates from 104 to 520 MHz e Battery backed real time clock Power Supply e 6 1
10. 3 3 3 J3 Power I O Serial 2 amp 3 USB Touch Screen and others 12 ADS document 110118 00013 preliminary Page iii BitsyXb User s Manual Page iv Applieddata net Embedded Computer Systems 334 JO Input PO We ts dei gc eden Yd yy Cane 13 3 30 M XocaleJ O Signals sin ni Y O RG GY GY GTA Le 13 3 3 0 J8H Vee Adapti aenn ii YD Fd yd Yy GT thee evr 14 3 3 7 J9 External CompactFlash Expansion BUS oooonnccnocnnonconnconnnoncnoncnononononnncnnccnnccnnonns 14 3 3 8 gt JUL SUpercapacitor Input vet a 17 3 3 9 J10 ADSmartlO USB Serial 1 Stereo Audio I Os eeeue i ih 16 3 3 10 J16 In System Programming ccooccocononononcnnnconnnnncnnnonononnnnnnncon ocn onno nono nnncnn conan cn ccnncnns 17 Feature Referencias 19 4 1 System Architectures sacs 4 sees ii da ias 19 All BOO Code uu GG Y RA Y hs cara te ide tie Bese ceed 19 4 12 Synchronous DRAM ten ei syn sete de Tw a tia 19 41 3 Non Volatile Memory iniciando 19 Flash Memory ADSmartlO EEPROM CompactFlash and PCMCIA ATA Cards RTC NVRAM A TN 20 4 15 CompactFlash Expansion BUS ooonccnnncnocnconononcnonconncononononononnnonn nono conan on n cnn ncnnncnnccnnoo 20 4 1 6 PXA270 GPIO Cross Reference oococoncocoonnconnnconccinnnnnonencnnnnconnnconanconnncnn E 20 4 2 _Real Time ClockKRTO c eiU y o 23 4 3 ADSmartlO tits yen ea yy iets GYG 23 4 3 1 OVINA A Matas SiN Na 23 4 3 2 ADSmartlO Features mossos odie 24 433 Digital VOS cios ta dada 24 434
11. DSR and RI are controlled by the PXA270 GPIO lines See section 4 1 6 for details ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Hardware Reference Pin Name Pin Type Description 35 EXT IRO3 I External Interrupt 3 Input 37 VDDX PO 3 3 V MIC_GND P Microphone ground MIC_L 42 AI R MIC R 14 AT Stereo Microphone Input 43 VREF AO ADSmartIO A D reference voltage 45 RESET_IN I External Reset Input 6 3 1 47 VDDX PO 3 3 V 46 VCC PO sv 49 I2C_SDA IO PC7 PC data GND 50 P ground 3 3 9 3 3 10 J11 Supercapacitor Input Board Connector B 2B ZR SM3 TF This header provides a connection point for external supercapacitors See section 5 3 5 for further details Pin Name Type Description 1 SUPCAP PI positive connection 2 SUPCAP PI negative connection J16 In System Programming Board Connector 2x8 2mm spacing Samtec STMM 108 02 G D SM tbd This header is used during manufacturing for programming and test but is not otherwise supported for application use Production customers may use this header to reprogram boot code Pin Name Type Description 1 TRST I 2 TMS I 3 GND P 4 TDI I 5 TCLK I 6 VDDX PO JEAG 7 GND P 8 TDO O 9 FWE O 10 FRDY O 11 MISO O 12 VCC PO ae h ATMega ADSmartIO 15 PRG I 16 GND P ADS document
12. Stereo Audio I Os Board Connector Samtec STMM 125 02 T D Recommended Mating Connector Samtec TCSD Series Recommended Board to Board Connector ESOT series e g ESOT 125 02 F D 500 Pin Name Pin Type Description 1 EXT IROI I External Interrupt 1 Input 3 EXT_IRQ2 I External Interrupt 2 Input 5 EIO4 IO EIO3 2 IO EIO2 4 IO PXA270 Digital I Os 4 7 1 6 3 9 EIO1 6 IO EIOO 8 IO A sons gt External PS 2 keyboard inputs USB_PWR_ 10 I Sense Input from external USB SENSE host power switch 4 5 2 USB_PWR_ 12 o Discrete output to control external CTRL USB host power switch 4 5 2 USB_UDC 14 IO USB_UDC 16 IO USB Host 4 5 2 11 I2C_SCL IO PC6 PC clock 13 SMTIOI IO PDI Thermistor energize 4 3 5 15 SMTIOO IO PDO Passive panel enable PNL_ENA RPS ac Stereo Speaker left channel 4 4 2 ORR Ac Stereo Speaker right channel 4 4 2 17 ROWO IO PCO 19 ROWI IO PCI 21 ROW2 IO PC2 23 ROW3 IO PC3 on ca ABSnan 27 COLO IO PAO 29 COLI IO PAI 3 COL2 IO PA2 33 COL3 IO PA3 RII 26 I DCDI 28 I DSRI 30 I Serial 1 DTRI 32 O EIA 232 with 3 3 V logic level volume RXDI 34 I production option TXDI 36 O 4 5 1 CTS 38 I RTSI 40 O PC6 and PC7 are used for the 2C bus master interface See section 4 5 4 for details 10 Serial 1 signals RTS CTS DCD DTR
13. 1 2 kQ Notes 7 JP2 selects the display voltage 8 Total power available depends on system power budget 9 Systems are configured at the factory with buffers for 3 3 or 5 V panel data R148 selects 5 V power for the buffers while R137 selects 3 3 V power 5 V displays with Vih lt 0 6 Vpnl_pwr 3 0 V will work reliably with 3 3 V data 10 PNL_RL is pulled up with R193 or pulled down with R207 11 PNL_UD is pulled up with R191 or pulled down with R192 12 Vcon is the low voltage PWM signal used to control Vee It can be used directly with some passive displays to control contrast 13 BacklightOn is an open collector output Most backlight inverters include pull up resistors on their on off inputs The maximum voltage shown is the rating of the BitsyXb output transistor 14 The backlight on off and PWM outputs are driven by the ADSmartlO controller ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Syste m Specificatio ns 6 3 3 6 3 4 Touch Panel Controller The BitsyXb uses touch panel controllers from Burr Brown It uses the ADS7846 to support four wire analog resistive touch panels and the ADS7845 to support five wire panels The system is factory configured for use with four wire panels All touch panel signals are ESD and RF protected The touch panel controller is powered during sleep mode and can generate an interrupt to wake the system
14. GND f P ground 8 VCC 10 PO 5 V 5 TEMP_SENSOR AI l _MINUS External Temperature Probe Connection TEMP_SENSOR 4 3 5 Z _PLUS FE Md 9 IRDAON O External IRDA control output 11 TSPX AIO right UL 13 TSMY AIO top LR Touch screen 15 TSMX AIO left LL 6 3 3 17 TSPY AIO bottom UR He Io PXA270 Digital I Os 4 7 1 6 3 9 BACKLIGHT 16 AO Backlight Intensity PWM PWM 4 6 6 6 3 2 BACKLIGHT 18 oc Backlight On Off ON open collector 4 6 6 6 3 2 19 RXD2T I Serial 2 TXD2T 20 O 3 3 V logic level 4 5 1 21 WIPER AI Touch screen wiper optional 5 wire touch CHARGE 22 O Charge Enable output PBO 7 5 3 7 23 GND P ground PE2 24 O Power Enable 2 for external devices 5 3 2 25 CTS3 I TXD3 26 O Serial 3 27 RTS3 O EIA 232 4 5 1 RXD3 28 I 22 a 30 I USB Client 4 5 2 31 GND P Ground HP_IN 32 I Headphone connected 4 4 2 6 3 8 33 USB_RECONN 0 USB Client power management 4 5 2 GND 34 P connects to ground through R281 0Q GND 36 P ground 35 STXD O MOSI ae 5 ON SPI signals 4 5 3 43 SFRM2 O SS 7 This output does not have any series resistance or ESD protection ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Hardware Reference Pin Name Pin Type Description VBATT_POS 38 PI External Battery Input VBATT_NEG 40 P 5 3 7 4 POWERENABLE O Power Supply Control Output 5 3 2 PEl 42 O Power Enable 1 for external devices 5 3 2
15. PC7 _ oe SCL T as 11 I2C SCL SDA 49 12C_SDA z1 Xan The BitsyXb XScale I C signals are available on connectors J7 and J10 Electrical specifications are listed in section 6 3 9 The ADSmartIO can emulate an IC bus master using PC6 as SCL and PC7 as SDA and can be connected to the C bus for backward compatibility with older Bitsy family products Standard BitsyXb systems do not connect the ADSmartIO controller to the I C bus 4 5 5 Multimedia Card MMC Controller The XScale MMC controller provides a serial interface to MMC cards The controller supports up to two cards in either MMC or SPI modes with serial data transfers up to 20 Mbps The MMC controller has FIFOs that support Direct Memory Access DMA to and from memory This interface can also be used to access Secure Digital SD Memory Cards and Secure Digital T O SDIO cards See Intel Application Note 278533 for details and pitfalls Signals for the MMC Controller are brought out to header J7 See the XScale Developer s Manual for details about how to use the MMC interface Drivers for MMC may not be available for all operating systems Contact ADS for driver availability for the operating system you are using ADS document 110118 00013 preliminary Page 33 Applieddata net BitsyXb User s Manual Embedded Computer Systems 4 6 4 6 1 4 6 2 4 6 3 4 6 4 4 6 5 Page 34 Displays The BitsyXb uses the integrated XScale displa
16. V HP_IN threshold voltage 4 V Notes 31 The output sample rate is fixed but the input sample rate can be set to 8 11 025 22 05 or 44 1 kHz 6 3 9 Page 60 32 Pre amp anti aliasing filter rolls off at 3dB octave first order filter 33 Typical values are guaranteed to National Semiconductor s AOQL Average Outgoing Quality Level Operating above typical values for a sustained period of time may result in thermal shutdown of the amplifier PXA270 Processor The XScale PXA270 core can change system voltage Vddi 6 3 4 dynamically to achieve lower power consumption at high clock rates It uses voltage Vddx to power its interface I Os The EIOn digital I Os include series resistance and ESD protection Serial ports configured for 3 3 V logic level operation run directly to the processor section 4 5 1 These lines should be treated as digital I Os and protected for over current and over voltage accordingly PXA270 synchronous serial port 3 SSP3 is available for application use on header J3 Treat the signals as digital I Os The SSP3 signals connect directly to the CPU and do not include any series resistance or ESD protection Absolute Maximum Ratings Input voltage digital I O pinS oooooccconocccnnnccccnnss 3 6 V Symbol Parameter Min Typ Max Units Digital Outputs Vol 0 Vax Voh 1 0 Vadx lo 2 2 mA Digital Inputs Vil 0 2 Vadx Vih 0 8 Vadx ElOn Digital I Os J3 3 3 3
17. best used when running the application entirely from cache Power Management on the BitsyXb The BitsyXb can actively be configured to be in XScale Run or Sleep modes Turbo and Idle modes are controlled by the operating system and are typically transparent to the application In Turbo Run and Idle modes the power supplies are in their standard full power state and applications run normally on the system Specific subsystems as described in section 5 3 2 may be selectively disabled to conserve power during these states The operating system is responsible for adjusting the core voltage Vddi for optimal power consumption in each mode In Sleep mode sometimes called Suspend mode the processor puts the SDRAM in a low power self refresh mode the processor core shuts off most peripheral sub systems are shut down and the power supplies drop into low power states or turn off entirely see the diagram in section 5 3 2 for details In this state the BitsyXb consumes very little power most of which is dedicated to the maintenance of the RAM see section 6 3 5 for specifications The system can be awakened and returned to the Run state by initiating a system wakeup using one of the methods described in section 5 3 3 If Main Power DC_IN or VBATT_POS drops below the power supply trip point section 6 3 2 the BitsyXb automatically goes in Sleep mode The transition time from Run mode to Sleep mode is a function of the operating system S
18. headphone jacks include mechanical switches that indicate when a headphone plug has been inserted The diagram at right shows a circuit that pulls down the HP_IN signal when a headphone plug is removed For this circuit to work reliably in differential mode the HP_IN signal must remain below Vyp ju through the largest output voltage swings of SPKR_L Use of 1 KQ resistors meets this reguirement Buses and Data Communications The BitsyXb has several built in channels for communication with peripheral and peer devices These include EIA 232 and logic level serial USB host and client ports SPI bus and I C Serial Ports The BitsyXb has three XScale serial ports configured as follows Port signals Connector Standard Production options Serial 1 9 wire J10 EIA 232 9 wire 3 3 V logic level Serial 2 3 wire J3 3 3 V logic level Serial 3 5 wire J3 EIA 232 3 3 V logic level The XScale standard serial ports Serial 2 and 3 supply two or four signals Serial 2 uses TX and RX three wire serial counting GND while Serial 3 adds RTS and CTS Serial 1 uses the XScale full featured serial port which adds four more signals DTR DSR DCD and RI to supply the full complement of modem control signals The XScale can configure Serial 2 as an IrDA port IrDA should be used in conjunction with the IrDAOn signal 33 which enables the IrDA transmitter IrDA transceivers can be panel mounted or placed on a pers
19. higher current draws 17 During Sleep mode Vddx is powered by a linear regulator which draws from the 5V supply 18 Vddx 0V Vbatpos 3 2 V source DS1307 data sheet ADS document 110118 00013 preliminary Page 55 Applieddata net BitsyXb User s Manual Embedded Computer Systems 6 3 5 Page 56 Power Consumption The following table lists typical power consumption for the BitsyXb with varying input voltage and activity levels Run mode efficiency of the power supply decreases slightly with higher input voltage Power consumption varies based on peripheral connections components populated on the system and the LCD panel connected Input voltage temperature and the level of processor activity affect power consumption to a lesser extent The measurements are accurate to 5 10 LCD displays and backlights add significantly to the total power consumption of a system ADS Development systems include the Sharp LO64D343 5V TFT VGA display which draws about one watt and the Taiyo Yuden LS520 backlight inverter which draws about six watts at full intensity VBATT_POS Test Condition 6 5 V 9v 12V 15 V Sleep mode 5 33 4 36 3 36 3 45 CPU idle note 19 85 550 66 590 52 620 44 660 Run mode max note 20 260 1690 190 1710 175 2100 140 2100 Units mA mW mA mW mA mW mA mW Notes Power consumption was measured on fully populated 64 MiB rev 3 BitsyXb system with no peripheral con
20. lvref Current drain from ref voltage 100 uA Vin valid A D input voltage range 0 Vref V Vref J10 43 100 uA Temperature Sensing 4 3 5 Rth external thermistor resistance 25C 33 kQ Vt thermistor excitation voltage Vref V Ril lower voltage divider 47 kQ 12C Bus 4 5 4 note 26 Bus clock 50 kHz input buffer size 32 byte packet size 32 byte Vi o 1 O voltages see digital l Os above V Rbus 4 7 kQ Vbus pull up on SDA SCK 33 V Notes 21 Row and column I Os have series resistance and overvoltage protection to ground The series resistance limits the dc current that any one pin can source or sink 22 SMTIOO 3 are directly connected to I O controller without external protection 23 Control pull up resistors by writing to bits of IO port when the port is configured as a digital input bit mask 1 enable O disable 24 Digital noise on the board may degrade analog performance under some conditions 25 Vref turns off when the system is in Sleep mode section 5 3 2 26 Specifications based on ADSmartlO release 1010 rev 2 ADS release 7001 14 10102 ADS document 110118 00013 preliminary Page 57 BitsyXb User s Manual Applieddata net Embedded Computer Systems 6 3 7 Page 58 System Controller A Xilinx XC3128 CPLD on the BitsyXb manages the RgOnOff CONN_PE1 PE2 5 3 2 and other system control signals It is programmed at the factory using the JTAG interface 3 3 9 The system controller CPLD also manag
21. predetermined time This feature is controlled by software ADSmartlO Keypad The ADSmartlO controller controls the wakeup signal to the XScale For production applications ADS can configure the ADSmartlO to wake up the system on specific events e g the BitsyXb adds a volume production option to wake upon keypad activity Contact ADS Sales if your application reguires a special wakeup event ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Power and Power Management 5 3 5 Supercapacitors Supercapacitors sometimes known as ultracapacitors are energy storage devices that combine the guick charge discharge characteristics of capacitors with the higher energy density of batteries Supercaps as they are called are useful for maintaining power when changing batteries or for riding out power failures The BitsyXb supports connection of external supercaps via header J11 Charging There are two important factors related to the charging phase of the capacitors The first is how long it takes to fully charge the capacitors The second is the added load on the power supply it takes to charge the capacitors Both are important to effectively use the supercaps Charge time for capacitive circuits is typically measured in time constants the product of the charging resistance R and the capacitance C It takes three time constants 3RC to charge fully discharged supercaps to 95 of their target
22. right to left RL or up and down UD by changing the voltage on these signals See section 6 3 2 for full specifications Creating Display Cables ADS has designed cables for a wide variety of displays See the list of supported displays on the ADS support forums Cable drawings for supported displays are available on reguest While ADS does not provide support to customers to create their own cables designers with LCD display experience may be able to design their own For those that do so a key point to keep in mind is that the PXA270 LCD interface maps its display controller pins differently based on LCD technology and color palette size Consult the PXA270 User s Manual for more information Developing Display Drivers The XScale has a bank of registers that define the timing for displays In addition the operating system must define the region of memory for the frame buffer s 13 Currently posted at http www applieddata net forums topic asp topic_id 580 4 Intel PXA27x Processor Family Developer s Manual Order number 280000 001 April 2004 pp 7 49 to 7 53 15 Double pixel data DPD mode 1 ADS document 110118 00013 preliminary Appliedda Embedded Computer Systems Featu re Refe rence 4 6 6 4 6 7 4 6 8 ta net ADS provides display timings for supported displays on request For displays not yet supported ADS has a panel configuration service to create panel timings and cable drawings Contact AD
23. socket on mating boards ADS document 110118 00013 preliminary Page 13 Applieddata net Embedded Computer Systems BitsyXb User s Manual Pin Name Type Description 13 MMCWP Write protect 14 MMC_IRO Interrupt Multimedia Card 15 MMCPWREN Power enable MMC Controller 4 5 5 16 MMCDATI IO Card 1 data 3 3 6 J8 Vee Adapter Board Connector 2x4 2mm spacing Samtec TMM 104 0 G D SM This header connects to an external Vee power supply adapter Header J8 supplies power and control signals to the adapter and receives the Vee output power from the adapter Pin Name Type Description 1 VCC PO 5V 2 VDDX PO 3 3 V 3 VEE_CTL O On off control of Vee power 4 VEE PI Vee input to BitsyXb 5 V_CON O PWM control of Vee 6 n c Z GND E round 8 GND P id 3 3 7 J9 External CompactFlash Expansion Bus Board Connector Samtec STMM 125 02 G D Recommended Mating Connector Samtec TCSD Series Recommended Board to Board Connector ESQT series e g ESQT 125 02 F D 500 The BitsyXb makes its CompactFlash bus signals available on J9 These signals can be used to add a CompactFlash socket to a daughter board or to expand the capabilities of the BitsyXb as a digital expansion bus See section 4 1 5 for details Page 14 Pin Name Pin Type Description 1 GND P ground CARDBDET2 2 I Card Detect 2 CARDB16 4 I 1
24. 110118 00013 preliminary Page 17 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 18 ADS document 110118 00013 preliminary Appliedda Embedded Computer Systems ta net 4 Feature Reference 4 1 4 1 1 This chapter provides details about the architecture and many features of the BitsyXb and how they can fit together to create a system that meets your application needs System Architecture This section describes the core functionality of the BitsyXb Boot Code The BitsyXb uses the first block of onboard flash to store the boot code At the factory boot code is loaded using the JTAG interface J16 section 3 3 9 Most ADS BitsyXb boot loaders are field upgradeable using a flash card on either the CompactFlash or PCMCIA port Synchronous DRAM The BitsyXb uses synchronous DRAM SDRAM for kernel application and display frame buffer use The data bus width is 32 bits The memory clock speed is one half the CPU core clock speed Typical memory bus operation is at 99 5 MHz The self refreshed RAM consumes most of the system sleep current Sleep current increases roughly in direct proportion to the amount of RAM installed Non Volatile Memory There are several ways to store data on the BitsyXb that will survive a power failure Some devices can only be accessed through operating system drivers and not all are available for application data storage Flas
25. 45 to put the system to sleep In conjunction with the wakeup function section 5 3 4 below the ROONOFF input can be used as an on off button for some systems Electrical specifications are listed in section 6 3 7 Software Control Applications can put the system to sleep programmatically Operating systems may also put the system to sleep if the system has not been used for a certain amount of time or for other reasons In remote battery powered applications software Sleep can be used in conjunction with the Timed Wakeup feature section 5 3 4 for minimum power consumption System Wakeup This section describes several mechanisms for waking a BitsyXb system from Sleep mode The system will resume operation in Run mode unless the power supply voltage is lower than Vsleep section 6 3 1 If the input voltage is too low the system will not wake under any circumstances This protects the RAM from getting corrupted by an undervoltage condition RQOnOff Input Shorting the ROONOFF signal 33 45 to ground will wake the system The signal is connected to the system controller Electrical specifications are listed in section 6 3 7 Touch Panel The touch panel controller interrupts the processor when touch panel events occur Before going to sleep the processor can place the controller in a low power sleep mode from which the controller generates a wakeup interrupt when a touch event occurs Timed Wakeup The XScale can wake up at a
26. 5 V main power input e Battery trickle charger Memory e 64 MiB synchronous DRAM e 32 MiB Flash memory e PCMCIA Type I and II 3 3 and 5 V e Supports CompactFlash CF cards with optional personality board The BitsyXb supports 16 32 64 or 128 MiB SDRAM MiB is the IEC abbreviation for mebibyte 2 byte 1 048 576 byte The kibi and mebi prefixes are based on the 1998 IEC standard for binary multiples For further reading see the US NIST web site http physics nist gov cuu Units binary html 3 The BitsyXb supports 8 16 32 or 64 MiB of synchronous or asynchronous flash The 64 MiB flash option is available only in synchronous flash CompactFlash is a trademark of the CompactFlash Association http www compactflash org ADS document 110118 00013 preliminary Page 1 Applieddata net BitsyXb User s Manual Embedded Computer Systems 1 2 4 Communications e USB 1 1 Host port low 1 5 Mbit s and full 12 Mbit s speeds and full speed Client port e Three Serial Ports Serial 1 EIA 232 3 3V logic level 9 wire Serial 2 3 3V logic level 3 wire IrDA and EIA 232 with optional personality board Serial 3 EIA 232 3 3V logic level 5 wire e 10 100BT Ethernet RJ45 with optional personality board e CompactFlash Interface with optional personality board 1 2 5 User Interface and Display e Flat Panel Interface e Software control of external VEE Generator for passive LCD contrast control e Anal
27. 6 Bit Access 3 PCBD10 IO 5 PCBD9 IO Datas 10 7 PCBD8 IO PCBD2 6 IO PCBDI 8 IO Data0 2 PCBDO 10 IO 9 CARDBSTSCHG I Status Change 11 CARDBSPK I Speaker Input 13 CARDBREG O Register Access 15 VCC PO 5V 17 CARDBWAIT I Wait 19 CARDBRES O Reset 21 CARDBVS2 I Voltage Sense 2 Input ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Hardware Reference Pin Name Pin Type Description PCBAO 12 O PCBAI 14 O PCBA2 16 O PCBA3 18 O Address0 6 PCBA4 20 O PCBAS 22 O PCBA6 24 O 23 3 3V PO 3 3 V 25 CARDBON O 5 V Power Control CARDBVCC 26 PI External Switched CardB Power Input 27 CARDBIRQ I Interrupt Signal 29 CARDBMWR O Memory Write 31 CARDBIOWR O IO Write 33 CARDBIORD O IO Read PCBA7 28 O PCBAS 30 O PCBA9 32 O Address7 10 PCBA10 36 O CARDBMRD 34 O Memory Read 35 CARDB_VS1 I Voltage Sense 1 Input 37 CARDBCE2 O Low Byte Chip Select CARDBCE1 38 O High Byte Chip Select 39 PCBD15 IO 41 PCBD14 IO 43 PCBD13 IO Datal 1 15 45 PCBD12 IO 47 PCBDII IO PCBD7 40 IO PCBD6 42 IO PCBD5 44 IO Data3 7 PCBD4 46 IO PCBD3 48 IO 49 CARDBDETI I Card Detect 1 CARDBON_3P3V 50 O 3 3 V Power Control ADS document 110118 00013 preliminary Page 15 BitsyXb User s Manual 3 3 8 Page 16 Applieddata net Embedded Computer Systems J10 ADSmartlO USB Serial 1
28. 7 L_BIAS O 78 CS2 TBD O CPLD chip select CS3 a PSKTSEL 80 n c 81 SSP3TXD 82 SSP3RXD 83 SSP3SFRM 84 SSP3CLK 85 tbd PCMCIA 86 LDDI16 O 87 LDD17 O USB_PWR_SE _ NSE 89 USB_PWR_C NTRL 90 n c 9 n c 92 MMCDATO 93 EIOO 94 EIOI 95 EIO2 96 MMC_IRO 97 n c 98 DIP_SWO I 99 n c I 100 EIO3 101 EIO4 102 IRQ_SSP tbd 103 EIOS Page 22 ADS document 110118 00013 preliminary Applieddata net 4 2 4 3 4 3 1 Embedded Computer Systems Feature Reference GP Signal Name Type Function connector section 104 EIO6 105 EIO7 106 EIOS 107 EIO9 108 DIP_SWI 109 MMCDATI 110 MMCCS0 111 MMCCS1 112 MMCMD RESET_AUDI 113 OL IRO_BATT_F Ha AULT 115 MMCWP 116 MMCCD 117 n c 118 n c Real Time Clock RTC The BitsyXb uses the DS1307 real time clock chip to maintain the system date and time when the system is powered down The operating system typically reads the RTC on boot and wakeup and sets the RTC when the system time or date is changed The RTC is powered from the BATPOS input Connect a long life 3 V battery to the BATPOS input J3 pin 50 to maintain the system time The system communicates with the RTC on the PC bus section 4 5 4 See section 6 3 4 for electrical specifications ADSmartlO ADSmartIO M is a RISC microcontroller on the BitsyXb that is programmed with ADS firmware This device provides additional 1 O funct
29. I COM3 3 COM3 a buffers 60 5 SDRAM and 2 o Flash Memory o am gt gt E AC97 AC97 p Codec TEN EX amp USB host J SW1 Reset ct oe AA J39 USB System buffers Quad Host port nm RART rt o j 57 A logic 1 CompactFlash O 1 947 1 COM5 buffers a i J ET J49 COM6 1 50 COM7 ashe Compact el Flash J2 nh J51 a gt Personality board connectors cited in the block diagram are from the rev A Ethernet CompactFlash personality board and the rev 3 Quad UART personality board ADS document 110118 00013 preliminary Page 3 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 4 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems 2 Getting Started 2 1 Development Systems BitsyXb boards are shipped as development systems designed to get the developer up and running guickly To use the system simply plug power supply into the mini DIN 8 receptacle on the system If the screen does not display anything after five to ten seconds check the Freguently Asked Ouestions below Most operating systems cold boot within twenty seconds 2 1 1 System Components A typical development system is shown at right It consists of the following components e BitsyXb single board computer e Bitsy Personality Board with CompactFlash or 10 100BT Ethernet e Flat panel display and cable e Backlight inverter and cable e Touch
30. S Sales for further details Brightness Control Backlight Most LCD displays include one or more cold cathode fluorescent lamp CCFL tubes to backlight the displays Some LCDs such as passive transflective displays can be viewed in daylight without backlighting Panel backlights are driven by backlight inverters These circuits are typically external to the display and generate the several hundred volts required to drive the CCFL tubes Backlights can easily become the greatest source of power consumption in a portable system Fortunately most backlight inverters include control signals to dim and turn off the backlight The BitsyXb supplies two signals for backlight control BacklightPWM 33 16 and BacklightOn 33 18 BacklightPWM is a filtered PWM signal that supplies an analog output voltage to control the intensity of the backlight The BacklightOn signal is an open collector output to turn the backlight on and off The ADSmartlO controller drives these signals See section 6 3 2 for electrical specifications Contrast Control Vee and Vcon Vee and Vcon are used to control the contrast of passive panels Many passive panels require a positive or negative bias voltage in the range of fifteen to thirty volts to bias the passive LCD display Some displays include a Vee generator and simply reguire a low voltage analog signal to control the contrast The Vcon output is a PWM controlled output that can be used for this purpose Elec
31. WErSUPplV ii a SG lo iaa 1 E23 A O O 1 1 24 Communicatlons 4 ui I YG yn GR te I FR SY FN DY y FO 2 1 23 User Intertace and Display nie it a A Tedi Sek YY a 2 12 0 MOn Nnm NU ES de oA AR UN RE Cm du 2 1 27 Audio Interact Ryd Fe de uod eid TD NY das 2 1 3 Block Diara aa E GC Y E ET S 3 Getting Started csi E EEEE EE EE E ETRE A eatin 3 2 1 Development Systems 5 Ne ne we Ae a E aL eG aire a i 5 2 L 1 System ComponeitSse eiu adhe raa eea ii 5 21 2 BitsyXb Personality Boards ueiuii Tau deny I nnn aa iia 5 ADS CompactFlash Personality Board ADS Ethernet Personality Board ADS Quad UART Ethernet Personality Board 2 2 Frequently Asked Questions sissisotaa aaa acre 6 2 3 Organization of this Manual ooooonnnnnnnnnnnnonnnonnnonononononcnnnnnnncononnonnno nono nn ncnn conc on nr nnn non nc nnncannrnnoo 7 2 4 Errata Addenda and Further Informati0N ooonnnnnnnnnnnicinicininanininanananananana nana na rara IH 7 Hardware Referencia cines 9 3 1 Switches Controls and Indicators ccocoooooccnncononononaconocononnnannnnnocononnnnnnnnnnccnnnnnnnnnnnnccnonannnnnns 9 3 1 1 S1 DIP SS Milo llana Tios AW 9 SA 2EEDIndieatOrs us stored aio CF lisis 9 3 2 Jumper SENO GYG GG 9 32 1 JP2 LCD Display Power Select cein ceu ari 9 3 3 Signal Conmectors FE NNDR FR A 10 3 3 1 J1 LCD Panel Interface Connector oooooooccncconnnononacnnocccononononononoconnnnnnnnnnnoconnnnnnnnnnnncos 10 3 3 2 J22 PCMGIA mu tes WG Y WYF WA AN YH 11
32. ails about displays Pin PXA270 Color Active TFT Display at 16bpp Signal Name ADS Signal Name Description I PNL_VEE Vex contrast 3 3 6 4 6 7 2 GND ground 3 L_PCLK PNL_PIXCLK Pixel Clock 4 L_LCLK PNL_HSYNC Horizontal Sync 5 L_FCLK PNL_VSYNC Vertical Sync 6 GND ground The component side of the BitsyXb is the one on which the PCMCIA ejector is installed As a factory option some connectors may be installed on the bottom side of the BitsyXb Page 10 ADS document 110118 00013 preliminary Applieddata net 3 3 2 Embedded Computer Systems Hardware Reference 7 LDDIS PNL_REDO Red Bit 0 8 LDD11 PNL_REDI Red Bit 1 9 LDDI2 PNL_RED2 Red Bit 2 10 LDD13 PNL_RED3 Red Bit 3 11 LDD14 PNL_RED4 Red Bit 4 12 LDDIS PNL_RED5 Red Bit 5 13 GND ground 14 LDD5 PNL_GREENO Green Bit 0 15 LDD6 PNL_GREENI Green Bit 1 16 LDD7 PNL_GREEN2 Green Bit 2 17 LDD8 PNL_GREEN3 Green Bit 3 18 LDD9 PNL_GREEN4 Green Bit 4 19 LDD10 PNL_GREEN5 Green Bit 5 20 GND ground 21 LDD4 PNL_BLUEO Blue Bit 0 22 LDDO PNL_BLUEI Blue Bit 1 23 LDDI PNL_BLUE2 Blue Bit 2 24 LDD2 PNL_BLUE3 Blue Bit 3 25 LDD3 PNL_BLUE4 Blue Bit 4 26 LDD4 PNL_BLUE5 Blue Bit 5 27 GND ground 28 L_ BIAS PNL_LBIAS Data_Enable PNL_PWR Vcc 5 V or 3 3 V JP2 Horizontal Mode Select a PNL_RL set by R193 or R207 Vertical Mod
33. and J10 3 3 8 Reio ElOn series resistance 1 kQ 12C Bus 4 5 4 bus clock note 34 100 400 kHz buffer size 1 byte Rbus 4 7 4 99 kQ Vbus pull up on SDA SCK 33 V ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems System Specifications Symbol Parameter Min Typ Max Units USB Host Port R_pwr_sense USB_PWR_ SENSE Pull up to Vddx 47 kQ Notes 34 The PXA270 supports standard and fast I2ZC speeds of 100 and 400 kHz 6 3 10 Crystal Frequencies Agencies certifying the BitsyXb for compliance for radio frequency emissions typically need to know the frequencies of onboard oscillators The following table lists the frequencies of all crystals on the BitsyXb Crystal Device Typ Units x1 ADSmartlO microcontroller 3 6864 MHz X2 RTC 32 768 kHz X3 Codec 24 576 MHz X4 XScale core 13 000 MHz X5 XScale RTC 32 768 kHz ADS document 110118 00013 preliminary Page 61 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 62 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems 7 Board Revision History 7 1 7 2 7 2 1 ADS document 110118 00013 preliminary Identifying the board revision The product revision number of the BitsyXb is etched on the underside of the printed circuit board That number is 170118 0000
34. be placed the BitsyXb power supplies Baseline power consumption of the BitsyXb is listed in section 6 3 5 3 3 V Loads Typical external loads on the 3 3 V power supply include the following e Display e Personality Board e CF and some PCMCIA cards 17 Burst mode in this context is a registered trademark of Linear Technology Corporation ADS document 110118 00013 preliminary Page 47 Applieddata net BitsyXb User s Manual Embedded Computer Systems 5 V Loads 5 V loads come from both onboard and external devices External e Display e Backlight Only if powered by 5 V BitsyXb power supply e Most PCMCIA cards e USB devices e PS 2 keyboard e Speaker s Assume 80 efficiency Onboard e 3 3 V Supply Multiply by 115 to account for 3 3 V power supply efficiency e Supercaps Use peak inrush current in your budget Loads on Main Supply The main power supply DCIN_Pos or Vbatt_Pos is loaded by the 5 V and 3 3 V supplies as indicated in the diagram of section 5 3 1 Assume 85 efficiency for external loads that cascade through the 5 V supply Consider these loads when creating your power budget 5 4 2 Power Loads During Sleep When designing systems for minimal power consumption during Sleep mode make sure to consider DC losses to external connections The following are a few of the ways your system may leak when asleep e PCMCIA and CF cards Cards in place when the system is asleep can drain power through the Ca
35. bove Vsleep before the voltage detector will restore the DC_GOOD signal Make sure that your input voltage is designed to always run above Vsleep Vsleep hyst or systems that go to sleep may not be able to wake again 6 Short RgOnOff to GND to for at least trg to wake up system A low level voltage on RgOnOff initiates wakeup ADS document 110118 00013 preliminary Page 53 BitsyXb User s Manual Applieddata net Embedded Computer Systems 6 3 2 Page 54 LCD Display LCD display panels have a wide range of voltage and data reguirements The BitsyXb has a number of adjustable voltages to support these reguirements as well as controls for brightness backlight and contrast passive LCD panels See section 4 5 5 for further details Symbol Parameter Min Typ Max Units LCD 4 6 2 V pnl Display power supply note 7 3 3 5 0 V P pnl_pwr Display power note 8 2 W V pnl_ data Panel data voltage note 9 3 3 3 3 5 0 V Scan direction active displays 4 6 3 R pni_rl Pull up down resistance 4 7 kQ R pnl_ud Pull up down resistance 4 7 kQ V pni_rl note 10 0 V pnl V pnl V V pnl_ud note 11 0 V pnl V pnl V Contrast Control passive LCD displays 4 6 7 Vcon Low voltage contrast adjust note 12 0 Vddx V Brightness Control backlight 4 6 6 V backlightOn note 13 30 V V backlightPWM_ PWM note 14 0 3 3 V R backlightPWM PWM series resistance note 14
36. can calculate how much time the system will have to go to sleep based on 1 how guickly your power supply will fall when main power fails and 2 the trip point of the BitsyXb power fail circuit section 6 3 1 When possible put the system to sleep with software if a power failure condition is expected e g changing a battery ADS document 110118 00013 preliminary Page 45 Applieddata net BitsyXb User s Manual Embedded Computer Systems 5 3 6 5 3 7 Page 46 The supercaps discharge linearly from the constant current drain during sleep according to the equation i 0 V 0 2 C EH I sleep where t is the duration the system can sleep in seconds Vi is the initial charge voltage of the capacitor Vr is the supercap voltage at which onboard systems will fail assume 3 2 V C is the capacitance of the supercaps in Farads Eff is the efficiency of power delivery 85 90 is a safe value to use Toep is the amount of current the system consumes while in sleep mode For example a system with fully charged 1 65 F supercaps and a sleep current of 4 mA can expect to run for up to ten minutes after a power failure Consult the electrical specifications of section 6 3 4 and power consumption specifications of 6 3 5 for the values to use in your calculations Backlight Power The BitsyXb provides software control of Backlight Intensity and On Off using the ADSmartIO controller Power for the backlight is not routed through the b
37. charge ESD and suppress electromagnetic and radio frequency interference EMI RFI Transient voltage suppressors EMI fences filters on I O lines and termination of high frequency signals are included standard on all systems For details see electrical specifications for subsystems of interest 4 8 1 Agency Certifications Many products using ADS single board computers have successfully completed FCC and CE emissions testing as a part of their design cycle Because ADS supplies only the single board computer and not fully integrated systems ADS cannot provide meaningful system level emissions test results See the crystal frequencies section 6 3 10 and electrical specifications for information that may be helpful during agency certifications 4 8 2 Protecting the Power Supply Inputs It is the responsibility of the designer or integrator to provide surge protection on the input power lines This is especially important if the power supply wires will be subject to EMI RFI or ESD ADS document 110118 00013 preliminary Page 37 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 38 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems 5 Power and Power Management Power management is especially critical in portable and handheld applications where battery power is at a premium The BitsyXb includes advanced power management features includ
38. connector is pin 1 Switches Controls and Indicators S1 DIP Switch S1 is a two position DIP switch When in the ON position switches are closed and connect to ground Otherwise they are pulled up DIP switch positions 1 and 2 connect to the PXA270 Most operating systems on the BitsyXb reserve these switches for their use Consult the operating system manual for details LED Indicator The BitsyXb has one onboard light emitting diode LED that is turned on and off by the system controller The LED is driven by the same buffers as the display driver data lines The LED will be off when the display buffers are disabled see power management section 5 3 2 Jumper Settings There is just one user selectable jumper on the BitsyXb It uses a 2mm shorting block shunt to select the setting Turn off power to the BitsyXb before changing the position of a shunt JP2 LCD Display Power Select Type 3 post header 2mm This jumper selects the supply voltage for the LCD display The three pin header is located near the PCMCIA ejector button Jumper setting Voltage Selected 1 2 Vddx 3 3 V 2 3 Vcc 5 0 V WARNING Make sure you have selected the correct voltage before connecting the panel Flat panels can be irreparably damaged by incorrect voltages ADS document 110118 00013 preliminary Page 9 Applieddata net BitsyXb User s Manual Embedded Computer Systems 3 3 Signal Connectors The follo
39. d are indicated by dashed lines in the diagram above Options are available for production customers as described in section 6 1 4 but are otherwise outside the scope of this manual Contact your ADS sales representative if you believe one or more of these options is reguired for your application Specifications for the BitsyXb power supply are listed in section 6 3 4 5 3 2 Subsystem Partitioning The BitsyXb can selectively turn off power to subsystems on the board This load shedding feature can extend battery life and significantly increase the amount of time the supercapacitors will hold up system power Applications and the operating system determines how selective power management is utilized ADS document 110118 00013 preliminary Page 41 Applieddata net BitsyXb User s Manual Embedded Computer Systems BitsyXb systems that can be selectively disabled include the following e LCD display panel power and signal buffers e Vee contrast control e _ Audio output amplifier e Audio codec and microphone pre amps e Serial 1 and 3 EIA 232 buffers e External device 1 PE1 J3 42 e External device 2 PE2 J3 24 In addition the BitsyXb also controls its core power supplies to support sleep operation e Vcc 5 V supply e Vddx 3 3 V Vddi processor core supplies The following diagram illustrates the architecture of the BitsyXb power management system At the heart of the system is a power controller that contro
40. duction orders Mating Headers on Underside of Board The four system signal headers J1 J3 J9 and J10 can be mounted on the underside of the BitsyXb This allows the BitsyXb to sit on top of another board Note that J7 can only be populated on top side of the BitsyXb Important When the headers are placed on the underside of the board the pin numbers will not correspond to the signals as described in this manual Lay out the mating board with this in mind PCMCIA Rails with no Ejector In applications where the PCMCIA ejector causes clearance problems ADS can populate a PCMCIA slot that has rails but no ejector Removal of PCMCIA Header BitsyXb systems can be built without the PCMCIA header which can result in significant cost savings The base surface mount connector remains on the board for factory programming at ADS and at your facility Connector Plating Connectors on the BitsyXb come standard with gold plating ADS can populate headers with different platings as reguired Microphone Gain The BitsyXb microphone circuitry can be configured for different gain The most likely reason is to support line in inputs 1 Vrms with no electret pull ups but other gain and filtering settings are possible as well ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Syste m Specificatio ns 6 2 6 3 6 3 1 Environmental Specifications The following are environmental specificat
41. e Select 2 PNL_UD set by R191 or R192 33 ADMa PNL_ENA Panel enable signal PDO low voltage adjust for contrast 34 VCON control of some displays 6 3 2 zero to PNL_PWR volts J2 PCMCIA Integrated ejector FCI 95620 050CA The 68 pin PCMCIA socket conforms to the PCMCIA standard for 5V tolerant Type II cards and can also be run at 3 3 V The socket is normally de energized the operating system is responsible for turning on the socket when a card is inserted and turning it off when the card is removed Ejector hardware is standard A rail only PCMCIA slot is a volume production option for installations where clearance is an issue See section 6 1 4 for details Vpp pins 18 and 52 which is 12 V in older PCMCIA implementations is left unconnected in this implementation See section 6 3 7 for electrical specifications ADS document 110118 00013 preliminary Page 11 BitsyXb User s Manual 3 3 3 Page 12 Applieddata net Embedded Computer Systems J3 Power I O Serial 2 amp 3 USB Touch Screen and others Board Connector Samtec STMM 125 02 G D Recommended Mating Connector Samtec TCSD Series Recommended Board to Board Connector ESOT series e g ESOT 125 02 F D 500 Pin Name Pin Type Description 1 EIO9 IO EIOS 2 IO PXA270 Digital I Os 4 7 1 6 3 9 3 ElO7 IO
42. e clock RTC section 4 2 e Wakeup via ROONOFF signal section 5 3 3 e Trickle charge a battery section 5 3 7 e Read a temperature sensor section 4 3 5 e Monitor system power e Reset CPU Digital I Os All available ports on the ADSmartlO controller can be individually configured as inputs or outputs If you write a 1 to an 1 O port when it is configured as an input it enables a pull up resistor Electrical specifications are listed in section 6 3 6 Analog Inputs A D Each of the Port A I Os PA0 PA7 includes an analog to digital A D converter The converters give full scale readings when the input voltage is equal to voltage reference Vref e g V Vref reading 1023 Not all ports are available for external A D use see section 4 3 7 for port assignments Electrical specifications are listed in section 6 3 6 Temperature Sensing The BitsyXb ADSmartlO can read the temperature of an external thermistor connected across pins 5 and 7 of J3 The ADSmartIO PD1 controller drives a transistor to energize the thermistor then reads dpa the result through the voltage divider created by the thermistor Ry and an internal resistor Ra The thermistor circuit is shown at J3 3 right PA4 e yr hots Ry SF Electrical specifications for the temperature sensing circuit are 7 A listed in section 6 3 6 ills JI D Keypad Scan The ADSmartlO can scan a matrix keypad up to four by five keys in s
43. e is differential An on board pull up normally keeps HP_IN high Connecting Speakers When using the BitsyXb to drive speakers short the HP_IN signal to ground This places the output amplifier in differential mode Connect speakers to the SPKR_L and SPKR_R outputs on J10 Connecting Headphones Standard headphones use a plug wired as shown at right Three rings on the plug provide right and left channels and a common return Mono headphones do not include the center ring Ring left channel Tip right channel or mono The mating headphone jacks include spring contacts to make an electrical connection with the headphone and to mechanically hold the plug in place Some jacks include a mechanical switch suitable for use with the HP_IN signal that is activated when a plug is inserted into the jack Mono Headphones You can connect mono headphones directly to the BitsyXb as shown at right Keep in mind that the resulting impedance of the parallel connected SPKR_RCI AA headphone speakers is half that of a single headphone speaker See the audio driver specifications in section 6 3 8 for details about the minimum impedance an audio output channel can drive SPKR_RE Headphone jack HP IN 3 SPKR_Li Stereo Headphones i Lr When wiring for stereo headphones wire blocking FRO f A LA capacitors in series with the BitsyXb SPKR signals Headphone jack ADS document 110118 00013 prelimi
44. ect SS signal which enables the slave device s transmitter is also known as SFRM2 on the BitsyXb SSP on the PXA270 The PXA270 provides three identical synchronous serial ports each of which features the following capabilities e Frame sizes from four to 32 bits e Sixteen entry 32 bit transmit and receive FIFOs e Adjustable FIFO threshold interrupts e Bit clock speeds from 6 3 kbps to 13Mbps e Support for the following protocols o Motorola s SPI Serial Peripheral Interface o National Semiconductor s Microwire o Texas Instruments SSP Synchronous Serial Protocol o PSP a Programmable Serial Protocol e Operation as master or slave e Receive without transmit operation e SSP PSP Network mode supporting up to eight time slots Each of these features is available for use on the BitsyXb ADS document 110118 00013 preliminary Page 31 Applieddata net BitsyXb User s Manual Embedded Computer Systems Page 32 SSP on the BitsyXb The BitsyXb makes use of the three PXA270 synchronous serial ports as illustrated in the following diagram PXA270 ATMega ADSmartlO J16 SSP1 Touch J3 SSP2 gt gt panel controller SSP3 gt The BitsyXb uses PXA270 SSP1 to communicate with the ADSmartIO controller The signals for SSP1 come out to J16 for factory programming but are not intended for application use The BitsyXb uses SSP2 to communicate with the touch
45. egotiate the power they need from 100 mA to 500 mA in 100 mA increments The BitsyXb supplies 5 V power through the USB_PWR pin Make sure to account for power used through USB in your BitsyXb power budget section 5 4 1 Itis recommended that you use a power switch The BitsyXb supports two power control signals on J10 USB_PWR_SENSE is an input that detects over current conditions USB_PWR_CTRL an output that controls power to the USB port See the BitsyXb CF Personality Board ADS p n 64011 1 8000 for an example of how to use these signals Electrical specifications are in section 6 3 9 USB Function Client The BitsyXb includes a USB Function or Client port This interface allows the BitsyXb to appear as a client device to USB Host devices such as desktop and laptop computers The USB Function signals are available on connector J3 pins 29 and 30 Connect these signals to a USB Function Type B socket mating face shown at left The USB standard also permits directly wiring the USB signals to the host or to a host connector e g USB mouse Connecting the USB Function Port This section describes how to connect the signals to create a fully functioning USB Function port See the ADS Bitsy Personality Board reference designs section 2 1 2 for examples of how to put these instructions into practice The BitsyXb supports the full USB connection speed 12 Mbit s Tie a 1 5 KQ pull up to the USB signal to indicate this capability to
46. em controller The socket is keyed for 5V tolerant CF cards 28 Each card inserted in a PCMCIA or CF slot can drain up to 10 mW when the system is in Sleep mode 4 Vcc Rpemcia ADS document 110118 00013 preliminary Appliedda Embedded Computer Systems ta net System Specifications 6 3 8 29 The PCMCIA CF voltage is software selectable External implementations of the CF bus i e on a Personality Board can hard wire the voltage to Vddx or to Vcc 30 The PXA270 MECR register independently sets timings for the attribute IO and memory spaces of the CF bus in 32 steps Values shown assume 206 MHz CPU clock Min values are with Fast bit 1 max values are with Fast bit 0 Audio For its audio sub system the BitsyXb uses the Crystal CS4202 AC 97 stereo codec with dual audio input and output channels The BitsyXb adds an output power amplifier National LM4863LQ and a microphone pre amp with power for electret microphones The output amplifier supports differential and single ended modes When the HP_IN signal is greater than V HP_IN the amplifier is in single ended mode when lower it is in differential mode The following diagram illustrates the relationship of the BitsyXb signal amplifiers to the codec from power controller n MIC 1 S 420dB Line_in_L t MIC 2 al Line_out_R Jo Line_out_L 20dB Line_in_R l L HPIN CS4202 The B
47. es the PCMCIA and CompactFlash ports Specifications are listed separately below Absolute Maximum Ratings Input voltage digital I O pins 0 5 to 5 5 V Output current continuous digital 1 O PINs ooocoocccionccinocananccnnanccnnnccnn 100 to 100 mA Symbol Parameter Vdd Supply voltage 3 3 V Digital Outputs Vol 0 0 4 V Voh 2 4 V Digital Inputs Vil 0 0 8 V Vih 2 0 3 5 V CompactFlash Port Used as Expansion Bus The CompactFlash bus can be used as a digital expansion port on the BitsyXb The following are specifications for the CF port used as an expansion bus specs tbd Symbol Parameter Min Typ Max Units Vpcmcia raae ee CF port voltage 33 5 0 5 0 Vv 3 3V 3 3 V socket current tod 2 W 5V 5 V socket current 2 WwW Card detect 1 amp 2 and voltage Rp pemcia sense VS1 amp 2 pull ups note 27 199 s Card detect and voltage sense pull Vp pcmcia up voltage note 29 Vddx Vcc Vcc V Digital Outputs Vol 0 Veet Voh 1 0 Vccb I sink mA source 4 mA Digital Inputs Vil Vecb 3 3 V 0 325 Vccb Vccb b 0 V 0 8 V Vih Vecb 3 3 V 0 475 Vccb Vccb b 0 V 2 4 V Timing note 30 t mem system memory clock 9 7 us e sef te command 2 97 tmem ean dd 64 tmem t access nRD WR duration first access 3 97 t mem Notes 27 The CF port voltage is selected programmatically with the syst
48. et your development system running For customers who establish a business relationship with ADS we provide support to develop applications and drivers O Can I upgrade the version of the operating system A Yes ADS provides regular operating system updates on its developers web site For operating systems not maintained by ADS contact the operating system vendor O I would like to interface to a different display panel How can I do this A ADS may have already interfaced to the panel you are interested in Consult ADS for availability Organization of this Manual The manual organizes information in five key sections Introduction Provides an overview of the functionality and organization of the BitsyXb as well as how to use this manual Hardware Reference Describes the configuration settings and pinouts for all connectors and jumpers on the BitsyXb Feature Reference Gives details about the various subsystems of the BitsyXb Power Management Provides key information about power management tips for system integration and electrical and mechanical interface specifications Specifications Electrical and mechanical interface specifications To locate the information you need try the following 1 Browse the Table of Contents Section titles include connector designators and their function 2 Follow cross references between sections 3 View and search this manual in PDF format Errata Addenda and Further Informatio
49. for effective charging of specific batteries to be used Select a resistor value that will provide the desired charge current but not exceed the power rating of the resistor Since P I R Lonarge max gt al Pan R where Pep is the maximum power the charge resistor can support Consult the electrical specifications in section 6 3 4 for the values populated on standard systems Power Supply Efficiency The BitsyXb power supply achieves high efficiency through several means First it utilizes high efficiency switching regulators These regulators use conventional step down switchers under operating load conditions but are configured by the system for linear and burst mode operation during low load conditions that occur during system sleep Additionally there is only one level of cascaded regulation reducing the losses that multiply through each stage Designing for Optimal Power Management Designing a system for optimal power management requires careful attention to many details This section provides some guidelines and tips for best power management Create a Power Budget for Peripherals Embedded system designers using the BitsyXb should have a clear understanding of how power usage will be allocated in the system they design Designers should create a power budget that takes into account the types of devices that are expected to be used with the BitsyXb The following lists detail some of the typical external loads that can
50. ght Inverter l 4 ouch Panel LCD Display ON OFF Touch Screen RUN POWER DOWN AC97 Codec amp Mic Pre amps ON OFF Audio Amplifier ON POWER DOWN RS 232 Buffers ON POWER DOWN This section describes several methods for putting the system into Sleep mode Power Failure Interrupt When the input voltage falls below Vsleep section 6 3 2 the system generates a in internal power failure interrupt the DC_GOOD signal goes low This interrupt gives the operating system early ADS document 110118 00013 preliminary Page 43 Applieddata net BitsyXb User s Manual Embedded Computer Systems 5 3 4 Page 44 warning of an impending power failure allowing the system to drop into low power Sleep mode before power has failed completely Systems that have supercapacitors benefit from this feature by going to sleep before they begin drawing down energy stored in the capacitors This prolongs the amount of time the system can maintain the contents of RAM Operating systems may allow the option to ignore power failure interrupts This allows systems to run with lower input voltages without going to sleep However note that if the system does go to sleep it will not be able to wake until the input voltage is above Vsleep see section 5 3 4 for details RQOnOff Input Operating systems and applications can configure the RQONOFF signal 33
51. h Memory Flash memory is the primary site for non volatile data storage The BitsyXb includes flash memory for non volatile data storage The data bus width is 32 bits ADS systems store the operating system applications and system configuration settings in the onboard flash Most operating systems configure a portion of the flash as a flash disk which acts like a hard disk drive ADSmartlO EEPROM The ADSmartlO controller includes 256 bytes or more of EEPROM storage ADS reserves a portion of this memory for future use Drivers are not yet available for all operating systems CompactFlash and PCMCIA ATA Cards CF and ATA cards provide removable storage in a wide variety of capacities These cards can be cost effective means to expand system storage capacity for applications that provide access to the PCMCIA and CF slots A CF slot must be placed on a daughter board as it is not included on the BitsyXb ADS document 110118 00013 preliminary Page 19 Applieddata net BitsyXb User s Manual Embedded Computer Systems Page 20 RTC NVRAM The real time clock chip includes 56 bytes of non volatile RAM The RAM is maintained as long as main or backup power is provided to the chip Drivers are not yet available to access this feature Contact ADS Sales if your application reguires this feature Interrupts The BitsyXb includes several sources for external interrupts The following table summarizes the external interrupt sources and
52. host hardware ADS document 110118 00013 preliminary Appliedda Embedded Computer Systems Featu re Refe rence 4 5 3 ta net USB_PWR is power supplied from the host computer Since the BitsyXb is self powered not powered by the USB cable USB_PWR is not needed as a power input However USB_PWR is useful for sensing when a USB cable is connected and for powering the 1 5kQ pull up resistor that indicate to the host that the device supports 12Mbps The USB_RECONN output at J3 pin 33 interrupts power to the 1 5kO pull up simulating a cable disconnection to the USB host controller This signal can be used to force the host to re enumerate the BitsyXb e g after wakeup Synchronous Serial Ports This section gives an overview of how synchronous serial ports SSP work and describes how they are used on the BitsyXb Overview of Synchronous Serial Ports Synchronous serial port standards share the same simple architecture a clock line transmit and receive lines ground and one or more device selects Each device on the bus requires its own select line Buses may be full or half duplex clocking data one or both directions at the same time respectively Each standard defines which devices are bus masters and which are slaves To clarify direction of the data signals the SPI bus master transmit line STXD is also known as MOSI Master Out Slave In while its receive line is known as MISO Master In Slave Out The Slave Sel
53. ing the low power XScale CPU partitioned power distribution and ability to run from several types of DC power inputs The BitsyXb can also operate as a conventional single board computer taking advantage of the inherently low power consumption of the system This chapter describes the architecture of the BitsyXb power supply factors affecting power consumption and reference designs to get you started For information about how much power the BitsyXb consumes consult the electrical specifications in section 6 3 5 5 1 Determining the Features You Need Not all designs with the BitsyXb need to be optimized for lowest power consumption Consider the following types of typical system configurations to determine the topics of interest to your application Relevant Topics Control ext power supply 5 3 2 Battery charging 5 3 7 and 5 5 3 RTC battery 4 2 Supercapacitors nd 5 5 1 Backlight power control 5 3 6 5 3 5 System battery Line power 5 3 1 5 3 1 Sleep wakeup button 5 3 3 Features Required lt System is On All the Time System Power Supply Turned Y Y Off to Shut Down System System Should Turn Off a MM os when not in use Battery Operated Minimum sly Power Consumption Pulled Plu g Brownout e slyly Protection Must Preserve Time and Date e Y y Under All Circumstances ADS document 110118 00013 preliminary Page 39 5 2 1
54. ionality for specialized tasks Your application software can configure the standard ADSmartlO for a variety of functions such as digital I O PWM A D PC keypad scan and PS 2 keyboard operation Overview The ADSmartlO controller has four eight pin I O ports named PA PB PC and PD Some of these ports pins are used internally while others are available for user applications See the signal cross reference in section 4 3 7 for details Generally ADSmartlO ports are referenced by port and pin number e g PA2 but I O signals may go by several names based on its functionality See the connector pinouts to cross reference ADSmartlO signal names Electrical specifications for the ADSmartIO are listed in section 6 3 6 The ADSmartIO Programmer s Reference ADS document 110110 4004 gives information about how to use the ADSmartlO features ADS document 110118 00013 preliminary Page 23 Applieddata net BitsyXb User s Manual Embedded Computer Systems 4 3 2 4 3 3 4 3 4 4 3 5 4 3 6 Page 24 ADSmartlO Features The following are some of the functions that the ADSmartIO can perform The functions actually implemented depend on the firmware loaded on your system e General purpose digital I O and A D e Keypad scan section 4 3 6 PS 2 keyboard input e Backlight on off and brightness control section 4 6 6 e Contrast control for display enabled only when pixel clock is running section 4 6 7 e Read set real tim
55. ions for the BitsyXb single board computer Parameter Typ Max Units Operating temperature 40 85 C Electrical Specifications This section provides electrical specifications for the BitsyXb single board computer Reset Sleep Wakeup Absolute Maximum Ratings Reset Input RESET_ IN 3 6 V note 1 Wakeup Input RgOnOff ee eeeeeen 5 5 V note2 Symbol Parameter Min Typ Max Units Reset_In J10 45 Vrst trigger voltage Note 3 2 7 V Vprst pull up voltage Vddx V Rprst pull up resistance 47 kQ Sleep 5 3 3 Vsleep Sleep trigger voltage Note 4 5 4 5 8 V Sleep trigger release hysteresis Vsleep hyst Note 5 0 06 0 25 V Wakeup RgOnOff J3 45 trg wakeup pulse duration Note 6 100 ms Vprg pull up voltage Vddx V Rprq pull up resistance 11 kQ Notes 1 _ The reset controller can support operating voltages up to 10 VDC However such high voltages on Vddx through the pull up resistor may damage the system 2 The RgOnOff signal is connected to the system controller which determines this rating see section 6 3 7 3 Short Reset_In to GND to reset system 4 This is the voltage at VBATT_POS at which the DC_GOOD signal 4 3 7 changes from high to low which can trigger the system to go into Sleep mode Sleep trigger at DCIN_POS is Vsleep Vdin 6 3 4 5 Important Once Vsleep has been triggered the input voltage must rise at least Vsleep hyst a
56. itsyXb microphone circuitry can be factory configured to support line in inputs 1 Vrms with no electret pull ups and different input gain and filtering See section 6 1 4 for details about volume production options Absolute Maximum Ratings MAME IMIG FR RD a RA FFAN HEN 5 Vdc Symbol Parameter Min Typ Max Units DVdd codec digital supply voltage 3 3 V Avdd codec analog supply voltage 5 0 V fso sample rate output 48 kHz fsi sample rate input note 31 8 44 1 kHz Audio Input Vin_mic signal input voltage 100 MV ms Gain_mic pre amp gain 20 dB fo_mic pre amp low pass cutoff note 32 3 4 kHz Rin_mic input impedance 12 5 kQ Cin_mic DC blocking capacitor 1 uF Vmicpwr microphone power MIC_L R 5 V Rmicpwr microphone power series resistance 3 2 kQ ADS document 110118 00013 preliminary Applieddata net BitsyXb User s Manual Embedded Computer Systems Symbol Parameter Min Typ Max Units Audio Output RI speaker load 4 8 Q Vout Zspkr 40 differential mode 3 7 Vms Vdc DC bias differential mode 0 5 Avdd Pspkr output power ea channel note 33 differential THD N 1 RI 4Q 1 0 2 2 W differential THD N 10 RI 4Q 1 0 2 7 W differential THD N 1 RI 320 1 0 0 34 WwW single ended THD N 0 5 RI 320 75 85 mW single ended THD N 1 RI 8Q 340 mW single ended THD N 10 RI 8O 440 mW R HP_IN pull up to Vcc 100 kQ
57. ize Matrix keypads are simpler and cost less than full keyboards and can be easily customized for your application You can also create a keypad matrix from a collection of normally open switches When configured to scan a keypad the ADSmartIO configures the ROWn lines as inputs with software pull ups enabled and configures the COLn lines as outputs set to 1 high For the scan ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Featu re Refe rence the keypad scanner sets successive COLn outputs to 0 low then looks for a 0 on one of the ROWn inputs The scanner re reads the pressed key after a delay to debounce the key press Unused row and column lines can be used for general purpose I O or A D The following diagram illustrates how to connect a 3x3 keypad matrix The pull ups are the software activated internal resistors of the ADSmartIO while the series resistors are part of the BitsyXb BitsyXb ADSmartlO Controller A 3 x 3 Keypad l ROW 0 A SW1 SW2 SW3 ROW 1 NO O NO 3 A SW4 SW5 SW6 on Se le ee bd SW7 SW8 sw9 COL 0 O O COL 1 COL 2 ADS document 110118 00013 preliminary Page 25 Applieddata net BitsyXb User s Manual Embedded Computer Systems 4 3 7 Page 26 ADSmartlO Signal Cross Reference The ADSmart
58. lO microcontroller serves many functions in the BitsyXb The following table illustrates how the microcontroller ports are utilized for ADSmartlO functionality on the BitsyXb Entries in parentheses indicate indirect connections to the listed pin e g through voltage dividers or additional circuits Signals with conventional protection circuits are considered directly connected I input O output Port Pin Type Function PAO J10 27 IO PAI J10 29 IO Keypad A D or digital I O PA2 J10 31 IO PA3 J10 33 IO PA4 J3 5 AI Thermistor reading PA5 I DC_GOOD PA6 O Reset CPU PA7 J3 38 AI VBATT_POS divided by 7 2 PBO J3 22 O Battery charger PBl I System Power enable PB2 O Wake up CPU PB3 O IRO to CPU PB4 SSP_SFRM PB5 SSP RX MOSI SSP communication PB6 SSP TX MISO with CPU PB7 SSP CLK PCO J10 17 IO PCI J10 19 IO PC2 J10 21 IO Keypad A D or digital I O PC3 J10 23 IO PC4 J10 25 IO PCS J1 3 I Pixel clock PC6 J10 11 IO PC7 J10 49 IO 12 unused PDO J10 15 O Passive panel enable PNL_ENA PDI J10 13 O Thermistor energize 4 3 5 PD2 J10 9 IO PS 2 Clock PD3 J3 45 I wakeup signal from CPLD PD4 J1 1 O Vee PWM PDS J3 16 O Backlight PWM PD6 J10 7 IO PS 2 Data PD7 J3 18 O Backlight on off 1 DC_GOOD is an internal digital signal that goes low when the input voltage dro
59. ls the state of the various power subsystems of the BitsyXb Under control of the XScale processor this controller can manage most of the power distribution of the board The XScale PowerEnable signal controls the rest of the subsystems The controller inverts the PowerEnable signal for use with some subsystems This details is not shown in the diagram Page 42 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Power and Power Management In the diagram the power management modes of each of the subsystems are indicated in gray Arrows indicate the direction of both signal flow and of power management ADSmartlO RUN SUSPEND Vref On Off ON OFF Vcon Display Power amp Data Signals ON OFF PC Card Power Management Flow BitsyXb SAS PCMCIA and CF System gt Controller 3 3V 5V OFF l ON PXA255 Core DRAM NN RUN SUSPEND Self Refresh RUN IDLE SUSPEND Flash PXA255 I Os READ WRITE 4 ON STANDBY OFF POWER DOWN Power Supply 5V System RUN Controller BURST MODE l 3 3V Vddx RUN Switcher i ON SUSPEND Linear Core Voltage ON OFF CONN PET CONN_PE2 RqOnOff PowerEnable 5 3 3 System Sleep Contrast Vee Brightness PWM Backli
60. n Errata and addenda to this manual are posted on the ADS support forums along with the latest release of the manual Consult the support forums any time you need further information or feel information in this manual is in error You may access the forums from the ADS support site http www AppliedData net Support In addition to manuals the support forums include downloads troubleshooting guides operating system updates and answers to hundreds of questions about developing applications for ADS products You may also post questions you have about ADS products on the forums ADS document 110118 00013 preliminary Page 7 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 8 ADS document 110118 00013 preliminary Embedded Computer Systems 3 Hardware Reference 3 1 3 1 1 3 1 2 3 2 3 2 1 This section gives an overview of the hardware features of the BitsyXb This overview includes a description of the switches jumper settings connectors and connector pinouts Many connectors and headers have a visible number or marking on the board that indicates pin 1 Tf that pin is not clearly marked there are two other ways to locate pin 1 1 For through hole connectors look at the underside of the board The square pad is pin 1 2 Download the mechanical drawing of the BitsyXb available on the ADS Support site section 2 4 The square or indicated pad on each
61. nary Page 27 Applieddata net BitsyXb User s Manual Embedded Computer Systems Page 28 as shown at right These capacitors block the DC component of the audio signal and complete the conversion from differential to single ended output drive Leave the HP_IN signal pulled high to enable headphone output Select blocking capacitor size based on the lowest freguency your application will need to play out Larger capacitors give improved bass response lower freguency cutoff but are physically larger and cost more The corner freguency for the low pass filter created by the capacitor and the headphone speaker is calculated as fo 1 27R C A 330 uF capacitor into a 32 ohm headphone speaker will give a low cutoff freguency of 15 Hz Use electrolytic capacitors rated for at least 63V The pull down resistors shown in the diagram drain any charge that builds up on the headphone outputs when headphones are not connected Use 1 kQ resistors ADS document 110118 00013 preliminary Applieddata net 4 5 4 5 1 Embedded Computer Systems Featu re Refe rence Using Stereo Headphones and Speakers in the Same System Some applications use both headphones and speakers You can wire the headphone jack to automatically switch the amplifier to single ended mode when a headphone plug is inserted in the jack This will disable the drive to any speakers that are wired into the system SPKR_L 4 A SPER_R 4 A Most
62. nd Page 49 BitsyXb User s Manual Applieddata net Embedded Computer Systems 5 5 3 Line Power and Battery with External Charger You may choose to use an off board battery charger for a specific battery chemistry or voltage The following diagram illustrates one way to include a charger on your own personality board Personality Board BitsyXb DC Line power EIN FEE LA 4N Charger J VBatt_Pos Ground Ground In this example DC Line power may come from a DC power supply battery or other DC power source The Bitsy Personality Board ADS p n 64011 1 8000 includes an external battery charger using a design similar to the one depicted above For an illustration of how to use the onboard BitsyXb trickle charger in conjunction with line power see the diagram in section 5 3 7 Page 50 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems 6 System Specifications 6 1 Mechanical Specifications The BitsyXb is 3 0 inches by 5 0 inches in size This section describes the component dimensions and mounting of the board Detailed drawings are available on the support forums section 2 4 and 3D models are available from ADS in electronic format for production customers 6 1 1 Mechanical Drawing The following mechanical drawing of the BitsyXb specifies the dimensions of the BitsyXb as well as locations of key comp
63. nections and the following additional conditions 19 System in Run mode at 104 MHz Running Linux the system is predominantly in Idle mode lt 5 CPU utilization 20 System in Run mode at 520 MHz running Linux Full 95 100 processor utilization achieved by running multiple instances of a graphics intensive application ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Syste m Specificatio ns 6 3 6 ADSmartlO Controller The ADSmartIO Controller is a second RISC microcontroller on the BitsyXb designed to handle T O functions autonomously The BitsyXb communicates with the ADSmartlO controller using the PXA270 SPI bus On the BitsyXb ADSmartlO is implemented with the Atmel ATMEGA8535 microcontroller which has 512 bytes EEPROM Absolute Maximum Ratings Input voltage any PIN oooocccccccccccocococccnnccncnnanancccnnnncnns 3 8 V Symbol Parameter Min Typ Max Units Vdd ADSmartlO supply voltage 3 3 V Rs Series resistance note 21 1 kQ Vprot note 21 V Digital Outputs 4 3 3 Vol 0 5 V Voh 2 3 3 3 V I sink see notes 21 22 20 mA I source see notes 21 22 12 mA Digital Inputs 4 3 3 Vih 0 6 Vdd Vil 0 3 Vdd Software selectable pull ups to 3 3 V R see note 23 33 120 ko A D Inputs 4 3 4 n resolution note 24 8 10 bit Rin 100 MQ Vref A D reference voltage note 25 2 5 V
64. oard and must be supplied to the backlight separately from the BitsyXb This provides the greater flexibility when selecting backlight inverters for an application See section 4 6 6 for further details about backlight control Battery Trickle Charger volume production option The BitsyXb includes a trickle charger for basic charging of external batteries The following diagram illustrates the charging circuit and a standard means of combining it with DC line power BitsyXb DC Line DCin_Pos power Ng LA VBatt_Pos VBatt_Neg Charge Ground Ground The Charge signal comes from the ADSmartlO controller port PBO and is also available on J3 pin 22 for external use Writing a logic 1 to PBO turns on the trickle charging It is up to the application to manage battery charging ADS document 110118 00013 preliminary Applieddata net 5 3 8 5 4 5 4 1 Embedded Computer Systems Power and Power Management The diode on the negative terminal of the battery allows the battery to power the BitsyXb at any time but prevents the battery from being charged by a DC voltage on the DCIN_Pos input The charge current is calculated as follows DCIN_Pos 2 0 2 V R att Teharge where Vbatt is the battery voltage Vbatt_pos Vbatt_neg and R is the charge resistor section 6 3 4 While standard systems include the charging circuit the charge resistors must be selected
65. og Touch Panel Interface four or five wire options e External PS 2 Keyboard Support 1 2 6 I O e Nine ADSmartlO ports configurable for digital I O A D inputs up to four and or up to 4x5 keypad e Ten digital I Os e Backlight Control Signals for Intensity and On off e External Temperature Probe support 1 2 7 Audio Interface e AC 97 Codec e Stereo Microphone Input e Stereo IW Speaker Outputs e Headphone Output Page 2 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Introduction 1 3 Block Diagram The following diagram illustrates the system organization of the BitsyXb Arrows generally indicate the direction of control and data flow The diagram also illustrates a composite of the three Bitsy Personality Boards Connectors not found only on all boards are drawn with dotted lines See section 2 1 2 for additional details about the personality boards Personality Board BitsyXb J8 J11 Vee supercaps Battery 37 Battery YN charger E optional P input SPI Touch panel J16 Powerinpu controller a 12C Touch panel NSSP N J11 USB a NW USB function Function port co COM1 rg COM1 COM2 gt IrDA digital I Os XScale Ea PXA270 120 RTC Wakeup LCD Backlight ac J5 P S2 Keyboard SP
66. onality board Ports that are configured for 3 3 V logic level operation go directly to the XScale and should be treated electrically as GPIOs See section 6 3 9 for electrical specifications ADS document 110118 00013 preliminary Page 29 Applieddata net BitsyXb User s Manual Embedded Computer Systems 4 5 2 Page 30 USB The BitsyXb includes signals for USB 1 1 Host and Client ports Both the USB Host downstream port and the USB Function Client or upstream port are managed by the PXA270 processor The BitsyXb can be configured as a self powered hub with one Host and one Client port To create a USB connection you must wire a standard USB socket as described in the following sections For each type of connector pin numbering is as follows Pin USB signal 1 USB_PWR 2 USB 3 USB 4 GND USB Host The BitsyXb USB Host port allows you to connect one USB device to the BitsyXb USB mouse and keyboard are the most common client devices but you can connect any USB function device that has USB drivers installed on the BitsyXb Use a Type A connector for the host signals on J10 pins 14 and 16 section 3 3 8 The mating face of such a socket is shown at left The USB standard also permits directly wiring the USB signals to the target USB device e g USB mouse To connect more than one USB client device to the BitsyXb use a USB hub The USB protocol allows client devices to n
67. onents on the board The PCMCIA ejector is integrated into the design and is not removable All dimensions are in inches This image is an excerpt from the full mechanical drawings ADS document number 630118 00004 1 525 1 O gt n MM O n oO Nn O Un w 6 1 2 Mounting Holes Four holes are provided one on each corner for mounting The diameter of the holes is 0 138 in Mounting holes are plated through and connected to the BitsyXb ground plane ADS document 110118 00013 preliminary Page 51 BitsyXb User s Manual Embedded Computer Systems Page 52 For reliable ground connections use locking washers star or split when securing a BitsyXb in an enclosure Make sure that washers do not extend beyond the limits of the pads provided Clearances The BitsyXb has a low profile It can fit in an enclosure with inside dimensions as thin as 0 759 inch 19 3 mm Key clearances are as follows e Highest component 0 425 inch 10 8 mm top 0 172 inch 4 4 mm bottom e Board thickness 0 062 inch 1 6 mm e Clearance over top bottom 0 05 inch 1 3 mm Note Selection of connectors personality board and wiring harnesses will determine height of final assembly Production Options The BitsyXb has a number of production options detailed throughout this manual This section describes options that most significantly affect the mechanical design of the board These options are generally available only for volume pro
68. panel controller Applications can use SSP3 for control of external peripherals The BitsyXb generates the SSP bit clocks from the on chip 13 MHz clock It does not support an external clock input Electrical specifications for SSP3 are listed in section 6 3 9 Consult the operating system references for details about how to use the SSP bus for external devices ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Featu re Refe rence 4 5 4 12C Bus Master PC Inter IC Bus is a multi master two wire synchronous serial bus developed by Philips for communications between integrated circuits Ics The bus master addresses devices using the data line and provides a synchronous clock for reading and writing devices Client devices respond only when queried by the master device Philips has developed many I C devices but other organizations have adopted PC as a convenient means for addressing peripherals in a system FC on the BitsyXb The BitsyXb uses the XScale processor as the I C bus controller to communicate with the real time clock section 4 2 and the CPU core voltage controller TC can also be used to communicate with external devices The following diagram illustrates the I C architecture on BitsyXb Vddx XScale o 3 ES ES J7 R135 l SCL 2 SDA W 1 e Voltage Control RTS ADSmartlO PC6 Me 4 Jio R128
69. plieddata net BitsyXb User s Manual Embedded Computer Systems 2 2 Page 6 For further details about this board please consult the Personality Board user s manual ADS document 110111 8001 ADS Ethernet Personality Board The Ethernet Personality Board uses the same circuit board as the ADS CF Personality Board An RJ 45 jack replaces the CF socket and the board adds an SMSC LAN91C111 10 100 Ethernet chip and associated line drivers Otherwise the board is identical to the CF Personality Board ADS Quad UART Ethernet Personality Board The quad UART Personality Board removes the CompactFlash socket from the CF Ethernet board described above and replaces it with four ELA 232 serial ports In all other respects the board is identical to the ADS Ethernet Personality Board Frequently Asked Questions The following are some of the most commonly asked questions for development systems Q When I plug in power my screen is white and nothing comes up on it A Check the connector seating The flat panel connector may have come loose in shipping Press it firmly into the panel and reapply power to your system Q Is there online support A Yes Information about the BitsyXb hardware and software is available on the ADS support site at http www applieddata net support See section 2 4 for further details Q When I plug in power my screen stays black A If your system has supercapacitors installed section 5 3 3
70. ps below Vsleep 6 3 1 12 PC6 and PC7 can be connected to the I C bus See section 4 5 4 for details These pins can be reconfigured as digital I Os for volume production applications ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Featu re Refe rence 4 4 Audio The BitsyXb includes an AC 97 codec for stereo audio input and output Electrical specifications for the audio system are listed in section 6 3 8 4 4 1 Microphone Pre amps The BitsyXb supports the connection of a stereo electret microphone to the MIC_R and MIC_L inputs on J10 The audio signals run through pre amplifiers that low pass filter and boost the signal before being passed on to the audio codec When connecting external electret microphones to the BitsyXb use the MIC_GND analog ground plane for improved signal to noise ratio The BitsyXb includes pull ups to power electret microphones 4 4 2 Audio Outputs Speakers and Headphones The BitsyXb audio amplifier supports both differential and single ended output devices Differential or bridge drive delivers greater output power and is suitable for speakers which can be wired independently from each other Single ended mode is used for devices like headphones which have a common ground between output channels The HP_IN input 33 32 determines the output mode of the amplifier When HP_IN is high the audio output drive is single ended when HP_IN is low the output driv
71. rd Detect and Voltage Sense lines Assume that all four lines ground the BitsyXb PCMCIA pull ups while the card is inserted e Digital I Os Review digital I O connections for potential voltage differences from external connections when the BitsyXb is asleep e USB Depending on how USB devices are powered and how the operating system handles USB USB devices may draw power during Sleep Page 48 ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems 5 5 Power Supply Examples The following are basic examples of how to configure power supplies for the BitsyXb 5 5 1 Basic DC Supply Power and Power Management The simplest way to power the BitsyXb is to supply DC power to the Vbatt_Pos input as shown below DC power System ground VBatt_Pos Ground BATPOS GND This diagram also illustrates how to connect a coin cell to the RTC circuit for systems that require the RTC to be maintained under all power conditions 5 5 2 Automotive System This system connects the BitsyXb directly to the vehicle battery but polls a sense line on the ignition to put the system to sleep when the vehicle is turned off Vehicle battery 12V Transient spike suppression 12V ignition es 8V trip 0 3 3V Vehicle ground 177 ADS document 110118 00013 preliminary VBatt_Pos digital input Grou
72. screen and cable e _ 120 VAC power adapter e Plexiglas mounting e Developer s Cable Kit including e Serial Port DB9 adapter ADS cable 610111 80001 e _ DB9F F null modem cable e Operating system of your choice e User s Guide this document and operating system guide Please make sure you have received all the components before you begin your development 2 1 2 BitsyXb Personality Boards The BitsyXb often works in tandem with another board to add functionality and customize the system for its application Personality boards can add custom circuits and locate connectors best suited for the application design In production volumes the BitsyXb can be built with interface connectors J1 J3 J9 and J10 on the underside of the board This allows the BitsyXb to rest above custom personality boards rather than below them Details about this production option are listed in section 6 1 4 At the time of writing ADS supplies a reference design for personality board Schematics are and user manuals available on the ADS support site The following sections describe the type of boards that are offered at the time of writing ADS CompactFlash Personality Board The CF Personality board breaks out signals from the BitsyXb for a wide range of functions including USB audio keyboard power serial LCD display backlight IrDA and touch screen It also includes a reset button and CF socket ADS document 110118 00013 preliminary Page 5 Ap
73. the devices to which they are connected Interrupt Signal Pin IRO Handler RgOnOff J3 45 a a AN CARDBIRO J9 27 tbd EXT IROl J10 1 PXA270 GP 10 EXT_IRO2 J10 3 PXA270 GP9 EXT_IRO3 J10 35 PXA270 GP 1 EIOn J3 J10 PXA270 Your operating system may not include drivers for all interrupt sources CompactFlash Expansion Bus The BitsyXb makes its CompactFlash bus signals available on J9 These signals can be used to add a CompactFlash socket to a daughter board or to expand the capabilities of the BitsyXb as a digital expansion bus The voltage of the bus signals are set by the CardB Vcc voltage 3 3 V or 5 V The ADS Bitsy CF and Ethernet Personality Boards use this bus for CF and digital expansion respectively The schematic ADS document number 640111 8000 available on the ADS Support Forums illustrates how to use this bus both ways PXA270 GPIO Cross Reference The following table describes how the BitsyXb utilizes the XScale GPIO lines GPn They are offered for reference purposes only Most operating systems make this information transparent to developers GP Signal Name Type Function connector section 0 Y wi I wakeup from ADSmartIO l EXT_IRQ3 I External interrupt 3 4 1 4 2 3 I2C_SCL IO 2 4 I2C_SDA 10 Eu 5 6 7 8 9 EXT_IRO2 I External interrupt 2 4 1 4 10 EXT IRO I External interrupt 1 4 1 4 11 tp 12 CPLD_CLK 13 tp tbd
74. trical specifications for Vee and Vcon are listed in section 6 3 2 Touch Panel The BitsyXb supports four and five wire analog resistive touch panels five wire control is a volume production option Connect the touch panel to the inputs on connector J3 The touch panel controller can wake the system from sleep section 5 3 3 Electrical details are listed in section 6 3 3 ADS document 110118 00013 preliminary Page 35 Applieddata net BitsyXb User s Manual Embedded Computer Systems 4 7 4 7 4 7 2 4 7 3 Page 36 Discrete IOs This section describes discrete signals on the BitsyXb that can be used for measurement and control Digital IOs The BitsyXb supplies a number of discrete digital I Os for application use These are referred to as general purpose digital inputs and outputs GPIOs as each discrete digital signal can be configured as an input or as an output The PXA270 and ADSmartlO controller drive the GPIOs on the BitsyXb The cross reference in section 4 1 6 is a complete list of all PXA GPIO ports Section 4 3 7 lists the usage of all ADSmartlO ports Electrical specifications for PXA270 GPIOs are listed in section 6 3 9 while section 6 3 6 lists ADSmartlO electrical specifications The following table lists the number of GPIOs available from each source the series resistance whether the signals include ESD protection the header number and notes about functions of the port signals
75. voltage For example a system with 44 ohm charging impedance and 1 65 F supercaps has a time constant of 73 seconds Allow at least five minutes to recharge the capacitors after the board has been disconnected from power Charge time is shorter if the supercaps aren t completely discharged The charging current for the supercaps starts out high and diminishes exponentially as the capacitors reach full charge Make sure to account for this current in your power budget section 5 4 1 The charge current is calculated as e V i eYRC R where Vi is the charging final voltage of the capacitor assume 5 0 V unless the capacitor is not charged completely Vi is the initial charge voltage of the capacitor and t is the time in seconds Use the maximum current time 0 V 0 i 0 imax V R in your power budget Discharging When power fails on a system eguipped with supercaps the operating system shuts off all power to the board and puts the system to sleep When power is restored the system remains asleep until either the system is awakened J3 45 or is reset J10 45 The amount of time that a system can remain asleep using only supercap power depends primarily on how guickly external power drops off and how guickly the operating system can put the board to sleep If the operating system can shut down the system before the power supply drops below the supercap charge level you will get significantly longer sleep time from your supercaps You
76. wing tables describe the electrical signals available on the connectors of the BitsyXb Each section provides relevant details about the connector including part numbers mating connectors signal descriptions and references to related chapters To locate pin 1 of a connector look for numbers silk screened on the component side of the BitsyXb or look at the bottom side of a connector for the sguare pad which is pin 1 As seen from the component side double 135 7 row headers on the board are numbered as shown in the figure to the right For information about the location of the connectors on the BitsyXb refer to section 6 1 1 Legend n c Not connected GND _ BitsyXb ground plane 4 1 Reference section s for signals Signal Types signal is an input to the system O signal is an output from the system IO signal may be input or output P power and ground A analog signal oc open collector output 3 3 1 J1 LCD Panel Interface Connector Board Connector Samtec STMM 117 02 T D Recommended Mating Cable Samtec TCSD Series Recommended Board to Board Connector ESOT series e g ESOT 117 02 F D 500 The following table describes the signals on the LCD interface connector Signal names shown are for TFT active matrix color LCDs at 16 bpp bit per pixel For other color depths and LCD technologies consult the table in section 4 6 4 Signals from the XScale are buffered and RFI filtered before reaching J1 See section 4 6 for further det
77. x where x is the board revision Revision History This section describes the changes in Revision 4 Initial release If you are using a BitsyXb as a replacement for the BitsyX please note these differences from revision C of the BitsyX New Features XScale PXA270 processor replaces PXA255 Adds header J11 for external supercapacitors Adds header J8 for off board Vee generator Changes In system programming and test signals from headers J4 and J5 merge into J16 System controller CPLD replaces SA 1111 for PCMCIA CF control PXA270 replaces SA 1111 for SPI and USB host functionality LCD power select shunt JP3 changes to JP2 Removes JP4 for Vee polarity now found on Vee adapter board Bottom side clearance is slightly higher increasing overall enclosure height by 0 7mm from 0 728 to 0 759 inches MMC signals on J7 change as follows Pin From To 8 MMCDAT MMCDATO 13 CS_4 GPIOSO MMCWP 14 CS_5 GPIO33 MMC IRO 15 CPLD_IO MMCPWREN 16 n c MMCDATI Page 63 Applieddata net BitsyXb User s Manual Embedded Computer Systems This page intentionally blank Page 64 ADS document 110118 00013 preliminary
78. y controller to drive liguid crystal displays LCDs Connector J1 supplies the power and data signals needed to drive LCDs while backlight and touch panel control signals are located on connector J3 Display Types Supported ADS has configured the BitsyXb for a wide variety of display types and sizes Consult the ADS support site section 2 4 for the latest list of displays supported by ADS If a display isn t on the list contact ADS Sales for information about ADS panel configuration service The XScale controller uses system memory for the display frame buffer and can drive VGA 640x480 and SVGA 800x600 displays easily Larger displays will work with the XScale with some constraints imposed by the controller architecture The ADS Support Forums provide details about the design tradeoffs that are required to support larger displays The BitsyXb can drive LVDS displays using an ADS adapter circuit LCD Voltages The BitsyXb supplies 3 3 V or 5 V power to the LCD display via J1 Select this voltage with JP2 section 3 2 1 Please observe the cautions listed with the JP2 settings Display Signals XScale display signals LDDO through LDD15 as well as the pixel clock vertical sync and horizontal sync are all buffered at a factory set voltage See section 6 3 2 for full specifications The PNL_RL and PNL_UD signals are for active TFT displays that support changing the scan direction This feature allows the display to be flipped
79. ydd ee rdd dass Dlodi 45 Charging Discharging 5 36 Backlight Power tonii norii dn YY Oa i eee as event 46 5 3 7 Battery Trickle Charger volume production Option ooooonocnnccnnonconnnoncnoncnancnnncnnccnoo 46 5 3 8 Power Supply BMiciency ue ivi WI dgy tinta FYR 47 5 4 Designing for Optimal Power Management oocoonccnonnnonononononcnnnonnnonnnonannnnonnnconocano crono ne ranonnss 47 5 4 1 Create a Power Budget for PeripheralS o oonnnnnnnnninnnncinocononcnnncnnncnnnonnnonncnnncnnccanccinoo 47 3 3 V Loads 5 V Loads Loads on Main Supply 54 2 PowerLoads During Sleep icscci ccss cde isscssapdesedscsesbeosspeeseaacebascsshsvceedcaszepesteacevesetnas 48 ADS document 110118 00013 preliminary Page v BitsyXb User s Manual Page vi Applieddata net Embedded Computer Systems 5 5 Power Supply Examples iid ii tn bid 49 39 1 Basic PC SUpply eo GYG Yn Y estes ee da 49 2 22 AUtomotiVe ysten n ir Ne E Y n 49 5 5 3 Line Power and Battery with External Charger oooconncnnonnnccnnnnconnconncnnonononanonnnconacanoo 50 o ystenr Specification Sgeti nd A AO YU 51 6 1 Mechanical SpeciliC tIOnS x ciiuiei eanu dn edd Y nt teecess bed GRY DE a e tarados 51 6 11 Mechanical Dra WEB tl aa 51 6 12 cMounnng Holes tic a 51 63 Clearances tr ld tas 52 6 1 4 Production Op Sarita ato 52 Mating Headers on Underside of Board PCMCIA Rails with no Ejector Removal of PCMCIA Header Connector Plating Microphone Gain 6 2
80. your system may be asleep Try waking up the system by shorting the wakeup signal J3 pin 45 to ground Development systems include a two pin header on the personality board whose pins can be shorted together to wake the system You may also press the reset button to fully restart the system Q When I plug in power the LED doesn t turn on A Your system may still be booting The LED is software controlled and is not necessarily turned on at boot Q Do Ihave to turn off the system before I insert a PCMCIA or CompactFlash card A No The BitsyXb supports hot swapping of PCMCIA and CompactFlash cards Consult the operating system documentation for details O Do I need to observe any ESD precautions when working with the system A Yes If possible work on a grounded anti static mat At a minimum touch an electrically grounded object before handling the board or touching any components on the board O What do I need to start developing my application for the system A You will need a flash ATA card 16 MiB or larger 32 MiB recommended and the cables supplied with your system to interface your development station to the system For further direction consult the ADS guide for the installed operating system ADS document 110118 00013 preliminary Applieddata net 2 3 2 4 Embedded Computer Systems G etti ng Sta rted O Who can I call if I need help developing my application A ADS provides technical support to g
81. ystem Sleep can also be initiated programmatically ADS document 110118 00013 preliminary Applieddata net Embedded Computer Systems Power and Power Management 5 3 Architectural Overview and Power Management Features This section provides an overview of the architecture of the BitsyXb power supply and a description of the various features of the BitsyXb power management systems 5 3 1 Power Supply Architecture The BitsyXb power supply is laid out as shown in the following diagram Incoming DC power is regulated to 5 and 3 3 V Other system voltages are derived from these power supplies TBD Diagram shown is for BitsyX BitsyX changes include external supercaps and Vee supply Vcc 5 f L ANN ed ae supercaps DCINPOS Vddi LL VBATT_POS gt Vddi to CPU core Vee z Vee h to display Vddx 3 3 V i switcher s gt linear DC_IN and VBATT voltages are mixed using a diode with a low forward voltage This allows a battery and DC power supply to be connected at the same time If only one power supply is used for your system use the VBATT_POS input See sections 5 3 7 and 5 5 3 for examples Vddi is a variable voltage power supply controlled by the XScale I C bus 4 5 4 This voltage scaling feature allows the operating system to manage power consumption over the full range of CPU clock rates Several volume production options are available an

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