NCV7240 Octal Low-Side Relay Driver Evaluation
Contents
1. IE UM e o e e e E e L a or MAM A ao o o gt 2 e lt amp pH p p mm lt lt E o gt S S D2 O D D2 O S DA 2 B75 o gt O gt O O gt O O gt O Opm gt 9 a n on ex e c ca ele cwe em sm Iconducto 3 m ON Sem r k m a L one Ra os In e a va l Ri 67 ns 15 n nd n ur RM 08 N4 Tr e wo ka em ou S SDS EN cm emu an cm e nsis OH gu e LHI cas Ri v 6 b ee 2 Rn 03 N Y USB e cs Umas o m Il NCV7240 Target Boord Rev 100 02 09 12 CSB SCLK Si SO GNO us CN INI INZ INS m Figure 3 Application Example Once the hardware 1s configured with the desired load and is interfaced with the USB to SPI adapter the user can launch the FlexMOS software Once the software is running the GUI should automatically identify the connected demonstration board and load the appropriate GUI interface for the low side drivers If the software doesn t recognize the connected demonstration board manually select the device from the drop down box If the device name doesn t appear in the drop down box the latest version of the GUI needs to be installed on the PC A detailed description of the GUI functionality for the NCV7240 is shown in Figure 4 The FlexMOS GUI is used to enable or disable the device and to control the low side driver outputs http onsemi com 5 NCV7240EVB zi x Now evaluating 1I2. Bill of Materials NCV7240 Evaluation Board Reference ae S ae ae E ame Se neo o Rem B Substitution RoHS Designator s Quantity Description Value Tolerance Footprint Manufacturer Manufacturer s Part Number Allowed Compliant C1 thru C15 P CAP CER 1UF 50V 10 E Murata Electronics a gi TE C20 c22 c23 X7R 0805 North America i ip 1206 Nur Ln Ares ita J1 J2 110 thru l l J23 325 J26 20 TEST PONT PEMET N A N A TP Keystone Electronics 127 130 PURPOSE RED CONN TERM BLOCK 2POS J3 thru J9 J32 MKDSNZ Phi Contact 1729128 ome EE Ss al ee eS CONN HEADER VERT me VE CONN HEADER 2POS 100 wad Connector J28 129 J31 22 28 4024 MOSFET N CH 20W 750MA 20W aa 5 de R12 thru RES 620 OHM 1 8W 1 R2 R3 RS hru O ee Jumper Panasonic ECG ERI 3GEYOROOV Ril 5MD l RES 200 OHM 1 8W 1 R4 1 Vishay Dale CRCW0805200RFKEA S S RES 10 OK OHM 1 8W 1 a RES 14 7K OHM LBW 1 RES 30 9K OHM 1 8W 1 R23 1 30 9K Of Vishay Dale CRCWOS80530K9FKEA RES 2 00 OHM 1 8W 1 gt 8 U2 et adaleg SOICi4_N ON Semiconductor MC14013BDR2G6 14S01C U3 on Single Inverter peu SOT 953 ON Semiconductor NL175H04P5T5G efe K lad OCTAL D barn http onsemi com 9 NCV7240EVB oe eos e eee E W125 B59 21 60 20 OO 159 poog 195181 OPZLAJN EVALUATION BOARD LAYOUT E EEFE Figure 10 Top Copper Figure 12 Board Composite http onsemi com 10 t t E ee amp o e E Figure 11 Bottom Co
3. NCV7240EVB NCV7240 Octal Low Side Relay Driver Evaluation Board User s Manual ON Semiconductor http onsemi com EVAL BOARD USER S MANUAL Description Features 8 Channels 600 mA Low Side Drivers Programmable Logic Supply Voltage 16 bit SPI Control Over Load and Over Temperature Protection The NCV7240 evaluation board provides a convenient method to evaluate the NCV7240 octal low side driver in a customer defined application environment The setup involves the use of a PC installed with custom designed software an interface board and the NCV7240 evaluation board The evaluation board is controlled using the ON Semiconductor FlexMOS GUI installed on a Selectable Open Load Detection for LED Loads personal computer PC The USB to SPI interface adapter Dedicated GUI Interface for Device Control and board provides master slave communication between the Diagnostic target demonstration board and the PC The user can control each of the eight low side outputs independently using this system setup The evaluation board s power management includes an adjustable LDO giving the option for a 3 3 V or 5 V digital supply voltage VCC selectable through the GUI An external power supply can be used by removing a jumper on the board Visual indicators dictate the board configuration through LEDs Interface Connector oS USB2SPI Target Board Adapter Figure 1 Evaluation Board Solution Semiconductor Components Ind
4. dlelre Ta BIRTH lt ek Bite SPI Clock Freq 125 kHz Note not all frequencies are exactly possible nearest will be used SPI Device Not Available NCV7240 Channel 1 Channel 2 Channel 3 Channel 4 Channel 5 M Channel 6 Channel 7 Channel 8 ON ON ON C ON ON C ON C ON C ON C OFF C OFF C OFF C OFF OFF C OFF C OFF C OFF C INPUT C INPUT INPUT INPUT INPUT C INPUT INPUT C INPUT STDBY STDBY STDBY STDBY STDBY STDBY amp STDBY STDBY SS E E ae es E Update mode Vcc Mode Frame Detection Manual Auto Polling CIN CON l LimpHome T Enable Device Update AION Global OFF Al INPUT Global STDBY TER About this Software Exit Low Side Drive Channel Control Frame Detection Allows independent control of each low side driver Displays results from TER or SPI command equivalent Output Status SPI Traffic Displays the current status of each low side driver Log of SPI commands send and received Compiled SPI Frame Push Button Control Compiled SPI frame based on the Control Input Update Transmits the compiled SPI Frame to the slave device AIION Turns all 8 low side drivers on GlobalOff Turns all 8 low side drivers off GUI Update Mode All INPUT Configures IN1 IN4 active Manual User must press Update button for any changes Global STDY All outputs off made to Low Side Channel Control to take effect Open circuit diagnostic currents off Auto Whe
5. e 5 eer Purpose Out 3 se opr carl of OUT2 ard OUTS e Po aaaea 24 VCC_USB 5 V USB voltage from the USB to SPI adapter board to the evaluation board 100 mA max Supply en VBAT Main Supply Voltage Powers the NCV7240 drivers and the onboard LDO Requirement om om Low Side O OUT1 Low Side Output 1 Driver Outputs o OUT2 Low Side Output 2 a OUT3 Low Side Output 3 a OUT5 Low Side Output 5 a OUT6 Low Side Output 6 oo OUTS Low Side Output 8 http onsemi com 3 NCV7240EVB Table 3 PIN FUNCTION DESCRIPTION comecar wm Dei O Test Points amp LED Indicator Supply Disconnect IN1 Parallel input 1 used for parallel control of OUT1 and OUT5 An LED is illuminated when the pin is high IN2 Parallel input 2 used for parallel control of OUT2 and OUT6 An LED is illuminated when the pin is high IN3 Parallel input 3 used for parallel control of OUT3 and OUT7 An LED is illuminated when the pin is high IN4 Parallel input 4 used for parallel control of OUT4 and OUTS An LED is illuminated when the pin is high CSB Chip Select Bar signal produced by the master CSB LED is illuminated when CSB transition to a low state SCLK Serial clock signal generated by the master Serial input data from the master Serial output data from the slave Digital Supply voltage VCC LED is illuminated when the LDO is regulating Chip Ground J28 J28 disconnects the VBAT supply from the board No power is delivered to the LDOs when the jumpe
6. icers employees subsidiaries affiliates and distributors harmless against all claims costs damages and expenses and reasonable attorney fees arising out of directly or indirectly any claim of personal injury or death associated with such unintended or unauthorized use even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part SCILLC is an Equal Opportunity Affirmative Action Employer This literature is subject to all applicable copyright laws and is not for resale in any manner PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT N American Technical Support 800 282 9855 Toll Free ON Semiconductor Website www onsemi com Literature Distribution Center for ON Semiconductor USA Canada P O Box 5163 Denver Colorado 80217 USA Europe Middle East and Africa Technical Support Order Literature http www onsemi com orderlit Phone 303 675 2175 or 800 344 3860 Toll Free USA Canada Phone 421 33 790 2910 Fax 303 675 2176 or 800 344 3867 Toll Free USA Canada Japan Customer Focus Center For additional information please contact your local Email orderlit onsemi com Phone 81 3 5817 1050 Sales Representative EVBUM2052 D
7. n the Low Side Channel Control is changed the TER Retrieves Transmission Error information Update button is automatically triggered Displayed in Frame Detection box Polling the Low side Channel Control is updated periodically ata predefined interval This will show a constant flow of data in the SPI Traffic box Check Box Control Enable Device Enables or disables the integrated driver Limp Home Activates channels 1 4 as per the datasheet INx Parallel input pair control See datasheet for details VCC Mode Programs the onboard LDO for either 3 3V or 5V Figure 4 GUI Overview http onsemi com 6 NCV7240EVB TYPICAL CHARACTERISTICS Tek Run 50 0kS s Sample at A eae ie eee C1 Max 38 2 V Figure 5 Typical Output Clamping Action Typical Operation Figure 5 above highlights the clamping action clamped to 38 2 V of the NCV7240 as the device turns off when driving an inductive load In this case a relay has turned off The slight hump in the decaying waveform is caused from the mechanical relay action of the system Transmission Error TER The NCV7240 device includes a transmission error detection feature whereby a transmission error bit count not VDDA J2 J8 1OSTPWR L le 12 U3 CSB R2 1 IN VCC GND ai NC OUT NL17SH04 oin C23 To C3 C4 C5 CD C7 C8 c9 Ep otup anel 0 1uF Jo 0 1uF l 0 1uF gn o tuE 0 1uF S 0 1uF a multiple of 8 16 bit minimum is reported
8. on the SO pin after CSB goes low until the first rising edge of SCLK Detection can be performed by clicking on the TER button in the GUI Since SI is OR d with the TER fault it is important to understand that if the LSB bit BO is set high on the previous frame the TER should be ignored This is because SI holds the value of BO until the first SCLK rising edge and TER is latched in before the first rising edge of SCLK VEAT SSW BAT C10 Opt Opt Opt Opt Opt Op Opt Opt J32 Figure 6 Evaluation Board DUT http onsemi com NCV7240EVB 0Ohm R5 0Ohm R6 0Ohm RY Vcc 0Ohm R8 00hm R7 00hm R10 Q U4 00hm R11 MM74HC573 SOEIAJ UES 1 INT 2 19 J12 IN2 3 J14 S IN3 4 J13 IN4 5 J17 1 EN 6 J16 o LHI J15 O CSB Vcc 11 1 J23 O 1 VCC USB 24 SS S CSBX amp 0 si K PI2 8 J26 6 5 O TER 7 LHI LHI REL NA INT 0 ro IN2 N V5 EN V3p3 EN B T IN3 a PO6 D S A IN4 INA 4 SDA pt SCL Vec VDDA R20 ad 00hm U5 AT24C01A VCC USB C1 0 1 Figure 7 Evaluation Board Interface JUMPER VBAKK 10428 62 VIN C15 C16 100nF 1uF R22 14 7k V5 EN bil VS EN lt MGSF1NOZLT1 J30 O 1 U7 NCV4274 JUMPER 1 3 1531 o2 C20 Cai 100nF 1uF C19 D11 ons amp a LED 7 j E Ky Figure 8 Evaluation Board Power http onsemi com 8 C18 22uF VDDA C13 0 1uF D3 D2 LED LED KK KK Q_CSB Q_VCC J18 J19 J20 J22 D9 J25 OOOOO JUMPER VDD 15329 02 D10 LED KE NCV7240EVB
9. pper Figure 9 Silk Screen amp Drill Holes NCV7240EVB ON Semiconductor and uD are registered trademarks of Semiconductor Components Industries LLC SCILLC SCILLC reserves the right to make changes without further notice to any products herein SCILLC makes no warranty representation or guarantee regarding the suitability of its products for any particular purpose nor does SCILLC assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability including without limitation special consequential or incidental damages Typical parameters which may be provided in SCILLC data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating parameters including Typicals must be validated for each customer application by customer s technical experts SCILLC does not convey any license under its patent rights nor the rights of others SCILLC products are not designed intended or authorized for use as components in systems intended for surgical implant into the body or other applications intended to support or sustain life or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application Buyer shall indemnify and hold SCILLC and its off
10. r is disconnected J29 J29 disconnects VDD supply from the LDO to the board When the jumper is disconnected the board can be powered from an external supply J31 J31 disconnects VDDA supply from the LDO to the board When the jumper is disconnected the board can be powered from an external supply http onsemi com 4 NCV7240EVB OPERATIONAL GUIDELINES The material necessary to successfully use the evaluation boards 1s listed below PC running the latest Onsemi FlexMOS GUI USB cable Type A to Type B USB to SPI Interface Adapter with Ribbon Cable NCV7240 Evaluation Board Power Supply Resistive LED Inductive or Motor Load An application example of the NCV7240 driving relays is shown in Figure 3 Figure 3 shows J28 J29 and J31 jumpers USB to SPI Interface Adapter SPland 1 0 nterface gt Activity Version 2 0 1 inserted This powers the on board LDO regulators for VDD and VDDA Both VDD and VDDA light their respective LED D10 and D11 when powered The multiple VBAT connectors on the terminal blocks help the user connect loads in the system by providing a connection which provides capability for two wires per terminal site When VBAT voltage is applied to the board the onboard regulator regulates the VDD voltage By default VCC is regulated to 3 3 V but this can be adjusted to 5 V via the GUI VCC power to the board is provided via VDDA through R20 and is shown active with diode D2
11. ustries LLC 2012 1 Publication Order Number April 2012 Rev O EVBUM2052 D NCV7240EVB Supply Input Low Side Outputs Ground E o l o o o o o ooo ooo olol oloo a S Z S 5S S S S S DD BZD gozoa e gt O gt O O gt O O gt O Om o o e e jo Lea S hee ea coo S oe IO ON Semiconductor o E o mM Sa t e TE M S TR n SE eos q EN L tw 0 KJ C as ih orf K tL ec E aa mu x E ce aa e o LS rA maos LM o ea 03 css S a V us Ca ca ny 02 vec a e e NCV7240 Torget Boord Rev L00 02 09 12 m OK Q O GO Wi mm N N4 Test Points LED Indicators Supply Disconnect Figure 2 Evaluation Board Table 1 ABSOLUTE MAXIMUM RATINGS tng H Tri Main Supply Voltage to output pins OUTx 0 3 to 36 USB to SPI Interface Adapter Connector Pins 0 5 to 5 5 Junction Temperature NCV7240 40 to 150 C Ambient Temperature Evaluation board 40 to 105 E Stresses exceeding Maximum Ratings may damage the device Maximum Ratings are stress ratings only Functional operation above the Recommended Operating Conditions is not implied Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability Table 2 RECOMMENDED OPERATING CONDITIONS mwm O http onsemi com 2 NCV7240EVB Table 3 PIN FUNCTION DESCRIPTION Connector Fees TerminalName Beans o e Pos omaituomomas E vem GererarPupose Output a use comolmgme LDO reen
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