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2.47 MB - ComBlock

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1. Left connector avoas 14 98 pin Straddle lesece Mount Connector U6 Top view J9 P N Sullins NWE49DHRN T941 z gt Mounting hole 2 amp 0 160 0 160 J7 EXT REF t Input external 10MHz Corner 0 000 0 000 SMA female Edge Mount SMA center pin 0 510 0 180 Mounting hole diameter 0 125 Maximum height 0 500 COM 300x module 5VDC Power Serial Link Terminal Block 90 deg Female 90 deg Mounting hole o GND 5V Od 0 160 2 840 J D gt o IP1 a 0 280 1 750 S 5 RF input SMA male 90deg TOP view J4 SS J5 we A1 pin J3 POPUP TP2 PLL CLK 88 0 100 0 360 2 rows x 6 pin eo ce i i i aes female 90 deg jounting hole bo 0 160 0 160 J6 PERET z B1 B6 pO Al AG eX Output B 10 MHz Ref Input Corner 0 000 0 000 2 rows x 6 pin male 90 deg Mounting hole diameter 0 125 A1 pin height 0 039 Maximum height 0 500 SMA male 90deg 02001602 dsf 11 Mounting hole 2 840 0 160 corner 3 000 3 000 Mounting hole 2 840 2 840 A1 pin 2 900 2 250 Output A 2 rows x 20 pin male 90 deg Mounting hole 2 840 0 160 Ordering Information MSS e 18221 A Flower Hill Way Gaithersburg Maryland 20879 U S A Telephone 1 240 631 1111 Facsimile 1 240 631 1676 E mail sales comblock com Skype mss_az mss_blb Online store www comblock com zencart
2. 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440 460 480 AW lh 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440 460 480 Plot Settings Autoscale x Min x Max Y Min Max 225 195 165 135 105 75 20 40 60 Trigger Settings Signal Representation Threshold Edge Disabled s bit Unsigned o v Falling x Posit 0 Rescale Apply Changes Re arm Trigger Force Trigge User can Select the default personality after Multiple Personalities and reset power up Dynamic Reconfiguration FPGA based_ digital ComBlock modules are capable of multiple personalities and dynamic reconfiguration whereby the FPGA can embody on demand one of multiple personalities stored in non volatile flash memory Reconfiguration is ordered by a user over the selected communication link between user and ComBlock assembly serial LAN PCMCIA or USB whichever is applicable Typical FPGA reconfiguration time is between 0 1 and 4 seconds depending on the ComBlock as listed in the specifications FPGA configuration data can be programmed into Flash memory one at a time without affecting the other FPGA configurations already stored within the Flash memory Dynamic reconfiguration of the FPGA does not require any special VHDL programming All ancillary tools are supplied with the ComBlock ComBlock hardware platforms supporting the dynamic rec
3. com MSS 2000 2014 Issued 9 14 2014 FPGA Development Platforms In addition to the off the shelf pre programmed modules users can develop custom applications by using interface compatible FPGA development modules COM 1700 1500 3011 1400 1300 1200 with large parallel computation capabilities Multiple FPGA configurations personalities can be programmed into the board Flash memory using the supplied ComBlock control center software The FPGA is configured automatically at power up For even larger FPGA projects several modules can be concatenated FPGA modules are best suited for recursive highly parallel time critical signal processing such as high speed modulation or demodulation ARM Development Platforms 32 bit ARM processors provide additional sequential computation capabilities in several modules COM 1700 1500 3011 3505 These modules complement FPGA based modules by providing flexible memory intensive processing Path to Production Project evolution from prototyping to larger production runs is made easy by the availability of reasonably priced VHDL source code Price and availability for the most common VHDL IP cores are listed at www comblock com product_list_ IP html Modularity To maximize interoperability among ComBlocks the interfaces are restricted to four main connector types 98 pin PCI express 40 pin headers standard 2mm 2 rows 20 positions SMA UMCC ultra miniatu
4. dual 16 bit 250 MS s DACs dual 12 bit 150 MS s ADCs COM 2001 Dual Digital to Analog conversion and anti aliasing filtering up to 125 Msamples s COM 2802 Synchronized 8 channel 900 Msamples s_ digital to analog conversion COM 30xx Radio Frequency receivers include ing frequency synthesizer AGC low pass filter and dual A D converters Several low pass filter bandwidths are offered COM 3010 925 2175 MHz receiver LNB compatible COM 3011 20 MHz 3 GHz receiver SDR development platform L band 900 1575 MHz receiver L band 1500 1740 MHz receiver Modulators et ae COM 3006 PCS frequency band COM 1402 1850 2050 MHz receiver me COM 3007 2 3 2 8GHz receiver A D TTS conversion up to 105 Msamples s COM 3008 0 200 MHz receiver 10 bit 210 Msamples s A D converters AGC and low phase noise synthesized sampling clock Well suited for IF undersampling as well as baseband sampling COM 3009 Similar to COM 3008 but with 12 bit precision 105 Msamples s COM 3501 1W UHF Transceiver 225 400 MHz for two way half duplex communications 70 MHz 2 2GHz 4 channel quadrature modulators COM 40xx Radio Frequency modulators in cluding low phase noise frequency synthesizer direct I Q modulation optional output power measure ment modulator modulator Cellular band 800 1000 MHz modulator PCS frequency band 1850 2050 MHz modulator L band 850 1600 M
5. Com Block Rapid Prototyping Communication Modules Rapid Prototyping ComBlock is an innovative approach to developing communication equipment Low cost building blocks pre programmed with essential communi cation processing functions can be daisy chained to form complex communication equipment The ComBlock architecture is aimed at rapid prototyping developing software defined radios and building cost effective low volume semi custom equipment The layered organization of communication systems is reflected in the ComBlock modules available the ComBlock family includes network digital analog and radio frequency functions Technologies span FPGAs ARM processors analog and RF all connecting seamlessly ComBlocks can be assembled in a three dimensional structure for maximum volume efficiency A single LAN USB CardBus or serial connection allows remote monitoring and control of the entire assembly from the ComBlock control center software included irrespective of the number of constituent modules New FPGA software versions can be downloaded into the modules from the ComBlock control center Each module requires a 5V DC supply Most modules are in stock and typically ship within 24 48 hours A phbhhbebR EDP PEPE Bb 3 x3 low power modem development board MSS 18221 A Flower Hill Way Gaithersburg Maryland 20879 U S A Telephone 240 631 1111 Facsimile 240 631 1676 Wwww ComBlock
6. Documentation www comblock com download html 12
7. Hz modulator COM 4101 RF Transmit Redundancy module Software controlled A B swith COM 1202 directs RF to one of two paths EEE 1OMHz 1 5 GHz 17 dB gain Piap 9 5 dB COM 4103 L S band 10W power amplifier LNA COM 1008 PSK QAM APSK digital modulator up to 22 MSymbols s Includes pseudo random bit stream generator USB 2 0 data interface Direct sequence spread spectrum digital modulator Up to 60 Mchip s Spreading codes Gold sequences LFSR sequences Barker codes or GPS C A codes FSK MSK GFSK GMSK digital modulator 2 4 8 ary Programmable data rates up to 30 Mbit s modulation index BT product 0 3 and 0 5 Direct Sequence Spread Spectrum digital demodulator Up to 60 Mchip s Fast parallel acquisition Maximum processing gain 33 dB Spreading factor 3 to 2047 Maximal code period 65535 Integrated PSK modem including PSK modulation demodulation convolutional error correction encoding and decoding V 35 scrambling HDLC framing TCP IP network interface and USB 2 0 interface PSK QAM APSK digital analog modulator and demodulator up to 22 MSymbols s Includes built in BER measurement and pseudo random bit stream generator USB 2 0 data interface Same as above plus 10 100 Mbits s LAN TCP IP interface FSK MSK GFSK GMSK digital demodulator 2 4 8 ary Variable decimation 1 1024 AGC control Pilot tone detection for frequency calibration Used as pre processing for low data rate demo
8. ata and insert an HDLC like frame structure prior to convolutional encoding The resulting data stream undergoes direct sequence spread spectrum digital modulation in the COM 1519 module The signal is then converted to analog baseband low pass filtered to reject spurious spectral lines and out of band signals COM 2001 The last module COM 4008 synthesizes a low phase noise carrier High frequency stability can be obtained by locking the carrier frequency to an external ultra stable 10 MHz reference clock The carrier frequency is user selectable over the range 850 MHz to 1 6 GHz In order to keep the RF modulated signal at a fixed power level an accurate RF power measurement is performed in the last stage The user can control the transmitted power accurately over at least 20 dBs Several test modes are included in this assembly including transmitting a known 2047 bit pseudo random sequence Mechanical Interface Example COM 15xx module pin 3 D 1 504 2 755 comer 3 000 3 000 Mounting hole Qe 2 840 2 840 Right connector 98 pin Straddle Mount Connector P N Sullins NWE49DHRN T941 Mounting hole USB DEV use HI SPEED 0 160 2 840 port MiniAB Data port MiniAB 5VDC Power N pin 1 5V Terminal J2 J1 0 954 2 500 Block 90 deg Mes 33 in A1 Top j gt 3 pin GND 5VDC 0 000 2484 25 Test points J4
9. dulators to prevent aliasing Error Correction COM 1209ASOFT 1Gbit s BCH encoder decoder DVB S2 standard IP VHDL source code COM 1509 Error correction codec 120 Mbits s Convolutional encoding Viterbi decoding K 5 7 9 V 35 scrambling HDLC framing K 5 rate 1 7 K 7 rates 1 2 2 3 3 4 5 6 7 8 K 9 rates 1 3 1 2 2 3 COM 7002 Turbo code encoder decoder Includes unique word frame synchronization interleaving scrambling and CRC COM 1006 Reed Solomon Encoder DVB standard Intelsat standard other commonly used RS codes Network Baseband Interfaces COM 5401 4 port 10 100 1000 MBps Ethernet Transceivers for FPGA based ComBlock modules COM 1600 COM 1500 4 RJ 45 COM 5102 l port Gigabit Ethernet 10 100 1000 HDMI video in out for FPGA based ComBlock modules COM 1500 1 RJ 45 ports 2 HDMI ports COM 5003 TCP IP USB Gateway Connects ComBlock assemblies to a host computer over USB 2 0 or LAN TCP IP 10Base T 100Base Tx Supports 3 concurrent TCP IP sockets for high speed data 2 and monitoring and control 1 Maximum sustained throughput 53 Mbit s over TCP IP 86 Mbit s over USB 2 0 COM 5404 IP Router Typical application UDP video streaming to from a synchronous data link COM 5101 Signal Power conditioning interface module Supports 4 full duplex RS422 interface signals Includes DC DC converters for 6 26V supply All signals conveyed over a single DB25 connect
10. nnectivity plans so that we can Spartan 3 XC3S400 amp CardBus supply the appropriate module to module adapter s Ease of Assembly Complex communication systems can be created in three easy steps 1 Connect 5V DC power to each ComBlock module ERAR EADS 2 Connect the monitoring and control link between one of the ComBlock modules within the assembly and the host computer This connection is not mandatory at run time as each ComBlock module retains its configuration Step 3 Plug in other ComBlock modules so ee eee nee i Pattern AG Generator ere sees ae i Dual D A converters The assembly is now ready to run Conformal Assemblies ComBlock modules can be assembled in a variety of two dimensional or three dimensional shapes to fit within standard size chassis or enclosures Ease of Operation ComBlock assemblies can be controlled and monitored over a single connection with a PC Five connection types are supported by the ComBlock Control Center graphical user interface e Network TCP IP over a 10 100 1000 Mbps LAN RJ 45 connector e USB 2 0 high speed e PCMCIA CardBus e 115 2 Kbaud s asynchronous serial link DB9 connector e Simulated connection with a module The ComBlock Control Center software provides a simple user friendly method for monitoring and control in four easy steps 1 Connect with the ComBlock assembly File Operations Functio
11. ns Help Auto Detect LANJIP IP address USE comblock_usb_0 3 Automatically detect the constituent modules of the assembly ComBlock Control Center File Operations Functions Help SVE geeauns COM5003 TCP IP USB GATEWA COM1019 Direct Sequence Spread Spectrum Modula COM4004 70 MHz IF Modulator 4 Download firmware when new versions are available 5 Monitor and control each module COM4004 70 MHz IF Modulator Basic Settings IF Center Frequency 69999999 Hz Gain Control 10 MHz External Frequency Reference Unmodulated Test Mode Output On Cancel The actual configuration resides in each ComBlock in non volatile memory It is automatically loaded at power up Thus remote configuration is not required once the ComBlocks are configured Custom monitoring amp control applications can also be developed The messages and protocols for communicating with ComBlocks are described in an API document ComScope Most FPGA based digital ComBlock modules are equipped with the ComScope data capture capability to help users visualize otherwise hidden digital signals These modules are identified with the Internal digital signals whether binary or digital representation of analog signals can be stored in real time into internal memory then exported to a host computer for plotting storage and further proce
12. onfiguration are identified with the amp icon Fy ComBlock Control Center File Operations Functions Help COM1505B PSK Modem Convolutional FEC TCP IP N COM15058 PSK Modem Convolutional FEC TCP IP Network Interface m Personalities Index Personality Option Defaut Authorized Boot Protection Address 1500 Yes Yes 0 1505 D Yes No 4325376 1505 Yes No 8650752 1505 Yes Mo 12976128 1505 Yes Na 17301504 1505 Yes Mo 21626880 1505 Yes Na 25952256 1524 D Yes No 30277632 l Add Remove Modify Personality Index Personality Option Password Set Default Add ModiFy 10 Application Example Spread Spectrum L band Modulator Using five modules one can easily assemble a variable data rate spread spectrum L band modulator DATA_IN LAN IP socket or USB 2 0 COM 5102 oN 1203 COM 1519 Convolutional 1ch GbE DSSS m gt encoder m gt Monitorin 10 100 1000 digital i LAN adapter T modulator amp Control p HDLC framing LAN IP socket2 or USB 2 0 COM 4008 COM 2001 lt 850 1600 MHz Dual DAC RF out RF modulator 10 MHz frequency reference The user forwards data to be transmitted over the LAN to a TCP IP socket or alternatively through a USB 2 0 connection between PC and COM 1509 The data to be transmitted is encoded by a convolutional error correction code COM 1509 The same module can also scramble the d
13. or COM 1524 COM 1014 COM 1016 Scrambling Stream Formatting Software defined ratio development Y03007R4 Card edge adapter for ARM or Atmel Signal Generators Test Modules micro programming through JTAG or DB 9 serial Real time digital channel simulator featuring multipath fading white Gaussian noise frequency trans lation and long propagation delay User Interface COM 6001 LEDs dual 7 segment displa Channel emulator with analog FPGA ARM Development Platforms input output 64 MSamples s Up to 40 paths Typical applications Power line channel emulator FPGA ARM GbE USB2 Wireless channel emulator a gi NAND dual ADCs dual DACs Bit Error Rate measurement module F Development platform Optimized for low FPGA ARM DDR2 SODIMM Arbitrary waveform generator n Wg socket USB2 NAND 256 MB or 1GB SDRAM a development platform Powerful Variable sampling rate and precision digital signal processing hardware from 1 to 20 bits and up to 40 comprising Msamples s 32 bit ARM processor 120 MHz High speed data acquisition Spartan 6 LX45 or LX150 256 MB DRAM Gbit s throughput 50 FPGA DDR2 SODIMM socket for MHz sampling rate Variable sample large 64 bit wide memory module precision from 1 to 20 bits 1Gbit NAND flash memory USB 2 0 COM 3011 20 MHz 3 GHz receiver FPGA ARM Standard Triple Data Encryption platform comprising Xilinx Algorithm TDEA Can be u
14. re coaxial Likewise for maximum interoperability baseband signals are generally represented as one of two simple natural interfaces 2 10 12 14 bit complex In phase and Quadrature baseband interface or analog baseband I amp Q interface and gain controls These simple natural interfaces maximize the number of possible combinations between RF and digital signal processing modules and facilitate the interface with user supplied i e non ComBlock components For example a digital demodulator can be connected to many interchangeable RF receivers depending on the frequency band of interest as illustrated below 400 3000MHz custom COM 3506 COM 1700 E 70MHz 140MHz custom up to 700MHz COM 3504 Mi 0 200MHz 20 3000MHz COM 3011 925 2175MHz COM 3010 1150 1400MHz 2300 2800MHz COM 3007 2400 2500MHz 4 9 5 85GHz COM 3505 900 1575MHz COM 3002 1500 1740MHz COM 3003 aay 800 1000MHz COM 3005 a 1850 2050MHz COM 3006 a COM 3501 MGS 225 400MHz COM 3008 EEE 0 200MHz COM 3009 E 0 200MHz 1500 2700MHz COM 4103 ComBlock receivers frequency bands ComBlock Family Analog IF RF Front End COM 3506 400 MHz 3 GHz customizable transceiver COM 1700 Baseband 70 MHz or 140 MHz receiver SDR development platform COM 3505 Dual ban 2 4 5 GHz 2x2 MIMO transceiver COM 3504 Dual Analog lt gt Digital conversions including
15. sed for Spartan 6 LX16 FPGA encryption or decryption 32 bit ARM processor 120 MHz Maximum data rate 140 Mbit s USB 2 0 Bit Interleaver Deinterleaver COM 1200 FPGA development platform 8 branches 1024 depth cell m eA Analog front end amp USB 2 0 Based 20 Mbps max ws on the Spartan 3 XC382000 Signal Diversity Combiner Analog front end includes dual Signal Diversity Splitter high speed 10 bit ADC dual high speed 12 bit DAC and multiple Con nectivity lower speed DACs and ADCs COM 9105 COM 9107 COM 9108 COM 9112 COM 9109 COM 9113 Included with FPGA configuration remains in non volatile flash memory and is automatically reloaded at power up Remote monitoring and control from the ComBlock control center COM 1400 FPGA development platform zs gi J Spartan 3 XC3S400 amp USB 2 0 oF Modules can be stacked for large 98 pin to 98 pin connector 98 pin to 40 pin male connector 40 pin female to 98 pin connector 98 pin to 40 pin female connector 98 pin to two 40 pin female connectors for use with COM 3505 2 40 pin female to 98 pin male for connecting two COM 30xx receivers to a FPGA module VHDL design development FPGA configuration remains in non volatile flash memory and is automatically reloaded at power up Remote monitoring and control from the ComBlock control center the relevant ComBlock modules Please COM 1300 FPGA development platform let us know your co
16. ssing The ComScope user manual is available at www comblock com download comscope pdf omScope FSK MSK GFSK GMSK DIGITAL DEMODULATOR Trace Settings Trace Signal Representation Sampling Clock Decimation Visible Plot style x e bit Signed x Nominal see specs x fia Off x IV Lines Color Export A x 4 vr 0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440 460 480 500 0 20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320 340 360 380 400 420 440 460 480 500 Plot Settings Trigger Settings Position Disabled x e bit Unsigned fo x Falling x 0 x Close Apply Changes Re arm Trigger Force Trigger Pict Y Min Y Max 63 80 wtoscale X Min Rescale Signal Representation Threshold Edge M fi 8 X Max 4 ComScope Window Sample showing GMSK demodulated phase blue and reconstructed unfiltered symbols red omBlock Control Center Operations Functions Help we Genus gt M5003 TCP IP USB GATEWAY COM1028 FSK GFSK MSK GMSK Digital Modulator COM1027 FSK MSK GFSK GMSK Digital Demodulato B iee ComScope COM1027 FSK MSK GFSK GMSK Digital Demodulator Trace Settings Trace Signal Representation Sampling Clock Decimation Visible Plot sats Color Export 1 v 1 v 8 bit Unsigned x Nominal see specs jt 1 OFF v v L _ 0 20 40 60 80 100 120 140

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