PCIe-IDIO-24 User Manual - ACCES I/O Products, Inc.
Contents
1. eeeeessiseeseieeeeeeneeeee enne nennt nnn annia nannte nnns 17 Table 6 3 DB37F x 2 Pin Assignments for model PCle IDxx 24 only s 18 Table 6 4 DB78F Pin Assignments for Model PCle IDIO 12 serene 19 Table 6 5 I O Signal Names Directions and Descriptions for Model PCle IDIO 12 20 Table 6 6 DB37F Pin Assignments for Model PCle IDIO 12 senes 21 Chapter 7 Specification ito ade een i aces Eege Ta ade tec co deat cle iac ooo cia aD 22 Customer COMM O S tait Irt tate aces Matic ck ao a pa fade seas consed La nec co dente tt dE are deian 23 4 Manual PCle IDIO 24 Chapter 1 Introduction The PCle IDIO 24 provides isolated digital inputs with Change of State Detection and isolated FET high side switches The board has twenty four optically isolated input circuits for AC or DC control signals and twenty four isolated FET high side switches The board occupies sixteen consecutive addresses in I O space Read and write operations may be 8 16 or 32 bits wide Several versions of this board are available The PCle IDIO 24 also has eight TTL level non isolated I O lines Model PCle IDIO 12 provides twelve isolated inputs and outputs and four TTL CMOS 1 O lines Features 24 optically isolated non polarized digital inputs o Software configurable filters on inputs for electrically n2. 68 No Connection 30 ims 69 No Connection 31 No Connection 32 No Connection 33 No Connection 34 No Connection 35 No Connection 36 37 38 39 Table 6 4 DB78F Pin Assignments for Model PCle IDIO 12 Manual PCle IDIO 24 Signal Name l O Signal Description Name IN COMMONO In Common Return for INO thru INS INO thru IN1 1 In Isolated Inputs 3 to 31VDC or 22VACrms IN COMMON 1 In Common Return for IN6 thru IN11 IN12 thru IN23 In Isolated Inputs 3 to 31VDC or 22VACrms TTLO thru TTL7 I O 5V Logic Pulled up via 10kO 5V Out Unfused 5V connection GND Out 5V and TTLx Return connection VBBO In Common External Supply connection for OUTO thru OUT5 VBBO In Common External Supply connection for OUTO thru OUT5 OUTO thru OUT5 Out Switched VBBO High Side FET Outputs VBB1 In Common External Supply connection for OUT6 thru OUT 11 VBB1 In Common External Supply connection for OUT6 thru OUT11 Table 6 5 I O Signal Names Directions and Descriptions for Model PCle IDIO 12 20 Manual PCle IDIO 24 The breakout solution for the PCle IDIO 12 consists of a DB78M to DB37F cable As part of a kit the DB37F plugs into an STB 37 screw terminal card which easily mount into a length of SNAPTRACK The cable is six 6 feet long PIN NAME IN COMMONO INO IN1 IN2 IN8 6 INQ IN10 8 45V 9 TTLO 10 TTL2 11 VBBO 12 OUT4 13 OUT2 1
3. connection for OUT18 thru OUT23 OUT18 thru OUT23 Out Switched VBB3 High Side FET Outputs Table 6 2 I O Signal Names Directions and Descriptions Figure 6 1 DB78M Mating Connector Manual PCle IDIO 24 Termination Solutions The breakout solution involves a Y cable that terminates into two identically pinned out DB37F connectors As part of a kit these connectors plug into the STB 37 screw terminal cards which easily mount into a length of SNAPTRACK The Y cable is six 6 feet long on each leg PIN NAME NAME 1 IN COMMONO 2 INO 3 IN1 IN7 a m2 ENE 5 wis 7 wu 8 5V 5V s rro 10 TTL2 11 VBBO 12 our4 13 oure 14 ouro 15 VBB1 16 ourto 17 OUT8 18 Toure 19 VBBO 20 Ins m wi 22 INS z mis ESNE 25 N7 26 IN COMMON 27 GND GND 28 TTL1 29 TTL3 30 OUTS 31 OUT3 32 Tour 33 No Connection amp ourn 35 OUTS e our7 Table 6 3 DB37F x 2 Pin Assignments for model PCle IDxx 24 only 18 Manual PCle IDIO 24 Pin Nam Pin Name 5 5V No Connection 10 No Connection 1 No Connection 12 No Connection 13 No Connection 14 No Connection 15 No Connection 16 No Connection 17 No Connection 18 No Connection 19 No Connection 2 No Connection 21 IN3 60 No Connection 2 No Connection 2 No Connection 4 No Connection 2 No Connection No Connection 27 IN COMMON 66 No Connection 28 GND 29 ttt
4. range Consult with the factory for available modified input ranges Each input bank 12x2 contains a switchable filter that has a 4 7 millisecond time constant Without filtering rise time response is 10us fall time is 30us The filter must be selected for AC inputs in order to eliminate the on off response to the AC zero crossing The filter is also valuable for use with slow DC input signals in a noisy environment The filters may be switched out for DC inputs in order to obtain faster response Filters are selected by the user s software Manual PCle IDIO 24 Interrupts When configured by the user s software the board asserts an interrupt whenever any enabled inputs change state from HIGH more than 3V to LOW less than 3V LOW to HIGH or both This is called Change of State COS detection See the programming section for a discussion of the COS interrupt management scheme Outputs The solid state outputs are comprised of twenty four fully protected FET high side switches The FETs have built in current limiting and are protected against short circuit over temperature ESD and inductive load transients The current limitation is activated until the thermal protection acts The FETs are all off at power on CONTAINED IN PLD FILTER SOFTWARE ENABLES FILTER SELECTS ADDRESS AND CONTROL INPUT LOGIC REGISTER WITH SWITCHABLE FILTERS CHANGE OF OUTPUT STATE DETECT REGISTER SUPPORTS WITH RISING FALLING READBAC
5. to continuously poll inputs 1 To enable interrupts SET the appropriate bit s in the 8 bit COS Enable Register at offset E a Each bit maps to a group of eight inputs as described above b Each group of eight can be configured to generate a COS IRQ on either the rising transition the falling transition or both 2 Read the 4 byte 32 bit block beginning at offset 8 to see what inputs have changed 3 If interrupts were enabled and if any of the bits in the block are SET then an IRQ will be generated 4 To clear interrupts write the value read from the 32 bit COS Status register at offset 8 to the 32 bit COS Clear register at offset 8 This technique will clear the COS latch only for those bits your software has successfully detected as having changed while allowing other bits to generate COS states in the time between the Status Read and the COS Clear 15 Manual PCle IDIO 24 Chapter 6 Connector Pin Assignments Digital I O signals are connected to the card via a female 78 pin D type connector that extends through the back of the computer case The mating connector is an AMPLIMITE 1658674 1 or equivalent We optionally provide a breakout cable that divides the 78 pin I O connector down to two female 37 pin D type connectors See the following pages for information about termination solutions Pin Name Pin Name IN20 Si TT 10 TTL6 1 VBB2 72 OUTIS E Step 14 OUTI2 15 VBBS 16 OUT22 7 OUT20
6. 18 OUTIS E VBB2 2 Ve a is fo 22 n foa 23 ns fe 24 Nis IS 2 2 27 IN COMMON 66 IN_COMMONI 23 en 67 enD 2 Tii Je me so ms Ip m 31 OUT17 OUT15 33 OUT13 3 No Connection 35 OUT23 36 OUT 37 38 39 Table 6 1 DB78F Pin Assignments J2 for Model PCle IDxx 24 16 Manual PCle IDIO 24 Signal Name l O Signal Description Name IN COMMONO In Common Return for INO thru IN11 INO thru IN11 In Isolated Inputs 3 to 31VDC or 22VACrms IN COMMON 1 In Common Return for IN12 thru IN23 IN12 thru IN23 In Isolated Inputs 3 to 31VDC or 22VACrms TTLO thru TTL7 I O 5V Logic Pulled up via 10kO 45V Out Unfused 5V connection GND Out 5V and TTLx Return connection VBBO In Common External Supply connection for OUTO thru OUT5 VBBO In Common External Supply connection for OUTO thru OUT5 OUTO thru OUT5 Out Switched VBBO High Side FET Outputs VBB1 In Common External Supply connection for OUT6 thru OUT 11 VBB1 In Common External Supply connection for OUT6 thru OUT11 OUT6 thru OUT11 Out Switched VBB1 High Side FET Outputs VBB2 In Common External Supply connection for OUT12 thru OUT17 VBB2 In Common External Supply connection for OUT12 thru OUT17 OUT12 thru OUT17 Out Switched VBB2 High Side FET Outputs VBB3 In Common External Supply connection for OUT18 thru OUT23 VBB3 In Common External Supply
7. 4 OUTO 15 VBB1 16 OUT10 17 OUT8 18 OUT6 19 VBBO 20 IN3 21 IN4 22 IN5 23 TN 24 ING 25 IN7 26 IN COMMON1 27 GND 28 TTL1 29 TTL3 30 OUT5 31 OUT3 32 OUT1 33 No Connection 34 OUT11 35 OUTS 36 OUT7 37 VBB1 Table 6 6 DB37F Pin Assignments for Model PCle IDIO 12 21 Manual PCle IDIO 24 Chapter 7 Specification Isolated Digital Inputs Number of inputs 24 Type Non polarized optically isolated sharing a common return per 12 channel input group not TTL CMOS compatible Voltage Range 3 to 31V DC or 22 VACrms 40 10kHz Isolation Opto couplers rated at 2 5kV See note 1 Input Resistance 1 8k ohms in series with two diodes and a photo coupler LED Response Time with filter 4 7 mSec without filter rise time 10 uSec fall time 2 30 uSec Non Isolated Digital Input Outputs Number of lines 8 programmable as all inputs or all outputs Type TTL CMOS compatible pulled up to 5V via 10kO Interrupts Change of State Detection available on all 32 input bits software enabled byte by byte Solid State FET Outputs Number of outputs 24 isolated in four 6 channel groups Output Type Smart High Side Power MOSFET Switch Protected against short circuit over temp ESD can drive inductive loads Voltage Range 5 34VDC recommended 40VDC absolute maximum FET Ratings On state resistance 60mO 2A continuous per FET with a 9A cumulative total per group of 6 FETs Enviro
8. COS Clear Inputs 0 7 Writing a 1 to any bit at this address will clear the change of state detection for the corresponding Input and will also clear the card s Interrupt Output pin Offset 9 read COS Status Inputs 8 15 IN15 IN14 IN13 IN12 IN11 IN10 Reading from this address will return a 1 at each bit for the corresponding Input that has changed state since the last Clear write to Base 9 Offset 9 write COS Clear Inputs 8 15 IN15 IN14 IN13 IN12 IN11 IN10 Writing a 1 to any bit at this address will clear the change of state detection for the corresponding Input and will also clear the card s Interrupt Output pin Offset A read COS Status Inputs 16 23 IN23 IN22 IN21 IN20 IN19 IN18 IN17 IN16 Reading from this address will return a 1 at each bit for the corresponding Input that has changed state since the last Clear write to Base A Offset A write COS Clear Inputs 16 23 IN23 IN22 IN21 IN20 IN19 IN18 IN17 IN16 Writing a 1 to any bit at this address will clear the change of state detection for the corresponding Input and will also clear the card s Interrupt Output pin Offset B read COS Status TTL CMOS 0 7 TTL7 TTL6 TTL5 TTL4 TTL3 TTL2 TTL1 TTLO Reading from this address will return a 1 at each bit for the corresponding Input that has changed state since the last Clear write to Base B Offset B write COS Clear TTL CMOS 0 7 TTL7 TTL6 TTL5 TTL4 TTL3 TTL2 TTL1 T
9. K EDGE SELECTION P PCle BUS INTERFACE COMPUTER PCle BUS Figure 1 1 Block Diagram Manual PCle IDIO 24 V Input Circuit 8K o x1 Eis G T 47K TuF Filter Setting in Register V Figure 1 2 Example of One Input Circuit shared return pin per 12 channel group 1 24VAC AC D INPU Example Source Output Circuit COMPLIANCE x1 VOLTAGE PWR POWER SUPPLY CONTROL FET SWITCH 5 34VDC RETURN Example Field Equipment Figure 1 3 Example of One Output Circuit shared PWR and RETURN pins per 6 channel group Ordering Guide PCle IDIO 24 PCle IDI 24 PCle IDO 24 PCle IDIO 12 Model Options T RoHS 24 isolated inputs 8 non isolated inputs 24 high side FET outputs Inputs only 24 isolated 8 TTL CMOS 24 isolated FET outputs and 8 TTL CMOS l O lines 12 isolated inputs 4 TTL I O lines 12 isolated outputs Extended temperature 40 to 85 C RoHS compliant version Included with your board The following components are included with your shipment Please take time now to ensure that no items are damaged or missing 1 Software Master CD PDF user manual installed with product package 2 Printed I O Quick Start Guide Optional Accessories STB 37 2 Kit Complete screw termination solution consisting of Two 2 STB 37 s installed on a 12 SNAP TRACK amp 6 Y Cable Assembly terminating in two DB37F connectors STB 37 2 Kit CL Includes four clips for mou
10. TLO Writing a 1 to any bit at this address will clear the change of state detection for the corresponding Input and will also clear the card s Interrupt Output pin If all 32 COS status bits have been cleared 14 Manual PCle IDIO 24 Offset C read write Control Register FILTER EN FILTER EN OUT MODE BUFFER EN IN12 23 INO 11 TTL 0 7 TTL 0 7 Reading from this address will return the values last written Writing a 1 to any bit will enable the corresponding function The card initializes with Bit 021 Enabled and Bit 1 720 Disabled Offset D Reserved Offset E read write COS Enable Register IRQ EN IRQ EN IRQ EN IRQ EN Falling Falling Falling Falling Edge Edge Edge Edge TTLO 7 IN16 23 IN8 15 INO 7 Reading from this address will return the values last written Writing a 1 to any bit will enable the corresponding function The card initializes with all bits 0 COS IRQ disabled Offset F read IRQ Output Pin Status 0 o Jo jo o o J JIQ Reading from this address will return a 1 at Bit O when the card s interrupt pin is active Offset F write Software Board Reset Writing any value to this address will return the Control Register to the default state all Outputs to off and clear all Input COS status bits Interrupts The card supports interrupts The interrupt level is assigned by the plug and play operating System The card s interrupt capability makes it unnecessary
11. a DACCES I O PRODUCTS INC 10623 Roselle Street San Diego CA 92121 e 858 550 9559 Fax 858 550 7322 contactus accesio com e www accesio com MODELS PCle IDIO 24 PCle IDI 24 PCle IDO 24 PCle IDIO 12 ISOLATED DIGITAL INPUT FET OUTPUT BOARDS USER MANUAL File MPCle IDIO 24 A3b Notice The information in this document is provided for reference only ACCES does not assume any liability arising out of the application or use of the information or products described herein This document may contain or reference information and products protected by copyrights or patents and does not convey any license under the patent rights of ACCES nor the rights of others IBM PC PC XT and PC AT are registered trademarks of the International Business Machines Corporation Copyright by ACCES UO Products Inc 10623 Roselle Street San Diego CA 92121 All rights reserved WARNING ALWAYS CONNECT AND DISCONNECT YOUR FIELD CABLING WITH THE COMPUTER POWER OFF ALWAYS TURN COMPUTER POWER OFF BEFORE INSTALLING A BOARD CONNECTING AND DISCONNECTING CABLES OR INSTALLING BOARDS INTO A SYSTEM WITH THE COMPUTER OR FIELD POWER ON MAY CAUSE DAMAGE TO THE I O BOARD AND WILL VOID ALL WARRANTIES IMPLIED OR EXPRESSED Manual PCle IDIO 24 Warranty Prior to shipment ACCES equipment is thoroughly inspected and tested to applicable specifications However should equipment failure occur ACCES assures its customers that prompt service an
12. anual PCle IDIO 24
13. d support will be available All equipment originally manufactured by ACCES which is found to be defective will be repaired or replaced subject to the following considerations Terms and Conditions If a unit is suspected of failure contact ACCES Customer Service department Be prepared to give the unit model number serial number and a description of the failure symptom s We may suggest some simple tests to confirm the failure We will assign a Return Material Authorization RMA number which must appear on the outer label of the return package All units components should be properly packed for handling and returned with freight prepaid to the ACCES designated Service Center and will be returned to the customer s user s site freight prepaid and invoiced Coverage First Three Years Returned unit part will be repaired and or replaced at ACCES option with no charge for labor or parts not excluded by warranty Warranty commences with equipment shipment Following Years Throughout your equipment s lifetime ACCES stands ready to provide on site or in plant service at reasonable rates similar to those of other manufacturers in the industry Equipment Not Manufactured by ACCES Equipment provided but not manufactured by ACCES is warranted and will be repaired according to the terms and conditions of the respective equipment manufacturer s warranty General Under this Warranty liability of ACCES is limited to replacing repairing or iss
14. e corresponding connector pin positive logic Manual PCle IDIO 24 Offset 4 read Isolated Inputs 0 7 Bit Bite Bits Bit4 Bits Bt2 DL Dn NZ IDN IN Iw Iw Im Im iNo Reading from this address will return the Input values Each bit returning a 1 indicates the corresponding Input is active energized from 3V to 31V Offset 5 read Isolated Inputs 8 15 Bit7 Bit6 Bits Bit4 Bit3 Bit2 Biti Bito IN15 IN14 IN13 IN12 IN11 INTO IN9 IN8 Reading from this address will return the Input values Each bit returning a 1 Indicates the corresponding Input is active energized from 3V to 31V Offset 6 read Isolated Inputs 16 23 Bit7 Bite Bits Bit4 Bits Bt2 Bitt Dn IN23 N22 N21 N20 N19 N18 NG N16 Reading from this address will return the Input values Each bit returning a 1 Indicates the corresponding Input is active energized from 3V to 31V Offset 7 read TTL CMOS 0 7 Bit7 pre Bit5 Bit4 Bis Bit2 Biti Bio TiL7_ trle tls rnu4 TTL3 JIL ITU LTL Reading from this address will return the Input values Each bit returning a 0 Indicates the corresponding Input is Low all Inputs are pulled up to 5V via 10kQ Manual PCle IDIO 24 Offset 8 read COS Status Inputs 0 7 Reading from this address will return a 1 at each bit for the corresponding Input that has changed state since the last Clear write to Base 8 Offset 8 write
15. he PCle slot of the PC 6 60 4 20 3 90 ea Lu Lu LL z E bas N PCle 1X Figure 3 1 Dimensioned Drawing Manual PCle IDIO 24 Chapter 4 Address Selection The Vendor ID for this card is 0x494F ASCII for IO The Device ID for the PCle IDIO 24 is OxOFDO The Device ID for the PCle IDI 24 is OXOBDO The Device ID for the PCle IDO 24 is 0x07DO The Device ID for the PCle IDIO 12 is OxOFCO This card uses I O addresses offset from the Offset assigned by the PCle bus The address spaces are defined in the programming section of this manual PCle architecture is Plug and Play This means that the BIOS or Operating System determines the resources assigned to PCle cards rather than the user selecting those resources with switches or jumpers As a result you cannot set or change the card s Offset or IRQ level You can only determine what the system has assigned The following information is for advanced users only The PCIe bus supports 64K of I O address space so your card s addresses may be located anywhere in the 0000h to FFFFh range The card uses more resources than you usually need be concerned with For those who require it be aware of the following BAR 0 memory mapped PEX8311 BAR 1 I O mapped PEX8311 BAR 2 I O mapped card registers all most software needs Manual PCle IDIO 24 Chapter 5 Programming The base or starting address is assigned by the computer
16. nmental Operating Temp 0 to 70 C optional 40 to 85 C Storage Temp 40 to 85 C Humidity 5 to 90 percent non condensing Mechanical Size Standard height 4 2 106 65 mm half length 6 6 167 6 mm Connector DB78 Female Mating Connector AMPLIMITE 1658674 1 or equivalent Note 1 Opto couplers are rated for at least 2 5kV but isolation voltage breakdowns will vary and is affected by factors like cabling spacing of pins spacing between traces on the PCB humidity dust and other environmental factors This is a safety issue so a careful approach is required For CE certification on the front end of the circuitry isolation was specified at 40V AC and 60V DC The design intention was to eliminate the influence of common mode Use proper wiring techniques to minimize voltage between channels and to ground For example when working with AC voltages do not connect the hot side of the line to an input Tolerance of higher isolation voltage can be obtained on request by applying a conformal coating to the board 22 Manual PCle IDIO 24 Customer Comments If you experience any problems with this manual or just want to give us some feedback please email us at manuals accesio com Please detail any errors you find and include your mailing address so that we can send you any manual updates ia ACCES I O PRODUCTS INC 10623 Roselle Street San Diego CA 92121 Tel 858 550 9559 FAX 858 550 7322 WWW accesio com 23 M
17. nting the STB 37 2 Kit to a standard DIN Rail Manual PCle IDIO 24 Chapter 2 Installation Software CD Installation The software provided with this board is contained on one CD and must be installed onto your hard disk prior to use To do this perform the following steps as appropriate for your operating system Substitute the appropriate drive letter for your drive where you see D in the examples below Windows a Place the CD into your CD ROM drive b The install program automatically run If the install program does not run click START RUN and type ol Lass click OK or press Ed C Follow the on screen prompts to install the software for this board Linux a Please refer to linux htm on the CD for information on installing under Linux Hardware Installation Please install the software package before plugging the hardware into the system Refer to the printed I O Quick Start Guide included with your board which can also be found on the CD for specific quick steps to complete the hardware and software installation Caution ESD A single static discharge can damage your card and cause premature failure Please follow all reasonable precautions to prevent a static discharge such as grounding yourself by touching any grounded surface prior to touching the card Manual PCle IDIO 24 Chapter 3 Hardware Details Option Selection There are no jumpers or switches to set or configure prior to installing the card into t
18. oisy environments o 2 optically isolated groups common return per 12 channels o Can detect input state change and assert interrupt 8 non isolated TTL CMOS WO lines 24 optically isolated high side FET switches o 4groups sharing external power and return per 6 output channels Opto couplers rated for 2 5kV isolation Automatically detected under Windows Applications These boards are especially useful in applications where high common mode external voltages are present Isolation is required to guard electronics from transient voltage spikes and offers greater common mode noise rejection in electronically noisy surroundings containing industrial machinery and inductive loads These applications include factory automation energy management industrial ON OFF control security systems manufacturing test and process monitoring In addition to protecting industrial applications from accidental contact with high external voltages the isolation provided eliminates troublesome ground loops Functional Description Inputs The isolated inputs can be driven by either AC or DC signals Input signals are rectified by photocoupler diodes A 1 8K ohm resistor in series dissipates unused power Standard 12 24 AC control transformer outputs can be accepted as well as DC voltages The input voltage range is 3 to 31 volts rms External resistors connected in series may be used to extend the input voltage however this will raise the input threshold
19. se nn enne nn nennen nnn tnnt 7 e D cir ce n 7 Modell Option ri 7 Included with your board eeeeeeeeeeie ee eeeiieeeeeee aa sn santa sas a nnn n asas 7 SIDREDI LIN rfe aai 7 erum LtinnEe 8 Chapter 3 Hardware Details eeeeeeieeiieeeeieeeeeeeeeee enin menn tn nnn tn assa sinn nsn tR nasa tasas nasa tnn anna 9 Optlon ize M 9 Figure 3 1 Dimensioned Drawing eeeeeeeeeeee eene enne nnne nnne nenne nn nnmnnn nnmnnn nnmnnn nnn 9 Chapter 4 Address Selection eesiieiieeieeeeie sees sienne entes nena nasa natn nant nass satanas n iiion dis 10 Chapter 5 Programming aa aar oaaae ra aaa a aaaea rae a As cete a e ceaee cue re tenete in sencdeneedecqeieseceedacezecuecesen 11 Table 5 1 Register M p eniin ee ged 11 WTOP EU v Cou EUM Er 15 Chapter 6 Connector Pin Assignments eeeeeeeeeeeeseisees seen ee enne nnne nn snnt nn nnn n nn nn anita annnm nnn nR anna 16 Table 6 1 DB78F Pin Assignments J2 for Model PCle IDxx 24 esses 16 Table 6 2 I O Signal Names Directions and Descriptions eese 17 Figure 6 1 DB78M Mating Connector
20. system during installation and will fall on a sixteen byte boundary The card s readable and programmable registers are as follows Base A COS Clear Inputs 16 23 Base B COS Clear TTL CMOS 0 7 Base C Control Register Base D Reserved Base 4E COS Enable Base F Software Board Reset Table 5 1 Register Map Manual PCle IDIO 24 Offset 0 read write FET Outputs 0 7 OUT7 oure jours our4 OUT3 OUT2 OUT OUTO Reading from this address will return the values last written Writing a 1 to any bit will turn on the corresponding FET output The card initializes with all outputs off all O s Offset 1 read write FET Outputs 8 15 OUT15 ouT14 OUT13 OUT12 OUT11 oUT10 OUT9 OUTS Reading from this address will return the values last written Writing a 1 to any bit will turn on the corresponding FET output The card initializes with all outputs off all O s Offset 2 read write FET Outputs 16 23 OUT23 OUT22 OUT21 OUT20 OUT19 OUT18 OUT17 OUT16 Reading from this address will return the values last written Writing a 1 to any bit will turn on the corresponding FET output The card initializes with all outputs off all O s Offset 3 read write TTL CMOS 0 7 TTL7 TTL6 TTL5 TTL4 TTL3 TTL2 TTL1 TTLO The card initializes in the Input mode standard TTL CMOS levels apply When Output mode is set see Offset C Control Register data bit values written will be reflected at th
21. uing credit at ACCES discretion for any products which are proved to be defective during the warranty period In no case is ACCES liable for consequential or special damage arriving from use or misuse of our product The customer is responsible for all charges caused by modifications or additions to ACCES equipment not approved in writing by ACCES or if in ACCES opinion the equipment has been subjected to abnormal use Abnormal use for purposes of this warranty is defined as any use to which the equipment is exposed other than that use specified or intended as evidenced by purchase or sales representation Other than the above no other warranty expressed or implied shall apply to any and all such equipment furnished or sold by ACCES Manual PCle IDIO 24 TABLE OF CONTENTS enim EAM E 5 Feature rm e LE 5 7 8 9 er 10 rcc an a eT Sp PS er oT A 5 Functional D SCHiptlon ao 5 I cm 5 Ing ee 6 acrem 6 Figure 1 1 Block Diagram c1iiiccececen cocco er ce ccce anena naniii Aaina aannaaien naaa 6 Figure 1 2 Example of One Input Circuit eseeeeeeeeeeeeeeeesee seen nennen nennen nnne nnn nn nnn 7 Figure 1 3 Example of One Output Circuit ueeeseeeee eese ei
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