Data Sheet - Mouser Electronics
Contents
1. Control of industry standard DC DC front ends power management components l i l Crowbar output to trigger the optional crowbar protection e Communicates with the host system Run time counter via the industry standard 12C nn Small footprint semiconductor industry standard QFN64 package 9x9mm communication bus ce l l Wide industrial operating temperature range e Reduces board space system cost complexity and time to market DESCRIPTION Power One s point of load converters are recommended for use with regulated bus converters in an Intermediate Bus Architecture IBA The DM73XX is a fully programmable digital power manager that utilizes the industry standard 12C communication bus interface to control manage program and monitor up to 32 dP series POL converters and 4 independent power devices The DM73XX completely eliminates the need for external components for power management and programming and monitoring of the d pwer POL converters and other industry standard power and peripheral devices Parameters of the DM73XX are programmable via the I2C bus and can be changed by a user at any time during product development and deployment BCD 00317_AA_October 10 2013 www power one com power AN POWEr One A MEMBER OF THE ABB GROUP DATA SHEET 1 SELECTION CHART NUMBER OF D PWER POLS NUMBEROF NUMBER OF DPMTYPE AND AUXILIARY DEVICES Dass ne F en PARALLEL AUXILIARY THAT CAN BE CONTROLLED BUSES DEVICES DM2. 04 AuxDevo uj Signals Events Device Monitoring Monitoring A Group B a IND in IN2 in Status 02 DP7015 INT in IN3 in Parametric Q 05 AusDevi Sl Crowbar Gl RES_Nin LI FE Enable 1 AC_FAIL in IBY high a IBY low IBY 11 83 V Run Time 228 4h 25 Group C Display Controls 03 DP7007 w E Log to File Controls A On Off Controls System Group A v Polo vy Current A Pol 00 v vo 807 DP7115 lo 569A Power One I Leste TW PG TR OT OC UV DV PY ca ca a a a a a Fault Injection Ad da dd dd d Margining Low Nom High Gopa O O GoupB O O GoupC O O Group D Front End or Send Cmd Temperatue T Time s Configure Command Log exe O Log to File TXT 12c HER DEC CLR HLP Monitoring step on 09 Apr 2013 10 24 18 AA Monitoring step on 09 Apr 2013 10 24 19 Monitoring step on 09 Apr 2013 10 24 20 Monitoring step on 09 Apr 2013 10 24 21 Monitoring step on 09 Apr 2013 10 24 22 Monitoring step on 09 Apr 2013 10 24 23 Ready X No Error lt BCD 00317_AA_October 10 2013 www power one com power A MEMBER OF THE ABB GROUP AN POWET ONE VW 9 4 3 Run Time Counter DATA SHEET The DPM also monitors the duration of time that it has been in operation The 4 bytes Run Time Counter is active whenever the DPM is powered up The count rate is 1 second The counter is loaded into RAM upon power up and the new count St
3. POWETr ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET Fast Mode C 100kHz lt fsc lt 400kHz Reu External pull up resistor 1 300 Cp2 kQ HDSTA Hold time repeated START condition 0 6 Us tLow Low period ofthe SCL clock 1 3 US HIGH High period ofthe SCL clock 0 6 US tsusTA Setup time for a repeated START condition 0 6 US HDDAT Data hold time 0 0 9 US tsuDAT Data setup time 100 ns tsusTD Setup time for STOP condition 0 6 US sur Bus free time between a STOP and START condition 1 3 US Figure 2 IC Timing Parameters tof HIGH Low tr le gt lt gt SCL tsusTa HDSTA tuppat _ tsupat tsusto 4 gt lt gt 4 gt lt gt A SDA ONLA Ao oo RN 8 TYPICAL APPLICATION Figure 3 Typical Application Schematic of Multiple Output System with Digital Power Manager and 2C Interface na Intermediate Voltage Bus Crowbar Optional l 0 1 i i 1 1 1 i i 6 PRER L SE R1 VI 48 ip gg BYS DD VDD VDD VDD VDD AREF IBV DM7332 The schematic of a typical application of a DM73XX digital power manager DPM is shown in Figure 3 The system includes four groups of d pwer Point Of Load converters POLs A group is defined as one or more POL converters interconnected via OK pins Grouping of the POLs enables users to program advanced fault management schemes and define margining functions monitoring start up behavior and reporting conventions DM73XX Serie
4. shown in Figure 9 or directly via the I2C bus by specific commands If the status monitoring is enabled the status of each protection overcurrent overvoltage etc is being reported If the parametric monitoring is enabled then real time values of voltage current and temperature are being reported Status and parametric monitoring data of a single POL converter and groups of POL converters can be examined in the GUI IBS Monitoring Window shown in Figure 10 or directly via the I2C bus using specific commands Status data for each group of POL converters is presented in the Group Status block in the left top corner of the window Parametric data for individual POL converters is shown in Voltage V Current A and Temp T screens DPMs also monitor and report programming status of each POL converter and results of CRC operations 9 4 2 Monitoring of Auxiliary Devices The DPM can read status information of the Auxiliary Devices via the PG0 PG3 inputs The PG0 PG3 are digital 3 3V compliant inputs with internal pull up resistors Logic high input on a PGX pin should correspond to normal operation of an Auxiliary Device Status monitoring data of Auxiliary Devices is stored in the DPM and displayed in the IBS Monitoring Window shown in Figure 10 Figure 10 IBS Monitoring Window Power One I2C 65509_DM7316 Eval Board Rev A z1c File Edit view Tools Window Help 12C Bus J DM7316 25 Group amp 00 DP7115 01 DP7115
5. AuxDevices gt Margining Low 6 6 6 6 Pols 2 75 75 75 75 Pos P7007 30 a0 0 OK Bie 110 110 110 110 ee BR Beate 130 130 130 130 DP7015 20 ms 20 ms 0 ms 20 ms 0 ms O ms rate 15 15 13 11 10 10 ms ms ms ms ms ms q Polls DP7115 0 20 ms 0 20V ms 0 20W ms 0 20 W ms ole DP7120 0 50 V ms 0 50V ms 0 50 V ms 0 50 V ms o DP7130 POL Fole3 f PWM Frequency 500 kHz 500 kHz 1000 kHz 500 kHz Interleave 0 180 0 0 ADC High ADC Low lt gt Configure Command Log C LogtoFile MXT 12c HER Oc CLR HLP exe Simulate Program Ready x No Error 9 3 2 Programming Time Total system programming time can be determined from the following equation Tppoar Tint par X Teor Map x Tap Where TPROGR time interval from the instant when the DPM supply voltage exceeds DPM s UVLO threshold until the DPM issues the turn on command If the Auto Power Up is enabled and the turn on delay is set to zero the output voltages start ramping up at the end of Tprocr interval Tint DPM initialization interval after the DPM supply voltage exceeds the UVLO threshold Tinit 11 5ms Trot Time required for programming and verifying of one POL converter TpoL 26 5ms Tap Time required for programming and verifying of one Auxiliary Device Tap 7 5ms NPOL Number of POL converters in the system NAD Number of Auxiliary Devices in the system The programming data DPM and POL setup register
6. C Log to File Command Log Em 12c HER DEC CLR HLP Ready X No Error The thresholds have a symmetric fixed size hysteresis as shown in Figure 12 Figure 12 Undervoltage IBL and Overvoltage IBH Protections Hysteresis IBL IBH DM73XX Series Digital Power Manager IBV www power one com power AN qwer Power one NJ A MEMBER OF THE ABB GROUP DATA SHEET When the IBV decreases below the IBL threshold minus the hysteresis the DPM will pull OK lines low turning off all POL converters The POL converters will execute regular turn off ramping their output voltages down according to the turn off delay and falling slew rate settings In addition the DPM will clear all bits in the POL Programming Status registers and save the content of the Run Time Counter into the non volatile memory The IBV Low bit in the IBS Monitoring Window will change to red When the IBV recovers above the IBL threshold plus the hysteresis the DPM will first program all POL converters and then turn them on if the Auto Turn On is enabled in the POL Group configuration window shown in Figure 9 Otherwise the user will need to send the turn on command via the I2C bus When the IBV exceeds the IBH threshold plus the hysteresis the DPM will pull OK lines low turning off all POL converters The POL converters will execute regular turn off ramping their output voltages down according to the turn off delay and falling slew rate settin
7. OK lines low to initiate turn off of other POL converters as programmed The regular turn off of a POL converter means that the output voltage is ramping down according to its turn off delay and falling slew rate settings If a POL converter triggers an undervoltage or overtemperature fault it will initiate the regular turn off In the case of an overcurrent or tracking fault the POL converter initiates the fast turn off by opening both high and low side switches instantaneously If either output overvoltage or phase voltage errors are triggered the faulty POL converter initiates the fast turn off and turns on its low side switch In addition when an error is propagated the DPM can generate commands to turn off a front end a DC DC converter generating the intermediate bus voltage and trigger an optional crowbar protection to accelerate removal of the intermediate bus voltage IBV Once the fault has recovered in the faulty POL converter the other POL converters will turn on in a controlled manner according to their turn on delay and rising slew rate settings 9 5 2 Margining Margining can be executed separately for each group by clicking an appropriate radio button in the GUI IBS monitoring window shown in Figure 10 or directly via the 12C bus by the margining command All POL converters in a group are margined in the same direction up or down by the percentage programmed individually for each POL converter 9 5 3 Turn ON and Turn Off
8. changes to the schematic shown in Figure 3 If higher accuracy of the IBV monitoring is desired then a 2 5V external reference can be added as shown in Figure 13 The GUI automatically changes values of the IBL and IBH thresholds when the reference selection is changed Note If the Reference Voltage setting is changed during operation of the DPM then the power to the DPM needs to be cycled or the HRES_N pin needs to be pulled low and released Figure 13 External Voltage Reference Connections IBV VDD VDD U1 and R1 are additional components U1 is an industry standard 2 5V voltage reference such as TL431 or similar C1 is an existing component but its value changes depending on the type of voltage reference Common voltage reference part numbers and values of associated components are shown in Table 4 BCD 00317_AA_October 10 2013 www power one com power lan POWC ONG A MEMBER OF THE ABB GROUP DATA SHEET Table 4 Component Values For External Reference U1 Part Number TL431 ZR431 Manufacturer TI Zetex Accuracy 0 5 1 2 0 5 1 2 R1 Ohms 100 620 510 2000 C1 UF 10 0 01 Accuracy of the protection thresholds in the case of external reference is determined by the sum of accuracy of the voltage reference accuracy of the 10k 47k resistive divider shown in Figure 13 and conversion error of the internal ADC specified in 7 2 9 5 POL GROUP MANAGEMENT POL converters and Auxiliary Devices can be arranged in up to fo
9. reprogrammed and started if necessary SD Sync Data Line Pin 56 An open drain input output with internal pull up resistor Communication line to distribute a master clock to all converters and at the same time to communicate with all POLs JTAG Interface Pins 34 33 32 31 Connect to a JTAG IEEE 1149 1 compliant programmer supporting SVF files or leave open if not used VDD Positive Supply Pins 6 25 42 57 60 Supply voltage At least 4x100nF decoupling capacitors should be connected between VDD and VSS pins All VDD pins must be connected VSS Ground Pins 8 9 26 38 43 58 Ground Decoupling capacitors need to be connected as close as possible to the pins All VSS pins must be connected NC No Connect Pin 1 2 3 10 12 14 15 19 21 22 24 28 29 35 39 59 62 64 All nc pins must remain floating DM73XX Series Digital Power Manager www power one com power WEF lan POWET ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET 12 MECHANICAL DRAWINGS Figure 20 DM73XX Mechanical Drawing PIN 1 I 80 DIA et LE TOP_ VIEW a M Lr A1 i j 4X P Aft fl ff LE BOTTOM VIEW Compliant JEDEC MU 220 Figure 21 DM73XX Terminals i in TERMINAL TIP FOR EVEN TERMINAL SIDE BCD 00317_AA_October 10 2013 www power one com power AN POWEr One NJ A MEMBER OF THE ABB GROUP DATA SHEET mm inch MIN NOM MAX MIN
10. 000ms Since the watchdog function is not a part of the standard 2C specifications it can be disabled by the user 9 7 2 JTAG Interface The DM73XX series DPMs feature the JTAG interface that can be used for programming the DPM with user specific configuration settings JTAG boundary scan capabilities are not currently supported JTAG programmable DPMs have unique 5 digit identifiers listed in Table 6 Table 6 JTAG Programmable DPM Part Numbers BASE PART NUMBER 5 DIGIT IDENTIFIER DM7304G 65515 DM7308G 65516 DM7316G 65517 DM7332G 65518 BCD 00317_AA_October 10 2013 www power one com power AN POWET ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET Only the DPM part numbers listed in the table can be programmed via the JTAG interface Note The DPMs can be programmed via the JTAG only once After initial programming via the JTAG the DPMs may be reprogrammed via I2C as necessary 9 7 2 1 SVF File In order to program a DPM via the JTAG interface the Serial Vector Format SVF file needs to be generated Click Generate SVF button in the System Configuration window shown in Figure 8 It will open the SVF Generator window shown in Figure 19 The window allows specifying the location of the target DPM in the JTAG chain and setting delays to generate the appropriate Serial Vector Format file The resulting file is used to program the DPMs through the JTAG interface Refer to Programming DM73XX DPMs via JTAG Interface Applic
11. 07h Current Limit Set point 08h Duty Cycle Limit 09h Protection Configuration OAh Register 4 Output Voltage Setpoint 1 OBh High Output Voltage Setpoint 1 OCh Low Output Voltage Setpoint 2 ODh High BCD 00317_AA_October 10 2013 REGISTER Z7000 AUX Z8000 POL DEVICE PC1 x EC x PC2 x reserved PC3 x reserved TC x reserved INT_x reserved DON x EON x DOF_x EOF x VOS x reserved CLS x reserved DCL x reserved B1 x reserved B2 x reserved B3 x reserved coL x reserved CONTENT Protection Configuration 1 Protection Configuration 2 Protection Configuration 3 Tracking Configuration Interleave Configuration and Frequency Selection Turn On Delay Turn Off Delay Output Voltage Set point Current Limit Set point Duty Cycle Limit Dig Controller Denominator z1 Coefficient Dig Controller Denominator z Coefficient Dig Controller Denominator z3 Coefficient Dig Controller Numerator z Coefficient Low Byte www power one com power AN POWESr ONE NS OEh V2L OFh V3H 10h V3L 11h CP 12h Cl 13h CD 14h CV 15h reserved 16h reserved 17h reserved 18h reserved 19h reserved 1Ah reserved 1Bh reserved 1Ch MRH 1Dh MRL 1Eh CRCO_x 1Fh CRC1_x Note A MEMBER OF THE ABB GROUP Output Voltage Setpoint 2 Low Output Voltage Setpoint 3 High Output Voltage Setpoint 3 Low Controller Proportional Coefficient Controller Integral Coefficient Controller Derivative Coefficient Controller Derivative Roll Off Coef
12. 15 ms Rising Slew Rate 0 20 Wms O20 Vine Poll Faling Slew Rate 0 50Yms 0 50 ms Poll 5 Ze ero Pole Turn on and turn off delays can be programmed for each Auxiliary Device as shown in Figure 7 Timing of turn on and turn off events can be synchronized between Auxiliary Devices and POL converters by programming appropriate delays for specific types of devices Figure 7 Sequencing Tracking Window a Deve Type Faut Output Sequencing Controller 5 BE HERE EEE VER GER VERS BEE N Delays Slew Rates Power Good Display Tum On Slew Rate Tum On Delay J Delay 0 ms 0 20 Vims 0 ms Ki Show other POLs Tum Off Slew Rate Tum Off 7 Show Aux Devices sort Delay 11 ms 0 50 Vi J 0 50 Vims Power Good e Left click a trace Slew rate control React to display its label during tum off DM73XX Series Digital Power Manager www power one com power AN Lpwer POWEI ONG A MEMBER OF THE ABB GROUP DATA SHEET 9 3 DPM FUNCTIONS 9 3 1 POL Programming POL programming is the process of downloading the content of POL setup registers stored in DPM s non volatile memory via the SD bus to the POL converters Programming of POL converters is performed upon power up or when the Program button is pressed in the GUI System Configuration window shown in Figure 8 or when the specific command is sent directly via the 12C bus Figure 8 System Configuration Window Device DM7
13. 316 Addr Ox5e ID 65500 Type Bus Voltages Devices Faults User Memory Tum On Fault Propagation All corecti programmed Devices will start up Only Groups with no programming error will start up System doesn t start if there is a programming error This setting atfects the Group auto turn on feature and also the Group System 240 turn on commands Changing this option requires the DPM to be power cycled after programming Group Fault Propagation To On Error FE Crow Spe om a Pe A OO O O a O 0 0 O 0 a O O 0 0 D The programming is performed in several steps Once the supply voltage on the VDD pins of the DPM exceeds the UVLO protection threshold the DPM will start copying setup registers from its non volatile memory into RAM and execute the cyclic redundancy check CRC to ensure integrity of the programming data When the voltage on the IBVS pin exceeds the IBV undervoltage protection threshold the DPM will download POL setup registers to the respective POL converter via the SD line Every data transfer is protected by parity check and followed by the POL acknowledgement and read data back procedure If both acknowledgement and readback operations are successful the POL specific bit in the POL Programming Status registers will be set The DPM considers the POL converter to be programmed and continues programming the next POL converter Upon completion of the programming the
14. 5514 65518 B1 R100 DM73XX Series Digital Power Manager www power one com power AN awer Power one NJ A MEMBER OF THE ABB GROUP DATA SHEET Reference Documents e DP XXX DP8XXX Point of Load Regulator Data Sheets e _DM73XX Digital Power Manager Programming Manual Revision A09 or later e Graphical User Interface Revision 6 3 5 or later e Programming DM73XX DPMs via JTAG Interface Application Note e ZMO00056 KIT USB to I2C Adapter Kit User Manual 4 ABSOLUTE MAXIMUM RATINGS Stresses beyond those listed may cause permanent damage to the DPM Exposure to absolute maximum rating conditions for extended periods may affect device reliability Functional operation of the DPM at absolute maximum ratings or conditions beyond those indicated in the operational sections of this specification is not implied PARAMETER CONDITIONS DESCRIPTION MIN MAX UNITS Ambient Temperature Range 40 85 C Storage Temperature Ts 55 150 C Junction Temperature Ty 125 C Input Voltage VDD pin 0 3 3 6 VDC Input Voltage Any pin other than VDD 0 5 VDD 0 5 VDC Pin Current DC 40 mA 5 MECHANICAL SPECIFICATIONS PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS Peak Reflow Temperature 40 sec maximum duration 260 C Lead Plating 100 matte tin Moisture Sensitivity Level JEDEC J STD 020C 3 6 RELIABILITY SPECIFICATIONS PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS Demonstrated at 55 C lee 60 Confidence Level a i Non Volatile M
15. 7304G 4 00 03 2 2 2 4 DM7308G 8 00 07 2 2 4 4 DM7316G 16 00 15 3 3 4 4 DM7332G 32 00 31 4 4 8 4 2 ORDERING INFORMATION DM 73 XX G yyyyy zz Number of d pwer a POLs and Auxiliary 5 digit identifier on Product family Series devices RoHS compliance assigned by Packaging Option d pwer Power Digital 04 4 devices G RoHS compliant for Power One for Management Power B1 50pcs Tube 08 8 devices all six substances each unique Devices Manager un R100 100pcs T amp R 16 16 devices configuration file 32 32 devices Note Packaging option is used only for ordering and not included in the part number printed on the DPM label 2 The evaluation board is available in only one configuration DM73XX KIT HKS Example DM7316G 12345 R100 A 100 piece reel of 16 node DPMs with preloaded configuration file code 12345 Each DPM is labelled DM7316G 12345 Refer to Figure 1 for label marking information Figure 1 Label Drawing Line 1 Part Number 7 Char Alpha Numeric Line 2 Customer Config Number Customer Config Rev 5 digits Plus Rev Letter Line 3 Firmware Rev 3 Char Alpha Numeric Line4 Programming Location Date Batch Code 7 Char Alpha Numeric 3 STANDARD 5 DIGIT IDENTIFIERS DPM TYPE DPM PRELOADED WITH DEFAULT DPM CONFIGURED FOR JTAG PACKAGING CONFIGURATION FILE PROGRAMMING OPTIONS DM7304G 65511 65915 B1 R100 DM7308G 65512 65516 B1 R100 DM7316G 65513 65517 B1 R100 DM7332G 6
16. A MEMBER OF THE ABB GROUP Ox0F IC 0x10 C2 0x11 IBL 1 0 0x13 IBH 1 0 0x15 ID 1 0 0x17 PB1 3 0 0x1B PB2 3 0 Ox1F PB3 3 0 0x23 PBA 3 0 0x27 PMC 0x28 PID 31 0 0x80 RTC 3 0 0x84 PPS 3 0 0x88 EST 0x89 IBV 1 0 0x8B STA 0x8C STB 0x8D STC 0x8E STD 0x8F REL 1 0 0x91 PSS 3 0 0x95 DPMS 0x96 WP Interrupt Configuration 1 Interrupt Configuration 2 IBV Low threshold IBV high threshold DPM Customer Identification Parallel Bus Register 1 Parallel Bus Register 2 Parallel Bus Register 3 Parallel Bus Register 4 Power Manager Configuration POL Identification Register Run Time Counter POL Programming Status Event Status IB Voltage Status of Group A Status of Group B Status of Group C Status of Group D DPM Software Release POL Status Summary DPM Status Write Protection Static Static Static Static Static Static Static Static Static Static Static Run time Run time Run time Run time Run time Run time Run time Run time Static Run time Run time Volatile R W R W R W R W OTP R W R W R W R W R W R W ANDA AA AAA A A A R W DATA SHEET yes 0x00 yes 0x00 yes 0x00 yes OxFF N A OxFFFF yes 0x00000000 yes 0x00000000 yes 0x00000000 yes 0x00000000 yes 0x00 yes 0x00 Read only value at last shut down 4x 0x00 0x00 0x00 0x00 0x00 0x00 0x00 According to DPM type 0x00 0x01 0x00 The static registers are saved in the non volatile memory and used to store the system configuration data T
17. Automatic turn on upon application of the input voltage is enabled by checking the Auto Turn On bit in the GUI Group Configuration window shown in Figure 9 Turn on and turn off of various groups during the operation is controlled from the GUI IBS Monitoring window or directly via the I2C bus by specific commands 9 5 4 Interrupt Configurations The DPM has four interrupt inputs that can be programmed to e Inhibit the operation of one or several Groups of POL converters when pulled low or e Actas a Group Reprogramming Trigger The two functions are mutually exclusive an interrupt can be either programmed as an Inhibit or as a Group Reprogramming Trigger The interrupts are programmed in the GUI Interrupt Configuration window shown in Figure 16 or directly via the 12C bus by specific commands In Figure 16 the Interrupt 0 is programmed as the inhibit for group A and the Interrupt 2 is programmed as the group C reprogramming trigger 9 5 4 1 Group Inhibit An interrupt input can be programmed to act as an inhibit on a single or multiple groups of POL converters When the interrupt input is pulled low the DPM will pull the appropriate OK lines low The affected POL converters will execute regular turn off ramping their output voltages down according to the turn off delay and falling slew rate settings Once the interrupt is released the POL converters will automatically turn on according to their turn on delay and rising slew rates settings Th
18. DPM will turn on the POL converters if the Auto Turn On is enabled in the POL Group configuration window shown in Figure 9 topmost group of square buttons just below Bus Voltages tab Otherwise the user will need to send the turn on command via the I2C bus BCD 00317_AA_October 10 2013 www power one com power IN Power on NJ A MEMBER OF THE ABB GROUP DATA SHEET Figure 9 POL Configuration Window Z Power One 12C 65509_DM7316 Eval Board Rev A z1c PB Fie Edit View Tools Window Help H ar 3 gt Jiu u z Lei J ah nd J J J 4 J Le Lo 2 es Configure vy Device iz us e DM731 6 Type Bus Voltages Devices Faults User Memory gt Group f i i i a i 00 DP7115 Group ABCO Right click table to modify displayed parameters or select Edit Preferences 01 DP7115 ERS Parameter Pol 00 Pol 01 Pol 02 Pol 03 Pol 04 Pol 05 04 AuxDevO P Monitor as B S Monitor Addr 00 01 02 03 04 05 2 Group Parallel Bus Name DP7115 DP7115 DP7015 DP7007 AuxDev0 AuxDevl 02 DP7015 PolO0 Alias DP7115 DP7115 DP OIS DP7007 AuxDevO AuxDevi 05 AuxDev1 PoI01 Vendor FowerOne PowerOne PowerOne Power One gt Group C Poll2 Package Size Cee Near ERER Ss ZARIE AER 03 DP7007 Pol03 Output Voltage 1 84 1 8 1 5 1 52 Pol04 Current Limit 23 44 23 44 19 84 10 64 Pol05 Load Regulation 0 0 mA 1 48 m 7 4 0 0 mv 74 0 0 mV 74 Pol06 Margining High 5 5 5 5 Poll
19. E ABB GROUP Figure 15 Auxiliary Device Fault Management Window EN Power One 12C 65509_DM7316 Eval Board Rev A z1c File Edit View Tools Window ASKHA Md co Ln a eS EEE Home Sg 120 Bus EJ OMFS16 gt Group A 00 DP7115 01 DP7115 04 AuxDevd Se Group B 02 DPFOI5 O58 AuxDev1 gt Group E 03 DPFOO Propagation Faults am Disable the Ausilian Device when a Fault or Error is triggered in or propagated to the Group Table 5 Fault and Error Propagation Scenarios Propagation POLs in Auxiliary m Propagation Auxillary To Auxiliary Propagation the Same Devicesin POLsin Wxiliary Protection Devices in eee Between Devices in Between Devices in Faulty POL Group as the Same Other Triggered the Same Groups of Other POLs Other the Faulty Groupasthe Groups Group as the ee POLs POL Faulty POL Groups Faulty POL p y UVP or OTP Enabled Disabled Any Disabled Regular Regular Continue Continue Continue turn off turn off operating operating operating UVP or OTP Enabled Enabled Any Disabled Regular Regular Turn off with Continue Continue turn off turn off turn off delay operating operating UVP or OTP Enabled Enabled Disabled Enabled cee ee a ee Zune turn off turn off turn off delay turn off operating UVP or OTP Enabled Enabled Enabled aed Regular Regular Turn off with Regular Turn off with turn off turn off turn off delay turn off turn off delay Tracking or Enabled Disabled Any Disabl
20. L WET AN POWET ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET DM73XX SERIES DIGITAL POWER MANAGER FEATURES RoHS compliant for all six substances Compliant Compatible with both lead free and standard reflow processes Programs controls and manages up to 32 independent dPOL converters via an industry standard I2C interface both 100kHz and 400kHz APPLICA TIONS JTAG IEEE 1149 1 compliant programming interface Controls and monitors industry standard power supplies and other o Telecommunications peripheral devices fans etc Low voltage high density systems Programs output voltage protections optimal voltage positioning turn on utilizing d pwer Digital and turn off delays and slew rates switching frequency interleave phase Intermediate Bus Architectures shift and feedback loop compensation of the d pwer POL converters o Broadband networking optical and User friendly GUI interface for programming monitoring and performance wireless communications systems simulation o Industrial computing servers and Four independent OK lines for flexible fault management and fast fault storaae applications propagation Four interrupt inputs with programmable hot swap support capabilities Intermediate bus voltage monitoring and protection BENEFITS AC Fail input Non volatile system configuration data memory a 1K Byte of user accessible non volatile memory e Eliminates the need for external
21. NOM MAX 0 80 1 00 0 032 0 040 J 0 0 0 01 0 05 0 000 0 002 A1 0 20 ref 0 008 ref D E 9 00 BSC 0 354 BSC D1 E1 8 75 BSC 0 344 BSC D2 E2 4 50 4 70 4 90 0 177 0 185 0 193 N 64 P 0 24 0 42 0 60 0 009 0 016 0 024 e 0 50 BSC 0 020 BSC L 0 30 0 40 0 55 0 012 0 016 0 022 b 0 18 0 25 0 30 0 007 0 010 0 012 Notes 1 Compliant to JEDEC standard MO 220 variation VMMD 3 Figure 21 DM73XX Mechanical Drawing Top View z SS 88o2825928 ecr 2 952 2 SH 1 2 San da ea LI LI LI LI LI LI LIES EI EI LI I el ne 1 ne ne HRES N ENO VDD EN1 VSS EXPOSED PAD vss CONNECT TO VSS ne OKA ne OKB ne ne ACFAIL_N hel E y O Note all nc pins must remain floating all VSS pins need to be connected together all VDD pins need to be connected together Note 2C is a trademark of Philips Corporation NUCLEAR AND MEDICAL APPLICATIONS Power One products are not designed intended for use in or authorized for use as critical components in life support systems equipment used in hazardous environments or nuclear control systems without the express written consent of the respective divisional president of Power One Inc TECHNICAL REVISIONS The appearance of products may change depending on the date manufactured Specifications are subject to change without notice DM73XX Series Digital Power Manager ww
22. R OF THE ABB GROUP DATA SHEET 11 PINS DESCRIPTION ACFAIL_N AC Fail Input Pin 16 Schmitt Trigger input with internal pull up resistor active low Pulling low the input indicates to the DPM that an AC DC front end has lost the mains and that a system shut down should immediately be initiated ADDR 0 2 2C Address Inputs Pins 47 46 45 Inputs with internal pull up resistor The 3 bit encoded address determines the DPM communication address for the 2C interface AREF Analog Reference Pin 44 An analog reference which is used internally A 10nF capacitor should be connected as close as possible to the package between AREF and VSS See 9 4 4 1 CB Crowbar Output Pin 23 A CMOS output which is used to trigger a crowbar SCR in case of overvoltage on the Intermediate Voltage Bus EN 0 3 Enable Outputs for Auxiliary Devices Pins 5 7 55 50 CMOS outputs to control Auxiliary Devices like linear regulators analog POLs fans or other devices FE_EN Front End Enable Pin 17 A CMOS output which is used to turn on off the DC DC converter generating the IBV HRES_N Hardware Reset Pin 4 Input with internal pull up resistor When pulled low a cold start of the Digital Power Manager is initiated Refer to paragraph 10 6 4 for important information regarding connections of this pin IBVS Intermediate Voltage Bus Sense Pin 48 Analog input to an internal ADC circuit to measure the Intermediate Bus Voltage The full scale ra
23. a the I2C bus Monitoring registers are read only The monitoring data consists of 5 Bytes for each POL converter and Auxiliary Device as shown in Table 3 When the status monitoring is enabled the ST registers get continuously updated When the parametric monitoring is enabled the VOH VOL IO and TMP registers get continuously updated Scaling data from the registers is specific to each DP and ZY series POL Refer to the DM73XX Programming manual for calculation information Table 3 Monitoring Data Registers POL CONVERTER AUXILIARY DEVICE REGISTER CONTENT REGISTER CONTENT ST Status Register ST Status Register VOH Output Voltage High Byte reserved VOL Output Voltage Low Byte reserved lO Output Current reserved TMP Temperature reserved 9 1 5 User Memory This non volatile memory block is reserved for users notes and not related to other functions in the DPM It can be used to save user specific information such as manufacturing data and location serial number application code configuration file version warranty or repair information etc A total of 1024 Bytes organized in 4 pages is provided The user memory can be accessed via the GUI System Configuration window shown in Figure 8 or directly via the I2C bus using specific commands Content of the user memory is saved into the configuration file when the file is saved Note that this does not change the current DPM contents until the DPM is programmed with the file currently in me
24. ate is periodically saved to the non volatile memory Contents of the counter can be examined in the GUI IBS Monitoring Window shown in Figure 10 or directly via the I2C bus using specific commands 9 4 4 IBV Monitoring The DPM continuously monitors the intermediate bus voltage via the IBVS input and the built in 10 bit ADC The digital representation of the bus voltage is stored in RAM and reported in the IBS Monitoring window shown in Figure 10 In addition the DPM continuously compares the value of IBV to the Undervoltage and Overvoltage thresholds programmed in the GUI Intermediate Bus Configuration Window shown in Figure 11 Figure 11 Intermediate Bus Configuration Window Z Power One 12C 65509_DM7316 Eval Board Rev A z1c File Edit view Tools Window Help Type Bus Voltages Devices Faults Sg 12C Bus E DM7316 User Memory e Group 00 DP7115 IB Voltage Monitoring 01 DP7115 Q 04 AuxDev0 S E Group B 02 DP7015 12 0 C Use an extemal 2 5 reference Pin 44 IBY Nominal IBY UnderVoltage 9 78 VY 05 AuxDev1 IBV OverVoltage 14 16 W S E Group C 03 DP7007 Changing this option requires the DPM to be power cycled after programming Front End Turn On oO Auto turn on the Front End DPM FE pin at power up of the DPM If this option is not checked the FE can be turned on via the I2C command when required Chanaing this option requires the DPM to be power cycled after programming Y
25. ation Note for more details Figure 19 SVF File Generator Window SVF Generator JTAG Chain Settings DPM is single device on JTAG interface DPM is in a chain of devices Number of devices following the DPM Total number of bits in instruction registers of devices following the DPM Humber of devices ahead of the DPM Total number of bits in instruction registers of devices ahead of the DPM Delay Settings Delay as absolute timing Delay as a multiple of TCK TCK kHz 500 9 7 2 2 JTAG Instructions DM73XX series DPMs support only BYPASS and IDCODE instructions defined by IEEE 1149 1 SAMPLE PRELOAD and EXTEST instructions are not currently supported Summary of the supported instructions is shown in Table 7 Table 7 JTAG Instructions INSTRUCTION OPCODE REGISTER FUNCTION Places the 1 bit bypass register between the TDI and TDO pins which BYPASS 1111 Bypass allows the BST data to pass synchronously through the DPM to other devices in the JTAG chain IDCODE 0001 JTAG ID Selects the ID register and places it between the TDI and TDO Note The Instruction Register is 4 bit wide 9 7 2 3 Identification Register Format and contents of the JTAG Identification Register are shown in Table 8 DM73XX Series Digital Power Manager www power one com power LOWER AN POWET ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET Table 8 JTAG ID Register MSB LSB BIT 31 28 27 12 11 1 0 DESCRIPTION Version Part Numb
26. e inhibit function can be used for a variety of applications such as e _ Hardware based control of groups of POL converters and Auxiliary Devices e Delayed turn on at power up Automatic Turn On is enabled but the interrupts are held low during power up Note that POL converters can be programmed even when an interrupt is held low The interrupt inputs should be controlled with open collector devices The propagation delay between the external device pulling the interrupt input low and the DPM pulling down OK lines and triggering the turn off process is approximately 10us This option is set as part of DPM Configure Faults dialogs DM73XX Series Digital Power Manager www power one com power AN Lpwer POWEI ONG NJ A MEMBER OF THE ABB GROUP DATA SHEET Figure 16 Interrupt Configuration Dialog Interrupt Propagation ls Group Affects reprogramming Group trigger amp 6 C OD Interrupt C O0 Interrupt 1 C O O Interrupt 2 Interrupt 3 9 5 4 2 Group Reprogramming Trigger An interrupt that is programmed as a group reprogramming trigger always acts only on one group of POL converters Interrupt 0 acts on Group A Interrupt 1 acts on Group B and so on The assignment is fixed and cannot be changed by the user When the interrupt is pulled low the DPM will program the group of POL converters Upon completion of the programming the DPM will turn on the POL converters if the Auto Turn On is enabled When the interrupt input
27. e threshold 0 45 VDD 0 81 VDD V OKhys OK input hysteresis 0 37 1 1 V OKsink OK sink capability Vok 0 5V 30 mA Enable Outputs EN 3 0 VEN EN logic level enabled High VEN EN logic level disabled Low VenH aa VDD 0 6 V Verl EN pe n ae 05 V 7 4 iC INTERFACE PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS ViL Input low voltage 0 5 0 3 VDD V ViH Input high voltage 0 7 VDD VDD 0 5 V Vhys Input hysteresis 0 05 VDD V VoL Output low voltage Is nk 3mA 0 0 4 V tr Rise time for SDA and SCL 20 0 1Cp 300 ns tof Output fall time from ViHmin to ViLmax 20 0 1Cp2 250 ns i Input current each I O pin 0 1Vpp lt Vi lt 0 9Vop 10 10 UA Ci Capacitance for each I O pin 10 pF fscL SCL clock frequency 0 400 kHz Standard Mode EC fsc lt 100kHz Reu External pull up resistor 1 1000 Cp2 kQ HDSTA Hold time repeated START condition 4 0 Us tLow Low period of the SCL clock 4 7 Us HIGH High period ofthe SCL clock 4 0 US tsusTA Setup time for a repeated START condition 4 7 US HDDAT Data hold time 0 3 45 US tsuDAT Data setup time 250 ns tsusTD Setup time for STOP condition 4 0 US sur Bus free time between a STOP and START condition 4 7 Us 1 HRES_N Input Because the input does not have an internal ESD protection diode connected to VDD the user needs to add an external diode between the HRES_N and VDD pins as shown in Figure 3 2 C bus capacitance in pF typically from 10pF to 400pF BCD 00317_AA_October 10 2013 www power one com power AN
28. ed Fast turn off Regular Continue Continue Continue OCP turn off operating operating operating Tracking or Enabled Enabled Any Disabled Female Regular Turn off with Continue Continue OCP turn off turn off delay operating operating Macangar Enabled Enabled Disabled Enabled Fasttum off Regular Tum offwith Regular Continue OCP turn off turn off delay turn off operating Tracking or Regular Turn off with Regular Turn off with OCP Enabled Enabled Enabled Enabled Fast turn off mar tum off delay m or turn off delay Fast turn off l OVP or Phase Enabied Disabled Any Disabled low side FET Fast turn Continue Continue Continue Voltage is ON off operating operating operating Fast turn off Turn off nase Enabled Enabled Any Disabled lowsideFET POSLU without tum anne Continue 9 is ON off delay P 9 P 9 Fast turn off Turn off OVP or Phase Enabled Enabled Disabled Enabled lowside FET Fasttum Withoutturn Regular Continue Voltage off turn off operating is ON off delay Fast turn off Turn off OVP or Phase Enabled Enabled Enabled Enabled lowside FET astlum Withouttum Regular Turn off with Voltage is ON off off delay turn off turn off delay BCD 00317_AA October 10 2013 www power one com power N POWCF ONG NJ A MEMBER OF THE ABB GROUP DATA SHEET When propagation is enabled the faulty POL converter pulls its OK pin low A low OK line initiates turn off of other POL converters in the group and signals the DPM to pull other
29. emory Endurance 40 C to 85 C ambient 10 000 o 7 ELECTRICAL SPECIFICATIONS Specifications apply at VDD from 3V to 3 6V ambient temperature from 40 C to 85 C and utilizing proper decoupling as shown in Figure 3 unless otherwise noted BCD 00317_AA_October 10 2013 www power one com power AN POWEr One A MEMBER OF THE ABB GROUP DATA SHEET 7 4 POWER SPECIFICATIONS PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS Input Supply Voltage VDD pin 3 0 3 6 VDC Undervoltage Lockout Hardware reset is triggered below this threshold 2 3 2 5 2 7 VDC Input Supply Current VDD pin 3 3V 12 20 mA VREF voltage AREF pin 2 3 2 56 2 7 VDC IBVS input voltage range GND VREF VDC IBVS input resistance 100 MQ 7 2 FEATURE SPECIFICATIONS PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS Intermediate Voltage Bus Protections Overvoltage Protection Threshold With external 5 7 1 ratio divider IBV 14 6 V Undervoltage Protection Threshold With external 5 7 1 ratio divider 0 IBV V Threshold Hysteresis With external 5 7 1ratio divider Symmetrical 114 mV relative to average threshold value Accuracy of Protection Thresholds Internal voltage reference 1 resistive divider 10 10 VTH Internal ADC Conversion Error With external 5 7 1 ratio divider 43 43 mV Front End Enable FE_EN VFE_EN Front End logic level enabled High VFE_EN Front End logic level disabled Low Isrc Source Current Vre_en Vpp 0 5V 5 mA Isink Sink Current Vee_en 0 5V 5 mA Crowba
30. er Manufacturer s Identity 1 CONTENTS 0000 1001010100000010 00000011111 1 10 PINOUT TABLE PIN PIN BUFFER NAME PINNO TYPE TYPE PIN DESCRIPTION NOTES 6 25 7 VDD 42 57 60 Supply Positive Supply 8 9 26 VSS 38 43 58 Supply Ground SD 56 I O ST OCPU Sync Data Line OKA 11 OKB 13 OKC 20 I O ST OCPU OK Lines OKD 53 FE_EN 17 O CMOS Front End Enable CB 23 O CMOS Crowbar Trigger SDA 30 I O ST OC I2C Interface SCL 27 I O ST OC I2C Interface ADDRO 47 ADDR 46 STPU I2C Interface Address ADDR2 45 INO_N 41 INI_N 40 IN2 N 37 STPU Interrupts IN3_N 36 TCK 31 TMS 32 Leave open if JTAG interface is TDO 33 HAG CHET not utilized TDI 34 ENO 5 EN1 7 m EN 55 O CMOS Auxiliary Device Enables EN3 50 PGO 54 PG1 52 m PG 54 STPU Auxiliary Device Power Good PG3 49 RES_N 18 STPU System Soft Reset ACFAIL_N 16 STPU AC Fail Trigger LCK_N 61 STPU Write Protect Lock HRES_N 4 STPU Cold Reset polen uage instructions in paragraph 10 6 4 IBVS 48 A Intermediate Bus Voltage Sense AREF 44 A Analog Reference IR 63 Internal Reset Connect to VSS via 10k 1 2 3 10 12 14 15 nc 19 21 22 24 28 29 No Connect Leave floating 35 39 59 62 64 Legend l input O output l O input output P power ST Schmitt trigger OCPU open collector with pull up OC open collector CMOS CMOS output stage STPU Schmitt trigger with pull up A analog BCD 00317_AA_October 10 2013 www power one com power AN POWEr One NJ A MEMBE
31. ficient Margining High Selection Margining Low Selection Cyclic Redundancy Check Register 0 Cyclic Redundancy Check Register 1 x denotes the POL address 0 31 not downloaded to the POL during programming 9 1 4 Monitoring Data OEh OFh 10h 11h 12h 13h 14h 15h 16h 17h 18h 19h 1Ah 1Bh 1Ch 1Dh 1Eh 1Fh COH_x C1L_x C1H_x C2L_x C2H_x C3L_x C3H_x reserved reserved reserved reserved reserved reserved reserved VOML_x VOMH_x CRCO_x CRC1_x reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved CRCO_x CRC1_x DATA SHEET Dig Controller Numerator 2 Coefficient High Byte Dig Controller Numerator z Coefficient Low Byte Dig Controller Numerator z Coefficient High Byte Dig Controller Numerator z Coefficient Low Byte Dig Controller Numerator z Coefficient High Byte Dig Controller Numerator z3 Coefficient Low Byte Dig Controller Numerator z3 Coefficient High Byte Output Voltage Margining Low Value Output Voltage Margining High Value Cyclic Redundancy Check Register 0 Cyclic Redundancy Check Register 1 The DPMs can retrieve current temperature output voltage and status information from each of the POL converters and status information only from Auxiliary Devices Monitoring data is stored in RAM and can be accessed vi
32. front ends Figure 18 Interface Between DPM and DC DC Front End DPM Front End 9 6 3 Crowbar When the crowbar protection is enabled the CB pin is internally pulled up to 3 3V for 1ms It is capable of supplying SmA to turn on a crowbar circuit DM73XX Series Digital Power Manager www power one com power AN LOWET POWEr 0ne NJ A MEMBER OF THE ABB GROUP DATA SHEET 9 6 4 HRES N The HRES_N is an active low digital input When it is pulled low the DPM will perform full hardware reset including processor memory and communication interface The POL converters and auxiliary devices will be turned off although sequencing and tracking during the turn off are not guaranteed Communication with a host processor or GUI if established will be lost When the input is released the DPM will first program all POL converters and then turn them on if the Auto Turn On is enabled Unlike all other I O pins on the DM73XX DPM the HRES_N does not have an internal ESD protection diode connected to VDD Therefore it is necessary to add the diode externally as shown in Figure 3 The HRES_N function is intended as an emergency reset and except as indicated below should not be used in normal system operation It is necessary to use an external reset circuit see Fig 3 to hold the HRES_N line low until the VDD supply reaches steady state conditions Power One Inc successfully tested the On Semi voltage detector p n NCP303LSN27T1 although o
33. gs In addition the DPM will save the contents of the Run Time Counter into the non volatile memory If the IBV does not decrease below the IBH threshold minus the hysteresis within the next 50ms the DPM will pull low the FE_EN output and clear all bits in the POL Programming Status registers The IBV High bit in the IBS Monitoring Window will change to red If the IBV still does not change in 50ms the DPM will pull the CB pin high for 1ms to trigger an optional crowbar protection One second after the IBV decreases below the IBH threshold minus the hysteresis the DPM will pull the FE_EN high and program all POL converters Upon completion of the programming process the DPM will turn on the POL converters if the Auto Turn On is enabled in the POL Group configuration window shown in Figure 9 The propagation delay between the IBV increasing decreasing above below corresponding thresholds and the DPM pulling down OK lines and triggering the turn off process is approximately 1ms 9 4 4 1 Voltage Reference For the purposes of IBV monitoring the user can select either the DPM s internal voltage reference or an external 2 5V voltage reference The selection is made by clicking an appropriate radio button in the DPM Configuration Bus Voltages dialog as shown previously in Figure 11 The DPM s internal 2 56V voltage reference is effective accuracy of the IBV protection thresholds to 15 If the accuracy is sufficient the user does not need to make any
34. he run time registers contain status information and are evaluated during run time The Write Protection register WP is a volatile register that defaults to write protect at power up 9 1 3 POL Setup Registers Since the POL converters contain only RAM the data defining performance parameters for each POL and Auxiliary Device such as the output voltage protection thresholds feedback loop compensation turn on and turn off delays fault management settings etc is stored in the POL setup registers in the DPM The POL setup registers consist of 23 data bytes and 2 CRC bytes The Auxiliary Device setup registers occupy the same amount of bytes as a POL converter but only 3 registers have meaningful data The other registers should be filled with 0x00 The POL setup registers are listed in Table 2 Register significance is different in some cases between the new DP and older ZY series POLs which are still supported Differences are in bold for the DP series devices ADDRESS REGISTER OFFSET DP7000 DP8000 POL 00h PC1_x 01h PC2_x 02h PC3_x 03h TC_x 04h INT_x 05h DON_x 06h DOF_x 07h VLC 08h CLS_x 09h DCL_x OAh PC4 OBh V1H OCh VAL 0Dh V2H Table 2 POL Setup Registers ADDRESS CONTENT OFFSET Protection Configuration 1 00h Protection Configuration 2 01h Protection Configuration 3 02h Tracking Configuration 03h Interleave Configuration and 04h Frequency Selection Turn On Delay 05h Turn Off Delay 06h Voltage Loop Configuration
35. is released the DPM will pull the appropriate OK line low The POL converters in the group will execute regular turn off ramping their output voltages down according to the turn off delay and falling slew rate settings In addition the DPM will clear all bits in the POL Programming Status registers The group reprogramming trigger is mostly used to support hot swap of boards and daughter cards that do not have a DPM installed on them as shown in Figure 17 Figure 17 INTO Configured as Group A Reprogramming Trigger Mother Board or Back Plane Group A_Daughter Card In this configuration the Interrupt 0 INTO_N is configured as the group A reprogramming trigger The DPM is installed on a mother board or a backplane A daughter card with a group of POL converters is being inserted in the system during normal operation At first the long pins carrying power and the OK_A line signal make contact Then the short pins carrying the SD and interrupt signals make contact Once the interrupt senses low input voltage it will command the DPM to program all POL converters in the group A Upon completion of the programming the DPM will turn on the POL converters if the Auto Turn On is enabled When the daughter card is being removed the interrupt input is released as soon as the short pins break the contact The DPM will immediately pull the OK_A line low turning off all POL converters in the group A according to the turn off delay and falling slew rate se
36. l Pol08 Pol09 Pol10 Poll 1 Poll2 Poll3 Folld Poll5 01 DP7115 04 AuxDevO gt Group B 02 DP7015 Q 05 AuxDev1 E gt Group C 03 DP7007 Parameter Addr Name Alias Vendor Package Size Output Yoltage Current Limit Load Regulation Margining High Margining Low Under Yoltage Parallel Bus BUS1 BUS1 Power Good Hig Over Voltage Tum On Delay Tum Off Delay Rising Slew Rate Falling Slew Rate Zerol Zero Polel Pole2 Pole3 Pw Frequency Interleave ADC High ADC Low Power Good Low Pol 00 00 DP7115 DP7115 Power One 22 2 12 1 8 23 44 0 0 my A 5 6 75 90 110 130 20 ms 15 ms 0 20 ms 0 50 Y ms 500 kHz 0t Pol 01 01 DP7115 DP7115 Power One 22 2 12 1 8 23 44 1 48 mV 7A 5 6 75 90 110 130 20 ms 15 ms 0 20 Yms 0 50 ms 500 kHz 180 Pol 02 DP7015 DP7015 Power One 22 2 12 1 5 19 84 0 0 my 5 6 75 90 110 130 O ms 13 ms 0 20 ms 0 50 W ms 1000 kHz pt Pol 03 Pol 04 Pol 05 03 04 05 DP7007 AuxDevO AuxDev DP OO AuxDevO AuxDey Power One 22 2412 1 52 VW 10 64 0 0 my 44 5 6 75 90 110 130 20 ms 11 ms 0 20 Yms 0 50 Y ms 500 kHz o Configure Command Log Simulate Program Monitor C Log to File pat 12c HER DEC Cur HLP eee x No Error 9 1 2 DPM Registers The DPM setup registers occupy 70 by
37. lity as the ACFAIL_N input and can be connected to a simple turn on off switch or to a sensor that shuts the entire system down when it is activated The ACFAIL_N and RES_N inputs should be controlled with open collector devices The propagation delay between the external device pulling the input low and the DPM pulling down OK lines and triggering the turn off process is approximately 1ms 9 6 2 Front End Enable The FE_EN pin is dedicated to the control of a DC DC Front End The Front End is typically used to convert the 48V into the intermediate bus voltage IBV If the DPM is powered from an auxiliary source not from the IBV it can control the DC DC Front End When FE_EN is internally pulled up to 3 3V the Front End is enabled The FE_EN output can provide up to 5mA of current When the FE_EN goes low the Front End is disabled The Front End can be enabled and disabled via the GUI IBS Monitoring Window or directly via the I2C bus using specific commands The FE_EN pin should not be directly connected to the Enable pin of the DC DC Front End Typically the Enable pin is referenced to the primary side of the Front End that is isolated from the low voltage secondary side In addition the Enable pin can be pulled up internally to a voltage potentially damaging to the DPM FE_EN output The best method is to interface the DPM with the Front End through an optocoupler as shown in Figure 18 This configuration provides interface for negative logic
38. low the hardware lock is active and the memory blocks are then read only I2C write commands to the DPM return an error code 0x00 The write commands to the POL converters bypassing the DPM are also disabled If the pin is left floating the hardware lock is disabled and the software write protection is active 9 1 1 2 Software Protection Software write protection allows users to protect the various memory blocks from being overwritten through the 12C bus At the power up the WP register is defaulted to write protect Software write protection can be disabled by checking appropriate boxes in the Write Protection subsection of the DPM Program Advanced dialog shown in Figure 4 or via the 12C bus by writing directly into the register Write protections are automatically restored when the DPM s input power is recycled BCD 00317_AA_October 10 2013 www power one com power AN POWET ONE VW A MEMBER OF THE ABB GROUP Figure 4 GUI DPM Advanced Programming Dialog 2 Power One 12C 65509_DM7316 Eval Board Rev A z1c File Edit Window ENE M Home 2 12C Bus 4 DM7316 gt Group 00 DP7115 view Tools Help Configure v Type Bus Voltages Devices Faults User Memory Group BCD Device DM7316 Addr 0x5e ID 65500 DATA SHEET Right click table to modify displayed parameters or select Edit Preferences Auto On P Monitor S Monitor Pol00 Pol01 Pol02 Pol03 Pol04 Pol05 Pol Pol
39. mory DM73XX Series Digital Power Manager www power one com power AN LAWET Power on A MEMBER OF THE ABB GROUP DATA SHEET Figure 5 User Memory Window Z Power One 12C 65509_DM7316 Eval Board Rev A z1c modified Sle File Edit View Tools Window Help A Ti A A 1 ar a 5 I DH tal L a zB Fr El 5 bio ar LE sl a pa DM7FIE Group A ue Characters left 04 AuxDevd Group B 02 DRFOIS O05 SusDev B Group C 03 OProo Type Bus Voltages Devices Faults User Memory User memory is saved in FLASH Save Board Ib revision data or whatever wou want 7 Command Log _ Log to File TST 12C AES CEC CLR HLF Configure Simulate Program Monitor PO CX No rrr 9 2 AUXILIARY DEVICES The DM73XX DPM includes all necessary circuitry to control and monitor four Auxiliary Devices Virtually any device which has an on off input and a monitoring output can be an Auxiliary Device Typical examples of Auxiliary Devices include analog POL converters linear regulators and fans Auxiliary Devices are controlled and monitored via the Graphical User Interface The DPM treats Auxiliary Devices as d pwer POL converters each Auxiliary Device has an address and is assigned to one of the groups as shown in Figure 8 device at addresses 03 Turn on and off delays can be programmed and faults can be propagated from POL converters to the devices Auxiliary Devices are controlled through
40. ndow 2 Power One 12C 65509_DM7316 Eval Board Rev A z1c File Edit View Tools Window Help HUSD O0 gje 2 Er T E f peal Configure v Device DM7316 Addr Ox5e ID 65500 us DM7316 Type Bus Voltages Devices Faults User Memory 25 Group 00 DP7115 Tum On Fault Propagation 0 DP7115 All correctly programmed Devices will start up Q 04 AuxDev0 gt Group B 02 DP7015 System doesn t start if there is a programming error Only Groups with no programming error will start up 05 AusDevi This setting affects the Group auto turn on feature B E Group C and also the Group System I2C turn on commands 03 DP7007 Changing this option requires the DPM to be power cycled after programming Group Fault Propagation To On Error Cont FE Crow 4 D off Bar A 0 0 BE 0 0 D Interrupt Propagation Is Group reprogramming trigger Interrupt 0 d Interrupt 1 a Interrupt 2 go Interrupt 3 Y w Configure rE Erer rEer rT Command Log EXP C Log to File TAT 12C CLR HLP u Ready X No Error DM73XX Series Digital Power Manager www power one com power WEF DATA SHEET The fault propagation from POL converters to the auxiliary devices can be disabled by checking the bit in the Auxiliary Device Fault Management window as shown in Figure 15 It is not possible to propagate a fault from an Auxiliary Device to POL converters AN POWET ONE A MEMBER OF TH
41. nge of the input is 2 56V and the IBV should be scaled down by a factor of 5 7 for proper reporting of the IBV with the d pwer GUI INT 0 3 Interrupts Pins 41 40 37 36 Four active low inputs with internal pull ups Each of the inputs can be configured for two functions first the interrupt input acts on the OK line s to stop momentarily the operation of group of POLs and Auxiliary Devices second the interrupt can be used as a hot swap trigger In this function the interrupt input triggers the programming of a group When released POLs are assumed to be disconnected from the DPM IR Internal Reset Pin 63 Connect to VSS via a 10kOhm resistor LCK_N Memory Lock Pin 61 Active low input with internal pull up When LCK_N is pulled low all memory within the DPM is write protected The write protection cannot be disabled by software OKA OKB OKC OKD Group OK Signals Pins 11 13 20 53 An open drain input output with internal pull up resistor Pulling low the OK input will indicate to the DPM a fault in a Group the DPM can also pull an OK line low to disable a Group PG 0 3 Power Good Pins 54 52 51 49 Input with internal pull up resistor The pin is used to read the status of an Auxiliary Device RES_N Active Low Reset In Out Pin 18 Input with internal pull up resistor When pulled low a soft reset of the system sequenced turned off of all POLs and Auxiliary Devices is initiated When released the whole system is
42. r CB Vc Crowbar Enable High Vc Crowbar Disable Low Isrc Source Current Vcp Vpp 0 5V 5 mA Isink Sink Current Vcp 0 5V 5 mA Tce Duration of Enabling Pulse 1 ms 7 3 SIGNAL SPECIFICATIONS PARAMETER CONDITIONS DESCRIPTION MIN NOM MAX UNITS SYNC DATA Line SDpu SD pull up resistor 5 kO SDthrL SD input low voltage threshold 0 31 VDD 0 52 VDD V SDthrH SD input high voltage threshold 0 45 VDD 0 81 VDD V SDhys SD input hysteresis 0 37 1 1 V SDsink SD sink capability Vsp 0 5V 30 mA Freq_sd Clock frequency 450 550 kHz Tsynq Sync pulse duration 22 28 of clock cycle TO Data 0 pulse duration 72 78 of clock cycle Interrupt Inputs INT_N 3 0 DM73XX Series Digital Power Manager www power one com power awer AN POWET ONE A MEMBER OF THE ABB GROUP DATA SHEET Rpu3 Pull up resistor 30 KO VthrL3 Input low voltage threshold 0 31 VDD 0 52 VDD V VthrH3 Input high voltage threshold 0 45 VDD 0 81 VDD V Vhys3 Input hysteresis 0 37 1 1 V ADDRI3 0 ACFAIL_N RES_N LCK_N PG 3 0 Inputs Rpu1 Pull up resistor 20 50 KO VthrL1 Input low voltage 0 5 0 2 VDD V VthrH1 Input high voltage 0 7 VDD VDD 0 5 V HRES_N Input HRES_N pull up resistor with series diode Rpu2 30 60 kQ see note VthrL2 HRES_N input low voltage 0 5 0 2 VDD V VthrH2 HRES_N input high voltage 0 9 VDD VDD 0 5 V Inputs Outputs OK_A OK_B OK_C OK_D OKpu OK pull up resistor 5 KO OKthrL OK input low voltage threshold 0 31 VDD 0 52 VDD V OKthrH OK input high voltag
43. s Digital Power Manager www power one com power AN qwer Power one NJ A MEMBER OF THE ABB GROUP DATA SHEET All d pwer POL converters are connected to the DPM and to each other via a single wire synchronization data SD line The line provides synchronization of all POL converters to the master clock generated by the DPM and simultaneously carries bidirectional data transfer between POL converters and the DPM The DPM communicates via the IC bus with the host system and or the Graphical User Interface In this application besides POL converters the DPM also controls and monitors two auxiliary devices a Voltage Regulation Module VRM and a Low Dropout Regulator LDO While these devices are not d pwer compliant and may not even be manufactured by Power One they are integrated into the system by communicating with the DPM via their Enable pins connected to ENX outputs of the DPM In addition the DPM monitors status of the auxiliary devices via its PGX inputs connected to Power Good and Error Flag outputs of the auxiliary devices The DPM can control and monitor four or more independent auxiliary devices The DPM can also trigger an optional crowbar circuit and provide undervoltage and overvoltage protections of the intermediate bus voltage In addition the DPM can be controlled by a host system via the interrupt inputs RES_N and the ACFAIL_N inputs 9 DESCRIPTION The DM73XX series DPMs perform translation between the I2C in
44. s and the user memory can be preloaded into DPMs by Power One or the DPMs can be programmed by the user via the GUI IC bus or JTAG programming interface The DPMs can be programmed either before or after installation on a host board To modify POL converter settings the user can directly access the registers of a POL converter via the 12C bus bypassing DPM s POL setup registers The 12C commands are translated by the DPM and converted into appropriate SD commands to read write from into the registers of a POL converter Writing into these registers is limited by the hardware LCK_N DM73XX Series Digital Power Manager www power one com power WEF DATA SHEET and or software write protections Since POL converters do not have non volatile memory data written directly into POL converter registers will be lost when the input voltage is removed AN POWET ONE A MEMBER OF THE ABB GROUP 9 4 MONITORING 9 4 1 POL Monitoring d pwer and Z one POL converters continuously monitor their own performance parameters such as output voltage output current and temperature The monitored parameters are stored locally in the POL converters and updated every 1ms If monitoring feature is enabled the DPM will be continuously copying status and parametric data from POL converters into DPM s monitoring data registers The monitoring is enabled by checking the appropriate Retrieve Monitoring bits in the GUI Group Configuration window
45. standard group turn on and off commands and are fully synchronized with turn on off timing of POL converters Four enable outputs ENO EN3 control the Auxiliary Devices Four monitoring inputs PG0 PG3 read status of the Auxiliary Devices The enable outputs and monitoring inputs are paired together and permanently assigned to specific pins of the DPM as shown in Figure 6 Adding an AUX device is done the same way as adding a POL select an uncommitted address and then the AUX device desired In this example two AUX devices are already present BCD 00317_AA_October 10 2013 www power one com power AN POWET ONE NJ A MEMBER OF THE ABB GROUP DATA SHEET Figure 6 Auxiliary Device Type Window Device M7316 Addr Ox5e ID 65500 Type Bus Voltages Devices Faults User Memory Group A BCD Aight click table to modify displayed parameters or se Auto On Monitor nee En f aomi Parallel Bus Name DP7N5 DP7115 Pol sl Alias DP7115 DP7115 Proll Vendor PowerOrne PowerUne f Pall E Package Size 222412 222412 2 Polls Output Voltage 1 6 1 Palll4 Current Limit 23 48 23 44 Polls Load Regulation 0 0 mW 1 48 mW Pol 6 bd aracin Dual 3 Ae 5a Poll AUNDENE Polis i Poli DPSODO Power Good Hig 110 110 Poll Over Voltage 130 130 Pall 2 Tum On Delay U ms U ms Bal Turm Off Delay 15 ms
46. terface connected to a host system or the Graphical User Interface and the SD communication bus connected to dPOL converters In addition DPMs carry out programming monitoring data storage POL group management hot swap control protection and control and monitoring of auxiliary devices The DPMs can be controlled via the GUI or directly via the I2C bus by using specific commands described in the DPM Programming Manual 9 1 DPM MEMORY The DPM memory consists of RAM and non volatile memory Flash The RAM is used for programming operations and manipulation of the various blocks of configuration setup status and monitoring registers Non volatile memory is used to store programming and configuration data Flash memory holds DPM set up registers POL set up registers monitoring data and user memory data Setup registers for the DPM and the POL converters are protected by CRCs that are checked during programming of POL converters and at the power up of the DPM The LCK_N pin and the write protection register WP limit the write access to the memory blocks in the DPM and POL converters The WP register content is defaulted to write protect upon powering up the DPM 9 1 1 Write Protection There are hardware based and software based memory write protections The hardware protection takes precedence over the software protection 9 1 1 1 Hardware Protection The LCK_N pin enables the hardware memory write protection If the pin is pulled
47. tes and contain all necessary information to set up the DPM functionality define POL converters and Auxiliary Devices group membership and behavior margining interrupt configurations etc they DPM registers are listed in The table relates to the DPM model number DM7332 capable of supporting up to 32 POL converters For other DPM models some of the registers and or bits in the registers are not activated depending on the number of supported POLs Groups Interrupts Parallel Buses for the specific DPM Writing into an unsupported register or bit will have no effect reading from an unsupported register or bit will return an error code 0x00 Table 1 DPM Setup Registers ADDRESS REGISTER REGISTER USER WRITE OFFSET NAME PONIEN TYPE ACCESS PROTECT MEAT VANE 0x00 GD1 3 0 Group Definition Register 1 Static R W yes 0x00000000 0x04 GD2 3 0 Group Definition Register 2 Static R W yes 0x00000000 0x08 GAC Group A Configuration Static R W yes 0x00 0x09 GBC Group B Configuration Static R W yes 0x00 0x0A GCC Group C Configuration Static R W yes 0x00 0x0B GDC Group D Configuration Static R W yes 0x00 0x0C FPC1 Fault Propagation Configuration 1 Static R W yes 0x00 0x0D FPC2 Fault Propagation Configuration 2 Static R W yes 0x00 0x0E EPC Error Propagation Configuration Static R W yes 0x00 3 Writing into memory locations beyond address offset 0x96 must be avoided DM73XX Series Digital Power Manager www power one com power awer AN POWET ONE
48. ther similar devices can also be utilized Alternatively the HW_RES pin can be connected to the output of a CPLD or similar device and controlled via the system supervisory circuitry 9 7 COMMUNICATION INTERFACES 9 7 1 IC Interface The DM73XX series DPMs have the industry standard I2C interface fully meeting the requirements of the I2C Bus Specification Version 2 1 from Philips Semiconductors The I2C interface is working in the following configurations e standard 100kbs and fast 400kbs data transfer rates e 7 bit addressing 4 MSBs fixed 3 LSBs programmable by ADDR 2 0 The address prefix of the DM73XX is 0x50 This allows encoding DPM addresses 0x50 0x52 Ox5E BitO is the read write bit The DPM always acts as the I2C slave while the host processor always acts as the IC master Refer to the DPM Programming Manual for the detailed description of the 12C communications Note It is recommended to use Power One s ZM00056 KIT USB to 12C Adapter kit for the communication between a DPM and a computer with the Power One I2CGraphical User Interface 9 7 1 1 Watchdog Timer In order to prevent occasional hanging of the 12C bus a watchdog timer is started whenever an 12C command is initiated If the command is not executed before the watchdog times out the DPM will assume that the 12C bus is in an error condition e g the SCL or SDA lines are pulled low continuously and it will reset the I2C bus The watchdog timeout is 1
49. ttings BCD 00317_AA_October 10 2013 www power one com power AN POWC ONG NJ A MEMBER OF THE ABB GROUP DATA SHEET 9 6 CONTROLS 9 6 1 ACFAIL_N and RES_N The ACFAIL_N and RES_N are active low digital inputs When one of the inputs is pulled low the DPM will pull all OK lines low turning off all the POL converters and the Auxiliary Devices in all groups The POL converters will execute regular turn off ramping their output voltages down according to the turn off delay and falling slew rate settings In addition the DPM will clear all bits in the POL Programming Status Registers and save the contents of the Run Time Counter into the non volatile memory The AC_FAIL in or RES_N in bit in the IBS Monitoring Window will change to red When the input is released the DPM will first program all POL converters and then turn them on if the Auto Turn On is enabled Otherwise the user will need to send the turn on command via the 2C bus The ACFAIL_N is typically connected to an AC DC front end Whenever the AC voltage disappears the ACFAIL_N signal will be set low If there is no battery backup it usually means the DC output will disappear after 20ms If the turn off delays and falling slew rates of each POL converter are set to the values such that all POL converters will have fully turned off within the hold time of the AC DC front end then output voltage tracking during turn off is guaranteed The RES_N input has the same functiona
50. ur groups A group of POL converters is defined as a number of POL converters with interconnected OK pins Auxiliary Devices are added to a group in the GUI without any external connections A group can include from 1 to 32 POL converters but a POL converter can be a member of only one group In addition the OK lines can be connected to the DPM to facilitate propagation of faults and errors between groups One DPM can manage up to four independent groups A B C and D depending on model of the DPM Group management includes fault and error propagation margining turn on and turn off monitoring setup and interrupt configuration 9 5 1 Fault and Error Propagation dP series POL converters protect outputs by triggering either a fault or an error depending on the severity of the problem see POL converter datasheets Fault propagation between POL converters belonging to the same group is a programmable function of POL converters The DPM allows propagating faults and errors between groups of POL converters and in case of an error to a DC DC front end and an optional crowbar The propagation delay for fault error propagations is less than 10us To enable fault and error propagation the respective bits needs to be checked in the GUI Fault and Error Propagation window shown in Figure 14 Note that cross propagation of faults errors means fault in Group X propagates to Y and vice versa should be avoided Figure 14 Fault and Error Propagation Wi
51. w power one com power Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery amp Lifecycle Information Power One DM7332G B1 DM7316G B1 DM7304G B1 DM7308G B1 DM7332G 65514 B1 DM7304G 65511 R100 DM7316G 65514 R100
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