User`s Manual (Forth edition) - HiTech Global Distribution, LLC
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1. Manufacturer v Jv Debug The target setting is required to operate Configuration file confirms the contents and starts start uy au ados A chain device was added ii Target system setting 1 JTAG daisy chain LOL Spartan IIE Others XC2S366E Command length 5 Command length 4 TDO The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing 50 Chapter4 Setting CSIDE PALMICE FPGA Users manual Insertat cursor position A chain device is added between Chain 1 and Chain 2 using Insert at cursor positon on the pop up menu olx I Target system setting 1 JTAG clock 25MHz v JTAG daisy chain Chain 2 Set JTAG daisy chain Add Spartan IIE Insert at cursor position NC2S388E Command length 5 rane Move TDO _ KE coco Delete Delete all Update Freeze The target setting is required to operate PA Properties fter setting Pressing the button confirms the contents and starts start up processing A double click between the chain devices can perform the same operation Set a device parameter Wi Target system setting 1 JTAG daisy chain Chain 1 Cha Set Device Add ad Chain No 2 Y Device type Others y2. I Target system setting 1 Gi xX JTAG clock 2EMH ue JTAG daisy chain Chain 1 Set JTAG daisy chain Add Insert at cursor position Spartan IIE XC2S388E henge Command length 5 Hove gt Delete Delete all Update Freeze Properties The target setting is required to operate PA confirms the contents and starts start up processing ter setting Pressing the button The following setting page appears by selecting Set JTAG daisy chain JTAG Daisy Chain 3 JTAG 1 Y JTAG 2 1 gt Y Connecti Detailed Connect 2 Detailed 2 Bypass command length 5 Bypass command length JTAG 3 JTAG 4 Connecta Detailed Connects Detaled Bypass command length Bypass command lenatt JTAG 5 r JTAG 6 Gonnect Detailed GonnectB Detailed Bypass command length Bypass command lenath JITAG JTAG 8 El connect Detaled El lEonnecH8 Detailed Bypass command length Bypass command length 4 Automatically recognize the daisy chain connection state on start up of CSIDE Cancel Apply 46 Chapter4 Setting CSIDE PALMICE FPGA Users manual Use the following procedure to set the various values for the devices that are daisy chained together 1 2 3 Connect Insert a number of checks that corresponds to the devic
3. The target setting is required to operate PALMICE Press the confirms the contents and starts start up processing i Chain 3 Set JTAG daisy chain Add Inserbat Cursor position Change Move Delete Delete all Update Freeze Properties Delete key input after moving the cursor to a device chain to be deleted performs the same operation A Chain 2 device was deleted ii Target system setting 1 lel Es JTAG clock 25MHz JTAG daisy chain Chain 1 u Chain 2 Spartan IIE XC2S366E Command length 5 Others Command length 8 The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing Chapter4 Setting CSIDE 55 PALMICE FPGA User s manual Delete All All the added chain devices are deleted using Delete all on the pop up menu ii Target system setting 1 OE Xx JTAG clock 25MHz Y JTAG daisy chain Chain 1 Chain 2 o d Set JTAG daisy chain Add Spartan IIE Others Insert at cursor position XC2S366E Command length 5 Command length 8 Shane Move Delete Delete all Update Freeze The target setting is required to operate PALMICE Press the Update button after sett Properties confirms the contents and starts start up processing All the added devices
4. JBSY Orange Lights in JTAG communication T PWR Red Lights when the power 1s supplied to connected target sysytem POWER Green Lights when the power is supplied to PALMiCE The power is supplied from the original AC adapter RUN Green FPGA380 is not used HBSY Orange Lights in communication between the host PC and PALMICE Analyzer connector Is a 38 pin connector to connect the target system and the PALMICE Power switch Turns on and off the PALMICE unit power The power input state is checked with POWER LED as described in 3 USB connector Connects with the USB cable Power Connects with the original AC adapter Chapter2 Hardware specifications for PALMICE FPGA 11 PALMICE FPGA User s manual 2 14 Hardwarerevision A sticker showing information on the PALMICE unit is put on the backside of the unit PALMICE On Chip Deba MODEL F GIDE SERIAL Mu ore p mE eona AAEE Backside of the unit lt Revision sticker gt Example 1 Example 2 Read the number in the upper left and the last alphabetical character blacked out In example 1 shown above the hardware revision of the unit is read as 1 B In example 2 in which the alphabetical characters are not blacked out it is read as 2 0 The number is updated each time the board of the PALMICE unit is changed When the version is upgraded with the same board the alphabetical character is changed starting at 0 and then alphabe
5. Freeze Properties Pop up menu 44 Chapter4 Setting CSIDE PALMICE FPGA Users manual 4 3 2 JTAG probe related Set the following J TAG related items ii Target system setting 1 1 1145 clock 25MHz ue JTAG daisy chain 1 JTAG clock The next section describe the above mentioned items in details JTAGclock The JTAG clock is the TCK clock signal used by the JTAG interface In CSIDE clocks with frequencies of 150KHz 1 5 10 and 25 MHz can be selected With the Virtex II Pro since the TDO output signal is an open drain output there are limits on the clock selection due to the value of the pull up resistor in the target system Select a frequency of 10 MHz or lower ifa 1 KQ pull up resistor is used in the target system Chapter4 Setting CSIDE 45 PALMICE FPGA User s manual 4 4 Setting TAG daisy chain If the JTAG signal lines are cascade connected in the target system daisy chains of up to 8 elements can be handled The connection position and Bypass command bit length must be set for each device See section 4 4 1 Setting in dialog box and 4 4 2 Settings in window for details on the setting procedures Note that when started in state analyzer function only mode Analyzer only there are no JTAG daisy chain settings FPGA380 only 4 4 1 Setting in dialog box The setting mithod uses Set JTAG daisy chain on pop up menu in the JTAG daisy chain window
6. To start the search click Nest vau are searching on a floppy disk or CD ROM drive insert the floppy disk or CO before clicking Next Optional search locations Floppy disk drives v CD ROM drives Specify a location Microsoft Windows Update Back Cancel Chapter3 Setting PALMICE 33 PALMICE FPGA User s manual 7 Click the Next gt button when palmice2k inf has been found from the CD ROM by driver file searches Found New Hardware Wizard Driver Files Search Results hag Bas The wizard has finished searching for driver files for your hardware device S The wizard found a driver for the following device a COMPUTES PALMICE Windows found a driver for this device To install the driver Windows found click Next q spalmicezk inf lt Back Cancel 8 The following dialog appears The installation of the PALMICE device driver is complete Found Mew Hardware Wizard Completing the Found New Hardware Wizard D COMPUTE PALMICE USB Driver 1 00 Windows has Finished installing the software for this device To close this wizard click Finish Back Zarieel 34 Chapter 3 Setting PALMICE PALMICE FPGA Users manual 3 3 4 For Windows XP 1 Connect PALMICE with the USB port of the host PC 2 Turn on the PALMICE power switch Found New Hardware Wizard Welcome To The Found New Hardware Wizard This wizard helps you install software for COMPUTES PALMICE USB Drive
7. Others XC2S3 6GE XC2UP Change Command length 5 Command length 8 Command le TDO Chain 1 Delete a cham 3 Delete all Update Freeze Mu s Properties The target setting is required to operate PALMICE Press the Update button after setting Pres confirms the contents and starts start up processing A Chain 3 device was moved to the position of a Chain 2 device E Target system setting 1 Al ES JTAG clock 25MHz E JTAG daisy chain Spartan IIE Virtex II Pro Others xC2S388E XC2UP56 TDO Command length 5 Command length 14 Command length 8 The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing Chapter4 Setting CSIDE 53 PALMICE FPGA User s manual The Move operation can also be performed by dragging and dropping the chain device to be moved When the device icon 1s moved the outline of the device being dragged changes and the drag starts I Target system setting 1 JTAG clock 25MHz JTAG daisy chain zii x Chain 1 Chain 2 Chain 3 Uirtex II Pro thers NC2S388E NC2UP58 Command length 5 Command length 14 Command length 8 The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing When the device icon 1s moved the
8. gt PALMiCE FPGA User s Manual Forth edition No part of the manual may be used or reproduced without permission The contents and specifications of the product are subject to change without notice We assume no responsibility for results of using the product Windows is the registered trademark of Microsoft Corporation Other names of the program and the CPU mentioned in the manual are the trademarks or the registered trademarks of the respective manufacturers The copyright of CSIDE for PALMiCE FPGA is owned by Computex Co Ltd CSIDE and COMPUTEX are the registered trademarks of Computex Co Ltd Copyright C 2004 Computex Co Ltd Blank PALMICE FPGA Users manual CONTENTS CHAPTER 1 INTRODUCTION nennen nnns 1 icc ntreoducetiom avs in 9 12 Product tructura AA Co quB Bn quit AAA edu Copas ox PRIMUM S 3 1 8 Requirements Henne 4 TAOS een 5 1 5 Product specifications ee 6 IST PAIR ee ER 6 IE BP Funcions ur un 7 CHAPTER 2 HARDWARE SPECIFICATIONS FOR PALMICE FPGA 9 2 1 Part names and functions Innen hehehe hehehe hene nennen 10 2 1 1 General specifications eee 10 2 1 2 Functional specifications ee 10 RE AA MILD LLL LI 11 TA Hardware revision ter ee ae 12 29 Target interface 38 pins ie 13 2 2 1 Shape of 38 pin connector emen 13 Signals and circuit diagram for MICTOR connecotr s 14 Analyzer probe signal specification
9. length 5 Comma Device type Command length E FPGA Manufacturer Xilins Series Spartan ll Device xc251 5 m v Debug Configuration file fo Select TDO The target setting is required to operate PALMICE Press the Update button after settir confirms the contents and starts start up processing Also double clicking at position 3 opens a dialog box for insertion at the cursor position relative to the position of chain 2 Similarly double clicking at position 4 opens a dialog box for insertion at the cursor position relative to the position of chain 3 Pop up menu While a double click action and a direct data change are allocated to the most frequently used functions the pop up menu is allocated to the all the functions of the window The menu opens by clicking the right mouse button or by pressing Shift and F10 simultaneously when the window 1s active lel ES ii Target system setting 1 JTAG clock 25MHz z JTAG daisy chain Chain 1 Chain 2 Chain 3 D a Ea Spartan IIE Spartan II Othe SetJTAG daisy chain XC2s388E XC2515 Command length 5 Command length 5 Command 1 Add Insert at cursor position TDO Change Move gt Delete Delete all The target setting is required to operate PALMICE Press the Update button after setting Pe Update confirms the contents and starts start up processing
10. outline of the device being dragged changes and the drag starts If you drop the device 1con here the chain 1 device will be moved to chain 2 Wi Target system setting 1 JTAG clock 25MHz JTAG daisy chain lel ES Chain 1 Chain 2 Chain 3 Spartan IIE Virtex II Pro NC2S388E NC2UP5 68 Command length 5 Command length 14 Command length 8 The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing If you move the cursor over an area where the device icon cannot be dropped the cursor will switch to a No Entry mark If you drop here nothing will happen and the drag operation will be terminated Wi Target system setting 1 Al ES JTAG clock 25MHz E JTAG daisy chain Chain 1 Chain 2 Chain 3 Virtex II Pro Spartan IIE Others XC2UP56 XC2S366E TDO Command length 14 Command length 5 Command length 8 The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing 54 Chapter4 Setting CSIDE PALMICE FPGA Users manual Delete A Chain 2 device at the cursor position is deleted using Delete on the pop up menu E Target system setting 1 LOL JTAG clock JTAG daisy chain Chain 1 Spartan IIE Virtex NC2S388E NC2UF TDO Command length 5 Command le e
11. powered device with which PALMICE is disabled to operate To ensure a type of your hub see the manual for the used PC or that for the USB hub Supported OS OS English Windows 98S E Me Internet Explorer4 01 or above Windows 2000 Professional 24 Intel version only supported Windows XP Professional Home Edition The operation with WindowsNT and Windows 95 are not guaranteed An error message such as The entry point is not found is indicated and CSIDE does not start up if Internet Explorer 4 01 or above has not been installed For the latest information on the supported OS see our homepage or README TXT of CSIDE 4 Chapterllntroduction PALMICE FPGA Users manual 14 CSIDE CSIDE is provided on CD ROM CSIDE operation manual 1s provided online It contains its main unit and the interface driver A The online manual is created in HTML so that it can be browsed with a HTML browser such as Internet Explorer g CSIDE for PALMICE FPGA E Editor 1 C cside cpf File Edi View FPGA Set Data System Tool Window Help Yow a g Load S i Project S vbe Project File soln Settee lol UP380 xc2s300e up380 UP380 vhd led led vhd UP380 bmm UP380 b UP380 ucf UP380 ucl 6 library IEEE 9 18 entity UP388 is port BUZ SW1IN SW2IN SW3IN SW4IN LED1DT im FPGA Memory window 3 nr Format e bis Display information ETT Location Address Mem
12. the underlined section Oe VHDL Example Architecture declaration part architecture component CAPTURE SPARTAN2 port CAP in std logic CLK in std logic end component begin UC CAPTURE_SPARTAN2 port map CAP gt 1 CLK gt C_CLK OVerilog CAPTURE_SPARTAN2 UC CAP 1 b1 CLK C CLKG Chapter 5 FPGA Debugging Function Preparations 61 PALMICE FPGA User s manual The WRDTO signal is sampled CAP E C CLK gt Capture component Capture Component Image The FPGA node can be sampled at all times by setting the enable signal the CAP signal in the previous example to the 1 state at all times Use of capture components consumes no user resources whatsoever 5 2 Configuration File Option Settings After completing design layout using a logic synthesis tool the user must set the options required for FPGA configuration in JTAG and must also set up generation of the LL file the location information file required for debugging The following example shows these settings using the Xilinx ISE 6 21 FPGA development tool Processes for Source sample sample arch SD Add Existing Source f Create New Source En ad Design Entry Utilities Es asd User Constraints a C3 a Synthesize XST HM cian m Process Wei When executing the Generate Programming File operation set all the property option items o Startup Options Readback Options 62 Chapter5 FPGADebugging Function Prep
13. 3 Setting PALMICE PALMICE FPGA Users manual 3 1 Connecting with host PC HOST computer i a AC adapter USB cable Chapter3 Setting PALMICE 23 PALMICE FPGA User s manual 3 2 Connecting with AC adapter Connect PALMiCE with the USB before connecting the AC adapter The connection is made to PALMICE AC adapter Follow the following steps to connect D Ensure that the power switch of the PALMICE unit is off 2 Connect the DC connector to the main unit 3 Connect the AC adapter to the outlet 100VAC Take care because it is constantly electrified 24 Chapter 3 Setting PALMICE PALMICE FPGA Users manual 3 3 Setting PC The installation of the driver to the host PC is required for using PALMiCE The installation method varies according to Windows to be used The following sections give the methods for Windows98SE WindowsMe Windos2000 and WindowsXP respectively When the USB port is used also for a CD ROM drive or a floppy disk drive it 1s not usable for it while PALMICE is being connected In this case copy the CD ROM contents onto the local hard disk etc in advance Ctexusbl sys Ctexusb2 sys and PALMiCE inf are required to install the PALMICE driver These files are stored in the root of the CSIDE CD ROM 3 3 1 For Windows98SE 1 Connect PALMICE with the USB port of the host PC 2 Turn on the PALMICE power switch 3 The OS recognizes PALMICE by plug amp play If the OS does not r
14. 3V to 3 6V Note Do not apply a voltage of 3 6V or more to the target voltage VREF Input voltage level Target voltage when 2 3V to 2 7V when 3 0V to 3 6V VIH 1 7V to VREF 2 0V to VREF VIL 0 7V 0 8V or less JTAG signal TCK TMS TDI TDO These must be connected to the target system FPGA for communication with the FPGA If multiple FPGAs are daisy chained together Connect the TDO signal from the last stage to the JTAG connector FPGAI FPGA FPGAS TDI TOK TMS TDO TDI TCK TMS TDO TDI TCK TMS TDO MICTOR connector VREF signal This signal is connected to the power supply 2 3V to 3 6V The target interface of PALMiCE conforms to connected potential The VREF signal is not used as the power supply but for detecting potential A signal pulled up in 1KQ is permissible Supply this as the reference voltage if you are only using the PALMiCE FPGA state analyzer function 16 Chapter2 Hardware specifications for PALMIiCE FPGA PALMICE FPGA Users manual CHO to CH15 signals This channel 1s for use by the state analyzer We recommending reserving these as FPGA analyzer pins and routing them in advance Although a full 16 lines are not absolutely required the more lines available the wider the range of analyses that can be performed An FPGA internal signal 1s output to this pin using the probing function or the logic synthesis tool and then that FPGA internal signal 1s analyzed TRGOUT signal The TR
15. Back Lancel 7 Click the Next gt button if PALMICEdx INF has been found from the CD ROM by driver file searches In Windows98SE the device driver in the CD ROM may not be found In this case click the lt Back button Set up Windows98SE according to About recognition of device driver for Windows98SE and then restart setting from Step 6 Add New Hardware Wizard Windows diver file search for the device COMPUTE PALMICE USB Oriver 1 00 Windows is now ready to install the best driver for this device Click Back to select a different driver or click M est to continue Location of driver LES ma APALMICEGx IMF Cancel Chapter3 Setting PALMICE 27 PALMICE FPGA User s manual 8 The following dialog appears The installation of the PALMICE device driver is complete Click the Finish button Add New T ard W are Wizard EU i A N d 9 Sistem Settings Change 28 Chapter 3 Setting PALMICE PALMICE FPGA Users manual About recognition of device driver for Windows98SE In Windows98 the PALMiCE device driver may not be found from the CD ROM of CSIDE In this case follow the following steps to set up Windows98 Or save PALMICEdx INF and CTEXUSBI SYS files in the root of the CD ROM onto a floppy disk and check Floppy disk drives in Step 6 1 Select View Folder options of My Computer B hy Computer Ele Edi Ele Edit View Go Favontes Help S
16. GOUT signal is provided so that a single trigger pulse active high can be output from PALMICE when the specified trigger condition is matched There is no need to connect this signal if 1t is not used The TRGOUT output signal 1s output with the following timing Sampling clock E ESSET SIS TRGOUT t t Trigger cycle next cycle CLK signal The state analyzer function sampling operation is performed with this clock by connecting to an arbitrary clock in the target system Up to 100 MHz Sampling is also possible without using this clock by using a PALMiCE FPGA380 internal clock Chapter2 Hardware specifications for PALMICE FPGA 17 PALMICE FPGA User s manual 2 2 2 ADP M38 6A20 38pin to 6pin 20pin With the PALMiCE FPGA we recommend connecting to the target system using a standard 38 pin MICTOR connector However if it is not possible to provide a MICTOR connector on the target system conversion adapters are available for connecting with already completed target systems However using a conversion adapter increases the cable length and makes the system more susceptible to noise If this is a problem set the JTAG clock to a lower frequency in the CSIDE Target System Settings B pin Purple 1 pin Red ADP M38 J6 A20 Target system Connection with the target system consists of two parts the 6 pins used for JTAG and the 20 pins used for the analyzer Connect the 6 JTAG pins to the connec
17. IDOTIT 62 5 9 1 Startup Options A A A A AA A Grote RTL 63 5 2 9 Readback Options Eee A A A IU IM EE 64 CHAPTER 6 TROUBLESHOOTING 65 6 1 CSIDE does not start O p pu 2 c 66 6 1 1 Connecting PALMICE to the host personal computer 776 66 6 1 2 Initialization Between the FPGA and the JTAG Probe 7 6 66 PALMICE FPGA User s manual Blank PALMICE FPGA Users manual Chapter 1 Introduction Chapterl Introduction 1 PALMICE FPGA User s manual 11 Introduction The PALMiCE FPGA is a emulator that makes it possible to debug applications based on Xilinx large scale FPGA devices It consists of the PALMICE unit and original debugger CSIDE The PALMICE unit has a palm sized body and requires no power supply supports Vbus The use of the USB as an interface with a host provides excellent portability permitting to perform debugging anywhere by carrying PALMICE with the notebook computer Its main features are as follows Analyzer monitor signal registration and automatic wiring can be performed from the HDL source window Probing function Display of the values of arbitrary signals from the FPGA internal circuits in the HDL source window Quick inspection function Implements all functions without using FPGA internalresources slice block RAM Displays the block RAM content 16 channel state analyzer function Supports JTAG chain devices High speed processing support fo
18. MICE FPGA Users manual Chapter 6 Troubleshooting Chapter 6 Troubleshooting 65 PALMICE FPGA User s manual 6 1 CSIDEdoes not start up This section gives possible causes of and solutions to failure in start up 6 11 Connecting PALMiCEto the host personal computer If CSIDE terminates with an error it may not be possible to restart CSIDE If that happens turn the PALMiCE main power off and then on again 6 12 Initialization Between the FPGA and the TAG Probe The following are possible causes of failures of the initialization between the FPGA and the JTAG probe after clicking Update in the Target System Settings window 1 The target system JTAG connector or MICTOR connector is not connected 2 The target system power supply is not applied 3 The JTAG chain is not routed correctly 4 There is no pull up resistor on the TDO pin Virtex II Pro 66 Chapter6 Troubleshooting PALMiCE FPGA User s manual November 2004 Forth edition Computex Computex Co ltd Main office 432 13 4 chome Gojyoubashi higashi Higashiyama ku Kyoto 605 0846 TEL 075 551 0528 FAX 075 551 2585 Sales department 7F DNK building 15 2 2 chome Uchikanda Chiyoda ku Tokyo 101 0047 TEL 03 3253 2901 FAX 03 3253 2902 Worldwide distribution by Hitech Global Distribution LLC 3911 Stevens Creek Blvd Suite 207 Santa Clara CA 95051 U S A Tel 1 408 781 8043 Fax 1 408 268 417 Info hitechglobal com CM655 D 0411
19. Spartan IIE Ot Command length E XC2S366E Command length 5 Command E AE Manufacturer zl lel Es Jv Debug Sanifiguratian Ales The target setting is required to operate PALMICE Press t confirms the contents and starts start up processing A chain device was added to Chain 2 Wi Target system setting 1 DE XI JTAG clock 25MHz Y JTAG daisy chain Spartan IIE thers xC2S388E Command length 5 Command length 8 Command length 4 TDO The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing Chapter4 Setting CSIDE 51 PALMICE FPGA User s manual Change A device parameter at the cursor position is changed using Change on the pop up menu E Target system setting 1 Ioj ES JTAG clock 25MHz Y JTAG daisy chain Chain 1 Chain 2 d o d Set JTAG daisy chain Spartan IIE Others Beeeeen enn nnn nnn NC2S388E Insert at cursor position Command length 5 Command length 8 Command Change Move TDO Delete Delete all Update Freeze The target setting is required to operate PALMICE Press the Update button after setting Pre confirms the contents and starts start up processing Properties A double click on a device to be changed also performs the same operat
20. TE PALMICE USB Driver v1 03 haz not passed Windows Logo testing to verify its compatibility with Windows 4P Tell me why this testing is important Continuing your installation of this software may impair or destabilize the correct operation of your system either immediately or in the future Microsoft strongly recommends that you stop this installation now and contact the hardware vendor for software that has passed Windows Logo testing Continue Anyway STOP Installation o The following dialog appears The installation of the PALMICE device driver is complete Hardware Update Wizard 36 Chapter 3 Setting PALMICE Completing the Hardware Update Wizard The wizard has finished installing the software for COMPUTE PALMICE USB Driver 1 03 Click Finish to close the wizard Cancel PALMICE FPGA Users manual Chapter 4 Setting CSIDE Chapter4 Setting CSIDE 37 PALMICE FPGA User s manual This chapter covers the settings of CSIDE 4 Installing CSIDE CSIDE is provided on CD ROM Upon inserting the CD ROM an installer starts up automatically CSIDE Installer Upgrading information Users Manual for PALMICE FPGA PDF Before use All right reserved Computex Co Itd View folder Close Start up SETUP EXE of the CD ROM if an installer does not start SETUP EXE is in folder CSIDEADISKI1 Click CSIDE for PALMICE FPGA E and install it to any drive 38 Chapter4 Setti
21. arations PALMICE FPGA Users manual Select Generate Programming File and then select Properties in the pop up menu The Property Settings dialog box will open 5 2 1 Startup Options Set the items required to configure the FPGA in JTAG mode Select the property s Statup Options The following property page will be displayed Frocess Froperties General Options Configuration options Startup options Readback options BEE E AE Release Set Reset Outputevents De Drive Dane Pin High 1 gt E Cancel Default Help 1 FPGA Start Up Clock Select the JTAG Clock Chapter 5 FPGA Debugging Function Preparations 63 PALMICE FPGA User s manual 5 2 2 Readback Options Set the items required to generate the LL file Select the property s Readback Options The following property page will be displayed Process Properties General Options Gonfiguration options Startup options Readback options 1 3 Enable He adback and Recon MB 2 Create ReadBack Data Files 3 Allow SelectMaP Pins to Persist 4 gt 5 Cancel Default Help 1l Security Select the Enable Readback and Recoufiguration 2 Create Readback Data Files Check the box 3 Allow SelectMAP Pins to Persist Uncheck the box 4 Create Logic Allocation File Check the box 5 Create Mask File Check the box 64 Chapter5 FPGADebugging Function Preparations PAL
22. d to the target system Do not supply a potential that differs from the potential of the 6 JTAG pins Supply this as the reference voltage if you are only using the PALMiCE FPGA state analyzer function CLK The state analyzer function sampling operation 1s performed with this clock by connecting to an arbitrary clock 1n the target system Sampling is also possible without using this clock by using a PALMiCE FPGA internal clock Chapter2 Hardware specifications for PALMICE FPGA 19 PALMICE FPGA User s manual The 20 analyzer pins can be removed individually in one pin units When removing these lines to minimize wire tangles and noise always remove the line by grasping the connector with tweezers or a similar tool If you pull on the wire it may come off the connector When reconnecting these lines do not mismatch the clip tip signal name with the connector pin An incorrectly matched connection can result in damage to the hardware 20 Chapter2 Hardware specifications for PALMICEFPGA PALMICE FPGA Users manual Chapter 3 Setting PALMICE Chapter3 Setting PALMICE 21 PALMICE FPGA User s manual This chapter describes a connection between PALMICE and the target system and that between PALMICE and the host PC PALMICE is connected as follows USB cable B gt Target system Host computer PALMICE AC adapter Power receptacle Following sections explain the connections respectively 22 Chapter
23. e JTAG signals to be connected Connection of PALMICE Whether or not PALMICE is being connected is viewed Something like Serial No 000000001 PALMiCE Rev 0 1 is displayed if it is connected properly If not PALMICE cannot be recognized is viewed In the case check the USB driver settings the connection between the host PC and PALMICE etc This item is related only to PALMICE and the host PC not being affected by the connection of the target system Chapter4 Setting CSIDE PALMICE FPGA Users manual 6 Configuration A structure of PALMICE is viewed PALMICE EXE version The EXE version of CSIDE is displayed While the version mentioned in 2 means the product version this item shows the internal version Product name The model name of PALMICE recognized by CSIDE is viewd Hardware revision The revision of PALMiCE unit is viewed YYYY MM DD The date of manufacture 1s viewd Serial number The individual serial number is viewd Firmware revision This is the program revision written in PALMICE Control revision This is the program reviwion written in PALMiCE The program is mainly changed according to FPGA to be debugged Firmware rewite count The number of counts the firmware has been rewritten is viewed 7 Clicking the Start button starts up CSIDE after checking the set contents 8 Clicking the Do not start button terminates CSIDE It is required to set the target system to start up CSIDE In
24. ecognize it automatically ensure that the USB controller of the host PC operates properly New Hardware Found COMPUTE PALMICE Windows has found new hardware and ts locating the software for it Chapter3 Setting PALMICE 25 PALMICE FPGA User s manual 4 The Add New Hardware Wizard appears Click the Next gt button Add New Hardware Wizard This wizard searches for new drivers for COMPUTE PALMICE A device driver is a software program that makes a hardware device work Cancel 5 Select Search for the best driver for your device Recommended and click the Next gt button Add Mew Hardware Wizard What do you want Windows to do EsRRESRRERRERSEEREERZSERESERSERZERSEERERZRAREERRSERZRIEERSERERZRARRSERRERZSARRSERERZRSEREERERZSSERRERERERSERERRRR v Search far the best driver for pour device Recommended C Display a list of all the drivers in a specific location sa You can select the driver you want lt Back Cancel 26 Chapter 3 Setting PALMICE PALMICE FPGA Users manual 6 Insert the CSIDE CD ROM into the CD ROM drive Check CD ROM drive and click the Next button Add New Hardware Wizard Windows will search for new drivers in its driver database on your hard dive and in any of the following selected locations Click Next ta start the search Floppy disk drives Microsoft Windows Update Specify a location BTGUWERL
25. em TIPP A C PI 49 4 3 1 Operating setting window of target system Bie SEIS ub Oe ors la as bt Cee IMS 43 Double click action w P M 43 Pop up Menu ji ttt t t t Hh hihi hne 44 4 3 9 JTAG probe related lee Gad xe wes A E re me te ek esae s le OC EUS De ER AR 45 JTAG clock CUP 45 4 4 Setting JTAG daisy chain ee ee SUR Ee Seen UTE S URS ee wie ee Rr e E SUUS een 46 4 4 1 Setting 1n dialog box E E E A A o e N DRE 46 4 4 9 Settings in window Ps 49 Add PRIERR PE EE 50 Insert at cursor position EXEUNT NEM x Wege en A Y e ee elei eU EE 51 Change EE EEE RE T E EE A A E TED EE 52 Move Pen a e ies else s eue S Brei ee ido ER ere le ec bis We OS ee ln etui i eire a eS ec ele spl ar Nei nee eee as Wore 53 Delete DESCRI A RD AR WES NOE Sib SIR ON CIE dt RES 55 Delete All P m 56 Update Ss ie ee A A Sieg A A ANS ee aire eh ese alte ee end 56 Always top rr ETE 56 Properties ale wi reca e mre RUE Pre ca pe Rc c E ERU M oec e vie ee eire RO oe woe sere Rd RR ce a ce sre Rec ee AAA AAA ee Se seme Lg 56 PALMICE FPGA Users manual CHAPTER 5 FPGA DEBUGGING FUNCTION PREPARATIONS 59 5 1 Capture Component Instantiation Tcp 61 5 9 Configuration File Option Settings TDI TIITLTYTT
26. es daisy chained together Bypass command length Set the bit length for the Bypass command for the connected devices This is allocated automatically if FPGA CPLD PROM or System ACE are selected as the device type Example Spartan II XC2S15 5 bits The Bypass command bit length for other devices is specified in the manual for the connected device Example The register length of the JTAG instruction register is 5 bits Detailed This set sets the detailed settings for the connected device Click Detailed The property sheet shown here will be displayed 1 gt Chain No fi gt 2 P Device ype 3 Command length 5 4 reca Manufacturer Xilinx m Series Spartan 11E Device xc2s 300E M 5 Y Debug Configuration file CAUP380xup380 bit TN Select 6 1 Chain No The chain number of the device currently being set up will be displayed 2 Device type Select the type of the connected device If the device 1s a Xilinx product that CSIDE supports select FPGA CPLD PROM or SystemACE Select Other for an unsupported device or other device 3 Command length Set the bit length for the Bypass command for the connected devices This is allocated automatically if FPGA is selected as the device type Example Spartan II XC2S15 5 bits 4 FPGA CPLD PROM System ACE Select the FPGA device name in the order manufacturer series and d
27. evice name This item can only be selected if FPGA CPLD PROM or System ACE are selected as the device type Chapter4 Setting CSIDE 47 PALMICE FPGA User s manual 5 Debug Make the device the object of debugging When the connected device 1s an object of debugging check this item and specify a configuration file For a device that is not the object of debugging remove the check if present In this case the configuration file and related items are not needed in any way This item is only enabled when FPGA is selected as the device type 6 Select The item reads in the FPGA configuration and location information This item is only enabled when FPGA is selected as the device type Click Select The dialog box shown here will be displayed Look in Cx UP380 e e E3 proinav 8 up380 bit D PFienme pox Files of type bit feby er Cancel 3 Mode A Read configuration and debugging information C Configuration only Debugging information only A configuration file is a bitstream BIT file that was created by the logic synthesis tool This BIT file is used in FPGA configuration The location information files have the same file name as the configuration file but the files read in have the extensions LL and PAD If the location information files are not in the same directory as the configuration file a file specification dialog box will be displayed Also i
28. f a location information file of the form filename_BD BMM generated from the block RAM placement information BMM file is present that file will also be read in at the same time D Filename Specifies the file name for FPGA configuration File of type Displays the file type 3 Mode Displays the file type Read configuration and debugging information After configuring the FPGA for which the location information is read in Select this mode if configuration and debugging will be performed using PALMiCE FPGA Configuration only Only performs an FPGA configuration The location information 1s not 48 Chapter4 Setting CSIDE PALMICE FPGA Users manual read in Select this mode if only configuration will be performed using PALMiCE FPGA Debugging information only The FPGA configuration 1s not performed Only the debugging information 1s read in Select this mode if configuration is performed in the serial ROM provided for a separate target and only internal monitoring will be performed without having PALMiCE FPGA perform configuration operation 4 Automatically recognize the daisy chain connection state on start up of CSIDE This is a mode in which the settings described in steps 1 to 3 above are acquired from the target system by automatic recognition If the daisy chain state of the target system used is not known enable this mode and start CSIDE However if an unsupported device 1s connected the daisy chaining may n
29. in functions are as follows O Double click action Pop up menu These functions are adopted anywhere in CSIDE and are also available outside the target system setting window The next sections describe the functions Double click action By moving the mouse cursor to the item to be changed and by double clicking it a setting dialog box opens and the set contents can be changed easily Target system setting 1 AT ES JTAG daisy chain hain 1 Chain 2 Chain 3 t 1 Ju 2 JU EE F Chain No I Y Bun Device type FPGA p Command length 5 FPGA Manufacturer xine m Series Spartanie v Device xc2s3008 y v Debug The target setting is required to operate PALMICE Press the Update buttona Configuration file confirms the contents and starts start up processing ER elec Cancel For example double click at position 1 in the Target System Settings window This opens a dialog box to change the chain 1 items as shown above Similarly a dialog box to change chain 2 items is opened by double clicking at position 2 Chapter4 Setting CSIDE 43 PALMICE FPGA User s manual Pile Es I Target system setting 1 JTAG clock 25MHz JTAG daisy chain Chain 1 Chain 2 Set Device Add x Spartan IIE xC2S388E Command length 5 Spartan II Chain No NC2815 ommand
30. ion Also direct key input at the cursor position can also change devices Set a device parameter E Target system setting 1 JTAG daisy chain Chain No 3 Device type FPGA be Command length mooo FPGA gt A om E ariera Manufacturer Xilinx z TDO Command length 5 Command length Series Virtex Pro y Device xc2 P50 V Debug Configuration file C SAMPLESFPGASSAMPLE bit Select lel ES The target setting is required to operate PALMICE Press the Update b confirms the contents and starts start up processing Cancel A device parameter of Chain 3 was changed I Target system setting 1 Iof x JTAG clock 25MHz m JTAG daisy chain Chain 3 Spartan IIE thers Uirtex II Pro NC2S38BE XC2UP56 Command length 5 Command length 8 Command length 14 TDO The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing 52 Chapter4 Setting CSIDE PALMICE FPGA Users manual Move A Chain 3 device is moved to the position of a Chain 2 device using Move on the pop up menu ii Target system setting 1 Iof Xx JTAG clock 25MHz Y JTAG daisy chain Chain 1 Chain 2 Chain 3 122992191 1 1 1 1 177 Set JTAG daisy chain Add Pigs Inserat cursor position Spartan IIE
31. itch 3 The OS recognizes PALMICE by plug amp play Insert the CSIDE CD ROM into the CD ROM drive and click Next gt button Add New Hardware Wizard Windows has found the following new hardware COMPUTE PALMICE Windows can automatically search for and install software that supports your hardware IF your hardware came with installation media insert it now and click Next What would you like to do C Specify the location of the driver Advanced Back Cancel 4 The following dialog appears The installation of the PALMICE device driver is complete Click the Finish button If the device driver has not been found click the lt Back button to return to Step 3 Then select Specify the location of the driver Advanced and click the Next gt button Add New Hardware Wizard 2 COMPUTE PALMICE USE Driver 1 00 Windows has finished installing the software you selected that your new hardware device requires Cancel Chapter3 Setting PALMICE 31 PALMICE FPGA User s manual 3 3 3 For Windows 2000 1 Connect PALMICE with the USB port of the host PC 2 Turn on the PALMICE power switch 3 The OS recognizes PALMICE by plug amp play If the OS does not recognize it automatically ensure that the USB controller of the host PC operates properly Found New Hardware a COMPUTES PALMICE mua Installing A The Found New Hardware wizard dialog opens Click the Next gt b
32. n the readback function is used 5 Usable also as a simple logic analyzer when not connecting with FPGA State analyzer fucntion 5 Chapterl Introduction 7 PALMICE FPGA User s manual Blank 8 Chapterllntroduction PALMICE FPGA Users manual Chapter 2 Hardware specifications for PALMICE FPGA Chapter2 Hardware specifications for PALMICE FPGA 9 PALMICE FPGA User s manual 2 Partnames and functions 211 Generalspecifications Connector in the target system MICTOR 2 767004 2 767054 1 or 767061 of AMP make POWER Green T PWR Red RUN Green JBSY Orange HBSY Orange 106mm W x 78mm D x 29 5mm H Outside dimension Except the connector Usage Operating temperature BC to 40 C environment operating humidity 35 to 85 RH no condensation USB Ver1 1 5V 1 6A consumption 212 Functional specifications Specifications voltage JT AG clock 150KHz 1MHz 5MHz 10M Hz or 25MHz Xilinx Spartan II Spartan I E Spartan 3 EEGCUBUBBOLIOR Virtex Virtex E Virtex II Virtex II Pro 1 External synchronous mode MAX 100M Hz Internal asynchronous mode 200MHz to 2KHz 1 Processor is not supported 10 Chapter2 Hardware specifications for PALMICEFPGA PALMICE FPGA Users manual 2 1 3 Outside view The following figure shows PALMiCE FPGA380 1 1 3 4 5 6 7 8 3 2 1 FPGA580 9 8 7 PALMiCE FPGA380
33. nalyzer probe 6 Chapterllntroduction PALMICE FPGA Users manual 15 2 Functions Devi cad Xilinx Spartan II Spartan Il E Spartan 3 Beer Virtex Virtex E Virtex II Virtex H Pro 1 The place and route ISE5 x ISE6 1i ISEG 2i 2 tools supported Language supported HDL Verilog JTAG UF Target 38 pins MICTOR connector 3 UF Auto trace bet 2 3V and 3 6V JTAG clock 150KHz 1MHz 5MHz 10MHz pr 25MHz Reference function ll internal nodes sampling of block RAM contents 4 Cni EEE Up to 20 The sum of the JTAG instruction lengths must be no pP more than 128 bits tarts ISE in the background and synthesizes circuits utomatically routes FPGA internal nodes to FPGA pins Capacity External synchronous mode 256K cycles Internal asynchronous mode 512K cycles Sampling clock External synchronous mode MAX 100MHz Internal asynchronous mode 200M Hz to 2KHz Trigger specification AND specification of signal Trigger position 5 positions between START and END e Channel 16 channels MAX Time stamp function 16bits clock 10nS 100nS 1uS orlmS FPGA configuration 1 Processor is not supported 2 ISE WebPack is not supported Certain functions are restricted if the Synplicity Synplify logic synthesis tool is used instead of the Xilinx XST tool for logic synthesis 3 Usable even with the already developed target using the flying lead cable or the clip connection method 4 The FPGA is stopped shut down whe
34. ng CSIDE PALMICE FPGA Users manual 4 2 Starting CSIDE Icons for CSIDE are registered after the installation Select and execute the icon of its main unit The following dialog box opens when CSIDE starts up for the first time If an error message appears without opening the dialog box see Chapter 6 Troubleshooting Reeister the GPU to be debugged to PALMICE onftware GSIDE for PALMICE FPGA Hardware PALMIGE FPGA3SU serial No 000007 04 The registration code of the GPU to be debugged is required to register to the PALMIGE main unit to use FALMIGE Enter the registration code Reeistration code CE u u u Cancel For the PALMICE FPGA the registration code must be registered in the PALMICE unit when starting it for the first time This process is essential to use debug mode Not that use with a device other than one supported for the registered code is not possible It may be hard to distinguish the corresponding device when using more than one PALMICE Product name sticker is provided to make easy to distinguish It is recommended to put the sticker in a prominent place after the registration The contents registered here are used for confirmation when the version of CSIDE 1s upgraded after purchase Latest CSIDE is downloadable from our homepage To download the registration for our user support system charged is required It is strongly recommend to register for it We issue the code for the registration E
35. ns 6Opins 20pins nnn 1 e JTAG cable 6pins 15cm es 1 d Ana ven Oro e cR QE E E EAT IN ME d EID M ag eae aig IM ee 20 e Cond essen ast ei aav tie ot o po ios o Ret ihnen geleert 1 Doodlneotiaime ee inpune Abuse E ds 1 Computex PALMICE JTAG cable ADP M38 J6A20 PALMICE FPGA380 P FPGA DE Product name sticker Analuzer probe Software CD ROM User s manual This manual Table of registration code for PALMICE AC adapter Chapterl Introduction 3 PALMICE FPGA User s manual 1 3 Requirements Requirements for using PALMICE are as follows Minimum requirements IBM PC AT compatibles CPU Pentium 166MHz or more Installed memory 64Mbytes or more Hard disk Free space of 50Mbytes or more USB1 1 compliant Recommended requirements IBM PC AT compatibles Pentium III 667MHz Installed memory 256Mbytes OS Windows2000 Professional USB USB1 1 compliant USB devices are classified into either a high powered device or a low powered device according to the necessary power supply capacity A low powered device requires the power supply of 100mA or less while a high powered device requires the power supply of 500mA or less PALMICE is a high powered device It does not operate with the USB hub which supports only a low powered device For example some USB hubs attached to the USB keyboard support only a low
36. nter the code and click the OK button After completion of the code registration the above dialog box is not viewed any more at start up of CSIDE Also it is not viewed when the CPU registration code has been already registered in the unit Chapter4 Setting CSIDE 39 PALMICE FPGA User s manual The following dialog box appears if proper processing has been performed ag CSIDE for PALMICE FPGA E Product information Product CSIDE for PALMICE FPGA E m 1 4 89 F 2 Copyright C 2004 COMPUTEX CO LTD 3 Setting Set made 5 FPGA Analyzer Add 4 Connection of PALMICE Serial No 03000065 PALMICE gt Configuration 6 PALMICE EXE version V4 89 r PALMICE Hardware Information Froduct name PALMICE FPG4380 FPGA Support Hardware revision 0 0 vr Y Y dtd DO 2003 06 03 Da nat start 9 Serial number O3000065 Firmware revision ee Set the following items O Mode setting Set the start mode After completing the settings go on to the next setting by clicking Start The meaning of each item in PALMICE product information is as follows 1 2 3 4 5 40 Name of CSIDE Version of CSIDE Copyright of CSIDE Debug mode setting Select the start mode FPGA XI Analyzer Startup with FPGA and the state analyzer function supported Analyzer only Startup with only the state analyzer function supported In this mode 1t 1s not necessary for th
37. of 200 Q or greater Note2 2 This is for detecting the potential A signal pulled up in IKQ 1s also permissible The voltage level conforms to 2 3V to 3 6V Note3 Do not connect anything to the NC pins 14 Chapter2 Hardware specifications for PALMICEFPGA PALMICE FPGA Users manual The target interface circuit diagram 1s shown as follows for reference Mictor connector Target system 4 a STO 1 E O e O TOK pu LI C Vout O VET pu TS 10k pu IDO 8 330 p IBOZSZEA 22201816 37353331 unm he 100k pd uu CLK SE TEST POINT VGC 100K pd mou LEE paa 7 OS T NOTE pu pull up pd pull down ANVOT6245 Generally the pull up resistance of the TDO signal is 10K Q but 200 Q or more is ecommended for Virtex II Pro since the signal 1s open drain output Devices TDO gt BANK2 VCCO 3 pull up resistor 2 Spartanll Spartan IIE Virtex Virtex E Not required Required 3 3V Not regulated l Required Virtex IIPro 200Q or more Spartan 3 Not required Not regulated Not regulated The FPGA may not be configured properly when PROM is on a chain Set the M2 M1 and MO terminals to 1 0 and 1 respectively when using PALMiCE FPGA Chapter2 Hardware specifications for PALMICE FPGA 15 PALMICE FPGA User s manual Analyzer probe signal specifications Output voltage level Not in connecting with target 0 2V or less n connecting with target Conforms to target voltage 2
38. ory Hemor 41 42 43 44 45 46 47 48 Address 00000037 Display count 8 RAMB4 R5C8 RAMB4_RSCO RAMB4_RSCB RAMB4_RSCB RAMB4_RSCB RRHBA R5CB RRMBA R5CB RRHBA R5CB RRHBA R5CB RRAHBA R5C8 RRHBA R5CB RAHRA RSCTA 4 Ed Analyzer 66666666 66666668 49 66666616 51 66666618 59 66666626 61 66666628 69 66666636 66666638 79 66666646 666660648 66666656 AAAAAASR 25hyTAG Clock 7 use IEEE std logic 1165 all 3 8 use IEEE std logic unsigned all std logic std logic std logic std logic std_logic std logic std logic std logic std logic std logic vector n Fr m FPGA Node Location window 4 Node Pin CLB_R22C18 S1 CLB_R19C43 S6 CLB_R21018 S6 CLB_R21C18 S6 CLB_R26C18 S6 CLB_R26C18 S6 CLB_R19C18 S6 HZ Value CLB_R22C18 S1 CLB_R19C43 S6 CLB R21C18 S8 CLB R21C18 58 CLB_R26C18 S6 CLB_R26C18 S86 CLB_R19C18 S8 CLB_R19C18 S8 CLB_R18C18 S6 CLB_R18C18 S6 CLB R17C18 S8 CLB_R25C37 S8 CLB_R27C28 S1 DDD ooo x m CLB_R25C37 S8 8 CLB R196C27 S8 CLB_R19C27 S1 CLB_R25C43 S1 CLB_R25C43 S8 CLR R230 21 S1 A o Chapterl Introduction 5 PALMICE FPGA Users manual 15 Product specifications 15 1 PALMICE The PALMICE unit is provided with the USB port and the MICTOR connector to connect with the PC and with the target system For the MICTOR connector see Chapter 2 Hardware specificationsfor PALMICE FPGA ADP H38 J5A70 A
39. ot be recognized correctly If the daisy chaining 1s not recognized correctly correct the settings manually after automatic recognition Note Perform the Automatically recognize the daisy chain connection state on start up of CSIDE in the state where the FPGA has not been configured 44 2 Settings in window This setting method makes settings in the JTAG Daisy Chain window Add Insert at cursor position Change Move Delete and Delete All are available on the pop up menu The following sections explain each function with an example Chapter4 Setting CSIDE 49 PALMICE FPGA User s manual Add A device is added using Add on the pou up menu ii Target system setting 1 OE xX JTAG clock 25MHz m JTAG daisy chain Chain 1 Set JTAG daisy chain Insert at cursor position Spartan IIE Change XC2S300E 5 Command length 5 Move y TDO Delete Delete all Update Freeze Properties The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing A double click at the both ends of the chain devices also performs the same operation Set a device parameter E Target system setting 1 A ES JTAG daisy chain Chain 1 Chain No 2 Device type mes O Spartan IIE xC2S388E Command length 4 Command length TDO 1 FPGA
40. performing these settings they can be made when starting CSIDE or they can be set up in advance by the user Although the method performed at CSIDE startup in which settings are performed simply by selection from a displayed menu may be used note that the CSIDE preparation processing will be performed at startup See sections 5 1 Capture Component Instantiation and 5 2 Configuration File Option Settings for details on how the user can set these items in advance When the settings required to debug an FPGA as set in advance before CSIDE startup the CSIDE preparation processing can be omitted and the startup time shortened 60 Chapter5 FPGADebugging Function Preparations PALMICE FPGA Users manual 5 1 Capture Component Instantiation To sample FPGA internal nodes and display the results in CSIDE the components to be captured in the user circuit must be instantiated embedded The following 1s a necessary condition for this operation e A sampling clock is required Set up any one of the FPGA internal user clocks to be used as this clock We recommend using a clock pulse signal with a frequency of a few kHz or higher Specify the components to be instantiated in the FPGA source program The following presents example in VHDL and Verilog The FPGA node is always sampled A Xilinx SPARTAN II E is used Use a capture component that matches the device For example if a Virtex II is used specify CAPTURE_VIRTEX2 as
41. r FPGA configuration one million gates in a mere 1 8 seconds Supports various devices Usable as a simple logic analyzer Has a palm sized light and compact body Enables latest CSIDE to be downloaded from the Internet Only for the registered users The user logic 1s stopped by a shutdown operation when accessing the FPGA internal signals This manual describes the set up and the connections for PALMiCE FPGA The PALMiCE FPGA is available as the FPGA380 model which uses a 38 pin connector MICTOR connector for connection to the target system Before using your PALMICE FPGA first read this chapter If a connector has already been prepared in the target system you can prepare to use CSIDE by reading Chapter 3 Setting PALMICE and Chapter 4 Setting CSIDE Refer to Chapter 6 Troubleshooting if CSIDE cannot be started If either CSIDE cannot recognize PALMiCE or CSIDE starts up but does not correctly recognize the FPGA in the target system 2 Chapterllntroduction PALMICE FPGA Users manual 12 Productstructure The product structure of PALMICE is as follows e PALMICE BBCADOSO coated eM tie tu pla pM Eee 1 e Software CD ROM TA LADA A RE REM CV EIN E UP ENELVEDHUERVE EEE AD 1 eo PALMiCE FPGA User s manual This manual 1 e Table of registration code for PALMICE ee 1 O AC adapter eee meme 1 e USB cable 2m AR AS AA AA AAA AA E 1 e ADP M38 J6A20 38pi
42. r ST 03 If your hardware came with an installation CD 2 or floppy disk insert it now What da vou want the wizard to do 5 Install the software automatically Recommended C Install from a list or specific location Advanced Click Next to continue 3 The OS recognizes PALMICE by plug amp play If the OS does not recognize it automatically ensure that the USB controller of the host PC operates properly The Hardware Update Wizard dialog opens Then check Search removable media floppy CD ROM and click the Next gt button Hardware Update Wizard Please choose your search and installation options Pha Rae Y Search for the best driver in these locations Use the check boxes below bo limit or expand the default search which includes local paths and removable media The best driver found will be installed Search removable media floppy CO ROM C Include this location in the search 3X terz HOME CSIDE 95 H MA5 TER CD F RY AEF Don t search will choose the driver to install Choose this option to select the device driver from a list Windows does not guarantee that the driver you choose will be the best match for your hardware Chapter3 Setting PALMICE 35 PALMICE FPGA User s manual 4 Forthe following display click the Continue Anyway button Hardware Installation The software you are installing for this hardware COMPU
43. s eme 16 Output voltage level nen 16 Input voltage level eene 16 JTAG signal TCK TMS TDI TDO N Y CN INO RM eae Saeed PIAS Rebe 16 VREF signal eee eene 16 CHO to CH15 signals eee 17 TRGOUT signal eene 17 CLK signale Hee mee 17 2 2 2 ADP M38 J6A20 38pin to 6pin 20pin EI AAA AAA AS 18 CHAPTER 3 SETTING PALMICE 21 3 1 Connecting with host PC meme 23 3 2 Connecting with AC adapter amp 9 6 9 9 9 06 9 9 6 9 6 9 06 9 0 6 9 9 06 6 06 9 6 9 6 9 9 9 6 9 9 9 6 9 6 9 9 9 9 96 9 6 9 6 24 PALMICE FPGA User s manual 3 3 Setting PC rU A TS A lela 25 3 3 1 For Windows98SE bi Rose dt E ROH A ips e ocu Bie Ser ve exhale A exe cove 25 About recognition of device driver for W ndows98SE Tm 29 3 3 2 For Windows98ME De ee ee le A a ae SE 31 3 3 3 For Windows 2000 ee ne een Den ee Dee ee nennen E E A AE 32 3 3 4 For Windows XP UR EN a dca Sce uU areas Dee e E E nce Re E er ce Whee n S VE war VIR abo re 35 CHAPTER 4 SETTING CSIDE mmmHH ne 37 4 1 Installing CSIDE dedere e A ee Yo eve Unda io se Ye ee Pate SUR E Ar d WO es ee RS ERN ETUR BTS ARNE E Va ET SEU 38 4 9 Starting CSIDE NS eia lernte raices a tet E ea ce sce e hin ete ers qs a Ira resa qe DRE SIR Ro ee uc e cala Uu ee rese a oda Whole PAR one E EINE NEUE 39 4 3 Setting target syst
44. tatus Bar Cul e Large lcons Small loons mae Lis L Details Arrange lcong k Line Up Icons Select an i Refresh to view its Folder Options description i Dial Up Scheduled Networking Tasks r k 4 Enables you to change settings Toolbars y Fat e Copy Paste om A ME was Web Page Lside_palmic Windows on Home on Hdd D Hdd3 E Chena M Lies le Chapter3 Setting PALMICE 29 PALMICE FPGA User s manual 2 Open the View tab of the Folder Options dialog Select Show all files from Hidden files and click the OK button Folder Options General View File Types Folder views You can make all your folders look the same Like Current Folder Reset All Folders Advanced settings Files and Falders Remember each folder view settings C Display the full path in title bar Hide file extensions Far known file types C Show Map Network Drive button in toolbar Show file attributes in Detail View Show pop up description for folder and desktop items O Allow all uppercase names 7 Hidden files O Do nat show hidden or system files Do not show hidden files Show all files a Restore Default 30 Chapter 3 Setting PALMICE PALMICE FPGA Users manual 3 3 2 For Windows98ME 1 Connect PALMICE with the USB port of the host PC 2 Turn on the PALMICE power sw
45. the next section Setting target system 1s described Chapter4 Setting CSIDE 41 PALMICE FPGA User s manual 4 3 Setting target system Set up the target system first after starting CSIDE The JTAG probe device connection and JTAG daisy chain are set here Click the Update button in the upper right of the dialog box after completing the settings Then CSIDE checks the set contents and performs start up processing of PALMICE ii Target system setting 1 AT ES JTAG daisy chain Chain 1 Spartan IIE NC2S388E Command length 5 Version check of the hardware Initialization of PALMICE Step3 Initialization of JTAG Probe Step4 Power check of the target when the power on reset is applyed to starting turn of the power of the target system Stepb Initialization between the target and JTAG probe 1 Stepb Reset of each mode Step Setting up FPGA Startup processing has ended normally My TTT By clicking the Update button screen 1 is viewed to indicate the progress of start up processing step by step Processing may stop if the settings have been made incorrectly In the following sections the contents of the target system settings are described 42 Chapter4 Setting CSIDE PALMICE FPGA Users manual 4 3 1 Operating setting window of target system CSIDE expands its functions to improve its operationality as a debugger while 1t conforms to Windows basically The ma
46. tically For example assume that the board 1s changed after the revision has been updated up to 1 D At this time it is updated to 2 0 Then each time the version is upgraded the character the latter part is changed alphabetically e g 2 A 2 B 12 Chapter2 Hardware specifications for PALMICEFPGA PALMICE FPGA Users manual 2 2 Targetinterface 38 pins 2 2 1 Shape of 38 pin connector The following figure shows the shape of the AUD connector mounted on the target system For detailed dimensions see information provided by the manufacturer MICTOR connector of AMP make e 2 767004 2 e 767054 1 e 767061 Attach the MICTOR connector as close to the FPGA as possible so that the wire pattern length 1s short Also Grand Bus leads of the MICTOR connector must be connected to GND af 1 HUONO Connectto GND Qe LULLIDBBOUUU OLLI O OU 38 Z Chapter2 Hardware specifications for PALMICE FPGA 13 PALMICE FPGA User s manual Signals and circuit diagram for MICTOR connecotr This table shows signals of the connector mounted on the target system Target basis EISE Output 3 TRGOUT VREF Input O1 Output Output Output Output Output Output Output Output Output Output Input No Da a L2 NM EUN EN u EN Input 18 20 EN 24 26 28 EN EN 34 36 _ L8 NN Output NC Notel 1 If m Virtex Pro 200 is used we recommend pulling up with a resistor
47. tor that extracts the FPGA JTAG pins Waveforms can be acquired using the state analyzer by connecting the 20 pins used for the analyzer to the connector that extracts the FPGA I O pins or to arbitrary signal in the target system The 6 JTAG pins are acquired by connecting to the connector that matches the label with the connector that extracts the FPGA JTAG signals Make all possible efforts to assure that signal lines are never connected incorrectly Incorrect signal connections may result in damage to the hardware 6pins signal table for JTAG Signal line Label i Ra VREF White Green Yellow Purple 18 Chapter2 Hardware specifications for PALMICEFPGA PALMICE FPGA Users manual ADP M38 J6420 d d DADAS e do de db do do amp GA 20pin signal table for analyzer Target basis CHI cHio Output 6 CH2 Output 7 CH11 Output Output 9 cm Output 10 CH4 Output Output 12 Output 1 13 CH14 Output 14 1 CH15 Output 05 16 CH7 Output 17 TRGOUT tmpue is GND 19 vrer Output 20 CLK Output CHO CH15 This channel is for use by the state analyzer CH3 CHA CH5 CH6 CH7 ND CLK TRGOUT When the trigger conditions match a single active high pulse is output from the PALMICE FPGA When not required handle this pin as an NC pin VREF The same signal as the VREF in the 6 JTAG pins Not required if the 6 JTAG pins are connecte
48. utton Found Mew Hardware Wizard Welcome to the Found Mew Hardware Wizard This wizard helps vau install a device driver Far a hardware device To continue click Next Back Cancel 32 Chapter 3 Setting PALMICE PALMICE FPGA Users manual 5 Select Search for a suitable driver for my device recommended Found Mew Hardware Wizard Install Hardware Device Drivers A device driver ls a software program that enables a hardware device to work with I an operating system This wizard will complete the installation for this device 9 COMPUTES PALMICE A device driver is a software program that makes a hardware device work Windows needs driver files for your new device To locate driver tiles and complete the Installation click M ext What do you want the wizard to do Search for a suitable driver for my device recommended C Display a list of the known drivers for this device so that can choose a specific driver Back Cancel 6 Insert the CD ROM of CSIDE for PALMICE into the CD ROM drive Then check CD ROM drives and click the Next gt button Found Mew Hardware Wizard Locate Driver Files ar Where do you want Windows to search for driver files Search for driver files for the following hardware device F COMPUTE PALMICE The wizard searches for suitable drivers in its driver database on your computer and in any of the following optional search locations that vou specify
49. were deleted fm Target system setting 1 ojx JTAG clock 25MHz J uem JTAG daisy chain Chain 1 Spartan IIE XC2S366E Command length 5 TDO The target setting is required to operate PALMICE Press the Update button after setting Pressing the button confirms the contents and starts start up processing Update The contents to be displayed are updated Always top The window constantly appears in front of the others Properties The character color background color and font are changed here 56 Chapter4 Setting CSIDE PALMICE FPGA Users manual 4 5 Starting PALMICE Update Click Update to start the PALMICE operation after completing the settings fe Target system setting 1 JTAG clock JTAG daisy chain Chain 1 By clicking Update the settings made for the target system are displayed An error message indicating possible causes is viewed for reference if PALMICE has unsuccessfully started up for some reason Chapter4 Setting CSIDE 57 PALMICE FPGA User s manual Blank 58 Chapter4 Setting CSIDE PALMICE FPGA Users manual Chapter 5 FPGA Debugging Function Preparations Chapter 5 FPGA Debugging Function Preparations 59 PALMICE FPGA User s manual This chapter describes the settings that are required for FPGA debugging using PALMiCE FPGA Capture component instantiation Configuration file option settings There are two methods for
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