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PEB-2771/2781VG2A User`s Manual

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1. Boot Display Device The choice CRT LVDS CRT LVDS Flat Panel Type The choice 640x480 18 bit 800x600 18 bit 1024x768 18 bit 1280x1024 24bit Backlight Control Support The choice VBIOS Default Both BLC amp BIA Disable BLC Enabled BIA Control The choice VBIOS Default BIA Disabled BIA Enabled at Level 1 BIA Enabled at Level 2 BIA Enabled at Level 3 BIA Enabled at Level 4 BIA Enabled at Level 5 Spread Spectrum Clock The choice Disabled Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 31 BIOS Setup Information South Bridge Configuration BIOS SETUP UTILITY South Bridge Chipset Configuration USB 2 0 Controller 825670 Control ler GbE LAN Boot GbE Uake Up From S5 HBA Controller SMBUS Controller SLP S48 Min Assertion Width PCIE Ports Configuration PCIE PCIE PCIE PCIE PCIE PCIE PCIE PCIE PCIE USB Functions This setting specifies the function of the onboard USB controller The choice Disabled 2 USB Ports 4 USB Ports 6 USB Ports USB 2 0 Controller Set to Enabled if you need to use any USB 2 0 device in the operating system that does not support or have any USB 2 0 driver installed such as DOS and SCO Unix The choice Enabled Disabled 82567V Controller The choice Enabled Disabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 32 BIOS Setup Information GbE LAN Boot When Enabled the BIOS attempts to boot from a LAN boot image before it attempts to boot from
2. 0 output 1 input Set CFG2 0xE2 0x00 GPIO Port 5 is non inversed delay 2 Set CFG2 0x07 0x08 Select logic device 08 Set CFG2 0xE1 Ox0F GP50 53 of Superio2 gt GP57 54 of Superio2 delay 100 Set CFG2 0x07 0x08 Select logic device 08 d2 Get CFG2 0xE1 get GPIO Port 6 data printf n x d2 if d2 amp 0xFF OxOF printf n GPIO 50 51 52 53 gt 57 56 55 54 test ok else printf n GPIO 50 51 52 53 gt 57 56 55 54 test fail return 0 PEB 2771VG2A PEB 2781VG2A User s Manual 3 6 BIOS Setup Information Chapter 4 BIOS Setup Information PEB 2781 is equipped with the AMI BIOS stored in Flash ROM These BIOS has a built in Setup program that allows users to modify the basic system configuration easily This type of information is stored in CMOS RAM so that it is retained during power off periods When system is turned on PEB 2781 communicates with peripheral devices and checks its hardware resources against the configuration information stored in the CMOS memory If any error is detected or the CMOS parameters need to be initially defined the diagnostic program will prompt the user to enter the SETUP program Some errors are significant enough to abort the start up 4 1 Entering Setup Launch System Setup Power on the computer and the system will start POST Power On Self Test process When the message below appears on the screen press Del
3. Enabled Quiet Boot This BIOS feature determines if the BIOS should hide the normal POST messages with the motherboard or system manufacturer s full screen logo When it is enabled the BIOS will display the full screen logo during the boot up sequence hiding normal POST messages When it is disabled the BIOS will display the normal POST messages instead of the full screen logo Please note that enabling this BIOS feature often adds 2 3 seconds of delay to the booting sequence This delay ensures that the logo is displayed for a sufficient amount of time Therefore it is recommended that you disable this BIOS feature for a faster boot up time The choice Disabled Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 24 BIOS Setup Information AddOn ROM Display Mode This item is used to determine the display mode when an optional ROM is initialized during POST When set to Force BIOS the display mode used by AMI BIOS is used Select Keep Current if you want to use the display mode of optional ROM The choice Force BIOS Keep Current Bootup Num Lock This setting is to set the Num Lock status when the system is powered on Setting to On will turn on the Num Lock key when the system is powered on Setting to Off will allow users to use the arrow keys on the numeric keypad The choice Off On PS 2 Mouse support Select Enabled if you need to use a PS 2 interfaced mouse in the operating system The choice Dis
4. 232 422 485 serial ports USB Interface Support six USB Universal Serial Bus ports two at rear four on board for internal devices PS 2Mouse and Keyboard Interface Support on board pin header for PS 2 keyboard mouse Audio Interface Support on board pin header for Mic in Line out Real Time Clock Calendar RTC Support Y2K Real Time Clock Calendar Watchdog Timer Support WDT function through software programming for enable disable and interval setting Generate system reset On board VGA Intel Atom D525 N455 Integrated DX9 Graphics device Support Intel DVMT 4 0 On board Ethernet LAN Two Gigabit Ethernet 10 100 1000 Mbits sec LAN ports High Driving GPIO Onboard programmable 8 bit Digital I O interface PEB 2771VG2A 2781VG2A User s Manual 1 2 System Overview Cooling Fans Support one 3 pin power connector for system fan System Monitoring Feature Monitor system temperature and major power sources etc Outline Dimension L X W 146mm 5 75 X 105mm 4 07 1 4 System Configuration System Configuration CPU Type SBC BIOS Memory VGA Card VGA Driver LAN Card LAN Driver LAN Card LAN Driver Audio Card Audio Driver Chip Driver USB 2 0 Driver SATA HDD Compact Flash CDROM Power Supply Onboard Intel Atom CPU D525 1 8GHz L2 1MB FSB 800MHz Portwell Inc PEB 2771 BIOS Rev R1 00 E0 11112010 Transcend DDR3 1066 2GB Sa
5. a local storage device The choice Enabled Disabled GbE Wake Up From S5 This field specifies whether the system will be awakened from the S5 power saving mode when activity or input signal of onboard LAN is detected The choice Enabled Disabled HDA Controller This setting controls the High Definition Audio interface integrated in the Southbridge The choice Enabled Disabled SMBUS Controller The choice Enabled Disabled SLP S44 Min Assertion Width The choice 4 to 5 seconds 3 to 4 seconds 2 to 3 seconds 1 to 2 seconds PICE Port 0 1 2 3 4 5 The choice Auto Enabled Disabled PICE High Priority Port The choice Disable Port 0 Port 1 Port 2 Port 3 Port 4 Port 5 PICE Port 0 3 IOxAPIC Enable The choice Enabled Disabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 33 BIOS Setup Information 4 8 Exit This menu allows you to load the BIOS default values or factory default settings into the BIOS and exit the BIOS setup utility with or without changes Exit Options Exit system setup after saving the changes Discard Changes and Exit Discard Changes F19 key can be used for this operation Load Optimal Defaults Load Failsafe Defaults Select Screen 14 Select Item Enter Go to Sub Screen F1 General Help F16 Save and Exit ESC Exit Saving Changes and Exit Exit System Setup and save your changes to CMOS Pressing lt Enter gt on this item asks for confirmation Save
6. allow you to set or change the supervisor password User Password Change User Password User Password controls access to the system at boot These settings allow you to set or change the user password Boot Sector Virus Protection Boot Sector Virus Protection The choice Disabled Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 28 BIOS Setup Information 4 7 Chipset This menu controls the advanced features of the onboard Northbridge and Southbridge fidvanced Chipset Settings Configure Morth Bridge 777 features VARNING Setting wrong values in below sections may cause system to malfunction gt South Bridge Configuration North Bridge Chipset Configuration PCI MIU Allocation 468 To 3072718 Configure DRAM Timing by SPD Enabled Initate Graphic Adapter 16D Internal Graphics Mode Select Enabled 8MB PEG Port Configuration gt Video Function Configuration Select Screen Ti Select Item Change Option Fi General Help Save and Exit Exit PEB 2771VG2A PEB 2781VG2A User s Manual 4 29 BIOS Setup Information DRAM Frequency Users are recommended to use Auto for memory frequency selection The choice Auto Max MHz Configure DRAM Timing by SPD This option provides DRAM plug and play support by serial presence detect SPD mechanism via the system management bus SMBUS interface The choice Disabled Enabled Initate Graphic Adapter Select whi
7. changes to CMOS and exit the Setup Utility Discard Changes and Exit Abandon all changes and exit the Setup Utility Discard Changes Abandon all changes and continue with the Setup Utility Load Optimal Defaults Use this menu to load the default values set by the SBC manufacturer specifically for optimal performance of the SBC Load Failsafe Defaults Use this menu to load the default values set by the BIOS vendor for stable system performance PEB 2771VG2A PEB 2781VG2A User s Manual 4 34 Troubleshooting Chapter 5 Troubleshooting This chapter provides a few useful tips to quickly get PEB 2781 running with success As basic hardware installation has been addressed in Chapter 2 this chapter will primarily focus on system integration issues in terms of BIOS setting and OS diagnostics 5 1 Hardware Quick Installation DC 12V Power Input PEB 2781 supports DC12V input only 5 2 BIOS Setting It is assumed that users have correctly adopted modules and connected all the device cables required before turning on DC 12V in 200 pin DDR3 SO DIMM keyboard mouse SATA hard disk VGA connector device power cables are good examples that deserve attention With no assurance of properly and correctly accommodating these modules and devices it is very possible to encounter system failures that result in malfunction of any device To make sure that you have a successful start with PEB 2781 it is recommended when going with t
8. key to enter Setup Press Del to enter SETUP If the message disappears before you respond and you still wish to enter Setup restart the system by turning it OFF and On or pressing the RESET button You may also restart the system by simultaneously pressing Ctrl Alt and Delete keys Press F1 to Run SETUP or Resume The BIOS setup program provides a General Help screen You can call up this screen from any menu by simply pressing F1 The Help screen lists the appropriate keys to use and the possible selections for the highlighted item Press lt Esc gt to exit the Help screen General Help e Select Screen 14 Select Iten Change Option Field Enter Go to Sub Screen PGDN Next Page PGUP Previous Page HOME Go to Top of Screen END Go to Bottom of Screen F2 F3 Change Colors F Discard Changes F8 Load Failsafe Defaults F9 Load Optimal Defaults F10 Save and Exit Exit PEB 2771VG2A PEB 2781VG2A User s Manual 4 1 BIOS Setup Information 4 2 Main Use this menu for basic system configurations such as time date etc BIOS SETUP UTILITY i d Systen Overview Use ENTER TABI or IMIT TABI to AMIBIOS select a field Version 08 60 15 Build Date 03 08 11 Use or to ID maan configure System Tine Processor Inte 0 Atos TID CPU N455 9 T 666 Speed 166647 Count 1 Systen llenory Select Screen Size 1815 ti Select Iten Change Fie
9. 5 GPIO Connector 5 2 Pin BOX Header 2 0mm 5 GPlO2 reverse output 6 GPIO2 7 GPlOSreveseouput 8 GPIO8 2 5V Im ep J16 COM4 RS 232 2 5 Pin BOX Header mm TXDM44 Je Tem DR JS VR 9 JCHD NC J17 Mini PCI E Connector J18 COM3 RS 232 2 5 Pin BOX Header 2 0mm PIN NO DESCRIPTION PIN NO DESCRIPTION JDC 4 2 DSR 4 B RADHA 4 RISM 5b pxpa bk Ve 7 S IDIRIE 19 ee pF GND Ju NC PEB 2771VG2A PEB 2781VG2A User s Manual 2 6 Hardware Configuration J19 COM2 RS 232 2 5 Pin BOX Header 2 0mm PIN NO DESCRIPTION PIN NO DESCRIPTION ns JDC 4 2 DSR 4 Bs RXD 4 4 RISM b XDM CTSA Z JrRM VR po ND po NC J21 System Panel Connectors 2 4 Pin Header 2 0mm 5 GND j 6 j SYS REST 7 PWRONSWs 8 GND J22 LAN 2 Connector R 45 J23 LAN 1 Connector R 45 J24 USB 0 1 Connector USB A Typex2 J25 CPU Fan Connector 3 1 Pin Wafer J26 Power Input Connector Din Jack 3 Pin PIN NO Signal Description cci J27 VGA Connector D SUB15 Pin Female J28 COMI RS 232 D SUB9 Pin Male 29 Compact Flash Card Connector Tvpe I amp II U6 DDR3 SDRAM Connector SO DIMM 204 Pin PEB 2771VG2A PEB 2781VG2A User s Manual 2 7 Hardware Configuration P1 18 to 24 bits bypass and scaler mode voltage
10. CFG2 unsigned char Addr2 unsigned char d2 outportb Superio2_Addr Addr2 delay 2 d2 inportb Superio2_Addr 1 ifdef DEBUG printf nGet data x from CR x d2 Addr2 endif DEBUG delay 2 return d2 int main void unsigned char d2 printf n iy printf n PEB 2771 2781 GPIO TEST Program R1 0 printf n y printf n Please short the following pins with 2 00mm pitched jumper on J13 printf n P S SIO W83627UHG Winbond printf n GP50 J13 PIN 1 GP57 J13 PIN 2 printf n GP51 J13 PIN 3 GP56 J13 PIN 4 printf n GP52 J13 PIN 5 GP55 J13 PIN 6 printf n GP53 J13 PIN 7 GP54 J13 PIN 8 printf n GND J13 PIN10 VCC J13 PIN Out printf n n Starting PEB 2771VG2A PEB 2781VG2A User s Manual 3 5 System Installation enter Superio2 CFG 8787 CR2A B7 1 selet GPIO Port 1 d2 Get CFG2 0x2AJ d2 d2 amp Ox7F 0x80 Set CFG2 0x2A d2 IO test loop 1 Set GPIO Port 5 Enable Set CFG2 0x07 0x08 Select logic device 08 Set CFG2 0x30 0x02 Enable GPIO Port 5 GPIO50 557 GPIO51 gt 56 GPIO52 gt 55 GPIO53 gt 54 Set GPIO Port 5 of Superio2 Enable Set CFG2 0x07 0x08 Select logic device 08 Set CFG2 0xEO OxF0 GPIO Port 5 is 11110000
11. DT starts counting when it is activated It sends out a signal to system reset or to non maskable interrupt NMI when time out interval ends To prevent the time out interval from running out a re trigger signal will need to be sent before the counting reaches its end This action will restart the counting process A well written WDT program should keep the counting process running under normal condition WDT should never generate a system reset or NMI signal unless the system runs into troubles The related Control Registers of WDT are all included in the following sample program that is written in C language User can fill a non zero value into the Time out Value Register to enable refresh WDT System will be reset after the Time out Value to be counted down to zero Or user can directly fill a zero value into Time out Value Register to disable WDT immediately To ensure a successful accessing to the content of desired Control Register the sequence of following program codes should be step by step run again when each register is accessed Additionally there are maximum 2 seconds of counting tolerance that should be considered into user application program For more information about WDT please refer to Winbond W83627UHG data sheet There are two PNP I O port addresses that can be used to configure WDT 1 Ox2E EFIR Extended Function Index Register for identifying CR index number 2 0x2F EFDR Extended Function Data Register for accessin
12. EB 2771VG2A PEB 2781VG2A User s Manual 4 12 BIOS Setup Information AHCI Port0 Port2 While entering setup BIOS auto detects the presence of IDE devices This displays the status of auto detection of IDE devices BIOS SETUP UTILITY AHCI Porto Dev ice Not Detected S n R R T SATA Port Port Select the type of device connected to the system The choice Auto Not Installed S M A R T This allows you to activate the S M A R T Self Monitoring Analysis amp Reporting Technology capability for the hard disks S M A R T is a utility that monitors your disk status to predict hard disk failure This gives you an opportunity to move data from a hard disk that is going to fail to a safe place before the hard disk becomes offline The choice Disabled Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 13 BIOS Setup Information APM Configuration Select for APM Configuration BIOS SETUP UTILITY Enable or disable APM Suspend Suspend Disabled Disabled Disabled Disabled Disabled Disabled Power Management APM Enables for Power Management The choice Disabled Enabled Power Button Mode Go into On Off or Suspend when Power button is pressed The choice On Off Suspend Video Power Down Mode Power Down video in Suspend or Standby mode The choice Disable Standby Suspend Hard Disk Power Down Mode Power Down Hard Disk in Suspend or Standby mode The choice Di
13. Function eS PL short 12 Output P13 COM2 RS232 RS422 RS485 Function Setu PIN NO DESCRIPTION 2 11 10032 1537 16 18 Short Short Short Short pen RS 232 Function PIN NO DESCRIPTION Gi P Ki 3 05 ie 21 22 Other Short Short Open RS 422 Function PIN NO DESCRIPTION 12 po E pow jme Short Short Open RS 485 Function PEB 2771VG2A PEB 2781VG2A User s Manual 2 9 Hardware Configuration JP14 CF MASTER SLAVE Setup 1x2 Pin Header 2 0mm PIN NO DESCRIPTION L2 MASTER 3 Short Normal SLAVE Open MASTER X PEB 2771VG2A PEB 2781VG2A User s Manual 2 10 System Installation Chapter 3 System Installation This chapter provides you with instructions to set up your system The additional information is enclosed to help you set up onboard PCI device and handle Watch Dog Timer WDT and operation of GPIO in software programming 3 1 Intel amp N455 D525 Intel amp Atom D525 Processor 1M Cache 1 8GHz Max TDP 13 Watts Intel Atom N455 Processor 512K Cache 1 66GHz Max TDP 6 5 Watts 3 2 Main Memory PEB 2781 provide 1 x 200pin SO DIMM sockets which supports 800 DDR3 SDRAM as main memory Non ECC Error Checking and Correcting non register functions The maximum memory can be up to 2GB Memory clock and related settings can be detected by BIOS via SPD interface For system compatibility and stability do not use memory module without brand Memory configuration c
14. Legacy ISA devices The choice Available Reserved PEB 2771VG2A PEB 2781VG2A User s Manual 4 22 BIOS Setup Information DMA Channel 0 DMA Channel 1 DMA Channel 3 DMA Channel 5 DMA Channel 6 DMA Channel 7 Available Specified DMA is available to be used by PCI PnP devices Reserved Specified DMA is reserved for use by Legacy ISA devices The choice Available Reserved Reserved Memory Size Select Size of memory block to reserve for legacy ISA devices The choice Disabled 16K 32K 64K 4 5 Boot Use this menu to specify the priority of boot devices BIOS SETUP UTILITY Boot Settings gt Boot Device Priority Hard Disk Drives kg Select Screen ti Select Iten Enter Go to Sub Screen Fl General Help F10 Save and Exit EX Exit PEB 2771VG2A PEB 2781VG2A User s Manual 4 23 BIOS Setup Information Boot Settings Configuration BIOS SETUP UTILITY Boot Boot Settings Configuration Allows BIOS to skip 7 certain tests vii le booting This will Quiet Boot Disabled decrease the tine AddOn ROM Display Mode Force BIOS needed to boot the Bootup Mum Lock 0n systen PS 2 Mouse Support Autol Uait For F1 If Error Enabled Hit DEL Message Display Enabled Interrupt 19 Capture Disabled Quick Boot Enabling this setting will cause the BIOS power on self test routine to skip some of its tests during boot up for faster system boot The choice Disabled
15. MB table pointer to R X SDT pointer list The choice Disabled Enabled Headless mode Enable Disable Headless operation mode through ACPI The choice Disabled Enabled South Bridge ACPI Configuration The South Bridge ACPI related Configuration settings Use this section to configure additional ACPI options BIOS SETUP UTILITY South Bridge ACPI Configuration APIC ACPI SCI IRQ Disabled USB Device Uakeup From S3 S4 Disabled High Performance Event Timer Enabled HPET Memory Address FEDOOO00h PEB 2771VG2A PEB 2781VG2A User s Manual 4 11 BIOS Setup Information Energy Lake Feature Select the ACPI state used for System Suspend The choice Disabled Enabled APIC ACPI SCI IRO Enable Disable APIC ACPI SCI IRQ The choice Disabled Enabled USB Device Wakeup From 53 54 Enable Disable USB device Wake from 53 54 mode The choice Disabled Enabled High Performance Event Timer The choice Disabled Enabled HPET Memory Address The choice FED0000h FED1000h FED2000h FED3000h AHCI Settings Select for AHCI Configuration BIOS SETUP UTILITY AHCI Settings While entering setup BIBS auto detects the presence of IDE gt AHCI Porti Mot Detected devices This displays gt AHCI Port2 Mot Detected the status of auto detection of IDE dev ices Select Screen ti Select Iten Enter Go to Sub Screen Fi General Help F10 Swe and Exit ESC Exit P
16. PEB 2771 2781VG2A Embedded System Board User s Manual Version 1 6 Copyright O Portwell Inc 2012 All rights reserved All other brand names are registered trademarks of their respective owners Preface Table of Contents How to Use This Manual Chapter 1 System Overview saaesaneea anana anana anana anana nana nana snnm nnn nnn n nn than sta sas anana nean awanane 1 1 1 1 Introduction RC le ei 1 1 1 2 CHEEK List u ote en 1 1 1 3 Prod ct Specificato ame area 1 2 1 4 System Conliguralion ua 1 3 LR System EE 1 7 Chapter 2 Hardware Configuration cesses nawan nana nana nn nnne nn nnne nn annnm nnnm nnn nn nana 2 1 2 1 Jumper SENG ara sasa 2 1 SEET o eee eerte rh eedem reb naeh retia eto 2 2 Chapter 3 System Installation awanan anawa eese esee esee nennen nennt nnn nnnm nennt nn nnn 3 1 oT Intel N4557 RE 3 1 9 2 Mam Meniony oett inae uto nassen 3 1 3 3 Installing the Single Board E tg 3 1 3 3 1 Chipset Component Driver acp te ep geom 3 2 3 3 2 Intel Integrated Graphics GMCH Chip ee 3 2 3 3 3 Intel Gigabit Ethernet Controller nennen 3 2 332 AUdID Controler uoi ra a 3 2 3 4 Clear CMOS Operation 3 2 29 WDT Fufctioh reiege icta pete YER nier ca Pri ique taa e eco ec 3 3 3 6 GRID nase 3 4 Chapter 4 BIOS Setup Information usreunssesnnnnnnnnnnnnnnnannnnnnnnnnnnnnnnannnnnnnnnnnnnnnnnn
17. Setup 1 3 Pin Header 2 0mm a base Shot 25V Bypass JP2 CMOS Setup 1 3 Pin Header 2 0mm PIN NO Signal Description Normal Keep CMOS Setup x Clear CMOS Setup JP3 LVDS for 18 to 24 Bits mode adjust 12 B4 be TI ACH Panel 0 O Short 24 bit ICH Panel Open LDI Mode Short Shot 24 bit ICH Panel SPWG Mode Short f i8bitICHPanel O P4 LCD Panel Voltage Setup 2 3 Pin Header 2 0mm M s E Ser vierte P Short fv trices het art P5 LCD Panel Light Enable Voltage Setup 1 3 Pin Header 2 0mm PIN NO DESCRIPTION 1 2 2 3 Short 3 3V Shot SV P7 COM4 RI Function Setup 3x2 Pin Header 2 0mm 12 Ba SI Shot j 5VOuput het RI Function k short HN Output PEB 2771VG2A PEB 2781VG2A User s Manual 2 8 Hardware Configuration JP8 COM3 RI Function Setup 3x2 Pin Header 2 0mm a2 Ba Ta O Shot H5VOutput at RlFuncionx jhon ren JP9 Suspend LED Connector 1x2 Pin Header 2 0mm PIN NO DESCRIPTION Suspend LED JP10 Case Open Detect Connector 1x2 Pin Header 2 0mm PIN NO DESCRIPTION CASEOP JP11 COMI RI Function Setup 3x2 Pin Header 2 0mm UO er qug TI Short EE 5V Output Output iuum wmm meum JL Short r2VOutput JP12 COM2 RI Function Setup 3x2 Pin Header 2 0mm i ee se CS shot pWoupt O P Short Ri
18. abled Enabled Auto Wait For EU If Error When this setting is set to Enabled and the boot sequence encounters an error it asks you to press F1 If disabled the system continues to boot without waiting for you to press any keys The choice Disabled Enabled Hit DEL Message Display Set this option to Disabled to prevent the message as follows The choice Disabled Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 25 BIOS Setup Information Interrupt 19 Capture Interrupt 19 is the software interrupt that handles the boot disk function When enabled this BIOS feature allows the ROM BIOS of these host adaptors to capture Interrupt 19 during the boot process so that drives attached to these adaptors can function as bootable disks In addition it allows you to gain access to the host adaptor s ROM setup utility if one is available When disabled the ROM BIOS of these host adaptors will not be able to cap ture Interrupt 19 Therefore you will not be able to boot operating systems from any bootable disks attached to these host adaptors Nor will you be able to gain access to their ROM setup utilities The choice Disabled Enabled Boot Device Priority BIOS SETUP UTILITY Boot Device Priority Specifies the boot sequence from the available devices 2nd Boot Device Network IBA GE Slol fi device enclosed in parenthesis has been disabled in the corresponding type neni wight 1985 2018 America
19. al Port2 Base Addresses The choice Address Disabled 2F8 3E8 2E8 IRQ 3 4 10 11 Serial Port 3 Address IRO Allows BIOS Select Serial Port3 Base Addresses The choice Address Disabled A20 A28 A30 A38 A40 A48 IRQ 3 4 10 11 Serial Port 4 Address IRQ Allows BIOS Select Serial Port4 Base Addresses The choice Address Disabled A20 A28 A30 A38 A40 A48 IRQ 3 4 10 11 Hardware Health Configuration Configuration monitor the Hardware Health BIOS SETUP UTILITY Harduare Health Configuration Sustem Temperature 13 C 931 F CPU Temperature 63 C Ucore 1 112 U SUCC 4 768 U s 12U 11 904 U 3 1 344 U u 5 112 U USB 4 896 U UBAT 1 168 U Select Screen Ti Select Item F1 General Help F19 Save and Exit ESC Exit PEB 2771VG2A PEB 2781VG2A User s Manual 4 8 BIOS Setup Information ACPI Settings Select for Advanced ACPI Configuration BIOS SETUP UTILITY ACPI Settings General ACPI ee UOonf igurat ian settings gt Advanced ACPI Configuration gt Chipset ACPI Configuration Select Screen Ti Select Iten Enter Go to Sub Screen F1 General Help F10 Save and Exit ESC Exit MI Opt ight 19385 2018 American Megatrend T iy BIOS SETUP UTILITY General ACPI Configuration Select Screen Ti Select Item Change Option Fi General Help F10 Save and Exit ESC Exit 018 American Megatrends PEB 2771VG2A PEB 2781VG2A User s Manual 4 9 BIOS Setup Information Suspen
20. an be set to either one double sided DIMM in one DIMM socket or two single sided SO DIMM in both sockets Beware of the connection and lock integrity from memory module to socket Inserting improperly it will affect the system reliability Before locking make sure that all modules have been fully inserted into the card slots Note To insure the system stability please do not change any of DRAM parameters in BIOS setup to modify system the performance without acquired technical information 3 3 Installing the Single Board Computer To install your PEB 2781 into standard chassis or proprietary environment please perform the following Step 1 Check all jumpers setting on proper position Step 2 Install and configure CPU and memory module on right position Step 3 Place PEB 2781 into the dedicated position in the system Step 4 Attach cables to existing peripheral devices and secure it PEB 2771VG2A PEB 2781VG2A User s Manual 3 1 System Installation WARNING Please ensure that SBC is properly inserted and fixed by mechanism Note Please refer to section 3 3 1 to 3 3 7 to install INF VGA LAN Audio drivers 3 3 1 Chipset Component Driver PEB 2781 uses state of art Intel N455 CPU It s a new chipset that some old operating systems might not be able to recognize To overcome this compatibility issue for Windows Operating Systems such as Windows XP please install its INF before any of other Drivers are installed You c
21. an find very easily this chipset component driver in PEB 2781 CD title 3 3 2 Intel Integrated Graphics GMCH Chip PEB 2781 uses Intel N455 integrated graphic chipset to gain an outstanding graphic performance PEB 2781 supports VGA LVDS dual display This combination makes PEB 2781 an excellent piece of multimedia hardware Drivers Support Please find all the drivers in the PEB 2781 CD title Drivers support Windows XP Vista Win7 3 3 3 Intel Gigabit Ethernet Controller Drivers Support Please find INTEL 82567V amp 82583V LAN driver in Ethernet directory of PEB 2781 CD title The drivers support Windows XP Vista Win7 3 3 4 Audio Controller Please find Intel Realtek ALC888 High Definition Audio driver form PEB 2781 CD title The drivers support Windows XP Vista Win7 3 4 Clear CMOS Operation The following table indicates how to enable disable Clear CMOS Function hardware circuit by putting jumpers at proper position JP2 RTC Reset Function Normal Operation 1 2 Short PEB 2771VG2A PEB 2781VG2A User s Manual 3 2 System Installation 3 5 WDT Function The working algorithm of the WDT function can be simply described as a counting process The Time Out Interval can be set through software programming The availability of the time out interval settings by software or hardware varies from boards to boards PEB 2771VG2A PEB 2781VG2A allows users control WDT through dynamic software programming The W
22. ch graphics controller to use as the primary boot device The choice IGD PCI IGD PCI PEG PEG IGD PEG PCI Internal Graphics Mode Select Select the amount of system memory used by the internal graphics device The choice Enabled 8MB Video Function Configuration BIOS SETUP UTILITY Uideo Function Configuration DUMT FIXED Memory 256MB Boot Display Device CRT LUDSI Flat Panel Type 1024x768 18b Backlight Control Support UBIOS Defau1t BIA Control UBIOS Default Spread Spectrum Clock Disabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 30 BIOS Setup Information DVMT Mode Select Intel s Dynamic Video Memory Technology DVMT allows the system to dynamically allocate memory resources according to the demands of the system at any point in time The key idea in DVMT is to improve the efficiency of the memory allocated to either system or graphics processor It is recommended that you set this BIOS feature to DVMT Mode for maximum performance Setting it to DVMT Mode ensures that system memory is dynamically allocated for optimal balance between graphics and system performance The choice Fixed Mode DVMT Mode DVMT FIXED Memory When set to DVMT FIXED Mode the graphics driver will allocate a fixed amount of memory as dedicated graphics memory as well as allow more system memory to be dynamically allocated between the graphics processor and the operating system The choice 128MB 256MB Maximum DVMT
23. d Off This is a workaround for OSes without EHCI hand off support The EHCI ownership change should claim by EHCI driver The choice Disabled Enabled Legacy USB1 1 HC Support The choice Disabled Enabled USB Mass Storage Device Configuration BIOS SETUP UTILITY USB Mass Storage Device Configuration Device 81 pai IntelligentStick8 00 Emulation Type Auto USB Mass Storage Device Configuration Number of seconds POST waits for the USB mass storage device after start unit command The choice 10 Sec 20 Sec 30 Sec 40 Sec Emulation Type The choice Auto Floppy Forced FDD Hard Disk CDROM PEB 2771VG2A PEB 2781VG2A User s Manual 4 19 BIOS Setup Information Trusted Computing BIOS SETUP UTILITY Enable Disable TPM TC6 TPM 1 1 1 2 supp i in TOS TCG TPM SUPPORT The choice No Yes PEB 2771VG2A PEB 2781VG2A User s Manual 4 20 BIOS Setup Information 44 PCIPnP Advanced PCI PnP setting wrong values in below sections may cause system to malfunction BIOS SETUP UTILITY al Clear NURAN System Boot dur ing VARNING Setting wrong values in below sections mag cause system to malfunction Plug 8 Play WS PCI Latency Tiner Allocate IRQ to PCI UGA Palette Snooping PCI IDE Busfaster fuai lable fwai lablel fai lable fva i lable Avai lable fmailablel fat lable fma i lable Avai lable Avai lable Avai lable Avai lable Avai lable fuai labl
24. d mode This item specifies the power saving modes for ACPI function If your operating system supports ACPI you can choose to enter the Standby mode in S1 POS or S3 STR fashion through the setting of this field Options are 91 POS The S1 sleep mode is a low power state In this state no system context is lost CPU or chipset and hardware maintains all system contexts 93 STR The S3 sleep mode is a lower power state where the information of system configuration and open applications files is saved to main memory that remains powered while most other hardware components turn off to save energy The information stored in memory will be used to restore the system when a wake up event occurs Advanced ACPI Configuration Advanced ACPI Configuration settings Use this section to configure additional ACPI options BIOS SETUP UTILITY fidvanced fiCPI Configuration Enable RSDP pointers to amp 4 bIt Fixed Sten Description Tables Di ACPI APIC support Enabled ACPI version has sone AMI OEMB table Enabled Headless mode Disabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 10 BIOS Setup Information ACPI Version Features Enable RSDP pointers to 64 bit Fixed System Description Tables The choice ACPI v1 0 ACPI v2 0 ACPI v3 0 ACPI APIC support Include ACPI APIC table pointer to RSDT pointer list The choice Disabled Enabled AMI OEMB table Include OE
25. e fwailablel Clear NVRAM Clear NVRAM during System Boot The choice No Yes PEB 2771VG2A PEB 2781VG2A User s Manual 4 21 BIOS Setup Information Plug amp Play O S No lets the BIOS configure all the devices in the system Yes lets the operating system configure Plug and Play PnP devices not required for boot if your system has a Plug and Play operating system The choice No Yes PCI Latency Timer Select value in units of PCI clocks for PCI device latency timer register The choice 32 64 96 128 160 192 224 248 Allocate IRQ to PCI VGA Yes Assigns IRQ to PCI VGA card if card requests an IRQ No Does not assign IRQ to PCI VGA card even if card requests an IRQ The choice No Yes Palette Snooping Enabled informs the PCI devices that an ISA graphics device is installed in the system so the card will function correctly The choice Disabled Enabled PCI IDE BusMaster Enabled Uses PCI bus mastering for reading writing to IDE drives The choice Disabled Enabled OffBoard PCI ISA IDE Card Some PCI IDE cards may require this to be set to the PCI slot number that is holding the card AUTO Works for most PCI IDE cards The choice Auto PCI Slot1 PCI Slot2 PCI Slot3 PCI Slot4 PCI Slot5 PCI Slot6 IRQ 3 IRQ 4 IRQ5 IRQ7 IRQ 9 IRO 10 IRQ 11 IRQ 14 IRO 15 Available Specified IRQ is available to be used by PCI PnP devices Reserved Specified IRQ is reserved for used by
26. ed gt Third IDE Slave Mot Detected gt Fourth IDE Master Not Detected gt Fourth IDE Slave Mot Detected Select Screen 14 Select Item Hard Disk Urite Protect Disabled Change Option IDE Detect Time Out Sec F1 General Help ATAPI BOPin Cable Detection Host 8 Device F10 Save and Exit ESC Exit ATA IDE Configuration The choice Disabled Compatible Enabled Legacy IDE Channels The choice SATA Only SATA Pri PATA Sec PATA Only PEB 2771VG2A PEB 2781VG2A User s Manual 4 5 BIOS Setup Information Prima Secondary Third Fourth Fifth IDE Master Slave While entering setup BIOS auto detects the presence of IDE devices This displays the status of auto detection of IDE devices BIOS SETUP UTILITY Dev ice Not Detected LBA Large Mode Block Multi Sector Transfer PIO Mode DMA Mode SHORT 32Bit Data Transfer Type Press PgUp lt gt or PgDn lt gt to select Not Installed Auto CD DVD or ARMD type You can use Manual to define your own drive type manually LBA Large Mode Enabling LBA causes Logical Block Addressing to be used in place of Cylinders Heads and Sectors Block Multi Sector Transfer Any selection except Disabled determines the number of sectors transferred per block PIO Mode Indicates the type of PIO Programmed Input Output DMA Mode Indicates the type of Ultra DMA S M A R T This allows you to activate the S M A R T Self Monitor
27. ed The following table shows the IRQ used by the devices on board IRQ Current Use Default Use IRQ 0 System ROM System Timer IRQ 1 System ROM Keyboard Event IRQ 2 Unassigned Usable IRQ IRQ 3 System ROM COM2 IRQ 4 System ROM COM1 IRQ 5 Unassigned Usable IRQ IRQ 6 System ROM Diskette Event IRQ7 Unused Usable IRQ IRQ 8 System ROM Real Time Clock IRQ9 Unassigned Usable IRQ PEB 2771VG2A PEB 2781VG2A User s Manual 5 3 Troubleshooting IRO 10 IRO 11 IRO 12 IRO 13 IRO 14 IRO 15 PEB 2771VG2A PEB 2781VG2A User s Manual Unassigned Unassigned System ROM System ROM System ROM Unassigned Usable IRQ Usable IRQ IBM Mouse Event Coprocessor Error Hard Disk Event Usable IRQ 5 4
28. es of trouble shooting Chapter 5 Troubleshooting Provides various useful tips to quickly get PEB 2771VG2A PEB 2781VG2A running with success As basic hardware installation has been addressed in Chapter 3 this chapter will basically focus on system integration issues in terms of backplane setup BIOS setting and OS diagnostics The content of this manual is subject to change without prior notice These changes will be incorporated in new editions of the document Portwell may make supplement or change in the products described in this document at any time Updates to this manual technical clarification and answers to frequently asked questions will be shown on the following web site http www portwell com tw System Overview Chapter 1 System Overview 1 1 Introduction Portwell Inc a world leading innovator in the Industrial PC IPC market and a member of the Intel Embedded and Communications Alliance Intel ECA announced today the Portwell PEB 2771 2781VG2A utilizing the Intel ECX form factor based on the Intel Atom processor D525 N455 and the Intel System Controller Hub ICH8M includes integrated enhanced graphics and memory controllers on 45nm process technology delivering significant power reduction performance improvements and smaller platform footprint over the previous Intel Atom processor N270 The PEB 2771 2781VG2A can provide the low power consumption for low profile fanless applications such a
29. etup 13x2 Pin Header 2 0mm JP14 CF MASTER SLAVE Setup 1x2 Pin Header 2 0mm Pin Assignments of Connectors J1 PS 2 Keyboard Mouse Connector 1 6 Pin Wafer 2 0mm PIN NO DESCRIPTION K B CLK M S DATA 6 JGND O J2 Inverter Power Connector 5 1 Pin Wafer PIN NO DESCRIPTION 5V Bo HV LCD_BL ADJ 2 LCD_BL EN PEB 2771VG2A PEB 2781VG2A User s Manual 2 3 Hardware Configuration J3 LCD LVDS Connector 15 2 Pin Hirose 6 CDIDO p JLCDIDOl 8 LCDIDO 7 LCDIDO2 10 LCD1DO3 Op 16 Ground 15 Ground 16 Ground 15 Ground J4 SATA Power 2 Output connector 1 4 Pin Header 2 54mm PIN NO DESCRIPTION ja EZ 5V J5 SATA Power 12 Output connector 1 4 Pin Header 2 54mm PINNO DESCRIPTION GND 2 LimeinR 6 GND 7 LieotL 8 GND 9 LinoutR 10 MICinR PEB 2771VG2A PEB 2781VG2A User s Manual 2 4 Hardware Configuration J7 8 SATA1 Connector PIN NO Signal Description S J10 Battery Connector 1 2 Pin Wafer 2 0mm PIN NO DESCRIPTION Battery 11 USB 3 2 Connector 5 2 1 Pin Header 2 0mm 5 USBD4 6 UBDH 7 GND GND LPC FRAME LPC PCICLK PEB 2771VG2A PEB 2781VG2A User s Manual 2 5 Hardware Configuration J14 TPM 10 2 Pin Header 2 0mm 5 PLTRSTK o VCC 7 LADS 8 J LAD 9 IV 10 LAD i J1
30. g desired CR Below are some example codes which demonstrate the use of WDT Step1 Enter W83627UHG configuration registers mode outportb Ox2E 0x87 outportb Ox2E 0x87 Step2 Pin89 to be WDTO outportb Ox2E 0x2b outportb Ox2E 1 0x04 Step3 Select logic device 8 outportb Ox2E 0x07 outportb Ox2E 1 0x08 PEB 2771VG2A PEB 2781VG2A User s Manual 3 3 System Installation Step4 Config WDT using second to be unit outportb Ox2E 0xf5 outportb Ox2E 1 0x00 Step5 Set WDT time out time outportb Ox2E 0xf6 outportb Ox2E 1 time out Step6 Exit configuration registers mode outportb Ox2E Oxaa 3 6 GPIO W83627UHG GPIO DEMO PROGRAM File Name 2780GPIO C Write by Eason Huang include lt stdio h gt include lt conio h gt include lt dos h gt define Superio2_Addr 0x2E define DEBUG 1 void enter_Superio2_CFG void outportb Superio2_Addr 0x87 outportb Superio2_Addr 0x87 j void exit Superio2 CFG void outportb Superio2_Addr 0xAA j PEB 2771VG2A PEB 2781VG2A User s Manual 3 4 System Installation void Set CFG2 unsigned char Addr2 unsigned char Value2 unsigned char d2 outportb Superio2_Addr Addr2 delay 2 outportb Superio2_Addr 1 Value2 ifdef DEBUG d2 inportb Superio2_Addr 1 printf nWrite x to CR x read back is x Value2 Addr2 d2 endif DEBUG delay 2 j unsigned char Get
31. he basic IRO mapping is given below for your reference IRQ IRO Default Use IRO 0 System Timer IRO 1 Keyboard Event IRO 2 Usable IRQ IRQ 3 COM2 IRQ 4 COMI IRO 5 Usable IRQ IRQ 6 Diskette Event IRQ 7 Usable IRQ IRQ 8 Real Time Clock IRQ 9 Usable IRQ IRQ 10 Usable IRQ IRQ 11 Usable IRQ IRQ 12 IBM Mouse Event IRQ 13 Coprocessor Error IRQ 14 Hard Disk Event IRQ 15 Usable IRQ PEB 2771VG2A PEB 2781VG2A User s Manual 5 2 Troubleshooting It is then very easy to find out which IRQ resource is ready for additional peripherals If IRO resource is not enough please disable some devices listed above to release further IRO numbers System Memory Address Map Each On board device in the system is assigned a set of memory addresses which also can be identical of the device The following table lists the system memory address used for your reference Memory Area Size Description 0000 003F 1K Interrupt Area 0040 004F 0 3K BIOS Data Area 0050 006F 0 5K System Data 0070 0E2E 54K DOS OE2F 0F6B 5K Program Area OF6C 9FBF 577K Available First Meg Conventional memory end at 639K 9FCO 9FFF 1K Extended BIOS Area A000 AFFF 64K VGA Graphics B000 B7FF 32K Unused B800 BFFF 32K VGA Text C000 CD9F 54K Video ROM CDAO EFFF 137K Unused F000 FFFF 64K System ROM Interrupt Request Lines IRQ Peripheral devices can use interrupt request lines to notify CPU for the service requir
32. he boot up sequence to hit DEL key and enter the BIOS setup menu to tune up a stable BIOS configuration so that you can wake up your system far well PEB 2771VG2A PEB 2781VG2A User s Manual 5 1 Troubleshooting Loading the default optimal setting When prompted with the main setup menu please scroll down to Load Optimal Defaults press Enter and Y to load in default optimal BIOS setup This will force your BIOS setting back to the initial factory configuration It is recommended to do this so you can be sure the system is running with the BIOS setting that Portwell has highly endorsed As a matter of fact users can load the default BIOS setting any time when system appears to be unstable in boot up sequence Auto Detect Hard Disks In the BIOS gt Advanced pick up any one from Primary Secondary Master Slave IDE ports and press Enter Setup the selected IDE port and its access mode to Auto This will force system to automatically pick up the IDE devices that are being connected each time system boots up Improper disable operation There are too many occasions where users disable a certain device feature in one application through BIOS setting These variables may not be set back to the original values when needed These devices features will certainly fail to be detected It is also very common that users would like to disable a certain device port to release IRQ resource A few good examples are A quick review of t
33. ing Analysis amp Reporting Technology capability for the hard disks S M A R T is a utility that monitors your disk status to predict hard disk failure This gives you an opportunity to move data from a hard disk that is going to fail to a safe place before the hard disk becomes offline 32 Bit Data Transfer Enable Disable 32 bit Data Transfer PEB 2771VG2A PEB 2781VG2A User s Manual 4 6 BIOS Setup Information Hard Disk Write Protect Disabled Enabled device write protection this will be effective only if device is accessed through BIOS The choice Disabled Enabled IDE Detect Time Out Sec Select the time out value for detecting ATA ATAPI device s The choice 0 5 10 15 20 25 30 35 ATA PI 80Pin Cable Detection Select the mechanism for detecting 80Pin ATA PI cable The choice Host amp Device Host Device Super IO Configuration BIOS SETUP UTILITY Configure Uin627UHG Super IU Chipset Allows BIOS to Select Serial Porti Base Addresses Serial Porti IRQ 14 Serial Port2 Address 2F8 Serial Port2 IRQ Bl Serial Port3 Address A29 Serial Port3 IRQ 101 Serial Port4 fiddress A28 Serial Port4 IRQ DU PEB 2771VG2A PEB 2781VG2A User s Manual 4 7 BIOS Setup Information Serial Port 1 Address IRO Allows BIOS Select Serial Port1 Base Addresses The choice Address Disabled 3F8 3E8 2E8 IRQ 3 4 10 11 Serial Port 2 Address IRO Allows BIOS Select Seri
34. l eon DEN Men Ul Wag J Y my Wi A A VA 9 GEN Md wn en N Un UI On On No Ww 4 NO Un uu N Le r3 LA Un e AL A Dk N SINN KAN CD SS OW Rear IO PEB 2771VG2A 2781VG2A User s Manual 1 5 System Overview Pee sg 4 iren kad 1 d P l1 ME Y Ys o ge B U 4 60 EEE cl Soc PEB 2771VG2A 2781VG2A User s Manual 1 6 System Overview 1 5 System Architecture All of details operating relations are shown in PEB 2771 2781VG2A series System Block Diagram 18 bit LVDS u Intel D425 D525 EE XC3S200A 24 bit LVDS DDR2 400 512MB DB 15 VGA DDR3 800 SO DIMM X4 DMI ICH8M Line out and RJ45 ALC892 R Mic in 82583V RJ45 SBx2 Mini card PCI BIS sesa SATA i PATA CF Card LPC Bus COM1 RS232 W838627UHG SuperlO H N Monitor COH3H RS232 TH y Header COHMHZRS 2321422483 a E PS2 KB MS PEB 2771 2781V G2A System Block Diagram PEB 2771VG2A 2781VG2A User s Manual 1 7 Hardware Configuration Chapter 2 Hardware Configuration This chapter gives the definitions and shows the positions of jumpers headers and connector All of the configuration jumpers on PEB 2771 2781 are in the proper position The default settings are indicated with a star sign X 2 1 Jumper Setting In general jumpers on the single board computer are used to select options for certain fea
35. ld Tab Select Field Systen Date F1 General Help F10 Save and Exit ESC Exit AMI BIOS Processor System Memory These items show the firmware and hardware specifications of your system Read only System Time The time format is Hour Minute Second Use or to configure system Time System Date The date format is Day Month Date Year Use or to configure system Date PEB 2771VG2A PEB 2781VG2A User s Manual 4 2 BIOS Setup Information 4 3 Advanced Use this menu to set up the items of special enhanced features BIOS SETUP UTILITY Boot secur ity Advanced Settings VARNING Setting urong values in below sections may cause system to malfunction IDE Configuration SuperI0 Configuration Hardware Health Configuration ACPI Configuration AHCI Configuration APN Configuration ASF Configuration Select Screen MPS Configuration Ti Select Item PCI Express Configuration Enter Go to Sub Screen Sabios Configuration F1 General Help USB Configuration F18 Save and Exit Trusted Comput ing ESC Exit AA A dh Z ZS dh eh OR PPS CPU Configuration These items show the advanced specifications of your CPU Read only BIOS SETUP UTILITY Configure advanced CPU settings Disabled for WindousXP Module Uersion 3F 17 Manufacturer Intel Intel OR Atom TH CPU N455 H 1 666Hz Frequency 1 6661 FSB Speed G t Cache L1 24 KB Cache L2 512 KB Ratio Actual Ualuc 10 Exec
36. msung K4B1G0846F Onboard Intel amp Graphics Media Accellerator Luna Pier 3150 Intel amp Graphics Media Accellerator 3150 Version 6 14 10 5134 Onboard Intel 82567V 3 Gigabit Network Connection Intel 82567V 3 Gigabit Network Connection Version 10 1 6 0 Onboard Intel 82583V Gigabit Network Connection Intel 82583V Gigabit Network Connection Version 11 4 7 0 Onboard Realtek ALC888 Audio Realtek High Definition Audio Version 5 10 0 5296 Intel amp Chipset Device Software Version 9 1 1 1019 Intel ICH8 Family USB2 Enhanced Host Controller Version 9 1 1 1016 Seagate ST3160815AS 160GB Apacer 128MB Lite On LH 20A15 DVD ROM APH 3020 PEB 2771VG2A 2781VG2A User s Manual 1 3 System Overview Programs for loading both CPU amp VGA Run Burning Test V5 3 RUN time 10 30 Minutes Full Loading Full Loading 30Min Item Power ON 10Min DC 12V 1 59 2 27 2 22 USB Loading Test 4 90 V 480 mA Operating Temperature 0 C 60 C Storage Temperature 20 C 80 C Relative Humidity 5 90 non condensing Mechanical Drawing Restricted component height 2 5 mm Restricted component height 2 0 mm TOP side PEB 2771VG2A 2781VG2A User s Manual 1 4 System Overview Restricted component height on the bottom side of the module 8 5 mm Restricted component height 2 5 mm m 00 LO oO r st oO N m z gt st oO c oO i U m N O 1 92 7777
37. n Megatrends I 1st Boot Device The items allow you to set the sequence of boot devices where BIOS attempts to load the disk operating system First press Enter to enter the sub menu Then you may use the arrow keys 1 to select the desired device then press lt gt lt gt or lt PageUp gt lt PageDown gt key to move it up down in the priority list The choice Network IBA GE Slot 00C8 v1324 Disabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 26 BIOS Setup Information Hard Disk Drives BIOS SETUP UTILITY Hard Disk Drives Specifies the boot T sequence from the available devices 1st Drive This setting allows users to set the priority of the removable devices First press Enter to enter the sub menu Then you may use the arrow keys 1 to select the desired device then press lt gt lt gt or lt PageUp gt lt PageDown gt key to move it up down in the priority list PEB 2771VG2A PEB 2781VG2A User s Manual 4 27 BIOS Setup Information 4 6 Security Use this menu to set supervisor and user passwords BIOS SETUP UTILITY IL pe EE stall or Cha e the Bangi word Change Supervisor Password Change User Password Boot Sector Virus Protection Disabled General Help Save and Exit Supervisor Password Change Supervisor Password Supervisor Password controls access to the BIOS Setup utility These settings
38. nector J15 GPIO Connector 5 2 Pin BOX Header 2 0mm J16 COM4 RS 232 2 5 Pin BOX Header 2 0mm J17 MINI PCI E Connector PEB 2771VG2A PEB 2781VG2A User s Manual 2 2 Hardware Configuration J18 COM3 RS 232 2 5 Pin BOX Header 2 0mm J19 COM2 RS 232 2 5 Pin BOX Header 2 0mm J21 System Panel Connectors 2 4 Pin Header 2 0mm J22 LAN 1 Connector RJ 45 J23 LAN 2 Connector RJ 45 J24 USB 0 1 Connector USB A Typex2 J25 CPU Fan Connector 3 1 Pin Wafer J26 Power Input Connector Din Jack 3 Pin J27 VGA Connector D SUB15 Pin Female J28 COMI RS 232 D SUB9 Pin Male J29 Compact Flash Card Connector Type I amp II U6 DDR3 SDRAM Connector SO DIMM 204 Pin jet 18 to 24 bits bypass and scaler voltage select 3x1 Pin Header 2 0mm JP2 CMOS Setup 1 3 Pin Header 2 0mm JP3 LVDS for 18 to 24 Bits mode adjust JP4 LCD Panel Voltage Setup 2 3 Pin Header 2 0mm JP5 LCD Panel Light Enable Voltage Setup 1 3 Pin Header 2 0mm JP6 18 to 24 bits Chip programming 6x1 Pin Header 2 54mm JE COMA RI Function Setup 3x2 Pin Header 2 0mm JP8 COM3 RI Function Setup 3x2 Pin Header 2 0mm JP9 Suspend LED Connector 1x2 Pin Header 2 0mm JP10 Case Open Detect Connector 1x2 Pin Header 2 0mm JP11 COMI RI Function Setup 3x2 Pin Header 2 0mm JP12 COM2 RI Function Setup 3x2 Pin Header 2 0mm JP13 COM2 RS232 RS422 RS485 Function S
39. nnnannnnnannnnnnn 4 1 4 1 Entering Setup Launch System Setup sale ea 4 1 4 2 Maln EE 4 2 4 3 Advanced ME 4 3 Lx Mula baa esai 4 21 AOD AOD E 4 23 SE 4 28 LAG AAN A PANEN KAN a KEN Ta Na NAN EN 4 29 48 ER nk 4 34 Chapter 5 Troubleshooting u 22442000400n0nn00nnnnnannnnnnnnnannnnnannnnnnnnnnnnnnnannnnnnnnnnnnnnnnnnnnnnannnnnnn 5 1 5 1 Hardware Quick Installation a sense een 5 1 SMART Ra Eeer 5 1 Appendix A Appendix B Preface How to Use This Manual The manual describes how to configure your PEB 2771VG2A PEB 2781VG2A system to meet various operating requirements It is divided into five chapters with each chapter addressing a basic concept and operation of Single Host Board Chapter 1 System Overview Presents what you have in the box and give you an overview of the product specifications and basic system architecture for this series model of single host board Chapter 2 Hardware Configuration Shows the definitions and locations of Jumpers and Connectors that you can easily configure your system Chapter 3 System Installation Describes how to properly mount the CPU main memory and Compact Flash to get a safe installation and provides a programming guide of Watch Dog Timer function Chapter 4 BIOS Setup Information Specifies the meaning of each setup parameters how to get advanced BIOS performance and update new BIOS In addition POST checkpoint list will give users some guidelin
40. s POS Print Imaging ATM Kiosk Medical Panel PC Digital Security and Digital Signage PEB 2771 2781VG2A supports dual display by VGA and 18 24 bit LVDS With its display enriched interface PEB 2771 2781VG2A can support various multimedia devices and enriched IO interfaces that can supply various USB and COM devices PEB 2771 2781VG2A supports SO DIMM memory slot for DDR3SDRAM up to 2GB and comes with PS 2 Keyboard and Mouse header 4 x COM ports 2x SATA 2 x Gigabit Ethernet 6 x USB2 0 ports It also support CompactFlash Socket and one Mini PCIE socket for embedded application usage 1 2 Check List The PEB 2771 2781VG2A package should cover the following basic items One PEB 2771 2781VG24A 3 5 Main Board One Thermal Kit One Serial ATA cable One SATA Power cable One Installation Resources CD Title If any of these items is damaged or missing please contact your vendor and keep all packing materials for future replacement and maintenance PEB 2771VG2A 2781VG2A User s Manual 1 1 System Overview 1 3 Product Specification Main processor Support Intel Atom processor D525 N455 CPU bus clock 800 MHz Chipset Intel amp ICH8M Main Memory Support signal channel DDR3 memory interface Up to 2GB DDR3 800 SDRAM on SO DIMM socket System BIOS AMI BIOS Expansion Interface One Mini PCI Express socket SATA Interface Two SATA ports Serial Ports Support there RS 232 and one RS
41. sable 7 PCI Express L85 and L1 link power states Active State Power Management PCI Express LOs and L1 link power states The choice Disabled Enabled Smbios Configuration SMBIOS Configuration Menu Sabios Configuration Screen Sabios Configuration SMBIOS SMI Urapper support for Pn Func S h 54h 3 Copar ight 1985 2010 American Megatrends ine PEB 2771VG2A PEB 2781VG2A User s Manual 4 17 BIOS Setup Information Smbios Smi Support SMBIOS SMI Wrapper support for PnP Function 50h 54h The choice Disabled Enabled USB Configuration BIOS SETUP UTILITY USB Configuration Enables support for legacy USB ATO Module Uersion 2 24 5 13 4 option disables legacy support if USB Devices Enabled no USB devices are 1 Keyboard 1 Drive connected USB 2 0 Controller Mode IHiSpeed BIOS EHCI Hand Off Enabled Legacy USB1 1 HC Support Enabled gt USB Mass Storage Device Configuration Legacy USB Support Set to Enabled if you need to use any USB 1 1 2 0 device in the operating system that does not support or have any USB 1 1 2 0 driver installed such as DOS and SCO Unix The choice Disabled Enabled Auto USB 2 0 Controller Mode This setting specifies the operation mode of the onboard USB 2 0 controller The choice FullSpeed HiSpeed PEB 2771VG2A PEB 2781VG2A User s Manual 4 18 BIOS Setup Information BIOS EHCI Han
42. sable Standby Suspend PEB 2771VG2A PEB 2781VG2A User s Manual 4 14 BIOS Setup Information Standby Time out Go into Standby in the specified Time The choice Disable 1 Min 2 Min 4 Min 8 Min 10 Min 20 Min 30 Min 40 Min 50 Min 60 Min Suspend Time out Go into Suspend in the specified Time The choice Disable 1 Min 2 Min 4 Min 8 Min 10 Min 20 Min 30 Min 40 Min 50 Min 60 Min Resume On Ring The choice Disabled Enabled Resume on LAN The choice Disabled Enabled Resume on PME The choice Disabled Enabled Resume On RTC Alarm The choice Disabled Enabled Configure ASF Parameters Select for ASF Support BIOS SETUP UTILITY n ES ve e and Exit PEB 2771VG2A PEB 2781VG2A User s Manual 4 15 BIOS Setup Information ASF Support The choice Disabled Enabled MPS Configuration Configure the Multi Processor Table BIOS SETUP UTILITY SS poavanctea Select MPS 2 wey ision MPS Revision This field allows you to select which MPS Multi Processor Specification version to be used for the operating system You need to select the MPS version supported by your operating system To find out which version to use consult the vendor of your operating system The choice 1 1 1 4 PEB 2771VG2A PEB 2781VG2A User s Manual 4 16 BIOS Setup Information PCI Express Configuration Configure PCI Express Support BIOS SETUP UTILITY PCI Express Configuration Enable Di
43. tures Some of the jumpers are designed to be user configurable allowing for system enhancement The others are for testing purpose only and should not be altered To select any option cover the jumper cap over SHORT or remove NC it from the jumper pins according to the following instructions Here NC stands for Not Connect mE side SCH T JP3 Ja 31200000000000005 JP IOS S Gg 0900000000000 e rA JP6 lo o 00 F e SE 55 000000000 ium 0000000009 o D M o Syy un x Eile 5 00000 s2 0000F JP JP amp 3213 E ANAN JP13 JP11 JP12 o mi S DO l O Le Ee oooon EO Je S 000009099 LI D 0 D B J 9 000000000 0 J28 SA T 3 IT mn ee PEB 2771VG2A PEB 2781VG2A User s Manual 2 1 Hardware Configuration Solder side 2 2 Connector Allocation JA PS 2 Keyboard Mouse Connector 1 6 Pin Wafer 2 0mm D Inverter Power Connector 5 1 Pin Wafer Jo LCD LVDS Connector 15 2 Pin Hirose J4 SATA Power 2 Output Connector 1 4 Pin Wafer 2 5mm J5 SATA Power 1 Output Connector 1 4 Pin Wafer 2 5mm J6 Line OUT Line IN Microphone connector 5 2 1 Pin Header J7 SATA2 Connector J8 SATA1 Connector J9 SATA Power 2 voltage Setup 1 3 Pin Header 2 54mm J11 USB 3 2 Connector 5 2 1 Pin Header 2 0mm J12 USB 4 5 Connector 5 2 1 Pin Header 2 0mm J13 Port 80 Connector 2x5 1 Pin 9 Pin Header 2 54mm J14 TPM Con
44. ute Disable Bit Capability Enabled Hyper Threading Technology Enabled Intel R SpeedStep tm tech Enabled Intel R C STATE tech Enabled Enhanced C States Enabled PEB 2771VG2A PEB 2781VG2A User s Manual 4 3 BIOS Setup Information Max CPUID Value Limit Disabled for Windows XP The choice Disabled Enabled Execute Disable Bit capability When disabled force the XD feature flag to always return 0 The choice Disabled Enabled Hyper Threading Technology Enabled for Windows XP and Linux 2 4 X OS optimized for Hyper Threading Technology and Disabled for other OS OS not optimized for Hyper Threading Technology The choice Enabled Disabled Intel R Speed Step tm Tech Disable Disable GV3 Enable Enable GV3 Intel R C STATE Tech CPU idle is set to C2 C3 CA State Enhanced C States CPU idle is set to Enhanced C States PEB 2771VG2A PEB 2781VG2A User s Manual 4 4 BIOS Setup Information IDE Configuration The IDE Configuration the IDE devices such as hard disk drive or CD ROM drive It uses a separate sub menu to configure each hard disk drive Master and Slave BIOS SETUP UTILITY IDE Configuration L Options Disabled Legacy IDE Channels SATA Pri PATA Sec Compatible Enhanced gt Primary IDE Master Mot Detected gt Primary IDE Slave Not Detected gt Secondary IDE Master Mot Detected gt Secondary IDE Slave Not Detected Third IDE Master Mot Detect

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