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PGR IEEE-1394 Digital Camera Register Reference

1. 924h Max_ Value 0 Maximum gain value in dB 928h Value 0 Current gain value in dB 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m 1bit 8bit 23bit Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 y Scorpion SCOR 20SO 0 0 0 43 v Scorpion SCOR 13FF 0 0 0 45 M Flea ALL 0 0 0 22 v 2 9 7 ABS_VAL_BRIGHTNESS 930h This register provides the user with absolute value control over the brightness register This register stores a 32 bit floating point value with IEEE REAL 4 format The units of this register are in percent The user must write a 1 to bit 1 of the BRIGHTNESS register at offset 800h in order to change the Value field of this register from being read only Format Offset Name Field Bit Description 930h ABS_VAL_BRIGHTNESS Min_Value 0 31 Minimum brightness value in percent 934h Max Value 0 31 Maximum brightness value in percent 938h Value 0 31 Current brightness value in percent 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m 1bit 8bit 23bit Feature Availability Camera Model Sens
2. 44 2 11 2 EXTENDED SHUTTER 1029 44 2 11 3 SOFT ASYNC TRIGGER 1020h RA RA RA ERA 45 2 11 4 BAYER TILE MAPPING Ooa0h 46 211 5 BAYER TILE GAINP1OAAM EE i ee ae Des a ek ek en eed ee eke 46 2 11 6 Y16 DATA FORMAT 1048h ee ee ee Re ee RA RA ee Re ee Re ee Ee 47 2 11 7 AUTO EXPOSURE RANGE 0O89b 48 2 11 8 AUTO SHUTTER RANGE 1098h ee ee ee ee ee ee ee ee ee ee ee 48 2 11 9 AUTO GAIN RANGE 10A0D u uu su uuu RA ee RA ee ee 48 2 11 10 GPIO CONTROL 1100HR 2 a u aaa Re RA RA RA RA Ee 49 21111 GPIO XTRA 1T1OAR u GES ER EE L u EE DER ER SE SR es ee RE ER ees eke ee se eke 49 2 11 12 SHUTTER DELAY 21109 51 2 11 13 GPIO CIR PIN 0 111Oh EE EERS en ER ES ER GR eN SG D ER ee gee 51 2 1144 GPIO XTRA PINOSTEITAR es RE SEGE Se ERG ENE Ge don erin Dedisch 52 2 11 15 GPIO CTRL PIN 1 1120 52 2 11 16 GPIO XTRA PIN 1 UD AR EE RE atte 53 2 11 17 GPIO CTRL PIN 2 1120 53 2 11 18 GPIO XTRA PIN 2 113Ah ee ee RR ee RA RA RA ee Re ee Ee 53 2 11 19 GPIO CTRL PIN 3 ia 54 2 11 20 GPIO XTRA PIN_3 1144h RR ee Re ee Ee 54 2 11 21 BPIO OUTPUTETIEOR SEE u uu u Des l us AE Ke ee Oe RR ES Ee Eed ina 55 2 11 22 PIO INPUT 11F4R 1 ee ee es GE ENE eek GES DEE Te Ee ee ees Dek Se ee Fees e ee Ee 55 2 11 23 PIO DIRECTION 11F h nu susu uu luang a s 56 2
3. Format Offset Name Field Bit Description 180h V MODE INO O Mode 0 0 160x120 YUV 4 4 4 Mode 24bit pixel Format 0 Mode 1 1 320x240 YUV 4 2 2 Mode 16bit pixel Mode _2 2 640x480 YUV 4 1 1 Mode 12bit pixel Mode 3 3 640x480 YUV 4 2 2 Mode 16bit pixel Mode_4 4 640x480 RGB Mode 24bit pixel Mode_5 5 640x480 Y8 Mono Mode 8bit pixel Mode_6 6 640x480 Y16 Mono16 Mode 1 6bit pixel 7 31 Reserved 184h V MODE INO 1 Mode 0 0 800x600 YUV 4 2 2 Mode 16bit pixel Format 1 Mode 1 1 800x600 RGB Mode 24bit pixel Mode_2 2 800x600 Y Mono Mode 8bit pixel Mode 3 3 1024x768 YUV 4 2 2 Mode 16bit pixel Mode_4 4 1024x768 RGB Mode 24bit pixel Mode_5 5 1024X768 Y MONO MODE 8BIT PIXEL Mode 6 6 800x600 Y Mono16 Mode 16bit pixel Mode 7 7 1024x768 Y Mono16 Mode 1 6bit pixel 8 31 Reserved 188h V MODE INO 2 Mode 0 0 1280x960 YUV 4 2 2 Mode 16bit pixel Format 2 Mode 1 1 1280x960 RGB Mode 24bit pixel Mode_2 2 1280x960 Y Mono Mode 8bit pixel Mode_3 3 1600x1200 YUV 4 2 2 Mode 16bit pixel Mode_4 4 1600X1200 RGB MODE 24BIT PIXEL Mode_5 5 1600x1200 Y Mono Mode 8bit pixel Mode_6 6 1280x960 Y Mono16 Mode 16bit pixel Mode 7 7 1600X 1200 Y Mono16 Mode 16bit pixel 8 31 Reserved 18Ch Reserved 197h 19Ch
4. 1 30fps 320h 0 001s 0 0000416s unit 24 18h Enter 18h in the Value field of 1244h to offset that camera s synchronization by Ims Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Scorpion ALL Not implemented Use TRIGGER_DELAY 834h v1 31 when in Flea ALL Not implemented 2 11 26 FRAME TIMESTAMP 12F8h This register allows the user to control whether or not the image timestamp is displayed The timestamp is located in the first 4 pixels of the image and matches the CYCLE_TIME register format as follows Revised 19 Feb 04 Copyright c 2003 58 PGR IEEE 1394 Digital Camera Register Reference second_count 128 1s Intervals 125us intervals cycle_offset 3071 cycle_count 7999 13 bits 12 bits 24 576MHz Clock Users using color cameras and doing Bayer color processing on the PC must extract the value from the non color processed image in order for the data to be valid Format Field Presence_Inq Description Presence of this feature 0 N A 1 Available 1 30 Reserved Insert_Timestamp 31 Display timestamp 0 Off 1 On Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Scorpion ALL v Data written into image pixels encompasses additional information beyond the timestamp See the Scorpion Technical Reference Ma
5. V MODE INO 7 Mode 0 0 Format_7 Mode_0 Format 7 Mode 1 1 Format 7 Mode 1 Mode 2 2 Format_7 Mode 2 Mode 3 3 Format 7 Mode 3 Mode 4 4 Format_7 Mode_4 Mode_5 5 Format_7 Mode_5 Mode_6 6 Format 7 Mode 6 Mode 7 7 Format_7 Mode_7 8 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V These registers are supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 9 PGR IEEE 1394 Digital Camera Register Reference 2 3 3 Video Frame Rate Inquiry Registers This set of registers allows the user to query the camera for available frame rates for all Formats and Modes Format Offset Name Field Bit Description 200h V_RATE_INQ_0_0 FrameRate_0 0 Reserved Format 0 Mode 0 FrameRate_1 1 Reserved FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 204h V RATE INO 0_1 FrameRate_0 0 Reserved Format 0 Mode 1 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 208h V RATE INO 0 2 FrameRate_0 0 Reserved Format 0 Mode 2 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 20Ch V_RATE_INQ_0_3 FrameRate_0 0 Reserved Format 0 Mode 3 FrameRate_1 1 3 75fp
6. Field Bit Description ISO_EN Continuous 0 1 Start ISO transmission of video data Shot 0 Stop ISO transmission of video data Continuous Shot is not enabled 1 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v This register is supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 19 PGR IEEE 1394 Digital Camera Register Reference 2 7 7 ONE_SHOT MULTI SHOT 61Ch This register allows the user to control single and multi shot functionality of the camera During ISO_EN 1 or One_Shot 1 or Multi Shot 1 the register value which reflects the Isochronous packet format cannot change Data transfer control priority is ISO_EN gt One Shot gt Multi Shot Format Field Bit Description One_Shot 0 1 only one frame of video data is transmitted Multi_Shot 1 Self cleared after transmission Ignored if ISO_EN 1 1 N frames of video data is transmitted Self cleared after transmission Ignored if ISO_EN 1 or One Shot 1 2 15 Reserved Count Number 16 31 Count number for Multi shot function Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Scorpion SCOR 13SM 0 0 0 33 M Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 y Scorpion SCOR 03NS 0 0 1 35 Not implemented
7. PGR IEEE 1394 Digital Camera Register Reference 2 9 Absolute Value CSR Registers Many PGR IEEE 1394 cameras implement absolute modes for various camera settings that report real world values such as Shutter times in seconds s and Gain values in decibels dB Using the absolute values contained in the following registers is easier and more efficient than applying complex conversion formulas to the information in the Value field of the associated Control and Status Register In addition these conversion formulas can change between firmware versions PGR therefore recommends using the absolute registers to determine camera values 2 9 1 Inquiry Registers for Absolute Value CSR Offset Address The following set of registers indicates the locations of the absolute value CSR registers that are implemented by PGR IEEE 1394 cameras These offsets are all relative to the initial register space which is offset from the base address by OxFFFF F000 0000 Offset Name Bit Description 700h ABS_CSR_HI INQ_0 0 31 Quadlet offset for the absolute value CSR for Brightness 704h ABS CSR HI INO 1 0 331 Quadlet offset for the absolute value CSR for Auto Exposure 708h ABS_CSR_HI INO 2 0 331 Quadlet offset for the absolute value CSR for Sharpness 70Ch ABS CSR HI INO 3 0 31 Quadlet offset for the absolute value CSR for White Balance 714h ABS CSR HI INO 5 0 31 Quadlet offset for the absolute value C
8. Serial Input output control Strobe_Output 3 Strobe signal output 4 31 Reserved 410h 47Fh Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL These registers are supported on all PGR TEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 14 PGR IEEE 1394 Digital Camera Register Reference 2 6 Inquiry Registers for Feature Elements The following registers show the presence of specific features modes and minimum and maximum values for each of the DCAM compliant camera features or optional functions implemented by the camera see the section Inquiry Registers for Feature Presence 0 Not Available 1 Available Format Offset Name Field Bit Description 500h BRIGHTNESS_INQ Presence_Inq 9 Presence of this feature Abs_Control_Inq Absolute value control 2 Reserved One_Push_Inq 3 One push auto mode controlled automatically by camera only once ReadOut Ing 4 Ability to read the value of this feature On_Off_Ing 5 Ability to switch feature ON and OFF Auto_Ing 6 Auto mode controlled automatically by camera Manual Ing 7 Manual mode controlled by user Min_Value 8 19 Minimum value for this feature control Max Value 20 31 Maximum value for this feature control 504h AUTO_EXPOSURE_INQ Same format as th
9. c 2003 22 PGR IEEE 1394 Digital Camera Register Reference 2 8 1 BRIGHTNESS 800h Allows the user to control the brightness of the image It basically allows setting the black level intensity Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is read only 2 4 Reserved One_Push 5 One push auto mode controlled automatically by camera only once Write 1 Begin to work self cleared after operation Read 0 Not in operation 1 In operation If A_M_Mode 1 this bit is ignored ON_OFF 6 Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only Note that this field is read only A_M_ Mode 7 Read read a current mode 0 Manual 1 Automatic Note that this field is read only 8 19 Reserved Value 20 31 Value A write to this value in Auto mode will be ignored Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 V The Value field specifies the black level using 1 16 pixel units supporting a range of black 0 0 to black 15 94 255 This register corresponds to the A D converter s clamp level register Scorpion SCOR 13SM 0 0 0 33 v The brightness CSR value is directly written
10. 0 15 GPIO MODE 3 Delay before the start of the pulse GPIO_MODE_4 Low period of PWM output pulse Mode_Specific_2 16 31 GPIO MODE 3 Duration of the pulse GPIO MODE 4 Low period of PWM output pulse Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Units are ticks of a 49 152MHz clock Scorpion SCOR 03SO 0 0 0 45 v Units are 1 16th of a shutter line Scorpion SCOR 03NS 0 0 1 35 y Flea ALL 0 0 0 22 v Units are ticks of a 1 024MHz clock 2 11 17 GPIO CTRL PIN 2 1130h This register provides control over the third GPIO pin Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 11 Reserved Pin_Mode 12 15 Current Mode 0 Input 1 Output 2 Asynchronous trigger 3 Strobe 4 Pulse width modulation PWM 8 Output DCAM Specification v1 31 compliant cameras only Data 16 31 Data field GPIO MODE 0 bit 31 contains value GPIO MODE 1 bit 31 contains value GPIO MODE 2 0 on falling edge 1 on rising edge GPIO MODE 4 uses bits 16 27 only for number of pulses bits 28 31 must be zero Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL v Default GPIO MODE 0 2 11 18 GPIO XTRA PIN 2 1134h This register contains mode specific data for the third GPIO pin Format Revised 19 Feb 04 Copyright c 2003 53 PGR IEEE
11. 1394 Digital Camera Register Reference Field Bit Description Mode Specific 1 0 15 GPIO MODE 3 Delay before the start of the pulse GPIO MODE 4 Low period of PWM output pulse Mode_Specific_2 16 31 GPIO_MODE_3 Duration of the pulse GPIO_MODE_4 Low period of PWM output pulse Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Units are ticks of a 49 152MHz clock Scorpion SCOR 03SO 0 0 0 45 M Units are 1 16th of a shutter line Scorpion SCOR 03NS 0 0 1 35 v Flea ALL 0 0 0 22 V Units are ticks of a 1 024MHz clock 2 11 19 GPIO CTRL PIN 3 1140h This register provides control over the fourth GPIO pin Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 11 Reserved Pin_Mode 12 15 Current Mode 0 Input 1 Output 2 Asynchronous trigger 3 Strobe 4 Pulse width modulation PWM 8 Output DCAM Specification v1 31 compliant cameras only Data 16 31 Data field GPIO MODE 0 bit 31 contains value GPIO MODE 1 bit 31 contains value GPIO MODE 2 0 on falling edge 1 on rising edge GPIO MODE 4 uses bits 16 27 only for number of pulses bits 28 31 must be zero Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 V Must be physically implemented to work See Technical Reference Manual Default GPIO_MODE_0 Sc
12. 19 Feb 04 Copyright c 2003 49 PGR IEEE 1394 Digital Camera Register Reference a Strobe delay set in GPIO XTRA PIN x register Mode_Specific_1 field b Strobe duration set in GPIO XTRA DIN x register Mode_Specific_2 field c Shutter delay set in SHUTTER_DELAY register Shutter_Delay field This allows the strobe signal delay duration and shutter delay to be extended DRAGONFLY ONLY The strobe can be extended beyond the 65 535 ticks of the 49 152MHz clock allowable in the GPIO XTRA PIN SHUTTER DELAY registers according to the following formula New duration or delay 16 bit field value Strobe_Multiplier 1 For example to extend the length of the strobe from 1 33ms Mode Specific 2 FFFFh to 21 20ms enter F in the Strobe Multiplier field To extend the shutter delay from 1 33ms Shutter_Delay FFFFh to 4 0ms enter 2 in the Strobe_Multiplier field Format Field Bit Description Strobe_Start 0 Current Mode 0 Strobe start is relative to start of integration 1 Strobe start is relative to external trigger Trigger_Queue 1 Current Mode 0 Trigger sent during integration is queued 1 Trigger sent during integration is dropped 2 23 Reserved Strobe_Multiplier 24 31 Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion SCOR 03NS 0 0 1 35 M Trigger_Queue only Scorpion SCOR 03SO 0 0 0 45 V Strobe
13. 22 multiple camera automatic synchronization offset synchronization 57 P parallel input output DCAM v1 31 65 PIO See parallel input output DCAM v1 31 pulse width modulation PWM mode 66 R reset camera to default settings 7 s saturation 27 SCOR 13FF global shutter mode 33 36 37 sharpness 25 shutter 27 absolute value 36 relation to frame rate 28 skip frames trigger mode See Trigger Mode 3 software asynchronous trigger 45 standard external trigger mode See Trigger Mode 0 strobe DCAM v1 31 65 T technical support resources contacting a support representative 71 creating a Customer Login Account 71 knowledge base 71 on the Internet 71 trigger modes 65 69 trigger polarity 31 Trigger Mode 0 69 Trigger Mode 1 69 Trigger Mode 3 70 V value field for CSR registers 22 Ww white balance controlling relative Bayer Tile gain 25 controlling using Bayer Tile Gain register 25 Y Y16 image data format 47 Revised 19 Feb 04 Copyright c 2003
14. 31 Value A write to this value in Auto mode will be ignored Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V This register is supported on all PGR IEEE 1394 DCAM cameras 2 8 3 SHARPNESS 808h This register provides a mechanism to control a sharpening filter applied to the image on the camera before it is transmitted to the PC Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly 21213 Not implemented Scorpion ALL TI Not implemented Ha am 0 0022 _ _ Notimplemented 2 8 4 WHITE_BALANCE 80Ch This register controls the relative gain of pixels in the Bayer tiling used in the CCD of a color camera Control of the register is achieved via the R_Value and B_Value fields and the On Of bit Both value fields specify relative gain with a value that is half the maximum value being a relative gain of zero This register has two states e OFF the same gain is applied to all pixels in the Bayer tiling e ON the R_Value field is applied to the red pixels of the Bayer tiling and the B_Value field is applied to the blue pixels of the Bayer tiling The following table illustrates the default gain settings for most cameras Red Green Blue Black and White 32 32 32 Color 50 22 50 Note The Bayer_Tile_Gain register offset 1044h provides an altern
15. Start defaults to time of trigger when in asynchronous trigger mode Strobe_Multiplier deprecated Recommend using GPIO XTRA PIN x only Scorpion SCOR 20SO 0 0 0 43 v Strobe_Start defaults to time of trigger when in asynchronous trigger mode Strobe_Multiplier deprecated Recommend using GPIO_XTRA_PIN_ x only Flea ALL 0 0 0 22 v Strobe_Start defaults to time of trigger when in asynchronous trigger mode Strobe_Multiplier deprecated Recommend using GPIO_XTRA_PIN_x only Revised 19 Feb 04 Copyright c 2003 50 PGR IEEE 1394 Digital Camera Register Reference 2 11 12 SHUTTER DELAY 1108h This register provides control over the time delay between an external trigger and the start of integration shutter open Format Field Bit Description 0 15 Reserved Shutter_Delay 16 31 Delay before the start of integration Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 V Delay is in ticks of a 49 152MHz clock To extend the duration of this delay use the Strobe_Multiplier defined in the GPIO_XTRA register Scorpion SCOR 03NS 0 0 1 35 Not implemented Flea ALL 0 0 0 22 V Deprecated Recommend using register 834h TRIGGER_DELA Y register 2 11 13 GPIO CTRL PIN 0 1110h This register provides control over the first GPIO pin Pin 0 Format Field Bit Description Presence Ing 0 Presence
16. TRIGGER DELAY Scorpion SCOR 20SO 0 0 0 43 v Delay is in units of a 24 576MHz clock Less than 1024 ticks is linear greater than 1024 ticks is non linear Recommend using register 950h ABS_VAL_TRIGGER_DELAY Flea ALL 0 0 0 22 v Delay is in units of a 24 576MHz clock Less than 1024 ticks is linear greater than 1024 ticks is non linear Recommend using register 950h ABS_VAL_TRIGGER_DELAY 2 8 14 FRAME RATE 83Ch v1 31 This register provides control over the frame rate of the camera The actual frame interval time between individual image acquisitions is fixed by the frame rate value When this feature is ON exposure time is limited by the frame rate value dynamically The available frame rate range depends on the current video format and or video mode Revised 19 Feb 04 Copyright c 2003 32 PGR IEEE 1394 Digital Camera Register Reference Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented See FRAME_TIME 1240h Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 y Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 M Scorpion SCOR 13FF 0 0 0 45 v Turn FRAME_RATE to OFF to put SCOR 13FF into global shutter mode default mode is rolling shutter Flea ALL 0 0 0 22 M Revised 19 Feb 04 Copyright c 2003 33
17. by Alpha users source code documentation will be complete and memory leaks and other similar problems will be solved These releases will be Revised 19 Feb 04 Copyright c 2003 74 PGR IEEE 1394 Digital Camera Register Reference made public They will be posted to the web pages in a category separate from Release Candidates and Releases Again software that meets the Beta standard is designed for knowledgeable users 8 1 4 Release Candidate The only difference between software that meets the Release Candidate standard and software that meets the Release standard will be the amount of testing and the delivery mechanism Release Candidates will be fully supported and posted to the web pages but not burned to CDs they will be designed for use by new users 8 1 5 Release Software will only meet the Release standard when it is burned to CD and shipped with new Camera systems Similar to Release Candidate users users of Release software can expect fully functional libraries examples and installation scripts Revised 19 Feb 04 Copyright c 2003 75 PGR IEEE 1394 Digital Camera Register Reference 9 Index 1 1394 base address offset 34 1394 b capability determining 13 16 bit per pixel mono data format See Y16 image data format A asynchronous trigger mode 66 auto exposure absolute value 35 algorithm overview 24 auto exposure range 48 auto gain range 48 auto shutter range 48 limitations 24 states 24 B
18. ee ee ee ee ee ee ee ee ee ee ee ee 19 2 7 7 ONE SHOT MULTI SHOT eich 20 2 7 8 SOFTWARE TRIGGER 62Ch vi 211 20 2 7 9 DATA DEPTH 630h wi 21 21 2 8 Control and Status Registers for Features eseseeseeereeeeerreerreerre enn 22 2 8 1 BRIGHTNESS 800R ee ee ee ee ee RA ui ee RA ee ee AR PARE naa ee Ee 23 282 AUTO EXPOSURE 804R EE ESEG ENS GEN GESE E GEE ee Ee BU Ge ee ES EN GR seve geed ee ee 24 28 37 SHARPNESS DOE se Der LS Aere huahua assia tenes qasa 25 2 8 4 WHITE BALANCE 80Ch a 25 PA N HUES Me z uuu nus nu has asa OE EN ME ER ER AE 27 2 8 6 SATURATION 814R alnus RA ee eraka ee ee Ee 27 287 GAMMAFBITARE SE SEE pu uuu m Ge suu ee seed 27 2 88 SHUTTER 81Ch ie see bep u ee ese en dee ee ED beg Roe Ge ke DE Ee GER Ee ER tatu ED GE 27 28 9 S T N IS 720 GEES un e eeh Shia DE EG at aad Tua 29 SKOEN ale RE RE EE EE bsa sas 30 2811 FOGUS B28h ESEG EE ER n RS GE ER ciel sbi Wedded 30 2 8 12 TRIGGER MODE B3Oh USD Susu llusi ass 31 2 8 13 TRIGGER DELAY 834h vi 21 32 2 8 14 FRAME RATE 83Ch v1 31 iese ee ese ee ee ese ee ee ee ee ee eed ee ee ee Re ee ee ee ee Ee 32 2 9 Absolute Value CSR Heotsterg se ee RA Ge AA ee ee AA ee ee ee 34 2 9 1 Inquiry Registers for Absolute Value CSR Offset Address 34 2 9 2 Units of Value for Absolute Value CSR Registers 34 2 9 3 Calculating Absolute
19. into the sensor black level control register 0x19 Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 M Scorpion SCOR 03NS 0 0 1 35 M Scorpion SCOR 13FF 0 0 0 45 v Flea ALL 0 0 0 22 y Revised 19 Feb 04 Copyright c 2003 23 PGR IEEE 1394 Digital Camera Register Reference 2 8 2 AUTO_EXPOSURE 804h This register allows the user to control the camera system s automatic exposure algorithm Ithas three useful states Manual Exposure Control State Description Off Control of the exposure is achieved via setting both the SHUTTER and GAIN registers This mode is achieved by setting the ON_OFF field to be 0 An equivalent mode can be achieved by setting the A AM Mode fields in the SHUTTER and GAIN registers to 0 Manual ON The camera automatically modifies the SHUTTER and GAIN registers to try and match the average image intensity to the value written to the Value field This mode is achieved by setting the A_M_Mode value of the AUTO_EXPOSURE register to 0 manual and either both of the A A Mode values for the SHUTTER and GAIN registers to 1 Auto ON Auto Exposure Control The camera modifies the Value field in order to produce an image that is visually pleasing This mode is achieved by setting the A M MODE for all three of the AUTO_EXPOSURE SHUTTER and GAIN registers to 1 Auto In this mode the Value field reflects the average image intensity Auto exposure can
20. of this feature 0 N A 1 Available 1 11 Reserved Pin_Mode 12 15 Current Mode 0 Input 1 Output 2 Asynchronous trigger 3 Strobe 4 Pulse width modulation PWM 8 Output DCAM Specification v1 31 compliant cameras only Data 16 31 Data field GPIO_MODE_0 bit 31 contains value GPIO MODE 1 bit 31 contains value GPIO MODE 2 0 on falling edge 1 on rising edge GPIO MODE 4 uses bits 16 27 only for number of pulses bits 28 31 must be zero Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Default GPIO_MODE_0 Scorpion SCOR 13SM 0 0 0 33 v Default GPIO_MODE_2 Scorpion SCOR 03NS 0 0 1 35 v Default GPIO MODE 2 Scorpion SCOR 03SO 0 0 0 45 v Default GPIO_MODE_2 Scorpion SCOR 20SO 0 0 0 43 v Default GPIO_MODE_0 Scorpion SCOR 13FF 0 0 0 45 v Default GPIO MODE 2 Revised 19 Feb 04 Copyright c 2003 51 PGR IEEE 1394 Digital Camera Register Reference Flea ALL 0 0 0 22 v Default GPIO MODE 0 2 11 14 GPIO XTRA PIN 0 1114h This register contains mode specific data for the first GPIO pin Pin 0 Format Field Bit Description Mode Specific 1 0 15 GPIO MODE 3 Delay before the start of the pulse GPIO MODE 4 Low period of PWM output pulse Mode Specific 2 16 31 GPIO_MODE_3 Duration of the pulse GPIO MODE 4 Low period of PWM output pulse
21. the following way 0 gt 0x02 1 gt 0x03 2 gt 0x04 3 gt 0x05 4 gt 0x06 5 gt 0x07 6 gt 0x0E 7 gt 0x14 8 gt 0x1B 9 gt 0x15 10 gt 0x3B 11 gt 0x35 12 gt 0x36 13 gt 0x37 14 gt 0x3D 15 gt 0x3E 16 gt OF 2 8 10 IRIS 824h This register provides a mechanism to control the iris on cameras that support lenses with an automatic or motorized aperture Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL Not implemented 2 8 11 FOCUS 828h This register provides a mechanism to control the focus on cameras that support lenses with an automatic or motorized focus Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL Not implemented Revised 19 Feb 04 Copyright c 2003 30 PGR IEEE 1394 Digital Camera Register Reference 2 8 12 TRIGGER MODE 830h This register controls the trigger mode Control of the register is via the On Off bit and the Trigger Mode and Parameter fields The Trigger_Polarity bit can be used to invert the polarity of all trigger signals Polarities default to active low Writing a 1 to this bit would therefore set all trigger polarities to be active high The Trigger_Queue field in the GPIO_XTRA register 1104h can be used t
22. tile Bayer_Sense _D 25 31 ASCII representation of the first letter of the color of pixel 1 1 in the Bayer tile Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL v 2 11 5 BAYER TILE GAIN 1044h Allows the user to specify all four Bayer tile pixel gains The ordering matches that of the BAYER_TILE_MAPPING register offset 1040h and the units match those of the WHITE_BALANCE register offset 80Ch Any write to this register will set the On Off bit of the WHITE BALANCE register Format Field Bit Description Bayer_Gain_A 0 7 Gain for pixel 0 0 in the Bayer tile Bayer_Gain_B 8 15 Gain for pixel 0 1 in the Bayer tile Bayer_Gain_C 16 24 Gain for pixel 1 0 in the Bayer tile Bayer_Gain_D 25 31 Gain for pixel 1 1 in the Bayer tile Feature Availability Camera Model Sensor Firmware Avail Notes Revised 19 Feb 04 Copyright c 2003 46 PGR IEEE 1394 Digital Camera Register Reference Dragonfly ALL 2 1 2 13 v The default value for all fields is 32 the range is 0 63 Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Flea ALL 0 0 0 22 Not implemented 2 11 6 Y16 DATA FORM
23. 000sec Format Field Bit Description Revised 19 Feb 04 Copyright c 2003 44 PGR IEEE 1394 Digital Camera Register Reference Presence Ing 0 Presence of this feature 0 N A 1 Available 1 12 Reserved Shutter Mode 13 15 0 30Hz default 1 32Hz 2 extended shutter 3 50Hz 4 24Hz 16 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 V Scorpion SCOR 03SO 0 0 0 45 Not implemented Turn FRAME_RATE register OFF to enable extended shutter Scorpion SCOR 20SO 0 0 0 43 Not implemented Turn FRAME_RATE register OFF to enable extended shutter Scorpion SCOR 13FF 0 0 0 45 y Flea ALL 0 0 0 22 Not implemented Turn FRAME_RATE register OFF to enable extended shutter 2 11 3 SOFT_ASYNC_TRIGGER 102Ch Provides a software method for generating an asynchronous trigger event When the camera is in Trigger_Mode_0 writing a zero to bit 31 of this register will generate an asynchronous trigger Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 29 Reserved Trigger 30 31 Write 0 generate trigger Read 0 camera is not ready to be triggered integration is complete but camera is transferring image data 1 camera is ready to be trig
24. 0SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Flea ALL 0 0 0 22 M 2 11 23 PIO DIRECTION 11F8h If the Ox Mode bit is asserted write a 1 this means the GPIO pin is currently configured as an output and the Pin Mode of the GPIO pin see the GPIO CTRL DIN x register is GPIO Mode 8 Otherwise the Pin Mode will be GPIO Mode 0 Input The PIO DIRECTION register is writeable only when the current GPIO Mode is GPIO Mode 0 or GPIO Mode 8 See the section GPIO Control Using DCAM v1 31 Functionality Format Field Bit Description IO0_Mode 0 Current mode of GPIO Pin 0 0 Other 1 Output IO1_Mode 1 Current mode of GPIO Pin 1 0 Other 1 Output 102_Mode 2 Current mode of GPIO Pin 2 0 Other 1 Output 103_Mode 3 Current mode of GPIO Pin 3 0 Other 1 Output 4 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 v Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Flea ALL 0 0 0 22 y Revised 19 Feb 04 Copyright c 2003 56 PGR IEEE 1394 Digital Camera Register Reference 2 11 24 FRAME TIME 1240h This register provides control over frame r
25. 1 1 3 75fps FrameRate_2 2 7 5fps FrameRate 3 3 15fps 4 31 Reserved 24Ch V RATE INO 2 3 FrameRate 0 0 1 875fps Format 2 Mode 3 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps 3 31 Reserved 250h V RATE INO 2 4 FrameRate 0 0 1 875fps Format 2 Mode 4 FrameRate_1 1 3 75 fps 3 31 Reserved 254h V_RATE_INQ 2 5 FrameRate 0 0 1 875fps Format 2 Mode 5 FrameRate_1 1 3 75 fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps 4 31 Reserved 258h V_RATE_INQ 2 6 FrameRate 0 0 1 875fps Format 2 Mode 6 FrameRate_1 1 3 75 fps FrameRate_2 2 7 5fps 3 31 Reserved 25Ch V RATE INO 2 7 FrameRate 0 0 1 875fps Format 2 Mode 7 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps 3 31 Reserved 260h Reserved 2BFh 2E0h V_CSR_INQ 7 0 Mode_0 0 31 CSR quadlet offset for Format_7 Mode_0 2E4h V_CSR_INQ 7_1 Mode 1 0 31 CSR quadlet offset for Format 7 Mode 1 2E8h V CSR INO 7 2 Mode 2 0 31 CSR quadlet offset for Format_7 Mode 2 2ECh V_CSR_INQ 7 3 Mode_3 0 31 CSR quadlet offset for Format_7 Mode_3 2FOh V_CSR_INQ 7 4 Mode_4 0 31 CSR quadlet offset for Format_7 Mode_4 2F4h V CSR INO 7 5 Mode 5 0 31 CSR quadlet offset for Format 7 Mode 5 2F8h V CSR INO 7 6 Mode 6 0 31 CSR quadlet offset for Format_7 Mode 6 2FCh V_CSR_INQ 7 7 Mode_7 0 31 CSR quadlet offset for Format_7 Mode_7 Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL AL
26. 11 24 FRAME TIME 12400 issie SR u n Sau ua EAR eie 57 2 11 25 FRAME SYNC OFFSET 1244h ee ee ee ee ee ee ee ee ee ee ee ee 57 2 11 26 FRAME TIMESTAMP 12F h ees ee esse ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee ee 58 21127 XMP FALUR E TEG Sies eg ee A Bees ies de dee be ek erie he Pees qasa 59 2 11 28 SERIAL NUMBER 2E2Oh see ese ee ee ee ee ee ee ee ee Re ee ee RA ee Re ee ee Ee 59 2 11 29 BUILD TIMESTAMP 1F40h ee Re ee Re ee ee ee ee ee 60 2 11 30 FIRMWARE VERSION 1F60h ee ee ee ee ee ee Re ee ee ee ee Re 60 2 11 31 FIRMWARE BUILD DATE 1F64h ee ee ee ee ee ee ee ee ee ee 60 2 11 32 FIRMWARE DESCRIPTION 1F68 1F7Ch 61 3 Isochronous Packet Format 62 3 1 Isochronous Packet Format for Format_0 Format 1 and Format 2 62 3 1 1 sochronous Bandwidth Heouirements AAA 62 3 2 Isochronous Packet Format for Format 7 Partial Image Size Format 64 4 General Purpose Input Output 65 41 GPIOMode ii ER EE Ed n a EO DE ee ee ah ed Ee ine 65 4 1 1 GPIO Mode O Input EE EER SE eens EK ER Se Ee GEGEE SERE Ee Ee Ge die Se ee dee gee ee eek 65 4 12 GPO Mode EIERE EES Es DER A eege eet een Denge 66 4 1 3 GPIO Mode 2 Asynchronous External Tri
27. 36q 768q 384q 192q 96q 48q 6 800x600 Y 32 20H 16 10H 8 5H 4 5 2H 2 5 4H 5 8H 5 16H Mono16 16000p 8000p 4000p 2000p 1000p 500p 250p 16bit pixel 8000q 4000q 2000a 1000q 500q 250q 125q I 1024x768 Y 32 12H 16 6H 8 3H 4 3 2H 2 3 4H 3 8H 3 16H Mono16 12288p 6144p 3072p 1536p 768p 384p 192p 16bit pixel 6144q 3072q 1536q 768g 384g 192g 96q Revised 19 Feb 04 Copyright c 2003 63 PGR IEEE 1394 Digital Camera Register Reference Format_2 Mode Video Format 120fps 60fps 30fps 15fps 7 5fps 3 75fps 1 875fps 0 1280x960 32 8H 16 4H 8 2H 4 1H 2 1 2H 1 4H YUV 4 2 2 10240p 5120p 2560p 1280p 640p 320p 16bit pixel 5120q 2560q 1280q 640q 320q 160q 1 1280x960 RGB 32 SH 16 4H 8 2H 4 1H 2 1 2H 1 4H 24bit pixel 10240p 5120p 2560p 1280p 640p 320p 7680g 3840g 1920q 960g 480g 240g 2 1280x960 Y 32 16H 16 8H 8 4H 4 2H 2 1H 1 2H 1 4H Mono 20480p 10240p 5120p 2560p 1280p 640p 320p Sbit pixel 5120q 2560q 1280q 640q 320q 160q 80q 3 1600x1200 32 10H 16 5H 8 5 2H 4 5 4H 2 5 8H 5 16H YUV 4 2 2 16000p 8000p 4000p 2000p 1000p 500p 16bit pixel 8000q 4000q 2000q 1000q 500q 250q 4 1600x1200 RGB 32 5H 16 5 2H 8 5 4H 4 5 8H 2 5 16H 24bit pixel 8000p 4000p 2000p 1000p 500p 6000q 3000q 1500q 750g 375g 5 1600x1200 Y 32 20H 16 10H 8 5H 4 5 2H 2 5 4H 5 8H 5 16H Mono 32000p 16000p 8000p 4000p 2000p 1000p 500p 8bit pixel 8000g 4000q 2000g 1000g 500g 250g 125g 6 1280x960 Y 32 S
28. 94 Digital Camera Register Reference 4 General Purpose Input Output This section describes the general purpose input output GPIO functionality implemented on PGR IEEE 1394 cameras equipped with GPIO pins see individual camera Technical Reference Manual for GPIO pin information Historically PGR IEEE 1394 cameras that have implemented GPIO functionality e g Dragonfly have done so using the advanced GPIO CTRL PIN x and GPIO XTRA PIN x registers 1100h to 1144h in conjunction with the GPIO Modes outlined below However with the addition of similar GPIO functionality to the IDC 1394 based Digital Camera DCAM Specification Version v1 31 many PGR camera models are currently changing to also support the newly defined trigger parallel input output PIO serial input output SIO and strobe functionality outlined in version 1 31 of the DCAM Therefore while all PGR cameras support the PGR specific GPIO modes some cameras will also support the DCAM v1 31 specific input output modes NOTE To determine whether your camera model supports the new DCAM v1 31 trigger functionality 1 Check the Feature Availability table for the relevant feature or 2 Query the camera s Opt_Function_Ing register 40Ch 4 1 PGR Specific GPIO Modes The following modes are PGR specific GPIO modes used exclusively with the GPIO_CTRL_PIN_x registers All PGR IEEE 1394 digital cameras that are equipped with GPIO connectors currently support t
29. AT 1048h This register allows the user to specify the image data format for Y16 images either IDC 1394 DCAM compliant mode default or PGR specific Intel compatible mode IIDC 1394 DCAM mode Description Data Format Actual bit depth 10bpp Bit alignment MSB Byte alignment Big endian 0 7 8 15 High Byte Low Byte PGR specific mode Description Data Format This format is reversed from that described in the IEEE 1394 DCAM 0 7 8 15 10XXXXXX 98765432 specification Format Field Bit Description Presence_Inq 0 Presence of this feature 0 N A 1 Available 1 30 Reserved 31 Value 0 DCAM compliant mode default 1 PGR specific mode Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Scorpion SCOR 13SM 0 0 0 33 M Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 M Scorpion SCOR 13FF 0 0 0 45 Not implemented Flea ALL 0 0 0 22 v Revised 19 Feb 04 Copyright c 2003 47 PGR IEEE 1394 Digital Camera Register Reference 2 11 7 AUTO EXPOSURE RANGE 1088h Specifies the range of allowed exposure values to be used by the automatic exposure controller when in auto mode Format Field Bit Description Presence Ing 0 Presence of this featur
30. Base address 6 Base address offset 6 Bayer tile gain 46 Bayer tile mapping 46 black level intensity control See brightness control brightness absolute value 37 brightness control 23 bulb shutter trigger mode See Trigger Mode 1 C current frame rate 17 varies with extended shutter 17 current video format 18 current video mode 17 D DCAM See IIDC 1394 based Digital Camera DCAM Specification delay between external trigger and shutter 51 E extended shutter maximum shutter values 44 external trigger mode See asynchronous trigger mode externally trigger camera using DCAM v1 31 PIO and strobe modes 65 using PGR specific GPIO modes 65 F failed frame transmission count 59 feature availability table 5 firmware version numbering scheme 73 focus 30 33 frame rate control custom frame rates 57 via frame time 57 G gain 29 absolute value 36 control of A D converter gain 29 states 29 gamma 27 absolute value 38 general purpose I O control 49 strobe multiplier 49 strobe start control 49 trigger queue behaviour 49 H hue 27 IIDC 1394 based Digital Camera DCAM Specification 4 image timestamp mechanism 58 integration time See shutter iris 30 isochronous channel and speed 18 Revised 19 Feb 04 Copyright c 2003 76 PGR IEEE 1394 Digital Camera Register Reference isochronous data bandwidth requirements 62 isochronous data packet format 62 64 isochronous data transmission 62 M mode control of CSR registers
31. Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Units are ticks of a 49 152MHz clock Scorpion SCOR 03SO 0 0 0 45 v Units are 1 16th of a shutter line Scorpion SCOR 03NS 0 0 1 35 M Flea ALL 0 0 0 22 vi Units are ticks of a 1 024MHz clock 2 11 15 GPIO CTRL PIN 1 1120h This register provides control over the second GPIO pin Pin 1 Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 11 Reserved Pin_Mode 12 15 Current Mode 0 Input 1 Output 2 Asynchronous trigger 3 Strobe 4 Pulse width modulation PWM 8 Output DCAM Specification v1 31 compliant cameras only Data 16 31 Data field GPIO MODE 0 bit 31 contains value GPIO MODE 1 bit 31 contains value GPIO MODE 2 0 on falling edge 1 on rising edge GPIO MODE 4 uses bits 16 27 only for number of pulses bits 28 31 must be zero Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Default GPIO_MODE_3 Scorpion ALL M Default GPIO MODE 0 Flea ALL 0 0 0 22 v Default GPIO MODE 8 Revised 19 Feb 04 Copyright c 2003 52 PGR IEEE 1394 Digital Camera Register Reference 2 11 16 GPIO XTRA PIN 1 1124h This register contains mode specific data for the second GPIO pin Pin 1 Format Field Bit Description Mode_Specific_1
32. H 16 4H 8 2H 4 1H 2 1 2H 1 4H Mono 16 10240p 5120p 2560p 1280p 640p 320p 16bit pixel 5120q 2560q 1280q 640g 320a 160a 7 1600x1200 Y 32 10H 16 5H 8 5 2H 4 5 4H 2 5 8H 5 16H Mono 16 16000p 8000p 4000p 2000p 1000p 500p 16bit pixel 8000q 4000qH 2000q 1000q 500q 250q H Lines Packet 2 required S200 data rate p Pixels Packet 4 required S400 data rate q Quadlets Packet 8 required S800 data rate 16 required S1600 data rate 32 required 3200 data rate 3 2 Isochronous Packet Format for Format_7 Partial Image Size Format The following table shows the format of the first quadlet a quadlet being four bytes in the data field of an isochronous data block 0 7 8 15 16 23 24 31 data_length tag channel tCode sy header_CRC Video data payload data_CRC Table 2 Isochronous Data Packet Format data_length the number of bytes in the data field tag tag field shall be set to 0 channel isochronous channel number as programmed in the iso_channel field of the cam_sta_ctrl register tCode transaction code shall be set to the isochronous data block packet tCode sy synchronization value shall be set to 0001h on the first isochronous data block of a frame and shall be set to zero on all other isochronous data blocks Video data payload shall contain the digital video information Revised 19 Feb 04 Copyright c 2003 64 PGR IEEE 13
33. ING_INQ register 8 31 Reserved all zero Format COLOR_CODING_INQ A14h Field Bit Description ID Mono8 0 Y only Y 8bits non compressed 0 4 1 1 YUV8 1 4 1 1 Y U V 8bits non compressed 1 4 2 2 YUV8 2 4 2 2 Y U V 8bits non compressed 2 4 4 4 YUV8 3 4 4 4 Y U V 8bits non compressed 3 RGB8 4 R G B 8bits non compressed 4 Mono16 5 Y only Y 16bits non compressed 5 RGB16 6 R G B 16bits non compressed 6 7 31 Reserved all zero 7 31 2 10 5 PIXEL NUMBER ING A34h TOTAL_BYTES_HI_INQ A38h and TOTAL BYTES LO ING A3Ch The PIXEL NUMBER INO register includes the total number of pixels in the required image area The TOTAL_BYTE_INQ register includes the total number of bytes in the required image area If the Presence bit in the VALUE SETTING register is zero the values of these registers will be updated by writing the new value to the IMAGE POSITION IMAGE SIZE and COLOR CODING ID registers If the Presence bit in the VALUE SETTING register is one the values of these registers will be updated by writing one to the Setting_ bit in the VALUE SETTING register If the ErrorFlag 1 bit is zero after the Setting 1 bit returns to zero the values of these registers are valid Revised 19 Feb 04 Copyright c 2003 41 PGR IEEE 1394 Digital Camera Register Reference Format PIXEL NUMBER INO A34h Field Bit Description PixelPerFrame 0 31 Pixel number per frame Format
34. L V These registers are supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 12 PGR IEEE 1394 Digital Camera Register Reference 2 4 Inquiry Registers for Basic Functions The following registers show which DCAM compliant basic functions are implemented on the camera 0 Not Available 1 Available Format Offset Name Field Bit Description 400h BASIC_FUNC_INQ Advanced Feature Ing 0 Inquiry for advanced feature Vendor Unique Features Vmode Error Status Ina 1 Inquiry for existence of Vmode_Error_Status register Feature_Control_Error_Status_Inq 2 Inquiry for existence of Feature_Control_Error_Status register Opt_Func_CSR_Inq 3 Inquiry for optional function CSR 4 7 Reserved 1394 b_mode_Capability 8 Inquiry for 1394 b mode capability 9 15 Reserved Cam_Power_Cntl 16 Camera process power ON OFF capability 17 18 Reserved One Shot Ing 19 One shot transmission capability Multi Shot Ing 20 Multi shot transmission capability 21 27 Reserved Memory_Channel 28 31 Maximum memory channel number N Memory channel no 0 Factory setting memory 1 Memory Ch 1 2 Memory Ch 2 N Memory Ch N If 0000 user memory is not available Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V This regis
35. LL ALL ALL Not implemented 2 8 6 SATURATION 814h This register provides a mechanism to control the Saturation component of the images being produced by the camera given a standard Hue Saturation Value HSV color space Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL Not implemented 2 8 7 GAMMA 818h This register provides a mechanism to control the function used to non linearly map a higher bit depth image produced by the sensor to the requested number of bits Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 M Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 13FF 0 0 0 45 y Flea ALL 0 0 0 22 M 2 8 8 SHUTTER 81Ch This register provides a mechanism to control the integration time Control of the register is via the Value field and the Abs_Control and A AM Mode bits ON OFF is always set This register has three states Revised 19 Feb 04 Copyright c 2003 27 PGR IEEE 1394 Digital Camera Register Reference State Description Manual Abs The shutter value is set by the user via the Abs_Shutter re
36. Notes ALL ALL ALL V This register is supported on all PGR IEEE 1394 DCAM cameras 2 7 5 CAMERA POWER 610h Allows the user to power up or power down components of the camera The exact components e g image sensor A D converter other board electronics will vary between camera models Putting the camera into grab mode will automatically power up the camera however stopping image grabbing does not automatically power down the camera Format Field Bit Description Camera Power 0 1 power up camera 2 power down camera 1 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 13FF 0 0 0 45 y Flea ALL 0 0 0 22 Not implemented 2 7 6 ISO_EN CONTINUOUS_SHOT 614h This register allows the control of isochronous data transmission Continuous shot must be enabled Bit 0 1 to generate a software trigger using SOFT_ASYNC_TRIGGER register 102Ch During ISO_EN 1 or One_Shot 1 or Multi_Shot 1 the register value which reflects the Isochronous packet format cannot change Data transfer control priority is ISO_EN gt One_Shot gt Multi_Shot Format
37. PGR IEEE 1394 Digital Camera Register Reference Revised February 19 2004 d ARIE S EVv AWR C H www ptgrey com PGR IEEE 1394 Digital Camera Register Reference Table of Contents 1 Introduction see ER Gn se Gee Ge eie 4 Tale C ee SE EE RE ER ale OE ER de AE 4 1 2 Using this Manual uu es Ge aa au aa aa ayq 5 2 Camera Control Command Registers 6 2 1 Register map dis Ee De n eid DE RR GE Ge Ge Se i aa bass Ee SE N Ge Se NG 6 2 2 Camera Initialize Register U 7 2 3 Inquiry Registers for Video Format Mode Frame Rate 8 2 3 1 Video Format Inquiry Heoisterg AAA 8 2 3 2 Video Mode Inquiry Registers u ee ee 9 2 3 3 Video Frame Rate Inquiry Registers AA 10 2 4 Inquiry Registers for Basic Functions AR AA ee Re ee 13 2 5 Inquiry Registers for Feature Presence 14 2 6 Inquiry Registers for Feature Elements 15 2 7 Control and Status Registers Ce 17 2 7 1 CURRENT FRAME RATE Go0b ee ee ee ee ee ee ee ee ee ee ee ee 17 2 7 2 CURRENT VIDEO MODE G ah ee ee ee ee ee Re ee ee ee ee ee 17 2 7 3 CURRENT VIDEO FORMAT 608h eie ee ee ee ee ee ee ee ee ee ee ee ee ee ee 18 2 7 4 ISO CHANNEL ISO SPEED ooch 18 2 7 5 CAMERA POWER 610Rh ee ee ee ee ee Re ee ee ee Re ee ee Re ee RA ee ee Ee 19 2 7 6 ISO EN CONTINUOUS SHOT GTAh ee ees
38. Register Reference 5 1 3 Trigger Mode_3 Skip Frames Mode Trigger_Mode_3 allows the user to put the camera into a mode where the camera only transmits one out of N specified images This is an internal trigger mode that requires no external interaction Where N is the parameter set in bits 20 31 of the TRIGGER MODE register offset 830h the camera will issue a trigger internally at a cycle time that is N times greater than the Current frame rate Again the SHUTTER register describes integration time Note that this is different from the IIDC specification that states the cycle time will be N times greater than the fastest frame rate N frames at current frame rate Trigger Sensor exposure posure duration is SHUTTER register value Sensor readout 5 1 4 Trigger Modes The Scorpion implements the IDC 1394 based Digital Camera DCAM Specification Version 1 31 Trigger_Mode functionality Revised 19 Feb 04 Copyright c 2003 71 PGR IEEE 1394 Digital Camera Register Reference 6 Technical Support Resources Point Grey Research Inc endeavours to provide the highest level of technical support possible to our customers Most support resources can be accessed through the Product Support section of our website http www ptgrey com support 6 1 Creating a Customer Login Account The first step in accessing our technical support resources is to obtain a Customer Login Account This requires a valid nam
39. SCOR 13SM 0 0 0 33 M Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 M Scorpion SCOR 13FF 0 0 0 45 y Flea ALL 0 0 0 22 M Revised 19 Feb 04 Copyright c 2003 31 PGR IEEE 1394 Digital Camera Register Reference 2 8 13 TRIGGER DELAY 834h v1 31 This register provides control over the time delay between an external asynchronous trigger and the start of integration shutter open Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is read only 2 5 Reserved ON_OFF 6 Write ON or OFF for this feature Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only 7 19 Reserved Value 20 31 Value Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented See register 1108h SHUTTER_DELAY Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Scorpion SCOR 03SO 0 0 0 45 v Delay is in units of a 24 576MHz clock Less than 1024 ticks is linear greater than 1024 ticks is non linear Recommend using register 950h ABS VAL
40. SR for Saturation 718h ABS_CSR_HI_INQ 6 0 31 Quadlet offset for the absolute value CSR for Gamma 71Ch ABS CSR HI INO 7 0 31 Quadlet offset for the absolute value CSR for Shutter 720h ABS_CSR_HI INQ_8 0 31 Quadlet offset for the absolute value CSR for Gain 730h ABS CSR HI INO 12 0 31 Quadlet offset for the absolute value CSR for Trigger 734h ABS_CSR_HI INO 13 0 31 Quadlet offset for the absolute value CSR for Trigger Delay 73Ch ABS_CSR_HI INO 15 0 31 Quadlet offset for the absolute value CSR for Frame Rate This IEEE 1394 specific address space contains the 1394 standard CSR s and to access these CSRs you need the 1394 base address OxFFFF F000 0000 and base offset OxFFFF FOFO 0000 2 9 2 Units of Value for Absolute Value CSR Registers The following tables describe the real world units that are used for the absolute value registers Each value is either Absolute value is an absolute value or Relative value is an absolute value but the reference is system dependent Feature element Function Unit Unit Reference Value type name Description point Brightness Black level offset Absolute Auto Exposure Auto Exposure EV exposure value 0 Relative White_Balance White Balance K kelvin Absolute Hue Hue deg degree 0 Relative Saturation Saturation 100 Relative Shutter Integration time S s
41. Scorpion SCOR 13FF 0 0 0 45 V Flea ALL 0 0 0 22 v 2 7 8 SOFTWARE_TRIGGER 62Ch v1 31 This register is defined in DCAM v1 31 This register allows the user to generate a software asynchronous trigger Format Field Bit Description Software_Trigger 0 Write 0 Reset software trigger 1 Set software trigger Self cleared when Trigger_Mode 0 2 4 Read 0 Ready 1 Busy Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Use SOFT_ASYNC_TRIGGER 102Ch Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03SO 0 0 0 45 v Scorpion SCOR 20SO 0 0 0 43 y Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 13FF 0 0 0 45 y Flea ALL 0 0 0 22 v Revised 19 Feb 04 Copyright c 2003 20 PGR IEEE 1394 Digital Camera Register Reference 2 7 9 DATA DEPTH 630h v1 31 This register is defined in DCAM v1 31 This register allows the user to query the effective depth of the current image data The image data format is least significant bit LSB and odd bits are filled with zeros Format Field Bit Description Data_Depth 0 7 If read value of Data Depth is zero shall ignore this field Write Ignored Read Effective data depth 8 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not impl
42. TOTAL_BYTES_HI_INQ A38h Field Bit Description BytesPerFrameHi 0 31 Higher quadlet of total bytes of image data per frame Format TOTAL BYTES LO INO A3Ch Field Bit Description BytesPerFrameLo 0 31 Lower quadlet of total bytes of image data per frame 2 10 6 PACKET PARA ING A40h and BYTE PER PACKET A44h MaxBytePerPacket describes the maximum packet size for one isochronous packet UnitBytePerPacket is the unit for isochronous packet size RecBytePerPacket describes the recommended packet size for one isochronous packet If RecBytePerPacket is zero you must ignore this field If the Presence bit in the VALUE SETTING register is zero values of these fields will be updated by writing the new value to the IMAGE POSITION IMAGE SIZE and COLOR CODING ID registers with the value of the ISO Speed register 60Ch 6 7 First the ISO Speed register must be written Then the IMAGE POSITION IMAGE SIZE and COLOR CODING ID registers should be updated If the Presence bit in the VALUE SETTING register is one the values of these fields will be updated by writing one to the Setting_ bit in the VALUE SETTING register If the ErrorFlag 1 bit is zero after the Setting 1 bit returns to zero the values of these fields are valid The BytePerPacket value determines the real packet size and transmission speed for one frame image The BytePerPacket value must keep the following condition BytePerPac
43. V Format 0 2 Current video format Format 0 Format 7 3 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V This register is supported on all PGR IEEE 1394 DCAM cameras 2 7 4 ISO_CHANNEL ISO_SPEED 60Ch Allows the user to query the camera s isochronous transmission channel and speed information Format Field Bit Description ISO Channel 0 3 Isochronous channel number for video data transmission Except for Format 6 Reserved ISO Speed Isochronous transmit speed code Except for Format_6 0 100Mbps 1 200Mbps 2 400Mbps Reserved Operation_Mode 1394 operation mode Change control register sets of ISO Channel and ISO_Speed registers 0 Legacy v1 30 compatible 1 1394 b v1 31 mode Camera shall start in legacy mode for backward compatibility 17 Reserved ISO_Channel_B 18 23 Isochronous channel number for video data transmission of 1394 b mode Except for Format_6 24 28 Reserved ISO_Speed_B 29 31 Isochronous transmit speed code of 1394 b mode Except for Format 6 0 100Mbps 1 200Mbps 2 400Mbps 3 800Mbps 4 1 6Gbps 5 3 2Gbpss Feature Availability Revised 19 Feb 04 Copyright c 2003 18 PGR IEEE 1394 Digital Camera Register Reference Camera Model Sensor Firmware Avail
44. Value Register Values 35 2 9 4 ABS VAL AUTO EXPOSURE oO 35 2 9 5 ABS VAL SHUTTER 91Oh iese sees ee ee ee ee ee ee ee ee uu a iisas 36 29 6 ABS VAL GAIN 920h ii 2 a ERROR ER Se EE GEGENEREER SEN Gee dee ge ee Pe eed 36 2 9 7 ABS VAL BRIGHTNESS 930M ee ee ese ee ee ee ee ee ee ee ee Re ee ee ee ee Ee 37 2 9 8 ABS VAL GAMMA 940R uu aaa RR ee RA ee Re ee ee Re ee RA ee gaies 38 2 9 9 ABS VAL TRIGGER DELAY 950h v1 31 38 Revised 19 Feb 04 Copyright c 2003 1 PGR IEEE 1394 Digital Camera Register Reference 2 10 Video Mode Control and Status Registers for Format 7 40 2 10 1 MAX IMAGE SIZE INO A00h Re ee ee ee ee Re 40 2 10 2 UNIT SIZE INO A04h and UNIT POSITION ING A4Ch 40 2 10 3 IMAGE POSITION A08h and IMAGE SIZE A0Ch 40 2 10 4 COLOR CODING ID A10h and COLOR_CODING_INQ A14h 41 2 10 5 PIXEL NUMBER ING A34h TOTAL_BYTES_HI_INQ A38h and TOTAL BYTES Ke INQ A3Ch EE 41 2 10 6 PACKET PARA INO A40h and BYTE_PER_PACKET A44h 42 2 10 7 PACKET_PER_FRAME_INQ A48h ee ee ee ee ee ee ee ee ee ee ee 43 2 10 8 VALUE SETTING Ach 43 2 11 Advanced RegisterS AAA 44 2 11 1 ACCESS CONTROL REGISTERS 1000h 100Ch
45. a m al aa ER Ee DA ESE he ee ees 74 8 1 4 Release Candidate a 75 82125 Release u EE EE RE OE N 75 9 rte 2 u EE EE EE EE EE EE Ne 76 Revised 19 Feb 04 Copyright c 2003 3 PGR IEEE 1394 Digital Camera Register Reference 1 Introduction The PGR IEEE 1394 Digital Camera Register Reference is a source of general information pertaining to all PGR IEEE 1394 cameras This manual attempts to provide the user with a detailed specification of the various features formats modes frame rates and control parameters implemented by each PGR IEEE 1394 camera It should be used in conjunction with the camera specific Technical Reference Manual to determine the full functionality offered by an individual camera system The reader should be aware that PGR camera systems are complex and dynamic if any errors or omissions are found during experimentation please contact us using our support web form at http www ptgrey com support contact 1 1 Scope The PGR IEEE 1394 Digital Camera Register Reference lists all of the registers that are used by PGR IEEE 1394 cameras Not all registers are implemented by all cameras See the section Using this Manual For model specific information such as supported format and frame rates and detailed technical information consult the Technical Reference Manual specifically for your camera Most registers are implemented according to the IDC 1394 based Digita
46. ate relative to the CURRENT FRAME RATE value For example when CURRENT FRAME RATE 4 i e 30Hz on a lo res Dragonfly the camera sends 240 iso packets per image To achieve 30Hz operation the camera waits for about 26 27 iso periods before sending the next image The FRAME TIME register allows the desired frame rate to be specified which could be considerably less than the nominal rate specified by CURRENT FRAME RATE For example witha CURRENT FRAME RATE of 30fps 25fps is now possible The formula to determine the Value is FRAME TIME 800 Current Frame Rate Desired Frame Rate Example To achieve 25fps while the current frame rate is 30fps FRAME_TIME 800 30 fps 25fps 960 3C0h Enter 3COh in the Value field last 16 bits of 1240h to achieve 25fps Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 5 Reserved ON_OFF 6 Always ON To turn this feature OFF write a 0 to this bit and bits 20 31 Value Field 7 19 Reserved Value 20 31 Value Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Scorpion ALL Not implemented Use FRAME_RATE 83Ch v1 31 Flea ALL Not implemented Use FRAME_RATE 83Ch v1 31 2 11 25 FRAME_SYNC_OFFSET 1244h Multiple cameras of the same type on the same IEEE 1394 bus are automatically synchronized to each other at the hardwar
47. ate way of setting these gains and allows the setting of both green pixel gains One Shot and Auto Operation One of the uses of One Shot Auto White Balance is to obtain a similar color balance between different cameras that are slightly different from each other Theoretically if different cameras are pointed at the same object using One Shot Auto will get their color balances to be even closer together Revised 19 Feb 04 Copyright c 2003 25 PGR IEEE 1394 Digital Camera Register Reference One Shot is identical to Auto white balance except One Shot only attempts to automatically adjust white balance for a set period of time before stopping The white balance of the camera before using One Shot Auto must already be relatively close In other words if the Red is set to 0 and Blue at maximum two extremes One Shot Auto will not work However if the camera is already close to being color balanced then it will work it may only be a small change Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with value in the Value field 1 Control with value in the associated Abs Value CSR If this bit is 1 then Value is ignored 2 4 Reserved One_Push 5 One push auto mode controlled automatically by camera only once Write 1 Begin to work self cleared after operation Read 0 No
48. be configured properly before access to the advanced registers is granted This reguirement is not enforced on the camera but the registers formats are here for completeness Offset Name Field Bit Description 1000h ACCESS_CONTROL_HI Feature_ID_Hi 0 31 1004h ACCESS_CONTROL_LO Feature_ID_Lo 0 15 16 19 Reserved Time_Out 20 31 Milliseconds until time out max 4 095s 1008h FEATURE_ID Company_ID 0 23 00B09D 100Ch Adv_Feature_Set 24 47 Advanced Feature set unique value currently 000004 Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL y These registers are supported on all PGR IEEE 1394 DCAM cameras 2 11 2 EXTENDED SHUTTER 1028h Allows the user to access a number of different extended shutter modes Placing the camera into extended shutter mode removes the restriction that the shutter integration time must be less than the frame rate The actual frame rate will be the maximum of the nominal frame rate and the shutter time For PGR IEEE 1394 cameras that implement the FRAME RATE register 83Ch extended shutter times can be achieved by turning the FRAME RATE register OFF DRAGONFLY ONLY The maximum shutter values for the various modes are as follows Frame Rate Maximum Shutter Value 30Hz 532 1 16000sec 32Hz 500 1 16000sec Extended shutter 4000 1 16000sec 50Hz 256 1 12800sec 24Hz 666 1 16
49. de Write set the mode Read read a current mode 0 Manual 1 Automatic High Value 8 19 Upper 4 bits of the shutter value available only in extended shutter mode outside of specification Value 20 31 Value A write to this value in Auto mode will be ignored Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V This register is supported on all PGR IEEE 1394 DCAM cameras Scorpion SCOR 13SM 0 0 0 33 V The value written to the Symagery sensor is the shutter value multiplied by the pixel clock 40MHz divided by 27 000 Revised 19 Feb 04 Copyright c 2003 28 PGR IEEE 1394 Digital Camera Register Reference 2 8 9 GAIN 820h This register controls the gain of the A D converter Control of the register is via the Value field and the Abs_Control and A AM Mode bits ON OFF is always set This register has three states State Description Manual Abs The gain value is set by the user via the Abs_Gain register the Value field becomes read only and reflects the converted absolute value Manual The gain value is set by the user via the Value field the Abs_Gain register becomes read only and contains the current gain Auto The gain value is set by the auto exposure controller if enabled both the Value field and the Abs_Gain register become read only See Gain and Shutter Set
50. e 0 N A 1 Available 1 7 Reserved Min Value 8 15 Lower bound Max Value 16 31 Upper bound Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Scorpion ALL M Flea ALL 0 0 0 22 v 2 11 8 AUTO SHUTTER RANGE 1098h Specifies the range of allowed shutter values to be used by the automatic exposure controller Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available 1 7 Reserved Min Value 8 15 Max_Value 16 31 Note The actual range used is further restricted to match the current grab mode see Shutter register offset 81Ch for the list of ranges Note Although OxFFAO is the maximum shutter setting in extended shutter mode OxFAO is the maximum shutter setting for the AUTO_SHUTTER_RANGE Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion ALL M Flea ALL 0 0 0 22 v 2 11 9 AUTO GAIN RANGE 10A0h Specifies the range of allowed gain values to be used by the automatic exposure controller Format Field Bit Description Revised 19 Feb 04 Copyright c 2003 48 PGR IEEE 1394 Digital Camera Register Reference Presence Ing 0 Presence of this feature 0 N A 1 Available 1 5 Reserved ON_OFF 6 Write ON or OFF for this feature Read read a s
51. e e mail address and camera serial number To apply for a Customer Login Account go to http www ptgrey com support downloads user_request html 6 2 Knowledge Base Our on line knowledge base contains answers to some of the most common support questions It has information about all PGR products and was developed to help customers resolve product issues It is constantly updated expanded and refined to ensure that our customers have access to the latest information To access the knowledge base go to http www ptgrey com support kb 6 3 Product Downloads Customers with a Customer Login Account can access the latest software and firmware for their cameras from our downloads site at http www ptgrey com support downloads We encourage our customers to keep their software and firmware up to date by downloading and installing the latest versions These versions include the latest bug fixes and feature enhancements 6 4 Contacting Technical Support Before contacting Technical Support have you 1 Read the product documentation and user manual 2 Searched the Knowledge Base 3 Downloaded and installed the latest version of software and or firmware If you have done all the above and still can t find an answer to your question contact our Technical Support team using our on line web form http www ptgrey com support contact This will create a ticket in our Request Tracker support system and a Technical Support repres
52. e BRIGHTNESS_INQ register 508h SHARPNESS_INQ Same format as the BRIGHTNESS_INQ register 50Ch WHITE BALANCE INO Same format as the BRIGHTNESS_INQ register 510h HUE_INQ Same format as the BRIGHTNESS_INQ register 514h SATURATION_INQ Same format as the BRIGHTNESS_INQ register 518h GAMMA_INQ Same format as the BRIGHTNESS_INQ register 51Ch SHUTTER_INQ Same format as the BRIGHTNESS_INQ register 520h GAIN_INQ Same format as the BRIGHTNESS_INQ register 524h IRIS_INQ Same format as the BRIGHTNESS_INQ register 528h FOCUS_INQ Same format as the BRIGHTNESS_INQ register 530h TRIGGER_INQ Presence_Inq 0 Presence of this feature Abs Control Ing O Absolute value control 2 3 Reserved ReadOut_Inq 4 Ability to read the value of this feature On_Off_Ing 5 Ability to switch feature ON and OFF Polarity Ing 6 Ability to change trigger input polarity Value_Read_Inq 7 Ability to read raw trigger input Trigger_Source0_Inq 8 Presence of Trigger Source 0 ID 0 Trigger Sourcel Ing 9 Presence of Trigger Source 1 ID 1 Trigger Source Ing 10 Presence of Trigger Source 2 ID 2 Trigger_Source3_Inq 11 Presence of Trigger Source 3 ID 3 12 14 Reserved ID 4 6 Software Trigger Ing 15 Presence of Software Trigger ID 7 Trigger_Mode0_Inq 16 Presence of Trigger Mode 0 Trigger Model Ing 17 Presence of Trigger Mode 1 Trigger_Mode2_Inq 18 Presence of Trigger Mode 2 Trigger Mode Ing 19 Presence of Trigger Mode 3 Trigger Moded Ing 20 Presence o
53. e level This register allows the user to offset the synchronization of one camera relative to another camera by a defined amount of time For example it would be possible for camera B to always grab images 1ms after camera A grabs images the two cameras are therefore synchronized but the grabbing of B is delayed by 1ms Revised 19 Feb 04 Copyright c 2003 57 PGR IEEE 1394 Digital Camera Register Reference This register has the same format as the FRAME TIME register and uses the same units The offset must be some number between 0 and 1 where is the current frame rate If the FRAME TIME Value does not divide evenly into 128 seconds and the offset register is not written for all applicable cameras within the same 128s ISO period setting a FRAME SYNC OFFSET Value will not work properly Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Reserved Always ON To turn this feature OFF write a 0 to this bit and bits 20 31 Value Field 7 19 Reserved Value 20 31 Value ON_OFF The formula to determine the FRAME SYNC OFFSET Value is FRAME SYNC OFFSET Desired Offset Time 1 Current Frame Rate FRAME TIME Value Example To determine the Value required to offset the synchronization of a camera running at 30Hz by 1ms read the FRAME TIME register 1240h Value field Assuming the Value is 320h FRAME SYNC OFFSET 0 001s
54. e_5 5 60fps 6 31 Reserved 22Ch V_RATE_INQ 1_3 FrameRate_0 0 1 875fps Format 1 Mode 3 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps 4 31 Reserved 230h V RATE INO 1 4 FrameRate 0 0 1 875fps Format 1 Mode 4 FrameRate_1 1 3 75 fps FrameRate_2 2 7 5fps 3 31 Reserved 234h V RATE INO 1 5 FrameRate 0 0 1 875fps Format 1 Mode 5 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 238h V_RATE_INQ 1 6 FrameRate_0 0 Reserved Format 1 Mode 6 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 23Ch V_RATE_INQ_1_7 FrameRate_0 0 1 875fps Format 1 Mode 7 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps 4 31 Reserved 240h V_RATE_INQ 2 0 FrameRate 0 0 1 875fps Format 2 Mode 0 FrameRate_1 1 3 75 fps FrameRate_2 2 7 5fps 3 31 Reserved 244h V RATE INO 2 1 FrameRate_0 0 1 875fps Revised 19 Feb 04 Copyright c 2003 PGR IEEE 1394 Digital Camera Register Reference Format 2 Mode 1 FrameRate_1 1 3 75 fps FrameRate_2 2 7 5fps 3 31 Reserved 248h V_RATE_INQ 2_2 FrameRate_0 0 1 875fps Format 2 Mode 2 FrameRate_
55. econds Absolute Gain Circuit gain dB decibel 0 Relative Tris Iris F F number Absolute Focus Focus m meter Absolute Revised 19 Feb 04 Copyright c 2003 34 PGR IEEE 1394 Digital Camera Register Reference Trigger External Trigger times Absolute Trigger_Delay Trigger Delay S seconds Absolute Frame_Rate Frame rate fps frames per Absolute second 2 9 3 Calculating Absolute Value Register Values The Absolute Value CSR s store 32 bit floating point values with IEEE REAL 4 format 0 7 24 31 8 15 16 23 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m 1bit 8bit 23bit To programmatically determine the floating point eguivalent of the hexadecimal Value for the ABS VAL SHUTTER register 918h declare a union of a floating point and unsigned long typedef union AbsValueConversion unsigned longulValue float fValue AbsValueConversion float AbsValueConversion fShutter regValue read the 32 bit hex value into the unsigned long member flycaptureGetCameraRegister context 0x918 amp regValue ulValue fShutter regValue fValue 2 9 4 ABS_VAL_AUTO_EXPOSURE 900h This register provides the user with absolute value control over the auto exposure register This register stores a 32 bit floating point value with IEEE REAL 4 format The units of this register are in expos
56. el 10240p 5120p 2560p 1280p 640p 320p 160p 80p 7680a 3840g 1920g 960g 480g 240g 120g 60g 5 640x480 Y Mono 16 16H 8 8H 4 4H 2 2H 1H 1 2H 1 4H 1 8H Sbit pixel 10240p 5120p 2560p 1280p 640p 320p 160p 80p 2560q 1280q 640q 320 160q 80q 40q 20q 6 640x480 Y Mono 32 16H 16 8H 8 4H 4 2H 2 1H 1 2H 1 4H 1 8H 16bit pixel 10240p 5120p 2560p 1280p 640p 320p 160p 80p 5120q 5 1024x768 Y 3 2H 3 4H 3 8H 3 16H Mono 1536p 768p 384p 192p 8bit pixel 384q 2 192q 96q 48q Si 1024x768 Y 3 4H 3 8H 3 16H Mono 768p 384p 192p 16bit pixel 384q 4 192q 2 96q Format_1 Mode Video Format 240fps 120fps 60fps 30fps 15fps 7 5fps 3 75fps 1 875fps 0 800 600 32 20H 16 10H 8 5H 4 5 2H 2 5 4H 5 8H 5 16H YUV 4 4 4 16000p 8000p 4000p 2000p 1000p 500p 250p 16bit pixel 8000q 4000q 2000q 1000q 500q 250q 125q 1 800x600 RGB 32 10H 16 5H 8 5 2H 4 5 4H 2 5 8H 24bit pixel 8000p 4000p 2000p 1000p 500p 600q 3000q 1500q 750q 375q 2 800x600 Y Mono 16 20H 8 10H 4 5H 2 5 2H S AH 5 8H Sbit pixel 16000p 8000p 4000p 2000p 1000p 500p 4000q 2000a 1000g 500g 250g 125g 3 1024x768 32 12H 16 6H 8 3H 4 3 2H 2 3 4H 3 8H 3 16H YUV 4 2 2 12288p 6144p 3072p 1536p 768p 384p 192p 16bit pixel 6144g 3072g 1536g 768g 384g 192g 96g 4 1024x768 RGB 32 6H 16 3H 8 3 2H 4 3 4H 2 3 8H 3 16 24bit pixel 6144p 3072p 1536p 768p 384p 192p 4608q 2304q 1152q 576q 288q 144q 5 1024x768 Y 32 24H 16 12H 8 6H 4 3H 2 3 2H 3 4H 3 8H 3 16H Mono 24576p 12288p 6144p 3072p 1536p 768p 384p 192p 8bit pixel 6144q 3072q 15
57. emented Scorpion ALL Not implemented Flea ALL 0 0 0 22 Not implemented Revised 19 Feb 04 Copyright c 2003 21 PGR IEEE 1394 Digital Camera Register Reference 2 8 Control and Status Registers for Features The user can control each feature of the camera through these registers The controllable items are Mode and Value Mode Each CSR has three bits for mode control ON_OFF One_Push and A_M_Mode Auto Manual mode Each feature can have four states corresponding to the combination of mode control bits Note Not all features implement all modes One Push ON OFF A_M_Mode State x 0 x Off state Feature will be fixed value state and uncontrollable x 1 1 Auto control state Camera controls feature by itself continuously 0 1 0 Manual control state User can control feature by writing value to the value field 1 1 0 One Push action Self clear Camera controls feature by itself only once and returns to the Manual control state with adjusted value X don t care Value If the Presence_Ingq bit of the register is one the value field is valid and can be used for controlling the feature The user can write control values to the value field only in the Manual control state In the other states the user can only read the value The camera always has to show the real setting value at the value field if Presence Ing is one Revised 19 Feb 04 Copyright
58. entative will contact you by e mail within one 1 business day Revised 19 Feb 04 Copyright c 2003 72 PGR IEEE 1394 Digital Camera Register Reference 7 Contacting Point Grey Research Inc For any questions concerns or comments please contact us via the following methods Email For all general questions about Point Grey Research or our products contact info ptgrey com For all specific guestions about our products or for guotes or product pricing contact sales ptgrey com For technical support existing customers only please consult the Technical Support Resources section of this manual Telephone Fax Mail 604 730 9937 604 732 8231 Point Grey Research Inc 305 1847 W Broadway Vancouver BC Vol 1Y6 CANADA Or visit our webpage http www ptgrey com for detailed product information and support Revised 19 Feb 04 Copyright c 2003 73 PGR IEEE 1394 Digital Camera Register Reference 8 Appendix A 8 1 Software and Firmware Version Numbering Scheme 8 1 1 Overview All PGR software and firmware follow a standardized version naming scheme that allows users to quickly and easily determine the latest software versions All software and firmware version numbers consist of 4 numbers separated by periods e g firmware version 2 0 0 20 This follows the general pattern of MajorRevision MinorRevision TypeOfRelease BuildNumber where Type of Release is always 0 for an A
59. er source using this method To have multiple pins acting as a trigger sources use the GPIO MODE 2 method via the GPIO CTRL PIN x registers Configuring PIO for Strobe Output To configure a GPIO pin to output a strobe pulse set the bit for the relevant pin in the PIO_DIRECTION 11F8h register to 1 then set the duration and delay using the related STROBE x CNT register 4 2 2 Strobe Signal Output Registers This section describes the control and inquiry registers for the Strobe Signal functionality specified in the IDC 1394 based Digital Camera DCAM Specification Version v1 31 Revised 19 Feb 04 Copyright c 2003 67 PGR IEEE 1394 Digital Camera Register Reference 0 Not Available 1 Available Format Offset Name Field Bit Description 1300h Strobe_CTRL_Ingq Strobe 0 Ing 9 Presence of strobe 0 signal Strobe 1 Ing 1 Presence of strobe 1 signal Strobe_2_Inq 2 Presence of strobe 2 signal Strobe_3_Inq 3 Presence of strobe 3 signal 4 31 Reserved 1304h Reserved 13FCh 1400h Strobe_0_Inq Presence_Inq 9 Presence of this feature 0 N A 1 Available 1 3 Reserved ReadOut_Inq 4 Ability to read the value of this feature On_Off_Ing 5 Ability to switch feature ON and OFF Polarity Ing 6 Ability to change signal polarity 7 Reserved Min_Value 8 19 Minimum value for this feature co
60. f Trigger Mode 4 Trigger_Mode5_Inq 21 Presence of Trigger Mode 5 22 29 Reserved Trigger Model4 Ing 30 Presence of Trigger Mode 14 Vendor unique trigger 0 Revised 19 Feb 04 Copyright c 2003 15 PGR IEEE 1394 Digital Camera Register Reference Trigger_Mode15_Inq 31 Presence of Trigger Mode 15 Vendor unique trigger 1 534h TRIGGER_DLY_INQ Presence_Inq 9 Presence of this feature Abs_Control_Inq II Absolute value control 2 Reserved One_Push_Inq 3 One push auto mode controlled automatically by camera only once ReadOut_Ing 4 Ability to read the value of this feature On_Off_Ing 5 Ability to switch feature ON and OFF 6 7 Reserved Min Value 8 19 Minimum value for this feature control Max_Value 20 31 Maximum value for this feature control 538h WHITE_SHD_INQ Same format as the BRIGHTNESS_INQ register 53Ch FRAME RATE INQ Same format as the BRIGHTNESS_INQ register Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V These registers are supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 16 PGR IEEE 1394 Digital Camera Register Reference 2 7 Control and Status Registers CSRs The following section details a series of standard control and status registers 2 7 1 CURRENT_FRAME_RATE 600h Allows the user to q
61. f the IO3 pin 0 Low 1 High 4 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 M Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Flea ALL 0 0 0 22 y 2 11 22 PIO_INPUT 11F4h This section describes the control and inquiry registers for the PIO_Input functionality specified in the IIDC 1394 based Digital Camera DCAM Specification Version v1 31 See the section GPIO Control Using DCAM v1 31 Functionality Format Field Bit Description Revised 19 Feb 04 Copyright c 2003 55 PGR IEEE 1394 Digital Camera Register Reference IO0_Status 0 State voltage level of the IO0 pin 0 Low 1 High IO1_Status 1 State voltage level of the IO1 pin 0 Low 1 High IO2_Status 2 State voltage level of the IO2 pin 0 Low 1 High IO3_Status 3 State voltage level of the IO3 pin 0 Low 1 High 4 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 v Scorpion SCOR 2
62. g point value with IEEE REAL 4 format The units of this register are in seconds s The user must write a 1 to bit 1 of the SHUTTER register at offset 81Ch in order to change the Value field of this register from being read only Format Offset Name Field Bit Description 910h ABS_VAL_SHUTTER Min_ Value 0 31 Minimum shutter value in seconds 914h Max_Value 0 31 Maximum shutter value in seconds 918h Value 0 31 Current shutter value in seconds 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m lbit 8bit 23bit Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion ALL M Flea ALL 0 0 0 22 v 2 9 6 ABS VAL GAIN 920h This register provides the user with absolute value control over the gain register This register stores a 32 bit floating point value with IEEE REAL 4 format The units of this register are in decibels dB The user must write a 1 to bit 1 of the GAIN register at offset 820h in order to change the Value field of this register from being read only Format Offset Name Field Bit Description 920h ABS_VAL_GAIN Min_ Value 0 31 Minimum gain value in dB Revised 19 Feb 04 Copyright c 2003 36 PGR IEEE 1394 Digital Camera Register Reference
63. gered 2 camera is in the middle of integration Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 y Does not implement Trigger field status mode 2 middle of integration Scorpion SCOR 13SM 0 0 0 33 v Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 V Deprecated Use SOFTWARE TRIGGER 62Ch v1 31 Scorpion SCOR 20SO 0 0 0 43 v Deprecated Use SOFTWARE_TRIGGER 62Ch v1 31 Scorpion SCOR 13FF 0 0 0 45 v Revised 19 Feb 04 Copyright c 2003 45 PGR IEEE 1394 Digital Camera Register Reference Flea ALL 0 0 0 22 V Deprecated Use SOFTWARE TRIGGER 62Ch v1 31 2114 BAYER TILE MAPPING 1040h This 32 bit read only register specifies the sense of the cameras Bayer tiling Various colors are indicated by the ASCII representation of the first letter of their name Color ASCII Red R 52h Green G 47h Blue B 42h Monochrome Y 59h For example 0x52474742 is RGGB and 0x59595959 is YYYY Format Field Bit Description Bayer_Sense_A 0 7 ASCII representation of the first letter of the color of pixel 0 0 in the Bayer tile Bayer_Sense_B 8 15 ASCII representation of the first letter of the color of pixel 0 1 in the Bayer tile Bayer_Sense _C 16 24 ASCII representation of the first letter of the color of pixel 1 0 in the Bayer
64. gger 66 4 1 4 GPIO Mode 3 Groben 66 4 1 5 GPIO Mode 4 Pulse Width Modulation PWM 66 4 1 6 GPIO Mode 8 Output DCAM Specification v1 31 66 4 2 GPIO Control Using DCAM v1 31 Functionality 67 4 2 1 Parallel Input Output PIO Registers 11FOh 11F8h 67 Revised 19 Feb 04 Copyright c 2003 2 PGR IEEE 1394 Digital Camera Register Reference 4 2 2 Strobe Signal Output Registers sees ee Re RR a 67 5 Trigger Modessa Ge de Ge GES we ed SA Re Ge de Ge GE KA de 70 5 1 1 Trigger Mode 0 Standard External Trigger Mode 70 5 1 2 Trigger_Mode_1 Bulb Shutter Mode A 70 5 1 3 Trigger Mode 3 Skip Frames Mode A 71 ai Trigger ele OE EE a ER N RE EE MK N 71 6 Technical Support Resources 72 6 1 Creating a Customer Login Account 72 6 2 Knowledge Base 72 6 3 Product Downloads 72 6 4 Contacting Technical Support 72 7 Contacting Point Grey Research Inc 73 8 Appeldisk A ss se ee oe be Ee eg ok ea dee bi dd ee 74 8 1 Software and Firmware Version Numbering Scheme 74 EE Me EE N ER EE EE ER EE N HO TE 74 IE AE n a ee Re mau ua um RA E 74 BCL Bet
65. gister The Value field becomes read only and reflects the converted value of the Abs_Shutter register Manual The user sets the shutter value via the Value field the Abs_Shutter register becomes read only and contains the current shutter time Auto The shutter value is set by the auto exposure controller if enabled Both the Value field and the Abs_Shutter register become read only See the Gain and Shutter Settings section where applicable of your camera s Technical Reference Manual for conversion of values to real world units Note that the shutter times are scaled by the divider of the basic frame rate For example dividing the frame rate by two e g 15fps to 7 5fps causes the maximum shutter time to double e g 33ms to 66ms Format Field Description Presence Ing Presence of this feature 0 N A 1 Available Abs_Control Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is ignored Reserved One_Push Write 1 begin to work self cleared Read Value currently operating Value 0 not operating If A_M_Mode 1 this bit is ignored ON_OFF One push auto mode controlled automatically by camera only once Write 1 Begin to work self cleared after operation Read 0 Not in operation 1 In operation If A_M_Mode 1 this bit is ignored A M Mo
66. he camera will reset to its initial state and default settings This bit is self cleared 1 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL Vx This register is supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 PGR IEEE 1394 Digital Camera Register Reference 2 3 Inquiry Registers for Video Format Mode Frame Rate The following registers may be used to determine the video formats modes and frame rates that are available with the camera 0 Not Available 1 Available 2 3 1 Video Format Inquiry Registers Format Offset Name Field Bit Description 100h V_FORMAT_INQ Format 0 0 VGA non compressed format 160x120 through 640x480 Format_1 1 Super VGA non compressed format 1 800x600 through 1024x768 Format_2 2 Super VGA non compressed format 2 1280x960 through 1600x1200 Format_x 3 5 Reserved for other formats Format_6 6 Still Image Format Format_7 7 Partial Image Size Format 8 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v This register is supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 8 PGR IEEE 1394 Digital Camera Register Reference 2 3 2 Video Mode Inquiry Registers
67. hese GPIO registers and modes with the exception of GPIO Mode 8 which applies specifically to cameras that implement the DCAM v1 31 compliant input output modes 4 1 1 GPIO Mode 0 Input When a GPIO pin is put into GPIO Mode 0 and external wiring is attached to the pin the associated GPIO CTRL PIN x register s Data field will reflect the voltage level of the wiring For example a voltage of OV would be reflected as a 0 in Bit 31 and a voltage of 3 3V would be reflected as a 1 Revised 19 Feb 04 Copyright c 2003 65 PGR IEEE 1394 Digital Camera Register Reference 4 1 2 GPIO_Mode_ 1 Output A GPIO pin in GPIO_Mode_l will output a defined voltage signal either high or low If Bit 31 of the GPIO_CTRL_PIN_x register s Data field is 0 the pin will output OV If Bit 31 is set to 1 the pin will output 3 3V Toggling this bit will therefore cause a rising or falling edge transition which can be used to manually trigger external circuitry Please note GPIO Mode j is the mode to use for automatic continuous triggering WARNING Do not connect power to a pin configured as an output effectively connecting two outputs to each other Doing so can cause damage to camera electronics 4 1 3 GPIO_Mode_2 Asynchronous External Trigger When a GPIO pin is put into GPIO_Mode_2 and an external TRIGGER_MODE enabled which disables isochronous data transmission the camera can be asynchronously trigge
68. ing_ bit must be set to 1 The ErrorFlag_ field will be updated when the Setting_ bit returns to 0 If the ErrorFlag_1 field is zero the values of the TOTAL_BYTES_HI_INQ TOTAL BYTES LO INO PACKET PARA INO and BYTE PER PACKET registers are valid After the BytePerPacket value is written the ErrorFlag_2 field will be updated If the ErrorFlag_2 field is zero isochronous transmission can be started without any problem Format Field Bit Description Presence 0 If this bit is one Setting_1 ErrorFlag_1 and ErrorFlag_2 fields are valid This bit is read only Setting_1 1 If writing 1 to this bit IMAGE_POSITION IMAGE SIZE COLOR_CODING_ID and ISO_Speed register value will be reflected in PIXEL_NUMBER_INQ TOTAL_BYTES_HI_INQ TOTAL BYTES LO INO PACKET PARA INO and BYTE PER PACKET registers This bit is self cleared 2 7 Reserved ErrorFlag_1 8 Combination of the values of IMAGE_POSITION IMAGE_SIZE COLOR_CODING_ID and ISO_Speed register is not acceptable 0 no error 1 error This flag will be updated every time when Setting_1 bit returns to 0 from 1 ErrorFlag_2 9 BytePerPacket value is not acceptable 0 no error 1 error 10 31 Reserved Revised 19 Feb 04 Copyright c 2003 43 PGR IEEE 1394 Digital Camera Register Reference 2 11 Advanced Registers 2 11 1 ACCESS CONTROL REGISTERS 1000h 100Ch According to the DCAM specification these registers must
69. ion 3 1 1 Isochronous Bandwidth Requirements The amount of isochronous bandwidth required to transmit images from the camera is dependent on the format and frame rate The following table describes the bandwidth requirements for each available format and frame rate Each entry in the table indicates the required bandwidth in Revised 19 Feb 04 Copyright c 2003 62 PGR IEEE 1394 Digital Camera Register Reference number of lines pixels and quadlets per isochronous period Bandwidth requirements for Format 7 are negotiated with the camera at runtime The location of the pertinent registers can be read from offset 2EOh 2FCh Format 0 Mode Video Format 240fps 120fps 60fps 30fps 15fps 7 5fps 3 75fps 1 875fps 0 160x120 4H 2H IH 1 2H 1 4H 1 8H YUV 4 4 4 640p 320p 160p 80p 80p 20 24bit pixel 480q 240q 120q 60q 60q 15q 1 320x240 8 8H 4 4H 2H 1H 1 2H 1 4H 1 8H 1 16H YUV 4 2 2 2560p 1280p 650p 320p 160p 160p 40p 20p 16bit pixel 1280q 640q 320q 160q 80q 80q 20q 10q 2 640x480 16 16H 8 8H 4 4H 2 2H 1H 1 2H 1 4H 1 8H YUV 4 1 1 10240p 5120p 2560p 1280p 640p 320p 160p 80p 12bit pixel 3840g 1920g 960g 480g 240g 120g 60g 30a 3 640x480 32 16H 16 8H 8 4H 4 2H 2 1H 1 2H 1 4H 1 8H YUV 4 2 2 10240p 5120p 2560p 1280p 640p 320p 160p 80p 16bit pixel 5120q 2560q 1280q 640q 320q 160q 80q 40q 4 640x480 RGB 32 16H 16 8H 8 4H 4 2H 2 1H 1 2H 1 4H 1 8H 24bit pix
70. ket UnitBytePerPacket n n is an integer BytePerPacket lt MaxBytePerPacket Format PACKET PARA INO A40h Field Bit Description UnitBytePerPacket 0 15 Minimum bytes per packet MaxBytePerPacket 16 31 Maximum bytes per packet Format BYTE PER PACKET A44h Field Bit Description BytePerPacket 0 15 Packet size RecBytePerPacket 16 31 Recommended bytes per packet If this value is zero must ignore this field Revised 19 Feb 04 Copyright c 2003 42 PGR IEEE 1394 Digital Camera Register Reference 2 10 7 PACKET PER FRAME ING A48h If BytePerPacket n BytePerFrame n is an integer you must use padding The PacketPerFrame value is the number of packets per one frame This register will be updated after BytePerPacket is written The total number of bytes of transmission data per one frame BytePerPacket PacketPerFrame The number of bytes of padding BytePerPacket PacketPerFrame BytePerFrame The receiver must ignore the above padding data in the last packet of each frame Format Field Bit Description PacketPerFrame 0 31 Number of packets per frame 2 10 8 VALUE SETTING A7Ch The purpose of the Setting 1 bit is for updating the TOTAL BYTES HI ING TOTAL BYTES LO INO PACKET PARA INO and BYTE PER PACKET registers If one of the values in the IMAGE POSITION IMAGE SIZE COLOR CODING ID and ISO Speed registers is changed the Sett
71. l Camera DCAM Specification Version 1 30 Other registers are implemented according to Version 1 31 of the DCAM specification these registers are noted with a v1 31 beside the register name Most registers detailed in section 2 11 Revised 19 Feb 04 Copyright c 2003 4 PGR IEEE 1394 Digital Camera Register Reference Advanced Registers are outside of the DCAM specification those that are not are explicitly noted 1 2 Using this Manual Each register section contains a Format table and a Feature Availability table The Format table describes the purpose of each bit in the 32 bit register Some bits have an associated field name listed in the Field column of the Format table Field names are always italicized when referred to outside of the Format table The Feature Availability table describes whether that register is implemented or used by the specified camera indicated by a Y and whether a certain piece of functionality is implemented or not by the camera For example the GPIO_XTRA 1104h has a variety of functions some or none of which may be implemented by a particular model of Scorpion If a camera does not use a register a minus sign is shown together with the comment Not implemented Revised 19 Feb 04 Copyright c 2003 5 PGR IEEE 1394 Digital Camera Register Reference 2 Camera Control Command Registers This section details all of the registers implemented by PGR IEEE 1394 cameras As a gene
72. lpha version 1 for Beta 2 for Release Candidate and 3 for Release All future firmware and software versions posted on our download site will follow this scheme To determine the latest version of a particular family of software look first at Major Revision then Minor Revision and finally Build Number The Build Number does not increase indefinitely but instead resets after each increase of either the Minor or Major Revision Number Example Version 2 0 1 24 is a later version than 2 0 0 23 and is also Beta class software However version 2 1 0 1 is a later version than 2 0 1 24 as this product has undergone a minor revision Version 1 4 0 18 is a later version than 1 3 3 5 even though it is Alpha class software 8 1 2 Alpha Software that meets the PGR Alpha standard is not reguired to satisfy a large percentage of the full software release process This classification has been instituted for guick bug fixes and new functionality As such a user of an Alpha release has very few guarantees outside from the software version number being correct As a general rule Alpha releases will not be made public Upon reguest they can and will be emailed to knowledgeable users 8 1 3 Beta The reguirements for a piece of software to meet the Beta standard are substantially stricter than those of the Alpha standard A release that meets the Beta reguirements will be functionally complete It will have been tested internally and
73. mber for position If read value of Hposunit is 0 Hposunit Hunit for compatibility Vposunit 16 31 Vertical unit number for position If read value of Vposunit is 0 Vposunit Vunit for compatibility 2 10 3 IMAGE_POSITION A08h and IMAGE SIZE A0Ch These registers determine an area of reguired data All the data must be as follows Left Hposunit n1 Top Vposunit m1 Width Hunit n2 Height Vunit m2 n1 n2 ml m2 are integers Left Width lt Hmax Revised 19 Feb 04 Copyright c 2003 40 PGR IEEE 1394 Digital Camera Register Reference Top Height lt Vmax Format IMAGE POSITION A08h Field Bit Description Left 0 15 Left position of requested image region pixels Top 16 31 Top position of requested image region pixels Format IMAGE SIZE A0Ch Field Bit Description Width 0 15 Width of requested image region pixels Height 16 31 Height of requested image region pixels 2 10 4 COLOR CODING ID A10h and COLOR CODING ING A14h The COLOR CODING INO register describes available the color coding capability of the system Each coding scheme has its own ID number The reguired color coding scheme must be set to COLOR CODING ID register as the ID number Format COLOR CODING ID A10h Field Bit Description Coding ID 0 7 Color coding ID from COLOR_COD
74. ntrol Max Value 20 31 Maximum value for this feature control 1404h Strobe 1 Ing Same definition as Strobe 0 Ing 1408h Strobe_2_Inq Same definition as Strobe 0 Ing 140Ch Strobe_3_Inq Same definition as Strobe_0_Inq 1410h Reserved 14FCh 1500h Strobe_O_Cnt Presence_Inq 0 Presence of this feature 0 N A 1 Available 1 5 Reserved On_Off_Ing 6 Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only Note that this field is read only Signal_Polarity 7 Select signal polarity If Polarity Ing is 1 Write to change strobe output polarity Read to get strobe output polarity If Polarity_Inq is 0 Read only 0 Low active output 1 High active output Delay_Value 8 19 Delay after start of exposure until the strobe signal asserts Duration_Value 20 31 Duration of the strobe signal A value of 0 means de assert at the end of exposure if required 1504h Strobe_1_Cnt Same definition as Strobe_O_Cnt 1508h Strobe_2_Cnt Same definition as Strobe_O_Cnt 150Ch Strobe 3 Cnt Same definition as Strobe 0 Cnt 1510h Reserved 15FFh Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Scorpion SCOR 03NS 0 0 1 35 M Revised 19 Feb 04 Copyright c 2003 68 PGR IEEE 1394 Digital Camera Register Reference Flea ALL 0 0 0 22 v Delay and Duration values are in ticks of a 1 024MHz clock so every 1 024 000
75. nual Flea ALL 0 0 0 22 Not implemented 2 11 27 XMIT FAILURE 12FCh This register contains a count of the number of failed frame transmissions that have occurred since the last reset An error occurs if the camera cannot arbitrate for the bus to transmit image data and the image data FIFO overflows Format Field Bit Description Frame_Count 0 31 Read Count of failed frame transmissions Write Reset Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v 2 11 28 SERIAL_NUMBER 1F20h Specifies the unique serial number of the camera Format Field Bit Description Serial_Number 0 31 Unique serial number of camera read only Revised 19 Feb 04 Copyright c 2003 59 PGR IEEE 1394 Digital Camera Register Reference Feature Availability Camera Model Sensor Firmware Avail Notes ALL AL CA 2 11 29 BUILD TIMESTAMP 1F40h Specifies the date that the current version of the firmware was built in Unix time format Format Field Bit Description Build Date 0 31 Date firmware was built read only Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL yx 2 11 30 FIRMWARE VERSION 1F60h This register contains the version information for the currently loaded camera firmware For more information on PGR software and firmwa
76. o control how an external trigger signal that is sent during integration between shutter open and close is handled queued stored to immediately trigger the next frame or dropped Refer to this register to determine if this implemented for your camera Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is read only 2 5 Reserved ON_OFF 6 Write ON or OFF for this feature Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only Trigger_Polarity 7 Select trigger polarity except for Software Trigger 0 Trigger active low 1 Trigger active high Trigger Source 8 10 Select trigger source v1 31 Sets trigger source ID from trigger source ID_Ing Trigger_Value v1 31 11 Trigger input raw signal value Read only 0 Low 1 High 8 11 Reserved Trigger_Mode 12 15 Value 0 1 or 3 A write to this value in Auto mode will be ignored 16 19 Reserved Parameter 20 31 Parameter for trigger function if required optional Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 V Does not implement Trigger Source or Trigger Value implemented through GPIO registers Scorpion
77. on SCOR 13SM 0 0 0 33 M Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 M Flea ALL 0 0 0 22 v Revised 19 Feb 04 Copyright c 2003 39 PGR IEEE 1394 Digital Camera Register Reference 2 10 Video Mode Control and Status Registers for Format 7 These registers provide Format_7 Mode_x information for cameras that implement Format_7 Partial Image Size Format Not all registers are implemented for all PGR cameras 2 10 1 MAX IMAGE SIZE ING A00h This register is an inguiry register for maximum image size Format Field Bit Description Hmax 0 15 Maximum horizontal pixel number Vmax 16 31 Maximum vertical pixel number 2 10 2 UNIT SIZE ING A04h and UNIT_POSITION_INQ LAACH This register is an Inquiry register for unit size Hmax Hunit n Hposunit n3 n n3 are integers Vmax Vunit m Vposunit m3 m m3 are integers If the read value of Hposunit is 0 Hposunit Hunit for compatibility with DCAM Rev 1 20 If the read value of Vposunit is 0 Vposunit Vunit for compatibility with DCAM Rev 1 20 Format UNIT SIZE INO A04h Field Bit Description Hunit 0 15 Horizontal unit pixel number Vunit 16 31 Vertical unit pixel number Format UNIT_POSITION_INQ A4Ch Field Bit Description Hposunit 0 15 Horizontal unit pixel nu
78. on details the format and bandwidth requirements of the isochronous data broadcast by the camera The amount of isochronous bandwidth allocated to a camera must be negotiated with the isochronous resource manager node generally the 1394 host adapter in the PO Every video format mode and frame rate has a different video data format NOTE All Point Grey Research IEEE 1394 cameras follow these DCAM isochronous packet format specifications To determine the formats frame rates implemented by your camera consult your camera e Technical Reference manual 3 1 Isochronous Packet Format for Format 0 Format 1 and Format 2 The following table shows the format of the first quadlet a quadlet being four bytes in the data field of an isochronous data block 0 7 8 15 16 23 24 31 data length tag channel tCode sy header CRC Video data payload data_CRC Table 1 Isochronous Data Packet Format data length the number of bytes in the data field tag tag field shall be set to 0 channel isochronous channel number as programmed in the so channel field of the cam sta ctrl register tCode transaction code shall be set to the isochronous data block packet tCode sy synchronization value shall be set to 0001h on the first isochronous data block of a frame and shall be set to zero on all other isochronous data blocks Video data payload shall contain the digital video informat
79. only control the exposure when the SHUTTER and or GAIN registers have their A M Mode bits set If only one of the registers is in auto mode then the auto exposure controller attempts to control the image intensity using just that one register If both of these registers are in auto mode the auto exposure controller uses a shutter before gain heuristic to try and maximize the signal to noise ratio by favoring a longer shutter time over a larger gain value The Value field specifies the average image intensity in pixel units Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is read only 2 4 Reserved One_Push 5 One push auto mode controlled automatically by camera only once Write 1 Begin to work self cleared after operation Read 0 Not in operation 1 In operation If A_M_Mode 1 this bit is ignored ON_OFF Write ON or OFF for this feature Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only A_M_Mode 7 Write set the mode Read read a current mode 0 Manual 1 Automatic 8 19 Reserved Revised 19 Feb 04 Copyright c 2003 24 PGR IEEE 1394 Digital Camera Register Reference Value 20
80. or Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Scorpion SCOR 13SM 0 0 0 33 Not implemented Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 Not implemented Revised 19 Feb 04 Copyright c 2003 37 PGR IEEE 1394 Digital Camera Register Reference Flea ALL 0 0 0 22 Not implemented 2 9 8 ABS VAL GAMMA 940h This register provides the user with absolute value control over the GAMMA register This register stores a 32 bit floating point value with IEEE REAL 4 format The units of this register are in decimal format and define the function between incoming light level and output picture level y f x Where y output picture level and X incoming light level The user must write a 1 to bit 1 of the GAMMA register at offset 818h in order to change the Value field of this register from being read only Format Offset Name Field Bit Description 940h ABS_VAL_GAMMA Min_Value 0 31 Minimum gamma value 944h Max_Value 0 31 Maximum gamma value 948h Value 0 31 Current gamma value 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m 1bit 8bit 23bit Feature Availability Camera Model Sensor Fi
81. orpion ALL M Default GPIO MODE 0 Flea ALL 0 0 0 22 M Default GPIO MODE 8 2 11 20 GPIO XTRA PIN 3 1144h This register contains mode specific data for the fourth GPIO pin Format Field Bit Description Revised 19 Feb 04 Copyright c 2003 54 PGR IEEE 1394 Digital Camera Register Reference Mode Specific 1 0 15 GPIO_MODE_3 Delay before the start of the pulse GPIO_MODE_4 Low period of PWM output pulse Mode Specific 2 16 31 GPIO MODE 3 Duration of the pulse GPIO MODE 4 Low period of PWM output pulse Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 M Units are ticks of a 49 152MHz clock Scorpion SCOR 03SO 0 0 0 45 M Units are 1 16th of a shutter line Scorpion SCOR 03NS 0 0 1 35 v Flea ALL 0 0 0 22 v Units are ticks of a 1 024MHz clock 2 11 21 PIO OUTPUT 11FOh This section describes the control and inquiry registers for the PIO_Output functionality specified in the IIDC 1394 based Digital Camera DCAM Specification Version v1 31 See the section GPIO Control Using DCAM v1 31 Functionality Format Field Bit Description IO0_Status 0 State voltage level of the IO0 pin 0 Low 1 High IO1_Status 1 State voltage level of the IO1 pin 0 Low 1 High IO2_Status 2 State voltage level of the IO2 pin 0 Low 1 High IO3_Status 3 State voltage level o
82. ral rule PGR IEEE 1394 cameras attempt to conform to the IIDC 1394 based Digital Camera Specification v1 30 which can be purchased from the 1394 Trade association at http www 1394ta org The base address for all camera control command registers is 0xFFFF Fxxx xxxx All camera control registers are offset from the base address 0xFFFF FOFO 0000 2 1 Register map The following detail summarizes the layout of the PGR IEEE 1394 camera register space and lists the associated section of this manual Offset Register Name Description Section 000h INITIALIZE Camera initialize register 2 2 100h V_FORMAT_INQ Inquiry register for video format 2 3 1 180h V_MODE_INQ_X Inquiry register for video mode 2 3 2 200h V RATE INO y XS Inquiry register for video frame rate 2 3 3 300h Reserved 400h BASIC_FUNC_INQ Inquiry register for feature presence 2 4 FEATURE HI INO 2 5 FEATURE LO INO 500h Feature_Name_INQ Inquiry register for feature elements 2 6 600h CAM_STA_CTRL Status and control register for camera 2 7 640h Feature control error status register 700h ABS CSR HI INO x Inquiry register for Absolute value CSR offset 2 9 1 address 800h Feature_Name Status and control register for feature 2 8 Revised 19 Feb 04 Copyright c 2003 6 PGR IEEE 1394 Digital Camera Register Reference 2 2 Camera Initialize Register Format Offset Name Field Bit Description 000h INITIALIZE Initialize 0 If this bit is asserted t
83. re versioning standards please see the section Software and Firmware Version Numbering Format Field Bit Description Major 0 7 Major revision number Minor 8 15 Minor revision number Type 16 19 Type of release 0 Alpha 1 Beta 2 Release Candidate 3 Release Revision 20 31 Revision number Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v 2 11 31 FIRMWARE_BUILD_DATE 1F64h Specifies the date that the current version of the firmware was built in Unix time format Format Field Bit Description Build_Date 0 31 Date firmware was built read only Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL vi Revised 19 Feb 04 Copyright c 2003 60 PGR IEEE 1394 Digital Camera Register Reference 2 11 32 FIRMWARE DESCRIPTION 1F68 1F7Ch Null padded big endian string describing the currently loaded version of firmware Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v Revised 19 Feb 04 Copyright c 2003 61 PGR IEEE 1394 Digital Camera Register Reference 3 Isochronous Packet Format Unlike simple register reads and writes which are handled by asynchronous communication the camera transmits image data using a guaranteed bandwidth mechanism known as isochronous data transmission This secti
84. red to grab an image by sending a voltage transition to the pin Writing a 0 to Bit 31 of the GPIO_CTRL_PIN_x register will cause the camera to be triggered when it detects a falling edge a I is used for a rising edge 4 1 4 GPIO Mode 3 Strobe A GPIO pin in GPIO_Mode_3 will output a voltage pulse of fixed delay and duration according to the 32 bit value of the associated GPIO_XTRA_PIN_x register The Strobe_Start and Strobe_Multiplier fields in the GPIO_XTRA register can be used to change the strobe behaviour 4 1 5 GPIO_Mode_4 Pulse Width Modulation PWM A GPIO pin in GPIO_Mode_4 will output a specified number of pulses with programmable high and low duration The start of these pulses is defined by the user by writing the GPIO_CTRL_PIN_x and or GPIO XTRA DIN x register that is controlling the PWM The pulse is independent of integration or external trigger There is only one real PWM signal source i e two or more pins cannot simultaneously output different PWM s but the pulse can appear on any of the GPIO pins These values must be less than 8000h The units of time will vary between cameras 4 1 6 GPIO_Mode_ 8 Output DCAM Specification v1 31 A GPIO pin in GPIO_MODE_S is currently configured as an output using the DCAM v1 31 functionality See the section GPIO Control Using DCAM v1 31 Functionality Revised 19 Feb 04 Copyright c 2003 66 PGR IEEE 1394 Digital Camera Register Reference 4 2 GPIO Cont
85. rmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 M Scorpion SCOR 03NS 0 0 1 35 Not implemented Scorpion SCOR 03SO 0 0 0 45 Not implemented Scorpion SCOR 20SO 0 0 0 43 Not implemented Scorpion SCOR 13FF 0 0 0 45 M Flea ALL 0 0 0 22 M 2 9 9 ABS VAL TRIGGER DELAY 950h v1 31 This register provides the user with absolute value control over the TRIGGER DELAY register This register stores a 32 bit floating point value with IEEE REAL 4 format The units of this register are in decimal format and define the delay in seconds s between the time of an asynchronous trigger and the start of integration The user must write a 1 to bit 1 of the TRIGGER_DELAY register at offset 834h in order to change the Value field of this register from being read only Revised 19 Feb 04 Copyright c 2003 38 PGR IEEE 1394 Digital Camera Register Reference Format Offset Name Field Bit Description 940h ABS VAL TRIGGER DELAY Min Value 0 31 Minimum delay value 944h Max Value 0 31 Maximum delay value 948h Value 0 31 Current delay value 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Sign S Exponent exp Mantissa m 1bit 8bit 23bit Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpi
86. rol Using DCAM v1 31 Functionality Version 1 31 of the IDC 1394 based Digital Camera DCAM Specification includes a new set of Optional Function CSR registers which define a mechanism for controlling parallel input output strobe and serial port operations These Optional Functions CSRs are implemented in some PGR IEEE 1394 cameras For cameras that implement this functionality PGR recommends using these new registers instead of the GPIO registers 1100h to 1144h 4 2 1 Parallel Input Output PIO Registers 11F0h 11F8h A GPIO pin can be in one of two states output strobe or input trigger The behaviour of each GPIO pin is controlled using the following registers PIO_DIRECTION 11F8h This register is used for configuring pins to be either inputs or outputs and is used in conjunction with the PIO_OUTPUT and PIO_INPUT registers PIO_OUTPUT 11F0h This register is used for configuring the input values for individual pins PIO_INPUT 11F4h This register is used for configuring the output values for individual pins TRIGGER_MODE 830h This register is used for configuring which pin will be the external trigger source Configuring PIO for External Trigger To configure a GPIO pin to be a trigger set the bit for the relevant pin in the PIO_DIRECTION 11F8h register to 0 then set the bit for the relevant pin in the TRIGGER_MODE 830h register Trigger_Source field NOTE Only one GPIO pin can be configured as a trigg
87. s FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 210h V RATE INO 0_4 FrameRate_0 0 Reserved Format 0 Mode 4 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 214h V_RATE_INQ 0_5 FrameRate_0 0 Reserved Format 0 Mode 5 FrameRate_1 1 Reserved FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps FrameRate 5 5 60fps 6 31 Reserved 218h V RATE INO 0_6 FrameRate_0 0 Reserved Format 0 Mode 6 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved Revised 19 Feb 04 Copyright c 2003 PGR IEEE 1394 Digital Camera Register Reference 21Ch Reserved 21Fh 220h V RATE INO 1 0 FrameRate_0 0 Reserved Format 1 Mode 0 FrameRate_1 1 3 75fps FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps 5 31 Reserved 224h V RATE INO 1 1 FrameRate_0 0 Reserved Format 1 Mode 1 FrameRate_1 1 Reserved FrameRate_2 2 7 5fps FrameRate_3 3 15fps 4 31 Reserved 228h V RATE INO 1 2 FrameRate_0 0 Reserved Format 1 Mode 2 FrameRate_1 1 Reserved FrameRate_2 2 7 5fps FrameRate_3 3 15fps FrameRate_4 4 30fps FrameRat
88. t in operation 1 In operation If A_M_Mode 1 this bit is ignored ON_OFF 6 Write ON or OFF for this feature Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only A_M Mode 7 Write Set the mode Read read the current mode 0 Manual 1 Auto B_Value 8 19 Blue Value A write to this value in Auto mode will be ignored R Value 20 31 Red Value A write to this value in Auto mode will be ignored Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 V Bit 1 The camera does not implement Abs Value control for white balance and as such this bit is always 0 Bit 7 The camera does not implement auto white balance and as such this bit is always 0 The range of both the R_Value and B Value is 0 63 Scorpion SCOR 13SM 0 0 0 33 v Color model only Scorpion SCOR 03SO 0 0 0 45 Not implemented No color model Scorpion SCOR 20SO 0 0 0 43 v Color model only Scorpion SCOR 13FF 0 0 0 45 Not implemented No color model Flea ALL 0 0 0 22 v Revised 19 Feb 04 Copyright c 2003 26 PGR IEEE 1394 Digital Camera Register Reference 2 8 5 HUE 810h This register provides a mechanism to control the Hue component of the images being produced by the camera given a standard Hue Saturation Value HSV color space Format Same definition as BRIGHTNESS Feature Availability Camera Model Sensor Firmware Avail Notes A
89. tatus 0 OFF 1 ON If this bit 0 other fields will be read only Controls auto white balance gain boost 7 Reserved Min_ Value 8 19 Lower bound Max Value 20 31 Upper bound Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion ALL 0 0 1 35 M Flea ALL 0 0 0 22 M 2 11 10 GPIO CONTROL 1100h Provides status information about the camera s general purpose I O pins 0 Voltage low 1 Voltage high Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Pin_Count 12 15 Number of available GPIO pins 16 28 Reserved Value 3 28 Value of IO3 Value 2 29 Value of IO2 Value 1 30 Value of IOI Value 0 31 Value of IO0 Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v Scorpion ALL v Flea ALL 0 0 0 22 V 2 11 11 GPIO XTRA 1104h The GPIO XTRA register has three main functions 1 Strobe Start Controls when the strobe starts relative to the start of integration default or relative to the time of an asynchronous trigger 2 Trigger_Queue Control how an external trigger signal that is sent during integration between shutter open and close is handled queued stored to immediately trigger the next frame or dropped 3 Strobe_Multiplier This multiplier acts on three different components Revised
90. ter is supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 13 PGR IEEE 1394 Digital Camera Register Reference 2 5 Inquiry Registers for Feature Presence The following registers show the presence of the DCAM compliant camera features or optional functions implemented on the camera 0 Not Available 1 Available Format Offset Name Field Bit Description 404h Feature Hi Ing Brightness 0 Brightness Control Auto_Exposure 1 Auto Exposure Control Sharpness 2 Sharpness Control White_Balance 3 White Balance Control Hue 4 Hue Control Saturation 5 Saturation Control Gamma 6 Gamma Control Shutter 7 Shutter Speed Control Gain 8 Gain Control Tris 9 IRIS Control Focus 10 Focus Control Temperature 11 Temperature Control Trigger 12 Trigger Control Trigger_Delay 13 Trigger Delay Control White_Shading 14 White Shading Compensation Control Frame_Rate 15 Frame rate prioritize control 16 31 Reserved 408h Feature_Lo_Inq Zoom 9 Zoom Control Pan 1 Pan Control Tilt 2 Tilt Control Optical Filter 3 Optical Filter Control 4 15 Reserved Capture_Size 16 Capture image size for Format_6 Capture_Quality 17 Capture image quality for Format_6 18 31 Reserved 40Ch Opt Function Ina 0 Reserved PIO 1 Parallel input output control SIO 2
91. ticks approx 1 second Revised 19 Feb 04 Copyright c 2003 69 PGR IEEE 1394 Digital Camera Register Reference 5 Trigger Modes This section describes the internal and external trigger modes available These modes and their interaction with the GPIO pins can be configured and controlled via the TRIGGER_MODE register at 830h and the GPIO registers at 1100h 1144h 5 1 1 Trigger Mode 0 Standard External Trigger Mode Trigger_Mode_0 is best described as the standard external trigger mode When the camera is put into Trigger Mode 0 the camera starts integration of the incoming light from external trigger input falling rising edge The SHUTTER register describes integration time No parameter is required The camera can be triggered in this mode using the GPIO pins as external trigger or SOFT_ASYNC_TRIGGER register 102Ch Trigger Sensor exposure Exposure dukation is SHUTTER register value Sensor readout A i data 5 1 2 Trigger Mode 1 Bulb Shutter Mode Also known as Bulb Shutter mode Trigger_Mode_1 is an IIDC 1394 DCAM compliant trigger mode in which the camera starts integration of the incoming light from external trigger input falling edge Integration time is equal to low state time of the external trigger input p Sensor exposure Exposure duration is trigger width Sensor readout ny data Revised 19 Feb 04 Copyright c 2003 70 PGR IEEE 1394 Digital Camera
92. tings section where applicable of your camera s Technical Reference Manual for conversion of values to real world units Format Field Bit Description Presence Ing 0 Presence of this feature 0 N A 1 Available Abs_Control 1 Absolute value control 0 Control with the value in the Value field 1 Control with the value in the Absolute value CSR If this bit 1 the value in the Value field is ignored 2 4 Reserved One_Push 5 One push auto mode controlled automatically by camera only once Write 1 Begin to work self cleared after operation Read 0 Not in operation 1 In operation If A_M_Mode 1 this bit is ignored ON_OFF 6 Read read a status 0 OFF 1 ON If this bit 0 other fields will be read only Note that this field is read only A M Mode 7 Write set the mode Read read a current mode 0 Manual 1 Automatic 8 19 Reserved Value 20 31 Value A write to this value in Auto mode will be ignored Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL V This register is implemented on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 29 PGR IEEE 1394 Digital Camera Register Reference Scorpion SCOR 13SM 0 0 0 33 Auto and One_Push implemented Values come from the Gain CSR which map to the Symagery Gain Configuration Register register 0x04 in
93. uery and modify the current frame rate of the camera Format Field Bit Description Cur V Frm Rate 0 2 Current frame rate FrameRate_0 FrameRate_7 3 31 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 v FrameRate 6 is defined as 0 469fps 1 8 FrameRate 1 FrameRate_7 is defined as 0 938fps 1 4 frame rate 1 Through the adjustment of the EXTENDED_SHUTTER register at offset 1028h the published frame rates would vary accordingly For example if the camera is put into 32Hz mode frame rate 4 would become 32 3 would become 16 2 would become 8 and so on This is true for all extended shutter modes except for the 50Hz mode ALL ALL V This register is supported on all PGR IEEE 1394 DCAM cameras 2 7 2 CURRENT_VIDEO_MODE 604h Allows the user to query and modify the current video mode of the camera Format Field Bit Description Cur_V_Mode Current video mode Mode_0 Mode_7 Reserved Feature Availability Camera Model Sensor Firmware Avail Notes ALL ALL ALL v This register is supported on all PGR IEEE 1394 DCAM cameras Revised 19 Feb 04 Copyright c 2003 17 PGR IEEE 1394 Digital Camera Register Reference 2 7 3 CURRENT_VIDEO_FORMAT 608h Allows the user to query and modify the current video format of the camera Format Field Bit Description Cur
94. ure value EV In absolute mode an EV of 1 is twice as bright as an EV of 0 0 can be considered to be normal exposure In theoretical terms this equates to a shutter of 1 second using a f1 0 aperture lens Normal exposure is where the average intensity of the image is 18 of 1023 18 grey The user must write a 1 to bit 1 of the AUTO_EXPOSURE register at offset 804h in order to change the Value field of this register from being read only Format Offset Name Field Bit Description 900h ABS_VAL_AUTO_EXPOSURE Min_Value 0 31 Minimum auto exposure value 904h Max_ Value 0 31 Maximum auto exposure value 908h Value 0 31 Current auto exposure value 0 7 8 15 16 23 24 31 Floating point value with IEEE REAL 4 format Revised 19 Feb 04 Copyright c 2003 35 PGR IEEE 1394 Digital Camera Register Reference Sign S Exponent exp Mantissa m 1bit 8bit 23bit Feature Availability Camera Model Sensor Firmware Avail Notes Dragonfly ALL 2 1 2 13 Not implemented Scorpion SCOR 13SM 0 0 0 33 v Scorpion SCOR 03NS 0 0 1 35 V Scorpion SCOR 03SO 0 0 0 45 v Scorpion SCOR 20SO 0 0 0 43 M Scorpion SCOR 13FF 0 0 0 45 v Flea ALL 0 0 0 22 v 2 9 5 ABS VAL SHUTTER 910h This register provides the user with absolute value control over the shutter register This register stores a 32 bit floatin

PGR IEEE-1394 Digital Camera Register Reference

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